* [PATCH 07/10] ARM: OMAP1: ams-delta FIQ: Keep serio input GPIOs requested
From: Janusz Krzysztofik @ 2018-06-09 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180609140224.32606-1-jmkrzyszt@gmail.com>
>From the very beginning, input GPIO pins of ams-delta serio port have
been used by FIQ handler, not serio driver.
Don't request those pins from the ams-delta-serio driver any longer,
instead keep them requested and initialized by the FIQ initialization
routine which already requests them and releases while identifying GPIO
IRQs.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
---
arch/arm/mach-omap1/ams-delta-fiq.c | 42 ++++++++++++++++++++++++++++++-----
drivers/input/serio/ams_delta_serio.c | 30 ++-----------------------
2 files changed, 39 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 1d54a6177f14..5a6c59ac9b5f 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -45,6 +45,11 @@ static struct irq_chip *irq_chip;
static struct irq_data *irq_data[16];
static unsigned int irq_counter[16];
+static const char *pin_name[16] __initconst = {
+ [AMS_DELTA_GPIO_PIN_KEYBRD_DATA] = "keybrd_data",
+ [AMS_DELTA_GPIO_PIN_KEYBRD_CLK] = "keybrd_clk",
+};
+
static irqreturn_t deferred_fiq(int irq, void *dev_id)
{
struct irq_data *d;
@@ -80,7 +85,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
void __init ams_delta_init_fiq(struct gpio_chip *chip)
{
- struct gpio_desc *gpiod;
+ struct gpio_desc *gpiod, *data = NULL, *clk = NULL;
void *fiqhandler_start;
unsigned int fiqhandler_length;
struct pt_regs FIQ_regs;
@@ -96,7 +101,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
}
for (i = 0; i < ARRAY_SIZE(irq_data); i++) {
- gpiod = gpiochip_request_own_desc(chip, i, NULL);
+ gpiod = gpiochip_request_own_desc(chip, i, pin_name[i]);
if (IS_ERR(gpiod)) {
pr_err("%s: failed to get GPIO pin %d (%ld)\n",
__func__, i, PTR_ERR(gpiod));
@@ -105,8 +110,27 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
/* Store irq_data location for IRQ handler use */
irq_data[i] = irq_get_irq_data(gpiod_to_irq(gpiod));
- gpiochip_free_own_desc(gpiod);
+ /*
+ * FIQ handler takes full control over serio data and clk GPIO
+ * pins. Initiaize them and keep requested so nobody can
+ * interfere. Fail if any of those two couldn't be requested.
+ */
+ switch (i) {
+ case AMS_DELTA_GPIO_PIN_KEYBRD_DATA:
+ data = gpiod;
+ gpiod_direction_input(data);
+ break;
+ case AMS_DELTA_GPIO_PIN_KEYBRD_CLK:
+ clk = gpiod;
+ gpiod_direction_input(clk);
+ break;
+ default:
+ gpiochip_free_own_desc(gpiod);
+ break;
+ }
}
+ if (!data || !clk)
+ goto out_gpio;
fiqhandler_start = &qwerty_fiqin_start;
fiqhandler_length = &qwerty_fiqin_end - &qwerty_fiqin_start;
@@ -117,7 +141,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
if (retval) {
pr_err("ams_delta_init_fiq(): couldn't claim FIQ, ret=%d\n",
retval);
- return;
+ goto out_gpio;
}
retval = request_irq(INT_DEFERRED_FIQ, deferred_fiq,
@@ -125,7 +149,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
if (retval < 0) {
pr_err("Failed to get deferred_fiq IRQ, ret=%d\n", retval);
release_fiq(&fh);
- return;
+ goto out_gpio;
}
/*
* Since no set_type() method is provided by OMAP irq chip,
@@ -175,4 +199,12 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4;
val = omap_readl(OMAP_IH1_BASE + offset) | 1;
omap_writel(val, OMAP_IH1_BASE + offset);
+
+ return;
+
+out_gpio:
+ if (data)
+ gpiochip_free_own_desc(data);
+ if (clk)
+ gpiochip_free_own_desc(clk);
}
diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c
index 0b4d5a952ecb..a83d8b3cd838 100644
--- a/drivers/input/serio/ams_delta_serio.c
+++ b/drivers/input/serio/ams_delta_serio.c
@@ -110,19 +110,6 @@ static void ams_delta_serio_close(struct serio *serio)
regulator_disable(priv->vcc);
}
-static const struct gpio ams_delta_gpios[] __initconst_or_module = {
- {
- .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_DATA,
- .flags = GPIOF_DIR_IN,
- .label = "serio-data",
- },
- {
- .gpio = AMS_DELTA_GPIO_PIN_KEYBRD_CLK,
- .flags = GPIOF_DIR_IN,
- .label = "serio-clock",
- },
-};
-
static int ams_delta_serio_init(struct platform_device *pdev)
{
struct ams_delta_serio *priv;
@@ -133,13 +120,6 @@ static int ams_delta_serio_init(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
- err = gpio_request_array(ams_delta_gpios,
- ARRAY_SIZE(ams_delta_gpios));
- if (err) {
- dev_err(&pdev->dev, "Couldn't request gpio pins\n");
- goto serio;
- }
-
priv->vcc = devm_regulator_get(&pdev->dev, "vcc");
if (IS_ERR(priv->vcc)) {
err = PTR_ERR(priv->vcc);
@@ -147,7 +127,7 @@ static int ams_delta_serio_init(struct platform_device *pdev)
/* Fail softly if the regulator is not available yet */
if (err == -ENODEV)
err = -EPROBE_DEFER;
- goto gpio;
+ return err;
}
err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK),
@@ -155,7 +135,7 @@ static int ams_delta_serio_init(struct platform_device *pdev)
DRIVER_NAME, priv);
if (err < 0) {
dev_err(&pdev->dev, "IRQ request failed (%d)\n", err);
- goto gpio;
+ return err;
}
/*
* Since GPIO register handling for keyboard clock pin is performed
@@ -191,10 +171,6 @@ static int ams_delta_serio_init(struct platform_device *pdev)
irq:
free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), priv);
-gpio:
- gpio_free_array(ams_delta_gpios,
- ARRAY_SIZE(ams_delta_gpios));
-serio:
return err;
}
@@ -204,8 +180,6 @@ static int ams_delta_serio_exit(struct platform_device *pdev)
serio_unregister_port(priv->serio);
free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0);
- gpio_free_array(ams_delta_gpios,
- ARRAY_SIZE(ams_delta_gpios));
return 0;
}
--
2.16.1
^ permalink raw reply related
* [PATCH 08/10] ARM: OMAP1: Get rid of <mach/ams-delta-fiq.h>
From: Janusz Krzysztofik @ 2018-06-09 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180609140224.32606-1-jmkrzyszt@gmail.com>
Split the header file into two parts and move them to directories where
they belong.
Information on internal structure of FIQ buffer is moved to
<linux/platform_data/ams-delta-fiq.h>, to be used by ams-delta-serio
driver.
Other information used by ams-delta board init file and FIQ code is
made local to mach-omap1 root directory.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
---
MAINTAINERS | 1 +
arch/arm/mach-omap1/ams-delta-fiq-handler.S | 5 +--
arch/arm/mach-omap1/ams-delta-fiq.c | 7 ++--
arch/arm/mach-omap1/ams-delta-fiq.h | 41 ++++++++++++++++++++++
arch/arm/mach-omap1/board-ams-delta.c | 2 +-
drivers/input/serio/ams_delta_serio.c | 3 +-
.../linux/platform_data}/ams-delta-fiq.h | 27 +++-----------
7 files changed, 56 insertions(+), 30 deletions(-)
create mode 100644 arch/arm/mach-omap1/ams-delta-fiq.h
rename {arch/arm/mach-omap1/include/mach => include/linux/platform_data}/ams-delta-fiq.h (71%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 14fbc6e94774..c487348da38c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10391,6 +10391,7 @@ F: arch/arm/plat-omap/
F: arch/arm/configs/omap1_defconfig
F: drivers/i2c/busses/i2c-omap.c
F: include/linux/platform_data/i2c-omap.h
+F: include/linux/platform_data/ams-delta-fiq.h
OMAP2+ SUPPORT
M: Tony Lindgren <tony@atomide.com>
diff --git a/arch/arm/mach-omap1/ams-delta-fiq-handler.S b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
index bf608441b357..ddc27638ba2a 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq-handler.S
+++ b/arch/arm/mach-omap1/ams-delta-fiq-handler.S
@@ -14,11 +14,12 @@
*/
#include <linux/linkage.h>
-#include <asm/assembler.h>
+#include <linux/platform_data/ams-delta-fiq.h>
+#include <asm/assembler.h>
#include <mach/board-ams-delta.h>
-#include <mach/ams-delta-fiq.h>
+#include "ams-delta-fiq.h"
#include "iomap.h"
#include "soc.h"
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index 5a6c59ac9b5f..e72935034d42 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -19,12 +19,13 @@
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/io.h>
+#include <linux/platform_data/ams-delta-fiq.h>
#include <mach/board-ams-delta.h>
#include <asm/fiq.h>
-#include <mach/ams-delta-fiq.h>
+#include "ams-delta-fiq.h"
static struct fiq_handler fh = {
.name = "ams-delta-fiq"
@@ -35,8 +36,8 @@ static struct fiq_handler fh = {
* The FIQ and IRQ isrs can both read and write it.
* It is structured as a header section several 32bit slots,
* followed by the circular buffer where the FIQ isr stores
- * keystrokes received from the qwerty keyboard.
- * See ams-delta-fiq.h for details of offsets.
+ * keystrokes received from the qwerty keyboard. See
+ * <linux/platform_data/ams-delta-fiq.h> for details of offsets.
*/
unsigned int fiq_buffer[1024];
EXPORT_SYMBOL(fiq_buffer);
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h
new file mode 100644
index 000000000000..3f691d68aa62
--- /dev/null
+++ b/arch/arm/mach-omap1/ams-delta-fiq.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * arch/arm/mach-omap1/ams-delta-fiq.h
+ *
+ * Taken from the original Amstrad modifications to fiq.h
+ *
+ * Copyright (c) 2004 Amstrad Plc
+ * Copyright (c) 2006 Matt Callow
+ * Copyright (c) 2010 Janusz Krzysztofik
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __AMS_DELTA_FIQ_H
+#define __AMS_DELTA_FIQ_H
+
+#include <mach/irqs.h>
+
+/*
+ * Interrupt number used for passing control from FIQ to IRQ.
+ * IRQ12, described as reserved, has been selected.
+ */
+#define INT_DEFERRED_FIQ INT_1510_RES12
+/*
+ * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to.
+ */
+#if (INT_DEFERRED_FIQ < IH2_BASE)
+#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE
+#else
+#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE
+#endif
+
+#ifndef __ASSEMBLER__
+extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end;
+
+extern void __init ams_delta_init_fiq(struct gpio_chip *chip);
+#endif
+
+#endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index f15c0793c34b..fe9a3e7cbfeb 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -41,10 +41,10 @@
#include <mach/mux.h>
#include <mach/hardware.h>
-#include <mach/ams-delta-fiq.h>
#include "camera.h"
#include <mach/usb.h>
+#include "ams-delta-fiq.h"
#include "iomap.h"
#include "common.h"
diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c
index a83d8b3cd838..5d0bd2005648 100644
--- a/drivers/input/serio/ams_delta_serio.c
+++ b/drivers/input/serio/ams_delta_serio.c
@@ -22,6 +22,7 @@
*/
#include <linux/gpio.h>
#include <linux/irq.h>
+#include <linux/platform_data/ams-delta-fiq.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/serio.h>
@@ -30,8 +31,6 @@
#include <mach/board-ams-delta.h>
-#include <mach/ams-delta-fiq.h>
-
#define DRIVER_NAME "ams-delta-serio"
MODULE_AUTHOR("Matt Callow");
diff --git a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h b/include/linux/platform_data/ams-delta-fiq.h
similarity index 71%
rename from arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
rename to include/linux/platform_data/ams-delta-fiq.h
index a9769ff396bc..dc0f835ea918 100644
--- a/arch/arm/mach-omap1/include/mach/ams-delta-fiq.h
+++ b/include/linux/platform_data/ams-delta-fiq.h
@@ -1,5 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
/*
- * arch/arm/mach-omap1/include/ams-delta-fiq.h
+ * include/linux/platform_data/ams-delta-fiq.h
*
* Taken from the original Amstrad modifications to fiq.h
*
@@ -11,24 +13,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __AMS_DELTA_FIQ_H
-#define __AMS_DELTA_FIQ_H
-
-#include <mach/irqs.h>
-
-/*
- * Interrupt number used for passing control from FIQ to IRQ.
- * IRQ12, described as reserved, has been selected.
- */
-#define INT_DEFERRED_FIQ INT_1510_RES12
-/*
- * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to.
- */
-#if (INT_DEFERRED_FIQ < IH2_BASE)
-#define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE
-#else
-#define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE
-#endif
+#ifndef __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H
+#define __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H
/*
* These are the offsets from the beginning of the fiq_buffer. They are put here
@@ -71,9 +57,6 @@
#ifndef __ASSEMBLER__
extern unsigned int fiq_buffer[];
-extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end;
-
-extern void __init ams_delta_init_fiq(struct gpio_chip *chip);
#endif
#endif
--
2.16.1
^ permalink raw reply related
* [PATCH 09/10] Input: ams_delta_serio: use IRQ resource
From: Janusz Krzysztofik @ 2018-06-09 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180609140224.32606-1-jmkrzyszt@gmail.com>
The driver still obtains IRQ number from a hardcoded GPIO. Use IRQ
resource instead.
For this to work on Amstrad Delta, add the IRQ resource to
ams-delta-serio platform device structure. Obtain the IRQ number
assigned to "keyboard_clk" GPIO pin from FIQ initialization routine.
As a benefit, the driver no longer needs to include
<mach/board-ams-delta.h>.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
---
arch/arm/mach-omap1/ams-delta-fiq.c | 8 +++++++-
arch/arm/mach-omap1/ams-delta-fiq.h | 3 ++-
arch/arm/mach-omap1/board-ams-delta.c | 17 ++++++++++++++++-
drivers/input/serio/ams_delta_serio.c | 28 ++++++++++------------------
4 files changed, 35 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index e72935034d42..e9d350117240 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -20,6 +20,7 @@
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_data/ams-delta-fiq.h>
+#include <linux/platform_device.h>
#include <mach/board-ams-delta.h>
@@ -84,7 +85,8 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
return IRQ_HANDLED;
}
-void __init ams_delta_init_fiq(struct gpio_chip *chip)
+void __init ams_delta_init_fiq(struct gpio_chip *chip,
+ struct platform_device *serio)
{
struct gpio_desc *gpiod, *data = NULL, *clk = NULL;
void *fiqhandler_start;
@@ -201,6 +203,10 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip)
val = omap_readl(OMAP_IH1_BASE + offset) | 1;
omap_writel(val, OMAP_IH1_BASE + offset);
+ /* Initialize serio device IRQ resource */
+ serio->resource[0].start = gpiod_to_irq(clk);
+ serio->resource[0].end = serio->resource[0].start;
+
return;
out_gpio:
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.h b/arch/arm/mach-omap1/ams-delta-fiq.h
index 3f691d68aa62..fd76df3cce37 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.h
+++ b/arch/arm/mach-omap1/ams-delta-fiq.h
@@ -35,7 +35,8 @@
#ifndef __ASSEMBLER__
extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end;
-extern void __init ams_delta_init_fiq(struct gpio_chip *chip);
+extern void __init ams_delta_init_fiq(struct gpio_chip *chip,
+ struct platform_device *pdev);
#endif
#endif
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index fe9a3e7cbfeb..84177ba3e39a 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -504,9 +504,24 @@ static struct platform_device cx20442_codec_device = {
.id = -1,
};
+static struct resource ams_delta_serio_resources[] = {
+ {
+ .flags = IORESOURCE_IRQ,
+ /*
+ * Initialize IRQ resource with invalid IRQ number.
+ * It will be replaced with dynamically allocated GPIO IRQ
+ * obtained from GPIO chip as soon as the chip is available.
+ */
+ .start = -EINVAL,
+ .end = -EINVAL,
+ },
+};
+
static struct platform_device ams_delta_serio_device = {
.name = "ams-delta-serio",
.id = PLATFORM_DEVID_NONE,
+ .num_resources = ARRAY_SIZE(ams_delta_serio_resources),
+ .resource = ams_delta_serio_resources,
};
static struct regulator_consumer_supply keybrd_pwr_consumers[] = {
@@ -615,7 +630,7 @@ static void __init omap_gpio_deps_init(void)
return;
}
- ams_delta_init_fiq(chip);
+ ams_delta_init_fiq(chip, &ams_delta_serio_device);
}
static void __init ams_delta_init(void)
diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c
index 5d0bd2005648..03640b171516 100644
--- a/drivers/input/serio/ams_delta_serio.c
+++ b/drivers/input/serio/ams_delta_serio.c
@@ -20,7 +20,6 @@
* However, when used with the E3 mailboard that producecs non-standard
* scancodes, a custom key table must be prepared and loaded from userspace.
*/
-#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/platform_data/ams-delta-fiq.h>
#include <linux/platform_device.h>
@@ -29,8 +28,6 @@
#include <linux/slab.h>
#include <linux/module.h>
-#include <mach/board-ams-delta.h>
-
#define DRIVER_NAME "ams-delta-serio"
MODULE_AUTHOR("Matt Callow");
@@ -113,7 +110,7 @@ static int ams_delta_serio_init(struct platform_device *pdev)
{
struct ams_delta_serio *priv;
struct serio *serio;
- int err;
+ int irq, err;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -129,9 +126,12 @@ static int ams_delta_serio_init(struct platform_device *pdev)
return err;
}
- err = request_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK),
- ams_delta_serio_interrupt, IRQ_TYPE_EDGE_RISING,
- DRIVER_NAME, priv);
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return -ENXIO;
+
+ err = devm_request_irq(&pdev->dev, irq, ams_delta_serio_interrupt,
+ IRQ_TYPE_EDGE_RISING, DRIVER_NAME, priv);
if (err < 0) {
dev_err(&pdev->dev, "IRQ request failed (%d)\n", err);
return err;
@@ -141,14 +141,11 @@ static int ams_delta_serio_init(struct platform_device *pdev)
* at FIQ level, switch back from edge to simple interrupt handler
* to avoid bad interaction.
*/
- irq_set_handler(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK),
- handle_simple_irq);
+ irq_set_handler(irq, handle_simple_irq);
serio = kzalloc(sizeof(*serio), GFP_KERNEL);
- if (!serio) {
- err = -ENOMEM;
- goto irq;
- }
+ if (!serio)
+ return -ENOMEM;
priv->serio = serio;
@@ -167,10 +164,6 @@ static int ams_delta_serio_init(struct platform_device *pdev)
dev_info(&serio->dev, "%s\n", serio->name);
return 0;
-
-irq:
- free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), priv);
- return err;
}
static int ams_delta_serio_exit(struct platform_device *pdev)
@@ -178,7 +171,6 @@ static int ams_delta_serio_exit(struct platform_device *pdev)
struct ams_delta_serio *priv = platform_get_drvdata(pdev);
serio_unregister_port(priv->serio);
- free_irq(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK), 0);
return 0;
}
--
2.16.1
^ permalink raw reply related
* [PATCH 10/10] Input: ams_delta_serio: Get FIQ buffer from platform_data
From: Janusz Krzysztofik @ 2018-06-09 14:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180609140224.32606-1-jmkrzyszt@gmail.com>
Instead of exporting the FIQ buffer symbol to be used in
ams-delta-serio driver, pass it to the driver as platform_data.
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
---
arch/arm/mach-omap1/ams-delta-fiq.c | 6 +++---
arch/arm/mach-omap1/board-ams-delta.c | 8 ++++++++
drivers/input/serio/ams_delta_serio.c | 20 +++++++++++++-------
include/linux/platform_data/ams-delta-fiq.h | 4 ----
4 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c
index e9d350117240..983638994bd4 100644
--- a/arch/arm/mach-omap1/ams-delta-fiq.c
+++ b/arch/arm/mach-omap1/ams-delta-fiq.c
@@ -40,8 +40,7 @@ static struct fiq_handler fh = {
* keystrokes received from the qwerty keyboard. See
* <linux/platform_data/ams-delta-fiq.h> for details of offsets.
*/
-unsigned int fiq_buffer[1024];
-EXPORT_SYMBOL(fiq_buffer);
+static unsigned int fiq_buffer[1024];
static struct irq_chip *irq_chip;
static struct irq_data *irq_data[16];
@@ -203,9 +202,10 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip,
val = omap_readl(OMAP_IH1_BASE + offset) | 1;
omap_writel(val, OMAP_IH1_BASE + offset);
- /* Initialize serio device IRQ resource */
+ /* Initialize serio device IRQ resource and platform_data */
serio->resource[0].start = gpiod_to_irq(clk);
serio->resource[0].end = serio->resource[0].start;
+ serio->dev.platform_data = fiq_buffer;
return;
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 84177ba3e39a..772892487827 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -520,6 +520,14 @@ static struct resource ams_delta_serio_resources[] = {
static struct platform_device ams_delta_serio_device = {
.name = "ams-delta-serio",
.id = PLATFORM_DEVID_NONE,
+ .dev = {
+ /*
+ * Initialize .platform_data explicitly with NULL to
+ * indicate it is going to be used. It will be replaced
+ * with FIQ buffer address as soon as FIQ is initialized.
+ */
+ .platform_data = NULL,
+ },
.num_resources = ARRAY_SIZE(ams_delta_serio_resources),
.resource = ams_delta_serio_resources,
};
diff --git a/drivers/input/serio/ams_delta_serio.c b/drivers/input/serio/ams_delta_serio.c
index 03640b171516..ee38c5140f43 100644
--- a/drivers/input/serio/ams_delta_serio.c
+++ b/drivers/input/serio/ams_delta_serio.c
@@ -37,6 +37,7 @@ MODULE_LICENSE("GPL");
struct ams_delta_serio {
struct serio *serio;
struct regulator *vcc;
+ unsigned int *fiq_buffer;
};
static int check_data(struct serio *serio, int data)
@@ -66,22 +67,23 @@ static int check_data(struct serio *serio, int data)
static irqreturn_t ams_delta_serio_interrupt(int irq, void *dev_id)
{
struct ams_delta_serio *priv = dev_id;
- int *circ_buff = &fiq_buffer[FIQ_CIRC_BUFF];
+ int *circ_buff = &priv->fiq_buffer[FIQ_CIRC_BUFF];
int data, dfl;
u8 scancode;
- fiq_buffer[FIQ_IRQ_PEND] = 0;
+ priv->fiq_buffer[FIQ_IRQ_PEND] = 0;
/*
* Read data from the circular buffer, check it
* and then pass it on the serio
*/
- while (fiq_buffer[FIQ_KEYS_CNT] > 0) {
+ while (priv->fiq_buffer[FIQ_KEYS_CNT] > 0) {
- data = circ_buff[fiq_buffer[FIQ_HEAD_OFFSET]++];
- fiq_buffer[FIQ_KEYS_CNT]--;
- if (fiq_buffer[FIQ_HEAD_OFFSET] == fiq_buffer[FIQ_BUF_LEN])
- fiq_buffer[FIQ_HEAD_OFFSET] = 0;
+ data = circ_buff[priv->fiq_buffer[FIQ_HEAD_OFFSET]++];
+ priv->fiq_buffer[FIQ_KEYS_CNT]--;
+ if (priv->fiq_buffer[FIQ_HEAD_OFFSET] ==
+ priv->fiq_buffer[FIQ_BUF_LEN])
+ priv->fiq_buffer[FIQ_HEAD_OFFSET] = 0;
dfl = check_data(priv->serio, data);
scancode = (u8) (data >> 1) & 0xFF;
@@ -116,6 +118,10 @@ static int ams_delta_serio_init(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ priv->fiq_buffer = pdev->dev.platform_data;
+ if (!priv->fiq_buffer)
+ return -EINVAL;
+
priv->vcc = devm_regulator_get(&pdev->dev, "vcc");
if (IS_ERR(priv->vcc)) {
err = PTR_ERR(priv->vcc);
diff --git a/include/linux/platform_data/ams-delta-fiq.h b/include/linux/platform_data/ams-delta-fiq.h
index dc0f835ea918..cf4589ccb720 100644
--- a/include/linux/platform_data/ams-delta-fiq.h
+++ b/include/linux/platform_data/ams-delta-fiq.h
@@ -55,8 +55,4 @@
#define FIQ_CIRC_BUFF 30 /*Start of circular buffer */
-#ifndef __ASSEMBLER__
-extern unsigned int fiq_buffer[];
-#endif
-
#endif
--
2.16.1
^ permalink raw reply related
* [PATCH v2 00/16] arm64: Add SMCCC v1.1 support and CVE-2017-5715 (Spectre variant 2) mitigation
From: Marc Zyngier @ 2018-06-09 14:06 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <f6da84f8-b01e-f8cd-521b-6f2348b963be@jonmasters.org>
Hi Jon,
On Sat, 09 Jun 2018 14:22:27 +0100,
Jon Masters wrote:
>
> Hi Marc,
>
> On 01/29/2018 12:45 PM, Marc Zyngier wrote:
>
> > ARM has recently published a SMC Calling Convention (SMCCC)
> > specification update[1] that provides an optimised calling convention
> > and optional, discoverable support for mitigating CVE-2017-5715. ARM
> > Trusted Firmware (ATF) has already gained such an implementation[2].
>
> Some questions:
>
> 1). What's the plan to implement the boot time on/off control for
> spectre_v2 mitigations?
None so far. It can only be disabled at compile time.
> 2). What's the plan to handle live migration of VMs?
[I assume that by "migration of VMs, you actually mean migration of
the mitigation state]
As I mentioned in response to your comment on the variant-4 series,
this is a work in progress, and is mentioned in the cover letter of
that series. Hopefully I'll find time to work on it next week.
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH] Add a configure option ARM_ERRATA_WFE_BROKEN
From: Bernd Edlinger @ 2018-06-09 17:44 UTC (permalink / raw)
To: linux-arm-kernel
This works around problems with Altera Cyclone5 Devices. See
https://bugzilla.kernel.org/show_bug.cgi?id=111951
I just wanted to let you know that we use this patch since more than
two years now and the problem never repeated for us.
There is one possibly related observation with
CONFIG_PL310_ERRATA_769419 which was always enabled, although it
should be unnecessary according to the comment in
arch/arm/mm/cache-l2x0.c:
* 769419: PL310 R0P0->R3P1, fixed R3P2.
* Affects: store buffer
* store buffer is not automatically drained.
This erratum should not be needed as we use R3P3, but when this
was disabled a kind of dead-lock happened after some time.
It might be connected to this problem since ERRATA_769419 injects
a wmb in the arch_cpu_idle_enter which is one of the last actions
before the wfi instruction which happens in the idle function.
So the current working theory is the cache might freeze before
all data is written out.
Signed-off-by: Bernd Edlinger <bernd.edlinger@hotmail.de>
---
arch/arm/Kconfig | 7 +++++++
arch/arm/include/asm/spinlock.h | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7f8e7f..f96af3b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1215,6 +1215,13 @@ config ARM_ERRATA_852423
config option from the A12 erratum due to the way errata are checked
for and handled.
+config ARM_ERRATA_WFE_BROKEN
+ bool "ARM errata: wfe broken"
+ depends on CPU_V7 && SMP
+ help
+ This option disables the wfe instruction for raw_spin_locks.
+ At least some CycloneV SoC devices wait much too long in wfe.
+
endmenu
source "arch/arm/common/Kconfig"
diff --git a/arch/arm/include/asm/spinlock.h
b/arch/arm/include/asm/spinlock.h
index 099c78f..7efc431 100644
--- a/arch/arm/include/asm/spinlock.h
+++ b/arch/arm/include/asm/spinlock.h
@@ -10,6 +10,12 @@
#include <asm/barrier.h>
#include <asm/processor.h>
+#ifdef CONFIG_ARM_ERRATA_WFE_BROKEN
+#undef wfe
+#define wfe()
+#define WFE(x)
+#define dsb_sev()
+#else
/*
* sev and wfe are ARMv6K extensions. Uniprocessor ARMv6 may not have
the K
* extensions, so when running on UP, we have to patch these
instructions away.
@@ -44,6 +50,7 @@ static inline void dsb_sev(void)
dsb(ishst);
__asm__(SEV);
}
+#endif
/*
* ARMv6 ticket-based spin-locking.
--
2.7.4
^ permalink raw reply related
* [PATCH] KVM: arm/arm64: drop resource size check for GICV window
From: Christoffer Dall @ 2018-06-09 18:58 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <86602s9n5v.wl-marc.zyngier@arm.com>
On Sat, Jun 09, 2018 at 01:09:32PM +0100, Marc Zyngier wrote:
> On Sat, 09 Jun 2018 11:06:57 +0100,
> Christoffer Dall wrote:
> >
> > On Fri, Jun 01, 2018 at 05:06:28PM +0200, Ard Biesheuvel wrote:
> > > When booting a 64 KB pages kernel on a ACPI GICv3 system that
> > > implements support for v2 emulation, the following warning is
> > > produced
> > >
> > > GICV size 0x2000 not a multiple of page size 0x10000
> > >
> > > and support for v2 emulation is disabled, preventing GICv2 VMs
> > > from being able to run on such hosts.
> > >
> > > The reason is that vgic_v3_probe() performs a sanity check on the
> > > size of the window (it should be a multiple of the page size),
> > > while the ACPI MADT parsing code hardcodes the size of the window
> > > to 8 KB. This makes sense, considering that ACPI does not bother
> > > to describe the size in the first place, under the assumption that
> > > platforms implementing ACPI will follow the architecture and not
> > > put anything else in the same 64 KB window.
> >
> > Does the architecture actually say that anywhere?
>
> It implies it in section 8.14 of the GICv3 spec:
>
> <quote>
> To enable use of 64KB pages, the GICV_* memory map must ensure that:
>
> * The base address of the GICV_* registers is 64KB aligned.
>
> * An alias of the GICV_* registers is provided starting at offset
> 0xF000 from the start of the page such that a second copy of
> GICV_DIR exists at the start of the next 64KB page. This provides
> support for both 4KB and 64KB pages.
> </quote>
>
> > > So let's just drop the sanity check altogether, and assume that
> > > the window is at least 64 KB in size.
> >
> > This could obviously be dangerous if broken systems actually exist.
> > Marc may know more about that than me. An alternative would be to
> > modify the ACPI code to assume max(8 KB, page size) instead, and/or a
> > command line parameter to override this check.
>
> While the above is in effect very similar to the corresponding GICv2
> requirements with the ARMv8 architecture (described in SBSA, which
> everybody and their dog are unfortunately making a point in ignoring),
> this is implemented in the CPU, meaning that integrators do not have
> the opportunity to fsck it up. Hooray!
>
> And as far as I know, this is only implemented on A35, A53, A57, A72
> and A73 (all the other ARMv8 CPUs are purely GICv3, and no other
> architectural licensee ever shipped a system with the compat
> interface).
>
> > That said, I'm not directly opposed to this patch, but I'll let Marc
> > have a look as well.
>
> My take on this is that we should play it as per the architecture, and
> only add more checks if we're presented with a non-compliant
> implementation.
>
I had some faint memory that we had actually seen that, but I'm clearly
mixing things up.
Thanks for the extended explanation.
-Christoffer
^ permalink raw reply
* [PATCH v4 1/7] interconnect: Add generic on-chip interconnect API
From: Georgi Djakov @ 2018-06-09 19:15 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <ffd493a7-8c01-3f6b-074f-b4b67707dc83@baylibre.com>
Hi Alexandre,
On 8.06.18 ?. 18:57, Alexandre Bailon wrote:
> On 03/09/2018 10:09 PM, Georgi Djakov wrote:
>> This patch introduce a new API to get requirements and configure the
>> interconnect buses across the entire chipset to fit with the current
>> demand.
>>
>> The API is using a consumer/provider-based model, where the providers are
>> the interconnect buses and the consumers could be various drivers.
>> The consumers request interconnect resources (path) between endpoints and
>> set the desired constraints on this data flow path. The providers receive
>> requests from consumers and aggregate these requests for all master-slave
>> pairs on that path. Then the providers configure each participating in the
>> topology node according to the requested data flow path, physical links and
>> constraints. The topology could be complicated and multi-tiered and is SoC
>> specific.
>>
>> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
>> ---
>> Documentation/interconnect/interconnect.rst | 96 ++++++
>> drivers/Kconfig | 2 +
>> drivers/Makefile | 1 +
>> drivers/interconnect/Kconfig | 10 +
>> drivers/interconnect/Makefile | 1 +
>> drivers/interconnect/core.c | 489 ++++++++++++++++++++++++++++
>> include/linux/interconnect-provider.h | 109 +++++++
>> include/linux/interconnect.h | 40 +++
>> 8 files changed, 748 insertions(+)
>> create mode 100644 Documentation/interconnect/interconnect.rst
>> create mode 100644 drivers/interconnect/Kconfig
>> create mode 100644 drivers/interconnect/Makefile
>> create mode 100644 drivers/interconnect/core.c
>> create mode 100644 include/linux/interconnect-provider.h
>> create mode 100644 include/linux/interconnect.h
>>
[..]
>> +
>> +/**
>> + * icc_link_create() - create a link between two nodes
>> + * @src_id: source node id
> I guess src_id has become node and is not an id anymore,
> so it should be updated.
Yes, absolutely!
>> + * @dst_id: destination node id
>> + *
>> + * Return: 0 on success, or an error code otherwise
>> + */
>> +int icc_link_create(struct icc_node *node, const int dst_id)
>> +{
Thanks,
Georgi
^ permalink raw reply
* [PATCH 04/24] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
From: Adam Borowski @ 2018-06-09 21:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <mhng-e1922456-a05b-46f9-8644-d45ad70a55e5@palmer-si-x1c4>
On Fri, Jun 08, 2018 at 03:33:51PM -0700, Palmer Dabbelt wrote:
> On Fri, 08 Jun 2018 10:32:07 PDT (-0700), catalin.marinas at arm.com wrote:
> > On Wed, May 16, 2018 at 11:18:49AM +0300, Yury Norov wrote:
> > > +config ARCH_32BIT_OFF_T
> > > + bool
> > > + depends on !64BIT
> > > + help
> > > + All new 32-bit architectures should have 64-bit off_t type on
> > > + userspace side which corresponds to the loff_t kernel type. This
> > > + is the requirement for modern ABIs. Some existing architectures
> > > + already have 32-bit off_t. This option is enabled for all such
> > > + architectures explicitly. Namely: arc, arm, blackfin, cris, frv,
> > > + h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300,
> > > + nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32,
> > > + unicore32, x86_32 and xtensa. This is the complete list. Any
> > > + new 32-bit architecture should declare 64-bit off_t type on user
> > > + side and so should not enable this option.
> >
> > Do you know if this is the case for riscv and nds32, merged in the
> > meantime? If not, I suggest you drop this patch altogether and just
> > define force_o_largefile() for arm64/ilp32 as we don't seem to stick to
> > "all new 32-bit architectures should have 64-bit off_t".
nds32 was obsolete even at the time of merging (it's just that Andes have
a novel idea of actually supporting their old product lines!), thus it'll
be a short lived port. It doesn't matter much if it carries legacy baggage
-- especially that it has existing out-of-mainline users.
Not so much for riscv32, which is designed and planned to be very long
lived. And has no existing _Linux_ users.
> We (RISC-V) don't have support for rv32i in glibc yet, so there really isn't
> a fixed ABI there yet. From my understanding the rv32i port as it currently
> stands has a 32-bit off_t (via __kernel_off_t being defined as long), so
> this change would technically be a kernel ABI break.
>
> Since we don't have rv32i glibc yet I'm not fundamentally opposed to an ABI
> break. Is there a concrete advantage to this?
While modern userland tends to implement LFS support, it's still opt in for
individual binaries at compile time. With my (userland) porter hat on, I
can tell you that no matter how you preach about using sane build systems, a
terrifying portion of packages manage to fail to pass such flags.
Especially for lesser-known or new architectures -- you need to specifically
add the flag for every new arch for every such piece of software.
Its lack is also not so easy to spot in an automated way; an experimental
and hacky attempt to detect them (IIRC by checking whether the program in
question imports an open/lseek/etc symbol instead of open64) is here:
https://lintian.debian.org/tags/binary-file-built-without-LFS-support.html
20511 ELFs in 5953 packages!
If there's no 32-bit open() (ie, it's an alias to open64()), all these bugs
are immediately fixed. Well, a program can still store file size in an int,
but at least there's no interface problem.
On the kernel side, you avoid the need to carry syscalls and structs for
32-bit variants. This gets you less complexity and a smaller kernel.
Meow!
--
??????? I've read an article about how lively happy music boosts
??????? productivity. You can read it, too, you just need the
??????? right music while doing so. I recommend Skepticism
??????? (funeral doom metal).
^ permalink raw reply
* [PATCH v2] irqchip/gic-v3-its: fix ITS queue timeout
From: Marc Zyngier @ 2018-06-10 10:40 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <fc0393df-22d4-0334-91ce-8ddcdbf5ec21@huawei.com>
Hi Hanjun,
On Thu, 07 Jun 2018 13:25:26 +0100,
Hanjun Guo wrote:
>
> Hi Marc,
>
> On 2018/6/6 17:13, Marc Zyngier wrote:
> [...]
> >
> > Wouldn't it be better to just return that the affinity setting request
> > is impossible to satisfy? And more to the point, how comes we end-up
> > in such a case?
>
> The system is booted with a NUMA node has no memory attaching to it
> (memory-less NUMA node), also with NR_CPUS less than CPUs presented
> in MADT, so CPUs on this memory-less node are not brought up, and
> this NUMA node will not be online too. But the ITS attaching to this NUMA
> domain is still valid and represented via SRAT to ITS driver.
>
> This is really the corner case which is triggered by the boot testing
> when enabling our D06 boards, but it's a bug :)
I'm not debating the bringing up (or lack thereof) of the secondary
CPUs. I'm questioning the affinity setting to unavailable CPUs, and I
really wonder what the semantic of such a thing is (and how we end-up
there).
Anyway, I'll plug the "SYNC to unmapped collection" issue (which
definitely needs fixing), but I'd like to understand the above.
Thanks,
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH v5 4/4] kernel hacking: new config CC_OPTIMIZE_FOR_DEBUGGING to apply GCC -Og optimization
From: kbuild test robot @ 2018-06-10 10:44 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1528186420-6615-5-git-send-email-changbin.du@intel.com>
Hi Changbin,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.17 next-20180608]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/changbin-du-intel-com/kernel-hacking-GCC-optimization-for-better-debug-experience-Og/20180606-001415
config: i386-randconfig-x079-06101602 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
In file included from arch/x86/include/asm/page_32.h:35:0,
from arch/x86/include/asm/page.h:14,
from arch/x86/include/asm/thread_info.h:12,
from include/linux/thread_info.h:38,
from arch/x86/include/asm/preempt.h:7,
from include/linux/preempt.h:81,
from include/linux/spinlock.h:51,
from include/linux/seqlock.h:36,
from include/linux/time.h:6,
from include/linux/stat.h:19,
from include/linux/module.h:10,
from net//bluetooth/mgmt.c:27:
net//bluetooth/mgmt.c: In function 'read_local_oob_ext_data_complete':
>> include/linux/string.h:345:9: warning: 'r256' may be used uninitialized in this function [-Wmaybe-uninitialized]
return __builtin_memcpy(p, q, size);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
net//bluetooth/mgmt.c:5669:27: note: 'r256' was declared here
u8 *h192, *r192, *h256, *r256;
^~~~
--
In file included from arch/x86/include/asm/page_32.h:35:0,
from arch/x86/include/asm/page.h:14,
from arch/x86/include/asm/thread_info.h:12,
from include/linux/thread_info.h:38,
from arch/x86/include/asm/preempt.h:7,
from include/linux/preempt.h:81,
from include/linux/spinlock.h:51,
from include/linux/seqlock.h:36,
from include/linux/time.h:6,
from include/linux/stat.h:19,
from include/linux/module.h:10,
from net/bluetooth/mgmt.c:27:
net/bluetooth/mgmt.c: In function 'read_local_oob_ext_data_complete':
>> include/linux/string.h:345:9: warning: 'r256' may be used uninitialized in this function [-Wmaybe-uninitialized]
return __builtin_memcpy(p, q, size);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~
net/bluetooth/mgmt.c:5669:27: note: 'r256' was declared here
u8 *h192, *r192, *h256, *r256;
^~~~
vim +/r256 +345 include/linux/string.h
6974f0c4 Daniel Micay 2017-07-12 332
6974f0c4 Daniel Micay 2017-07-12 333 __FORTIFY_INLINE void *memcpy(void *p, const void *q, __kernel_size_t size)
6974f0c4 Daniel Micay 2017-07-12 334 {
6974f0c4 Daniel Micay 2017-07-12 335 size_t p_size = __builtin_object_size(p, 0);
6974f0c4 Daniel Micay 2017-07-12 336 size_t q_size = __builtin_object_size(q, 0);
6974f0c4 Daniel Micay 2017-07-12 337 if (__builtin_constant_p(size)) {
6974f0c4 Daniel Micay 2017-07-12 338 if (p_size < size)
6974f0c4 Daniel Micay 2017-07-12 339 __write_overflow();
6974f0c4 Daniel Micay 2017-07-12 340 if (q_size < size)
6974f0c4 Daniel Micay 2017-07-12 341 __read_overflow2();
6974f0c4 Daniel Micay 2017-07-12 342 }
6974f0c4 Daniel Micay 2017-07-12 343 if (p_size < size || q_size < size)
6974f0c4 Daniel Micay 2017-07-12 344 fortify_panic(__func__);
6974f0c4 Daniel Micay 2017-07-12 @345 return __builtin_memcpy(p, q, size);
6974f0c4 Daniel Micay 2017-07-12 346 }
6974f0c4 Daniel Micay 2017-07-12 347
:::::: The code at line 345 was first introduced by commit
:::::: 6974f0c4555e285ab217cee58b6e874f776ff409 include/linux/string.h: add the option of fortified string.h functions
:::::: TO: Daniel Micay <danielmicay@gmail.com>
:::::: CC: Linus Torvalds <torvalds@linux-foundation.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH 0/7] add non-strict mode support for arm-smmu-v3
From: Leizhen (ThunderTown) @ 2018-06-10 11:13 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <5B10ECBB.209@huawei.com>
On 2018/6/1 14:50, Leizhen (ThunderTown) wrote:
>
>
> On 2018/5/31 22:25, Robin Murphy wrote:
>> On 31/05/18 14:49, Hanjun Guo wrote:
>>> Hi Robin,
>>>
>>> On 2018/5/31 19:24, Robin Murphy wrote:
>>>> On 31/05/18 08:42, Zhen Lei wrote:
>>>>> In common, a IOMMU unmap operation follow the below steps:
>>>>> 1. remove the mapping in page table of the specified iova range
>>>>> 2. execute tlbi command to invalid the mapping which is cached in TLB
>>>>> 3. wait for the above tlbi operation to be finished
>>>>> 4. free the IOVA resource
>>>>> 5. free the physical memory resource
>>>>>
>>>>> This maybe a problem when unmap is very frequently, the combination of tlbi
>>>>> and wait operation will consume a lot of time. A feasible method is put off
>>>>> tlbi and iova-free operation, when accumulating to a certain number or
>>>>> reaching a specified time, execute only one tlbi_all command to clean up
>>>>> TLB, then free the backup IOVAs. Mark as non-strict mode.
>>>>>
>>>>> But it must be noted that, although the mapping has already been removed in
>>>>> the page table, it maybe still exist in TLB. And the freed physical memory
>>>>> may also be reused for others. So a attacker can persistent access to memory
>>>>> based on the just freed IOVA, to obtain sensible data or corrupt memory. So
>>>>> the VFIO should always choose the strict mode.
>>>>>
>>>>> Some may consider put off physical memory free also, that will still follow
>>>>> strict mode. But for the map_sg cases, the memory allocation is not controlled
>>>>> by IOMMU APIs, so it is not enforceable.
>>>>>
>>>>> Fortunately, Intel and AMD have already applied the non-strict mode, and put
>>>>> queue_iova() operation into the common file dma-iommu.c., and my work is based
>>>>> on it. The difference is that arm-smmu-v3 driver will call IOMMU common APIs to
>>>>> unmap, but Intel and AMD IOMMU drivers are not.
>>>>>
>>>>> Below is the performance data of strict vs non-strict for NVMe device:
>>>>> Randomly Read IOPS: 146K(strict) vs 573K(non-strict)
>>>>> Randomly Write IOPS: 143K(strict) vs 513K(non-strict)
>>>>
>>>> What hardware is this on? If it's SMMUv3 without MSIs (e.g. D05), then you'll still be using the rubbish globally-blocking sync implementation. If that is the case, I'd be very interested to see how much there is to gain from just improving that - I've had a patch kicking around for a while[1] (also on a rebased branch at [2]), but don't have the means for serious performance testing.
> I will try your patch to see how much it can improve. I think the best way
Hi Robin,
I applied your patch and got below improvemnet.
Randomly Read IOPS: 146K --> 214K
Randomly Write IOPS: 143K --> 212K
> to resovle the globally-blocking sync is that the hardware provide 64bits
> CONS regitster, so that it can never be wrapped, and the spinlock can also
> be removed.
>
>>>
>>> The hardware is the new D06 which the SMMU with MSIs,
>>
>> Cool! Now that profiling is fairly useful since we got rid of most of the locks, are you able to get an idea of how the overhead in the normal case is distributed between arm_smmu_cmdq_insert_cmd() and __arm_smmu_sync_poll_msi()? We're always trying to improve our understanding of where command-queue-related overheads turn out to be in practice, and there's still potentially room to do nicer things than TLBI_NH_ALL ;)
> Even if the software has no overhead, there may still be a problem, because
> the smmu need to execute the commands in sequence, especially before
> globally-blocking sync has been removed. Base on the actually execute time
> of single tlbi and sync, we can get the upper limit in theory.
>
> BTW, I will reply the reset of mail next week. I'm busy with other things now.
>
>>
>> Robin.
>>
>>> it's not D05 :)
>>>
>>> Thanks
>>> Hanjun
>>>
>>
>> .
>>
>
--
Thanks!
BestRegards
^ permalink raw reply
* panic kexec broken on ARM64?
From: Marc Zyngier @ 2018-06-10 12:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <2865150f-ebca-4c6b-fc4b-93bfab5f0e91@arm.com>
On Wed, 06 Jun 2018 12:37:02 +0100,
James Morse wrote:
>
> Hi Stefan,
>
> On 06/06/18 08:02, Stefan Wahren wrote:
> > Am 05.06.2018 um 19:46 schrieb James Morse:
> >> On 05/06/18 09:01, Petr Tesarik wrote:
> >>> I attached a hardware debugger and found
> >>> out that all CPU cores were stopped except one which was stuck in the
> >>> idle thread. It seems that irq_set_irqchip_state() may sleep, which is
> >>> definitely not safe after a kernel panic.
>
> >> I don't know much about irqchip stuff, but __irq_get_desc_lock() takes a
> >> raw_spin_lock(), and calls gic_irq_get_irqchip_state() which is just poking
> >> around in mmio registers, this should all be safe unless you re-entered the same
> >> code.
>
> >>> If I'm right, then this is broken in general, but I have only ever seen
> >>> it on RPi 3 Model B+ (even RPi3 Model B works fine), so the issue may
> >>> be more subtle.
>
> >> Is there a hardware difference around the interrupt controller on these?
>
> > No, but the RPi 3 B has a different USB network chip on board (smsc95xx, Fast
> > ethernet) instead of lan78xx (Gigabit ethernet).
>
> Bingo: its the lan78xx driver that is sleeping from the irqchip
> callbacks; The smsc95xx driver doesn't have a struct irq_chip, which
> is why the RPi-3-B doesn't do this.
>
> It may be valid for kdump to only teardown the 'root irqdomain' (if
> that even means anything). I assume these secondary irqchip's would
> have a summary-interrupt that goes to another irqchip. But I can't
> see a way to tell them apart..,
There is none. A cascaded irqchip is just like a root irqchip, just
that its output line is connected to another irqchip. But we have no
easy way to identify the parent. Also, this particular driver looks
quite creative (it reinvents the wheel for chained interrupts -- see
intr_complete and lan78xx_status), meaning that even if we could have
a magic way of identify a chained irqchip, we'd miss that one. Broken.
> I think we need to wait until after the merge window for Marc's
> wisdom on this!
Overall, I can't think of an easy fix. We have a few options, but none
of them involve a centralised change:
1) We provide a reset infrastructure for irqchips, with an opt-in
mechanism. This involves changing the way we teardown irqs at
crash-time, and we'd then need some notion of reset ordering (think
of the layered ITS and GICv3, for example).
2) We provide a way to identify interrupts that are ultimately backed
by a root controller, which implies walking down the hierarchy for
each one of them. Fairly expensive, but minimal in way of changes
in the crash code. Requires a per-irqchip flag, but ordering comes
in for free.
3) We do the same as (2), but at the irqdomain level. Not sure that's
any better, and it may be even more complicated and bring back some
ordering issues.
I'm currently angling for (2), with (1) as a final hammer option once
we have nuked all the individual interrupts (useful for the GICv3
redistributor case).
Thoughts?
M.
--
Jazz is not dead, it just smell funny.
^ permalink raw reply
* [PATCH v7 1/9] MAINTAINERS: add generic resistive touchscreen adc
From: Jonathan Cameron @ 2018-06-10 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-2-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:31 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Add MAINTAINERS entry for generic resistive touchscreen adc
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Applied to the togreg branch of iio.git after a rebase brought
in the missing fix that was stalling this. Note these are
now going to be heading upstream at the next merge window,
not the one currently open.
Pushed out as testing for the autobuilders to play with it.
Thanks,
Jonathan
> ---
> Changes in v3:
> - Changed source file name
>
> MAINTAINERS | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3bdc260..ce9720f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -5943,6 +5943,12 @@ F: drivers/base/power/domain*.c
> F: include/linux/pm_domain.h
> F: Documentation/devicetree/bindings/power/power_domain.txt
>
> +GENERIC RESISTIVE TOUCHSCREEN ADC DRIVER
> +M: Eugen Hristev <eugen.hristev@microchip.com>
> +L: linux-input at vger.kernel.org
> +S: Maintained
> +F: drivers/input/touchscreen/resistive-adc-touch.c
> +
> GENERIC UIO DRIVER FOR PCI DEVICES
> M: "Michael S. Tsirkin" <mst@redhat.com>
> L: kvm at vger.kernel.org
^ permalink raw reply
* [PATCH v7 2/9] iio: Add channel for Position Relative
From: Jonathan Cameron @ 2018-06-10 12:30 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-3-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:32 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Add new channel type for relative position on a pad.
>
> These type of analog sensor offers the position of a pen
> on a touchpad, and is represented as a voltage, which can be
> converted to a position on X and Y axis on the pad.
> The channel will hand the relative position on the pad in both directions.
>
> The channel can then be consumed by a touchscreen driver or
> read as-is for a raw indication of the touchpen on a touchpad.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Applied - with a trivial amount of fuzz.
Thanks,
Jonathan
> ---
> Changes in v2:
> - modified channel name to relative position as suggested.
> - modified kernel version to 4.18 (presumable)
>
> Documentation/ABI/testing/sysfs-bus-iio | 12 ++++++++++++
> drivers/iio/industrialio-core.c | 1 +
> include/uapi/linux/iio/types.h | 1 +
> tools/iio/iio_event_monitor.c | 2 ++
> 4 files changed, 16 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
> index 6a5f34b..42a9287 100644
> --- a/Documentation/ABI/testing/sysfs-bus-iio
> +++ b/Documentation/ABI/testing/sysfs-bus-iio
> @@ -190,6 +190,18 @@ Description:
> but should match other such assignments on device).
> Units after application of scale and offset are m/s^2.
>
> +What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw
> +What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw
> +KernelVersion: 4.18
> +Contact: linux-iio at vger.kernel.org
> +Description:
> + Relative position in direction x or y on a pad (may be
> + arbitrarily assigned but should match other such assignments on
> + device).
> + Units after application of scale and offset are milli percents
> + from the pad's size in both directions. Should be calibrated by
> + the consumer.
> +
> What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_raw
> What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_raw
> What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_raw
> diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
> index 19bdf3d..14bf3d24 100644
> --- a/drivers/iio/industrialio-core.c
> +++ b/drivers/iio/industrialio-core.c
> @@ -85,6 +85,7 @@ static const char * const iio_chan_type_name_spec[] = {
> [IIO_COUNT] = "count",
> [IIO_INDEX] = "index",
> [IIO_GRAVITY] = "gravity",
> + [IIO_POSITIONRELATIVE] = "positionrelative",
> };
>
> static const char * const iio_modifier_names[] = {
> diff --git a/include/uapi/linux/iio/types.h b/include/uapi/linux/iio/types.h
> index 4213cdf..033c7d2 100644
> --- a/include/uapi/linux/iio/types.h
> +++ b/include/uapi/linux/iio/types.h
> @@ -44,6 +44,7 @@ enum iio_chan_type {
> IIO_COUNT,
> IIO_INDEX,
> IIO_GRAVITY,
> + IIO_POSITIONRELATIVE,
> };
>
> enum iio_modifier {
> diff --git a/tools/iio/iio_event_monitor.c b/tools/iio/iio_event_monitor.c
> index b61245e..148f69d 100644
> --- a/tools/iio/iio_event_monitor.c
> +++ b/tools/iio/iio_event_monitor.c
> @@ -58,6 +58,7 @@ static const char * const iio_chan_type_name_spec[] = {
> [IIO_PH] = "ph",
> [IIO_UVINDEX] = "uvindex",
> [IIO_GRAVITY] = "gravity",
> + [IIO_POSITIONRELATIVE] = "positionrelative",
> };
>
> static const char * const iio_ev_type_text[] = {
> @@ -151,6 +152,7 @@ static bool event_is_known(struct iio_event_data *event)
> case IIO_PH:
> case IIO_UVINDEX:
> case IIO_GRAVITY:
> + case IIO_POSITIONRELATIVE:
> break;
> default:
> return false;
^ permalink raw reply
* [PATCH v7 3/9] dt-bindings: input: touchscreen: add minimum pressure touchscreen property
From: Jonathan Cameron @ 2018-06-10 12:31 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-4-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:33 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Add a common touchscreen optional property that will specify
> the minimum pressure applied to the screen that is needed
> such that the driver will report the touch event.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
Applied, Thanks,
Jonathan
> ---
> Changes in v5:
> - Modified property name to touchscreen-min-pressure from
> touchscreen-threshold-property
>
> Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt
> index 537643e..d092d5d 100644
> --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt
> +++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt
> @@ -7,6 +7,9 @@ Optional properties for Touchscreens:
> (in pixels)
> - touchscreen-max-pressure : maximum reported pressure (arbitrary range
> dependent on the controller)
> + - touchscreen-min-pressure : minimum pressure on the touchscreen to be
> + achieved in order for the touchscreen
> + driver to report a touch event.
> - touchscreen-fuzz-x : horizontal noise value of the absolute input
> device (in pixels)
> - touchscreen-fuzz-y : vertical noise value of the absolute input
^ permalink raw reply
* [PATCH v7 4/9] dt-bindings: input: touchscreen: resistive-adc-touch: create bindings
From: Jonathan Cameron @ 2018-06-10 12:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-5-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:34 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Added bindings for generic resistive touchscreen ADC.
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
Applied, thanks
Jonathan
> ---
> Changes in v5:
> - changed property name touchscreen-threshold-pressure to
> touchscreen-min-pressure
>
> Changes in v3:
> - renamed file and compatible to exclude "generic" keyword
> - removed the pressure threshold property, added it as a common
> touchscreen property in the touchscreen common bindings in a separate
> commit.
>
> Changes in v2:
> - modified bindings to have a generic resistive touchscreen adc driver
> instead of specific architecture one.
>
> .../input/touchscreen/resistive-adc-touch.txt | 30 ++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.txt
>
> diff --git a/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.txt b/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.txt
> new file mode 100644
> index 0000000..51456c0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/input/touchscreen/resistive-adc-touch.txt
> @@ -0,0 +1,30 @@
> +Generic resistive touchscreen ADC
> +
> +Required properties:
> +
> + - compatible: must be "resistive-adc-touch"
> +The device must be connected to an ADC device that provides channels for
> +position measurement and optional pressure.
> +Refer to ../iio/iio-bindings.txt for details
> + - iio-channels: must have at least two channels connected to an ADC device.
> +These should correspond to the channels exposed by the ADC device and should
> +have the right index as the ADC device registers them. These channels
> +represent the relative position on the "x" and "y" axes.
> + - iio-channel-names: must have all the channels' names. Mandatory channels
> +are "x" and "y".
> +
> +Optional properties:
> + - iio-channels: The third channel named "pressure" is optional and can be
> +used if the ADC device also measures pressure besides position.
> +If this channel is missing, pressure will be ignored and the touchscreen
> +will only report position.
> + - iio-channel-names: optional channel named "pressure".
> +
> +Example:
> +
> + resistive_touch: resistive_touch {
> + compatible = "resistive-adc-touch";
> + touchscreen-min-pressure = <50000>;
> + io-channels = <&adc 24>, <&adc 25>, <&adc 26>;
> + io-channel-names = "x", "y", "pressure";
> + };
^ permalink raw reply
* [PATCH v7 5/9] iio: adc: at91-sama5d2_adc: add support for position and pressure channels
From: Jonathan Cameron @ 2018-06-10 12:32 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180522122244.GM22971@rfolt0960.corp.atmel.com>
On Tue, 22 May 2018 14:22:44 +0200
Ludovic Desroches <ludovic.desroches@microchip.com> wrote:
> On Tue, May 22, 2018 at 10:52:35AM +0300, Eugen Hristev wrote:
> > This implements the support for position and pressure for the included
> > touchscreen support in the SAMA5D2 SOC ADC block.
> > Two position channels are added and one for pressure.
> > They can be read in raw format, or through a buffer.
> > A normal use case is for a consumer driver to register a callback buffer
> > for these channels.
> > When the touchscreen channels are in the active scan mask,
> > the driver will start the touchscreen sampling and push the data to the
> > buffer.
> >
> > Some parts of this patch are based on initial original work by
> > Mohamed Jamsheeth Hajanajubudeen and Bandaru Venkateswara Swamy
> >
> > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Applied, thanks.
Jonathan
>
> > ---
> > Changes in v6:
> > - fixed a crash when issuing buffer enable from sysfs, if no trigger was
> > previously configured. This is because now the driver can work in software
> > buffer mode (to connect the callback buffer). So, when trying to enable the
> > buffer, check if we are going indeed to a triggered mode or not. If not, do
> > not allow buffer to be started (we do not have the right trigger).
> > It's in buffer_postenable and predisable.
> >
> > Changes in v4:
> > - use return value of at91_adc_configure_touch
> > - rewrote some part of the read_info_raw according to Jonathan's
> > suggestion
> >
> > Changes in v3:
> > - prefix macros with AT91_SAMA5D2
> > - reworked the x_pos and y_pos functions into a single one with two
> > additional wrappers
> > - reworked pressure report to have it grow naturally and not top down
> > - fixed some checks regarding IIO_VOLTAGE as suggested
> > - added a comment explaining some code in trigger handling
> > - reworked the frequency get handler to use the saved value instead of
> > reading it from the hardware.
> > - added comment on deffered work queueing
> > - pulled out INFO_RAW function into a separate utility function as suggested
> > - added iio_dev ops structure at all times . The functions are needed in
> > case we do not have a hardware trigger attached, but we want to use the
> > consumer touchscreen driver, thus a callback buffer is attached. Then we still
> > need to have buffer preenable and postdisable to configure the touch IRQs (etc.)
> >
> > Changes in v2:
> > - the support is now based on callback buffer.
> >
> > drivers/iio/adc/at91-sama5d2_adc.c | 609 +++++++++++++++++++++++++++++++++----
> > 1 file changed, 551 insertions(+), 58 deletions(-)
> >
> > diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
> > index 8729d65..58c4c2b 100644
> > --- a/drivers/iio/adc/at91-sama5d2_adc.c
> > +++ b/drivers/iio/adc/at91-sama5d2_adc.c
> > @@ -102,14 +102,26 @@
> > #define AT91_SAMA5D2_LCDR 0x20
> > /* Interrupt Enable Register */
> > #define AT91_SAMA5D2_IER 0x24
> > +/* Interrupt Enable Register - TS X measurement ready */
> > +#define AT91_SAMA5D2_IER_XRDY BIT(20)
> > +/* Interrupt Enable Register - TS Y measurement ready */
> > +#define AT91_SAMA5D2_IER_YRDY BIT(21)
> > +/* Interrupt Enable Register - TS pressure measurement ready */
> > +#define AT91_SAMA5D2_IER_PRDY BIT(22)
> > /* Interrupt Enable Register - general overrun error */
> > #define AT91_SAMA5D2_IER_GOVRE BIT(25)
> > +/* Interrupt Enable Register - Pen detect */
> > +#define AT91_SAMA5D2_IER_PEN BIT(29)
> > +/* Interrupt Enable Register - No pen detect */
> > +#define AT91_SAMA5D2_IER_NOPEN BIT(30)
> > /* Interrupt Disable Register */
> > #define AT91_SAMA5D2_IDR 0x28
> > /* Interrupt Mask Register */
> > #define AT91_SAMA5D2_IMR 0x2c
> > /* Interrupt Status Register */
> > #define AT91_SAMA5D2_ISR 0x30
> > +/* Interrupt Status Register - Pen touching sense status */
> > +#define AT91_SAMA5D2_ISR_PENS BIT(31)
> > /* Last Channel Trigger Mode Register */
> > #define AT91_SAMA5D2_LCTMR 0x34
> > /* Last Channel Compare Window Register */
> > @@ -131,8 +143,38 @@
> > #define AT91_SAMA5D2_CDR0 0x50
> > /* Analog Control Register */
> > #define AT91_SAMA5D2_ACR 0x94
> > +/* Analog Control Register - Pen detect sensitivity mask */
> > +#define AT91_SAMA5D2_ACR_PENDETSENS_MASK GENMASK(1, 0)
> > +
> > /* Touchscreen Mode Register */
> > #define AT91_SAMA5D2_TSMR 0xb0
> > +/* Touchscreen Mode Register - No touch mode */
> > +#define AT91_SAMA5D2_TSMR_TSMODE_NONE 0
> > +/* Touchscreen Mode Register - 4 wire screen, no pressure measurement */
> > +#define AT91_SAMA5D2_TSMR_TSMODE_4WIRE_NO_PRESS 1
> > +/* Touchscreen Mode Register - 4 wire screen, pressure measurement */
> > +#define AT91_SAMA5D2_TSMR_TSMODE_4WIRE_PRESS 2
> > +/* Touchscreen Mode Register - 5 wire screen */
> > +#define AT91_SAMA5D2_TSMR_TSMODE_5WIRE 3
> > +/* Touchscreen Mode Register - Average samples mask */
> > +#define AT91_SAMA5D2_TSMR_TSAV_MASK GENMASK(5, 4)
> > +/* Touchscreen Mode Register - Average samples */
> > +#define AT91_SAMA5D2_TSMR_TSAV(x) ((x) << 4)
> > +/* Touchscreen Mode Register - Touch/trigger frequency ratio mask */
> > +#define AT91_SAMA5D2_TSMR_TSFREQ_MASK GENMASK(11, 8)
> > +/* Touchscreen Mode Register - Touch/trigger frequency ratio */
> > +#define AT91_SAMA5D2_TSMR_TSFREQ(x) ((x) << 8)
> > +/* Touchscreen Mode Register - Pen Debounce Time mask */
> > +#define AT91_SAMA5D2_TSMR_PENDBC_MASK GENMASK(31, 28)
> > +/* Touchscreen Mode Register - Pen Debounce Time */
> > +#define AT91_SAMA5D2_TSMR_PENDBC(x) ((x) << 28)
> > +/* Touchscreen Mode Register - No DMA for touch measurements */
> > +#define AT91_SAMA5D2_TSMR_NOTSDMA BIT(22)
> > +/* Touchscreen Mode Register - Disable pen detection */
> > +#define AT91_SAMA5D2_TSMR_PENDET_DIS (0 << 24)
> > +/* Touchscreen Mode Register - Enable pen detection */
> > +#define AT91_SAMA5D2_TSMR_PENDET_ENA BIT(24)
> > +
> > /* Touchscreen X Position Register */
> > #define AT91_SAMA5D2_XPOSR 0xb4
> > /* Touchscreen Y Position Register */
> > @@ -151,6 +193,12 @@
> > #define AT91_SAMA5D2_TRGR_TRGMOD_EXT_TRIG_FALL 2
> > /* Trigger Mode external trigger any edge */
> > #define AT91_SAMA5D2_TRGR_TRGMOD_EXT_TRIG_ANY 3
> > +/* Trigger Mode internal periodic */
> > +#define AT91_SAMA5D2_TRGR_TRGMOD_PERIODIC 5
> > +/* Trigger Mode - trigger period mask */
> > +#define AT91_SAMA5D2_TRGR_TRGPER_MASK GENMASK(31, 16)
> > +/* Trigger Mode - trigger period */
> > +#define AT91_SAMA5D2_TRGR_TRGPER(x) ((x) << 16)
> >
> > /* Correction Select Register */
> > #define AT91_SAMA5D2_COSR 0xd0
> > @@ -169,6 +217,22 @@
> > #define AT91_SAMA5D2_SINGLE_CHAN_CNT 12
> > #define AT91_SAMA5D2_DIFF_CHAN_CNT 6
> >
> > +#define AT91_SAMA5D2_TIMESTAMP_CHAN_IDX (AT91_SAMA5D2_SINGLE_CHAN_CNT + \
> > + AT91_SAMA5D2_DIFF_CHAN_CNT + 1)
> > +
> > +#define AT91_SAMA5D2_TOUCH_X_CHAN_IDX (AT91_SAMA5D2_SINGLE_CHAN_CNT + \
> > + AT91_SAMA5D2_DIFF_CHAN_CNT * 2)
> > +#define AT91_SAMA5D2_TOUCH_Y_CHAN_IDX (AT91_SAMA5D2_TOUCH_X_CHAN_IDX + 1)
> > +#define AT91_SAMA5D2_TOUCH_P_CHAN_IDX (AT91_SAMA5D2_TOUCH_Y_CHAN_IDX + 1)
> > +#define AT91_SAMA5D2_MAX_CHAN_IDX AT91_SAMA5D2_TOUCH_P_CHAN_IDX
> > +
> > +#define AT91_SAMA5D2_TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
> > +#define AT91_SAMA5D2_TOUCH_PEN_DETECT_DEBOUNCE_US 200
> > +
> > +#define AT91_SAMA5D2_XYZ_MASK GENMASK(11, 0)
> > +
> > +#define AT91_SAMA5D2_MAX_POS_BITS 12
> > +
> > /*
> > * Maximum number of bytes to hold conversion from all channels
> > * without the timestamp.
> > @@ -222,6 +286,37 @@
> > .indexed = 1, \
> > }
> >
> > +#define AT91_SAMA5D2_CHAN_TOUCH(num, name, mod) \
> > + { \
> > + .type = IIO_POSITIONRELATIVE, \
> > + .modified = 1, \
> > + .channel = num, \
> > + .channel2 = mod, \
> > + .scan_index = num, \
> > + .scan_type = { \
> > + .sign = 'u', \
> > + .realbits = 12, \
> > + .storagebits = 16, \
> > + }, \
> > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> > + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
> > + .datasheet_name = name, \
> > + }
> > +#define AT91_SAMA5D2_CHAN_PRESSURE(num, name) \
> > + { \
> > + .type = IIO_PRESSURE, \
> > + .channel = num, \
> > + .scan_index = num, \
> > + .scan_type = { \
> > + .sign = 'u', \
> > + .realbits = 12, \
> > + .storagebits = 16, \
> > + }, \
> > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
> > + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\
> > + .datasheet_name = name, \
> > + }
> > +
> > #define at91_adc_readl(st, reg) readl_relaxed(st->base + reg)
> > #define at91_adc_writel(st, reg, val) writel_relaxed(val, st->base + reg)
> >
> > @@ -260,6 +355,22 @@ struct at91_adc_dma {
> > s64 dma_ts;
> > };
> >
> > +/**
> > + * at91_adc_touch - at91-sama5d2 touchscreen information struct
> > + * @sample_period_val: the value for periodic trigger interval
> > + * @touching: is the pen touching the screen or not
> > + * @x_pos: temporary placeholder for pressure computation
> > + * @channels_bitmask: bitmask with the touchscreen channels enabled
> > + * @workq: workqueue for buffer data pushing
> > + */
> > +struct at91_adc_touch {
> > + u16 sample_period_val;
> > + bool touching;
> > + u16 x_pos;
> > + unsigned long channels_bitmask;
> > + struct work_struct workq;
> > +};
> > +
> > struct at91_adc_state {
> > void __iomem *base;
> > int irq;
> > @@ -267,6 +378,7 @@ struct at91_adc_state {
> > struct regulator *reg;
> > struct regulator *vref;
> > int vref_uv;
> > + unsigned int current_sample_rate;
> > struct iio_trigger *trig;
> > const struct at91_adc_trigger *selected_trig;
> > const struct iio_chan_spec *chan;
> > @@ -275,6 +387,7 @@ struct at91_adc_state {
> > struct at91_adc_soc_info soc_info;
> > wait_queue_head_t wq_data_available;
> > struct at91_adc_dma dma_st;
> > + struct at91_adc_touch touch_st;
> > u16 buffer[AT91_BUFFER_MAX_HWORDS];
> > /*
> > * lock to prevent concurrent 'single conversion' requests through
> > @@ -329,8 +442,10 @@ static const struct iio_chan_spec at91_adc_channels[] = {
> > AT91_SAMA5D2_CHAN_DIFF(6, 7, 0x68),
> > AT91_SAMA5D2_CHAN_DIFF(8, 9, 0x70),
> > AT91_SAMA5D2_CHAN_DIFF(10, 11, 0x78),
> > - IIO_CHAN_SOFT_TIMESTAMP(AT91_SAMA5D2_SINGLE_CHAN_CNT
> > - + AT91_SAMA5D2_DIFF_CHAN_CNT + 1),
> > + IIO_CHAN_SOFT_TIMESTAMP(AT91_SAMA5D2_TIMESTAMP_CHAN_IDX),
> > + AT91_SAMA5D2_CHAN_TOUCH(AT91_SAMA5D2_TOUCH_X_CHAN_IDX, "x", IIO_MOD_X),
> > + AT91_SAMA5D2_CHAN_TOUCH(AT91_SAMA5D2_TOUCH_Y_CHAN_IDX, "y", IIO_MOD_Y),
> > + AT91_SAMA5D2_CHAN_PRESSURE(AT91_SAMA5D2_TOUCH_P_CHAN_IDX, "pressure"),
> > };
> >
> > static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan)
> > @@ -354,6 +469,160 @@ at91_adc_chan_get(struct iio_dev *indio_dev, int chan)
> > return indio_dev->channels + index;
> > }
> >
> > +static inline int at91_adc_of_xlate(struct iio_dev *indio_dev,
> > + const struct of_phandle_args *iiospec)
> > +{
> > + return at91_adc_chan_xlate(indio_dev, iiospec->args[0]);
> > +}
> > +
> > +static int at91_adc_configure_touch(struct at91_adc_state *st, bool state)
> > +{
> > + u32 clk_khz = st->current_sample_rate / 1000;
> > + int i = 0;
> > + u16 pendbc;
> > + u32 tsmr, acr;
> > +
> > + if (!state) {
> > + /* disabling touch IRQs and setting mode to no touch enabled */
> > + at91_adc_writel(st, AT91_SAMA5D2_IDR,
> > + AT91_SAMA5D2_IER_PEN | AT91_SAMA5D2_IER_NOPEN);
> > + at91_adc_writel(st, AT91_SAMA5D2_TSMR, 0);
> > + return 0;
> > + }
> > + /*
> > + * debounce time is in microseconds, we need it in milliseconds to
> > + * multiply with kilohertz, so, divide by 1000, but after the multiply.
> > + * round up to make sure pendbc is at least 1
> > + */
> > + pendbc = round_up(AT91_SAMA5D2_TOUCH_PEN_DETECT_DEBOUNCE_US *
> > + clk_khz / 1000, 1);
> > +
> > + /* get the required exponent */
> > + while (pendbc >> i++)
> > + ;
> > +
> > + pendbc = i;
> > +
> > + tsmr = AT91_SAMA5D2_TSMR_TSMODE_4WIRE_PRESS;
> > +
> > + tsmr |= AT91_SAMA5D2_TSMR_TSAV(2) & AT91_SAMA5D2_TSMR_TSAV_MASK;
> > + tsmr |= AT91_SAMA5D2_TSMR_PENDBC(pendbc) &
> > + AT91_SAMA5D2_TSMR_PENDBC_MASK;
> > + tsmr |= AT91_SAMA5D2_TSMR_NOTSDMA;
> > + tsmr |= AT91_SAMA5D2_TSMR_PENDET_ENA;
> > + tsmr |= AT91_SAMA5D2_TSMR_TSFREQ(2) & AT91_SAMA5D2_TSMR_TSFREQ_MASK;
> > +
> > + at91_adc_writel(st, AT91_SAMA5D2_TSMR, tsmr);
> > +
> > + acr = at91_adc_readl(st, AT91_SAMA5D2_ACR);
> > + acr &= ~AT91_SAMA5D2_ACR_PENDETSENS_MASK;
> > + acr |= 0x02 & AT91_SAMA5D2_ACR_PENDETSENS_MASK;
> > + at91_adc_writel(st, AT91_SAMA5D2_ACR, acr);
> > +
> > + /* Sample Period Time = (TRGPER + 1) / ADCClock */
> > + st->touch_st.sample_period_val =
> > + round_up((AT91_SAMA5D2_TOUCH_SAMPLE_PERIOD_US *
> > + clk_khz / 1000) - 1, 1);
> > + /* enable pen detect IRQ */
> > + at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN);
> > +
> > + return 0;
> > +}
> > +
> > +static u16 at91_adc_touch_pos(struct at91_adc_state *st, int reg)
> > +{
> > + u32 val;
> > + u32 scale, result, pos;
> > +
> > + /*
> > + * to obtain the actual position we must divide by scale
> > + * and multiply with max, where
> > + * max = 2^AT91_SAMA5D2_MAX_POS_BITS - 1
> > + */
> > + /* first half of register is the x or y, second half is the scale */
> > + val = at91_adc_readl(st, reg);
> > + if (!val)
> > + dev_dbg(&iio_priv_to_dev(st)->dev, "pos is 0\n");
> > +
> > + pos = val & AT91_SAMA5D2_XYZ_MASK;
> > + result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos;
> > + scale = (val >> 16) & AT91_SAMA5D2_XYZ_MASK;
> > + if (scale == 0) {
> > + dev_err(&iio_priv_to_dev(st)->dev, "scale is 0\n");
> > + return 0;
> > + }
> > + result /= scale;
> > +
> > + return result;
> > +}
> > +
> > +static u16 at91_adc_touch_x_pos(struct at91_adc_state *st)
> > +{
> > + st->touch_st.x_pos = at91_adc_touch_pos(st, AT91_SAMA5D2_XPOSR);
> > + return st->touch_st.x_pos;
> > +}
> > +
> > +static u16 at91_adc_touch_y_pos(struct at91_adc_state *st)
> > +{
> > + return at91_adc_touch_pos(st, AT91_SAMA5D2_YPOSR);
> > +}
> > +
> > +static u16 at91_adc_touch_pressure(struct at91_adc_state *st)
> > +{
> > + u32 val;
> > + u32 z1, z2;
> > + u32 pres;
> > + u32 rxp = 1;
> > + u32 factor = 1000;
> > +
> > + /* calculate the pressure */
> > + val = at91_adc_readl(st, AT91_SAMA5D2_PRESSR);
> > + z1 = val & AT91_SAMA5D2_XYZ_MASK;
> > + z2 = (val >> 16) & AT91_SAMA5D2_XYZ_MASK;
> > +
> > + if (z1 != 0)
> > + pres = rxp * (st->touch_st.x_pos * factor / 1024) *
> > + (z2 * factor / z1 - factor) /
> > + factor;
> > + else
> > + pres = 0xFFFF; /* no pen contact */
> > +
> > + /*
> > + * The pressure from device grows down, minimum is 0xFFFF, maximum 0x0.
> > + * We compute it this way, but let's return it in the expected way,
> > + * growing from 0 to 0xFFFF.
> > + */
> > + return 0xFFFF - pres;
> > +}
> > +
> > +static int at91_adc_read_position(struct at91_adc_state *st, int chan, u16 *val)
> > +{
> > + *val = 0;
> > + if (!st->touch_st.touching)
> > + return -ENODATA;
> > + if (chan == AT91_SAMA5D2_TOUCH_X_CHAN_IDX)
> > + *val = at91_adc_touch_x_pos(st);
> > + else if (chan == AT91_SAMA5D2_TOUCH_Y_CHAN_IDX)
> > + *val = at91_adc_touch_y_pos(st);
> > + else
> > + return -ENODATA;
> > +
> > + return IIO_VAL_INT;
> > +}
> > +
> > +static int at91_adc_read_pressure(struct at91_adc_state *st, int chan, u16 *val)
> > +{
> > + *val = 0;
> > + if (!st->touch_st.touching)
> > + return -ENODATA;
> > + if (chan == AT91_SAMA5D2_TOUCH_P_CHAN_IDX)
> > + *val = at91_adc_touch_pressure(st);
> > + else
> > + return -ENODATA;
> > +
> > + return IIO_VAL_INT;
> > +}
> > +
> > static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
> > {
> > struct iio_dev *indio = iio_trigger_get_drvdata(trig);
> > @@ -375,6 +644,11 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
> >
> > if (!chan)
> > continue;
> > + /* these channel types cannot be handled by this trigger */
> > + if (chan->type == IIO_POSITIONRELATIVE ||
> > + chan->type == IIO_PRESSURE)
> > + continue;
> > +
> > if (state) {
> > at91_adc_writel(st, AT91_SAMA5D2_CHER,
> > BIT(chan->channel));
> > @@ -520,7 +794,20 @@ static int at91_adc_dma_start(struct iio_dev *indio_dev)
> > static int at91_adc_buffer_postenable(struct iio_dev *indio_dev)
> > {
> > int ret;
> > + struct at91_adc_state *st = iio_priv(indio_dev);
> >
> > + /* check if we are enabling triggered buffer or the touchscreen */
> > + if (bitmap_subset(indio_dev->active_scan_mask,
> > + &st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
> > + /* touchscreen enabling */
> > + return at91_adc_configure_touch(st, true);
> > + }
> > + /* if we are not in triggered mode, we cannot enable the buffer. */
> > + if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES))
> > + return -EINVAL;
> > +
> > + /* we continue with the triggered buffer */
> > ret = at91_adc_dma_start(indio_dev);
> > if (ret) {
> > dev_err(&indio_dev->dev, "buffer postenable failed\n");
> > @@ -536,6 +823,18 @@ static int at91_adc_buffer_predisable(struct iio_dev *indio_dev)
> > int ret;
> > u8 bit;
> >
> > + /* check if we are disabling triggered buffer or the touchscreen */
> > + if (bitmap_subset(indio_dev->active_scan_mask,
> > + &st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
> > + /* touchscreen disable */
> > + return at91_adc_configure_touch(st, false);
> > + }
> > + /* if we are not in triggered mode, nothing to do here */
> > + if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES))
> > + return -EINVAL;
> > +
> > + /* continue with the triggered buffer */
> > ret = iio_triggered_buffer_predisable(indio_dev);
> > if (ret < 0)
> > dev_err(&indio_dev->dev, "buffer predisable failed\n");
> > @@ -558,6 +857,10 @@ static int at91_adc_buffer_predisable(struct iio_dev *indio_dev)
> >
> > if (!chan)
> > continue;
> > + /* these channel types are virtual, no need to do anything */
> > + if (chan->type == IIO_POSITIONRELATIVE ||
> > + chan->type == IIO_PRESSURE)
> > + continue;
> > if (st->dma_st.dma_chan)
> > at91_adc_readl(st, chan->address);
> > }
> > @@ -622,7 +925,22 @@ static void at91_adc_trigger_handler_nodma(struct iio_dev *indio_dev,
> >
> > if (!chan)
> > continue;
> > - st->buffer[i] = at91_adc_readl(st, chan->address);
> > + /*
> > + * Our external trigger only supports the voltage channels.
> > + * In case someone requested a different type of channel
> > + * just put zeroes to buffer.
> > + * This should not happen because we check the scan mode
> > + * and scan mask when we enable the buffer, and we don't allow
> > + * the buffer to start with a mixed mask (voltage and something
> > + * else).
> > + * Thus, emit a warning.
> > + */
> > + if (chan->type == IIO_VOLTAGE) {
> > + st->buffer[i] = at91_adc_readl(st, chan->address);
> > + } else {
> > + st->buffer[i] = 0;
> > + WARN(true, "This trigger cannot handle this type of channel");
> > + }
> > i++;
> > }
> > iio_push_to_buffers_with_timestamp(indio_dev, st->buffer,
> > @@ -688,9 +1006,20 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
> >
> > static int at91_adc_buffer_init(struct iio_dev *indio)
> > {
> > - return devm_iio_triggered_buffer_setup(&indio->dev, indio,
> > + struct at91_adc_state *st = iio_priv(indio);
> > +
> > + if (st->selected_trig->hw_trig) {
> > + return devm_iio_triggered_buffer_setup(&indio->dev, indio,
> > &iio_pollfunc_store_time,
> > &at91_adc_trigger_handler, &at91_buffer_setup_ops);
> > + }
> > + /*
> > + * we need to prepare the buffer ops in case we will get
> > + * another buffer attached (like a callback buffer for the touchscreen)
> > + */
> > + indio->setup_ops = &at91_buffer_setup_ops;
> > +
> > + return 0;
> > }
> >
> > static unsigned at91_adc_startup_time(unsigned startup_time_min,
> > @@ -736,19 +1065,83 @@ static void at91_adc_setup_samp_freq(struct at91_adc_state *st, unsigned freq)
> >
> > dev_dbg(&indio_dev->dev, "freq: %u, startup: %u, prescal: %u\n",
> > freq, startup, prescal);
> > + st->current_sample_rate = freq;
> > }
> >
> > -static unsigned at91_adc_get_sample_freq(struct at91_adc_state *st)
> > +static inline unsigned at91_adc_get_sample_freq(struct at91_adc_state *st)
> > {
> > - unsigned f_adc, f_per = clk_get_rate(st->per_clk);
> > - unsigned mr, prescal;
> > + return st->current_sample_rate;
> > +}
> >
> > - mr = at91_adc_readl(st, AT91_SAMA5D2_MR);
> > - prescal = (mr >> AT91_SAMA5D2_MR_PRESCAL_OFFSET)
> > - & AT91_SAMA5D2_MR_PRESCAL_MAX;
> > - f_adc = f_per / (2 * (prescal + 1));
> > +static void at91_adc_touch_data_handler(struct iio_dev *indio_dev)
> > +{
> > + struct at91_adc_state *st = iio_priv(indio_dev);
> > + u8 bit;
> > + u16 val;
> > + int i = 0;
> >
> > - return f_adc;
> > + for_each_set_bit(bit, indio_dev->active_scan_mask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1) {
> > + struct iio_chan_spec const *chan =
> > + at91_adc_chan_get(indio_dev, bit);
> > +
> > + if (chan->type == IIO_POSITIONRELATIVE)
> > + at91_adc_read_position(st, chan->channel, &val);
> > + else if (chan->type == IIO_PRESSURE)
> > + at91_adc_read_pressure(st, chan->channel, &val);
> > + else
> > + continue;
> > + st->buffer[i] = val;
> > + i++;
> > + }
> > + /*
> > + * Schedule work to push to buffers.
> > + * This is intended to push to the callback buffer that another driver
> > + * registered. We are still in a handler from our IRQ. If we push
> > + * directly, it means the other driver has it's callback called
> > + * from our IRQ context. Which is something we better avoid.
> > + * Let's schedule it after our IRQ is completed.
> > + */
> > + schedule_work(&st->touch_st.workq);
> > +}
> > +
> > +static void at91_adc_pen_detect_interrupt(struct at91_adc_state *st)
> > +{
> > + at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_PEN);
> > + at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_NOPEN |
> > + AT91_SAMA5D2_IER_XRDY | AT91_SAMA5D2_IER_YRDY |
> > + AT91_SAMA5D2_IER_PRDY);
> > + at91_adc_writel(st, AT91_SAMA5D2_TRGR,
> > + AT91_SAMA5D2_TRGR_TRGMOD_PERIODIC |
> > + AT91_SAMA5D2_TRGR_TRGPER(st->touch_st.sample_period_val));
> > + st->touch_st.touching = true;
> > +}
> > +
> > +static void at91_adc_no_pen_detect_interrupt(struct at91_adc_state *st)
> > +{
> > + struct iio_dev *indio_dev = iio_priv_to_dev(st);
> > +
> > + at91_adc_writel(st, AT91_SAMA5D2_TRGR,
> > + AT91_SAMA5D2_TRGR_TRGMOD_NO_TRIGGER);
> > + at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_NOPEN |
> > + AT91_SAMA5D2_IER_XRDY | AT91_SAMA5D2_IER_YRDY |
> > + AT91_SAMA5D2_IER_PRDY);
> > + st->touch_st.touching = false;
> > +
> > + at91_adc_touch_data_handler(indio_dev);
> > +
> > + at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_PEN);
> > +}
> > +
> > +static void at91_adc_workq_handler(struct work_struct *workq)
> > +{
> > + struct at91_adc_touch *touch_st = container_of(workq,
> > + struct at91_adc_touch, workq);
> > + struct at91_adc_state *st = container_of(touch_st,
> > + struct at91_adc_state, touch_st);
> > + struct iio_dev *indio_dev = iio_priv_to_dev(st);
> > +
> > + iio_push_to_buffers(indio_dev, st->buffer);
> > }
> >
> > static irqreturn_t at91_adc_interrupt(int irq, void *private)
> > @@ -757,17 +1150,39 @@ static irqreturn_t at91_adc_interrupt(int irq, void *private)
> > struct at91_adc_state *st = iio_priv(indio);
> > u32 status = at91_adc_readl(st, AT91_SAMA5D2_ISR);
> > u32 imr = at91_adc_readl(st, AT91_SAMA5D2_IMR);
> > + u32 rdy_mask = AT91_SAMA5D2_IER_XRDY | AT91_SAMA5D2_IER_YRDY |
> > + AT91_SAMA5D2_IER_PRDY;
> >
> > if (!(status & imr))
> > return IRQ_NONE;
> > -
> > - if (iio_buffer_enabled(indio) && !st->dma_st.dma_chan) {
> > + if (status & AT91_SAMA5D2_IER_PEN) {
> > + /* pen detected IRQ */
> > + at91_adc_pen_detect_interrupt(st);
> > + } else if ((status & AT91_SAMA5D2_IER_NOPEN)) {
> > + /* nopen detected IRQ */
> > + at91_adc_no_pen_detect_interrupt(st);
> > + } else if ((status & AT91_SAMA5D2_ISR_PENS) &&
> > + ((status & rdy_mask) == rdy_mask)) {
> > + /* periodic trigger IRQ - during pen sense */
> > + at91_adc_touch_data_handler(indio);
> > + } else if (status & AT91_SAMA5D2_ISR_PENS) {
> > + /*
> > + * touching, but the measurements are not ready yet.
> > + * read and ignore.
> > + */
> > + status = at91_adc_readl(st, AT91_SAMA5D2_XPOSR);
> > + status = at91_adc_readl(st, AT91_SAMA5D2_YPOSR);
> > + status = at91_adc_readl(st, AT91_SAMA5D2_PRESSR);
> > + } else if (iio_buffer_enabled(indio) && !st->dma_st.dma_chan) {
> > + /* triggered buffer without DMA */
> > disable_irq_nosync(irq);
> > iio_trigger_poll(indio->trig);
> > } else if (iio_buffer_enabled(indio) && st->dma_st.dma_chan) {
> > + /* triggered buffer with DMA - should not happen */
> > disable_irq_nosync(irq);
> > WARN(true, "Unexpected irq occurred\n");
> > } else if (!iio_buffer_enabled(indio)) {
> > + /* software requested conversion */
> > st->conversion_value = at91_adc_readl(st, st->chan->address);
> > st->conversion_done = true;
> > wake_up_interruptible(&st->wq_data_available);
> > @@ -775,58 +1190,97 @@ static irqreturn_t at91_adc_interrupt(int irq, void *private)
> > return IRQ_HANDLED;
> > }
> >
> > -static int at91_adc_read_raw(struct iio_dev *indio_dev,
> > - struct iio_chan_spec const *chan,
> > - int *val, int *val2, long mask)
> > +static int at91_adc_read_info_raw(struct iio_dev *indio_dev,
> > + struct iio_chan_spec const *chan, int *val)
> > {
> > struct at91_adc_state *st = iio_priv(indio_dev);
> > u32 cor = 0;
> > int ret;
> >
> > - switch (mask) {
> > - case IIO_CHAN_INFO_RAW:
> > - /* we cannot use software trigger if hw trigger enabled */
> > + /*
> > + * Keep in mind that we cannot use software trigger or touchscreen
> > + * if external trigger is enabled
> > + */
> > + if (chan->type == IIO_POSITIONRELATIVE) {
> > ret = iio_device_claim_direct_mode(indio_dev);
> > if (ret)
> > return ret;
> > mutex_lock(&st->lock);
> >
> > - st->chan = chan;
> > + ret = at91_adc_read_position(st, chan->channel,
> > + (u16 *)val);
> > + mutex_unlock(&st->lock);
> > + iio_device_release_direct_mode(indio_dev);
> >
> > - if (chan->differential)
> > - cor = (BIT(chan->channel) | BIT(chan->channel2)) <<
> > - AT91_SAMA5D2_COR_DIFF_OFFSET;
> > -
> > - at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
> > - at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));
> > - at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel));
> > - at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);
> > -
> > - ret = wait_event_interruptible_timeout(st->wq_data_available,
> > - st->conversion_done,
> > - msecs_to_jiffies(1000));
> > - if (ret == 0)
> > - ret = -ETIMEDOUT;
> > -
> > - if (ret > 0) {
> > - *val = st->conversion_value;
> > - if (chan->scan_type.sign == 's')
> > - *val = sign_extend32(*val, 11);
> > - ret = IIO_VAL_INT;
> > - st->conversion_done = false;
> > - }
> > + return ret;
> > + }
> > + if (chan->type == IIO_PRESSURE) {
> > + ret = iio_device_claim_direct_mode(indio_dev);
> > + if (ret)
> > + return ret;
> > + mutex_lock(&st->lock);
> >
> > - at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel));
> > - at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel));
> > + ret = at91_adc_read_pressure(st, chan->channel,
> > + (u16 *)val);
> > + mutex_unlock(&st->lock);
> > + iio_device_release_direct_mode(indio_dev);
> >
> > - /* Needed to ACK the DRDY interruption */
> > - at91_adc_readl(st, AT91_SAMA5D2_LCDR);
> > + return ret;
> > + }
> >
> > - mutex_unlock(&st->lock);
> > + /* in this case we have a voltage channel */
> >
> > - iio_device_release_direct_mode(indio_dev);
> > + ret = iio_device_claim_direct_mode(indio_dev);
> > + if (ret)
> > return ret;
> > + mutex_lock(&st->lock);
> > +
> > + st->chan = chan;
> > +
> > + if (chan->differential)
> > + cor = (BIT(chan->channel) | BIT(chan->channel2)) <<
> > + AT91_SAMA5D2_COR_DIFF_OFFSET;
> > +
> > + at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
> > + at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));
> > + at91_adc_writel(st, AT91_SAMA5D2_IER, BIT(chan->channel));
> > + at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);
> > +
> > + ret = wait_event_interruptible_timeout(st->wq_data_available,
> > + st->conversion_done,
> > + msecs_to_jiffies(1000));
> > + if (ret == 0)
> > + ret = -ETIMEDOUT;
> > +
> > + if (ret > 0) {
> > + *val = st->conversion_value;
> > + if (chan->scan_type.sign == 's')
> > + *val = sign_extend32(*val, 11);
> > + ret = IIO_VAL_INT;
> > + st->conversion_done = false;
> > + }
> > +
> > + at91_adc_writel(st, AT91_SAMA5D2_IDR, BIT(chan->channel));
> > + at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel));
> > +
> > + /* Needed to ACK the DRDY interruption */
> > + at91_adc_readl(st, AT91_SAMA5D2_LCDR);
> > +
> > + mutex_unlock(&st->lock);
> > +
> > + iio_device_release_direct_mode(indio_dev);
> > + return ret;
> > +}
> > +
> > +static int at91_adc_read_raw(struct iio_dev *indio_dev,
> > + struct iio_chan_spec const *chan,
> > + int *val, int *val2, long mask)
> > +{
> > + struct at91_adc_state *st = iio_priv(indio_dev);
> >
> > + switch (mask) {
> > + case IIO_CHAN_INFO_RAW:
> > + return at91_adc_read_info_raw(indio_dev, chan, val);
> > case IIO_CHAN_INFO_SCALE:
> > *val = st->vref_uv / 1000;
> > if (chan->differential)
> > @@ -974,9 +1428,29 @@ static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val)
> > return 0;
> > }
> >
> > +static int at91_adc_update_scan_mode(struct iio_dev *indio_dev,
> > + const unsigned long *scan_mask)
> > +{
> > + struct at91_adc_state *st = iio_priv(indio_dev);
> > +
> > + if (bitmap_subset(scan_mask, &st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1))
> > + return 0;
> > + /*
> > + * if the new bitmap is a combination of touchscreen and regular
> > + * channels, then we are not fine
> > + */
> > + if (bitmap_intersects(&st->touch_st.channels_bitmask, scan_mask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1))
> > + return -EINVAL;
> > + return 0;
> > +}
> > +
> > static const struct iio_info at91_adc_info = {
> > .read_raw = &at91_adc_read_raw,
> > .write_raw = &at91_adc_write_raw,
> > + .update_scan_mode = &at91_adc_update_scan_mode,
> > + .of_xlate = &at91_adc_of_xlate,
> > .hwfifo_set_watermark = &at91_adc_set_watermark,
> > };
> >
> > @@ -1044,13 +1518,20 @@ static int at91_adc_probe(struct platform_device *pdev)
> >
> > indio_dev->dev.parent = &pdev->dev;
> > indio_dev->name = dev_name(&pdev->dev);
> > - indio_dev->modes = INDIO_DIRECT_MODE;
> > + indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
> > indio_dev->info = &at91_adc_info;
> > indio_dev->channels = at91_adc_channels;
> > indio_dev->num_channels = ARRAY_SIZE(at91_adc_channels);
> >
> > st = iio_priv(indio_dev);
> >
> > + bitmap_set(&st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_TOUCH_X_CHAN_IDX, 1);
> > + bitmap_set(&st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_TOUCH_Y_CHAN_IDX, 1);
> > + bitmap_set(&st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_TOUCH_P_CHAN_IDX, 1);
> > +
> > ret = of_property_read_u32(pdev->dev.of_node,
> > "atmel,min-sample-rate-hz",
> > &st->soc_info.min_sample_rate);
> > @@ -1100,6 +1581,7 @@ static int at91_adc_probe(struct platform_device *pdev)
> >
> > init_waitqueue_head(&st->wq_data_available);
> > mutex_init(&st->lock);
> > + INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler);
> >
> > res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > if (!res)
> > @@ -1159,13 +1641,13 @@ static int at91_adc_probe(struct platform_device *pdev)
> >
> > platform_set_drvdata(pdev, indio_dev);
> >
> > - if (st->selected_trig->hw_trig) {
> > - ret = at91_adc_buffer_init(indio_dev);
> > - if (ret < 0) {
> > - dev_err(&pdev->dev, "couldn't initialize the buffer.\n");
> > - goto per_clk_disable_unprepare;
> > - }
> > + ret = at91_adc_buffer_init(indio_dev);
> > + if (ret < 0) {
> > + dev_err(&pdev->dev, "couldn't initialize the buffer.\n");
> > + goto per_clk_disable_unprepare;
> > + }
> >
> > + if (st->selected_trig->hw_trig) {
> > ret = at91_adc_trigger_init(indio_dev);
> > if (ret < 0) {
> > dev_err(&pdev->dev, "couldn't setup the triggers.\n");
> > @@ -1272,9 +1754,20 @@ static __maybe_unused int at91_adc_resume(struct device *dev)
> > at91_adc_hw_init(st);
> >
> > /* reconfiguring trigger hardware state */
> > - if (iio_buffer_enabled(indio_dev))
> > - at91_adc_configure_trigger(st->trig, true);
> > + if (!iio_buffer_enabled(indio_dev))
> > + return 0;
> > +
> > + /* check if we are enabling triggered buffer or the touchscreen */
> > + if (bitmap_subset(indio_dev->active_scan_mask,
> > + &st->touch_st.channels_bitmask,
> > + AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
> > + /* touchscreen enabling */
> > + return at91_adc_configure_touch(st, true);
> > + } else {
> > + return at91_adc_configure_trigger(st->trig, true);
> > + }
> >
> > + /* not needed but more explicit */
> > return 0;
> >
> > vref_disable_resume:
> > --
> > 2.7.4
> >
^ permalink raw reply
* [PATCH v7 6/9] input: touchscreen: resistive-adc-touch: add generic resistive ADC touchscreen
From: Jonathan Cameron @ 2018-06-10 12:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-7-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:36 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> This adds a generic resistive touchscreen (GRTS) driver, which is based
> on an IIO device (an ADC). It must be connected to the channels of an ADC
> to receive touch data. Then it will feed the data into the input subsystem
> where it registers an input device.
> It uses an IIO callback buffer to register to the IIO device
>
> Some parts of this patch are based on initial original work by
> Mohamed Jamsheeth Hajanajubudeen and Bandaru Venkateswara Swamy
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.
Thanks,
Jonathan
> ---
> Changes in v7:
> - cosmetic fixes as suggested by Dmitry: moved min pressure
> property lookup below and only if pressure channel is available.
> used the error variable in probe at some point, removed it at
> different point.
>
> Changes in v6:
> - changed a dev_err to dev_dbg which was forgotten in v5.
>
> Changes in v5:
> - return error on probe if failed add_action_or_reset
> - renamed property touchscreen-threshold-pressure to
> touchscreen-min-pressure, changed variables accordingly
>
> Changes in v4:
> - added a small description in file header
> - changed MAX_POS_MASK to GRTS_MAX_POS_MASK
> - initialized press with 0, as this value means no touch.
> press has to be initialized because compiler/checkpatch complains
> that can be used uninitialized.
> - changed of_property_read_u32 to device_*
> - set_abs_params for pressure will have range according to threshold
> - changed evbit and keybit with set_capability call
> - changed variable names to error instead of ret
> - checked errors for add_action_or_reset
> - cosmetic cleaning
>
> Changes in v3:
> - pressure now reported naturally growing down-up
> - using helpers from touchscreen.h to parse DT properties
> - added devm_add_action_or_reset to handle callback buffer clean on exit
> - changed compatible and threshold property to adapt to changed bindings
>
> Changes in v2:
> - this is now a generic resistive adc touchscreen driver
>
> drivers/input/touchscreen/Kconfig | 13 ++
> drivers/input/touchscreen/Makefile | 1 +
> drivers/input/touchscreen/resistive-adc-touch.c | 204 ++++++++++++++++++++++++
> 3 files changed, 218 insertions(+)
> create mode 100644 drivers/input/touchscreen/resistive-adc-touch.c
>
> diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
> index 4f15496..8f85d3a 100644
> --- a/drivers/input/touchscreen/Kconfig
> +++ b/drivers/input/touchscreen/Kconfig
> @@ -92,6 +92,19 @@ config TOUCHSCREEN_AD7879_SPI
> To compile this driver as a module, choose M here: the
> module will be called ad7879-spi.
>
> +config TOUCHSCREEN_ADC
> + tristate "Generic ADC based resistive touchscreen"
> + depends on IIO
> + select IIO_BUFFER_CB
> + help
> + Say Y here if you want to use the generic ADC
> + resistive touchscreen driver.
> +
> + If unsure, say N (but it's safe to say "Y").
> +
> + To compile this driver as a module, choose M here: the
> + module will be called resistive-adc-touch.ko.
> +
> config TOUCHSCREEN_AR1021_I2C
> tristate "Microchip AR1020/1021 i2c touchscreen"
> depends on I2C && OF
> diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
> index dddae79..843c7f9 100644
> --- a/drivers/input/touchscreen/Makefile
> +++ b/drivers/input/touchscreen/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_TOUCHSCREEN_AD7877) += ad7877.o
> obj-$(CONFIG_TOUCHSCREEN_AD7879) += ad7879.o
> obj-$(CONFIG_TOUCHSCREEN_AD7879_I2C) += ad7879-i2c.o
> obj-$(CONFIG_TOUCHSCREEN_AD7879_SPI) += ad7879-spi.o
> +obj-$(CONFIG_TOUCHSCREEN_ADC) += resistive-adc-touch.o
> obj-$(CONFIG_TOUCHSCREEN_ADS7846) += ads7846.o
> obj-$(CONFIG_TOUCHSCREEN_AR1021_I2C) += ar1021_i2c.o
> obj-$(CONFIG_TOUCHSCREEN_ATMEL_MXT) += atmel_mxt_ts.o
> diff --git a/drivers/input/touchscreen/resistive-adc-touch.c b/drivers/input/touchscreen/resistive-adc-touch.c
> new file mode 100644
> index 0000000..cfc8bb4
> --- /dev/null
> +++ b/drivers/input/touchscreen/resistive-adc-touch.c
> @@ -0,0 +1,204 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * ADC generic resistive touchscreen (GRTS)
> + * This is a generic input driver that connects to an ADC
> + * given the channels in device tree, and reports events to the input
> + * subsystem.
> + *
> + * Copyright (C) 2017,2018 Microchip Technology,
> + * Author: Eugen Hristev <eugen.hristev@microchip.com>
> + *
> + */
> +#include <linux/input.h>
> +#include <linux/input/touchscreen.h>
> +#include <linux/iio/consumer.h>
> +#include <linux/iio/iio.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +
> +#define DRIVER_NAME "resistive-adc-touch"
> +#define GRTS_DEFAULT_PRESSURE_MIN 50000
> +#define GRTS_MAX_POS_MASK GENMASK(11, 0)
> +
> +/**
> + * grts_state - generic resistive touch screen information struct
> + * @pressure_min: number representing the minimum for the pressure
> + * @pressure: are we getting pressure info or not
> + * @iio_chans: list of channels acquired
> + * @iio_cb: iio_callback buffer for the data
> + * @input: the input device structure that we register
> + * @prop: touchscreen properties struct
> + */
> +struct grts_state {
> + u32 pressure_min;
> + bool pressure;
> + struct iio_channel *iio_chans;
> + struct iio_cb_buffer *iio_cb;
> + struct input_dev *input;
> + struct touchscreen_properties prop;
> +};
> +
> +static int grts_cb(const void *data, void *private)
> +{
> + const u16 *touch_info = data;
> + struct grts_state *st = private;
> + unsigned int x, y, press = 0x0;
> +
> + /* channel data coming in buffer in the order below */
> + x = touch_info[0];
> + y = touch_info[1];
> + if (st->pressure)
> + press = touch_info[2];
> +
> + if ((!x && !y) || (st->pressure && (press < st->pressure_min))) {
> + /* report end of touch */
> + input_report_key(st->input, BTN_TOUCH, 0);
> + input_sync(st->input);
> + return 0;
> + }
> +
> + /* report proper touch to subsystem*/
> + touchscreen_report_pos(st->input, &st->prop, x, y, false);
> + if (st->pressure)
> + input_report_abs(st->input, ABS_PRESSURE, press);
> + input_report_key(st->input, BTN_TOUCH, 1);
> + input_sync(st->input);
> +
> + return 0;
> +}
> +
> +static int grts_open(struct input_dev *dev)
> +{
> + int error;
> + struct grts_state *st = input_get_drvdata(dev);
> +
> + error = iio_channel_start_all_cb(st->iio_cb);
> + if (error) {
> + dev_err(dev->dev.parent, "failed to start callback buffer.\n");
> + return error;
> + }
> + return 0;
> +}
> +
> +static void grts_close(struct input_dev *dev)
> +{
> + struct grts_state *st = input_get_drvdata(dev);
> +
> + iio_channel_stop_all_cb(st->iio_cb);
> +}
> +
> +static void grts_disable(void *data)
> +{
> + iio_channel_release_all_cb(data);
> +}
> +
> +static int grts_probe(struct platform_device *pdev)
> +{
> + struct grts_state *st;
> + struct input_dev *input;
> + struct device *dev = &pdev->dev;
> + struct iio_channel *chan;
> + int error;
> +
> + st = devm_kzalloc(dev, sizeof(struct grts_state), GFP_KERNEL);
> + if (!st)
> + return -ENOMEM;
> +
> + /* get the channels from IIO device */
> + st->iio_chans = devm_iio_channel_get_all(dev);
> + if (IS_ERR(st->iio_chans)) {
> + error = PTR_ERR(st->iio_chans);
> + if (error != -EPROBE_DEFER)
> + dev_err(dev, "can't get iio channels.\n");
> + return error;
> + }
> +
> + chan = &st->iio_chans[0];
> + st->pressure = false;
> + while (chan && chan->indio_dev) {
> + if (!strcmp(chan->channel->datasheet_name, "pressure"))
> + st->pressure = true;
> + chan++;
> + }
> +
> + if (st->pressure) {
> + error = device_property_read_u32(dev,
> + "touchscreen-min-pressure",
> + &st->pressure_min);
> + if (error) {
> + dev_dbg(dev, "can't get touchscreen-min-pressure property.\n");
> + st->pressure_min = GRTS_DEFAULT_PRESSURE_MIN;
> + }
> + }
> +
> + input = devm_input_allocate_device(dev);
> + if (!input) {
> + dev_err(dev, "failed to allocate input device.\n");
> + return -ENOMEM;
> + }
> +
> + input->name = DRIVER_NAME;
> + input->id.bustype = BUS_HOST;
> + input->open = grts_open;
> + input->close = grts_close;
> +
> + input_set_abs_params(input, ABS_X, 0, GRTS_MAX_POS_MASK - 1, 0, 0);
> + input_set_abs_params(input, ABS_Y, 0, GRTS_MAX_POS_MASK - 1, 0, 0);
> + if (st->pressure)
> + input_set_abs_params(input, ABS_PRESSURE, st->pressure_min,
> + 0xffff, 0, 0);
> +
> + input_set_capability(input, EV_KEY, BTN_TOUCH);
> +
> + /* parse optional device tree properties */
> + touchscreen_parse_properties(input, false, &st->prop);
> +
> + st->input = input;
> + input_set_drvdata(input, st);
> +
> + error = input_register_device(input);
> + if (error) {
> + dev_err(dev, "failed to register input device.");
> + return error;
> + }
> +
> + st->iio_cb = iio_channel_get_all_cb(dev, grts_cb, st);
> + if (IS_ERR(st->iio_cb)) {
> + dev_err(dev, "failed to allocate callback buffer.\n");
> + return PTR_ERR(st->iio_cb);
> + }
> +
> + error = devm_add_action_or_reset(dev, grts_disable, st->iio_cb);
> + if (error) {
> + dev_err(dev, "failed to add disable action.\n");
> + return error;
> + }
> +
> + return 0;
> +}
> +
> +static const struct of_device_id grts_of_match[] = {
> + {
> + .compatible = "resistive-adc-touch",
> + }, {
> + /* sentinel */
> + },
> +};
> +
> +MODULE_DEVICE_TABLE(of, grts_of_match);
> +
> +static struct platform_driver grts_driver = {
> + .probe = grts_probe,
> + .driver = {
> + .name = DRIVER_NAME,
> + .of_match_table = of_match_ptr(grts_of_match),
> + },
> +};
> +
> +module_platform_driver(grts_driver);
> +
> +MODULE_AUTHOR("Eugen Hristev <eugen.hristev@microchip.com>");
> +MODULE_DESCRIPTION("Generic ADC Resistive Touch Driver");
> +MODULE_LICENSE("GPL v2");
^ permalink raw reply
* [PATCH v7 7/9] dt-bindings: iio: adc: at91-sama5d2_adc: add channel specific consumer info
From: Jonathan Cameron @ 2018-06-10 12:34 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20180522122319.GN22971@rfolt0960.corp.atmel.com>
On Tue, 22 May 2018 14:23:19 +0200
Ludovic Desroches <ludovic.desroches@microchip.com> wrote:
> On Tue, May 22, 2018 at 10:52:37AM +0300, Eugen Hristev wrote:
> > Added defines for channel consumer device-tree binding
> >
> > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.
Thanks,
Jonathan
>
> > ---
> > .../devicetree/bindings/iio/adc/at91-sama5d2_adc.txt | 9 +++++++++
> > include/dt-bindings/iio/adc/at91-sama5d2_adc.h | 16 ++++++++++++++++
> > 2 files changed, 25 insertions(+)
> > create mode 100644 include/dt-bindings/iio/adc/at91-sama5d2_adc.h
> >
> > diff --git a/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt b/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt
> > index 6469a4c..4a3c1d4 100644
> > --- a/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt
> > +++ b/Documentation/devicetree/bindings/iio/adc/at91-sama5d2_adc.txt
> > @@ -21,6 +21,14 @@ Optional properties:
> > - dmas: Phandle to dma channel for the ADC.
> > - dma-names: Must be "rx" when dmas property is being used.
> > See ../../dma/dma.txt for details.
> > + - #io-channel-cells: in case consumer drivers are attached, this must be 1.
> > + See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details.
> > +
> > +Properties for consumer drivers:
> > + - Consumer drivers can be connected to this producer device, as specified
> > + in <Documentation/devicetree/bindings/iio/iio-bindings.txt>
> > + - Channels exposed are specified in:
> > + <dt-bindings/iio/adc/at91-sama5d2_adc.txt>
> >
> > Example:
> >
> > @@ -38,4 +46,5 @@ adc: adc at fc030000 {
> > atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
> > dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
> > dma-names = "rx";
> > + #io-channel-cells = <1>;
> > }
> > diff --git a/include/dt-bindings/iio/adc/at91-sama5d2_adc.h b/include/dt-bindings/iio/adc/at91-sama5d2_adc.h
> > new file mode 100644
> > index 0000000..70f99db
> > --- /dev/null
> > +++ b/include/dt-bindings/iio/adc/at91-sama5d2_adc.h
> > @@ -0,0 +1,16 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * This header provides constants for configuring the AT91 SAMA5D2 ADC
> > + */
> > +
> > +#ifndef _DT_BINDINGS_IIO_ADC_AT91_SAMA5D2_ADC_H
> > +#define _DT_BINDINGS_IIO_ADC_AT91_SAMA5D2_ADC_H
> > +
> > +/* X relative position channel index */
> > +#define AT91_SAMA5D2_ADC_X_CHANNEL 24
> > +/* Y relative position channel index */
> > +#define AT91_SAMA5D2_ADC_Y_CHANNEL 25
> > +/* pressure channel index */
> > +#define AT91_SAMA5D2_ADC_P_CHANNEL 26
> > +
> > +#endif
> > --
> > 2.7.4
> >
^ permalink raw reply
* [PATCH v7 8/9] ARM: dts: at91: sama5d2: add channel cells for ADC device
From: Jonathan Cameron @ 2018-06-10 12:35 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-9-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:38 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Preparing the ADC device to connect channel consumer drivers
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The driver for the touchscreen is no in the IIO tree, but it wasn't
early enough (due to a block on a fix working it's way in) for this
merge window. Will be going upstream in the next merge window.
Thanks,
Jonathan
> ---
> arch/arm/boot/dts/sama5d2.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 61f68e5..f06ba99 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -47,6 +47,7 @@
> #include <dt-bindings/dma/at91.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
>
> / {
> model = "Atmel SAMA5D2 family SoC";
> @@ -1437,6 +1438,7 @@
> atmel,max-sample-rate-hz = <20000000>;
> atmel,startup-time-ms = <4>;
> atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
> + #io-channel-cells = <1>;
> status = "disabled";
> };
>
^ permalink raw reply
* [PATCH v7 9/9] ARM: dts: at91: sama5d2: Add resistive touch device
From: Jonathan Cameron @ 2018-06-10 12:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1526975559-18966-10-git-send-email-eugen.hristev@microchip.com>
On Tue, 22 May 2018 10:52:39 +0300
Eugen Hristev <eugen.hristev@microchip.com> wrote:
> Add generic resistive touch device which is connected to ADC block
> inside the SAMA5D2 SoC
>
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
As with the previous patch, the driver side of things is working it's
way through the IIO tree, but will be the next merge window, not the
current one.
Thanks,
Jonathan
> ---
> Changes in v5:
> - renamed touchscreen-threshold-pressure to touchscreen-min-pressure
>
> arch/arm/boot/dts/sama5d2.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index f06ba99..a44f325 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -1442,6 +1442,16 @@
> status = "disabled";
> };
>
> + resistive_touch: resistive-touch {
> + compatible = "resistive-adc-touch";
> + io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
> + <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>,
> + <&adc AT91_SAMA5D2_ADC_P_CHANNEL>;
> + io-channel-names = "x", "y", "pressure";
> + touchscreen-min-pressure = <50000>;
> + status = "disabled";
> + };
> +
> pioA: pinctrl at fc038000 {
> compatible = "atmel,sama5d2-pinctrl";
> reg = <0xfc038000 0x600>;
^ permalink raw reply
* [PATCH 1/1] ARM: dts: s5pv210: Add missing interrupt-controller property to gph2
From: Paweł Chmiel @ 2018-06-10 14:15 UTC (permalink / raw)
To: linux-arm-kernel
This commit adds missing interrupt-controller property to gph2 block,
to silence following warnings during build
/soc/pinctrl at e0200000/gph2: Missing interrupt-controller or interrupt-map property
Observed on not yet mainlined, an S5PV210 based
Samsung Galaxy S (i9000) phone.
Signed-off-by: Pawe? Chmiel <pawel.mikolaj.chmiel@gmail.com>
---
arch/arm/boot/dts/s5pv210-pinctrl.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
index 3a79feab11c3..7f0c9d447871 100644
--- a/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/s5pv210-pinctrl.dtsi
@@ -258,6 +258,8 @@
gph2: gph2 {
gpio-controller;
#gpio-cells = <2>;
+
+ interrupt-controller;
#interrupt-cells = <2>;
};
--
2.7.4
^ permalink raw reply related
* [PATCH] clocksource/drivers/stm32: fix error return code
From: Julia Lawall @ 2018-06-10 14:24 UTC (permalink / raw)
To: linux-arm-kernel
Return an error code on failure.
Problem found using Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
---
drivers/clocksource/timer-stm32.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c
index e5cdc3a..2717f88 100644
--- a/drivers/clocksource/timer-stm32.c
+++ b/drivers/clocksource/timer-stm32.c
@@ -304,8 +304,10 @@ static int __init stm32_timer_init(struct device_node *node)
to->private_data = kzalloc(sizeof(struct stm32_timer_private),
GFP_KERNEL);
- if (!to->private_data)
+ if (!to->private_data) {
+ ret = -ENOMEM;
goto deinit;
+ }
rstc = of_reset_control_get(node, NULL);
if (!IS_ERR(rstc)) {
^ permalink raw reply related
* [PATCH] media: stm32-dcmi: simplify of_node_put usage
From: Nicholas Mc Guire @ 2018-06-10 15:23 UTC (permalink / raw)
To: linux-arm-kernel
This does not fix any bug - this is just a code simplification. As
np is not used after passing it to v4l2_fwnode_endpoint_parse() its
refcount can be decremented immediately and at one location.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
---
Issue found during code reading.
Patch was compile tested with: x86_64_defconfig, MEDIA_SUPPORT=y
MEDIA_CAMERA_SUPPORT=y, V4L_PLATFORM_DRIVERS=y, OF=y, COMPILE_TEST=y
CONFIG_VIDEO_STM32_DCMI=y
(There are a few sparse warnings - but unrelated to the lines changed)
Patch is against 4.17.0 (localversion-next is next-20180608)
drivers/media/platform/stm32/stm32-dcmi.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/media/platform/stm32/stm32-dcmi.c b/drivers/media/platform/stm32/stm32-dcmi.c
index 2e1933d..0b61042 100644
--- a/drivers/media/platform/stm32/stm32-dcmi.c
+++ b/drivers/media/platform/stm32/stm32-dcmi.c
@@ -1696,23 +1696,20 @@ static int dcmi_probe(struct platform_device *pdev)
}
ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
+ of_node_put(np);
if (ret) {
dev_err(&pdev->dev, "Could not parse the endpoint\n");
- of_node_put(np);
return -ENODEV;
}
if (ep.bus_type == V4L2_MBUS_CSI2) {
dev_err(&pdev->dev, "CSI bus not supported\n");
- of_node_put(np);
return -ENODEV;
}
dcmi->bus.flags = ep.bus.parallel.flags;
dcmi->bus.bus_width = ep.bus.parallel.bus_width;
dcmi->bus.data_shift = ep.bus.parallel.data_shift;
- of_node_put(np);
-
irq = platform_get_irq(pdev, 0);
if (irq <= 0) {
dev_err(&pdev->dev, "Could not get irq\n");
--
2.1.4
^ permalink raw reply related
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