* Re: [PATCH 00/59] KVM: arm64: ARMv8.3 Nested Virtualization support
From: Andrew Jones @ 2019-08-09 13:00 UTC (permalink / raw)
To: Alexandru Elisei
Cc: kvm@vger.kernel.org, Marc Zyngier, Andre Przywara,
kvmarm@lists.cs.columbia.edu, Dave P Martin,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <6dafd748-257e-1d09-aecc-d5a2ab91bdc4@arm.com>
On Fri, Aug 09, 2019 at 01:00:02PM +0100, Alexandru Elisei wrote:
> Hi Andrew,
>
> On 8/9/19 12:44 PM, Andrew Jones wrote:
> > On Fri, Aug 09, 2019 at 11:01:51AM +0100, Alexandru Elisei wrote:
> >> On 8/2/19 11:11 AM, Alexandru Elisei wrote:
> >>> Hi,
> >>>
> >>> On 6/21/19 10:37 AM, Marc Zyngier wrote:
> >>>> I've taken over the maintenance of this series originally written by
> >>>> Jintack and Christoffer. Since then, the series has been substantially
> >>>> reworked, new features (and most probably bugs) have been added, and
> >>>> the whole thing rebased multiple times. If anything breaks, please
> >>>> blame me, and nobody else.
> >>>>
> >>>> As you can tell, this is quite big. It is also remarkably incomplete
> >>>> (we're missing many critical bits for fully emulate EL2), but the idea
> >>>> is to start merging things early in order to reduce the maintenance
> >>>> headache. What we want to achieve is that with NV disabled, there is
> >>>> no performance overhead and no regression. The only thing I intend to
> >>>> merge ASAP is the first patch in the series, because it should have
> >>>> zero effect and is a reasonable cleanup.
> >>>>
> >>>> The series is roughly divided in 4 parts: exception handling, memory
> >>>> virtualization, interrupts and timers. There are of course some
> >>>> dependencies, but you'll hopefully get the gist of it.
> >>>>
> >>>> For the most courageous of you, I've put out a branch[1] containing this
> >>>> and a bit more. Of course, you'll need some userspace. Andre maintains
> >>>> a hacked version of kvmtool[1] that takes a --nested option, allowing
> >>>> the guest to be started at EL2. You can run the whole stack in the
> >>>> Foundation model. Don't be in a hurry ;-).
> >>>>
> >>>> [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/nv-wip-5.2-rc5
> >>>> [2] git://linux-arm.org/kvmtool.git nv/nv-wip-5.2-rc5
> >>>>
> >>>> Andre Przywara (4):
> >>>> KVM: arm64: nv: Handle virtual EL2 registers in
> >>>> vcpu_read/write_sys_reg()
> >>>> KVM: arm64: nv: Save/Restore vEL2 sysregs
> >>>> KVM: arm64: nv: Handle traps for timer _EL02 and _EL2 sysregs
> >>>> accessors
> >>>> KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ
> >>>>
> >>>> Christoffer Dall (16):
> >>>> KVM: arm64: nv: Introduce nested virtualization VCPU feature
> >>>> KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set
> >>>> KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x
> >>>> KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state
> >>>> KVM: arm64: nv: Handle trapped ERET from virtual EL2
> >>>> KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor
> >>>> KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2
> >>>> KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2
> >>>> changes
> >>>> KVM: arm/arm64: nv: Support multiple nested stage 2 mmu structures
> >>>> KVM: arm64: nv: Implement nested Stage-2 page table walk logic
> >>>> KVM: arm64: nv: Handle shadow stage 2 page faults
> >>>> KVM: arm64: nv: Unmap/flush shadow stage 2 page tables
> >>>> KVM: arm64: nv: arch_timer: Support hyp timer emulation
> >>>> KVM: arm64: nv: vgic-v3: Take cpu_if pointer directly instead of vcpu
> >>>> KVM: arm64: nv: vgic: Emulate the HW bit in software
> >>>> KVM: arm64: nv: Add nested GICv3 tracepoints
> >>>>
> >>>> Dave Martin (1):
> >>>> KVM: arm64: Migrate _elx sysreg accessors to msr_s/mrs_s
> >>>>
> >>>> Jintack Lim (21):
> >>>> arm64: Add ARM64_HAS_NESTED_VIRT cpufeature
> >>>> KVM: arm64: nv: Add EL2 system registers to vcpu context
> >>>> KVM: arm64: nv: Support virtual EL2 exceptions
> >>>> KVM: arm64: nv: Inject HVC exceptions to the virtual EL2
> >>>> KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from virtual EL2
> >>>> KVM: arm64: nv: Trap CPACR_EL1 access in virtual EL2
> >>>> KVM: arm64: nv: Set a handler for the system instruction traps
> >>>> KVM: arm64: nv: Handle PSCI call via smc from the guest
> >>>> KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting
> >>>> KVM: arm64: nv: Respect virtual CPTR_EL2.TFP setting
> >>>> KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting
> >>>> KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings
> >>>> KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting
> >>>> KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2
> >>>> KVM: arm64: nv: Configure HCR_EL2 for nested virtualization
> >>>> KVM: arm64: nv: Pretend we only support larger-than-host page sizes
> >>>> KVM: arm64: nv: Introduce sys_reg_desc.forward_trap
> >>>> KVM: arm64: nv: Rework the system instruction emulation framework
> >>>> KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2
> >>>> KVM: arm64: nv: Trap and emulate TLBI instructions from virtual EL2
> >>>> KVM: arm64: nv: Nested GICv3 Support
> >>>>
> >>>> Marc Zyngier (17):
> >>>> KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h
> >>>> KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values
> >>>> KVM: arm64: nv: Handle SPSR_EL2 specially
> >>>> KVM: arm64: nv: Refactor vcpu_{read,write}_sys_reg
> >>>> KVM: arm64: nv: Don't expose SVE to nested guests
> >>>> KVM: arm64: nv: Hide RAS from nested guests
> >>>> KVM: arm/arm64: nv: Factor out stage 2 page table data from struct kvm
> >>>> KVM: arm64: nv: Move last_vcpu_ran to be per s2 mmu
> >>>> KVM: arm64: nv: Don't always start an S2 MMU search from the beginning
> >>>> KVM: arm64: nv: Propagate CNTVOFF_EL2 to the virtual EL1 timer
> >>>> KVM: arm64: nv: Load timer before the GIC
> >>>> KVM: arm64: nv: Implement maintenance interrupt forwarding
> >>>> arm64: KVM: nv: Add handling of EL2-specific timer registers
> >>>> arm64: KVM: nv: Honor SCTLR_EL2.SPAN on entering vEL2
> >>>> arm64: KVM: nv: Handle SCTLR_EL2 RES0/RES1 bits
> >>>> arm64: KVM: nv: Restrict S2 RD/WR permissions to match the guest's
> >>>> arm64: KVM: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT
> >>>>
> >>>> .../admin-guide/kernel-parameters.txt | 4 +
> >>>> .../virtual/kvm/devices/arm-vgic-v3.txt | 9 +
> >>>> arch/arm/include/asm/kvm_asm.h | 5 +-
> >>>> arch/arm/include/asm/kvm_emulate.h | 3 +
> >>>> arch/arm/include/asm/kvm_host.h | 31 +-
> >>>> arch/arm/include/asm/kvm_hyp.h | 25 +-
> >>>> arch/arm/include/asm/kvm_mmu.h | 83 +-
> >>>> arch/arm/include/asm/kvm_nested.h | 9 +
> >>>> arch/arm/include/uapi/asm/kvm.h | 1 +
> >>>> arch/arm/kvm/hyp/switch.c | 11 +-
> >>>> arch/arm/kvm/hyp/tlb.c | 13 +-
> >>>> arch/arm64/include/asm/cpucaps.h | 3 +-
> >>>> arch/arm64/include/asm/esr.h | 4 +-
> >>>> arch/arm64/include/asm/kvm_arm.h | 28 +-
> >>>> arch/arm64/include/asm/kvm_asm.h | 9 +-
> >>>> arch/arm64/include/asm/kvm_coproc.h | 2 +-
> >>>> arch/arm64/include/asm/kvm_emulate.h | 157 +-
> >>>> arch/arm64/include/asm/kvm_host.h | 105 +-
> >>>> arch/arm64/include/asm/kvm_hyp.h | 82 +-
> >>>> arch/arm64/include/asm/kvm_mmu.h | 62 +-
> >>>> arch/arm64/include/asm/kvm_nested.h | 68 +
> >>>> arch/arm64/include/asm/sysreg.h | 143 +-
> >>>> arch/arm64/include/uapi/asm/kvm.h | 2 +
> >>>> arch/arm64/kernel/cpufeature.c | 26 +
> >>>> arch/arm64/kvm/Makefile | 4 +
> >>>> arch/arm64/kvm/emulate-nested.c | 223 +++
> >>>> arch/arm64/kvm/guest.c | 6 +
> >>>> arch/arm64/kvm/handle_exit.c | 76 +-
> >>>> arch/arm64/kvm/hyp/Makefile | 1 +
> >>>> arch/arm64/kvm/hyp/at.c | 217 +++
> >>>> arch/arm64/kvm/hyp/switch.c | 86 +-
> >>>> arch/arm64/kvm/hyp/sysreg-sr.c | 267 ++-
> >>>> arch/arm64/kvm/hyp/tlb.c | 129 +-
> >>>> arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c | 2 +-
> >>>> arch/arm64/kvm/inject_fault.c | 12 -
> >>>> arch/arm64/kvm/nested.c | 551 +++++++
> >>>> arch/arm64/kvm/regmap.c | 4 +-
> >>>> arch/arm64/kvm/reset.c | 7 +
> >>>> arch/arm64/kvm/sys_regs.c | 1460 +++++++++++++++--
> >>>> arch/arm64/kvm/sys_regs.h | 6 +
> >>>> arch/arm64/kvm/trace.h | 58 +-
> >>>> include/kvm/arm_arch_timer.h | 6 +
> >>>> include/kvm/arm_vgic.h | 28 +-
> >>>> virt/kvm/arm/arch_timer.c | 158 +-
> >>>> virt/kvm/arm/arm.c | 62 +-
> >>>> virt/kvm/arm/hyp/vgic-v3-sr.c | 35 +-
> >>>> virt/kvm/arm/mmio.c | 12 +-
> >>>> virt/kvm/arm/mmu.c | 445 +++--
> >>>> virt/kvm/arm/trace.h | 6 +-
> >>>> virt/kvm/arm/vgic/vgic-init.c | 30 +
> >>>> virt/kvm/arm/vgic/vgic-kvm-device.c | 22 +
> >>>> virt/kvm/arm/vgic/vgic-nested-trace.h | 137 ++
> >>>> virt/kvm/arm/vgic/vgic-v2.c | 10 +-
> >>>> virt/kvm/arm/vgic/vgic-v3-nested.c | 236 +++
> >>>> virt/kvm/arm/vgic/vgic-v3.c | 40 +-
> >>>> virt/kvm/arm/vgic/vgic.c | 74 +-
> >>>> 56 files changed, 4683 insertions(+), 612 deletions(-)
> >>>> create mode 100644 arch/arm/include/asm/kvm_nested.h
> >>>> create mode 100644 arch/arm64/include/asm/kvm_nested.h
> >>>> create mode 100644 arch/arm64/kvm/emulate-nested.c
> >>>> create mode 100644 arch/arm64/kvm/hyp/at.c
> >>>> create mode 100644 arch/arm64/kvm/nested.c
> >>>> create mode 100644 virt/kvm/arm/vgic/vgic-nested-trace.h
> >>>> create mode 100644 virt/kvm/arm/vgic/vgic-v3-nested.c
> >>>>
> >>> When working on adding support for EL2 to kvm-unit-tests I was able to trigger
> >>> the following warning:
> >>>
> >>> # ./lkvm run -f psci.flat -m 128 -c 8 --console serial --irqchip gicv3 --nested
> >>> # lkvm run --firmware psci.flat -m 128 -c 8 --name guest-151
> >>> Info: Placing fdt at 0x80200000 - 0x80210000
> >>> # Warning: The maximum recommended amount of VCPUs is 4
> >>> chr_testdev_init: chr-testdev: can't find a virtio-console
> >>> INFO: PSCI version 1.0
> >>> PASS: invalid-function
> >>> PASS: affinity-info-on
> >>> PASS: affinity-info-off
> >>> [ 24.381266] WARNING: CPU: 3 PID: 160 at
> >>> arch/arm64/kvm/../../../virt/kvm/arm/arch_timer.c:170
> >>> kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.381366] Modules linked in:
> >>> [ 24.381466] CPU: 3 PID: 160 Comm: kvm-vcpu-1 Not tainted
> >>> 5.2.0-rc5-00060-g7dbce63bd1c7 #145
> >>> [ 24.381566] Hardware name: Foundation-v8A (DT)
> >>> [ 24.381566] pstate: 40400009 (nZcv daif +PAN -UAO)
> >>> [ 24.381666] pc : kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.381766] lr : timer_emulate+0x24/0x98
> >>> [ 24.381766] sp : ffff000013d8b780
> >>> [ 24.381866] x29: ffff000013d8b780 x28: ffff80087a639b80
> >>> [ 24.381966] x27: ffff000010ba8648 x26: ffff000010b71b40
> >>> [ 24.382066] x25: ffff80087a63a100 x24: 0000000000000000
> >>> [ 24.382111] x23: 000080086ca54000 x22: ffff0000100ce260
> >>> [ 24.382166] x21: ffff800875e7c918 x20: ffff800875e7a800
> >>> [ 24.382275] x19: ffff800875e7ca08 x18: 0000000000000000
> >>> [ 24.382366] x17: 0000000000000000 x16: 0000000000000000
> >>> [ 24.382466] x15: 0000000000000000 x14: 0000000000002118
> >>> [ 24.382566] x13: 0000000000002190 x12: 0000000000002280
> >>> [ 24.382566] x11: 0000000000002208 x10: 0000000000000040
> >>> [ 24.382666] x9 : ffff000012dc3b38 x8 : 0000000000000000
> >>> [ 24.382766] x7 : 0000000000000000 x6 : ffff80087ac00248
> >>> [ 24.382866] x5 : 000080086ca54000 x4 : 0000000000002118
> >>> [ 24.382966] x3 : eeeeeeeeeeeeeeef x2 : ffff800875e7c918
> >>> [ 24.383066] x1 : 0000000000000001 x0 : ffff800875e7ca08
> >>> [ 24.383066] Call trace:
> >>> [ 24.383166] kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.383266] kvm_timer_vcpu_load+0x9c/0x1a0
> >>> [ 24.383366] kvm_arch_vcpu_load+0xb0/0x1f0
> >>> [ 24.383366] kvm_sched_in+0x1c/0x28
> >>> [ 24.383466] finish_task_switch+0xd8/0x1d8
> >>> [ 24.383566] __schedule+0x248/0x4a0
> >>> [ 24.383666] preempt_schedule_irq+0x60/0x90
> >>> [ 24.383666] el1_irq+0xd0/0x180
> >>> [ 24.383766] kvm_handle_guest_abort+0x0/0x3a0
> >>> [ 24.383866] kvm_arch_vcpu_ioctl_run+0x41c/0x688
> >>> [ 24.383866] kvm_vcpu_ioctl+0x4c0/0x838
> >>> [ 24.383966] do_vfs_ioctl+0xb8/0x878
> >>> [ 24.384077] ksys_ioctl+0x84/0x90
> >>> [ 24.384166] __arm64_sys_ioctl+0x18/0x28
> >>> [ 24.384166] el0_svc_common.constprop.0+0xb0/0x168
> >>> [ 24.384266] el0_svc_handler+0x28/0x78
> >>> [ 24.384366] el0_svc+0x8/0xc
> >>> [ 24.384366] ---[ end trace 37a32293e43ac12c ]---
> >>> [ 24.384666] WARNING: CPU: 3 PID: 160 at
> >>> arch/arm64/kvm/../../../virt/kvm/arm/arch_timer.c:170
> >>> kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.384766] Modules linked in:
> >>> [ 24.384866] CPU: 3 PID: 160 Comm: kvm-vcpu-1 Tainted: G W
> >>> 5.2.0-rc5-00060-g7dbce63bd1c7 #145
> >>> [ 24.384966] Hardware name: Foundation-v8A (DT)
> >>> [ 24.384966] pstate: 40400009 (nZcv daif +PAN -UAO)
> >>> [ 24.385066] pc : kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.385166] lr : timer_emulate+0x24/0x98
> >>> [ 24.385166] sp : ffff000013d8b780
> >>> [ 24.385266] x29: ffff000013d8b780 x28: ffff80087a639b80
> >>> [ 24.385366] x27: ffff000010ba8648 x26: ffff000010b71b40
> >>> [ 24.385466] x25: ffff80087a63a100 x24: 0000000000000000
> >>> [ 24.385466] x23: 000080086ca54000 x22: ffff0000100ce260
> >>> [ 24.385566] x21: ffff800875e7c918 x20: ffff800875e7a800
> >>> [ 24.385666] x19: ffff800875e7ca80 x18: 0000000000000000
> >>> [ 24.385766] x17: 0000000000000000 x16: 0000000000000000
> >>> [ 24.385866] x15: 0000000000000000 x14: 0000000000002118
> >>> [ 24.385966] x13: 0000000000002190 x12: 0000000000002280
> >>> [ 24.385966] x11: 0000000000002208 x10: 0000000000000040
> >>> [ 24.386066] x9 : ffff000012dc3b38 x8 : 0000000000000000
> >>> [ 24.386166] x7 : 0000000000000000 x6 : ffff80087ac00248
> >>> [ 24.386266] x5 : 000080086ca54000 x4 : 0000000000002118
> >>> [ 24.386366] x3 : eeeeeeeeeeeeeeef x2 : ffff800875e7c918
> >>> [ 24.386466] x1 : 0000000000000001 x0 : ffff800875e7ca80
> >>> [ 24.386466] Call trace:
> >>> [ 24.386566] kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.386666] kvm_timer_vcpu_load+0xa8/0x1a0
> >>> [ 24.386666] kvm_arch_vcpu_load+0xb0/0x1f0
> >>> [ 24.386898] kvm_sched_in+0x1c/0x28
> >>> [ 24.386966] finish_task_switch+0xd8/0x1d8
> >>> [ 24.387166] __schedule+0x248/0x4a0
> >>> [ 24.387354] preempt_schedule_irq+0x60/0x90
> >>> [ 24.387366] el1_irq+0xd0/0x180
> >>> [ 24.387466] kvm_handle_guest_abort+0x0/0x3a0
> >>> [ 24.387566] kvm_arch_vcpu_ioctl_run+0x41c/0x688
> >>> [ 24.387566] kvm_vcpu_ioctl+0x4c0/0x838
> >>> [ 24.387666] do_vfs_ioctl+0xb8/0x878
> >>> [ 24.387766] ksys_ioctl+0x84/0x90
> >>> [ 24.387866] __arm64_sys_ioctl+0x18/0x28
> >>> [ 24.387866] el0_svc_common.constprop.0+0xb0/0x168
> >>> [ 24.387966] el0_svc_handler+0x28/0x78
> >>> [ 24.388066] el0_svc+0x8/0xc
> >>> [ 24.388066] ---[ end trace 37a32293e43ac12d ]---
> >>> PASS: cpu-on
> >>> SUMMARY: 4 te[ 24.390266] WARNING: CPU: 3 PID: 160 at
> >>> arch/arm64/kvm/../../../virt/kvm/arm/arch_timer.c:170
> >>> kvm_timer_irq_can_fire+0xc/0x30
> >>> s[ 24.390366] Modules linked in:
> >>> ts[ 24.390366] CPU: 3 PID: 160 Comm: kvm-vcpu-1 Tainted: G W
> >>> 5.2.0-rc5-00060-g7dbce63bd1c7 #145
> >>> [ 24.390566] Hardware name: Foundation-v8A (DT)
> >>>
> >>> [ 24.390795] pstate: 40400009 (nZcv daif +PAN -UAO)
> >>> [ 24.390866] pc : kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.390966] lr : timer_emulate+0x24/0x98
> >>> [ 24.391066] sp : ffff000013d8b780
> >>> [ 24.391066] x29: ffff000013d8b780 x28: ffff80087a639b80
> >>> [ 24.391166] x27: ffff000010ba8648 x26: ffff000010b71b40
> >>> [ 24.391266] x25: ffff80087a63a100 x24: 0000000000000000
> >>> [ 24.391366] x23: 000080086ca54000 x22: 0000000000000003
> >>> [ 24.391466] x21: ffff800875e7c918 x20: ffff800875e7a800
> >>> [ 24.391466] x19: ffff800875e7ca08 x18: 0000000000000000
> >>> [ 24.391566] x17: 0000000000000000 x16: 0000000000000000
> >>> [ 24.391666] x15: 0000000000000000 x14: 0000000000002118
> >>> [ 24.391766] x13: 0000000000002190 x12: 0000000000002280
> >>> [ 24.391866] x11: 0000000000002208 x10: 0000000000000040
> >>> [ 24.391942] x9 : ffff000012dc3b38 x8 : 0000000000000000
> >>> [ 24.391966] x7 : 0000000000000000 x6 : ffff80087ac00248
> >>> [ 24.392066] x5 : 000080086ca54000 x4 : 0000000000002118
> >>> [ 24.392166] x3 : eeeeeeeeeeeeeeef x2 : ffff800875e7c918
> >>> [ 24.392269] x1 : 0000000000000001 x0 : ffff800875e7ca08
> >>> [ 24.392366] Call trace:
> >>> [ 24.392433] kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.392466] kvm_timer_vcpu_load+0x9c/0x1a0
> >>> [ 24.392597] kvm_arch_vcpu_load+0xb0/0x1f0
> >>> [ 24.392666] kvm_sched_in+0x1c/0x28
> >>> [ 24.392766] finish_task_switch+0xd8/0x1d8
> >>> [ 24.392766] __schedule+0x248/0x4a0
> >>> [ 24.392866] preempt_schedule_irq+0x60/0x90
> >>> [ 24.392966] el1_irq+0xd0/0x180
> >>> [ 24.392966] kvm_handle_guest_abort+0x0/0x3a0
> >>> [ 24.393066] kvm_arch_vcpu_ioctl_run+0x41c/0x688
> >>> [ 24.393166] kvm_vcpu_ioctl+0x4c0/0x838
> >>> [ 24.393266] do_vfs_ioctl+0xb8/0x878
> >>> [ 24.393266] ksys_ioctl+0x84/0x90
> >>> [ 24.393366] __arm64_sys_ioctl+0x18/0x28
> >>> [ 24.393466] el0_svc_common.constprop.0+0xb0/0x168
> >>> [ 24.393566] el0_svc_handler+0x28/0x78
> >>> [ 24.393566] el0_svc+0x8/0xc
> >>> [ 24.393666] ---[ end trace 37a32293e43ac12e ]---
> >>> [ 24.393866] WARNING: CPU: 3 PID: 160 at
> >>> arch/arm64/kvm/../../../virt/kvm/arm/arch_timer.c:170
> >>> kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.394066] Modules linked in:
> >>> [ 24.394266] CPU: 3 PID: 160 Comm: kvm-vcpu-1 Tainted: G W
> >>> 5.2.0-rc5-00060-g7dbce63bd1c7 #145
> >>> [ 24.394366] Hardware name: Foundation-v8A (DT)
> >>> [ 24.394466] pstate: 40400009 (nZcv daif +PAN -UAO)
> >>> [ 24.394466] pc : kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.394566] lr : timer_emulate+0x24/0x98
> >>> [ 24.394666] sp : ffff000013d8b780
> >>> [ 24.394727] x29: ffff000013d8b780 x28: ffff80087a639b80
> >>> [ 24.394766] x27: ffff000010ba8648 x26: ffff000010b71b40
> >>> [ 24.394866] x25: ffff80087a63a100 x24: 0000000000000000
> >>> [ 24.394966] x23: 000080086ca54000 x22: 0000000000000003
> >>> [ 24.394966] x21: ffff800875e7c918 x20: ffff800875e7a800
> >>> [ 24.395066] x19: ffff800875e7ca80 x18: 0000000000000000
> >>> [ 24.395166] x17: 0000000000000000 x16: 0000000000000000
> >>> [ 24.395266] x15: 0000000000000000 x14: 0000000000002118
> >>> [ 24.395383] x13: 0000000000002190 x12: 0000000000002280
> >>> [ 24.395466] x11: 0000000000002208 x10: 0000000000000040
> >>> [ 24.395547] x9 : ffff000012dc3b38 x8 : 0000000000000000
> >>> [ 24.395666] x7 : 0000000000000000 x6 : ffff80087ac00248
> >>> [ 24.395866] x5 : 000080086ca54000 x4 : 0000000000002118
> >>> [ 24.395966] x3 : eeeeeeeeeeeeeeef x2 : ffff800875e7c918
> >>> [ 24.396066] x1 : 0000000000000001 x0 : ffff800875e7ca80
> >>> [ 24.396066] Call trace:
> >>> [ 24.396166] kvm_timer_irq_can_fire+0xc/0x30
> >>> [ 24.396266] kvm_timer_vcpu_load+0xa8/0x1a0
> >>> [ 24.396366] kvm_arch_vcpu_load+0xb0/0x1f0
> >>> [ 24.396366] kvm_sched_in+0x1c/0x28
> >>> [ 24.396466] finish_task_switch+0xd8/0x1d8
> >>> [ 24.396566] __schedule+0x248/0x4a0
> >>> [ 24.396666] preempt_schedule_irq+0x60/0x90
> >>> [ 24.396666] el1_irq+0xd0/0x180
> >>> [ 24.396766] kvm_handle_guest_abort+0x0/0x3a0
> >>> [ 24.396866] kvm_arch_vcpu_ioctl_run+0x41c/0x688
> >>> [ 24.396866] kvm_vcpu_ioctl+0x4c0/0x838
> >>> [ 24.397021] do_vfs_ioctl+0xb8/0x878
> >>> [ 24.397066] ksys_ioctl+0x84/0x90
> >>> [ 24.397166] __arm64_sys_ioctl+0x18/0x28
> >>> [ 24.397348] el0_svc_common.constprop.0+0xb0/0x168
> >>> [ 24.397366] el0_svc_handler+0x28/0x78
> >>> [ 24.397566] el0_svc+0x8/0xc
> >>> [ 24.397676] ---[ end trace 37a32293e43ac12f ]---
> >>>
> >>> # KVM compatibility warning.
> >>> virtio-9p device was not detected.
> >>> While you have requested a virtio-9p device, the guest kernel did not
> >>> initialize it.
> >>> Please make sure that the guest kernel was compiled with
> >>> CONFIG_NET_9P_VIRTIO=y enabled in .config.
> >>>
> >>> # KVM compatibility warning.
> >>> virtio-net device was not detected.
> >>> While you have requested a virtio-net device, the guest kernel did not
> >>> initialize it.
> >>> Please make sure that the guest kernel was compiled with CONFIG_VIRTIO_NET=y
> >>> enabled in .config.
> >>>
> >>> [..]
> >> Did some investigating and this was caused by a bug in kvm-unit-tests (the fix
> >> for it will be part of the EL2 patches for kvm-unit-tests). The guest was trying
> >> to fetch an instruction from address 0x200, which KVM interprets as a prefetch
> >> abort on an I/O address and ends up calling kvm_inject_pabt. The code from
> >> arch/arm64/kvm/inject_fault.c doesn't know anything about nested virtualization,
> >> and it sets the VCPU mode directly to PSR_MODE_EL1h. This makes_hyp_ctxt return
> >> false, and get_timer_map will return an incorrect mapping.
> >>
> >> On next kvm_timer_vcpu_put, the direct timers will be {p,v}timer, and
> >> h{p,v}timer->loaded will not be set to false. In the corresponding call to
> >> kvm_timer_vcpu_load, KVM will try to emulate the hptimer and hvtimer, which
> >> still have loaded = true. And this causes the warning I saw.
> >>
> > Hi Alexandru,
> >
> > While a unit test in kvm-unit-tests may not do what it should in order to
> > exercise the code it's targeting appropriately, and therefore need to be
> > fixed in order to do that, I'd argue that if a guest can induce a host
> > warning then that's a host bug. Indeed now that you've analyzed the
> > issue you could write a kvm-unit-tests test to specifically reproduce the
> > warning and then use that test to test any host fix candidates.
> >
> > Thanks,
> > drew
> >
> It was a host bug triggered by a bug in kvm-unit-tests. The kvm-unit-tests bug
> is a real bug because it goes against the intent of the psci test. It wasn't
> discovered until now because with the upstream version of Linux we don't get any
> messages about it. I'll post a patch for it as soon as I can and we can discuss
> how we want to fix it :)
>
Great, that's how I understood it, but it wasn't clear from your original
message that we were also acknowledging the host bug, only the
kvm-unit-tests bug. I wanted to make sure we fix both.
Thanks,
drew
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^ permalink raw reply
* Re: [PATCH v2 0/4] clk: meson: g12a: add support for DVFS
From: Jerome Brunet @ 2019-08-09 13:02 UTC (permalink / raw)
To: Kevin Hilman, Neil Armstrong, sboyd
Cc: linux-kernel, linux-amlogic, linux-clk, linux-arm-kernel,
Neil Armstrong
In-Reply-To: <7hzhkje4ov.fsf@baylibre.com>
On Thu 08 Aug 2019 at 14:18, Kevin Hilman <khilman@baylibre.com> wrote:
> Neil Armstrong <narmstrong@baylibre.com> writes:
>
>> The G12A/G12B Socs embeds a specific clock tree for each CPU cluster :
>> cpu_clk / cpub_clk
>> | \- cpu_clk_dyn
>> | | \- cpu_clk_premux0
>> | | |- cpu_clk_postmux0
>> | | | |- cpu_clk_dyn0_div
>> | | | \- xtal/fclk_div2/fclk_div3
>> | | \- xtal/fclk_div2/fclk_div3
>> | \- cpu_clk_premux1
>> | |- cpu_clk_postmux1
>> | | |- cpu_clk_dyn1_div
>> | | \- xtal/fclk_div2/fclk_div3
>> | \- xtal/fclk_div2/fclk_div3
>> \ sys_pll / sys1_pll
>>
>> This patchset adds notifiers on cpu_clk / cpub_clk, cpu_clk_dyn,
>> cpu_clk_premux0 and sys_pll / sys1_pll to permit change frequency of
>> the CPU clock in a safe way as recommended by the vendor Documentation
>> and reference code.
>>
>> This patchset :
>> - introduces needed core and meson clk changes
>> - adds the clock notifiers
>>
>> Dependencies:
>> - None
>
> nit: this doesn't apply to v5.3-rc, but appears to apply on
> clk-meson/v5.4/drivers, so it appears to be dependent on the cleanups
> from Alex.
Indeed, Applied on top of this.
>
> Kevin
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^ permalink raw reply
* [PATCHv3 1/6] arm/arm64: smccc/psci: add arm_smccc_1_1_get_conduit()
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
SMCCC callers are currently amassing a collection of enums for the SMCCC
conduit, and are having to dig into the PSCI driver's internals in order
to figure out what to do.
Let's clean this up, with common SMCCC_CONDUIT_* definitions, and an
arm_smccc_1_1_get_conduit() helper that abstracts the PSCI driver's
internal state.
We can kill off the PSCI_CONDUIT_* definitions once we've migrated users
over to the new interface.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
---
drivers/firmware/psci/psci.c | 15 +++++++++++++++
include/linux/arm-smccc.h | 16 ++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index f82ccd39a913..5f31f1bea1af 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -57,6 +57,21 @@ struct psci_operations psci_ops = {
.smccc_version = SMCCC_VERSION_1_0,
};
+enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
+{
+ if (psci_ops.smccc_version < SMCCC_VERSION_1_1)
+ return SMCCC_CONDUIT_NONE;
+
+ switch (psci_ops.conduit) {
+ case PSCI_CONDUIT_SMC:
+ return SMCCC_CONDUIT_SMC;
+ case PSCI_CONDUIT_HVC:
+ return SMCCC_CONDUIT_HVC;
+ default:
+ return SMCCC_CONDUIT_NONE;
+ }
+}
+
typedef unsigned long (psci_fn)(unsigned long, unsigned long,
unsigned long, unsigned long);
static psci_fn *invoke_psci_fn;
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index 080012a6f025..df01a8579034 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -80,6 +80,22 @@
#include <linux/linkage.h>
#include <linux/types.h>
+
+enum arm_smccc_conduit {
+ SMCCC_CONDUIT_NONE,
+ SMCCC_CONDUIT_SMC,
+ SMCCC_CONDUIT_HVC,
+};
+
+/**
+ * arm_smccc_1_1_get_conduit()
+ *
+ * Returns the conduit to be used for SMCCCv1.1 or later.
+ *
+ * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
+ */
+enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
+
/**
* struct arm_smccc_res - Result from SMC/HVC call
* @a0-a3 result values from registers 0 to 3
--
2.11.0
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^ permalink raw reply related
* [PATCHv3 0/6] arm/arm64: SMCCC conduit cleanup
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
Currently, the cpu errata code goes digging into PSCI internals to
discover the SMCCC conduit, using the (arguably misnamed) PSCI_CONDUIT_*
definitions. This lack of abstraction is somewhat unfortunate.
Further, the SDEI code has an almost identical set of CONDUIT_*
definitions, and the duplication is rather unfortunate.
Let's unify things behind a common set of SMCCC_CONDUIT_* definitions,
and expose the SMCCCv1.1 conduit via a new helper that hides the PSCI
driver internals.
Since v1 [1]:
* Rebase to the arm64 for-next/core branch, atop of SSBD patches
* Fold in acks
Since v2 [2]:
* Rebase to v5.3-rc3
* Fix up arm spectre-v2 code
* Drop acks where significant changes have been made
Mark.
[1] https://lkml.kernel.org/r/20180503170330.5591-1-mark.rutland@arm.com
[2] https://lkml.kernel.org/r/20180531173223.9668-1-mark.rutland@arm.com
Mark Rutland (6):
arm/arm64: smccc/psci: add arm_smccc_1_1_get_conduit()
arm64: errata: use arm_smccc_1_1_get_conduit()
arm: spectre-v2: use arm_smccc_1_1_get_conduit()
firmware/psci: use common SMCCC_CONDUIT_*
firmware: arm_sdei: use common SMCCC_CONDUIT_*
smccc: make 1.1 macros value-returning
arch/arm/mm/proc-v7-bugs.c | 22 ++++++--------
arch/arm64/kernel/cpu_errata.c | 61 ++++++++++++++++-----------------------
arch/arm64/kernel/sdei.c | 3 +-
arch/arm64/kvm/hyp/switch.c | 4 +--
drivers/firmware/arm_sdei.c | 12 ++++----
drivers/firmware/psci/psci.c | 24 ++++++++++------
include/linux/arm-smccc.h | 65 ++++++++++++++++++++++++------------------
include/linux/arm_sdei.h | 6 ----
include/linux/psci.h | 9 ++----
9 files changed, 99 insertions(+), 107 deletions(-)
--
2.11.0
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^ permalink raw reply
* [PATCHv3 2/6] arm64: errata: use arm_smccc_1_1_get_conduit()
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
Now that we have arm_smccc_1_1_get_conduit(), we can hide the PSCI
implementation details from the arm64 cpu errata code, so let's do so.
As arm_smccc_1_1_get_conduit() implicitly checks that the SMCCC version
is at least SMCCC_VERSION_1_1, we no longer need to check this
explicitly where switch statements have a default case, e.g. in
has_ssbd_mitigation().
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
---
arch/arm64/kernel/cpu_errata.c | 37 ++++++++++++-------------------------
1 file changed, 12 insertions(+), 25 deletions(-)
Will, Lorenzo, you both acked v1, but I dropped your acks when rebasing as the
structure of the code changed somewhat. Are you happy to give new acks?
Mark.
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 1e43ba5c79b7..6ee09bca82f8 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -6,7 +6,6 @@
*/
#include <linux/arm-smccc.h>
-#include <linux/psci.h>
#include <linux/types.h>
#include <linux/cpu.h>
#include <asm/cpu.h>
@@ -166,9 +165,7 @@ static void install_bp_hardening_cb(bp_hardening_cb_t fn,
}
#endif /* CONFIG_KVM_INDIRECT_VECTORS */
-#include <uapi/linux/psci.h>
#include <linux/arm-smccc.h>
-#include <linux/psci.h>
static void call_smc_arch_workaround_1(void)
{
@@ -212,11 +209,8 @@ static int detect_harden_bp_fw(void)
struct arm_smccc_res res;
u32 midr = read_cpuid_id();
- if (psci_ops.smccc_version == SMCCC_VERSION_1_0)
- return -1;
-
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_HVC:
+ switch (arm_smccc_1_1_get_conduit()) {
+ case SMCCC_CONDUIT_HVC:
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
switch ((int)res.a0) {
@@ -234,7 +228,7 @@ static int detect_harden_bp_fw(void)
}
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
switch ((int)res.a0) {
@@ -308,11 +302,11 @@ void __init arm64_update_smccc_conduit(struct alt_instr *alt,
BUG_ON(nr_inst != 1);
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_HVC:
+ switch (arm_smccc_1_1_get_conduit()) {
+ case SMCCC_CONDUIT_HVC:
insn = aarch64_insn_get_hvc_value();
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
insn = aarch64_insn_get_smc_value();
break;
default:
@@ -351,12 +345,12 @@ void arm64_set_ssbd_mitigation(bool state)
return;
}
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_HVC:
+ switch (arm_smccc_1_1_get_conduit()) {
+ case SMCCC_CONDUIT_HVC:
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_2, state, NULL);
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, state, NULL);
break;
@@ -390,20 +384,13 @@ static bool has_ssbd_mitigation(const struct arm64_cpu_capabilities *entry,
goto out_printmsg;
}
- if (psci_ops.smccc_version == SMCCC_VERSION_1_0) {
- ssbd_state = ARM64_SSBD_UNKNOWN;
- if (!this_cpu_safe)
- __ssb_safe = false;
- return false;
- }
-
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_HVC:
+ switch (arm_smccc_1_1_get_conduit()) {
+ case SMCCC_CONDUIT_HVC:
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_2, &res);
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_2, &res);
break;
--
2.11.0
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^ permalink raw reply related
* [PATCHv3 3/6] arm: spectre-v2: use arm_smccc_1_1_get_conduit()
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
Now that we have arm_smccc_1_1_get_conduit(), we can hide the PSCI
implementation details from the arm spectre-v2 code, so let's do so.
As arm_smccc_1_1_get_conduit() implicitly checks that the SMCCC version
is at least SMCCC_VERSION_1_1, we no longer need to check this
explicitly where switch statements have a default case.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
---
arch/arm/mm/proc-v7-bugs.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c
index 9a07916af8dd..54d87506d3b5 100644
--- a/arch/arm/mm/proc-v7-bugs.c
+++ b/arch/arm/mm/proc-v7-bugs.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/arm-smccc.h>
#include <linux/kernel.h>
-#include <linux/psci.h>
#include <linux/smp.h>
#include <asm/cp15.h>
@@ -75,11 +74,8 @@ static void cpu_v7_spectre_init(void)
case ARM_CPU_PART_CORTEX_A72: {
struct arm_smccc_res res;
- if (psci_ops.smccc_version == SMCCC_VERSION_1_0)
- break;
-
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_HVC:
+ switch (arm_smccc_1_1_get_conduit()) {
+ case SMCCC_CONDUIT_HVC:
arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
if ((int)res.a0 != 0)
@@ -90,7 +86,7 @@ static void cpu_v7_spectre_init(void)
spectre_v2_method = "hypervisor";
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
ARM_SMCCC_ARCH_WORKAROUND_1, &res);
if ((int)res.a0 != 0)
--
2.11.0
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^ permalink raw reply related
* [PATCHv3 4/6] firmware/psci: use common SMCCC_CONDUIT_*
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
Now that we have common SMCCC_CONDUIT_* definitions, migrate the PSCI
code over to them, and kill off the old PSCI_CONDUIT_* definitions.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
---
drivers/firmware/psci/psci.c | 25 +++++++++----------------
include/linux/psci.h | 9 ++-------
2 files changed, 11 insertions(+), 23 deletions(-)
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index 5f31f1bea1af..b8c07a8f8d5d 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -53,7 +53,7 @@ bool psci_tos_resident_on(int cpu)
}
struct psci_operations psci_ops = {
- .conduit = PSCI_CONDUIT_NONE,
+ .conduit = SMCCC_CONDUIT_NONE,
.smccc_version = SMCCC_VERSION_1_0,
};
@@ -62,14 +62,7 @@ enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void)
if (psci_ops.smccc_version < SMCCC_VERSION_1_1)
return SMCCC_CONDUIT_NONE;
- switch (psci_ops.conduit) {
- case PSCI_CONDUIT_SMC:
- return SMCCC_CONDUIT_SMC;
- case PSCI_CONDUIT_HVC:
- return SMCCC_CONDUIT_HVC;
- default:
- return SMCCC_CONDUIT_NONE;
- }
+ return psci_ops.conduit;
}
typedef unsigned long (psci_fn)(unsigned long, unsigned long,
@@ -227,13 +220,13 @@ static unsigned long psci_migrate_info_up_cpu(void)
0, 0, 0);
}
-static void set_conduit(enum psci_conduit conduit)
+static void set_conduit(enum arm_smccc_conduit conduit)
{
switch (conduit) {
- case PSCI_CONDUIT_HVC:
+ case SMCCC_CONDUIT_HVC:
invoke_psci_fn = __invoke_psci_fn_hvc;
break;
- case PSCI_CONDUIT_SMC:
+ case SMCCC_CONDUIT_SMC:
invoke_psci_fn = __invoke_psci_fn_smc;
break;
default:
@@ -255,9 +248,9 @@ static int get_set_conduit_method(struct device_node *np)
}
if (!strcmp("hvc", method)) {
- set_conduit(PSCI_CONDUIT_HVC);
+ set_conduit(SMCCC_CONDUIT_HVC);
} else if (!strcmp("smc", method)) {
- set_conduit(PSCI_CONDUIT_SMC);
+ set_conduit(SMCCC_CONDUIT_SMC);
} else {
pr_warn("invalid \"method\" property: %s\n", method);
return -EINVAL;
@@ -749,9 +742,9 @@ int __init psci_acpi_init(void)
pr_info("probing for conduit method from ACPI.\n");
if (acpi_psci_use_hvc())
- set_conduit(PSCI_CONDUIT_HVC);
+ set_conduit(SMCCC_CONDUIT_HVC);
else
- set_conduit(PSCI_CONDUIT_SMC);
+ set_conduit(SMCCC_CONDUIT_SMC);
return psci_probe();
}
diff --git a/include/linux/psci.h b/include/linux/psci.h
index a8a15613c157..def0b89cc05d 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -7,6 +7,7 @@
#ifndef __LINUX_PSCI_H
#define __LINUX_PSCI_H
+#include <linux/arm-smccc.h>
#include <linux/init.h>
#include <linux/types.h>
@@ -18,12 +19,6 @@ bool psci_tos_resident_on(int cpu);
int psci_cpu_init_idle(unsigned int cpu);
int psci_cpu_suspend_enter(unsigned long index);
-enum psci_conduit {
- PSCI_CONDUIT_NONE,
- PSCI_CONDUIT_SMC,
- PSCI_CONDUIT_HVC,
-};
-
enum smccc_version {
SMCCC_VERSION_1_0,
SMCCC_VERSION_1_1,
@@ -38,7 +33,7 @@ struct psci_operations {
int (*affinity_info)(unsigned long target_affinity,
unsigned long lowest_affinity_level);
int (*migrate_info_type)(void);
- enum psci_conduit conduit;
+ enum arm_smccc_conduit conduit;
enum smccc_version smccc_version;
};
--
2.11.0
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^ permalink raw reply related
* [PATCHv3 5/6] firmware: arm_sdei: use common SMCCC_CONDUIT_*
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
Now that we have common definitions for SMCCC conduits, move the SDEI
code over to them, and remove the SDEI-specific definitions.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: James Morse <james.morse@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
---
arch/arm64/kernel/sdei.c | 3 ++-
drivers/firmware/arm_sdei.c | 12 ++++++------
include/linux/arm_sdei.h | 6 ------
3 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/kernel/sdei.c b/arch/arm64/kernel/sdei.c
index ea94cf8f9dc6..d6259dac62b6 100644
--- a/arch/arm64/kernel/sdei.c
+++ b/arch/arm64/kernel/sdei.c
@@ -2,6 +2,7 @@
// Copyright (C) 2017 Arm Ltd.
#define pr_fmt(fmt) "sdei: " fmt
+#include <linux/arm-smccc.h>
#include <linux/arm_sdei.h>
#include <linux/hardirq.h>
#include <linux/irqflags.h>
@@ -161,7 +162,7 @@ unsigned long sdei_arch_get_entry_point(int conduit)
return 0;
}
- sdei_exit_mode = (conduit == CONDUIT_HVC) ? SDEI_EXIT_HVC : SDEI_EXIT_SMC;
+ sdei_exit_mode = (conduit == SMCCC_CONDUIT_HVC) ? SDEI_EXIT_HVC : SDEI_EXIT_SMC;
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
if (arm64_kernel_unmapped_at_el0()) {
diff --git a/drivers/firmware/arm_sdei.c b/drivers/firmware/arm_sdei.c
index 9cd70d1a5622..a479023fa036 100644
--- a/drivers/firmware/arm_sdei.c
+++ b/drivers/firmware/arm_sdei.c
@@ -967,29 +967,29 @@ static int sdei_get_conduit(struct platform_device *pdev)
if (np) {
if (of_property_read_string(np, "method", &method)) {
pr_warn("missing \"method\" property\n");
- return CONDUIT_INVALID;
+ return SMCCC_CONDUIT_NONE;
}
if (!strcmp("hvc", method)) {
sdei_firmware_call = &sdei_smccc_hvc;
- return CONDUIT_HVC;
+ return SMCCC_CONDUIT_HVC;
} else if (!strcmp("smc", method)) {
sdei_firmware_call = &sdei_smccc_smc;
- return CONDUIT_SMC;
+ return SMCCC_CONDUIT_SMC;
}
pr_warn("invalid \"method\" property: %s\n", method);
} else if (IS_ENABLED(CONFIG_ACPI) && !acpi_disabled) {
if (acpi_psci_use_hvc()) {
sdei_firmware_call = &sdei_smccc_hvc;
- return CONDUIT_HVC;
+ return SMCCC_CONDUIT_HVC;
} else {
sdei_firmware_call = &sdei_smccc_smc;
- return CONDUIT_SMC;
+ return SMCCC_CONDUIT_SMC;
}
}
- return CONDUIT_INVALID;
+ return SMCCC_CONDUIT_NONE;
}
static int sdei_probe(struct platform_device *pdev)
diff --git a/include/linux/arm_sdei.h b/include/linux/arm_sdei.h
index 3305ea7f9dc7..0a241c5c911d 100644
--- a/include/linux/arm_sdei.h
+++ b/include/linux/arm_sdei.h
@@ -5,12 +5,6 @@
#include <uapi/linux/arm_sdei.h>
-enum sdei_conduit_types {
- CONDUIT_INVALID = 0,
- CONDUIT_SMC,
- CONDUIT_HVC,
-};
-
#include <acpi/ghes.h>
#ifdef CONFIG_ARM_SDE_INTERFACE
--
2.11.0
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^ permalink raw reply related
* [PATCHv3 6/6] smccc: make 1.1 macros value-returning
From: Mark Rutland @ 2019-08-09 13:22 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, lorenzo.pieralisi, suzuki.poulose, marc.zyngier,
catalin.marinas, will.deacon, linux, james.morse, robin.murphy
In-Reply-To: <20190809132245.43505-1-mark.rutland@arm.com>
The arm_smccc_1_1_{smc,hvc}() macros for inline invocation take a res
pointer as their final argument, matching the out-of-line SMCCC
invocation functions.
However, the inline invocation macros are variadic, so it's easy to mess
up passsing the correct parameters.
Instead, let's make them value-returning, which is less confusing.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
---
arch/arm/mm/proc-v7-bugs.c | 12 +++++------
arch/arm64/kernel/cpu_errata.c | 24 ++++++++++-----------
arch/arm64/kvm/hyp/switch.c | 4 ++--
include/linux/arm-smccc.h | 49 +++++++++++++++++++-----------------------
4 files changed, 42 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c
index 54d87506d3b5..6ceee88b1ffc 100644
--- a/arch/arm/mm/proc-v7-bugs.c
+++ b/arch/arm/mm/proc-v7-bugs.c
@@ -28,12 +28,12 @@ static void harden_branch_predictor_iciallu(void)
static void __maybe_unused call_smc_arch_workaround_1(void)
{
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL);
+ arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1);
}
static void __maybe_unused call_hvc_arch_workaround_1(void)
{
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL);
+ arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1);
}
static void cpu_v7_spectre_init(void)
@@ -76,8 +76,8 @@ static void cpu_v7_spectre_init(void)
switch (arm_smccc_1_1_get_conduit()) {
case SMCCC_CONDUIT_HVC:
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_1, &res);
+ res = arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_1);
if ((int)res.a0 != 0)
break;
per_cpu(harden_branch_predictor_fn, cpu) =
@@ -87,8 +87,8 @@ static void cpu_v7_spectre_init(void)
break;
case SMCCC_CONDUIT_SMC:
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_1, &res);
+ res = arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_1);
if ((int)res.a0 != 0)
break;
per_cpu(harden_branch_predictor_fn, cpu) =
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 6ee09bca82f8..8d4e7d3514b4 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -169,12 +169,12 @@ static void install_bp_hardening_cb(bp_hardening_cb_t fn,
static void call_smc_arch_workaround_1(void)
{
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL);
+ arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_1);
}
static void call_hvc_arch_workaround_1(void)
{
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1, NULL);
+ arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_1);
}
static void qcom_link_stack_sanitization(void)
@@ -211,8 +211,8 @@ static int detect_harden_bp_fw(void)
switch (arm_smccc_1_1_get_conduit()) {
case SMCCC_CONDUIT_HVC:
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_1, &res);
+ res = arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_1);
switch ((int)res.a0) {
case 1:
/* Firmware says we're just fine */
@@ -229,8 +229,8 @@ static int detect_harden_bp_fw(void)
break;
case SMCCC_CONDUIT_SMC:
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_1, &res);
+ res = arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_1);
switch ((int)res.a0) {
case 1:
/* Firmware says we're just fine */
@@ -347,11 +347,11 @@ void arm64_set_ssbd_mitigation(bool state)
switch (arm_smccc_1_1_get_conduit()) {
case SMCCC_CONDUIT_HVC:
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_2, state, NULL);
+ arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_WORKAROUND_2, state);
break;
case SMCCC_CONDUIT_SMC:
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, state, NULL);
+ arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, state);
break;
default:
@@ -386,13 +386,13 @@ static bool has_ssbd_mitigation(const struct arm64_cpu_capabilities *entry,
switch (arm_smccc_1_1_get_conduit()) {
case SMCCC_CONDUIT_HVC:
- arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_2, &res);
+ res = arm_smccc_1_1_hvc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_2);
break;
case SMCCC_CONDUIT_SMC:
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
- ARM_SMCCC_ARCH_WORKAROUND_2, &res);
+ res = arm_smccc_1_1_smc(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
+ ARM_SMCCC_ARCH_WORKAROUND_2);
break;
default:
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index adaf266d8de8..ac8351a57c29 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b/arch/arm64/kvm/hyp/switch.c
@@ -479,7 +479,7 @@ static void __hyp_text __set_guest_arch_workaround_state(struct kvm_vcpu *vcpu)
*/
if (__needs_ssbd_off(vcpu) &&
__hyp_this_cpu_read(arm64_ssbd_callback_required))
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, 0, NULL);
+ arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, 0);
#endif
}
@@ -491,7 +491,7 @@ static void __hyp_text __set_host_arch_workaround_state(struct kvm_vcpu *vcpu)
*/
if (__needs_ssbd_off(vcpu) &&
__hyp_this_cpu_read(arm64_ssbd_callback_required))
- arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, 1, NULL);
+ arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2, 1);
#endif
}
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
index df01a8579034..1e0bcb292d17 100644
--- a/include/linux/arm-smccc.h
+++ b/include/linux/arm-smccc.h
@@ -177,7 +177,7 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
#endif
-#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
+#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, x, ...) x
#define __count_args(...) \
___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
@@ -204,58 +204,54 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
#define __constraint_read_6 __constraint_read_5, "r" (r6)
#define __constraint_read_7 __constraint_read_6, "r" (r7)
-#define __declare_arg_0(a0, res) \
- struct arm_smccc_res *___res = res; \
+#define __declare_arg_0(a0) \
register unsigned long r0 asm("r0") = (u32)a0; \
register unsigned long r1 asm("r1"); \
register unsigned long r2 asm("r2"); \
register unsigned long r3 asm("r3")
-#define __declare_arg_1(a0, a1, res) \
+#define __declare_arg_1(a0, a1) \
typeof(a1) __a1 = a1; \
- struct arm_smccc_res *___res = res; \
register unsigned long r0 asm("r0") = (u32)a0; \
register unsigned long r1 asm("r1") = __a1; \
register unsigned long r2 asm("r2"); \
register unsigned long r3 asm("r3")
-#define __declare_arg_2(a0, a1, a2, res) \
+#define __declare_arg_2(a0, a1, a2) \
typeof(a1) __a1 = a1; \
typeof(a2) __a2 = a2; \
- struct arm_smccc_res *___res = res; \
register unsigned long r0 asm("r0") = (u32)a0; \
register unsigned long r1 asm("r1") = __a1; \
register unsigned long r2 asm("r2") = __a2; \
register unsigned long r3 asm("r3")
-#define __declare_arg_3(a0, a1, a2, a3, res) \
+#define __declare_arg_3(a0, a1, a2, a3) \
typeof(a1) __a1 = a1; \
typeof(a2) __a2 = a2; \
typeof(a3) __a3 = a3; \
- struct arm_smccc_res *___res = res; \
register unsigned long r0 asm("r0") = (u32)a0; \
register unsigned long r1 asm("r1") = __a1; \
register unsigned long r2 asm("r2") = __a2; \
register unsigned long r3 asm("r3") = __a3
-#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
+#define __declare_arg_4(a0, a1, a2, a3, a4) \
typeof(a4) __a4 = a4; \
- __declare_arg_3(a0, a1, a2, a3, res); \
+ __declare_arg_3(a0, a1, a2, a3); \
register unsigned long r4 asm("r4") = __a4
-#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
+#define __declare_arg_5(a0, a1, a2, a3, a4, a5) \
typeof(a5) __a5 = a5; \
- __declare_arg_4(a0, a1, a2, a3, a4, res); \
+ __declare_arg_4(a0, a1, a2, a3, a4); \
register unsigned long r5 asm("r5") = __a5
-#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
+#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6) \
typeof(a6) __a6 = a6; \
- __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
+ __declare_arg_5(a0, a1, a2, a3, a4, a5); \
register unsigned long r6 asm("r6") = __a6
-#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
+#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7) \
typeof(a7) __a7 = a7; \
- __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
+ __declare_arg_6(a0, a1, a2, a3, a4, a5, a6); \
register unsigned long r7 asm("r7") = __a7
#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
@@ -273,22 +269,21 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
* makes it stick.
*/
#define __arm_smccc_1_1(inst, ...) \
- do { \
+ ({ \
__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
asm volatile(inst "\n" \
__constraints(__count_args(__VA_ARGS__))); \
- if (___res) \
- *___res = (typeof(*___res)){r0, r1, r2, r3}; \
- } while (0)
+ (struct arm_smccc_res){ r0, r1, r2, r3 }; \
+ })
/*
* arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
*
- * This is a variadic macro taking one to eight source arguments, and
- * an optional return structure.
+ * This is a variadic macro taking one to eight source arguments.
*
* @a0-a7: arguments passed in registers 0 to 7
- * @res: result values from registers 0 to 3
+ *
+ * returns result values from registers 0 to 3
*
* This macro is used to make SMC calls following SMC Calling Convention v1.1.
* The content of the supplied param are copied to registers 0 to 7 prior
@@ -300,11 +295,11 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
/*
* arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
*
- * This is a variadic macro taking one to eight source arguments, and
- * an optional return structure.
+ * This is a variadic macro taking one to eight source arguments.
*
* @a0-a7: arguments passed in registers 0 to 7
- * @res: result values from registers 0 to 3
+ *
+ * returns result values from registers 0 to 3
*
* This macro is used to make HVC calls following SMC Calling Convention v1.1.
* The content of the supplied param are copied to registers 0 to 7 prior
--
2.11.0
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^ permalink raw reply related
* Re: [RFC V2 0/1] mm/debug: Add tests for architecture exported page table helpers
From: Matthew Wilcox @ 2019-08-09 13:52 UTC (permalink / raw)
To: Anshuman Khandual
Cc: Mark Rutland, linux-ia64, linux-sh, Peter Zijlstra, James Hogan,
Tetsuo Handa, Heiko Carstens, Michal Hocko, linux-mm, Dave Hansen,
Paul Mackerras, sparclinux, Thomas Gleixner, linux-s390,
Michael Ellerman, x86, Russell King - ARM Linux, Steven Price,
Jason Gunthorpe, linux-arm-kernel, linux-snps-arc, Kees Cook,
Masahiro Yamada, Mark Brown, Dan Williams, Vlastimil Babka,
Sri Krishna chowdary, Ard Biesheuvel, Greg Kroah-Hartman,
linux-mips, Ralf Baechle, linux-kernel, Paul Burton,
Mike Rapoport, Vineet Gupta, Martin Schwidefsky, Andrew Morton,
linuxppc-dev, David S. Miller
In-Reply-To: <a5aab7ff-f7fd-9cc1-6e37-e4185eee65ac@arm.com>
On Fri, Aug 09, 2019 at 04:05:07PM +0530, Anshuman Khandual wrote:
> On 08/09/2019 03:46 PM, Matthew Wilcox wrote:
> > On Fri, Aug 09, 2019 at 01:03:17PM +0530, Anshuman Khandual wrote:
> >> Should alloc_gigantic_page() be made available as an interface for general
> >> use in the kernel. The test module here uses very similar implementation from
> >> HugeTLB to allocate a PUD aligned memory block. Similar for mm_alloc() which
> >> needs to be exported through a header.
> >
> > Why are you allocating memory at all instead of just using some
> > known-to-exist PFNs like I suggested?
>
> We needed PFN to be PUD aligned for pfn_pud() and PMD aligned for mk_pmd().
> Now walking the kernel page table for a known symbol like kernel_init()
I didn't say to walk the kernel page table. I said to call virt_to_pfn()
for a known symbol like kernel_init().
> as you had suggested earlier we might encounter page table page entries at PMD
> and PUD which might not be PMD or PUD aligned respectively. It seemed to me
> that alignment requirement is applicable only for mk_pmd() and pfn_pud()
> which create large mappings at those levels but that requirement does not
> exist for page table pages pointing to next level. Is not that correct ? Or
> I am missing something here ?
Just clear the bottom bits off the PFN until you get a PMD or PUD aligned
PFN. It's really not hard.
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^ permalink raw reply
* Re: [PATCH 9/9] arm64: Retrieve stolen time as paravirtualized guest
From: Zenghui Yu @ 2019-08-09 13:51 UTC (permalink / raw)
To: Steven Price
Cc: kvm, linux-doc, Catalin Marinas, Russell King, linux-kernel,
Marc Zyngier, Paolo Bonzini, Will Deacon, kvmarm,
linux-arm-kernel
In-Reply-To: <20190802145017.42543-10-steven.price@arm.com>
On 2019/8/2 22:50, Steven Price wrote:
> Enable paravirtualization features when running under a hypervisor
> supporting the PV_TIME_ST hypercall.
>
> For each (v)CPU, we ask the hypervisor for the location of a shared
> page which the hypervisor will use to report stolen time to us. We set
> pv_time_ops to the stolen time function which simply reads the stolen
> value from the shared page for a VCPU. We guarantee single-copy
> atomicity using READ_ONCE which means we can also read the stolen
> time for another VCPU than the currently running one while it is
> potentially being updated by the hypervisor.
>
> Signed-off-by: Steven Price <steven.price@arm.com>
> ---
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/kvm.c | 155 +++++++++++++++++++++++++++++++++++++
> include/linux/cpuhotplug.h | 1 +
> 3 files changed, 157 insertions(+)
> create mode 100644 arch/arm64/kernel/kvm.c
>
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 478491f07b4f..eb36edf9b930 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -63,6 +63,7 @@ obj-$(CONFIG_CRASH_CORE) += crash_core.o
> obj-$(CONFIG_ARM_SDE_INTERFACE) += sdei.o
> obj-$(CONFIG_ARM64_SSBD) += ssbd.o
> obj-$(CONFIG_ARM64_PTR_AUTH) += pointer_auth.o
> +obj-$(CONFIG_PARAVIRT) += kvm.o
>
> obj-y += vdso/ probes/
> obj-$(CONFIG_COMPAT_VDSO) += vdso32/
> diff --git a/arch/arm64/kernel/kvm.c b/arch/arm64/kernel/kvm.c
> new file mode 100644
> index 000000000000..245398c79dae
> --- /dev/null
> +++ b/arch/arm64/kernel/kvm.c
> @@ -0,0 +1,155 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (C) 2019 Arm Ltd.
> +
> +#define pr_fmt(fmt) "kvmarm-pv: " fmt
> +
> +#include <linux/arm-smccc.h>
> +#include <linux/cpuhotplug.h>
> +#include <linux/io.h>
> +#include <linux/printk.h>
> +#include <linux/psci.h>
> +#include <linux/reboot.h>
> +#include <linux/slab.h>
> +
> +#include <asm/paravirt.h>
> +#include <asm/pvclock-abi.h>
> +#include <asm/smp_plat.h>
> +
> +struct kvmarm_stolen_time_region {
> + struct pvclock_vcpu_stolen_time_info *kaddr;
> +};
> +
> +static DEFINE_PER_CPU(struct kvmarm_stolen_time_region, stolen_time_region);
> +
> +static bool steal_acc = true;
> +static int __init parse_no_stealacc(char *arg)
> +{
> + steal_acc = false;
> + return 0;
> +}
> +early_param("no-steal-acc", parse_no_stealacc);
> +
> +/* return stolen time in ns by asking the hypervisor */
> +static u64 kvm_steal_clock(int cpu)
> +{
> + struct kvmarm_stolen_time_region *reg;
> +
> + reg = per_cpu_ptr(&stolen_time_region, cpu);
> + if (!reg->kaddr) {
> + pr_warn_once("stolen time enabled but not configured for cpu %d\n",
> + cpu);
> + return 0;
> + }
> +
> + return le64_to_cpu(READ_ONCE(reg->kaddr->stolen_time));
> +}
> +
> +static int disable_stolen_time_current_cpu(void)
> +{
> + struct kvmarm_stolen_time_region *reg;
> +
> + reg = this_cpu_ptr(&stolen_time_region);
> + if (!reg->kaddr)
> + return 0;
> +
> + memunmap(reg->kaddr);
> + memset(reg, 0, sizeof(*reg));
> +
> + return 0;
> +}
> +
> +static int stolen_time_dying_cpu(unsigned int cpu)
> +{
> + return disable_stolen_time_current_cpu();
> +}
> +
> +static int init_stolen_time_cpu(unsigned int cpu)
> +{
> + struct kvmarm_stolen_time_region *reg;
> + struct arm_smccc_res res;
> +
> + reg = this_cpu_ptr(&stolen_time_region);
> +
> + if (reg->kaddr)
> + return 0;
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_HV_PV_TIME_ST, &res);
> +
> + if ((long)res.a0 < 0)
> + return -EINVAL;
Hi Steven,
Since userspace is not involved yet (right?), no one will create the
PV_TIME device for guest (and no one will specify the IPA of the shared
stolen time region), and I guess we will get a "not supported" error
here.
So what should we do if we want to test this series now? Any userspace
tools? If no, do you have any plans for userspace developing? ;-)
Thanks,
zenghui
> +
> + reg->kaddr = memremap(res.a0,
> + sizeof(struct pvclock_vcpu_stolen_time_info),
> + MEMREMAP_WB);
> +
> + if (reg->kaddr == NULL) {
> + pr_warn("Failed to map stolen time data structure\n");
> + return -EINVAL;
> + }
> +
> + if (le32_to_cpu(reg->kaddr->revision) != 0 ||
> + le32_to_cpu(reg->kaddr->attributes) != 0) {
> + pr_warn("Unexpected revision or attributes in stolen time data\n");
> + return -ENXIO;
> + }
> +
> + return 0;
> +}
> +
> +static int kvm_arm_init_stolen_time(void)
> +{
> + int ret;
> +
> + ret = cpuhp_setup_state(CPUHP_AP_ARM_KVMPV_STARTING,
> + "hypervisor/kvmarm/pv:starting",
> + init_stolen_time_cpu, stolen_time_dying_cpu);
> + if (ret < 0)
> + return ret;
> + return 0;
> +}
> +
> +static bool has_kvm_steal_clock(void)
> +{
> + struct arm_smccc_res res;
> +
> + /* To detect the presence of PV time support we require SMCCC 1.1+ */
> + if (psci_ops.smccc_version < SMCCC_VERSION_1_1)
> + return false;
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID,
> + ARM_SMCCC_HV_PV_FEATURES, &res);
> +
> + if (res.a0 != SMCCC_RET_SUCCESS)
> + return false;
> +
> + arm_smccc_1_1_invoke(ARM_SMCCC_HV_PV_FEATURES,
> + ARM_SMCCC_HV_PV_TIME_ST, &res);
> +
> + if (res.a0 != SMCCC_RET_SUCCESS)
> + return false;
> +
> + return true;
> +}
> +
> +static int __init kvm_guest_init(void)
> +{
> + int ret = 0;
> +
> + if (!has_kvm_steal_clock())
> + return 0;
> +
> + ret = kvm_arm_init_stolen_time();
> + if (ret)
> + return ret;
> +
> + pv_ops.time.steal_clock = kvm_steal_clock;
> +
> + static_key_slow_inc(¶virt_steal_enabled);
> + if (steal_acc)
> + static_key_slow_inc(¶virt_steal_rq_enabled);
> +
> + pr_info("using stolen time PV\n");
> +
> + return 0;
> +}
> +early_initcall(kvm_guest_init);
> diff --git a/include/linux/cpuhotplug.h b/include/linux/cpuhotplug.h
> index 068793a619ca..89d75edb5750 100644
> --- a/include/linux/cpuhotplug.h
> +++ b/include/linux/cpuhotplug.h
> @@ -136,6 +136,7 @@ enum cpuhp_state {
> /* Must be the last timer callback */
> CPUHP_AP_DUMMY_TIMER_STARTING,
> CPUHP_AP_ARM_XEN_STARTING,
> + CPUHP_AP_ARM_KVMPV_STARTING,
> CPUHP_AP_ARM_CORESIGHT_STARTING,
> CPUHP_AP_ARM64_ISNDEP_STARTING,
> CPUHP_AP_SMPCFD_DYING,
>
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^ permalink raw reply
* Re: [PATCH v3 02/21] ARM: dts: imx7-colibri: disable HS400
From: Marcel Ziswiler @ 2019-08-09 14:05 UTC (permalink / raw)
To: Max Krummenacher, stefan@agner.ch, Philippe Schenker,
mark.rutland@arm.com, devicetree@vger.kernel.org,
michal.vokac@ysoft.com, shawnguo@kernel.org, festevam@gmail.com,
robh+dt@kernel.org
Cc: Stefan Agner, s.hauer@pengutronix.de,
linux-kernel@vger.kernel.org, linux-imx@nxp.com,
kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190807082556.5013-3-philippe.schenker@toradex.com>
On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> From: Stefan Agner <stefan.agner@toradex.com>
>
> Force HS200 by masking bit 63 of the SDHCI capability register.
> The i.MX ESDHC driver uses SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. With
> that the stack checks bit 63 to descide whether HS400 is available.
> Using sdhci-caps-mask allows to mask bit 63. The stack then selects
> HS200 as operating mode.
>
> This prevents rare communication errors with minimal effect on
> performance:
> sdhci-esdhc-imx 30b60000.usdhc: warning! HS400 strobe DLL
> status REF not lock!
>
> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index f1c1971f2160..f7c9ce5bed47 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -325,6 +325,7 @@
> vmmc-supply = <®_module_3v3>;
> vqmmc-supply = <®_DCDC3>;
> non-removable;
> + sdhci-caps-mask = <0x80000000 0x0>;
> };
>
> &iomuxc {
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^ permalink raw reply
* Re: [PATCH v3 03/21] ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
From: Marcel Ziswiler @ 2019-08-09 14:07 UTC (permalink / raw)
To: Max Krummenacher, stefan@agner.ch, Philippe Schenker,
mark.rutland@arm.com, devicetree@vger.kernel.org,
michal.vokac@ysoft.com, shawnguo@kernel.org, festevam@gmail.com,
robh+dt@kernel.org
Cc: linux-imx@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20190807082556.5013-4-philippe.schenker@toradex.com>
On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
> compatible for CAN bus use with several modules from the Colibri
> family.
> Add Better drivestrength and also add flexcan2.
>
> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 35 ++++++++++++++++++++++++---
> --
> 1 file changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index f7c9ce5bed47..52046085ce6f 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -117,6 +117,18 @@
> fsl,magic-packet;
> };
>
> +&flexcan1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + status = "disabled";
> +};
> +
> +&flexcan2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + status = "disabled";
> +};
> +
> &gpmi {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gpmi_nand>;
> @@ -330,12 +342,11 @@
>
> &iomuxc {
> pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4>;
> + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
> &pinctrl_gpio4
> + &pinctrl_gpio7>;
>
> pinctrl_gpio1: gpio1-grp {
> fsl,pins = <
> - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74
> /* SODIMM 55 */
> - MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74
> /* SODIMM 63 */
> MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /*
> SODIMM 77 */
> MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14
> /* SODIMM 89 */
> MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74
> /* SODIMM 91 */
> @@ -416,6 +427,13 @@
> >;
> };
>
> + pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
> fsl,pins = <
> MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
> @@ -459,10 +477,17 @@
> >;
> };
>
> + pinctrl_flexcan1: flexcan1-grp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79
> /* SODIMM 55 */
> + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79
> /* SODIMM 63 */
> + >;
> + };
> +
> pinctrl_flexcan2: flexcan2-grp {
> fsl,pins = <
> - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
> - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
> + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /*
> SODIMM 188 */
> + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /*
> SODIMM 178 */
> >;
> };
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^ permalink raw reply
* Re: [PATCH v7 1/2] arm64: Define Documentation/arm64/tagged-address-abi.rst
From: Dave Hansen @ 2019-08-09 14:10 UTC (permalink / raw)
To: Catalin Marinas
Cc: linux-arch, linux-doc, Szabolcs Nagy, Andrey Konovalov,
Kevin Brodsky, Will Deacon, Vincenzo Frascino, linux-arm-kernel
In-Reply-To: <20190808172730.GC37129@arrakis.emea.arm.com>
On 8/8/19 10:27 AM, Catalin Marinas wrote:
> On Wed, Aug 07, 2019 at 01:38:16PM -0700, Dave Hansen wrote:
> Extending the interface is still possible even with the current
> proposal, by changing arg2 etc. We also don't seem to be consistent in
> sys_prctl().
We are not consistent because it took a long time to learn this lesson,
but I think this is a best-practice that we follow for new ones.
>> Also, shouldn't this be converted over to an arch_prctl()?
>
> What do you mean by arch_prctl()? We don't have such thing, apart from
> maybe arch_prctl_spec_ctrl_*(). We achieve the same thing with the
> {SET,GET}_TAGGED_ADDR_CTRL macros. They could be renamed to
> arch_prctl_tagged_addr_{set,get} or something but I don't see much
> point.
Silly me. We have an x86-specific:
SYSCALL_DEFINE2(arch_prctl, int , option, unsigned long , arg2)
I guess there's no ARM equivalent so you're stuck with the generic one.
> What would be better (for a separate patch series) is to clean up
> sys_prctl() and move the arch-specific options into separate
> arch_prctl() under arch/*/kernel/. But it's not really for this series.
I think it does make sense for truly arch-specific features to stay out
of the arch-generic prctl(). Yes, I know I've personally violated this
in the past. :)
>> What is the scope of these prctl()'s? Are they thread-scoped or
>> process-scoped? Can two threads in the same process run with different
>> tagging ABI modes?
>
> Good point. They are thread-scoped and this should be made clear in the
> doc. Two threads can have different modes.
>
> The expectation is that this is invoked early during process start (by
> the dynamic loader or libc init) while in single-thread mode and
> subsequent threads will inherit the same mode. However, other uses are
> possible.
If that's the expectation, it would be really nice to codify it.
Basically, you can't enable the feature if another thread is already
been forked off.
> That said, do we have a precedent for changing user ABI from the kernel
> cmd line? 'noexec32', 'vsyscall' I think come close. With the prctl()
> for opt-in, controlling this from the cmd line is not too bad (though my
> preference is still for the sysctl).
There are certainly user-visible things like being able to select
various CPU features.
>>> +When a process has successfully enabled the new ABI by invoking
>>> +prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE), the following
>>> +behaviours are guaranteed:
>>> +
>>> +- Every currently available syscall, except the cases mentioned in section
>>> + 3, can accept any valid tagged pointer. The same rule is applicable to
>>> + any syscall introduced in the future.
>>> +
>>> +- The syscall behaviour is undefined for non valid tagged pointers.
>>
>> Do you really mean "undefined"? I mean, a bad pointer is a bad pointer.
>> Why should it matter if it's a tagged bad pointer or an untagged bad
>> pointer?
>
> Szabolcs already replied here. We may have tagged pointers that can be
> dereferenced just fine but being passed to the kernel may not be well
> defined (e.g. some driver doing a find_vma() that fails unless it
> explicitly untags the address). It's as undefined as the current
> behaviour (without these patches) guarantees.
It might just be nicer to point out what this features *changes* about
invalid pointer handling, which is nothing. :) Maybe:
The syscall behaviour for invalid pointers is the same for both
tagged and untagged pointers.
>>> +- prctl(PR_SET_MM, ``*``, ...) other than arg2 PR_SET_MM_MAP and
>>> + PR_SET_MM_MAP_SIZE.
>>> +
>>> +- prctl(PR_SET_MM, PR_SET_MM_MAP{,_SIZE}, ...) struct prctl_mm_map fields.
>>> +
>>> +Any attempt to use non-zero tagged pointers will lead to undefined
>>> +behaviour.
>>
>> I wonder if you want to generalize this a bit. I think you're saying
>> that parts of the ABI that modify the *layout* of the address space
>> never accept tagged pointers.
>
> I guess our difficulty in specifying this may have been caused by
> over-generalising. For example, madvise/mprotect came under the same
> category but there is a use-case for malloc'ed pointers (and tagged) to
> the kernel (e.g. MADV_DONTNEED). If we can restrict the meaning to
> address space *layout* manipulation, we'd have mmap/mremap/munmap,
> brk/sbrk, prctl(PR_SET_MM). Did I miss anything?. Other related syscalls
> like mprotect/madvise preserve the layout while only changing permissions,
> backing store, so the would be allowed to accept tags.
shmat() comes to mind. I also did a quick grep for mmap_sem taken for
write and didn't see anything else obvious jump out at me.
>> It looks like the TAG_SHIFT and tag size are pretty baked into the
>> aarch64 architecture. But, are you confident that no future
>> implementations will want different positions or sizes? (obviously
>> controlled by other TCR_EL1 bits)
>
> For the top-byte-ignore (TBI), that's been baked in the architecture
> since ARMv8.0 and we'll have to keep the backwards compatible mode. As
> the name implies, it's the top byte of the address and that's what the
> document above refers to.
>
> With MTE, I can't exclude other configurations in the future but I'd
> expect the kernel to present the option as a new HWCAP and the user to
> explicitly opt in via a new prctl() flag. I seriously doubt we'd break
> existing binaries. So, yes TAG_SHIFT may be different but so would the
> prctl() above.
Basically, what you have is a "turn tagging on" and "turn tagging off"
call which are binary: all on or all off. How about exposing a mask:
/* Replace hard-coded mask size/position: */
unsigned long mask = prctl(GET_POSSIBLE_TAGGED_ADDR_BITS);
if (mask == 0)
// no tagging is supported obviously
prctl(SET_TAGGED_ADDR_BITS, mask);
// now userspace knows via 'mask' where the tag bits are
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^ permalink raw reply
* Re: [PATCH 05/14] gpio: lpc32xx: allow building on non-lpc32xx targets
From: Arnd Bergmann @ 2019-08-09 14:18 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Andrew Lunn, LINUXWATCHDOG, LKML, Jason Cooper, David S. Miller,
Greg Kroah-Hartman, Gregory Clement, USB list, Russell King,
Vladimir Zapolskiy, linux-gpio, soc, netdev, Alan Stern,
Guenter Roeck, linux-serial, Sylvain Lemieux, Lee Jones,
Linus Walleij, arm-soc, Sebastian Hesselbarth
In-Reply-To: <CAMpxmJUdSnp0QNwWB0rJ1opFrYs9R2KSVS64Tz8X5GDYAJYLpg@mail.gmail.com>
On Mon, Aug 5, 2019 at 10:28 AM Bartosz Golaszewski
<bgolaszewski@baylibre.com> wrote:
>
> pt., 2 sie 2019 o 13:20 Arnd Bergmann <arnd@arndb.de> napisał(a):
> >
> > On Fri, Aug 2, 2019 at 9:10 AM Bartosz Golaszewski
> > <bgolaszewski@baylibre.com> wrote:
> > > > -#include <mach/hardware.h>
> > > > -#include <mach/platform.h>
> > > > +#define _GPREG(x) (x)
> > >
> > > What purpose does this macro serve?
> > >
> > > >
> > > > #define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
> > > > #define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
> >
> > In the existing code base, this macro converts a register offset to
> > an __iomem pointer for a gpio register. I changed the definition of the
> > macro here to keep the number of changes down, but I it's just
> > as easy to remove it if you prefer.
>
> Could you just add a comment so that it's clear at first glance?
I ended up removing the macro. With the change to keep the reg_base as
a struct member, this ends up being a relatively small change, and it's
more straightforward that way.
> > > > @@ -167,14 +166,26 @@ struct lpc32xx_gpio_chip {
> > > > struct gpio_regs *gpio_grp;
> > > > };
> > > >
> > > > +void __iomem *gpio_reg_base;
> > >
> > > Any reason why this can't be made part of struct lpc32xx_gpio_chip?
> >
> > It could be, but it's the same for each instance, and not known until
> > probe() time, so the same pointer would need to be copied into each
> > instance that is otherwise read-only.
> >
> > Let me know if you'd prefer me to rework these two things or leave
> > them as they are.
>
> I would prefer not to have global state in the driver, let's just
> store the pointer in the data passed to gpiochip_add_data().
Ok, done.
Arnd
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* Re: [PATCH 05/14] gpio: lpc32xx: allow building on non-lpc32xx targets
From: Arnd Bergmann @ 2019-08-09 14:19 UTC (permalink / raw)
To: Sylvain Lemieux
Cc: Andrew Lunn, LINUXWATCHDOG, Linux Kernel Mailing List,
Jason Cooper, David S. Miller, Greg Kroah-Hartman,
Gregory Clement, USB list, Russell King, Vladimir Zapolskiy,
Bartosz Golaszewski, soc, Alan Stern, Guenter Roeck,
open list:GPIO SUBSYSTEM, Networking, Lee Jones, linux-serial,
Linus Walleij, moderated list:ARM PORT, Sebastian Hesselbarth
In-Reply-To: <CA+rxa6p4gD7+6-aRyd4-V4TvkyMiUh9ueMLc6ggBaDC=LG7fQg@mail.gmail.com>
On Tue, Aug 6, 2019 at 10:02 PM Sylvain Lemieux <slemieux.tyco@gmail.com> wrote:
> >
> > + gpio_reg_base = devm_platform_ioremap_resource(pdev, 0);
> > + if (gpio_reg_base)
> > + return -ENXIO;
>
> The probe function will always return an error.
> Please replace the previous 2 lines with:
> if (IS_ERR(gpio_reg_base))
> return PTR_ERR(gpio_reg_base);
>
> You can add my acked-by and tested-by in the v2 patch.
> Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
> Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Ok, fixed now, along with addressing Bartosz' concerns.
Arnd
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* Re: [PATCH v3 04/21] ARM: dts: imx7-colibri: Add sleep mode to ethernet
From: Marcel Ziswiler @ 2019-08-09 14:20 UTC (permalink / raw)
To: Max Krummenacher, stefan@agner.ch, Philippe Schenker,
mark.rutland@arm.com, devicetree@vger.kernel.org,
michal.vokac@ysoft.com, shawnguo@kernel.org, festevam@gmail.com,
robh+dt@kernel.org
Cc: linux-imx@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20190807082556.5013-5-philippe.schenker@toradex.com>
On Wed, 2019-08-07 at 08:26 +0000, Philippe Schenker wrote:
> Add sleep pinmux to the fec so it can properly sleep.
>
> Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx7-colibri.dtsi | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
> b/arch/arm/boot/dts/imx7-colibri.dtsi
> index 52046085ce6f..a8d992f3e897 100644
> --- a/arch/arm/boot/dts/imx7-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx7-colibri.dtsi
> @@ -101,8 +101,9 @@
> };
>
> &fec1 {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "sleep";
> pinctrl-0 = <&pinctrl_enet1>;
> + pinctrl-1 = <&pinctrl_enet1_sleep>;
> clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
> <&clks IMX7D_ENET_AXI_ROOT_CLK>,
> <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
> @@ -463,6 +464,22 @@
> >;
> };
>
> + pinctrl_enet1_sleep: enet1sleepgrp {
> + fsl,pins = <
> + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4
> 0x0
> + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0
> 0x0
> + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1
> 0x0
> + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5
> 0x0
> +
> + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10
> 0x0
> + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6
> 0x0
> + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7
> 0x0
> + MX7D_PAD_GPIO1_IO12__GPIO1_IO12
> 0x0
> + MX7D_PAD_SD2_CD_B__GPIO5_IO9
> 0x0
> + MX7D_PAD_SD2_WP__GPIO5_IO10
> 0x0
> + >;
> + };
> +
> pinctrl_ecspi3_cs: ecspi3-cs-grp {
> fsl,pins = <
> MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14
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* Re: [PATCH] ARM: defconfig: lpc32xx: enable lpc32xx GPIO driver
From: Arnd Bergmann @ 2019-08-09 14:22 UTC (permalink / raw)
To: Sylvain Lemieux; +Cc: Sylvain Lemieux, Linux ARM, Vladimir Zapolskiy
In-Reply-To: <6913a446-9500-c1cd-a8d6-70eb143fdda0@gmail.com>
On Thu, Aug 8, 2019 at 6:19 PM Sylvain Lemieux <slemieux.tyco@gmail.com> wrote:
> On 8/8/19 11:06 AM, Arnd Bergmann wrote:
> > On Wed, Aug 7, 2019 at 4:06 PM Sylvain Lemieux <slemieux.tyco@gmail.com> wrote:
> >>
> >> From: Sylvain Lemieux <slemieux@tycoint.com>
> >>
> >> The change that allow the multiplatform build for the lpc32xx
> >> platform add a new kernel config for the LPC32XX GPIO driver.
> >>
> >> Cc: Arnd Bergmann <arnd@arndb.de>
> >> Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
> >> ---
> >> Note:
> >> * This patch depend on the following patchset:
> >> ARM: move lpc32xx and dove to multiplatform
> >> https://www.spinics.net/lists/linux-usb/msg183095.html
> >
> > I did not think this was needed, as I added
> >
> > config GPIO_LPC32XX
> > tristate "NXP LPC32XX GPIO support"
> > default ARCH_LPC32XX
> > depends on OF_GPIO && (ARCH_LPC32XX || COMPILE_TEST)
> >
> > so when running 'make lpc32xx_defconfig', I expected the
> > driver to already be enabled. Did I miss something?
> >
> The GPIO driver is enable. This change is optional.
>
> I added this new config to the default LPC32xx defconfig
> to keep in sync with what is done for the other LPC32xx drivers.
>
> All the LPC32xx drivers config option are listed in the defconfig.
Ok, I just removed the 'default ARCH_LPC32XX' now, and added your
line to the gpio driver patch. That way it behaves like all other
lpc32xx drivers and the defconfig line won't disappear after one
runs 'make savedefconfig'.
Arnd
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* Re: [PATCH 02/22] ARM: omap1: make omapfb standalone compilable
From: Bartlomiej Zolnierkiewicz @ 2019-08-09 14:36 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Aaro Koskinen, Tony Lindgren, Greg Kroah-Hartman, Linus Walleij,
Linux Kernel Mailing List, dri-devel, Tomi Valkeinen, linux-omap,
Linux ARM
In-Reply-To: <CAK8P3a3grFEGr33s327yNMabK5=1kCJc3k7y55dhzQx9sTvkyQ@mail.gmail.com>
On 8/9/19 1:43 PM, Arnd Bergmann wrote:
> On Fri, Aug 9, 2019 at 1:32 PM Bartlomiej Zolnierkiewicz
> <b.zolnierkie@samsung.com> wrote:
>> On 8/8/19 11:22 PM, Arnd Bergmann wrote:
>>> The omapfb driver is split into platform specific code for omap1, and
>>> driver code that is also specific to omap1.
>>>
>>> Moving both parts into the driver directory simplifies the structure
>>> and avoids the dependency on certain omap machine header files.
>>>
>>> The interrupt numbers in particular however must not be referenced
>>> directly from the driver to allow building in a multiplatform
>>> configuration, so these have to be passed through resources, is
>>> done for all other omap drivers.
>>>
>>> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>>
>> For fbdev part:
>>
>> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
>
> Thanks for taking a look.
>
>> [ It seems that adding of static inline for omap_set_dma_priority()
>> when ARCH_OMAP=n should be in patch #9 but this is a minor issue. ]
>
> That would have been ok as well, but having the addition here was
> intentional and seems more logical to me as this is where the headers
> get moved around.
I see that this is an optimization for making the patch series more
compact but I think that this addition logically belongs to patch #9
(which adds support for COMPILE_TEST) where the new code is required.
Moreover patch description for patch #2 lacks any comment about this
addition being a preparation for changes in patch #9 so I was quite
puzzled about its purpose when seeing it first.
Therefore please have mercy on the poor/stupid reviewer and don't do
such optimizations intentionally (or at least describe them properly
somewhere).. ;-)
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
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* [PATCH v2 00/13] v2: ARM: move lpc32xx to multiplatform
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: linux-watchdog, Arnd Bergmann, Greg Kroah-Hartman, Linus Walleij,
linux-usb, linux-kernel, Vladimir Zapolskiy, linux-gpio, netdev,
Alan Stern, Guenter Roeck, linux-serial, Sylvain Lemieux,
David S. Miller, linux-arm-kernel
Version 2 contains some minor changes based on earlier feedback
and from the 0day build bot testing on other architectures. The
only patch that changed significantly is the one for the gpio driver.
I would suggest we merge this version into the soc tree directly
if there are no further concerns.
Arnd
Arnd Bergmann (12):
usb: ohci-nxp: enable compile-testing
usb: udc: lpc32xx: allow compile-testing
watchdog: pnx4008_wdt: allow compile-testing
serial: lpc32xx_hs: allow compile-testing
gpio: lpc32xx: allow building on non-lpc32xx targets
net: lpc-enet: factor out iram access
net: lpc-enet: move phy setup into platform code
net: lpc-enet: fix printk format strings
net: lpc-enet: allow compile testing
serial: lpc32xx: allow compile testing
ARM: lpc32xx: clean up header files
ARM: lpc32xx: allow multiplatform build
kbuild test robot (1):
net: lpc-enet: fix badzero.cocci warnings
arch/arm/Kconfig | 17 +--
arch/arm/configs/lpc32xx_defconfig | 2 +
arch/arm/mach-lpc32xx/Kconfig | 11 ++
arch/arm/mach-lpc32xx/common.c | 24 +++-
arch/arm/mach-lpc32xx/common.h | 1 -
arch/arm/mach-lpc32xx/include/mach/board.h | 15 ---
.../mach-lpc32xx/include/mach/entry-macro.S | 28 -----
arch/arm/mach-lpc32xx/include/mach/hardware.h | 25 ----
.../mach-lpc32xx/include/mach/uncompress.h | 50 --------
.../{include/mach/platform.h => lpc32xx.h} | 18 ++-
arch/arm/mach-lpc32xx/pm.c | 3 +-
arch/arm/mach-lpc32xx/serial.c | 33 ++++-
arch/arm/mach-lpc32xx/suspend.S | 3 +-
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile | 2 +-
drivers/gpio/gpio-lpc32xx.c | 118 ++++++++++--------
drivers/net/ethernet/nxp/Kconfig | 2 +-
drivers/net/ethernet/nxp/lpc_eth.c | 45 +++----
drivers/tty/serial/Kconfig | 3 +-
drivers/tty/serial/lpc32xx_hs.c | 37 +-----
drivers/usb/gadget/udc/Kconfig | 3 +-
drivers/usb/gadget/udc/lpc32xx_udc.c | 3 +-
drivers/usb/host/Kconfig | 3 +-
drivers/usb/host/ohci-nxp.c | 25 ++--
drivers/watchdog/Kconfig | 2 +-
drivers/watchdog/pnx4008_wdt.c | 1 -
include/linux/soc/nxp/lpc32xx-misc.h | 33 +++++
27 files changed, 242 insertions(+), 272 deletions(-)
create mode 100644 arch/arm/mach-lpc32xx/Kconfig
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/board.h
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/hardware.h
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/uncompress.h
rename arch/arm/mach-lpc32xx/{include/mach/platform.h => lpc32xx.h} (98%)
create mode 100644 include/linux/soc/nxp/lpc32xx-misc.h
--
2.20.0
Cc: soc@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: linux-gpio@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
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* [PATCH v2 01/13] usb: ohci-nxp: enable compile-testing
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: Felipe Balbi, Arnd Bergmann, Greg Kroah-Hartman, linux-usb,
linux-kernel, Vladimir Zapolskiy, Alan Stern, Sylvain Lemieux,
linux-arm-kernel
In-Reply-To: <20190809144043.476786-1-arnd@arndb.de>
The driver hardcodes a hardware I/O address the way one should
generally not do, and this prevents both compile-testing, and
moving the platform to CONFIG_ARCH_MULTIPLATFORM.
Change the code to be independent of the machine headers
to allow those two. Removing the hardcoded address would
be hard and is not necessary, so leave that in place for now.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/usb/host/Kconfig | 3 ++-
drivers/usb/host/ohci-nxp.c | 25 ++++++++++++++++++-------
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 40b5de597112..73d233d3bf4d 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -441,7 +441,8 @@ config USB_OHCI_HCD_S3C2410
config USB_OHCI_HCD_LPC32XX
tristate "Support for LPC on-chip OHCI USB controller"
- depends on USB_OHCI_HCD && ARCH_LPC32XX
+ depends on USB_OHCI_HCD
+ depends on ARCH_LPC32XX || COMPILE_TEST
depends on USB_ISP1301
default y
---help---
diff --git a/drivers/usb/host/ohci-nxp.c b/drivers/usb/host/ohci-nxp.c
index f5f532601092..c561881d0e79 100644
--- a/drivers/usb/host/ohci-nxp.c
+++ b/drivers/usb/host/ohci-nxp.c
@@ -29,10 +29,7 @@
#include "ohci.h"
-#include <mach/hardware.h>
-
#define USB_CONFIG_BASE 0x31020000
-#define USB_OTG_STAT_CONTROL IO_ADDRESS(USB_CONFIG_BASE + 0x110)
/* USB_OTG_STAT_CONTROL bit defines */
#define TRANSPARENT_I2C_EN (1 << 7)
@@ -122,19 +119,33 @@ static inline void isp1301_vbus_off(void)
static void ohci_nxp_start_hc(void)
{
- unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
+ void __iomem *usb_otg_stat_control = ioremap(USB_CONFIG_BASE + 0x110, 4);
+ unsigned long tmp;
+
+ if (WARN_ON(!usb_otg_stat_control))
+ return;
+
+ tmp = __raw_readl(usb_otg_stat_control) | HOST_EN;
- __raw_writel(tmp, USB_OTG_STAT_CONTROL);
+ __raw_writel(tmp, usb_otg_stat_control);
isp1301_vbus_on();
+
+ iounmap(usb_otg_stat_control);
}
static void ohci_nxp_stop_hc(void)
{
+ void __iomem *usb_otg_stat_control = ioremap(USB_CONFIG_BASE + 0x110, 4);
unsigned long tmp;
+ if (WARN_ON(!usb_otg_stat_control))
+ return;
+
isp1301_vbus_off();
- tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
- __raw_writel(tmp, USB_OTG_STAT_CONTROL);
+ tmp = __raw_readl(usb_otg_stat_control) & ~HOST_EN;
+ __raw_writel(tmp, usb_otg_stat_control);
+
+ iounmap(usb_otg_stat_control);
}
static int ohci_hcd_nxp_probe(struct platform_device *pdev)
--
2.20.0
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* [PATCH v2 02/13] usb: udc: lpc32xx: allow compile-testing
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: Felipe Balbi, Alexandre Belloni, Arnd Bergmann,
Greg Kroah-Hartman, linux-usb, linux-kernel, Vladimir Zapolskiy,
Sylvain Lemieux, linux-arm-kernel
In-Reply-To: <20190809144043.476786-1-arnd@arndb.de>
The only thing that prevents building this driver on other
platforms is the mach/hardware.h include, which is not actually
used here at all, so remove the line and allow CONFIG_COMPILE_TEST.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/usb/gadget/udc/Kconfig | 3 ++-
drivers/usb/gadget/udc/lpc32xx_udc.c | 3 +--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index ef0259a950ba..d354036ff6c8 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -45,7 +45,8 @@ config USB_AT91
config USB_LPC32XX
tristate "LPC32XX USB Peripheral Controller"
- depends on ARCH_LPC32XX && I2C
+ depends on ARCH_LPC32XX || COMPILE_TEST
+ depends on I2C
select USB_ISP1301
help
This option selects the USB device controller in the LPC32xx SoC.
diff --git a/drivers/usb/gadget/udc/lpc32xx_udc.c b/drivers/usb/gadget/udc/lpc32xx_udc.c
index 5f1b14f3e5a0..defe04d52e6d 100644
--- a/drivers/usb/gadget/udc/lpc32xx_udc.c
+++ b/drivers/usb/gadget/udc/lpc32xx_udc.c
@@ -24,6 +24,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/prefetch.h>
#include <linux/proc_fs.h>
#include <linux/slab.h>
#include <linux/usb/ch9.h>
@@ -35,8 +36,6 @@
#include <linux/seq_file.h>
#endif
-#include <mach/hardware.h>
-
/*
* USB device configuration structure
*/
--
2.20.0
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* [PATCH v2 03/13] watchdog: pnx4008_wdt: allow compile-testing
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: linux-watchdog, Arnd Bergmann, linux-kernel, Vladimir Zapolskiy,
linux-arm-kernel, Sylvain Lemieux, Wim Van Sebroeck,
Guenter Roeck
In-Reply-To: <20190809144043.476786-1-arnd@arndb.de>
The only thing that prevents building this driver on other
platforms is the mach/hardware.h include, which is not actually
used here at all, so remove the line and allow CONFIG_COMPILE_TEST.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/watchdog/Kconfig | 2 +-
drivers/watchdog/pnx4008_wdt.c | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 8188963a405b..a45f9e3e442b 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -551,7 +551,7 @@ config OMAP_WATCHDOG
config PNX4008_WATCHDOG
tristate "LPC32XX Watchdog"
- depends on ARCH_LPC32XX
+ depends on ARCH_LPC32XX || COMPILE_TEST
select WATCHDOG_CORE
help
Say Y here if to include support for the watchdog timer
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 7b446b696f2b..e0ea133c1690 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -30,7 +30,6 @@
#include <linux/of.h>
#include <linux/delay.h>
#include <linux/reboot.h>
-#include <mach/hardware.h>
/* WatchDog Timer - Chapter 23 Page 207 */
--
2.20.0
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* [PATCH v2 04/13] serial: lpc32xx_hs: allow compile-testing
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: Arnd Bergmann, Greg Kroah-Hartman, Jiri Slaby, linux-kernel,
Vladimir Zapolskiy, linux-serial, Sylvain Lemieux,
linux-arm-kernel
In-Reply-To: <20190809144043.476786-1-arnd@arndb.de>
The only thing that prevents building this driver on other
platforms is the mach/hardware.h include, which is not actually
used here at all, so remove the line and allow CONFIG_COMPILE_TEST.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/tty/serial/Kconfig | 3 ++-
drivers/tty/serial/lpc32xx_hs.c | 2 --
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 3083dbae35f7..518aac902e4b 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -739,7 +739,8 @@ config SERIAL_PNX8XXX_CONSOLE
config SERIAL_HS_LPC32XX
tristate "LPC32XX high speed serial port support"
- depends on ARCH_LPC32XX && OF
+ depends on ARCH_LPC32XX || COMPILE_TEST
+ depends on OF
select SERIAL_CORE
help
Support for the LPC32XX high speed serial ports (up to 900kbps).
diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c
index f4e27d0ad947..7f14cd8fac47 100644
--- a/drivers/tty/serial/lpc32xx_hs.c
+++ b/drivers/tty/serial/lpc32xx_hs.c
@@ -25,8 +25,6 @@
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/of.h>
-#include <mach/platform.h>
-#include <mach/hardware.h>
/*
* High Speed UART register offsets
--
2.20.0
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* [PATCH v2 05/13] gpio: lpc32xx: allow building on non-lpc32xx targets
From: Arnd Bergmann @ 2019-08-09 14:40 UTC (permalink / raw)
To: soc
Cc: Arnd Bergmann, linux-gpio, Linus Walleij, linux-kernel,
Vladimir Zapolskiy, Bartosz Golaszewski, Sylvain Lemieux,
linux-arm-kernel
In-Reply-To: <20190809144043.476786-1-arnd@arndb.de>
The driver uses hardwire MMIO addresses instead of the data
that is passed in device tree. Change it over to only
hardcode the register offset values and allow compile-testing.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/configs/lpc32xx_defconfig | 1 +
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile | 2 +-
drivers/gpio/gpio-lpc32xx.c | 118 +++++++++++++++++------------
4 files changed, 77 insertions(+), 51 deletions(-)
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
index 0cdc6c7974b3..3772d5a8975a 100644
--- a/arch/arm/configs/lpc32xx_defconfig
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -93,6 +93,7 @@ CONFIG_SERIAL_HS_LPC32XX_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PNX=y
+CONFIG_GPIO_LPC32XX=y
CONFIG_SPI=y
CONFIG_SPI_PL022=y
CONFIG_GPIO_SYSFS=y
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index bb13c266c329..8b40a578963c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -311,6 +311,13 @@ config GPIO_LPC18XX
Select this option to enable GPIO driver for
NXP LPC18XX/43XX devices.
+config GPIO_LPC32XX
+ tristate "NXP LPC32XX GPIO support"
+ depends on OF_GPIO && (ARCH_LPC32XX || COMPILE_TEST)
+ help
+ Select this option to enable GPIO driver for
+ NXP LPC32XX devices.
+
config GPIO_LYNXPOINT
tristate "Intel Lynxpoint GPIO support"
depends on ACPI && X86
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index a4e91175c708..87d659ae95eb 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -74,7 +74,7 @@ obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o
obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o
obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o
-obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
+obj-$(CONFIG_GPIO_LPC32XX) += gpio-lpc32xx.o
obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o
obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o
obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c
index 24885b3db3d5..4e626c4235c2 100644
--- a/drivers/gpio/gpio-lpc32xx.c
+++ b/drivers/gpio/gpio-lpc32xx.c
@@ -16,36 +16,33 @@
#include <linux/platform_device.h>
#include <linux/module.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-
-#define LPC32XX_GPIO_P3_INP_STATE _GPREG(0x000)
-#define LPC32XX_GPIO_P3_OUTP_SET _GPREG(0x004)
-#define LPC32XX_GPIO_P3_OUTP_CLR _GPREG(0x008)
-#define LPC32XX_GPIO_P3_OUTP_STATE _GPREG(0x00C)
-#define LPC32XX_GPIO_P2_DIR_SET _GPREG(0x010)
-#define LPC32XX_GPIO_P2_DIR_CLR _GPREG(0x014)
-#define LPC32XX_GPIO_P2_DIR_STATE _GPREG(0x018)
-#define LPC32XX_GPIO_P2_INP_STATE _GPREG(0x01C)
-#define LPC32XX_GPIO_P2_OUTP_SET _GPREG(0x020)
-#define LPC32XX_GPIO_P2_OUTP_CLR _GPREG(0x024)
-#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028)
-#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)
-#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)
-#define LPC32XX_GPIO_P0_INP_STATE _GPREG(0x040)
-#define LPC32XX_GPIO_P0_OUTP_SET _GPREG(0x044)
-#define LPC32XX_GPIO_P0_OUTP_CLR _GPREG(0x048)
-#define LPC32XX_GPIO_P0_OUTP_STATE _GPREG(0x04C)
-#define LPC32XX_GPIO_P0_DIR_SET _GPREG(0x050)
-#define LPC32XX_GPIO_P0_DIR_CLR _GPREG(0x054)
-#define LPC32XX_GPIO_P0_DIR_STATE _GPREG(0x058)
-#define LPC32XX_GPIO_P1_INP_STATE _GPREG(0x060)
-#define LPC32XX_GPIO_P1_OUTP_SET _GPREG(0x064)
-#define LPC32XX_GPIO_P1_OUTP_CLR _GPREG(0x068)
-#define LPC32XX_GPIO_P1_OUTP_STATE _GPREG(0x06C)
-#define LPC32XX_GPIO_P1_DIR_SET _GPREG(0x070)
-#define LPC32XX_GPIO_P1_DIR_CLR _GPREG(0x074)
-#define LPC32XX_GPIO_P1_DIR_STATE _GPREG(0x078)
+#define LPC32XX_GPIO_P3_INP_STATE (0x000)
+#define LPC32XX_GPIO_P3_OUTP_SET (0x004)
+#define LPC32XX_GPIO_P3_OUTP_CLR (0x008)
+#define LPC32XX_GPIO_P3_OUTP_STATE (0x00C)
+#define LPC32XX_GPIO_P2_DIR_SET (0x010)
+#define LPC32XX_GPIO_P2_DIR_CLR (0x014)
+#define LPC32XX_GPIO_P2_DIR_STATE (0x018)
+#define LPC32XX_GPIO_P2_INP_STATE (0x01C)
+#define LPC32XX_GPIO_P2_OUTP_SET (0x020)
+#define LPC32XX_GPIO_P2_OUTP_CLR (0x024)
+#define LPC32XX_GPIO_P2_MUX_SET (0x028)
+#define LPC32XX_GPIO_P2_MUX_CLR (0x02C)
+#define LPC32XX_GPIO_P2_MUX_STATE (0x030)
+#define LPC32XX_GPIO_P0_INP_STATE (0x040)
+#define LPC32XX_GPIO_P0_OUTP_SET (0x044)
+#define LPC32XX_GPIO_P0_OUTP_CLR (0x048)
+#define LPC32XX_GPIO_P0_OUTP_STATE (0x04C)
+#define LPC32XX_GPIO_P0_DIR_SET (0x050)
+#define LPC32XX_GPIO_P0_DIR_CLR (0x054)
+#define LPC32XX_GPIO_P0_DIR_STATE (0x058)
+#define LPC32XX_GPIO_P1_INP_STATE (0x060)
+#define LPC32XX_GPIO_P1_OUTP_SET (0x064)
+#define LPC32XX_GPIO_P1_OUTP_CLR (0x068)
+#define LPC32XX_GPIO_P1_OUTP_STATE (0x06C)
+#define LPC32XX_GPIO_P1_DIR_SET (0x070)
+#define LPC32XX_GPIO_P1_DIR_CLR (0x074)
+#define LPC32XX_GPIO_P1_DIR_STATE (0x078)
#define GPIO012_PIN_TO_BIT(x) (1 << (x))
#define GPIO3_PIN_TO_BIT(x) (1 << ((x) + 25))
@@ -72,12 +69,12 @@
#define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX)
struct gpio_regs {
- void __iomem *inp_state;
- void __iomem *outp_state;
- void __iomem *outp_set;
- void __iomem *outp_clr;
- void __iomem *dir_set;
- void __iomem *dir_clr;
+ unsigned long inp_state;
+ unsigned long outp_state;
+ unsigned long outp_set;
+ unsigned long outp_clr;
+ unsigned long dir_set;
+ unsigned long dir_clr;
};
/*
@@ -165,16 +162,27 @@ static struct gpio_regs gpio_grp_regs_p3 = {
struct lpc32xx_gpio_chip {
struct gpio_chip chip;
struct gpio_regs *gpio_grp;
+ void __iomem *reg_base;
};
+static inline u32 gpreg_read(struct lpc32xx_gpio_chip *group, unsigned long offset)
+{
+ return __raw_readl(group->reg_base + offset);
+}
+
+static inline void gpreg_write(struct lpc32xx_gpio_chip *group, u32 val, unsigned long offset)
+{
+ __raw_writel(val, group->reg_base + offset);
+}
+
static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group,
unsigned pin, int input)
{
if (input)
- __raw_writel(GPIO012_PIN_TO_BIT(pin),
+ gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
group->gpio_grp->dir_clr);
else
- __raw_writel(GPIO012_PIN_TO_BIT(pin),
+ gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
group->gpio_grp->dir_set);
}
@@ -184,19 +192,19 @@ static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group,
u32 u = GPIO3_PIN_TO_BIT(pin);
if (input)
- __raw_writel(u, group->gpio_grp->dir_clr);
+ gpreg_write(group, u, group->gpio_grp->dir_clr);
else
- __raw_writel(u, group->gpio_grp->dir_set);
+ gpreg_write(group, u, group->gpio_grp->dir_set);
}
static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group,
unsigned pin, int high)
{
if (high)
- __raw_writel(GPIO012_PIN_TO_BIT(pin),
+ gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
group->gpio_grp->outp_set);
else
- __raw_writel(GPIO012_PIN_TO_BIT(pin),
+ gpreg_write(group, GPIO012_PIN_TO_BIT(pin),
group->gpio_grp->outp_clr);
}
@@ -206,31 +214,31 @@ static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group,
u32 u = GPIO3_PIN_TO_BIT(pin);
if (high)
- __raw_writel(u, group->gpio_grp->outp_set);
+ gpreg_write(group, u, group->gpio_grp->outp_set);
else
- __raw_writel(u, group->gpio_grp->outp_clr);
+ gpreg_write(group, u, group->gpio_grp->outp_clr);
}
static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group,
unsigned pin, int high)
{
if (high)
- __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
+ gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set);
else
- __raw_writel(GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
+ gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr);
}
static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group,
unsigned pin)
{
- return GPIO012_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state),
+ return GPIO012_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state),
pin);
}
static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
unsigned pin)
{
- int state = __raw_readl(group->gpio_grp->inp_state);
+ int state = gpreg_read(group, group->gpio_grp->inp_state);
/*
* P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped
@@ -242,13 +250,13 @@ static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group,
static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group,
unsigned pin)
{
- return GPI3_PIN_IN_SEL(__raw_readl(group->gpio_grp->inp_state), pin);
+ return GPI3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state), pin);
}
static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group,
unsigned pin)
{
- return GPO3_PIN_IN_SEL(__raw_readl(group->gpio_grp->outp_state), pin);
+ return GPO3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->outp_state), pin);
}
/*
@@ -497,12 +505,18 @@ static int lpc32xx_of_xlate(struct gpio_chip *gc,
static int lpc32xx_gpio_probe(struct platform_device *pdev)
{
int i;
+ void __iomem *reg_base;
+
+ reg_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(reg_base))
+ return PTR_ERR(reg_base);
for (i = 0; i < ARRAY_SIZE(lpc32xx_gpiochip); i++) {
if (pdev->dev.of_node) {
lpc32xx_gpiochip[i].chip.of_xlate = lpc32xx_of_xlate;
lpc32xx_gpiochip[i].chip.of_gpio_n_cells = 3;
lpc32xx_gpiochip[i].chip.of_node = pdev->dev.of_node;
+ lpc32xx_gpiochip[i].reg_base = reg_base;
}
devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip,
&lpc32xx_gpiochip[i]);
@@ -527,3 +541,7 @@ static struct platform_driver lpc32xx_gpio_driver = {
};
module_platform_driver(lpc32xx_gpio_driver);
+
+MODULE_AUTHOR("Kevin Wells <kevin.wells@nxp.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("GPIO driver for LPC32xx SoC");
--
2.20.0
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