* [PATCH] ARM: dts: nomadik: Set up the CS GPIO right
From: Linus Walleij @ 2019-08-13 7:27 UTC (permalink / raw)
To: arm, soc; +Cc: Linus Walleij, linux-arm-kernel
Now that the SPI GPIO driver knows how to handle these
chip select GPIOs and we get nasty messages about the
core having to enforce active low on the GPIO, fix this
up by actually requesting the CS GPIO line as active
low.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ARM SoC folks: please apply this directly for v5.4, I do
not plan to send more Nomadik patches this merge window.
---
arch/arm/boot/dts/ste-nomadik-nhk15.dts | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/ste-nomadik-nhk15.dts b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
index 04066f9cb8a3..41ed21a4fdc1 100644
--- a/arch/arm/boot/dts/ste-nomadik-nhk15.dts
+++ b/arch/arm/boot/dts/ste-nomadik-nhk15.dts
@@ -212,13 +212,7 @@
*/
gpio-sck = <&gpio0 5 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio0 4 GPIO_ACTIVE_HIGH>;
- /*
- * It's not actually active high, but the frameworks assume
- * the polarity of the passed-in GPIO is "normal" (active
- * high) then actively drives the line low to select the
- * chip.
- */
- cs-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
/*
--
2.21.0
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* Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
From: Kishon Vijay Abraham I @ 2019-08-13 7:30 UTC (permalink / raw)
To: Xiaowei Bao, lorenzo.pieralisi, bhelgaas, minghuan.Lian,
mingkai.hu, roy.zang, l.stach, tpiepho, leonard.crestez,
andrew.smirnov, yue.wang, hayashi.kunihiko, dwmw, jonnyc,
linux-pci, linux-kernel, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20190813062840.2733-1-xiaowei.bao@nxp.com>
On 13/08/19 11:58 AM, Xiaowei Bao wrote:
> The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1
> is 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware,
> so set the bar_fixed_64bit with 0x14.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> v2:
> - Replace value 0x14 with a macro.
> v3:
> - No change.
> v4:
> - send the patch again with '--to'.
> v5:
> - fix the commit message.
>
> drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> index be61d96..ca9aa45 100644
> --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> @@ -44,6 +44,7 @@ static const struct pci_epc_features ls_pcie_epc_features = {
> .linkup_notifier = false,
> .msi_capable = true,
> .msix_capable = false,
> + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> };
>
> static const struct pci_epc_features*
>
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* [PATCH] arm64: dts: mt2712: add ethernet device node
From: Biao Huang @ 2019-08-13 7:35 UTC (permalink / raw)
To: Matthias Brugger, Rob Herring, Mark Rutland
Cc: devicetree, biao.huang, linux-kernel, jianguo.zhang,
linux-mediatek, yt.shen, linux-arm-kernel
This patch add device node for mt2712 ethernet.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt2712-evb.dts | 69 +++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 65 +++++++++++++++++++
2 files changed, 134 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
index 1353dad2f53c..3118f96706d9 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt2712-evb.dts
@@ -107,7 +107,76 @@
proc-supply = <&cpus_fixed_vproc1>;
};
+ð {
+ phy-mode ="rgmii-rxid";
+ phy-handle = <ðernet_phy0>;
+ mediatek,tx-delay-ps = <1530>;
+ snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <ð_default>;
+ pinctrl-1 = <ð_sleep>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethernet_phy0: ethernet-phy@5 {
+ compatible = "ethernet-phy-id0243.0d90";
+ reg = <0x5>;
+ };
+ };
+};
+
&pio {
+ eth_default: eth_default {
+ tx_pins {
+ pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
+ <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
+ <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,
+ <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,
+ <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,
+ <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ rx_pins {
+ pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,
+ <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,
+ <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,
+ <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,
+ <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,
+ <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;
+ };
+ mdio_pins {
+ pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,
+ <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+ };
+
+ eth_sleep: eth_sleep {
+ tx_pins {
+ pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
+ <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
+ <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,
+ <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,
+ <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,
+ <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;
+ };
+ rx_pins {
+ pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,
+ <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,
+ <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,
+ <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,
+ <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,
+ <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;
+ };
+ mdio_pins {
+ pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,
+ <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;
+ };
+ };
+
usb0_id_pins_float: usb0_iddig {
pins_iddig {
pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 43307bad3f0d..b2edec20c8da 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -632,6 +632,71 @@
status = "disabled";
};
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <0x7>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,blen = <0 0 0 0 16 8 4>;
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <1>;
+ snps,rx-sched-sp;
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,priority = <0x0>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <3>;
+ snps,tx-sched-wrr;
+ queue0 {
+ snps,weight = <0x10>;
+ snps,dcb-algorithm;
+ snps,priority = <0x0>;
+ };
+ queue1 {
+ snps,weight = <0x11>;
+ snps,dcb-algorithm;
+ snps,priority = <0x1>;
+ };
+ queue2 {
+ snps,weight = <0x12>;
+ snps,dcb-algorithm;
+ snps,priority = <0x2>;
+ };
+ };
+
+ eth: ethernet@1101c000 {
+ compatible = "mediatek,mt2712-gmac";
+ reg = <0 0x1101c000 0 0x1300>;
+ interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "macirq";
+ mac-address = [00 55 7b b5 7d f7];
+ clock-names = "axi",
+ "apb",
+ "mac_main",
+ "ptp_ref";
+ clocks = <&pericfg CLK_PERI_GMAC>,
+ <&pericfg CLK_PERI_GMAC_PCLK>,
+ <&topckgen CLK_TOP_ETHER_125M_SEL>,
+ <&topckgen CLK_TOP_ETHER_50M_SEL>;
+ assigned-clocks = <&topckgen CLK_TOP_ETHER_125M_SEL>,
+ <&topckgen CLK_TOP_ETHER_50M_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_ETHERPLL_125M>,
+ <&topckgen CLK_TOP_APLL1_D3>;
+ power-domains = <&scpsys MT2712_POWER_DOMAIN_AUDIO>;
+ mediatek,pericfg = <&pericfg>;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+ snps,txpbl = <1>;
+ snps,rxpbl = <1>;
+ clk_csr = <0>;
+ status = "disabled";
+ };
+
mmc0: mmc@11230000 {
compatible = "mediatek,mt2712-mmc";
reg = <0 0x11230000 0 0x1000>;
--
2.18.0
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* RE: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
From: Xiaowei Bao @ 2019-08-13 7:39 UTC (permalink / raw)
To: Kishon Vijay Abraham I, lorenzo.pieralisi@arm.com,
bhelgaas@google.com, M.h. Lian, Mingkai Hu, Roy Zang,
l.stach@pengutronix.de, tpiepho@impinj.com, Leonard Crestez,
andrew.smirnov@gmail.com, yue.wang@amlogic.com,
hayashi.kunihiko@socionext.com, dwmw@amazon.co.uk,
jonnyc@amazon.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <61e6df1c-a0dc-8f05-f74a-85a3cac9823f@ti.com>
> -----Original Message-----
> From: Kishon Vijay Abraham I <kishon@ti.com>
> Sent: 2019年8月13日 15:30
> To: Xiaowei Bao <xiaowei.bao@nxp.com>; lorenzo.pieralisi@arm.com;
> bhelgaas@google.com; M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>;
> l.stach@pengutronix.de; tpiepho@impinj.com; Leonard Crestez
> <leonard.crestez@nxp.com>; andrew.smirnov@gmail.com;
> yue.wang@amlogic.com; hayashi.kunihiko@socionext.com;
> dwmw@amazon.co.uk; jonnyc@amazon.com; linux-pci@vger.kernel.org;
> linux-kernel@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit
> property in EP driver.
>
> Caution: EXT Email
>
> On 13/08/19 11:58 AM, Xiaowei Bao wrote:
> > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware, so set
> > the bar_fixed_64bit with 0x14.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
>
> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> > ---
> > v2:
> > - Replace value 0x14 with a macro.
> > v3:
> > - No change.
> > v4:
> > - send the patch again with '--to'.
> > v5:
> > - fix the commit message.
> >
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index be61d96..ca9aa45 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -44,6 +44,7 @@ static const struct pci_epc_features
> ls_pcie_epc_features = {
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = false,
> > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > };
> >
> > static const struct pci_epc_features*
I check other platforms, it is 'static const struct pci_epc_features', I can get the correct
Value use this define way in pci-epf-test.c file.
> >
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* [PATCH] tty/serial: atmel: reschedule TX after RX was started
From: Razvan Stefanescu @ 2019-08-13 7:40 UTC (permalink / raw)
To: Richard Genoud, Greg Kroah-Hartman, Jiri Slaby
Cc: Alexandre Belloni, linux-kernel, Ludovic Desroches, linux-serial,
linux-arm-kernel
When half-duplex RS485 communication is used, after RX is started, TX
tasklet still needs to be scheduled tasklet. This avoids console freezing
when more data is to be transmitted, if the serial communication is not
closed.
Fixes: 69646d7a3689 ("tty/serial: atmel: RS485 HD w/DMA: enable RX after TX is stopped")
Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
---
drivers/tty/serial/atmel_serial.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 0b4f36905321..8e667967928a 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1400,7 +1400,6 @@ atmel_handle_transmit(struct uart_port *port, unsigned int pending)
atmel_port->hd_start_rx = false;
atmel_start_rx(port);
- return;
}
atmel_tasklet_schedule(atmel_port, &atmel_port->tasklet_tx);
--
2.20.1
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* [PATCH] ASoC: rockchip: rockchip_max98090: Set period size to 240
From: Cheng-Yi Chiang @ 2019-08-13 7:44 UTC (permalink / raw)
To: linux-kernel
Cc: alsa-devel, dianders, Heiko Stuebner, zhengxing, Liam Girdwood,
jeffy.chen, Takashi Iwai, tzungbi, Jaroslav Kysela,
linux-rockchip, Mark Brown, eddie.cai, linux-arm-kernel,
enric.balletbo, dgreid, cain.cai, Cheng-Yi Chiang
From stress testing of arecord, we found that period size
greater than ~900 will bring pl330 to DYING state and
can not recover within 100 iterations.
The result is that arecord will stuck and get I/O error,
and issue can not be recovered until reboot.
This issue does not happen when period size is small.
Set constraint of period size to 240 to prevent such issue.
With the constraint, there will be no issue after 2000 iterations.
We can revert this patch once the root cause is found
in rockchip's pl330 implementation.
Signed-off-by: Cheng-Yi Chiang <cychiang@chromium.org>
---
sound/soc/rockchip/rockchip_max98090.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_max98090.c b/sound/soc/rockchip/rockchip_max98090.c
index 7b0c21fa6dca..0097df1fae66 100644
--- a/sound/soc/rockchip/rockchip_max98090.c
+++ b/sound/soc/rockchip/rockchip_max98090.c
@@ -137,8 +137,19 @@ static int rk_aif1_hw_params(struct snd_pcm_substream *substream,
return ret;
}
+static int rk_aif1_startup(struct snd_pcm_substream *substream)
+{
+ /*
+ * Set period size to 240 because pl330 has issue
+ * dealing with larger period in stress testing.
+ */
+ return snd_pcm_hw_constraint_minmax(substream->runtime,
+ SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 240, 240);
+}
+
static const struct snd_soc_ops rk_aif1_ops = {
.hw_params = rk_aif1_hw_params,
+ .startup = rk_aif1_startup,
};
SND_SOC_DAILINK_DEFS(hifi,
--
2.23.0.rc1.153.gdeed80330f-goog
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* Re: [PATCH v2 1/3] arm64: imx8mq: add imx8mq iomux-gpr field defines
From: Arnd Bergmann @ 2019-08-13 8:08 UTC (permalink / raw)
To: Guido Günther
Cc: Mark Rutland, DTML, Jernej Skrabec, Pengutronix Kernel Team,
Sam Ravnborg, Neil Armstrong, David Airlie, Fabio Estevam,
Sascha Hauer, Jonas Karlman, Linux Kernel Mailing List, dri-devel,
Andrzej Hajda, Rob Herring, NXP Linux Team, Daniel Vetter,
Robert Chiras, Lee Jones, Shawn Guo, Linux ARM, Laurent Pinchart
In-Reply-To: <e0562d8bb4098dc4cdb4023b41fb75b312be22a5.1565367567.git.agx@sigxcpu.org>
On Fri, Aug 9, 2019 at 6:24 PM Guido Günther <agx@sigxcpu.org> wrote:
>
> This adds all the gpr registers and the define needed for selecting
> the input source in the imx-nwl drm bridge.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
> +
> +#define IOMUXC_GPR0 0x00
> +#define IOMUXC_GPR1 0x04
> +#define IOMUXC_GPR2 0x08
> +#define IOMUXC_GPR3 0x0c
> +#define IOMUXC_GPR4 0x10
> +#define IOMUXC_GPR5 0x14
> +#define IOMUXC_GPR6 0x18
> +#define IOMUXC_GPR7 0x1c
(more of the same)
huh?
> +/* i.MX8Mq iomux gpr register field defines */
> +#define IMX8MQ_GPR13_MIPI_MUX_SEL BIT(2)
I think this define should probably be local to the pinctrl driver, to
ensure that no other drivers fiddle with the registers manually.
Arnd
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^ permalink raw reply
* Re: [PATCH] MAINTAINERS: Update path to tcb_clksrc.c
From: Nicolas.Ferre @ 2019-08-13 8:11 UTC (permalink / raw)
To: efremov, linux-kernel
Cc: joe, alexandre.belloni, Ludovic.Desroches, linux-arm-kernel
In-Reply-To: <20190813061046.15712-1-efremov@linux.com>
On 13/08/2019 at 08:10, Denis Efremov wrote:
> Update MAINTAINERS record to reflect the filename change
> from tcb_clksrc.c to timer-atmel-tcb.c
>
> Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
But, while you're at it, I would add another line: see below...
> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Fixes: a7aae768166e ("clocksource/drivers/tcb_clksrc: Rename the file for consistency")
> Signed-off-by: Denis Efremov <efremov@linux.com>
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c9ad38a9414f..3ec8154e4630 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10637,7 +10637,7 @@ M: Nicolas Ferre <nicolas.ferre@microchip.com>
+M: Alexandre Belloni <alexandre.belloni@bootlin.com>
But Alexandre have to agree, of course.
> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> S: Supported
> F: drivers/misc/atmel_tclib.c
> -F: drivers/clocksource/tcb_clksrc.c
> +F: drivers/clocksource/timer-atmel-tcb.c
>
> MICROCHIP USBA UDC DRIVER
> M: Cristian Birsan <cristian.birsan@microchip.com>
We could also remove this entry and mix it with:
"ARM/Microchip (AT91) SoC support"
But I prefer to keep it separated like this for various reasons.
Best regards,
--
Nicolas Ferre
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* Re: [PATCH 12/16] arm64: prefer __section from compiler_attributes.h
From: Will Deacon @ 2019-08-13 8:27 UTC (permalink / raw)
To: Nick Desaulniers
Cc: Song Liu, Catalin Marinas, Alexei Starovoitov, Daniel Borkmann,
clang-built-linux, Allison Randal, yhs, Masayoshi Mizuma,
Suzuki K Poulose, Andrey Konovalov, Shaokun Zhang, Alexios Zavras,
jpoimboe, sedat.dilek, Thomas Gleixner, bpf, linux-arm-kernel,
Greg Kroah-Hartman, linux-kernel, miguel.ojeda.sandonis, netdev,
akpm, Enrico Weigelt, Martin KaFai Lau
In-Reply-To: <20190812215052.71840-12-ndesaulniers@google.com>
Hi Nick,
On Mon, Aug 12, 2019 at 02:50:45PM -0700, Nick Desaulniers wrote:
> GCC unescapes escaped string section names while Clang does not. Because
> __section uses the `#` stringification operator for the section name, it
> doesn't need to be escaped.
>
> This antipattern was found with:
> $ grep -e __section\(\" -e __section__\(\" -r
>
> Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
> Suggested-by: Josh Poimboeuf <jpoimboe@redhat.com>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> ---
> arch/arm64/include/asm/cache.h | 2 +-
> arch/arm64/kernel/smp_spin_table.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
Does this fix a build issue, or is it just cosmetic or do we end up with
duplicate sections or something else?
Happy to route it via arm64, just having trouble working out whether it's
5.3 material!
Will
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* RE: [PATCH net-next v2 04/12] net: stmmac: Add Split Header support and enable it in XGMAC cores
From: Jose Abreu @ 2019-08-13 8:30 UTC (permalink / raw)
To: David Miller, jakub.kicinski@netronome.com
Cc: Joao.Pinto@synopsys.com, alexandre.torgue@st.com,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
mcoquelin.stm32@gmail.com, peppe.cavallaro@st.com,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190812.140618.1288127671943783439.davem@davemloft.net>
++ Jakub
From: David Miller <davem@davemloft.net>
Date: Aug/12/2019, 22:06:18 (UTC+00:00)
> From: Jose Abreu <Jose.Abreu@synopsys.com>
> Date: Mon, 12 Aug 2019 11:44:03 +0200
>
> > - Add performance info (David)
>
> Ummm...
>
> Whilst cpu utilization is interesting, I might be mainly interested in
> how this effects "networking" performance. I find it very surprising
> that it isn't obvious that this is what I wanted.
>
> Do you not do performance testing on the networking level when you
> make fundamental changes to how packets are processed by the
> hardware/driver?
I do.
In my HW this feature does not impact performance neither improves it as
I'm already on max of theoretical bandwidth.
I do expect it to reduce CPU usage and memory footprint because we no
longer have to memcpy the entire buffer to SKB and instead we just copy
the header and then append payload as page which is passed directly to
net layer.
This feature is already used in some drivers and is part of GRO
offloading I think.
Jakub, as David is off can you please comment on how can we proceed with
this series ? I can add more information in commit log for this patch
...
---
Thanks,
Jose Miguel Abreu
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^ permalink raw reply
* [PATCH] clk: spear: Make structure i2s_sclk_masks constant
From: Nishka Dasgupta @ 2019-08-13 8:57 UTC (permalink / raw)
To: vireshk, mturquette, sboyd, linux-arm-kernel, linux-clk; +Cc: Nishka Dasgupta
Static structure i2s_sclk_masks, having type aux_clk_masks, is only used
when it is passed as the sixth argument to function clk_register_aux().
However, clk_register_aux() is defined with its sixth argument as const.
Hence i2s_sclk_masks is not modified by clk_register_aux, which is also
the only usage of the former. Therefore make i2s_sclk_masks constant as
it is never modified.
Issue found with Coccinelle.
Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
---
drivers/clk/spear/spear1340_clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index e5bc8c828cf0..9163bbb46411 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -335,7 +335,7 @@ static const struct aux_clk_masks i2s_prs1_masks = {
};
/* i2s sclk (bit clock) syynthesizers masks */
-static struct aux_clk_masks i2s_sclk_masks = {
+static const struct aux_clk_masks i2s_sclk_masks = {
.eq_sel_mask = AUX_EQ_SEL_MASK,
.eq_sel_shift = SPEAR1340_I2S_SCLK_EQ_SEL_SHIFT,
.eq1_mask = AUX_EQ1_SEL,
--
2.19.1
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* remove various unused set_memory_* related functions and exports
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
Hi all,
while looking into implementing a DMA memory allocator for PCIe unsnooped
transactions I've started looking at the set_memory_* and related APIs,
and it turns out that many of them are unused. Fix for that below.
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* [PATCH 1/6] arm64: unexport set_memory_x and set_memory_nx
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
No module currently messed with clearing or setting the execute
permission of kernel memory, and none really should.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/arm64/mm/pageattr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index 03c53f16ee77..9ce7bd9d4d9c 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -128,7 +128,6 @@ int set_memory_nx(unsigned long addr, int numpages)
__pgprot(PTE_PXN),
__pgprot(0));
}
-EXPORT_SYMBOL_GPL(set_memory_nx);
int set_memory_x(unsigned long addr, int numpages)
{
@@ -136,7 +135,6 @@ int set_memory_x(unsigned long addr, int numpages)
__pgprot(0),
__pgprot(PTE_PXN));
}
-EXPORT_SYMBOL_GPL(set_memory_x);
int set_memory_valid(unsigned long addr, int numpages, int enable)
{
--
2.20.1
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* [PATCH 2/6] x86: unexport set_memory_x and set_memory_nx
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
No module currently messed with clearing or setting the execute
permission of kernel memory, and none really should.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/x86/mm/pageattr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 6a9a77a403c9..a02ca8986299 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1967,7 +1967,6 @@ int set_memory_x(unsigned long addr, int numpages)
return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
}
-EXPORT_SYMBOL(set_memory_x);
int set_memory_nx(unsigned long addr, int numpages)
{
@@ -1976,7 +1975,6 @@ int set_memory_nx(unsigned long addr, int numpages)
return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
}
-EXPORT_SYMBOL(set_memory_nx);
int set_memory_ro(unsigned long addr, int numpages)
{
--
2.20.1
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* [PATCH 3/6] x86: remove the unused set_memory_array_* functions
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/x86/include/asm/set_memory.h | 5 ---
arch/x86/mm/pageattr.c | 75 -------------------------------
2 files changed, 80 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index ae7b909dc242..899ec9ae7cff 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -48,11 +48,6 @@ int set_memory_encrypted(unsigned long addr, int numpages);
int set_memory_decrypted(unsigned long addr, int numpages);
int set_memory_np_noalias(unsigned long addr, int numpages);
-int set_memory_array_uc(unsigned long *addr, int addrinarray);
-int set_memory_array_wc(unsigned long *addr, int addrinarray);
-int set_memory_array_wt(unsigned long *addr, int addrinarray);
-int set_memory_array_wb(unsigned long *addr, int addrinarray);
-
int set_pages_array_uc(struct page **pages, int addrinarray);
int set_pages_array_wc(struct page **pages, int addrinarray);
int set_pages_array_wt(struct page **pages, int addrinarray);
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index a02ca8986299..3be5d22c005a 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1809,63 +1809,6 @@ int set_memory_uc(unsigned long addr, int numpages)
}
EXPORT_SYMBOL(set_memory_uc);
-static int _set_memory_array(unsigned long *addr, int numpages,
- enum page_cache_mode new_type)
-{
- enum page_cache_mode set_type;
- int i, j;
- int ret;
-
- for (i = 0; i < numpages; i++) {
- ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
- new_type, NULL);
- if (ret)
- goto out_free;
- }
-
- /* If WC, set to UC- first and then WC */
- set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
- _PAGE_CACHE_MODE_UC_MINUS : new_type;
-
- ret = change_page_attr_set(addr, numpages,
- cachemode2pgprot(set_type), 1);
-
- if (!ret && new_type == _PAGE_CACHE_MODE_WC)
- ret = change_page_attr_set_clr(addr, numpages,
- cachemode2pgprot(
- _PAGE_CACHE_MODE_WC),
- __pgprot(_PAGE_CACHE_MASK),
- 0, CPA_ARRAY, NULL);
- if (ret)
- goto out_free;
-
- return 0;
-
-out_free:
- for (j = 0; j < i; j++)
- free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
-
- return ret;
-}
-
-int set_memory_array_uc(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_UC_MINUS);
-}
-EXPORT_SYMBOL(set_memory_array_uc);
-
-int set_memory_array_wc(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_WC);
-}
-EXPORT_SYMBOL(set_memory_array_wc);
-
-int set_memory_array_wt(unsigned long *addr, int numpages)
-{
- return _set_memory_array(addr, numpages, _PAGE_CACHE_MODE_WT);
-}
-EXPORT_SYMBOL_GPL(set_memory_array_wt);
-
int _set_memory_wc(unsigned long addr, int numpages)
{
int ret;
@@ -1942,24 +1885,6 @@ int set_memory_wb(unsigned long addr, int numpages)
}
EXPORT_SYMBOL(set_memory_wb);
-int set_memory_array_wb(unsigned long *addr, int numpages)
-{
- int i;
- int ret;
-
- /* WB cache mode is hard wired to all cache attribute bits being 0 */
- ret = change_page_attr_clear(addr, numpages,
- __pgprot(_PAGE_CACHE_MASK), 1);
- if (ret)
- return ret;
-
- for (i = 0; i < numpages; i++)
- free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
-
- return 0;
-}
-EXPORT_SYMBOL(set_memory_array_wb);
-
int set_memory_x(unsigned long addr, int numpages)
{
if (!(__supported_pte_mask & _PAGE_NX))
--
2.20.1
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* [PATCH 4/6] x86: remove set_memory_x and set_memory_nx
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
These wrappers don't provide a real benefit over just using
set_memory_x and set_memory_nx.
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/x86/include/asm/set_memory.h | 2 --
arch/x86/kernel/machine_kexec_32.c | 4 ++--
arch/x86/mm/init_32.c | 2 +-
arch/x86/mm/pageattr.c | 16 ----------------
4 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index 899ec9ae7cff..fd549c3ebb17 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -75,8 +75,6 @@ int set_pages_array_wb(struct page **pages, int addrinarray);
int set_pages_uc(struct page *page, int numpages);
int set_pages_wb(struct page *page, int numpages);
-int set_pages_x(struct page *page, int numpages);
-int set_pages_nx(struct page *page, int numpages);
int set_pages_ro(struct page *page, int numpages);
int set_pages_rw(struct page *page, int numpages);
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index 77854b192fef..7b45e8daad22 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -148,7 +148,7 @@ int machine_kexec_prepare(struct kimage *image)
{
int error;
- set_pages_x(image->control_code_page, 1);
+ set_memory_x((unsigned long)page_address(image->control_code_page), 1);
error = machine_kexec_alloc_page_tables(image);
if (error)
return error;
@@ -162,7 +162,7 @@ int machine_kexec_prepare(struct kimage *image)
*/
void machine_kexec_cleanup(struct kimage *image)
{
- set_pages_nx(image->control_code_page, 1);
+ set_memory_nx((unsigned long)page_address(image->control_code_page), 1);
machine_kexec_free_page_tables(image);
}
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 4068abb9427f..930edeb41ec3 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -916,7 +916,7 @@ static void mark_nxdata_nx(void)
if (__supported_pte_mask & _PAGE_NX)
printk(KERN_INFO "NX-protecting the kernel data: %luk\n", size >> 10);
- set_pages_nx(virt_to_page(start), size >> PAGE_SHIFT);
+ set_memory_nx(start, size >> PAGE_SHIFT);
}
void mark_rodata_ro(void)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 3be5d22c005a..0e39b344556d 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -2103,22 +2103,6 @@ int set_pages_array_wb(struct page **pages, int numpages)
}
EXPORT_SYMBOL(set_pages_array_wb);
-int set_pages_x(struct page *page, int numpages)
-{
- unsigned long addr = (unsigned long)page_address(page);
-
- return set_memory_x(addr, numpages);
-}
-EXPORT_SYMBOL(set_pages_x);
-
-int set_pages_nx(struct page *page, int numpages)
-{
- unsigned long addr = (unsigned long)page_address(page);
-
- return set_memory_nx(addr, numpages);
-}
-EXPORT_SYMBOL(set_pages_nx);
-
int set_pages_ro(struct page *page, int numpages)
{
unsigned long addr = (unsigned long)page_address(page);
--
2.20.1
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* [PATCH 5/6] x86: remove the unused set_memory_wt function
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/x86/include/asm/set_memory.h | 1 -
arch/x86/mm/pageattr.c | 17 -----------------
2 files changed, 18 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index fd549c3ebb17..2ee8e469dcf5 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -40,7 +40,6 @@ int _set_memory_wt(unsigned long addr, int numpages);
int _set_memory_wb(unsigned long addr, int numpages);
int set_memory_uc(unsigned long addr, int numpages);
int set_memory_wc(unsigned long addr, int numpages);
-int set_memory_wt(unsigned long addr, int numpages);
int set_memory_wb(unsigned long addr, int numpages);
int set_memory_np(unsigned long addr, int numpages);
int set_memory_4k(unsigned long addr, int numpages);
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 0e39b344556d..9acd568c4faa 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1848,23 +1848,6 @@ int _set_memory_wt(unsigned long addr, int numpages)
cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
}
-int set_memory_wt(unsigned long addr, int numpages)
-{
- int ret;
-
- ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
- _PAGE_CACHE_MODE_WT, NULL);
- if (ret)
- return ret;
-
- ret = _set_memory_wt(addr, numpages);
- if (ret)
- free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(set_memory_wt);
-
int _set_memory_wb(unsigned long addr, int numpages)
{
/* WB cache mode is hard wired to all cache attribute bits being 0 */
--
2.20.1
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* [PATCH 6/6] x86: remove the unused set_pages_array_wt function
From: Christoph Hellwig @ 2019-08-13 9:01 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, x86
Cc: Peter Zijlstra, Dave Hansen, linux-arm-kernel, Andy Lutomirski,
linux-kernel
In-Reply-To: <20190813090146.26377-1-hch@lst.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
---
arch/x86/include/asm/set_memory.h | 1 -
arch/x86/mm/pageattr.c | 6 ------
2 files changed, 7 deletions(-)
diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
index 2ee8e469dcf5..cff5e07c1e19 100644
--- a/arch/x86/include/asm/set_memory.h
+++ b/arch/x86/include/asm/set_memory.h
@@ -49,7 +49,6 @@ int set_memory_np_noalias(unsigned long addr, int numpages);
int set_pages_array_uc(struct page **pages, int addrinarray);
int set_pages_array_wc(struct page **pages, int addrinarray);
-int set_pages_array_wt(struct page **pages, int addrinarray);
int set_pages_array_wb(struct page **pages, int addrinarray);
/*
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 9acd568c4faa..255c90d6aaa7 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -2047,12 +2047,6 @@ int set_pages_array_wc(struct page **pages, int numpages)
}
EXPORT_SYMBOL(set_pages_array_wc);
-int set_pages_array_wt(struct page **pages, int numpages)
-{
- return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WT);
-}
-EXPORT_SYMBOL_GPL(set_pages_array_wt);
-
int set_pages_wb(struct page *page, int numpages)
{
unsigned long addr = (unsigned long)page_address(page);
--
2.20.1
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* Re: "arm64/for-next/core" causes boot panic
From: Will Deacon @ 2019-08-13 9:02 UTC (permalink / raw)
To: Qian Cai
Cc: Catalin Marinas, linux-kernel, linux-arm-kernel, Andrey Konovalov
In-Reply-To: <1565646695.8572.6.camel@lca.pw>
Hi Qian,
Thanks for the report.
On Mon, Aug 12, 2019 at 05:51:35PM -0400, Qian Cai wrote:
> Booting today's linux-next on an arm64 server triggers a panic with
> CONFIG_KASAN_SW_TAGS=y pointing to this line,
Is this the only change on top of defconfig? If not, please can you share
your full .config?
> kfree()->virt_to_head_page()->compound_head()
>
> unsigned long head = READ_ONCE(page->compound_head);
>
> The bisect so far indicates one of those could be bad,
I guess that means the issue is reproducible on the arm64 for-next/core
branch. Once I have your .config, I'll give it a go.
> [ 0.000000][ T0] Unable to handle kernel paging request at virtual address
> 0030ffe001e01588
> [ 0.000000][ T0] Mem abort info:
> [ 0.000000][ T0] ESR = 0x96000004
> [ 0.000000][ T0] EC = 0x25: DABT (current EL), IL = 32 bits
> [ 0.000000][ T0] SET = 0, FnV = 0
> [ 0.000000][ T0] EA = 0, S1PTW = 0
> [ 0.000000][ T0] Data abort info:
> [ 0.000000][ T0] ISV = 0, ISS = 0x00000004
> [ 0.000000][ T0] CM = 0, WnR = 0
> [ 0.000000][ T0] [0030ffe001e01588] address between user and kernel
> address ranges
Hmm, nice address...
I suppose we're looking at the interaction of 52-bit VA, untagged pointers
and KASAN using sw tags. Lovely.
Thanks, and please keep us updated on the bisection.
Will
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* Re: [PATCH v2 3/3] MAINTAINERS: Add entry for IMX290 CMOS image sensor driver
From: Sakari Ailus @ 2019-08-13 9:23 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: devicetree, c.barrett, linux-kernel, a.brela, robh+dt, mchehab,
linux-arm-kernel, linux-media
In-Reply-To: <20190806130938.19916-4-manivannan.sadhasivam@linaro.org>
Hi Manivannan,
On Tue, Aug 06, 2019 at 06:39:38PM +0530, Manivannan Sadhasivam wrote:
> Add MAINTAINERS entry for Sony IMX290 CMOS image sensor driver.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> MAINTAINERS | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d0ed735994a5..27e4c1f57b61 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -14669,6 +14669,14 @@ S: Maintained
> F: drivers/media/i2c/imx274.c
> F: Documentation/devicetree/bindings/media/i2c/imx274.txt
>
> +SONY IMX290 SENSOR DRIVER
> +M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> +L: linux-media@vger.kernel.org
> +T: git git://linuxtv.org/media_tree.git
> +S: Maintained
> +F: drivers/media/i2c/imx290.c
> +F: Documentation/devicetree/bindings/media/i2c/imx290.txt
> +
> SONY IMX319 SENSOR DRIVER
> M: Bingbu Cao <bingbu.cao@intel.com>
> L: linux-media@vger.kernel.org
Please put the MAINTAINERS changes to the first patch adding files.
--
Sakari Ailus
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* Re: [PATCH v6 19/24] drm/bridge: dumb-vga-dac: Provide ddc symlink in connector sysfs directory
From: Geert Uytterhoeven @ 2019-08-13 9:33 UTC (permalink / raw)
To: Guenter Roeck
Cc: Neil Armstrong, David Airlie, DRI Development, Douglas Anderson,
linux-tegra, Thierry Reding, Laurent Pinchart, kernel,
Sam Ravnborg, linux-samsung-soc, Vincent Abriou,
Krzysztof Kozlowski, Jonathan Hunter,
open list:ARM/Rockchip SoC..., Chen-Yu Tsai, Kukjin Kim,
NXP Linux Team, Dave Airlie, freedreno, Pengutronix Kernel Team,
Jonas Karlman, linux-arm-msm, Intel Graphics Development,
Jyri Sarha, Mamta Shukla, linux-mediatek, Maxime Ripard,
Rodrigo Vivi, Matthias Brugger, Thomas Gleixner, Sean Paul,
Linux ARM, Jernej Skrabec, amd-gfx, Tomi Valkeinen,
Enrico Weigelt, Seung-Woo Kim, Linux Kernel Mailing List,
Andrzej Pietrasiewicz, Todor Tomov, Kyungmin Park, Huang Rui,
Thomas Zimmermann, Greg Kroah-Hartman, Alex Deucher, Shawn Guo,
Christian König, Gerd Hoffmann
In-Reply-To: <20190808034208.GA31284@roeck-us.net>
Hi Günter,
On Thu, Aug 8, 2019 at 5:42 AM Guenter Roeck <linux@roeck-us.net> wrote:
> On Fri, Jul 26, 2019 at 07:23:13PM +0200, Andrzej Pietrasiewicz wrote:
> > Use the ddc pointer provided by the generic connector.
> >
> > Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
> > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> This patch results in a crash when running qemu:versatilepb.
>
> Unable to handle kernel NULL pointer dereference at virtual address 000000c5
> pgd = (ptrval)
> [000000c5] *pgd=00000000
> Internal error: Oops: 5 [#1] ARM
> Modules linked in:
> CPU: 0 PID: 1 Comm: swapper Not tainted 5.3.0-rc1+ #1
> Hardware name: ARM-Versatile (Device Tree Support)
> PC is at sysfs_do_create_link_sd+0x38/0xd8
> LR is at sysfs_do_create_link_sd+0x38/0xd8
> [<c01ac94c>] (sysfs_do_create_link_sd) from [<c04c7fc0>] (drm_connector_register.part.1+0x40/0xa0)
> [<c04c7fc0>] (drm_connector_register.part.1) from [<c04c87e0>] (drm_connector_register_all+0x90/0xb8)
> [<c04c87e0>] (drm_connector_register_all) from [<c04cefcc>] (drm_modeset_register_all+0x44/0x6c)
> [<c04cefcc>] (drm_modeset_register_all) from [<c04b4ebc>] (drm_dev_register+0x15c/0x1c0)
> [<c04b4ebc>] (drm_dev_register) from [<c04df2f8>] (pl111_amba_probe+0x2e0/0x4ac)
> [<c04df2f8>] (pl111_amba_probe) from [<c045e8d8>] (amba_probe+0x9c/0x118)
Seeing the same thing on Salvator-XS, due to vga->ddc being -ENODEV.
> # first bad commit: [a4f9087e85de141e4e6d21ac2c583ae096cc9aba] drm/bridge: dumb-vga-dac: Provide ddc symlink in connector sysfs directory
Fix sent
https://lore.kernel.org/lkml/20190813093046.4976-1-geert+renesas@glider.be/
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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* [PATCH] Input: cros_ec_keyb: Add back missing mask for event_type
From: Fei Shao @ 2019-08-13 9:38 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Brian Norris, Fei Shao, Dmitry Torokhov, linux-kernel, Ting Shen,
Guenter Roeck, linux-input, Enric Balletbo i Serra, Benson Leung
In the previous patch we didn't mask out event_type in case statement,
so switches are always picked instead of buttons, which results in
ChromeOS devices misbehaving when power button is pressed.
This patch adds back the missing mask.
Fixes: d096aa3eb604 ("Input: cros_ec_keyb: mask out extra flags in event_type")
Signed-off-by: Fei Shao <fshao@chromium.org>
---
drivers/input/keyboard/cros_ec_keyb.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/input/keyboard/cros_ec_keyb.c b/drivers/input/keyboard/cros_ec_keyb.c
index 38cb6d82d8fe..bef7bee6f05e 100644
--- a/drivers/input/keyboard/cros_ec_keyb.c
+++ b/drivers/input/keyboard/cros_ec_keyb.c
@@ -226,6 +226,8 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
{
struct cros_ec_keyb *ckdev = container_of(nb, struct cros_ec_keyb,
notifier);
+ uint8_t mkbp_event_type = ckdev->ec->event_data.event_type &
+ EC_MKBP_EVENT_TYPE_MASK;
u32 val;
unsigned int ev_type;
@@ -237,7 +239,7 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
if (queued_during_suspend && !device_may_wakeup(ckdev->dev))
return NOTIFY_OK;
- switch (ckdev->ec->event_data.event_type & EC_MKBP_EVENT_TYPE_MASK) {
+ switch (mkbp_event_type) {
case EC_MKBP_EVENT_KEY_MATRIX:
pm_wakeup_event(ckdev->dev, 0);
@@ -264,7 +266,7 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
case EC_MKBP_EVENT_SWITCH:
pm_wakeup_event(ckdev->dev, 0);
- if (ckdev->ec->event_data.event_type == EC_MKBP_EVENT_BUTTON) {
+ if (mkbp_event_type == EC_MKBP_EVENT_BUTTON) {
val = get_unaligned_le32(
&ckdev->ec->event_data.data.buttons);
ev_type = EV_KEY;
--
2.23.0.rc1.153.gdeed80330f-goog
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* Re: [PATCH v2 1/3] dt-bindings: media: i2c: Add IMX290 CMOS sensor binding
From: Sakari Ailus @ 2019-08-13 9:45 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: devicetree, c.barrett, linux-kernel, a.brela, robh+dt, mchehab,
linux-arm-kernel, linux-media
In-Reply-To: <20190806130938.19916-2-manivannan.sadhasivam@linaro.org>
Hi Manivannan,
On Tue, Aug 06, 2019 at 06:39:36PM +0530, Manivannan Sadhasivam wrote:
> Add devicetree binding for IMX290 CMOS image sensor.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> .../devicetree/bindings/media/i2c/imx290.txt | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/i2c/imx290.txt
>
> diff --git a/Documentation/devicetree/bindings/media/i2c/imx290.txt b/Documentation/devicetree/bindings/media/i2c/imx290.txt
> new file mode 100644
> index 000000000000..7535b5b5b24b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/i2c/imx290.txt
> @@ -0,0 +1,51 @@
> +* Sony IMX290 1/2.8-Inch CMOS Image Sensor
> +
> +The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with
> +Square Pixel for Color Cameras. It is programmable through I2C and 4-wire
> +interfaces. The sensor output is available via CMOS logic parallel SDR output,
> +Low voltage LVDS DDR output and CSI-2 serial data output.
If there are three to choose from, then you should specify which one is in
use. Given that I think chances remain slim we'd add support for the other
two (it's certainly not ruled out though), CSI-2 could be the default. But
this needs to be documented.
> +
> +Required Properties:
> +- compatible: Should be "sony,imx290"
> +- reg: I2C bus address of the device
> +- clocks: Reference to the xclk clock.
> +- clock-names: Should be "xclk".
> +- clock-frequency: Frequency of the xclk clock.
...in Hz.
> +- vdddo-supply: Sensor digital IO regulator.
> +- vdda-supply: Sensor analog regulator.
> +- vddd-supply: Sensor digital core regulator.
> +
> +Optional Properties:
> +- reset-gpios: Sensor reset GPIO
> +
> +The imx290 device node should contain one 'port' child node with
> +an 'endpoint' subnode. For further reading on port node refer to
> +Documentation/devicetree/bindings/media/video-interfaces.txt.
Which other properties are relevant for the device? I suppose you can't
change the lane order, so clock-lanes is redundant (don't use it in the
example) and data-lanes should be monotonically incrementing series from 1
to 4.
> +
> +Example:
> + &i2c1 {
> + ...
> + imx290: imx290@1a {
imx290: camera-sensor@1a {
> + compatible = "sony,imx290";
> + reg = <0x1a>;
> +
> + reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&camera_rear_default>;
> +
> + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
> + clock-names = "xclk";
> + clock-frequency = <37125000>;
> +
> + vdddo-supply = <&camera_vdddo_1v8>;
> + vdda-supply = <&camera_vdda_2v8>;
> + vddd-supply = <&camera_vddd_1v5>;
> +
> + port {
> + imx290_ep: endpoint {
> + clock-lanes = <1>;
> + data-lanes = <0 2 3 4>;
> + remote-endpoint = <&csiphy0_ep>;
> + };
> + };
> + };
--
Regards,
Sakari Ailus
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* Re: [PATCH] Input: cros_ec_keyb: Add back missing mask for event_type
From: Nicolas Boichat @ 2019-08-13 9:47 UTC (permalink / raw)
To: Fei Shao
Cc: Brian Norris, Dmitry Torokhov, lkml, Ting Shen, Guenter Roeck,
open list:HID CORE LAYER, Enric Balletbo i Serra, Benson Leung,
linux-arm Mailing List
In-Reply-To: <20190813093821.74158-1-fshao@chromium.org>
On Tue, Aug 13, 2019 at 5:38 PM Fei Shao <fshao@chromium.org> wrote:
>
> In the previous patch we didn't mask out event_type in case statement,
> so switches are always picked instead of buttons, which results in
> ChromeOS devices misbehaving when power button is pressed.
> This patch adds back the missing mask.
>
> Fixes: d096aa3eb604 ("Input: cros_ec_keyb: mask out extra flags in event_type")
> Signed-off-by: Fei Shao <fshao@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> drivers/input/keyboard/cros_ec_keyb.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/input/keyboard/cros_ec_keyb.c b/drivers/input/keyboard/cros_ec_keyb.c
> index 38cb6d82d8fe..bef7bee6f05e 100644
> --- a/drivers/input/keyboard/cros_ec_keyb.c
> +++ b/drivers/input/keyboard/cros_ec_keyb.c
> @@ -226,6 +226,8 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
> {
> struct cros_ec_keyb *ckdev = container_of(nb, struct cros_ec_keyb,
> notifier);
> + uint8_t mkbp_event_type = ckdev->ec->event_data.event_type &
> + EC_MKBP_EVENT_TYPE_MASK;
> u32 val;
> unsigned int ev_type;
>
> @@ -237,7 +239,7 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
> if (queued_during_suspend && !device_may_wakeup(ckdev->dev))
> return NOTIFY_OK;
>
> - switch (ckdev->ec->event_data.event_type & EC_MKBP_EVENT_TYPE_MASK) {
> + switch (mkbp_event_type) {
> case EC_MKBP_EVENT_KEY_MATRIX:
> pm_wakeup_event(ckdev->dev, 0);
>
> @@ -264,7 +266,7 @@ static int cros_ec_keyb_work(struct notifier_block *nb,
> case EC_MKBP_EVENT_SWITCH:
> pm_wakeup_event(ckdev->dev, 0);
>
> - if (ckdev->ec->event_data.event_type == EC_MKBP_EVENT_BUTTON) {
> + if (mkbp_event_type == EC_MKBP_EVENT_BUTTON) {
> val = get_unaligned_le32(
> &ckdev->ec->event_data.data.buttons);
> ev_type = EV_KEY;
> --
> 2.23.0.rc1.153.gdeed80330f-goog
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* Re: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
From: Lorenzo Pieralisi @ 2019-08-13 9:51 UTC (permalink / raw)
To: Xiaowei Bao
Cc: linux-arm-kernel@lists.infradead.org, Roy Zang, Leonard Crestez,
hayashi.kunihiko@socionext.com, andrew.smirnov@gmail.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
yue.wang@amlogic.com, Kishon Vijay Abraham I, M.h. Lian,
dwmw@amazon.co.uk, jonnyc@amazon.com, bhelgaas@google.com,
tpiepho@impinj.com, linuxppc-dev@lists.ozlabs.org, Mingkai Hu,
l.stach@pengutronix.de
In-Reply-To: <AM5PR04MB32993CC1344DD660A298C7E1F5D20@AM5PR04MB3299.eurprd04.prod.outlook.com>
You should fix your email client set-up to avoid sticking an [EXT]
tag to your emails $SUBJECT.
On Tue, Aug 13, 2019 at 07:39:48AM +0000, Xiaowei Bao wrote:
>
>
> > -----Original Message-----
> > From: Kishon Vijay Abraham I <kishon@ti.com>
> > Sent: 2019年8月13日 15:30
> > To: Xiaowei Bao <xiaowei.bao@nxp.com>; lorenzo.pieralisi@arm.com;
> > bhelgaas@google.com; M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu
> > <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>;
> > l.stach@pengutronix.de; tpiepho@impinj.com; Leonard Crestez
> > <leonard.crestez@nxp.com>; andrew.smirnov@gmail.com;
> > yue.wang@amlogic.com; hayashi.kunihiko@socionext.com;
> > dwmw@amazon.co.uk; jonnyc@amazon.com; linux-pci@vger.kernel.org;
> > linux-kernel@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> > linux-arm-kernel@lists.infradead.org
> > Subject: [EXT] Re: [PATCHv5 1/2] PCI: layerscape: Add the bar_fixed_64bit
> > property in EP driver.
> >
> > Caution: EXT Email
See above, this "Caution" stuff should disappear.
Also, quoting the email header is useless, please configure your email
client to remove it.
Thanks,
Lorenzo
> > On 13/08/19 11:58 AM, Xiaowei Bao wrote:
> > > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > > 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware, so set
> > > the bar_fixed_64bit with 0x14.
> > >
> > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> >
> > Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> > > ---
> > > v2:
> > > - Replace value 0x14 with a macro.
> > > v3:
> > > - No change.
> > > v4:
> > > - send the patch again with '--to'.
> > > v5:
> > > - fix the commit message.
> > >
> > > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > index be61d96..ca9aa45 100644
> > > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > @@ -44,6 +44,7 @@ static const struct pci_epc_features
> > ls_pcie_epc_features = {
> > > .linkup_notifier = false,
> > > .msi_capable = true,
> > > .msix_capable = false,
> > > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > > };
> > >
> > > static const struct pci_epc_features*
> I check other platforms, it is 'static const struct pci_epc_features', I can get the correct
> Value use this define way in pci-epf-test.c file.
> > >
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