* [PATCH 4/4] clk: imx8mn: Add GIC clock
From: Leonard Crestez @ 2019-08-13 17:05 UTC (permalink / raw)
To: Jacky Bai, Abel Vesa, Stephen Boyd, Shawn Guo
Cc: Dong Aisheng, Anson Huang, Michael Turquette, linux-imx, kernel,
Fabio Estevam, linux-clk, linux-arm-kernel
In-Reply-To: <cover.1565715590.git.leonard.crestez@nxp.com>
This is enabled by default but if it's not explicitly defined and marked
as critical then its parent might get turned off.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/clk/imx/clk-imx8mn.c | 5 +++++
include/dt-bindings/clock/imx8mn-clock.h | 3 ++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 106cc417c19b..3a71bb37c656 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -269,10 +269,14 @@ static const char * const imx8mn_usb_core_sels[] = {"osc_24m", "sys_pll1_100m",
static const char * const imx8mn_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pll1_40m",
"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
+static const char * const imx8mn_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
+ "sys_pll2_100m", "sys_pll1_800m", "clk_ext2",
+ "clk_ext4", "audio_pll2_out" };
+
static const char * const imx8mn_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
"sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out",
"sys_pll2_250m", "audio_pll2_out", };
static const char * const imx8mn_ecspi2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m",
@@ -522,10 +526,11 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
clks[IMX8MN_CLK_UART2] = imx8m_clk_composite("uart2", imx8mn_uart2_sels, base + 0xaf80);
clks[IMX8MN_CLK_UART3] = imx8m_clk_composite("uart3", imx8mn_uart3_sels, base + 0xb000);
clks[IMX8MN_CLK_UART4] = imx8m_clk_composite("uart4", imx8mn_uart4_sels, base + 0xb080);
clks[IMX8MN_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mn_usb_core_sels, base + 0xb100);
clks[IMX8MN_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mn_usb_phy_sels, base + 0xb180);
+ clks[IMX8MN_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mn_gic_sels, base + 0xb200);
clks[IMX8MN_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mn_ecspi1_sels, base + 0xb280);
clks[IMX8MN_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mn_ecspi2_sels, base + 0xb300);
clks[IMX8MN_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mn_pwm1_sels, base + 0xb380);
clks[IMX8MN_CLK_PWM2] = imx8m_clk_composite("pwm2", imx8mn_pwm2_sels, base + 0xb400);
clks[IMX8MN_CLK_PWM3] = imx8m_clk_composite("pwm3", imx8mn_pwm3_sels, base + 0xb480);
diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h
index 5255b1c2420e..d7b201652f4c 100644
--- a/include/dt-bindings/clock/imx8mn-clock.h
+++ b/include/dt-bindings/clock/imx8mn-clock.h
@@ -207,9 +207,10 @@
#define IMX8MN_CLK_SDMA3_ROOT 189
#define IMX8MN_CLK_TMU_ROOT 190
#define IMX8MN_CLK_ARM 191
#define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK 192
#define IMX8MN_CLK_GPU_CORE_ROOT 193
+#define IMX8MN_CLK_GIC 194
-#define IMX8MN_CLK_END 194
+#define IMX8MN_CLK_END 195
#endif
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 1/4] clk: imx8mq: Fix sys3 pll references
From: Leonard Crestez @ 2019-08-13 17:05 UTC (permalink / raw)
To: Jacky Bai, Abel Vesa, Stephen Boyd, Shawn Guo
Cc: Dong Aisheng, Anson Huang, Michael Turquette, linux-imx, kernel,
Fabio Estevam, linux-clk, linux-arm-kernel
In-Reply-To: <cover.1565715590.git.leonard.crestez@nxp.com>
The "sys3_pll2_out" CLK was removed in refactoring so all references
need to be updated to "sys3_pll_out"
Fixes: e9dda4af685f ("clk: imx: Refactor entire sccg pll clk")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 112 +++++++++++++++++------------------
1 file changed, 56 insertions(+), 56 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 81a024928408..41fc9c63356e 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -39,93 +39,93 @@ static const char * const sys2_pll_out_sels[] = {"sys1_pll1_ref_sel", "sys2_pll1
static const char * const sys3_pll_out_sels[] = {"sys3_pll1_ref_sel", "sys2_pll1_ref_sel", };
static const char * const dram_pll_out_sels[] = {"dram_pll1_ref_sel", };
/* CCM ROOT */
static const char * const imx8mq_a53_sels[] = {"osc_25m", "arm_pll_out", "sys2_pll_500m", "sys2_pll_1000m",
- "sys1_pll_800m", "sys1_pll_400m", "audio_pll1_out", "sys3_pll2_out", };
+ "sys1_pll_800m", "sys1_pll_400m", "audio_pll1_out", "sys3_pll_out", };
static const char * const imx8mq_arm_m4_sels[] = {"osc_25m", "sys2_pll_200m", "sys2_pll_250m", "sys1_pll_266m",
- "sys1_pll_800m", "audio_pll1_out", "video_pll1_out", "sys3_pll2_out", };
+ "sys1_pll_800m", "audio_pll1_out", "video_pll1_out", "sys3_pll_out", };
static const char * const imx8mq_vpu_sels[] = {"osc_25m", "arm_pll_out", "sys2_pll_500m", "sys2_pll_1000m",
"sys1_pll_800m", "sys1_pll_400m", "audio_pll1_out", "vpu_pll_out", };
-static const char * const imx8mq_gpu_core_sels[] = {"osc_25m", "gpu_pll_out", "sys1_pll_800m", "sys3_pll2_out",
+static const char * const imx8mq_gpu_core_sels[] = {"osc_25m", "gpu_pll_out", "sys1_pll_800m", "sys3_pll_out",
"sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
-static const char * const imx8mq_gpu_shader_sels[] = {"osc_25m", "gpu_pll_out", "sys1_pll_800m", "sys3_pll2_out",
+static const char * const imx8mq_gpu_shader_sels[] = {"osc_25m", "gpu_pll_out", "sys1_pll_800m", "sys3_pll_out",
"sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
static const char * const imx8mq_main_axi_sels[] = {"osc_25m", "sys2_pll_333m", "sys1_pll_800m", "sys2_pll_250m",
"sys2_pll_1000m", "audio_pll1_out", "video_pll1_out", "sys1_pll_100m",};
static const char * const imx8mq_enet_axi_sels[] = {"osc_25m", "sys1_pll_266m", "sys1_pll_800m", "sys2_pll_250m",
- "sys2_pll_200m", "audio_pll1_out", "video_pll1_out", "sys3_pll2_out", };
+ "sys2_pll_200m", "audio_pll1_out", "video_pll1_out", "sys3_pll_out", };
static const char * const imx8mq_nand_usdhc_sels[] = {"osc_25m", "sys1_pll_266m", "sys1_pll_800m", "sys2_pll_200m",
- "sys1_pll_133m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll1_out", };
+ "sys1_pll_133m", "sys3_pll_out", "sys2_pll_250m", "audio_pll1_out", };
-static const char * const imx8mq_vpu_bus_sels[] = {"osc_25m", "sys1_pll_800m", "vpu_pll_out", "audio_pll2_out", "sys3_pll2_out", "sys2_pll_1000m", "sys2_pll_200m", "sys1_pll_100m", };
+static const char * const imx8mq_vpu_bus_sels[] = {"osc_25m", "sys1_pll_800m", "vpu_pll_out", "audio_pll2_out", "sys3_pll_out", "sys2_pll_1000m", "sys2_pll_200m", "sys1_pll_100m", };
-static const char * const imx8mq_disp_axi_sels[] = {"osc_25m", "sys2_pll_125m", "sys1_pll_800m", "sys3_pll2_out", "sys1_pll_400m", "audio_pll2_out", "clk_ext1", "clk_ext4", };
+static const char * const imx8mq_disp_axi_sels[] = {"osc_25m", "sys2_pll_125m", "sys1_pll_800m", "sys3_pll_out", "sys1_pll_400m", "audio_pll2_out", "clk_ext1", "clk_ext4", };
-static const char * const imx8mq_disp_apb_sels[] = {"osc_25m", "sys2_pll_125m", "sys1_pll_800m", "sys3_pll2_out",
+static const char * const imx8mq_disp_apb_sels[] = {"osc_25m", "sys2_pll_125m", "sys1_pll_800m", "sys3_pll_out",
"sys1_pll_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", };
static const char * const imx8mq_disp_rtrm_sels[] = {"osc_25m", "sys1_pll_800m", "sys2_pll_200m", "sys1_pll_400m",
"audio_pll1_out", "video_pll1_out", "clk_ext2", "clk_ext3", };
static const char * const imx8mq_usb_bus_sels[] = {"osc_25m", "sys2_pll_500m", "sys1_pll_800m", "sys2_pll_100m",
"sys2_pll_200m", "clk_ext2", "clk_ext4", "audio_pll2_out", };
-static const char * const imx8mq_gpu_axi_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m",
+static const char * const imx8mq_gpu_axi_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll_out", "sys2_pll_1000m",
"audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
-static const char * const imx8mq_gpu_ahb_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll2_out", "sys2_pll_1000m",
+static const char * const imx8mq_gpu_ahb_sels[] = {"osc_25m", "sys1_pll_800m", "gpu_pll_out", "sys3_pll_out", "sys2_pll_1000m",
"audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
-static const char * const imx8mq_noc_sels[] = {"osc_25m", "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_1000m", "sys2_pll_500m",
+static const char * const imx8mq_noc_sels[] = {"osc_25m", "sys1_pll_800m", "sys3_pll_out", "sys2_pll_1000m", "sys2_pll_500m",
"audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
-static const char * const imx8mq_noc_apb_sels[] = {"osc_25m", "sys1_pll_400m", "sys3_pll2_out", "sys2_pll_333m", "sys2_pll_200m",
+static const char * const imx8mq_noc_apb_sels[] = {"osc_25m", "sys1_pll_400m", "sys3_pll_out", "sys2_pll_333m", "sys2_pll_200m",
"sys1_pll_800m", "audio_pll1_out", "video_pll1_out", };
static const char * const imx8mq_ahb_sels[] = {"osc_25m", "sys1_pll_133m", "sys1_pll_800m", "sys1_pll_400m",
- "sys2_pll_125m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", };
+ "sys2_pll_125m", "sys3_pll_out", "audio_pll1_out", "video_pll1_out", };
static const char * const imx8mq_audio_ahb_sels[] = {"osc_25m", "sys2_pll_500m", "sys1_pll_800m", "sys2_pll_1000m",
- "sys2_pll_166m", "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", };
+ "sys2_pll_166m", "sys3_pll_out", "audio_pll1_out", "video_pll1_out", };
static const char * const imx8mq_dsi_ahb_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out"};
+ "sys2_pll_1000m", "sys3_pll_out", "clk_ext3", "audio_pll2_out"};
static const char * const imx8mq_dram_alt_sels[] = {"osc_25m", "sys1_pll_800m", "sys1_pll_100m", "sys2_pll_500m",
"sys2_pll_250m", "sys1_pll_400m", "audio_pll1_out", "sys1_pll_266m", };
static const char * const imx8mq_dram_apb_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_40m", "sys1_pll_160m",
- "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
+ "sys1_pll_800m", "sys3_pll_out", "sys2_pll_250m", "audio_pll2_out", };
-static const char * const imx8mq_vpu_g1_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll2_out", "audio_pll1_out", };
+static const char * const imx8mq_vpu_g1_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll_out", "audio_pll1_out", };
-static const char * const imx8mq_vpu_g2_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll2_out", "audio_pll1_out", };
+static const char * const imx8mq_vpu_g2_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_100m", "sys2_pll_125m", "sys3_pll_out", "audio_pll1_out", };
-static const char * const imx8mq_disp_dtrc_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_pll2_out", "audio_pll2_out", };
+static const char * const imx8mq_disp_dtrc_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_pll_out", "audio_pll2_out", };
-static const char * const imx8mq_disp_dc8000_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_pll2_out", "audio_pll2_out", };
+static const char * const imx8mq_disp_dc8000_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_pll_out", "audio_pll2_out", };
static const char * const imx8mq_pcie1_ctrl_sels[] = {"osc_25m", "sys2_pll_250m", "sys2_pll_200m", "sys1_pll_266m",
- "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_250m", "sys3_pll2_out", };
+ "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_250m", "sys3_pll_out", };
static const char * const imx8mq_pcie1_phy_sels[] = {"osc_25m", "sys2_pll_100m", "sys2_pll_500m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4", };
-static const char * const imx8mq_pcie1_aux_sels[] = {"osc_25m", "sys2_pll_200m", "sys2_pll_500m", "sys3_pll2_out",
+static const char * const imx8mq_pcie1_aux_sels[] = {"osc_25m", "sys2_pll_200m", "sys2_pll_500m", "sys3_pll_out",
"sys2_pll_100m", "sys1_pll_80m", "sys1_pll_160m", "sys1_pll_200m", };
-static const char * const imx8mq_dc_pixel_sels[] = {"osc_25m", "video_pll1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext4", };
+static const char * const imx8mq_dc_pixel_sels[] = {"osc_25m", "video_pll1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll_out", "clk_ext4", };
-static const char * const imx8mq_lcdif_pixel_sels[] = {"osc_25m", "video_pll1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll2_out", "clk_ext4", };
+static const char * const imx8mq_lcdif_pixel_sels[] = {"osc_25m", "video_pll1_out", "audio_pll2_out", "audio_pll1_out", "sys1_pll_800m", "sys2_pll_1000m", "sys3_pll_out", "clk_ext4", };
static const char * const imx8mq_sai1_sels[] = {"osc_25m", "audio_pll1_out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext1", "clk_ext2", };
static const char * const imx8mq_sai2_sels[] = {"osc_25m", "audio_pll1_out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext2", "clk_ext3", };
@@ -149,44 +149,44 @@ static const char * const imx8mq_enet_timer_sels[] = {"osc_25m", "sys2_pll_100m"
static const char * const imx8mq_enet_phy_sels[] = {"osc_25m", "sys2_pll_50m", "sys2_pll_125m", "sys2_pll_500m",
"audio_pll1_out", "video_pll1_out", "audio_pll2_out", };
static const char * const imx8mq_nand_sels[] = {"osc_25m", "sys2_pll_500m", "audio_pll1_out", "sys1_pll_400m",
- "audio_pll2_out", "sys3_pll2_out", "sys2_pll_250m", "video_pll1_out", };
+ "audio_pll2_out", "sys3_pll_out", "sys2_pll_250m", "video_pll1_out", };
static const char * const imx8mq_qspi_sels[] = {"osc_25m", "sys1_pll_400m", "sys1_pll_800m", "sys2_pll_500m",
- "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m", };
+ "audio_pll2_out", "sys1_pll_266m", "sys3_pll_out", "sys1_pll_100m", };
static const char * const imx8mq_usdhc1_sels[] = {"osc_25m", "sys1_pll_400m", "sys1_pll_800m", "sys2_pll_500m",
- "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m", };
+ "audio_pll2_out", "sys1_pll_266m", "sys3_pll_out", "sys1_pll_100m", };
static const char * const imx8mq_usdhc2_sels[] = {"osc_25m", "sys1_pll_400m", "sys1_pll_800m", "sys2_pll_500m",
- "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m", };
+ "audio_pll2_out", "sys1_pll_266m", "sys3_pll_out", "sys1_pll_100m", };
-static const char * const imx8mq_i2c1_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out",
+static const char * const imx8mq_i2c1_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys1_pll_133m", };
-static const char * const imx8mq_i2c2_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out",
+static const char * const imx8mq_i2c2_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys1_pll_133m", };
-static const char * const imx8mq_i2c3_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out",
+static const char * const imx8mq_i2c3_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys1_pll_133m", };
-static const char * const imx8mq_i2c4_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll2_out", "audio_pll1_out",
+static const char * const imx8mq_i2c4_sels[] = {"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys1_pll_133m", };
static const char * const imx8mq_uart1_sels[] = {"osc_25m", "sys1_pll_80m", "sys2_pll_200m", "sys2_pll_100m",
- "sys3_pll2_out", "clk_ext2", "clk_ext4", "audio_pll2_out", };
+ "sys3_pll_out", "clk_ext2", "clk_ext4", "audio_pll2_out", };
static const char * const imx8mq_uart2_sels[] = {"osc_25m", "sys1_pll_80m", "sys2_pll_200m", "sys2_pll_100m",
- "sys3_pll2_out", "clk_ext2", "clk_ext3", "audio_pll2_out", };
+ "sys3_pll_out", "clk_ext2", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_uart3_sels[] = {"osc_25m", "sys1_pll_80m", "sys2_pll_200m", "sys2_pll_100m",
- "sys3_pll2_out", "clk_ext2", "clk_ext4", "audio_pll2_out", };
+ "sys3_pll_out", "clk_ext2", "clk_ext4", "audio_pll2_out", };
static const char * const imx8mq_uart4_sels[] = {"osc_25m", "sys1_pll_80m", "sys2_pll_200m", "sys2_pll_100m",
- "sys3_pll2_out", "clk_ext2", "clk_ext3", "audio_pll2_out", };
+ "sys3_pll_out", "clk_ext2", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_usb_core_sels[] = {"osc_25m", "sys1_pll_100m", "sys1_pll_40m", "sys2_pll_100m",
"sys2_pll_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_usb_phy_sels[] = {"osc_25m", "sys1_pll_100m", "sys1_pll_40m", "sys2_pll_100m",
@@ -194,83 +194,83 @@ static const char * const imx8mq_usb_phy_sels[] = {"osc_25m", "sys1_pll_100m", "
static const char * const imx8mq_gic_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_40m", "sys2_pll_100m",
"sys2_pll_200m", "clk_ext2", "clk_ext3", "audio_pll2_out" };
static const char * const imx8mq_ecspi1_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_40m", "sys1_pll_160m",
- "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
+ "sys1_pll_800m", "sys3_pll_out", "sys2_pll_250m", "audio_pll2_out", };
static const char * const imx8mq_ecspi2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_40m", "sys1_pll_160m",
- "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
+ "sys1_pll_800m", "sys3_pll_out", "sys2_pll_250m", "audio_pll2_out", };
static const char * const imx8mq_pwm1_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_160m", "sys1_pll_40m",
- "sys3_pll2_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
+ "sys3_pll_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
static const char * const imx8mq_pwm2_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_160m", "sys1_pll_40m",
- "sys3_pll2_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
+ "sys3_pll_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
static const char * const imx8mq_pwm3_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_160m", "sys1_pll_40m",
- "sys3_pll2_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", };
+ "sys3_pll_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", };
static const char * const imx8mq_pwm4_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_160m", "sys1_pll_40m",
- "sys3_pll2_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", };
+ "sys3_pll_out", "clk_ext2", "sys1_pll_80m", "video_pll1_out", };
static const char * const imx8mq_gpt1_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_400m", "sys1_pll_40m",
"sys1_pll_80m", "audio_pll1_out", "clk_ext1", };
static const char * const imx8mq_wdog_sels[] = {"osc_25m", "sys1_pll_133m", "sys1_pll_160m", "vpu_pll_out",
- "sys2_pll_125m", "sys3_pll2_out", "sys1_pll_80m", "sys2_pll_166m", };
+ "sys2_pll_125m", "sys3_pll_out", "sys1_pll_80m", "sys2_pll_166m", };
-static const char * const imx8mq_wrclk_sels[] = {"osc_25m", "sys1_pll_40m", "vpu_pll_out", "sys3_pll2_out", "sys2_pll_200m",
+static const char * const imx8mq_wrclk_sels[] = {"osc_25m", "sys1_pll_40m", "vpu_pll_out", "sys3_pll_out", "sys2_pll_200m",
"sys1_pll_266m", "sys2_pll_500m", "sys1_pll_100m", };
static const char * const imx8mq_dsi_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_dsi_phy_sels[] = {"osc_25m", "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",
"sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_dsi_dbi_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_100m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_dsi_esc_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_csi1_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_csi1_phy_sels[] = {"osc_25m", "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",
"sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_csi1_esc_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_csi2_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_csi2_phy_sels[] = {"osc_25m", "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",
"sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out", };
static const char * const imx8mq_csi2_esc_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
- "sys2_pll_1000m", "sys3_pll2_out", "clk_ext3", "audio_pll2_out", };
+ "sys2_pll_1000m", "sys3_pll_out", "clk_ext3", "audio_pll2_out", };
static const char * const imx8mq_pcie2_ctrl_sels[] = {"osc_25m", "sys2_pll_250m", "sys2_pll_200m", "sys1_pll_266m",
- "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_333m", "sys3_pll2_out", };
+ "sys1_pll_800m", "sys2_pll_500m", "sys2_pll_333m", "sys3_pll_out", };
static const char * const imx8mq_pcie2_phy_sels[] = {"osc_25m", "sys2_pll_100m", "sys2_pll_500m", "clk_ext1",
"clk_ext2", "clk_ext3", "clk_ext4", "sys1_pll_400m", };
-static const char * const imx8mq_pcie2_aux_sels[] = {"osc_25m", "sys2_pll_200m", "sys2_pll_50m", "sys3_pll2_out",
+static const char * const imx8mq_pcie2_aux_sels[] = {"osc_25m", "sys2_pll_200m", "sys2_pll_50m", "sys3_pll_out",
"sys2_pll_100m", "sys1_pll_80m", "sys1_pll_160m", "sys1_pll_200m", };
static const char * const imx8mq_ecspi3_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_40m", "sys1_pll_160m",
- "sys1_pll_800m", "sys3_pll2_out", "sys2_pll_250m", "audio_pll2_out", };
+ "sys1_pll_800m", "sys3_pll_out", "sys2_pll_250m", "audio_pll2_out", };
static const char * const imx8mq_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static const char * const imx8mq_clko1_sels[] = {"osc_25m", "sys1_pll_800m", "osc_27m", "sys1_pll_200m",
"audio_pll2_out", "sys2_pll_500m", "vpu_pll_out", "sys1_pll_80m", };
static const char * const imx8mq_clko2_sels[] = {"osc_25m", "sys2_pll_200m", "sys1_pll_400m", "sys2_pll_166m",
- "sys3_pll2_out", "audio_pll1_out", "video_pll1_out", "ckil", };
+ "sys3_pll_out", "audio_pll1_out", "video_pll1_out", "ckil", };
static struct clk_onecell_data clk_data;
static struct clk ** const uart_clks[] = {
&clks[IMX8MQ_CLK_UART1_ROOT],
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 3/4] clk: imx8mn: Fix incorrect parents
From: Leonard Crestez @ 2019-08-13 17:05 UTC (permalink / raw)
To: Jacky Bai, Abel Vesa, Stephen Boyd, Shawn Guo
Cc: Dong Aisheng, Anson Huang, Michael Turquette, linux-imx, kernel,
Fabio Estevam, linux-clk, linux-arm-kernel
In-Reply-To: <cover.1565715590.git.leonard.crestez@nxp.com>
* Replace to audio_pll2_clk with audio_pll2_out
* Replace sys3_pll2_out with sys_pll3_out
* Replace sys1_pll_40m with sys_pll1_40m
* qspi parent[2] is sys_pll2_333m not sys_pll1_800m
Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/clk/imx/clk-imx8mn.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index ecd1062f6847..106cc417c19b 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -138,11 +138,11 @@ static const char * const imx8mn_nand_usdhc_sels[] = {"osc_24m", "sys_pll1_266m"
static const char * const imx8mn_disp_axi_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_pll1_800m",
"sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
"clk_ext1", "clk_ext4", };
static const char * const imx8mn_disp_apb_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll1_800m",
- "sys_pll3_out", "sys1_pll_40m", "audio_pll2_out",
+ "sys_pll3_out", "sys_pll1_40m", "audio_pll2_out",
"clk_ext1", "clk_ext3", };
static const char * const imx8mn_usb_bus_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m",
"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
"clk_ext4", "audio_pll2_out", };
@@ -217,13 +217,13 @@ static const char * const imx8mn_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "
static const char * const imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out",
"sys_pll1_400m", "audio_pll2_out", "sys_pll3_out",
"sys_pll2_250m", "video_pll1_out", };
-static const char * const imx8mn_qspi_sels[] = {"osc_24m", "sys1_pll_400m", "sys_pll1_800m",
- "sys2_pll_500m", "audio_pll2_out", "sys1_pll_266m",
- "sys3_pll2_out", "sys1_pll_100m", };
+static const char * const imx8mn_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll2_333m",
+ "sys_pll2_500m", "audio_pll2_out", "sys_pll1_266m",
+ "sys_pll3_out", "sys_pll1_100m", };
static const char * const imx8mn_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m",
"sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
"audio_pll2_out", "sys_pll1_100m", };
@@ -286,11 +286,11 @@ static const char * const imx8mn_pwm1_sels[] = {"osc_24m", "sys_pll2_100m", "sys
static const char * const imx8mn_pwm2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
"sys_pll1_40m", "sys_pll3_out", "clk_ext1",
"sys_pll1_80m", "video_pll1_out", };
static const char * const imx8mn_pwm3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
- "sys_pll1_40m", "sys3_pll2_out", "clk_ext2",
+ "sys_pll1_40m", "sys_pll3_out", "clk_ext2",
"sys_pll1_80m", "video_pll1_out", };
static const char * const imx8mn_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m",
"sys_pll1_40m", "sys_pll3_out", "clk_ext2",
"sys_pll1_80m", "video_pll1_out", };
@@ -315,11 +315,11 @@ static const char * const imx8mn_dsi_dbi_sels[] = {"osc_24m", "sys_pll1_266m", "
"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
"audio_pll2_out", "video_pll1_out", };
static const char * const imx8mn_usdhc3_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m",
"sys_pll2_500m", "sys_pll3_out", "sys_pll1_266m",
- "audio_pll2_clk", "sys_pll1_100m", };
+ "audio_pll2_out", "sys_pll1_100m", };
static const char * const imx8mn_camera_pixel_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m",
"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out",
"audio_pll2_out", "video_pll1_out", };
@@ -344,11 +344,11 @@ static const char * const imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audi
"clk_ext3", "audio_pll2_out", };
static const char * const imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m",
- "sys_pll1_200m", "audio_pll2_clk", "vpu_pll",
+ "sys_pll1_200m", "audio_pll2_out", "vpu_pll",
"sys_pll1_80m", };
static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m",
"sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
"video_pll1_out", "osc_32k", };
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 0/4] clk: imx8m: Fix incorrect parents
From: Leonard Crestez @ 2019-08-13 17:05 UTC (permalink / raw)
To: Jacky Bai, Abel Vesa, Stephen Boyd, Shawn Guo
Cc: Dong Aisheng, Anson Huang, Michael Turquette, linux-imx, kernel,
Fabio Estevam, linux-clk, linux-arm-kernel
No checks are made to ensure the parents in the _sels arrays actually
exist and it turns out that several are incorrect.
I found the errors using a hack to clk core, is there a better way?
Link: https://github.com/cdleonard/linux/commit/da32c2e76eb373e8a03aec905af2eef28a7997a7
Also add imx8mn GIC clock while we're at it because otherwise parent
could get disabled and lock the system.
Leonard Crestez (4):
clk: imx8mq: Fix sys3 pll references
clk: imx8mm: Fix incorrect parents
clk: imx8mn: Fix incorrect parents
clk: imx8mn: Add GIC clock
drivers/clk/imx/clk-imx8mm.c | 8 +-
drivers/clk/imx/clk-imx8mn.c | 19 ++--
drivers/clk/imx/clk-imx8mq.c | 112 +++++++++++------------
include/dt-bindings/clock/imx8mn-clock.h | 3 +-
4 files changed, 74 insertions(+), 68 deletions(-)
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 2/4] clk: imx8mm: Fix incorrect parents
From: Leonard Crestez @ 2019-08-13 17:05 UTC (permalink / raw)
To: Jacky Bai, Abel Vesa, Stephen Boyd, Shawn Guo
Cc: Dong Aisheng, Anson Huang, Michael Turquette, linux-imx, kernel,
Fabio Estevam, linux-clk, linux-arm-kernel
In-Reply-To: <cover.1565715590.git.leonard.crestez@nxp.com>
* There is no video_pll2 on imx8mm, replace with dummy
* Replace reference to sys_pll3_clk with sys_pll3_out
* qspi parent[2] is sys_pll2_333m not sys_pll1_800m
Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/clk/imx/clk-imx8mm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 69ec274d4974..2758e3f0d15d 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -173,14 +173,14 @@ static const char *imx8mm_vpu_g1_sels[] = {"osc_24m", "vpu_pll_out", "sys_pll1_8
"sys_pll1_100m", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", };
static const char *imx8mm_vpu_g2_sels[] = {"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
"sys_pll1_100m", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", };
-static const char *imx8mm_disp_dtrc_sels[] = {"osc_24m", "video_pll2_out", "sys_pll1_800m", "sys_pll2_1000m",
+static const char *imx8mm_disp_dtrc_sels[] = {"osc_24m", "dummy", "sys_pll1_800m", "sys_pll2_1000m",
"sys_pll1_160m", "video_pll1_out", "sys_pll3_out", "audio_pll2_out", };
-static const char *imx8mm_disp_dc8000_sels[] = {"osc_24m", "video_pll2_out", "sys_pll1_800m", "sys_pll2_1000m",
+static const char *imx8mm_disp_dc8000_sels[] = {"osc_24m", "dummy", "sys_pll1_800m", "sys_pll2_1000m",
"sys_pll1_160m", "video_pll1_out", "sys_pll3_out", "audio_pll2_out", };
static const char *imx8mm_pcie1_ctrl_sels[] = {"osc_24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m",
"sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", };
@@ -230,11 +230,11 @@ static const char *imx8mm_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll
"sys_pll2_500m", "video_pll1_out", "audio_pll2_out", };
static const char *imx8mm_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out", "sys_pll1_400m",
"audio_pll2_out", "sys_pll3_out", "sys_pll2_250m", "video_pll1_out", };
-static const char *imx8mm_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
+static const char *imx8mm_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
"audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
static const char *imx8mm_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
"sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", };
@@ -345,11 +345,11 @@ static const char *imx8mm_ecspi3_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1
static const char *imx8mm_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_out", "sys_pll1_800m",
"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out", };
static const char *imx8mm_vpu_h1_sels[] = {"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
- "audio_pll2_out", "sys_pll2_125m", "sys_pll3_clk", "audio_pll1_out", };
+ "audio_pll2_out", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", };
static const char *imx8mm_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_out",
"vpu_pll", "sys_pll1_80m", };
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 8/8] arm64: memory: Cosmetic cleanups
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
Cleanup memory.h so that the indentation is consistent, remove pointless
line-wrapping and use consistent parameter names for different versions
of the same macro.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 23 +++++++++++------------
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index d31e4b6e349f..69f4cecb7241 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -12,10 +12,10 @@
#include <linux/compiler.h>
#include <linux/const.h>
+#include <linux/sizes.h>
#include <linux/types.h>
#include <asm/bug.h>
#include <asm/page-def.h>
-#include <linux/sizes.h>
/*
* Size of the PCI I/O space. This must remain a power of two so that
@@ -66,8 +66,8 @@
#define _VA_START(va) (-(UL(1) << ((va) - 1)))
-#define KERNEL_START _text
-#define KERNEL_END _end
+#define KERNEL_START _text
+#define KERNEL_END _end
#ifdef CONFIG_ARM64_VA_BITS_52
#define MAX_USER_VA_BITS 52
@@ -132,14 +132,14 @@
* 16 KB granule: 128 level 3 entries, with contiguous bit
* 64 KB granule: 32 level 3 entries, with contiguous bit
*/
-#define SEGMENT_ALIGN SZ_2M
+#define SEGMENT_ALIGN SZ_2M
#else
/*
* 4 KB granule: 16 level 3 entries, with contiguous bit
* 16 KB granule: 4 level 3 entries, without contiguous bit
* 64 KB granule: 1 level 3 entry
*/
-#define SEGMENT_ALIGN SZ_64K
+#define SEGMENT_ALIGN SZ_64K
#endif
/*
@@ -253,8 +253,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)
#define __virt_to_phys_nodebug(x) ({ \
phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
- __is_lm_address(__x) ? __lm_to_phys(__x) : \
- __kimg_to_phys(__x); \
+ __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
})
#define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
@@ -301,17 +300,17 @@ static inline void *phys_to_virt(phys_addr_t x)
#define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
-#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
-#define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
+#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
+#define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
/*
- * virt_to_page(k) convert a _valid_ virtual address to struct page *
- * virt_addr_valid(k) indicates whether a virtual address is valid
+ * virt_to_page(x) convert a _valid_ virtual address to struct page *
+ * virt_addr_valid(x) indicates whether a virtual address is valid
*/
#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
#if !defined(CONFIG_SPARSEMEM_VMEMMAP) || defined(CONFIG_DEBUG_VIRTUAL)
-#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))
+#define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
#else
#define page_to_virt(x) ({ \
__typeof__(x) __page = x; \
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 7/8] arm64: memory: Add comments to end of non-trivial #ifdef blocks
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
Commenting the #endif of a multi-statement #ifdef block with the
condition which guards it is useful and can save having to scroll back
through the file to figure out which set of Kconfig options apply to
a particular piece of code.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index e902132b808c..d31e4b6e349f 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -57,11 +57,13 @@
#define PCI_IO_END (VMEMMAP_START - SZ_2M)
#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
#define FIXADDR_TOP (PCI_IO_START - SZ_2M)
+
#if VA_BITS > 48
#define VA_BITS_MIN (48)
#else
#define VA_BITS_MIN (VA_BITS)
#endif
+
#define _VA_START(va) (-(UL(1) << ((va) - 1)))
#define KERNEL_START _text
@@ -86,7 +88,7 @@
#else
#define KASAN_THREAD_SHIFT 0
#define KASAN_SHADOW_END (_VA_START(VA_BITS_MIN))
-#endif
+#endif /* CONFIG_KASAN */
#define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
@@ -224,7 +226,7 @@ static inline unsigned long kaslr_offset(void)
#define __tag_shifted(tag) 0UL
#define __tag_reset(addr) (addr)
#define __tag_get(addr) 0
-#endif
+#endif /* CONFIG_KASAN_SW_TAGS */
static inline const void *__tag_set(const void *addr, u8 tag)
{
@@ -263,7 +265,7 @@ extern phys_addr_t __phys_addr_symbol(unsigned long x);
#else
#define __virt_to_phys(x) __virt_to_phys_nodebug(x)
#define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
-#endif
+#endif /* CONFIG_DEBUG_VIRTUAL */
#define __phys_to_virt(x) ((unsigned long)((x) - physvirt_offset))
#define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
@@ -323,14 +325,14 @@ static inline void *phys_to_virt(phys_addr_t x)
u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
(struct page *)__addr; \
})
-#endif
+#endif /* !CONFIG_SPARSEMEM_VMEMMAP || CONFIG_DEBUG_VIRTUAL */
#define virt_addr_valid(addr) ({ \
__typeof__(addr) __addr = addr; \
__is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \
})
-#endif
+#endif /* !ASSEMBLY */
/*
* Given that the GIC architecture permits ITS implementations that can only be
@@ -345,4 +347,4 @@ static inline void *phys_to_virt(phys_addr_t x)
#include <asm-generic/memory_model.h>
-#endif
+#endif /* __ASM_MEMORY_H */
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 6/8] arm64: memory: Implement __tag_set() as common function
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
There's no need for __tag_set() to be a complicated macro when
CONFIG_KASAN_SW_TAGS=y and a simple static inline otherwise. Rewrite
the thing as a common static inline function.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 5552c8cba1e2..e902132b808c 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -218,20 +218,20 @@ static inline unsigned long kaslr_offset(void)
#ifdef CONFIG_KASAN_SW_TAGS
#define __tag_shifted(tag) ((u64)(tag) << 56)
-#define __tag_set(addr, tag) (__typeof__(addr))( \
- ((u64)(addr) & ~__tag_shifted(0xff)) | __tag_shifted(tag))
#define __tag_reset(addr) untagged_addr(addr)
#define __tag_get(addr) (__u8)((u64)(addr) >> 56)
#else
-static inline const void *__tag_set(const void *addr, u8 tag)
-{
- return addr;
-}
-
+#define __tag_shifted(tag) 0UL
#define __tag_reset(addr) (addr)
#define __tag_get(addr) 0
#endif
+static inline const void *__tag_set(const void *addr, u8 tag)
+{
+ u64 __addr = (u64)addr & ~__tag_shifted(0xff);
+ return (const void *)(__addr | __tag_shifted(tag));
+}
+
/*
* Physical vs virtual RAM address space conversion. These are
* private definitions which should NOT be used outside memory.h
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 5/8] arm64: memory: Simplify _VA_START and _PAGE_OFFSET definitions
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
Rather than subtracting from -1 and then adding 1, we can simply
subtract from 0.
Cc: Steve Capper <steve.capper@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 56be462c69ce..5552c8cba1e2 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -44,8 +44,7 @@
* VA_START - the first kernel virtual address.
*/
#define VA_BITS (CONFIG_ARM64_VA_BITS)
-#define _PAGE_OFFSET(va) (UL(0xffffffffffffffff) - \
- (UL(1) << (va)) + 1)
+#define _PAGE_OFFSET(va) (-(UL(1) << (va)))
#define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS))
#define KIMAGE_VADDR (MODULES_END)
#define BPF_JIT_REGION_START (KASAN_SHADOW_END)
@@ -63,8 +62,7 @@
#else
#define VA_BITS_MIN (VA_BITS)
#endif
-#define _VA_START(va) (UL(0xffffffffffffffff) - \
- (UL(1) << ((va) - 1)) + 1)
+#define _VA_START(va) (-(UL(1) << ((va) - 1)))
#define KERNEL_START _text
#define KERNEL_END _end
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 3/8] arm64: memory: Rewrite default page_to_virt()/virt_to_page()
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
The default implementations of page_to_virt() and virt_to_page() are
fairly confusing to read and the former evaluates its 'page' parameter
twice in the macro
Rewrite them so that the computation is expressed as 'base + index' in
both cases and the parameter is always evaluated exactly once.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 47b4dc73b8bf..77074b3a1025 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -313,19 +313,18 @@ static inline void *phys_to_virt(phys_addr_t x)
#if !defined(CONFIG_SPARSEMEM_VMEMMAP) || defined(CONFIG_DEBUG_VIRTUAL)
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#else
-#define __virt_to_pgoff(kaddr) (((u64)(kaddr) - PAGE_OFFSET) / PAGE_SIZE * sizeof(struct page))
-#define __page_to_voff(kaddr) (((u64)(kaddr) - VMEMMAP_START) * PAGE_SIZE / sizeof(struct page))
-
-#define page_to_virt(page) ({ \
- unsigned long __addr = \
- ((__page_to_voff(page)) + PAGE_OFFSET); \
- const void *__addr_tag = \
- __tag_set((void *)__addr, page_kasan_tag(page)); \
- ((void *)__addr_tag); \
+#define page_to_virt(x) ({ \
+ __typeof__(x) __page = x; \
+ u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
+ u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \
+ (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
})
-#define virt_to_page(vaddr) \
- ((struct page *)((__virt_to_pgoff(__tag_reset(vaddr))) + VMEMMAP_START))
+#define virt_to_page(x) ({ \
+ u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \
+ u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
+ (struct page *)__addr; \
+})
#endif
#define virt_addr_valid(addr) ({ \
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 4/8] arm64: memory: Simplify virt_to_page() implementation
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
Build virt_to_page() on top of virt_to_pfn() so we can avoid the need
for explicit shifting.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 77074b3a1025..56be462c69ce 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -311,7 +311,7 @@ static inline void *phys_to_virt(phys_addr_t x)
#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
#if !defined(CONFIG_SPARSEMEM_VMEMMAP) || defined(CONFIG_DEBUG_VIRTUAL)
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr))
#else
#define page_to_virt(x) ({ \
__typeof__(x) __page = x; \
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 2/8] arm64: memory: Ensure address tag is masked in conversion macros
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
When converting a linear virtual address to a physical address, pfn or
struct page *, we must make sure that the tag bits are masked before the
calculation otherwise we end up with corrupt pointers when running with
CONFIG_KASAN_SW_TAGS=y:
| Unable to handle kernel paging request at virtual address 0037fe0007580d08
| [0037fe0007580d08] address between user and kernel address ranges
Mask out the tag in __virt_to_phys_nodebug() and virt_to_page().
Reported-by: Qian Cai <cai@lca.pw>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Fixes: 9cb1c5ddd2c4 ("arm64: mm: Remove bit-masking optimisations for PAGE_OFFSET and VMEMMAP_START")
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 442ab861cab8..47b4dc73b8bf 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -252,7 +252,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)
#define __kimg_to_phys(addr) ((addr) - kimage_voffset)
#define __virt_to_phys_nodebug(x) ({ \
- phys_addr_t __x = (phys_addr_t)(x); \
+ phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
__is_lm_address(__x) ? __lm_to_phys(__x) : \
__kimg_to_phys(__x); \
})
@@ -324,7 +324,8 @@ static inline void *phys_to_virt(phys_addr_t x)
((void *)__addr_tag); \
})
-#define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) + VMEMMAP_START))
+#define virt_to_page(vaddr) \
+ ((struct page *)((__virt_to_pgoff(__tag_reset(vaddr))) + VMEMMAP_START))
#endif
#define virt_addr_valid(addr) ({ \
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 1/8] arm64: memory: Fix virt_addr_valid() using __is_lm_address()
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
In-Reply-To: <20190813170149.26037-1-will@kernel.org>
virt_addr_valid() is intended to test whether or not the passed address
is a valid linear map address. Unfortunately, it relies on
_virt_addr_is_linear() which is broken because it assumes the linear
map is at the top of the address space, which it no longer is.
Reimplement virt_addr_valid() using __is_lm_address() and remove
_virt_addr_is_linear() entirely. At the same time, ensure we evaluate
the macro parameter only once and move it within the __ASSEMBLY__ block.
Reported-by: Qian Cai <cai@lca.pw>
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Fixes: 14c127c957c1 ("arm64: mm: Flip kernel VA space")
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/memory.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index afaf512c0e1b..442ab861cab8 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -244,9 +244,9 @@ static inline const void *__tag_set(const void *addr, u8 tag)
/*
* The linear kernel range starts in the middle of the virtual adddress
* space. Testing the top bit for the start of the region is a
- * sufficient check.
+ * sufficient check and avoids having to worry about the tag.
*/
-#define __is_lm_address(addr) (!((addr) & BIT(vabits_actual - 1)))
+#define __is_lm_address(addr) (!(((u64)addr) & BIT(vabits_actual - 1)))
#define __lm_to_phys(addr) (((addr) + physvirt_offset))
#define __kimg_to_phys(addr) ((addr) - kimage_voffset)
@@ -326,13 +326,13 @@ static inline void *phys_to_virt(phys_addr_t x)
#define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) + VMEMMAP_START))
#endif
-#endif
-#define _virt_addr_is_linear(kaddr) \
- (__tag_reset((u64)(kaddr)) >= PAGE_OFFSET)
+#define virt_addr_valid(addr) ({ \
+ __typeof__(addr) __addr = addr; \
+ __is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \
+})
-#define virt_addr_valid(kaddr) \
- (_virt_addr_is_linear(kaddr) && pfn_valid(virt_to_pfn(kaddr)))
+#endif
/*
* Given that the GIC architecture permits ITS implementations that can only be
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 0/8] Fix issues with 52-bit kernel virtual addressing
From: Will Deacon @ 2019-08-13 17:01 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Mark Rutland, Steve Capper, Catalin Marinas, Qian Cai,
Andrey Konovalov, Geert Uytterhoeven, Will Deacon
Hi all,
This patch series addresses some issues with 52-bit kernel VAs reported
by Qian Cai and Geert. It's all confined to asm/memory.h and I got a bit
carried away cleaning that thing up so the patches get more worthless
as you go through the series. Still, I'd like to queue this on top of
the 52-bit VA stuff currently sitting in -next.
Although Geert and Steve tested my initial hacks, I dropped the tags
because I've split things up and could've easily broken things again.
Cheers,
Will
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Steve Capper <steve.capper@arm.com>
Cc: Qian Cai <cai@lca.pw>
Cc: Andrey Konovalov <andreyknvl@google.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
--->8
Will Deacon (8):
arm64: memory: Fix virt_addr_valid() using __is_lm_address()
arm64: memory: Ensure address tag is masked in conversion macros
arm64: memory: Rewrite default page_to_virt()/virt_to_page()
arm64: memory: Simplify virt_to_page() implementation
arm64: memory: Simplify _VA_START and _PAGE_OFFSET definitions
arm64: memory: Implement __tag_set() as common function
arm64: memory: Add comments to end of non-trivial #ifdef blocks
arm64: memory: Cosmetic cleanups
arch/arm64/include/asm/memory.h | 89 ++++++++++++++++++++---------------------
1 file changed, 44 insertions(+), 45 deletions(-)
--
2.11.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 4/4] perf: Use CAP_SYS_ADMIN instead of euid==0 with ftrace
From: Mathieu Poirier @ 2019-08-13 16:35 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo
Cc: Suzuki K Poulose, Peter Zijlstra, Alexey Budankov, Igor Lubashev,
Linux Kernel Mailing List, James Morris, Alexander Shishkin,
Ingo Molnar, Namhyung Kim, Jiri Olsa, linux-arm-kernel
In-Reply-To: <20190813132349.GB12299@kernel.org>
Hi Arnaldo,
On Tue, 13 Aug 2019 at 07:23, Arnaldo Carvalho de Melo
<arnaldo.melo@gmail.com> wrote:
>
> Em Mon, Aug 12, 2019 at 03:42:17PM -0600, Mathieu Poirier escreveu:
> > On Mon, 12 Aug 2019 at 14:29, Arnaldo Carvalho de Melo
> > <arnaldo.melo@gmail.com> wrote:
> > >
> > > Em Mon, Aug 12, 2019 at 05:27:06PM -0300, Arnaldo Carvalho de Melo escreveu:
> > > > Em Mon, Aug 12, 2019 at 05:22:51PM -0300, Arnaldo Carvalho de Melo escreveu:
> > > > > Em Wed, Aug 07, 2019 at 10:44:17AM -0400, Igor Lubashev escreveu:
> > > > > > @@ -281,7 +283,7 @@ static int __cmd_ftrace(struct perf_ftrace *ftrace, int argc, const char **argv)
> > > > > > .events = POLLIN,
> > > > > > };
> > > > > >
> > > > > > - if (geteuid() != 0) {
> > > > > > + if (!perf_cap__capable(CAP_SYS_ADMIN)) {
> > > > > > pr_err("ftrace only works for root!\n");
> > > > >
> > > > > I guess we should update the error message too?
> > > > >
> > > >
> > > > I.e. I applied this as a follow up patch:
> > > >
> > > > diff --git a/tools/perf/builtin-ftrace.c b/tools/perf/builtin-ftrace.c
> > > > index 01a5bb58eb04..ba8b65c2f9dc 100644
> > > > --- a/tools/perf/builtin-ftrace.c
> > > > +++ b/tools/perf/builtin-ftrace.c
> > > > @@ -284,7 +284,12 @@ static int __cmd_ftrace(struct perf_ftrace *ftrace, int argc, const char **argv)
> > > > };
> > > >
> > > > if (!perf_cap__capable(CAP_SYS_ADMIN)) {
> > > > - pr_err("ftrace only works for root!\n");
> > > > + pr_err("ftrace only works for %s!\n",
> > > > +#ifdef HAVE_LIBCAP_SUPPORT
> > > > + "users with the SYS_ADMIN capability"
> > > > +#else
> > > > + "root"
> > > > +#endif
> > >
> > > );
> > >
> > > :-)
> > >
> > > > return -1;
> > > > }
> > > >
> > >
> > > I've pushed the whole set to my tmp.perf/cap branch, please chec
> >
> > Please hold on before moving further - I'm getting a segmentation
> > fault on ARM64 that I'm still trying to figure out.
>
> This is just sitting in my tmp branch, and in my local perf/core branch,
> so that I can test it with the containers, etc.
>
> Is this related to the following fix?
That is the first thing I thought about but no, it has nothing to do
with it. Patch 3/4 is where the problem shows up. The code in the
patch is fine, it is the repercussion it has on other part that needs
to be investigated.
Right now I see that kmap->ref_reloc_sym is NULL here [1] when tracing
with anything else than the 'u' option. I am currently investigating
the problem.
Igor, please see if you can reproduce on QEMU or an ARM64 based platform.
[1] https://elixir.bootlin.com/linux/v5.3-rc4/source/tools/perf/util/event.c#L945
>
> commit 3e70008a6021fffd2cd1614734603ea970773060
> Author: Leo Yan <leo.yan@linaro.org>
> Date: Fri Aug 9 18:47:52 2019 +0800
>
> perf trace: Fix segmentation fault when access syscall info on arm64
>
> 'perf trace' reports the segmentation fault as below on Arm64:
>
> # perf trace -e string -e augmented_raw_syscalls.c
> LLVM: dumping tools/perf/examples/bpf/augmented_raw_syscalls.o
> perf: Segmentation fault
> Obtained 12 stack frames.
> perf(sighandler_dump_stack+0x47) [0xaaaaac96ac87]
> linux-vdso.so.1(+0x5b7) [0xffffadbeb5b7]
> /lib/aarch64-linux-gnu/libc.so.6(strlen+0x10) [0xfffface7d5d0]
> /lib/aarch64-linux-gnu/libc.so.6(_IO_vfprintf+0x1ac7) [0xfffface49f97]
> /lib/aarch64-linux-gnu/libc.so.6(__vsnprintf_chk+0xc7) [0xffffacedfbe7]
> perf(scnprintf+0x97) [0xaaaaac9ca3ff]
> perf(+0x997bb) [0xaaaaac8e37bb]
> perf(cmd_trace+0x28e7) [0xaaaaac8ec09f]
> perf(+0xd4a13) [0xaaaaac91ea13]
> perf(main+0x62f) [0xaaaaac8a147f]
> /lib/aarch64-linux-gnu/libc.so.6(__libc_start_main+0xe3) [0xfffface22d23]
> perf(+0x57723) [0xaaaaac8a1723]
> Segmentation fault
>
> This issue is introduced by commit 30a910d7d3e0 ("perf trace:
> Preallocate the syscall table"), it allocates trace->syscalls.table[]
> array and the element count is 'trace->sctbl->syscalls.nr_entries'; but
> on Arm64, the system call number is not continuously used; e.g. the
> syscall maximum id is 436 but the real entries is only 281.
>
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH V16 00/13] PCI: tegra: Add Tegra194 PCIe support
From: Lorenzo Pieralisi @ 2019-08-13 16:33 UTC (permalink / raw)
To: Vidya Sagar
Cc: mark.rutland, devicetree, mperttunen, mmaddireddy, linux-pci,
catalin.marinas, will.deacon, linux-kernel, kthota, kishon,
linux-tegra, robh+dt, thierry.reding, gustavo.pimentel,
jingoohan1, bhelgaas, digetx, jonathanh, linux-arm-kernel,
sagar.tv
In-Reply-To: <20190813113627.27251-1-vidyas@nvidia.com>
On Tue, Aug 13, 2019 at 05:06:14PM +0530, Vidya Sagar wrote:
> Tegra194 has six PCIe controllers based on Synopsys DesignWare core.
> There are two Universal PHY (UPHY) blocks with each supporting 12(HSIO:
> Hisg Speed IO) and 8(NVHS: NVIDIA High Speed) lanes respectively.
> Controllers:0~4 use UPHY lanes from HSIO brick whereas Controller:5 uses
> UPHY lanes from NVHS brick. Lane mapping in HSIO UPHY brick to each PCIe
> controller (0~4) is controlled in XBAR module by BPMP-FW. Since PCIe
> core has PIPE interface, a glue module called PIPE-to-UPHY (P2U) is used
> to connect each UPHY lane (applicable to both HSIO and NVHS UPHY bricks)
> to PCIe controller
> This patch series
> - Adds support for P2U PHY driver
> - Adds support for PCIe host controller
> - Adds device tree nodes each PCIe controllers
> - Enables nodes applicable to p2972-0000 platform
> - Adds helper APIs in Designware core driver to get capability regs offset
> - Adds defines for new feature registers of PCIe spec revision 4
> - Makes changes in DesignWare core driver to get Tegra194 PCIe working
>
> Testing done on P2972-0000 platform
> - Able to get PCIe link up with on-board Marvel eSATA controller
> - Able to get PCIe link up with NVMe cards connected to M.2 Key-M slot
> - Able to do data transfers with both SATA drives and NVMe cards
> - Able to perform suspend-resume sequence
>
> Note
> - Enabling x8 slot on P2972-0000 platform requires pinmux driver for Tegra194.
> It is being worked on currently and hence Controller:5 (i.e. x8 slot) is
> disabled in this patch series. A future patch series would enable this.
> - This series is based on top of the following series
> Jisheng's patches to add support to .remove() in Designware sub-system
> https://patchwork.kernel.org/project/linux-pci/list/?series=98559
> (Update: Jisheng's patches are now accepted and applied for v5.2)
> My patches made on top of Jisheng's patches to export various symbols
> http://patchwork.ozlabs.org/project/linux-pci/list/?series=115671
> (Update: My above patch series is accepted and applied for v5.3)
> Another patch of mine to enable BPMP-FW resume in noirq phase
> http://patchwork.ozlabs.org/patch/1140973/
> (This is already accepted)
>
> V16:
> * Added empty lines (cosmetic changes) where required in pcie-tegra194.c file
> to address Lorenzo's review comments.
>
> V15:
> * Refactored pcie-tegra194.c code to call only tegra_bpmp_transfer() API
> in both .probe() path and .resume_noirq() path.
>
> V14:
> * Addressed Lorenzo's review comments in pcie-tegra194.c file (Patch 13/13)
> * Added a new patch to export dw_pcie_wait_for_link() API
>
> V13:
> * Addressed Bjorn's review comments for adding Gen-4 specific defines to pci_regs.h header file
>
> V12:
> * Modified the commit message of patch-3 in this series to address review
> comments from Lorenzo
>
> V11:
> * Removed device-tree patches from the series as they are applied to relevant
> Tegra specific trees by Thierry Reding.
> * Included older Tegra chips to extend quirk that disables MSI interrupt being
> used for Tegra PCIe root ports.
> * Addressed review comments in P2U driver file.
>
> V10:
> * Used _relaxed() versions of readl() & writel()
>
> V9:
> * Made the drivers dependent on ARCH_TEGRA_194_SOC directly
> * Addressed review comments from Dmitry
>
> V8:
> * Changed P2U driver file name from pcie-p2u-tegra194.c to phy-tegra194-p2u.c
> * Addressed review comments from Thierry and Rob
>
> V7:
> * Took care of review comments from Rob
> * Added a quirk to disable MSI for root ports
> * Removed using pcie_pme_disable_msi() API in host controller driver
>
> V6:
> * Removed patch that exports pcie_bus_config symbol
> * Took care of review comments from Thierry and Rob
>
> V5:
> * Removed redundant APIs in pcie-designware-ep.c file after moving them
> to pcie-designware.c file based on Bjorn's review comments
>
> V4:
> * Rebased on top of linux-next top of the tree
> * Addressed Gustavo's comments and added his Ack for some of the changes.
>
> V3:
> * Addressed review comments from Thierry
>
> V2:
> * Addressed review comments from Bjorn, Thierry, Jonathan, Rob & Kishon
> * Added more patches in v2 series
>
> Vidya Sagar (13):
> PCI: Add #defines for some of PCIe spec r4.0 features
> PCI: Disable MSI for Tegra root ports
> PCI: dwc: Perform dbi regs write lock towards the end
> PCI: dwc: Move config space capability search API
> PCI: dwc: Add ext config space capability search API
> PCI: dwc: Export dw_pcie_wait_for_link() API
> dt-bindings: PCI: designware: Add binding for CDM register check
> PCI: dwc: Add support to enable CDM register check
> dt-bindings: Add PCIe supports-clkreq property
> dt-bindings: PCI: tegra: Add device tree support for Tegra194
> dt-bindings: PHY: P2U: Add Tegra194 P2U block
> phy: tegra: Add PCIe PIPE2UPHY support
> PCI: tegra: Add Tegra194 PCIe support
>
> .../bindings/pci/designware-pcie.txt | 5 +
> .../bindings/pci/nvidia,tegra194-pcie.txt | 155 ++
> Documentation/devicetree/bindings/pci/pci.txt | 5 +
> .../bindings/phy/phy-tegra194-p2u.txt | 28 +
> drivers/pci/controller/dwc/Kconfig | 10 +
> drivers/pci/controller/dwc/Makefile | 1 +
> .../pci/controller/dwc/pcie-designware-ep.c | 37 +-
> .../pci/controller/dwc/pcie-designware-host.c | 14 +-
> drivers/pci/controller/dwc/pcie-designware.c | 88 +
> drivers/pci/controller/dwc/pcie-designware.h | 12 +
> drivers/pci/controller/dwc/pcie-tegra194.c | 1631 +++++++++++++++++
> drivers/pci/quirks.c | 53 +
> drivers/phy/tegra/Kconfig | 7 +
> drivers/phy/tegra/Makefile | 1 +
> drivers/phy/tegra/phy-tegra194-p2u.c | 120 ++
> include/uapi/linux/pci_regs.h | 14 +-
> 16 files changed, 2139 insertions(+), 42 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
> create mode 100644 Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
> create mode 100644 drivers/pci/controller/dwc/pcie-tegra194.c
> create mode 100644 drivers/phy/tegra/phy-tegra194-p2u.c
>
I have applied it to pci/tegra, subject to kbuild test validation,
for v5.4.
Thanks,
Lorenzo
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 11/11] kselftest: arm64: fake_sigreturn_misaligned_sp
From: Dave Martin @ 2019-08-13 16:28 UTC (permalink / raw)
To: Cristian Marussi; +Cc: linux-arm-kernel, linux-kselftest
In-Reply-To: <8811be0d-efb3-b6da-9f6b-acaeb3edce7d@arm.com>
On Wed, Aug 07, 2019 at 05:04:13PM +0100, Cristian Marussi wrote:
> On 02/08/2019 18:03, Cristian Marussi wrote:
> > Added a simple fake_sigreturn testcase which places a valid
> > sigframe on a non-16 bytes aligned SP.
> > fake_sigretrun() helper function has been patched accordingly
> > to support placing a sigframe on a non-16 bytes aligned address.
> > Expects a SIGSEGV on test PASS.
> >
> > Adds also a test TODO lists holding some further test ideas.
> >
> > Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> > ---
> > Re-added this text after fixing the forced misaglinment procedure in
> > fake_sigreturn() itself: require a ZERO alignment and you'll get
> > your sigframe placed on a misaligned SP (2-bytes off the 16-align)
> > ---
> > .../testing/selftests/arm64/signal/signals.S | 21 +++++++++----
> > .../arm64/signal/testcases/TODO.readme | 8 +++++
> > .../testcases/fake_sigreturn_misaligned_sp.c | 30 +++++++++++++++++++
> > 3 files changed, 53 insertions(+), 6 deletions(-)
> > create mode 100644 tools/testing/selftests/arm64/signal/testcases/TODO.readme
> > create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c
> >
>
> When this test was re-added in V3, the related .gitignore was missed.
> It will go in V4
Ack, or otherwise try switching to using wildcards in .gitignore as
suggested in my reply to patch 4.
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 11/11] kselftest: arm64: fake_sigreturn_misaligned_sp
From: Dave Martin @ 2019-08-13 16:27 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-12-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:03:00PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which places a valid
Add
> sigframe on a non-16 bytes aligned SP.
> fake_sigretrun() helper function has been patched accordingly
> to support placing a sigframe on a non-16 bytes aligned address.
> Expects a SIGSEGV on test PASS.
>
> Adds also a test TODO lists holding some further test ideas.
Adds -> Also add
lists -> list
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> Re-added this text after fixing the forced misaglinment procedure in
> fake_sigreturn() itself: require a ZERO alignment and you'll get
> your sigframe placed on a misaligned SP (2-bytes off the 16-align)
> ---
> .../testing/selftests/arm64/signal/signals.S | 21 +++++++++----
> .../arm64/signal/testcases/TODO.readme | 8 +++++
> .../testcases/fake_sigreturn_misaligned_sp.c | 30 +++++++++++++++++++
> 3 files changed, 53 insertions(+), 6 deletions(-)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/TODO.readme
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c
>
> diff --git a/tools/testing/selftests/arm64/signal/signals.S b/tools/testing/selftests/arm64/signal/signals.S
> index 6262b877400b..2099871176ed 100644
> --- a/tools/testing/selftests/arm64/signal/signals.S
> +++ b/tools/testing/selftests/arm64/signal/signals.S
> @@ -13,19 +13,28 @@ call_fmt:
>
> .globl fake_sigreturn
>
> -/* fake_sigreturn x0:&sigframe, x1:sigframe_size, x2:alignment_SP */
> +/* fake_sigreturn x0:&sigframe, x1:sigframe_sz, x2:align */
> fake_sigreturn:
> - mov x20, x0
> - mov x21, x1
> - mov x22, x2
> - mov x23, sp
>
> - /* create space on the stack for fake sigframe..."x22"-aligned */
> + /* Save args and decide which aligment to enforce */
> + mov x23, sp
> + mov x20, x0
> + mov x21, x1
> + /* x22 and x24 used for forcing alignment or misalignment */
> + mov x22, x2
> + mov x24, #0
> + cbnz x22, 1f
> + mov x22, #16
> + mov x24, #2
> +
> +1: /* create space on the stack for fake sigframe..."x22"-aligned */
> mov x0, #0
> add x0, x21, x22
> sub x22, x22, #1
> bic x0, x0, x22
> sub x23, x23, x0
> + /* force misaligned by x24 bytes if required alignment was zero */
> + add x23, x23, x24
>
> ldr x0, =call_fmt
> mov x1, x21
Would it be simpler for the third argument to specify a number of bytes
to subtract from SP after allocating 16-byte aligned storage to
accommodate sigframe_sz?
Then 0 gives an aligned frame, 1 gives a frame misaligned by 1 byte,
etc.
Also if all this is a fix to the original fake_sigreturn, can we merge
it into the original patch instead?
> diff --git a/tools/testing/selftests/arm64/signal/testcases/TODO.readme b/tools/testing/selftests/arm64/signal/testcases/TODO.readme
> new file mode 100644
> index 000000000000..5c949492e7ab
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/TODO.readme
> @@ -0,0 +1,8 @@
> +Some more possible ideas for signals tests:
> +
> +- fake_sigreturn_unmapped_sp
> +- fake_sigreturn_kernelspace_sp
> +- fake_sigreturn_sve_bad_extra_context
> +- mangle_sve_invalid_extra_context
> +- mangle_pstate_invalid_el for H modes (+ macroization ?)
> +- fake_sigreturn_overflow_reserved
This seems a reasonable list, but it occurs to me that it will tend to
go out of sync as tests get added. So maybe just put this list in the
cover letter instead of including it in the patch.
We should probably have a one-line description of each proposed test,
since the names are a bit cryptic.
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c
> new file mode 100644
> index 000000000000..3ee8c500c7d1
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c
> @@ -0,0 +1,30 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
signal.h?
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +static int fake_sigreturn_misaligned_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + /* Forcing sigframe on misaligned (=!16) SP */
> + fake_sigreturn(&sf, sizeof(sf), 0);
> +
> + return 1;
> +}
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 10/11] kselftest: arm64: fake_sigreturn_bad_size
From: Dave Martin @ 2019-08-13 16:26 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-11-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:59PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which builds a ucontext_t
Add
> with a badly sized header that causes a overrun in the __reserved
> area and place it onto the stack. Expects a SIGSEGV on test PASS.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../arm64/signal/testcases/.gitignore | 1 +
> .../testcases/fake_sigreturn_bad_size.c | 85 +++++++++++++++++++
> 2 files changed, 86 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
>
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index 94f9baaf638c..3408e0f5ba98 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -8,3 +8,4 @@ fake_sigreturn_bad_magic
> fake_sigreturn_bad_size_for_magic0
> fake_sigreturn_missing_fpsimd
> fake_sigreturn_duplicated_fpsimd
> +fake_sigreturn_bad_size
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
> new file mode 100644
> index 000000000000..1467fb534d8b
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
signal.h?
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +#define MIN_SZ_ALIGN 16
> +
> +static int fake_sigreturn_bad_size_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + size_t resv_sz, need_sz, offset;
> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
> +
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + resv_sz = GET_SF_RESV_SIZE(sf);
> + /*
> + * find the terminator, preserving existing headers
> + * and verify amount of spare room in __reserved area.
> + */
> + head = get_terminator(shead, resv_sz, &offset);
> + /*
> + * try stripping extra_context header when low on space:
> + * we need at least for the bad sized esr_context.
double space
> + */
> + need_sz = HDR_SZ + sizeof(struct esr_context);
> + if (head && resv_sz - offset < need_sz) {
> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
> + resv_sz - offset);
> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
> + }
> + /* just give up and timeout if still not enough space */
> + if (head && resv_sz - offset >= need_sz) {
> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
> + resv_sz - offset);
> + /*
> + * Use an esr_context to build a fake header with a
> + * size greater then the free __reserved area minus HDR_SZ;
> + * using ESR_MAGIC here since it is not checked for size nor
> + * is limited to one instance.
> + *
> + * At first inject an additional normal esr_context
> + */
> + head->magic = ESR_MAGIC;
> + head->size = sizeof(struct esr_context);
> + /* and terminate properly */
> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
> + ASSERT_GOOD_CONTEXT(&sf.uc);
> +
> + /*
> + * now mess with fake esr_context size: leaving less space than
> + * neededwhile keeping size value 16-aligned
> + *
> + * It must trigger a SEGV from Kernel on:
> + *
> + * resv_sz - offset < sizeof(*head)
> + */
> + /* at first set the maximum good 16-aligned size */
> + head->size = (resv_sz - offset - need_sz + MIN_SZ_ALIGN) & ~0xfUL;
> + /* plus a bit more of 16-aligned sized stuff */
> + head->size += MIN_SZ_ALIGN;
> + /* and terminate properly */
> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
> + ASSERT_BAD_CONTEXT(&sf.uc);
> + fake_sigreturn(&sf, sizeof(sf), 16);
> + }
> +
> + return 1;
> +}
[...]
Otherwise looks reasonable.
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 09/11] kselftest: arm64: fake_sigreturn_duplicated_fpsimd
From: Dave Martin @ 2019-08-13 16:26 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-10-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:58PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which builds a ucontext_t
Add
> with an anomalous additional fpsimd_context and place it onto the stack.
> Expects a SIGSEGV on test PASS.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../arm64/signal/testcases/.gitignore | 1 +
> .../fake_sigreturn_duplicated_fpsimd.c | 62 +++++++++++++++++++
> 2 files changed, 63 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
>
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index 17d1c5e73319..94f9baaf638c 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -7,3 +7,4 @@ mangle_pstate_ssbs_regs
> fake_sigreturn_bad_magic
> fake_sigreturn_bad_size_for_magic0
> fake_sigreturn_missing_fpsimd
> +fake_sigreturn_duplicated_fpsimd
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
> new file mode 100644
> index 000000000000..09af7a0f8776
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
signal.h?
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +static int fake_sigreturn_duplicated_fpsimd_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + size_t resv_sz, offset;
> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
> +
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + resv_sz = GET_SF_RESV_SIZE(sf);
> + /*
> + * find the terminator, preserving existing headers
> + * and verify amount of spare room in __reserved area.
> + */
> + head = get_terminator(shead, resv_sz, &offset);
> + /*
> + * try stripping extra_context header when low on space:
> + * we need at least space for one additional fpsimd_context
> + */
> + if (head && resv_sz - offset < sizeof(struct fpsimd_context)) {
> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
> + resv_sz - offset);
> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
> + }
> +
> + /* just give up and timeout if still not enough space */
> + if (head &&
> + resv_sz - offset >= sizeof(struct fpsimd_context) + HDR_SZ) {
> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
> + resv_sz - offset);
> + /* Add a spurios fpsimd_context */
> + head->magic = FPSIMD_MAGIC;
> + head->size = sizeof(struct fpsimd_context);
> + /* and terminate */
> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
> +
> + ASSERT_BAD_CONTEXT(&sf.uc);
> + fake_sigreturn(&sf, sizeof(sf), 16);
> + }
> +
> + return 1;
> +}
[...]
Otherwise looks ok.
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 08/11] kselftest: arm64: fake_sigreturn_missing_fpsimd
From: Dave Martin @ 2019-08-13 16:26 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-9-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:57PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which builds a ucontext_t
Add
> without the required fpsimd_context and place it onto the stack.
> Expects a SIGSEGV on test PASS.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../arm64/signal/testcases/.gitignore | 1 +
> .../testcases/fake_sigreturn_missing_fpsimd.c | 44 +++++++++++++++++++
> 2 files changed, 45 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
>
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index cf2a73599818..17d1c5e73319 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -6,3 +6,4 @@ mangle_pstate_invalid_mode_el3
> mangle_pstate_ssbs_regs
> fake_sigreturn_bad_magic
> fake_sigreturn_bad_size_for_magic0
> +fake_sigreturn_missing_fpsimd
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
> new file mode 100644
> index 000000000000..b8dd57ce6844
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
signal.h?
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +static int fake_sigreturn_missing_fpsimd_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + size_t resv_sz, offset;
> + struct _aarch64_ctx *head = GET_SF_RESV_HEAD(sf);
> +
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + resv_sz = GET_SF_RESV_SIZE(sf);
> + head = get_header(head, FPSIMD_MAGIC, resv_sz, &offset);
> + /* just give up and timeout if still not enough space */
> + if (head && resv_sz - offset >= HDR_SZ) {
> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
> + resv_sz - offset);
> + /* Just overwrite fpsmid_context */
> + write_terminator_record(head);
> +
> + ASSERT_BAD_CONTEXT(&sf.uc);
> + fake_sigreturn(&sf, sizeof(sf), 16);
> + }
> +
> + return 1;
> +}
[...]
Seems reasonable otherwise.
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 07/11] kselftest: arm64: fake_sigreturn_bad_size_for_magic0
From: Dave Martin @ 2019-08-13 16:25 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-8-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:56PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which builds a ucontext_t
Add
> with a badly sized magic0 header and place it onto the stack.
I usually call a record with magic number 0 a "terminator record".
> Expects a SIGSEGV on test PASS.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../arm64/signal/testcases/.gitignore | 1 +
> .../fake_sigreturn_bad_size_for_magic0.c | 57 +++++++++++++++++++
> 2 files changed, 58 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
>
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index 0ea6fdc3765c..cf2a73599818 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -5,3 +5,4 @@ mangle_pstate_invalid_mode_el2
> mangle_pstate_invalid_mode_el3
> mangle_pstate_ssbs_regs
> fake_sigreturn_bad_magic
> +fake_sigreturn_bad_size_for_magic0
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
> new file mode 100644
> index 000000000000..2f53c4740c85
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
> @@ -0,0 +1,57 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
#include <signal.h> ?
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +#define MIN_SZ_ALIGN 16
> +
> +static int fake_sigreturn_bad_size_for_magic0_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + size_t resv_sz, offset;
> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
> +
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + resv_sz = GET_SF_RESV_SIZE(sf);
> + /*
> + * find the terminator, preserving existing headers
> + * and verify amount of spare room in __reserved area.
> + */
> + head = get_terminator(shead, resv_sz, &offset);
> + /*
> + * try stripping extra_context header when low on space:
> + * we need at least HDR_SZ + 16 space for the bad sized terminator.
> + */
> + if (head && resv_sz - offset < HDR_SZ + MIN_SZ_ALIGN) {
> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
> + resv_sz - offset);
> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
> + }
> + /* just give up and timeout if still not enough space */
> + if (head && resv_sz - offset >= HDR_SZ + MIN_SZ_ALIGN) {
> + head->magic = 0;
> + head->size = MIN_SZ_ALIGN;
This is different from the amount of space we tested for
(HDR_SZ + MIN_SZ_ALIGN) earlier.
I'm not sure it matters which we use, but we should be consistent.
I suggest sticking with HDR_SZ, unless there's something I've missed.
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 06/11] kselftest: arm64: fake_sigreturn_bad_magic
From: Dave Martin @ 2019-08-13 16:25 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-7-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:55PM +0100, Cristian Marussi wrote:
> Added a simple fake_sigreturn testcase which builds a ucontext_t
Add
> with a bad magic header and place it onto the stack.
> Expects a SIGSEGV on test PASS.
> This commit also introduces a common utility assembly function to
> invoke a sigreturn using a fake provided sigframe.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> tools/testing/selftests/arm64/signal/Makefile | 2 +-
> .../testing/selftests/arm64/signal/signals.S | 64 +++++++++++++++++++
> .../arm64/signal/test_signals_utils.h | 1 +
> .../arm64/signal/testcases/.gitignore | 1 +
> .../testcases/fake_sigreturn_bad_magic.c | 63 ++++++++++++++++++
> 5 files changed, 130 insertions(+), 1 deletion(-)
> create mode 100644 tools/testing/selftests/arm64/signal/signals.S
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_magic.c
>
> diff --git a/tools/testing/selftests/arm64/signal/Makefile b/tools/testing/selftests/arm64/signal/Makefile
> index 8c8d08be4b0d..b3dcf315b5a4 100644
> --- a/tools/testing/selftests/arm64/signal/Makefile
> +++ b/tools/testing/selftests/arm64/signal/Makefile
> @@ -80,7 +80,7 @@ endif
> # Common test-unit targets to build common-layout test-cases executables
> # Needs secondary expansion to properly include the testcase c-file in pre-reqs
> .SECONDEXPANSION:
> -$(PROGS): test_signals.c test_signals_utils.c testcases/testcases.c $$@.c test_signals.h test_signals_utils.h testcases/testcases.h
> +$(PROGS): test_signals.c test_signals_utils.c testcases/testcases.c signals.S $$@.c test_signals.h test_signals_utils.h testcases/testcases.h
> @if [ ! -d $(khdr_dir) ]; then \
> echo -n "\n!!! WARNING: $(khdr_dir) NOT FOUND."; \
> echo "===> Are you sure Kernel Headers have been installed properly ?\n"; \
> diff --git a/tools/testing/selftests/arm64/signal/signals.S b/tools/testing/selftests/arm64/signal/signals.S
> new file mode 100644
> index 000000000000..6262b877400b
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/signals.S
> @@ -0,0 +1,64 @@
> +/*
> + * SPDX-License-Identifier: GPL-2.0
> + * Copyright (C) 2019 ARM Limited
> + */
> +
> +#include <asm/unistd.h>
> +
> +.section ".rodata", "a"
The section name is not usually quoted in .section (though I guess it
works).
> +call_fmt:
> + .asciz "Calling sigreturn with fake sigframe sized:%zd at calculated SP @%08lX\n"
> +
> +.text
> +
> +.globl fake_sigreturn
> +
> +/* fake_sigreturn x0:&sigframe, x1:sigframe_size, x2:alignment_SP */
> +fake_sigreturn:
> + mov x20, x0
> + mov x21, x1
> + mov x22, x2
> + mov x23, sp
> +
> + /* create space on the stack for fake sigframe..."x22"-aligned */
> + mov x0, #0
Why to we move 0 into x0? We clobber x0 again in the next instruction:
> + add x0, x21, x22
> + sub x22, x22, #1
> + bic x0, x0, x22
> + sub x23, x23, x0
Can you explain the logic here? I'm not sure I understand what this is
trying to do exactly.
I notice you further modify this in patch 11 -- see my comments there,
where I also suggest an alternative way of specifying a misaligned frame
that might be simpler.
> +
> + ldr x0, =call_fmt
> + mov x1, x21
> + mov x2, x23
> + bl printf
> +
> + mov sp, x23
> +
> + /* now fill it with the provided content... */
> + mov x0, sp
> + mov x1, x20
> + mov x2, x21
> + bl memcpy
> +
> + /*
> + * Here saving a last minute SP to current->token acts as a marker:
> + * if we got here, we are successfully faking a sigreturn; in other
> + * words we are sure no bad fatal signal has been raised till now
> + * for unrelated reasons, so we should consider the possibl observed
typo: possible (or possibly?)
> + * fatal signal like SEGV coming from Kernel restore_sigframe() and
> + * triggered as expected from our test-case.
> + * For simplicity this assumes that current field 'token' is laid out
> + * as first in struct tdescr
> + */
> + ldr x0, current
> + str x23, [x0]
> + /* SP is already pointing back to the just built fake sigframe here */
> + mov x8, #__NR_rt_sigreturn
> + svc #0
> +
> + /*
> + * Above sigreturn should not return...looping here leads to a timeout
> + * and ensure proper and clean test failure, instead of jumping around
> + * on a potentially corrupted stack.
> + */
> + b .
> diff --git a/tools/testing/selftests/arm64/signal/test_signals_utils.h b/tools/testing/selftests/arm64/signal/test_signals_utils.h
> index ce35be8ebc8e..2a71da7e6695 100644
> --- a/tools/testing/selftests/arm64/signal/test_signals_utils.h
> +++ b/tools/testing/selftests/arm64/signal/test_signals_utils.h
> @@ -12,4 +12,5 @@ int test_run(struct tdescr *td);
> void test_result(struct tdescr *td);
>
> bool get_current_context(struct tdescr *td, ucontext_t *dest_uc);
> +int fake_sigreturn(void *sigframe, size_t sz, int alignment);
> #endif
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index a48a118b1a1a..0ea6fdc3765c 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -4,3 +4,4 @@ mangle_pstate_invalid_mode_el1
> mangle_pstate_invalid_mode_el2
> mangle_pstate_invalid_mode_el3
> mangle_pstate_ssbs_regs
> +fake_sigreturn_bad_magic
> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_magic.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_magic.c
> new file mode 100644
> index 000000000000..b4c063e02a7a
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_magic.c
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
We should probably also include <signal.h> here, since we're using
siginfo_t etc.
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +struct fake_sigframe sf;
> +
> +static int fake_sigreturn_bad_magic_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + size_t resv_sz, offset;
> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
> +
> + /* just to fill the ucontext_t with something real */
> + if (!get_current_context(td, &sf.uc))
> + return 1;
> +
> + resv_sz = GET_SF_RESV_SIZE(sf);
> + /*
> + * find the terminator, preserving existing headers
> + * and verify amount of spare room in __reserved area.
> + */
> + head = get_terminator(shead, resv_sz, &offset);
> + /*
> + * try stripping extra_context header when low on space:
> + * we need at least 2*HDR_SZ space ... one for the KSFT_BAD_MAGIC
> + * and the other for the usual terminator.
> + */
> + if (head && resv_sz - offset < HDR_SZ * 2) {
Can we factor out this logic for finding space in the signal frame?
We do pretty much the same thing in all the fake_sigreturn tests...
> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
> + resv_sz - offset);
> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
> + }
> + /* just give up and timeout if still not enough space */
Do we actually time out? I don't see where we actually wait, so doesn't
test_run() just fail immediately?
The same applies to all the other fake_sigreturn tests too.
> + if (head && resv_sz - offset >= HDR_SZ) {
Should this be HDR_SZ * 2 again? We need space for the face header and
space to write a terminator after it.
> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
> + resv_sz - offset);
> + /*
> + * use a well known NON existent bad magic...something
> + * we should pretty sure won't be ever defined in Kernel
> + */
> + head->magic = KSFT_BAD_MAGIC;
> + head->size = HDR_SZ;
> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
> +
> + ASSERT_BAD_CONTEXT(&sf.uc);
> + fake_sigreturn(&sf, sizeof(sf), 16);
> + }
> +
> + return 1;
> +}
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 05/11] kselftest: arm64: mangle_pstate_ssbs_regs
From: Dave Martin @ 2019-08-13 16:25 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-6-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:54PM +0100, Cristian Marussi wrote:
> Added a simple mangle testcase which messes with the ucontext_t
Add
> from within the sig_handler, trying to toggle PSTATE SSBS bit.
signal handler
> Expect SIGILL if SSBS feature unsupported or that the value set in
> PSTATE.SSBS is preserved on test PASS.
The test doesn't set PSTATE.SSBS directly.
Maybe something like: "Expect SIGILL if the SSBS feature is unsupported.
Otherwise, expect sigreturn to set PSTATE.SSBS from the corresponding
bit in pstate in the signal frame."
> This commit also introduces a new common utility function:
> get_current_context() which can be used to grab a ucontext without
> the help of libc, and detect if such ucontext has been actively used
> to jump back into it.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../selftests/arm64/signal/test_signals.h | 4 +
> .../arm64/signal/test_signals_utils.c | 93 +++++++++++++++++++
> .../arm64/signal/test_signals_utils.h | 2 +
> .../arm64/signal/testcases/.gitignore | 1 +
> .../testcases/mangle_pstate_ssbs_regs.c | 56 +++++++++++
> 5 files changed, 156 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/mangle_pstate_ssbs_regs.c
>
> diff --git a/tools/testing/selftests/arm64/signal/test_signals.h b/tools/testing/selftests/arm64/signal/test_signals.h
> index 85db3ac44b32..37bed0590226 100644
> --- a/tools/testing/selftests/arm64/signal/test_signals.h
> +++ b/tools/testing/selftests/arm64/signal/test_signals.h
> @@ -116,6 +116,10 @@ struct tdescr {
> /* optional sa_flags for the installed handler */
> int sa_flags;
> ucontext_t saved_uc;
> + /* used by get_current_ctx() */
> + size_t live_sz;
> + ucontext_t *live_uc;
> + volatile bool live_uc_valid;
>
> /* a setup function to be called before test starts */
> int (*setup)(struct tdescr *td);
> diff --git a/tools/testing/selftests/arm64/signal/test_signals_utils.c b/tools/testing/selftests/arm64/signal/test_signals_utils.c
> index ac0055f6340b..faf55ba99d58 100644
> --- a/tools/testing/selftests/arm64/signal/test_signals_utils.c
> +++ b/tools/testing/selftests/arm64/signal/test_signals_utils.c
> @@ -11,12 +11,16 @@
> #include <linux/auxvec.h>
> #include <ucontext.h>
>
> +#include <asm/unistd.h>
> +
> #include "test_signals.h"
> #include "test_signals_utils.h"
> #include "testcases/testcases.h"
>
> extern struct tdescr *current;
>
> +static int sig_copyctx = SIGUSR2;
> +
> static char *feats_store[FMAX_END] = {
> "SSBS",
> "PAN",
> @@ -37,6 +41,85 @@ static inline char *feats_to_string(unsigned long feats)
> return feats_string;
> }
>
> +/*
> + * Obtaining a valid and full-blown ucontext_t from userspace is tricky:
> + * libc getcontext does() not save all the regs and messes with some of
> + * them (pstate value in particular is not reliable).
> + * Here we use a service signal to grab the ucontext_t from inside a
> + * dedicated signal handler, since there, it is populated by Kernel
> + * itself in setup_sigframe(). The grabbed context is then stored and
> + * made available in td->live_uc.
> + *
> + * Anyway this function really serves a dual purpose:
> + *
> + * 1. grab a valid sigcontext into td->live_uc for result analysis: in
> + * such case it returns 1.
> + *
> + * 2. detect if somehow a previously grabbed live_uc context has been
> + * used actively with a sigreturn: in such a case the execution would have
> + * magically resumed in the middle of the function itself (seen_already==1):
> + * in such a case return 0, since in fact we have not just simply grabbed
> + * the context.
> + *
> + * This latter case is useful to detect when a fake_sigreturn test-case has
> + * unexpectedly survived without hittig a SEGV.
> + */
> +bool get_current_context(struct tdescr *td, ucontext_t *dest_uc)
> +{
> + static volatile sig_atomic_t seen_already;
> +
> + if (!td || !dest_uc) {
> + fprintf(stdout, "Signal-based Context dumping NOT available\n");
Should this ever happen inless there is a test bug?
Maybe this should just be an assert.
> + return 0;
> + }
> +
> + /* it's a genuine invokation..reinit */
> + seen_already = 0;
> + td->live_uc_valid = 0;
> + td->live_sz = sizeof(*dest_uc);
> + memset(dest_uc, 0x00, td->live_sz);
Eventually we will need to examine the signal frame to determine its
size, but for now this is fine.
It will start to matter for SVE.
> + td->live_uc = dest_uc;
> + /*
> + * Grab ucontext_t triggering a signal...
> + * ASM equivalent of raise(sig_copyctx);
> + *
> + * Note that:
> + * - live_uc_valid is declared volatile in struct tdescr
> + * since it will be changed inside the sig_copyctx handler.
> + * - the kill() syscall invocation returns only after any possible
> + * registered sig_handler for the invoked signal has returned,
sig_handler looks like the name of some function of variable, but I
can't find it. Did I miss something?
> + * so that live_uc_valid flag is surely up to date when this
> + * function return it.
> + * - the additional 'memory' clobber is there to avoid possible
> + * compiler's assumption on the content pointed by dest_uc, which
> + * is changed inside the handler, but not referenced here anyway.
> + */
> + asm volatile ("mov x8, %0\n\t"
> + "svc #0\n\t"
> + "mov x1, %1\n\t"
> + "mov x8, %2\n\t"
> + "svc #0"
> + :
> + : "i" (__NR_getpid),
> + "r" (sig_copyctx),
> + "i" (__NR_kill)
> + : "x1","x8","x0","memory");
> + /*
> + * If we get here with seen_already==1 it implies the td->live_uc
> + * context has been used to get back here....this probably means
> + * a test has failed to cause a SEGV...anyway the live_uc has not
> + * just been acquired...so return 0
> + */
> + if (seen_already) {
> + fprintf(stdout,
> + "Successful sigreturn detected: live_uc is stale !\n");
> + return 0;
> + }
> + seen_already = 1;
> +
> + return td->live_uc_valid;
> +}
> +
> static void unblock_signal(int signum)
> {
> sigset_t sset;
> @@ -112,6 +195,12 @@ static void default_handler(int signum, siginfo_t *si, void *uc)
> * to terminate immediately exiting straight away
> */
> default_result(current, 1);
> + } else if (signum == sig_copyctx && current->live_uc) {
> + memcpy(current->live_uc, uc, current->live_sz);
> + ASSERT_GOOD_CONTEXT(current->live_uc);
> + current->live_uc_valid = 1;
> + fprintf(stderr,
> + "GOOD CONTEXT grabbed from sig_copyctx handler\n");
> } else {
> if (signum == current->sig_unsupp && !are_feats_ok(current)) {
> fprintf(stderr, "-- RX SIG_UNSUPP on unsupported feature...OK\n");
> @@ -214,6 +303,10 @@ static int test_init(struct tdescr *td)
> !feats_ok ? "NOT " : "");
> }
>
> + if (td->sig_trig == sig_copyctx)
> + sig_copyctx = SIGUSR1;
What's this for? What if we have the same signal for sig_trig and
sig_copyctx?
> + unblock_signal(sig_copyctx);
> +
> td->initialized = 1;
> return 1;
> }
> diff --git a/tools/testing/selftests/arm64/signal/test_signals_utils.h b/tools/testing/selftests/arm64/signal/test_signals_utils.h
> index 8658d1a7d4b9..ce35be8ebc8e 100644
> --- a/tools/testing/selftests/arm64/signal/test_signals_utils.h
> +++ b/tools/testing/selftests/arm64/signal/test_signals_utils.h
> @@ -10,4 +10,6 @@ int test_setup(struct tdescr *td);
> void test_cleanup(struct tdescr *td);
> int test_run(struct tdescr *td);
> void test_result(struct tdescr *td);
> +
> +bool get_current_context(struct tdescr *td, ucontext_t *dest_uc);
> #endif
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index 226bb179b673..a48a118b1a1a 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -3,3 +3,4 @@ mangle_pstate_invalid_daif_bits
> mangle_pstate_invalid_mode_el1
> mangle_pstate_invalid_mode_el2
> mangle_pstate_invalid_mode_el3
> +mangle_pstate_ssbs_regs
> diff --git a/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_ssbs_regs.c b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_ssbs_regs.c
> new file mode 100644
> index 000000000000..a399d9aa40d5
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_ssbs_regs.c
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
> +#include <stdio.h>
> +#include <ucontext.h>
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +static int mangle_invalid_pstate_ssbs_run(struct tdescr *td,
> + siginfo_t *si, ucontext_t *uc)
> +{
> + ASSERT_GOOD_CONTEXT(uc);
> +
> + /* set bit value */
Should we clear SSBS in the test setup (using MSR), to make sure that
sigreturn really succeeds in _changing_ the bit to 1?
> + uc->uc_mcontext.pstate |= PSR_SSBS_BIT;
> + fprintf(stderr, "SSBS set to 1 -- PSTATE: 0x%016lX\n",
> + uc->uc_mcontext.pstate);
> + /* Save after mangling...it should be preserved */
> + td->saved_uc = *uc;
> +
> + return 1;
> +}
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 04/11] kselftest: arm64: mangle_pstate_invalid_mode_el
From: Dave Martin @ 2019-08-13 16:24 UTC (permalink / raw)
To: Cristian Marussi; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190802170300.20662-5-cristian.marussi@arm.com>
On Fri, Aug 02, 2019 at 06:02:53PM +0100, Cristian Marussi wrote:
> Added 3 simple mangle testcases that mess with the ucontext_t
Add
> from within the sig_handler, trying to toggle PSTATE mode bits to
signal handler
> trick the system into switching to EL1/EL2/EL3. Expects SIGSEGV
> on test PASS.
>
> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
> ---
> .../arm64/signal/testcases/.gitignore | 3 ++
> .../mangle_pstate_invalid_mode_el1.c | 29 +++++++++++++++++++
> .../mangle_pstate_invalid_mode_el2.c | 29 +++++++++++++++++++
> .../mangle_pstate_invalid_mode_el3.c | 29 +++++++++++++++++++
> 4 files changed, 90 insertions(+)
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el1.c
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el2.c
> create mode 100644 tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el3.c
>
> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> index 8a0a29f0cc2a..226bb179b673 100644
> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
> @@ -1,2 +1,5 @@
> mangle_pstate_invalid_compat_toggle
> mangle_pstate_invalid_daif_bits
> +mangle_pstate_invalid_mode_el1
> +mangle_pstate_invalid_mode_el2
> +mangle_pstate_invalid_mode_el3
What about having
!*.[ch]
mangle_*
rather than having to update .gitignore to list every test executable?
> diff --git a/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el1.c b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el1.c
> new file mode 100644
> index 000000000000..07aed7624383
> --- /dev/null
> +++ b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_mode_el1.c
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2019 ARM Limited */
> +
> +#include "test_signals_utils.h"
> +#include "testcases.h"
> +
> +static int mangle_invalid_pstate_run(struct tdescr *td, siginfo_t *si,
> + ucontext_t *uc)
> +{
> + ASSERT_GOOD_CONTEXT(uc);
> +
> + /*
> + * This config should trigger a SIGSEGV by Kernel
> + * when checking valid_user_regs()
> + */
> + uc->uc_mcontext.pstate &= ~PSR_MODE_MASK;
> + uc->uc_mcontext.pstate |= PSR_MODE_EL1t;
> +
> + return 1;
> +}
> +
> +struct tdescr tde = {
> + .sanity_disabled = true,
> + .name = "MANGLE_PSTATE_INVALID_MODE_EL1t",
> + .descr = "Mangling uc_mcontext with INVALID MODE EL1t",
> + .sig_trig = SIGUSR1,
> + .sig_ok = SIGSEGV,
> + .run = mangle_invalid_pstate_run,
> +};
These tests seem identical except for the EL number.
Can we macro-ise them?
mangle_pstate_invalid_mode_el1.c could become
--8<--
#include "mangle_pstate_invalid_mode.h"
DEFINE_TESTCASE_MANGLE_PSTATE_INVALID_MODE(1)
-->8--
(for example).
[...]
Cheers
---Dave
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox