* [PATCH v2 05/15] drm/mxsfb: Update register definitions using bit manipulation defines
From: Robert Chiras @ 2019-08-14 10:48 UTC (permalink / raw)
To: Guido Günther, Marek Vasut, Stefan Agner, David Airlie,
Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer,
Fabio Estevam
Cc: devicetree, linux-kernel, dri-devel, NXP Linux Team,
Pengutronix Kernel Team, linux-arm-kernel
In-Reply-To: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com>
Use BIT(x) and GEN_MASK(h, l) for better representation the inside of
various registers.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
---
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 151 ++++++++++++++++++++++---------------
1 file changed, 89 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
index 71426aa..9fcb1db 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h
+++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
@@ -40,66 +40,93 @@
#define LCDC_AS_BUF 0x220
#define LCDC_AS_NEXT_BUF 0x230
-#define CTRL_SFTRST (1 << 31)
-#define CTRL_CLKGATE (1 << 30)
-#define CTRL_BYPASS_COUNT (1 << 19)
-#define CTRL_VSYNC_MODE (1 << 18)
-#define CTRL_DOTCLK_MODE (1 << 17)
-#define CTRL_DATA_SELECT (1 << 16)
-#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
-#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
-#define CTRL_BUS_WIDTH_MASK (0x3 << 10)
-#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
-#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
-#define CTRL_MASTER (1 << 5)
-#define CTRL_DF16 (1 << 3)
-#define CTRL_DF18 (1 << 2)
-#define CTRL_DF24 (1 << 1)
-#define CTRL_RUN (1 << 0)
-
-#define CTRL1_RECOVERY_ON_UNDERFLOW (1 << 24)
-#define CTRL1_FIFO_CLEAR (1 << 21)
-#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
-#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
-#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13)
-#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9)
-
-#define CTRL2_OUTSTANDING_REQS__REQ_16 (4 << 21)
-
-#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
-#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
-#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
-#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
-
-#define VDCTRL0_ENABLE_PRESENT (1 << 28)
-#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27)
-#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26)
-#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25)
-#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24)
-#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21)
-#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20)
-#define VDCTRL0_HALF_LINE (1 << 19)
-#define VDCTRL0_HALF_LINE_MODE (1 << 18)
-#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
-#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
-
-#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
-#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
-
-#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29)
-#define VDCTRL3_VSYNC_ONLY (1 << 28)
-#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
-#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
-#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
-#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
-
-#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
-#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
-#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18)
-#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
-
-#define DEBUG0_HSYNC (1 < 26)
-#define DEBUG0_VSYNC (1 < 25)
+/* reg bit manipulation */
+#define REG_PUT(x, h, l) (((x) << (l)) & GENMASK(h, l))
+#define REG_GET(x, h, l) (((x) & GENMASK(h, l)) >> (l))
+
+#define CTRL_SFTRST BIT(31)
+#define CTRL_CLKGATE BIT(30)
+#define CTRL_SHIFT_DIR(x) REG_PUT((x), 26, 26)
+#define CTRL_SHIFT_NUM(x) REG_PUT((x), 25, 21)
+#define CTRL_BYPASS_COUNT BIT(19)
+#define CTRL_VSYNC_MODE BIT(18)
+#define CTRL_DOTCLK_MODE BIT(17)
+#define CTRL_DATA_SELECT BIT(16)
+#define CTRL_INPUT_SWIZZLE(x) REG_PUT((x), 15, 14)
+#define CTRL_CSC_SWIZZLE(x) REG_PUT((x), 13, 12)
+#define CTRL_SET_BUS_WIDTH(x) REG_PUT((x), 11, 10)
+#define CTRL_GET_BUS_WIDTH(x) REG_GET((x), 11, 10)
+#define CTRL_BUS_WIDTH_MASK REG_PUT((0x3), 11, 10)
+#define CTRL_SET_WORD_LENGTH(x) REG_PUT((x), 9, 8)
+#define CTRL_GET_WORD_LENGTH(x) REG_GET((x), 9, 8)
+#define CTRL_MASTER BIT(5)
+#define CTRL_DF16 BIT(3)
+#define CTRL_DF18 BIT(2)
+#define CTRL_DF24 BIT(1)
+#define CTRL_RUN BIT(0)
+
+#define CTRL1_RECOVERY_ON_UNDERFLOW BIT(24)
+#define CTRL1_FIFO_CLEAR BIT(21)
+
+/*
+ * BYTE_PACKAGING
+ *
+ * This bitfield is used to show which data bytes in a 32-bit word area valid.
+ * Default value 0xf indicates that all bytes are valid. For 8-bit transfers,
+ * any combination in this bitfield will mean valid data is present in the
+ * corresponding bytes. In the 16-bit mode, a 16-bit half-word is valid only if
+ * adjacent bits [1:0] or [3:2] or both are 1. A value of 0x0 will mean that
+ * none of the bytes are valid and should not be used. For example, set the bit
+ * field value to 0x7 if the display data is arranged in the 24-bit unpacked
+ * format (A-R-G-B where A value does not have be transmitted).
+ */
+#define CTRL1_SET_BYTE_PACKAGING(x) REG_PUT((x), 19, 16)
+#define CTRL1_GET_BYTE_PACKAGING(x) REG_GET((x), 19, 16)
+
+#define CTRL1_CUR_FRAME_DONE_IRQ_EN BIT(13)
+#define CTRL1_CUR_FRAME_DONE_IRQ BIT(9)
+
+#define CTRL2_OUTSTANDING_REQS(x) REG_PUT((x), 23, 21)
+#define REQ_1 0
+#define REQ_2 1
+#define REQ_4 2
+#define REQ_8 3
+#define REQ_16 4
+
+#define TRANSFER_COUNT_SET_VCOUNT(x) REG_PUT((x), 31, 16)
+#define TRANSFER_COUNT_GET_VCOUNT(x) REG_GET((x), 31, 16)
+#define TRANSFER_COUNT_SET_HCOUNT(x) REG_PUT((x), 15, 0)
+#define TRANSFER_COUNT_GET_HCOUNT(x) REG_GET((x), 15, 0)
+
+#define VDCTRL0_ENABLE_PRESENT BIT(28)
+#define VDCTRL0_VSYNC_ACT_HIGH BIT(27)
+#define VDCTRL0_HSYNC_ACT_HIGH BIT(26)
+#define VDCTRL0_DOTCLK_ACT_FALLING BIT(25)
+#define VDCTRL0_ENABLE_ACT_HIGH BIT(24)
+#define VDCTRL0_VSYNC_PERIOD_UNIT BIT(21)
+#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT BIT(20)
+#define VDCTRL0_HALF_LINE BIT(19)
+#define VDCTRL0_HALF_LINE_MODE BIT(18)
+#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) REG_PUT((x), 17, 0)
+#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) REG_GET((x), 17, 0)
+
+#define VDCTRL2_SET_HSYNC_PERIOD(x) REG_PUT((x), 15, 0)
+#define VDCTRL2_GET_HSYNC_PERIOD(x) REG_GET((x), 15, 0)
+
+#define VDCTRL3_MUX_SYNC_SIGNALS BIT(29)
+#define VDCTRL3_VSYNC_ONLY BIT(28)
+#define SET_HOR_WAIT_CNT(x) REG_PUT((x), 27, 16)
+#define GET_HOR_WAIT_CNT(x) REG_GET((x), 27, 16)
+#define SET_VERT_WAIT_CNT(x) REG_PUT((x), 15, 0)
+#define GET_VERT_WAIT_CNT(x) REG_GET((x), 15, 0)
+
+#define VDCTRL4_SET_DOTCLK_DLY(x) REG_PUT((x), 31, 29) /* v4 only */
+#define VDCTRL4_GET_DOTCLK_DLY(x) REG_GET((x), 31, 29) /* v4 only */
+#define VDCTRL4_SYNC_SIGNALS_ON BIT(18)
+#define SET_DOTCLK_H_VALID_DATA_CNT(x) REG_PUT((x), 17, 0)
+
+#define DEBUG0_HSYNC BIT(26)
+#define DEBUG0_VSYNC BIT(25)
#define MXSFB_MIN_XRES 120
#define MXSFB_MIN_YRES 120
@@ -116,7 +143,7 @@
#define STMLCDIF_18BIT 2 /* pixel data bus to the display is of 18 bit width */
#define STMLCDIF_24BIT 3 /* pixel data bus to the display is of 24 bit width */
-#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
-#define MXSFB_SYNC_DOTCLK_FALLING_ACT (1 << 7) /* negative edge sampling */
+#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT BIT(6)
+#define MXSFB_SYNC_DOTCLK_FALLING_ACT BIT(7) /* negative edge sampling */
#endif /* __MXSFB_REGS_H__ */
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2 00/15] Improvements and fixes for mxsfb DRM driver
From: Robert Chiras @ 2019-08-14 10:48 UTC (permalink / raw)
To: Guido Günther, Marek Vasut, Stefan Agner, David Airlie,
Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer,
Fabio Estevam
Cc: devicetree, linux-kernel, dri-devel, NXP Linux Team,
Pengutronix Kernel Team, linux-arm-kernel
This patch-set improves the use of eLCDIF block on iMX 8 SoCs (like 8MQ, 8MM
and 8QXP). Following, are the new features added and fixes from this
patch-set:
1. Add support for drm_bridge
On 8MQ and 8MM, the LCDIF block is not directly connected to a parallel
display connector, where an LCD panel can be attached, but instead it is
connected to DSI controller. Since this DSI stands between the display
controller (eLCDIF) and the physical connector, the DSI can be implemented
as a DRM bridge. So, in order to be able to connect the mxsfb driver to
the DSI driver, the support for a drm_bridge was needed in mxsfb DRM
driver (the actual driver for the eLCDIF block).
2. Add support for additional pixel formats
Some of the pixel formats needed by Android were not implemented in this
driver, but they were actually supported. So, add support for them.
3. Add support for horizontal stride
Having support for horizontal stride allows the use of eLCDIF with a GPU
(for example) that can only output resolution sizes multiple of a power of
8. For example, 1080 is not a power of 16, so in order to support 1920x1080
output from GPUs that can produce linear buffers only in sizes multiple to 16,
this feature is needed.
3. Few minor features and bug-fixing
The addition of max-res DT property was actually needed in order to limit
the bandwidth usage of the eLCDIF block. This is need on systems where
multiple display controllers are presend and the memory bandwidth is not
enough to handle all of them at maximum capacity (like it is the case on
8MQ, where there are two display controllers: DCSS and eLCDIF).
The rest of the patches are bug-fixes.
v2:
- Collected Tested-by from Guido
- Split the first patch, which added more than one feature into relevant
patches, explaining each feature added
- Also split the second patch into more patches, to differentiate between
the feature itself (additional pixel formats support) and the cleanup
of the register definitions for a better representation (guido)
- Included a patch submitted by Guido, while he was testing my patch-set
Guido Günther (1):
drm/mxsfb: Read bus flags from bridge if present
Mirela Rabulea (1):
drm/mxsfb: Signal mode changed when bpp changed
Robert Chiras (13):
drm/mxsfb: Update mxsfb to support a bridge
drm/mxsfb: Add defines for the rest of registers
drm/mxsfb: Reset vital register for a proper initialization
drm/mxsfb: Update register definitions using bit manipulation defines
drm/mxsfb: Update mxsfb with additional pixel formats
drm/mxsfb: Fix the vblank events
dt-bindings: display: Add max-res property for mxsfb
drm/mxsfb: Add max-res property for MXSFB
drm/mxsfb: Update mxsfb to support LCD reset
drm/mxsfb: Improve the axi clock usage
drm/mxsfb: Clear OUTSTANDING_REQS bits
drm/mxsfb: Add support for horizontal stride
drm/mxsfb: Add support for live pixel format change
.../devicetree/bindings/display/mxsfb.txt | 6 +
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 287 ++++++++++++++++++---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 190 +++++++++++---
drivers/gpu/drm/mxsfb/mxsfb_drv.h | 10 +-
drivers/gpu/drm/mxsfb/mxsfb_out.c | 26 +-
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 193 +++++++++-----
6 files changed, 573 insertions(+), 139 deletions(-)
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v2 03/15] drm/mxsfb: Add defines for the rest of registers
From: Robert Chiras @ 2019-08-14 10:48 UTC (permalink / raw)
To: Guido Günther, Marek Vasut, Stefan Agner, David Airlie,
Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer,
Fabio Estevam
Cc: devicetree, linux-kernel, dri-devel, NXP Linux Team,
Pengutronix Kernel Team, linux-arm-kernel
In-Reply-To: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com>
Some of the existing registers in this controller are not defined, but
also not used. Add them to the register definitions, so that they can be
easily used in future improvements or fixes.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
---
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
index 932d7ea..71426aa 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_regs.h
+++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
@@ -14,19 +14,31 @@
#define LCDC_CTRL 0x00
#define LCDC_CTRL1 0x10
+#define LCDC_V4_CTRL2 0x20
#define LCDC_V3_TRANSFER_COUNT 0x20
#define LCDC_V4_TRANSFER_COUNT 0x30
#define LCDC_V4_CUR_BUF 0x40
#define LCDC_V4_NEXT_BUF 0x50
#define LCDC_V3_CUR_BUF 0x30
#define LCDC_V3_NEXT_BUF 0x40
+#define LCDC_TIMING 0x60
#define LCDC_VDCTRL0 0x70
#define LCDC_VDCTRL1 0x80
#define LCDC_VDCTRL2 0x90
#define LCDC_VDCTRL3 0xa0
#define LCDC_VDCTRL4 0xb0
+#define LCDC_DVICTRL0 0xc0
+#define LCDC_DVICTRL1 0xd0
+#define LCDC_DVICTRL2 0xe0
+#define LCDC_DVICTRL3 0xf0
+#define LCDC_DVICTRL4 0x100
+#define LCDC_V4_DATA 0x180
+#define LCDC_V3_DATA 0x1b0
#define LCDC_V4_DEBUG0 0x1d0
#define LCDC_V3_DEBUG0 0x1f0
+#define LCDC_AS_CTRL 0x210
+#define LCDC_AS_BUF 0x220
+#define LCDC_AS_NEXT_BUF 0x230
#define CTRL_SFTRST (1 << 31)
#define CTRL_CLKGATE (1 << 30)
@@ -45,12 +57,15 @@
#define CTRL_DF24 (1 << 1)
#define CTRL_RUN (1 << 0)
+#define CTRL1_RECOVERY_ON_UNDERFLOW (1 << 24)
#define CTRL1_FIFO_CLEAR (1 << 21)
#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13)
#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9)
+#define CTRL2_OUTSTANDING_REQS__REQ_16 (4 << 21)
+
#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2 02/15] drm/mxsfb: Read bus flags from bridge if present
From: Robert Chiras @ 2019-08-14 10:48 UTC (permalink / raw)
To: Guido Günther, Marek Vasut, Stefan Agner, David Airlie,
Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer,
Fabio Estevam
Cc: devicetree, linux-kernel, dri-devel, NXP Linux Team,
Pengutronix Kernel Team, linux-arm-kernel
In-Reply-To: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com>
From: Guido Günther <agx@sigxcpu.org>
The bridge might have special requirmentes on the input bus. This
is e.g. used by the imx-nwl bridge.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Stefan Agner <stefan@agner.ch>
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index de09b93..b69ace8 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -209,7 +209,7 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
{
struct drm_device *drm = mxsfb->pipe.crtc.dev;
struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode;
- const u32 bus_flags = mxsfb->connector->display_info.bus_flags;
+ u32 bus_flags = mxsfb->connector->display_info.bus_flags;
u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
int err;
@@ -233,6 +233,9 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);
+ if (mxsfb->bridge && mxsfb->bridge->timings)
+ bus_flags = mxsfb->bridge->timings->input_bus_flags;
+
DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n",
m->crtc_clock,
(int)(clk_get_rate(mxsfb->clk) / 1000));
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2 01/15] drm/mxsfb: Update mxsfb to support a bridge
From: Robert Chiras @ 2019-08-14 10:48 UTC (permalink / raw)
To: Guido Günther, Marek Vasut, Stefan Agner, David Airlie,
Daniel Vetter, Rob Herring, Mark Rutland, Shawn Guo, Sascha Hauer,
Fabio Estevam
Cc: devicetree, linux-kernel, dri-devel, NXP Linux Team,
Pengutronix Kernel Team, linux-arm-kernel
In-Reply-To: <1565779731-1300-1-git-send-email-robert.chiras@nxp.com>
Currently, the MXSFB DRM driver only supports a panel. But, its output
display signal can also be redirected to another encoder, like a DSI
controller. In this case, that DSI controller may act like a drm_bridge.
In order support this use-case too, this patch adds support for drm_bridge
in mxsfb.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Guido Günther <agx@sigxcpu.org>
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 17 +++++++++++---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 46 +++++++++++++++++++++++++++++++++-----
drivers/gpu/drm/mxsfb/mxsfb_drv.h | 4 +++-
drivers/gpu/drm/mxsfb/mxsfb_out.c | 26 +++++++++++----------
4 files changed, 72 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
index 1242156..de09b93 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
@@ -95,8 +95,11 @@ static void mxsfb_set_bus_fmt(struct mxsfb_drm_private *mxsfb)
reg = readl(mxsfb->base + LCDC_CTRL);
- if (mxsfb->connector.display_info.num_bus_formats)
- bus_format = mxsfb->connector.display_info.bus_formats[0];
+ if (mxsfb->connector->display_info.num_bus_formats)
+ bus_format = mxsfb->connector->display_info.bus_formats[0];
+
+ DRM_DEV_DEBUG_DRIVER(drm->dev, "Using bus_format: 0x%08X\n",
+ bus_format);
reg &= ~CTRL_BUS_WIDTH_MASK;
switch (bus_format) {
@@ -204,8 +207,9 @@ static dma_addr_t mxsfb_get_fb_paddr(struct mxsfb_drm_private *mxsfb)
static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
{
+ struct drm_device *drm = mxsfb->pipe.crtc.dev;
struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode;
- const u32 bus_flags = mxsfb->connector.display_info.bus_flags;
+ const u32 bus_flags = mxsfb->connector->display_info.bus_flags;
u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
int err;
@@ -229,6 +233,13 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);
+ DRM_DEV_DEBUG_DRIVER(drm->dev, "Pixel clock: %dkHz (actual: %dkHz)\n",
+ m->crtc_clock,
+ (int)(clk_get_rate(mxsfb->clk) / 1000));
+ DRM_DEV_DEBUG_DRIVER(drm->dev, "Connector bus_flags: 0x%08X\n",
+ bus_flags);
+ DRM_DEV_DEBUG_DRIVER(drm->dev, "Mode flags: 0x%08X\n", m->flags);
+
writel(TRANSFER_COUNT_SET_VCOUNT(m->crtc_vdisplay) |
TRANSFER_COUNT_SET_HCOUNT(m->crtc_hdisplay),
mxsfb->base + mxsfb->devdata->transfer_count);
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
index 878ef68..9dc69b7 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
@@ -101,9 +101,25 @@ static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe,
struct drm_crtc_state *crtc_state,
struct drm_plane_state *plane_state)
{
+ struct drm_connector *connector;
struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
struct drm_device *drm = pipe->plane.dev;
+ if (!mxsfb->connector) {
+ list_for_each_entry(connector,
+ &drm->mode_config.connector_list,
+ head)
+ if (connector->encoder == &mxsfb->pipe.encoder) {
+ mxsfb->connector = connector;
+ break;
+ }
+ }
+
+ if (!mxsfb->connector) {
+ dev_warn(drm->dev, "No connector attached, using default\n");
+ mxsfb->connector = &mxsfb->panel_connector;
+ }
+
pm_runtime_get_sync(drm->dev);
drm_panel_prepare(mxsfb->panel);
mxsfb_crtc_enable(mxsfb);
@@ -129,6 +145,9 @@ static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe)
drm_crtc_send_vblank_event(crtc, event);
}
spin_unlock_irq(&drm->event_lock);
+
+ if (mxsfb->connector != &mxsfb->panel_connector)
+ mxsfb->connector = NULL;
}
static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe,
@@ -226,16 +245,33 @@ static int mxsfb_load(struct drm_device *drm, unsigned long flags)
ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs,
mxsfb_formats, ARRAY_SIZE(mxsfb_formats), NULL,
- &mxsfb->connector);
+ mxsfb->connector);
if (ret < 0) {
dev_err(drm->dev, "Cannot setup simple display pipe\n");
goto err_vblank;
}
- ret = drm_panel_attach(mxsfb->panel, &mxsfb->connector);
- if (ret) {
- dev_err(drm->dev, "Cannot connect panel\n");
- goto err_vblank;
+ /*
+ * Attach panel only if there is one.
+ * If there is no panel attach, it must be a bridge. In this case, we
+ * need a reference to its connector for a proper initialization.
+ * We will do this check in pipe->enable(), since the connector won't
+ * be attached to an encoder until then.
+ */
+
+ if (mxsfb->panel) {
+ ret = drm_panel_attach(mxsfb->panel, mxsfb->connector);
+ if (ret) {
+ dev_err(drm->dev, "Cannot connect panel: %d\n", ret);
+ goto err_vblank;
+ }
+ } else if (mxsfb->bridge) {
+ ret = drm_simple_display_pipe_attach_bridge(&mxsfb->pipe,
+ mxsfb->bridge);
+ if (ret) {
+ dev_err(drm->dev, "Cannot connect bridge: %d\n", ret);
+ goto err_vblank;
+ }
}
drm->mode_config.min_width = MXSFB_MIN_XRES;
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
index d975300..0b65b51 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_drv.h
+++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
@@ -27,8 +27,10 @@ struct mxsfb_drm_private {
struct clk *clk_disp_axi;
struct drm_simple_display_pipe pipe;
- struct drm_connector connector;
+ struct drm_connector panel_connector;
+ struct drm_connector *connector;
struct drm_panel *panel;
+ struct drm_bridge *bridge;
};
int mxsfb_setup_crtc(struct drm_device *dev);
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_out.c b/drivers/gpu/drm/mxsfb/mxsfb_out.c
index 231d016..9506eec 100644
--- a/drivers/gpu/drm/mxsfb/mxsfb_out.c
+++ b/drivers/gpu/drm/mxsfb/mxsfb_out.c
@@ -21,7 +21,8 @@
static struct mxsfb_drm_private *
drm_connector_to_mxsfb_drm_private(struct drm_connector *connector)
{
- return container_of(connector, struct mxsfb_drm_private, connector);
+ return container_of(connector, struct mxsfb_drm_private,
+ panel_connector);
}
static int mxsfb_panel_get_modes(struct drm_connector *connector)
@@ -76,22 +77,23 @@ static const struct drm_connector_funcs mxsfb_panel_connector_funcs = {
int mxsfb_create_output(struct drm_device *drm)
{
struct mxsfb_drm_private *mxsfb = drm->dev_private;
- struct drm_panel *panel;
int ret;
- ret = drm_of_find_panel_or_bridge(drm->dev->of_node, 0, 0, &panel, NULL);
+ ret = drm_of_find_panel_or_bridge(drm->dev->of_node, 0, 0,
+ &mxsfb->panel, &mxsfb->bridge);
if (ret)
return ret;
- mxsfb->connector.dpms = DRM_MODE_DPMS_OFF;
- mxsfb->connector.polled = 0;
- drm_connector_helper_add(&mxsfb->connector,
- &mxsfb_panel_connector_helper_funcs);
- ret = drm_connector_init(drm, &mxsfb->connector,
- &mxsfb_panel_connector_funcs,
- DRM_MODE_CONNECTOR_Unknown);
- if (!ret)
- mxsfb->panel = panel;
+ if (mxsfb->panel) {
+ mxsfb->connector = &mxsfb->panel_connector;
+ mxsfb->connector->dpms = DRM_MODE_DPMS_OFF;
+ mxsfb->connector->polled = 0;
+ drm_connector_helper_add(mxsfb->connector,
+ &mxsfb_panel_connector_helper_funcs);
+ ret = drm_connector_init(drm, mxsfb->connector,
+ &mxsfb_panel_connector_funcs,
+ DRM_MODE_CONNECTOR_Unknown);
+ }
return ret;
}
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 1/7] [RFC] ARM: remove Intel iop33x and iop13xx support
From: Arnd Bergmann @ 2019-08-14 10:48 UTC (permalink / raw)
To: Linus Walleij
Cc: Peter Teichmann, open list:GPIO SUBSYSTEM,
Linux Kernel Mailing List, Vinod Koul, Russell King,
Bartosz Golaszewski, soc, linux-i2c, dmaengine, Dan Williams,
Martin Michlmayr, Linux ARM
In-Reply-To: <CACRpkdao8LF8g5qi_h+9BT9cHwmB4OadabkdGfP0sEFeLbmiLw@mail.gmail.com>
On Wed, Aug 14, 2019 at 10:36 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Mon, Aug 12, 2019 at 11:45 AM Martin Michlmayr <tbm@cyrius.com> wrote:
>
> > As Arnd points out, Debian used to have support for various iop32x
> > devices. While Debian hasn't supported iop32x in a number of years,
> > these devices are still usable and in use (RMK being a prime example).
>
> I suppose it could be a good idea to add support for iop32x to
> OpenWrt and/or OpenEmbedded, both of which support some
> pretty constrained systems. I am personally using these
> distributions to support elder ARM hardware these days.
OpenWRT also had support in the past and dropped it around the
same time as Debian. The way I understand it, a couple of platforms
including iop32x were moved out of the main openwrt source tree
into https://github.com/openwrt/targets/ because there was little
interest in keeping them running.
The idea was that any remaining users could add that feed to get
minimal support, but I'm not sure if would still work. In particular,
iop33x appears to be based on linux-3.3 plus three patches that
are no longer needed in mainline. Building a mainline kernel without
those patches may or may not work.
Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v7 9/9] drm: exynos: exynos_hdmi: use cec_notifier_conn_(un)register
From: Dariusz Marcinkiewicz @ 2019-08-14 10:45 UTC (permalink / raw)
To: dri-devel, linux-media, hverkuil-cisco
Cc: linux-samsung-soc, Joonyoung Shim, David Airlie, Seung-Woo Kim,
linux-kernel, Krzysztof Kozlowski, Inki Dae, Kyungmin Park,
Kukjin Kim, Daniel Vetter, Dariusz Marcinkiewicz,
linux-arm-kernel
In-Reply-To: <20190814104520.6001-1-darekm@google.com>
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill in
the cec_connector_info.
Changes since v2:
- removed unnecessary call to invalidate phys address before
deregistering the notifier,
- use cec_notifier_phys_addr_invalidate instead of setting
invalid address on a notifier.
Signed-off-by: Dariusz Marcinkiewicz <darekm@google.com>
Tested-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 31 ++++++++++++++++------------
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index bc1565f1822ab..d532b468d9af5 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -852,6 +852,10 @@ static enum drm_connector_status hdmi_detect(struct drm_connector *connector,
static void hdmi_connector_destroy(struct drm_connector *connector)
{
+ struct hdmi_context *hdata = connector_to_hdmi(connector);
+
+ cec_notifier_conn_unregister(hdata->notifier);
+
drm_connector_unregister(connector);
drm_connector_cleanup(connector);
}
@@ -935,6 +939,7 @@ static int hdmi_create_connector(struct drm_encoder *encoder)
{
struct hdmi_context *hdata = encoder_to_hdmi(encoder);
struct drm_connector *connector = &hdata->connector;
+ struct cec_connector_info conn_info;
int ret;
connector->interlace_allowed = true;
@@ -957,6 +962,15 @@ static int hdmi_create_connector(struct drm_encoder *encoder)
DRM_DEV_ERROR(hdata->dev, "Failed to attach bridge\n");
}
+ cec_fill_conn_info_from_drm(&conn_info, connector);
+
+ hdata->notifier = cec_notifier_conn_register(hdata->dev, NULL,
+ &conn_info);
+ if (hdata->notifier == NULL) {
+ ret = -ENOMEM;
+ DRM_DEV_ERROR(hdata->dev, "Failed to allocate CEC notifier\n");
+ }
+
return ret;
}
@@ -1528,8 +1542,8 @@ static void hdmi_disable(struct drm_encoder *encoder)
*/
mutex_unlock(&hdata->mutex);
cancel_delayed_work(&hdata->hotplug_work);
- cec_notifier_set_phys_addr(hdata->notifier,
- CEC_PHYS_ADDR_INVALID);
+ if (hdata->notifier)
+ cec_notifier_phys_addr_invalidate(hdata->notifier);
return;
}
@@ -2006,12 +2020,6 @@ static int hdmi_probe(struct platform_device *pdev)
}
}
- hdata->notifier = cec_notifier_get(&pdev->dev);
- if (hdata->notifier == NULL) {
- ret = -ENOMEM;
- goto err_hdmiphy;
- }
-
pm_runtime_enable(dev);
audio_infoframe = &hdata->audio.infoframe;
@@ -2023,7 +2031,7 @@ static int hdmi_probe(struct platform_device *pdev)
ret = hdmi_register_audio_device(hdata);
if (ret)
- goto err_notifier_put;
+ goto err_runtime_disable;
ret = component_add(&pdev->dev, &hdmi_component_ops);
if (ret)
@@ -2034,8 +2042,7 @@ static int hdmi_probe(struct platform_device *pdev)
err_unregister_audio:
platform_device_unregister(hdata->audio.pdev);
-err_notifier_put:
- cec_notifier_put(hdata->notifier);
+err_runtime_disable:
pm_runtime_disable(dev);
err_hdmiphy:
@@ -2054,12 +2061,10 @@ static int hdmi_remove(struct platform_device *pdev)
struct hdmi_context *hdata = platform_get_drvdata(pdev);
cancel_delayed_work_sync(&hdata->hotplug_work);
- cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID);
component_del(&pdev->dev, &hdmi_component_ops);
platform_device_unregister(hdata->audio.pdev);
- cec_notifier_put(hdata->notifier);
pm_runtime_disable(&pdev->dev);
if (!IS_ERR(hdata->reg_hdmi_en))
--
2.23.0.rc1.153.gdeed80330f-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v7 0/9] drm: cec: convert DRM drivers to the new notifier API
From: Dariusz Marcinkiewicz @ 2019-08-14 10:44 UTC (permalink / raw)
To: dri-devel, linux-media, hverkuil-cisco
Cc: Kate Stewart, Neil Armstrong, Daniel Vetter, Imre Deak,
Chris Wilson, Hans Verkuil, Andrzej Hajda, Dhinakaran Pandiyan,
Sam Ravnborg, Ville Syrjälä, linux-samsung-soc,
David Francis, amd-gfx, Leo Li, Jerry (Fangzhi) Zuo,
linux-arm-kernel, nouveau, Harry Wentland, Shashank Sharma,
Lyude Paul, Jonas Karlman, Jani Nikula, intel-gfx,
Maarten Lankhorst, Ramalingam C, Russell King, Sean Paul,
Rodrigo Vivi, linux-tegra, Thomas Gleixner, Allison Randal,
Thomas Lim, Jernej Skrabec, Greg Kroah-Hartman, Douglas Anderson,
linux-kernel, Manasi Navare, Alex Deucher, Colin Ian King,
Dariusz Marcinkiewicz, Enrico Weigelt, Laurent Pinchart
This series updates DRM drivers to use new CEC notifier API.
Changes since v6:
Made CEC notifiers' registration and de-registration symmetric
in tda998x and dw-hdmi drivers. Also, accidentally dropped one
patch in v6 (change to drm_dp_cec), brought it back now.
Changes since v5:
Fixed a warning about a missing comment for a new member of
drm_dp_aux_cec struct. Sending to a wider audience,
including maintainers of respective drivers.
Changes since v4:
Addressing review comments.
Changes since v3:
Updated adapter flags in dw-hdmi-cec.
Changes since v2:
Include all DRM patches from "cec: improve notifier support,
add connector info connector info" series.
Changes since v1:
Those patches delay creation of notifiers until respective
connectors are constructed. It seems that those patches, for a
couple of drivers, by adding the delay, introduce a race between
notifiers' creation and the IRQs handling threads - at least I
don't see anything obvious in there that would explicitly forbid
such races to occur. v2 adds a write barrier to make sure IRQ
threads see the notifier once it is created (replacing the
WRITE_ONCE I put in v1). The best thing to do here, I believe,
would be not to have any synchronization and make sure that an IRQ
only gets enabled after the notifier is created.
Dariusz Marcinkiewicz (9):
drm_dp_cec: add connector info support.
drm/i915/intel_hdmi: use cec_notifier_conn_(un)register
dw-hdmi-cec: use cec_notifier_cec_adap_(un)register
tda9950: use cec_notifier_cec_adap_(un)register
drm: tda998x: use cec_notifier_conn_(un)register
drm: sti: use cec_notifier_conn_(un)register
drm: tegra: use cec_notifier_conn_(un)register
drm: dw-hdmi: use cec_notifier_conn_(un)register
drm: exynos: exynos_hdmi: use cec_notifier_conn_(un)register
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi-cec.c | 13 +++---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 46 +++++++++++++------
drivers/gpu/drm/drm_dp_cec.c | 25 ++++++----
drivers/gpu/drm/exynos/exynos_hdmi.c | 31 +++++++------
drivers/gpu/drm/i2c/tda9950.c | 12 ++---
drivers/gpu/drm/i2c/tda998x_drv.c | 36 ++++++++++-----
drivers/gpu/drm/i915/display/intel_dp.c | 4 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 13 ++++--
drivers/gpu/drm/nouveau/nouveau_connector.c | 3 +-
drivers/gpu/drm/sti/sti_hdmi.c | 19 +++++---
drivers/gpu/drm/tegra/output.c | 28 ++++++++---
include/drm/drm_dp_helper.h | 17 ++++---
13 files changed, 155 insertions(+), 94 deletions(-)
--
2.23.0.rc1.153.gdeed80330f-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/8] arm64: memory: Fix virt_addr_valid() using __is_lm_address()
From: Catalin Marinas @ 2019-08-14 10:40 UTC (permalink / raw)
To: Will Deacon
Cc: Mark Rutland, Steve Capper, Andrey Konovalov, Geert Uytterhoeven,
Qian Cai, linux-arm-kernel
In-Reply-To: <20190814094819.4bdqaubqmbcm3zax@willie-the-truck>
On Wed, Aug 14, 2019 at 10:48:20AM +0100, Will Deacon wrote:
> On Wed, Aug 14, 2019 at 10:19:42AM +0100, Catalin Marinas wrote:
> > On Tue, Aug 13, 2019 at 06:01:42PM +0100, Will Deacon wrote:
> > > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
> > > index afaf512c0e1b..442ab861cab8 100644
> > > --- a/arch/arm64/include/asm/memory.h
> > > +++ b/arch/arm64/include/asm/memory.h
> > > @@ -244,9 +244,9 @@ static inline const void *__tag_set(const void *addr, u8 tag)
> > > /*
> > > * The linear kernel range starts in the middle of the virtual adddress
> > > * space. Testing the top bit for the start of the region is a
> > > - * sufficient check.
> > > + * sufficient check and avoids having to worry about the tag.
> > > */
> > > -#define __is_lm_address(addr) (!((addr) & BIT(vabits_actual - 1)))
> > > +#define __is_lm_address(addr) (!(((u64)addr) & BIT(vabits_actual - 1)))
> > >
> > > #define __lm_to_phys(addr) (((addr) + physvirt_offset))
> > > #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
> > > @@ -326,13 +326,13 @@ static inline void *phys_to_virt(phys_addr_t x)
> > >
> > > #define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) + VMEMMAP_START))
> > > #endif
> > > -#endif
> > >
> > > -#define _virt_addr_is_linear(kaddr) \
> > > - (__tag_reset((u64)(kaddr)) >= PAGE_OFFSET)
> > > +#define virt_addr_valid(addr) ({ \
> > > + __typeof__(addr) __addr = addr; \
> > > + __is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \
> > > +})
> >
> > There is a slight change of semantics here but I don't think it's an
> > issue currently. __is_lm_address() is true even for a user address, so
> > at least the first part of virt_addr_valid() now accepts such addresses.
> > The pfn would be wrong eventually because of the virt-to-phys offsetting
> > and pfn_valid() false but we rely on this rather than checking it's a
> > kernel address. Slight concern as this macro is called from drivers.
> >
> > Should we keep the PAGE_OFFSET check as well?
>
> In virt_addr_valid() or __is_lm_address()?
>
> To be honest with you, I'm not even sure what virt_addr_valid() is supposed
> to do with non-linear kernel addresses: look at powerpc and riscv, who
> appear to convert the address straight to a pfn. Many callers check against
> is_vmalloc_addr() first, but not all of them.
Even if they call is_vmalloc_addr(), it would return false for user
address. Anyway, at a quick look, I couldn't find any virt_addr_valid()
where it would be an issue.
> I think passing in a *user* address would be a huge bug in the caller,
> just like it would be if you called virt_to_phys() on a user address.
> If we care about that, then I think __is_lm_address() should be the one
> doing the check against PAGE_OFFSET.
>
> Thoughts? I'd be inclined to leave this patch as it is.
Leave it as it is. The way pfn_valid() is written it wouldn't return
true for a user address due to the fact that virt_to_phys() cannot
return the same physical address for a user and linear map one.
For this patch:
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 14/22] ARM: omap1: use pci_ioremap_io() for omap_cf
From: Arnd Bergmann @ 2019-08-14 10:36 UTC (permalink / raw)
To: Tony Lindgren
Cc: Aaro Koskinen, Greg Kroah-Hartman, Linus Walleij,
Bartlomiej Zolnierkiewicz, Linux Kernel Mailing List,
Dominik Brodowski, Tomi Valkeinen, linux-omap, Linux ARM
In-Reply-To: <20190814074918.GA52127@atomide.com>
On Wed, Aug 14, 2019 at 9:49 AM Tony Lindgren <tony@atomide.com> wrote:
> * Arnd Bergmann <arnd@arndb.de> [190813 19:34]:
> > On Tue, Aug 13, 2019 at 8:12 PM Aaro Koskinen <aaro.koskinen@iki.fi> wrote:
> > diff --git a/arch/arm/mach-omap1/hardware.h b/arch/arm/mach-omap1/hardware.h
> > index 232b8deef907..9fc76a3c9e57 100644
> > --- a/arch/arm/mach-omap1/hardware.h
> > +++ b/arch/arm/mach-omap1/hardware.h
> > @@ -61,7 +61,7 @@ static inline u32 omap_cs3_phys(void)
> >
> > #endif /* ifndef __ASSEMBLER__ */
> >
> > -#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO
> > = 0xfefb0000 */
> > +#define OMAP1_IO_OFFSET 0x00fb0000 /* Virtual IO
> > = 0xff000000 */
> > #define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
> >
> > #include "serial.h"
>
> Oh OK yeah sounds like that's the issue.
>
> > There may be additional locations that hardcode the virtual address.
>
> Those should be in mach-omap1/io.c, and I recall innovator had some
> hardcoded fpga address that should also be checked.
I see four boards with hardcoded I/O addresses, but they are all below
the PCI I/O virtual address range, and are not affected by that change.
For the innovator FPGA access, this was ok, it uses the correct address
in the OMAP1_IO_OFFSET range.
Arnd
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 04/22] media: Move v4l2_fwnode_parse_link from v4l2 to driver base
From: Russell King - ARM Linux admin @ 2019-08-14 10:30 UTC (permalink / raw)
To: Steve Longerbeam
Cc: Heikki Krogerus, Rafael J. Wysocki, Laurent Pinchart,
Fabio Estevam, open list:STAGING SUBSYSTEM, Mauro Carvalho Chehab,
Michal Simek, open list:ACPI, Andy Shevchenko, NXP Linux Team,
Len Brown, Philipp Zabel, Sascha Hauer, Thomas Gleixner,
Andy Shevchenko, Pengutronix Kernel Team,
moderated list:ARM/ZYNQ ARCHITECTURE, Enrico Weigelt, Hyun Kwon,
Greg Kroah-Hartman, open list, Jacopo Mondi, Sakari Ailus,
Hans Verkuil, Linux Media Mailing List, Shawn Guo
In-Reply-To: <4750b347-b421-6569-600f-0ced8406460e@gmail.com>
On Tue, Aug 06, 2019 at 09:53:41AM -0700, Steve Longerbeam wrote:
> The full patchset doesn't seem to be up yet, but see [1] for the cover
> letter.
Was the entire series copied to the mailing lists, or just selected
patches? I only saw 4, 9, 11 and 13-22 via lakml.
In the absence of the other patches, will this solve imx-media binding
the internal subdevs of sensor devices to the CSI2 interface?
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 02/11] kselftest: arm64: adds first test and common utils
From: Amit Kachhap @ 2019-08-14 10:22 UTC (permalink / raw)
To: Cristian Marussi, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, shuah@kernel.org
Cc: andreyknvl@google.com, Dave P Martin
In-Reply-To: <5fb0a4fb-0457-8546-a8d7-af3f0d3f9348@arm.com>
Hi Cristian,
I have few more comments,
On 8/13/19 6:52 PM, Cristian Marussi wrote:
> Hi Amit
>
> thanks for the review.
>
> On 12/08/2019 13:43, Amit Kachhap wrote:
>> Hi Cristian,
>>
>> On 8/2/19 10:32 PM, Cristian Marussi wrote:
>>> Added some arm64/signal specific boilerplate and utility code to help
>>> further testcase development.
>>>
>>> A simple testcase and related helpers are also introduced in this commit:
>>> mangle_pstate_invalid_compat_toggle is a simple mangle testcase which
>>> messes with the ucontext_t from within the sig_handler, trying to toggle
>>> PSTATE state bits to switch the system between 32bit/64bit execution state.
>>> Expects SIGSEGV on test PASS.
>>>
>>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>>> ---
>>> A few fixes:
>>> - test_arm64_signals.sh runner script generation has been reviewed in order to
>>> be safe against the .gitignore
>>> - using kselftest.h officially provided defines for tests' return values
>>> - removed SAFE_WRITE()/dump_uc()
>>> - looking for si_code==SEGV_ACCERR on SEGV test cases to better understand if
>>> the sigfault had been directly triggered by Kernel
>>> ---
>>> tools/testing/selftests/arm64/Makefile | 2 +-
>>> .../testing/selftests/arm64/signal/.gitignore | 6 +
>>> tools/testing/selftests/arm64/signal/Makefile | 88 ++++++
>>> tools/testing/selftests/arm64/signal/README | 59 ++++
>>> .../arm64/signal/test_arm64_signals.src_shell | 55 ++++
>>> .../selftests/arm64/signal/test_signals.c | 26 ++
>>> .../selftests/arm64/signal/test_signals.h | 137 +++++++++
>>> .../arm64/signal/test_signals_utils.c | 261 ++++++++++++++++++
>>> .../arm64/signal/test_signals_utils.h | 13 +
>>> .../arm64/signal/testcases/.gitignore | 1 +
>>> .../mangle_pstate_invalid_compat_toggle.c | 25 ++
>>> .../arm64/signal/testcases/testcases.c | 150 ++++++++++
>>> .../arm64/signal/testcases/testcases.h | 83 ++++++
>>> 13 files changed, 905 insertions(+), 1 deletion(-)
>>> create mode 100644 tools/testing/selftests/arm64/signal/.gitignore
>>> create mode 100644 tools/testing/selftests/arm64/signal/Makefile
>>> create mode 100644 tools/testing/selftests/arm64/signal/README
>>> create mode 100755 tools/testing/selftests/arm64/signal/test_arm64_signals.src_shell
>>> create mode 100644 tools/testing/selftests/arm64/signal/test_signals.c
>>> create mode 100644 tools/testing/selftests/arm64/signal/test_signals.h
>>> create mode 100644 tools/testing/selftests/arm64/signal/test_signals_utils.c
>>> create mode 100644 tools/testing/selftests/arm64/signal/test_signals_utils.h
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/.gitignore
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_compat_toggle.c
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/testcases.c
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/testcases.h
>>>
>>> diff --git a/tools/testing/selftests/arm64/Makefile b/tools/testing/selftests/arm64/Makefile
>>> index 03a0d4f71218..af59dc74e0dc 100644
>>> --- a/tools/testing/selftests/arm64/Makefile
>>> +++ b/tools/testing/selftests/arm64/Makefile
>>> @@ -6,7 +6,7 @@ ARCH ?= $(shell uname -m)
>>> ARCH := $(shell echo $(ARCH) | sed -e s/aarch64/arm64/)
>>>
>>> ifeq ("x$(ARCH)", "xarm64")
>>> -SUBDIRS :=
>>> +SUBDIRS := signal
>>> else
>>> SUBDIRS :=
>>> endif
>>> diff --git a/tools/testing/selftests/arm64/signal/.gitignore b/tools/testing/selftests/arm64/signal/.gitignore
>>> new file mode 100644
>>> index 000000000000..434f65c15f03
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/.gitignore
>>> @@ -0,0 +1,6 @@
>>> +# Helper script's internal testcases list (TPROGS) is regenerated
>>> +# each time by Makefile on standalone (non KSFT driven) runs.
>>> +# Committing such list creates a dependency between testcases
>>> +# patches such that they are no more easily revertable. Just ignore.
>>> +test_arm64_signals.src_shell
>>> +test_arm64_signals.sh
>>> diff --git a/tools/testing/selftests/arm64/signal/Makefile b/tools/testing/selftests/arm64/signal/Makefile
>>> new file mode 100644
>>> index 000000000000..8c8d08be4b0d
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/Makefile
>>> @@ -0,0 +1,88 @@
>>> +# SPDX-License-Identifier: GPL-2.0
>>> +# Copyright (C) 2019 ARM Limited
>>> +
>>> +# Supports also standalone invokation out of KSFT-tree
>>> +# Compile standalone and run on your device with:
>>> +#
>>> +# $ make -C tools/testing/selftests/arm64/signal INSTALL_PATH=<your-dir> install
>>> +#
>>> +# Run standalone on device with:
>>> +#
>>> +# $ <your-device-instdir>/test_arm64_signals.sh [-k|-v]
>>> +#
>>> +# If INSTALL_PATH= is NOT provided it will default to ./install
>>> +
>>> +# A proper top_srcdir is needed both by KSFT(lib.mk)
>>> +# and standalone builds
>>> +top_srcdir = ../../../../..
>>> +
>>> +CFLAGS += -std=gnu99 -I. -I$(top_srcdir)/tools/testing/selftests/
>>> +SRCS := $(filter-out testcases/testcases.c,$(wildcard testcases/*.c))
>>> +PROGS := $(patsubst %.c,%,$(SRCS))
>>> +
>>> +# Guessing as best as we can where the Kernel headers
>>> +# could have been installed depending on ENV config and
>>> +# type of invocation.
>>> +ifeq ($(KBUILD_OUTPUT),)
>>> +khdr_dir = $(top_srcdir)/usr/include
>>> +else
>>> +ifeq (0,$(MAKELEVEL))
>>> +khdr_dir = $(KBUILD_OUTPUT)/usr/include
>>> +else
>>> +# the KSFT preferred location when KBUILD_OUTPUT is set
>>> +khdr_dir = $(KBUILD_OUTPUT)/kselftest/usr/include
>>> +endif
>>> +endif
>>> +
>>> +CFLAGS += -I$(khdr_dir)
>>> +
>>> +# Standalone run
>>> +ifeq (0,$(MAKELEVEL))
>>> +CC := $(CROSS_COMPILE)gcc
>>> +RUNNER_SRC = test_arm64_signals.src_shell
>>> +RUNNER = test_arm64_signals.sh
Is this extra level of copying test_arm64_signals.src_shell to
test_arm64_signals.sh required? I cannot see them in other selftests.
Also if done then clean may be required. May be EXTRA_CLEAN parameter
can be used as done for other selftests.
>>> +INSTALL_PATH ?= install/
Here default INSTALL_PATH should be just "install" as it may insert "/"
twice for below install case.
>>> +
>>> +all: $(RUNNER)
>>> +
>>> +$(RUNNER): $(PROGS)
>>> + cp $(RUNNER_SRC) $(RUNNER)
>>> + sed -i -e 's#PROGS=.*#PROGS="$(PROGS)"#' $@
>>> +
>>> +install: all
>>> + mkdir -p $(INSTALL_PATH)/testcases
>>> + cp $(PROGS) $(INSTALL_PATH)/testcases
>>> + cp $(RUNNER) $(INSTALL_PATH)/
>>> +
>>> +.PHONY clean:
>>> + rm -f $(PROGS)
>>> +# KSFT run
>>> +else
>>> +# Generated binaries to be installed by top KSFT script
>>> +TEST_GEN_PROGS := $(notdir $(PROGS))
>>> +
>>> +# Get Kernel headers installed and use them.
>>> +KSFT_KHDR_INSTALL := 1
>>> +
>>> +# This include mk will also mangle the TEST_GEN_PROGS list
>>> +# to account for any OUTPUT target-dirs optionally provided
>>> +# by the toplevel makefile
>>> +include ../../lib.mk
>>> +
>>> +$(TEST_GEN_PROGS): $(PROGS)
>>> + cp $(PROGS) $(OUTPUT)/
I guess this copy requires cleaning too.
>>> +
>>> +clean:
>>> + $(CLEAN)
>>> + rm -f $(PROGS)
Is clean requires to clean installed programs also?
>>> +endif
>>> +
>>> +# Common test-unit targets to build common-layout test-cases executables
>>> +# Needs secondary expansion to properly include the testcase c-file in pre-reqs
>>> +.SECONDEXPANSION:
>>> +$(PROGS): test_signals.c test_signals_utils.c testcases/testcases.c $$@.c test_signals.h test_signals_utils.h testcases/testcases.h
>>
>> I suppose *.h can be removed from the targets here.
>
> *.h are in the pre-reqs, $(PROGS) represent the targets and it's comprised by the *.c file contained in testcases/ (excluding testcases.c)
>
> If I remove the *.h from this rule, targets won't be rebuilt when headers are changed (like after having added an hypotethical inline)...
>
> or am I missing something else ?
Yes You are right.
Thanks,
Amit Daniel
>
>
>>
>>
>>> + @if [ ! -d $(khdr_dir) ]; then \
>>> + echo -n "\n!!! WARNING: $(khdr_dir) NOT FOUND."; \
>>> + echo "===> Are you sure Kernel Headers have been installed properly ?\n"; \
>>> + fi
>>> + $(CC) $(CFLAGS) $^ -o $@
>>> diff --git a/tools/testing/selftests/arm64/signal/README b/tools/testing/selftests/arm64/signal/README
>>> new file mode 100644
>>> index 000000000000..53f005f7910a
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/README
>>> @@ -0,0 +1,59 @@
>>> +KSelfTest arm64/signal/
>>> +=======================
>>> +
>>> +Signals Tests
>>> ++++++++++++++
>>> +
>>> +- Tests are built around a common main compilation unit: such shared main
>>> + enforces a standard sequence of operations needed to perform a single
>>> + signal-test (setup/trigger/run/result/cleanup)
>>> +
>>> +- The above mentioned ops are configurable on a test-by-test basis: each test
>>> + is described (and configured) using the descriptor signals.h::struct tdescr
>>> +
>>> +- Each signal testcase is compiled into its own executable: a separate
>>> + executable is used for each test since many tests complete successfully
>>> + by receiving some kind of fatal signal from the Kernel, so it's safer
>>> + to run each test unit in its own standalone process, so as to start each
>>> + test from a clean slate.
>>> +
>>> +- New tests can be simply defined in testcases/ dir providing a proper struct
>>> + tdescr overriding all the defaults we wish to change (as of now providing a
>>> + custom run method is mandatory though)
>>> +
>>> +- Signals' test-cases hereafter defined belong currently to two
>>> + principal families:
>>> +
>>> + - 'mangle_' tests: a real signal (SIGUSR1) is raised and used as a trigger
>>> + and then the test case code messes-up with the sigframe ucontext_t from
>>> + inside the sighandler itself.
>>> +
>>> + - 'fake_sigreturn_' tests: a brand new custom artificial sigframe structure
>>> + is placed on the stack and a sigreturn syscall is called to simulate a
>>> + real signal return. This kind of tests does not use a trigger usually and
>>> + they are just fired using some simple included assembly trampoline code.
>>> +
>>> + - Most of these tests are successfully passing if the process gets killed by
>>> + some fatal signal: usually SIGSEGV or SIGBUS. Since while writing this
>>> + kind of tests it is extremely easy in fact to end-up injecting other
>>> + unrelated SEGV bugs in the testcases, it becomes extremely tricky to
>>> + be really sure that the tests are really addressing what they are meant
>>> + to address and they are not instead falling apart due to unplanned bugs
>>> + in the test code.
>>> + In order to alleviate the misery of the life of such test-developer, a few
>>> + helpers are provided:
>>> +
>>> + - a couple of ASSERT_BAD/GOOD_CONTEXT() macros to easily parse a ucontext_t
>>> + and verify if it is indeed GOOD or BAD (depending on what we were
>>> + expecting), using the same logic/perspective as in the arm64 Kernel signals
>>> + routines.
>>> +
>>> + - a sanity mechanism to be used in 'fake_sigreturn_'-alike tests: enabled by
>>> + default it takes care to verify that the test-execution had at least
>>> + successfully progressed up to the stage of triggering the fake sigreturn
>>> + call.
>>> +
>>> + In both cases test results are expected in terms of:
>>> + - some fatal signal sent by the Kernel to the test process
>>> + or
>>> + - analyzing some final regs state
>>> diff --git a/tools/testing/selftests/arm64/signal/test_arm64_signals.src_shell b/tools/testing/selftests/arm64/signal/test_arm64_signals.src_shell
>>> new file mode 100755
>>> index 000000000000..163e941e2997
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/test_arm64_signals.src_shell
>>> @@ -0,0 +1,55 @@
>>> +#!/bin/sh
>>> +# SPDX-License-Identifier: GPL-2.0
>>> +# Copyright (C) 2019 ARM Limited
>>> +
>>> +ret=0
>>> +keep_on_fail=0
>>> +err_out="2> /dev/null"
>>> +
>>> +usage() {
>>> + echo "Usage: `basename $0` [-v] [-k]"
>>> + exit 1
>>> +}
>>> +
>>> +# avoiding getopt to avoid compatibility issues on targets
>>> +# with limited resources
>>> +while [ $# -gt 0 ]
>>> +do
>>> + case $1 in
>>> + "-k")
>>> + keep_on_fail=1
>>> + ;;
>>> + "-v")
>>> + err_out=
>>> + ;;
>>> + *)
>>> + usage
>>> + ;;
>>> + esac
>>> + shift
>>> +done
>>> +
>>> +TPROGS=
>>> +
>>> +tot=$(echo $TPROGS | wc -w)
>>> +
>>> +# Tests are expected in testcases/ subdir inside the installation path
>>> +workdir="`dirname $0 2>/dev/null`"
>>> +[ -n $workdir ] && cd $workdir
>>> +
>>> +passed=0
>>> +run=0
>>> +for test in $TPROGS
>>> +do
>>> + run=$((run + 1))
>>> + eval ./$test $err_out
>>> + if [ $? != 0 ]; then
>>> + [ $keep_on_fail = 0 ] && echo "===>>> FAILED:: $test <<<===" && ret=1 && break
>>> + else
>>> + passed=$((passed + 1))
>>> + fi
>>> +done
>>> +
>>> +echo "==>> PASSED: $passed/$run on $tot available tests."
>>> +
>>> +exit $ret
>>> diff --git a/tools/testing/selftests/arm64/signal/test_signals.c b/tools/testing/selftests/arm64/signal/test_signals.c
>>> new file mode 100644
>>> index 000000000000..3447d7011aec
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/test_signals.c
>>> @@ -0,0 +1,26 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/* Copyright (C) 2019 ARM Limited */
>>> +
>>> +#include <kselftest.h>
>>> +
>>> +#include "test_signals.h"
>>> +#include "test_signals_utils.h"
>>> +
>>> +struct tdescr *current;
>>> +extern struct tdescr tde;
>>> +
>>> +int main(int argc, char *argv[])
>>> +{
>>> + current = &tde;
>>> +
>>> + ksft_print_msg("%s :: %s - SIG_TRIG:%d SIG_OK:%d -- current:%p\n",
>>> + current->name, current->descr, current->sig_trig,
>>> + current->sig_ok, current);
>>> + if (test_setup(current)) {
>>> + if (test_run(current))
>>> + test_result(current);
>>> + test_cleanup(current);
>>> + }
>>> +
>>> + return current->pass ? KSFT_PASS : KSFT_FAIL;
>>> +}
>>> diff --git a/tools/testing/selftests/arm64/signal/test_signals.h b/tools/testing/selftests/arm64/signal/test_signals.h
>>> new file mode 100644
>>> index 000000000000..85db3ac44b32
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/test_signals.h
>>> @@ -0,0 +1,137 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/* Copyright (C) 2019 ARM Limited */
>>> +
>>> +#ifndef __TEST_SIGNALS_H__
>>> +#define __TEST_SIGNALS_H__
>>> +
>>> +#include <assert.h>
>>> +#include <stdbool.h>
>>> +#include <signal.h>
>>> +#include <ucontext.h>
>>> +#include <stdint.h>
>> Headers can be added in alphabetically order.
>>
> Ok I'll do.
>
> Cheers
>
> Cristian
>
>> Thanks,
>> Amit D
>>> +
>>> +/*
>>> + * Using ARCH specific and sanitized Kernel headers installed by KSFT
>>> + * framework since we asked for it by setting flag KSFT_KHDR_INSTALL
>>> + * in our Makefile.
>>> + */
>>> +#include <asm/ptrace.h>
>>> +#include <asm/hwcap.h>
>>> +
>>> +/* pasted from include/linux/stringify.h */
>>> +#define __stringify_1(x...) #x
>>> +#define __stringify(x...) __stringify_1(x)
>>> +
>>> +/*
>>> + * Reads a sysreg using the, possibly provided, S3_ encoding in order to
>>> + * avoid inject any dependency on the used toolchain regarding possibly
>>> + * still unsupported ARMv8 extensions.
>>> + *
>>> + * Using a standard mnemonic here to indicate the specific sysreg (like SSBS)
>>> + * would introduce a compile-time dependency on possibly unsupported ARMv8
>>> + * Extensions: you could end-up failing to build the test depending on the
>>> + * available toolchain.
>>> + * This is undesirable since some tests, even if specifically targeted at some
>>> + * ARMv8 Extensions, can be plausibly run even on hardware lacking the above
>>> + * optional ARM features. (SSBS bit preservation is an example: Kernel handles
>>> + * it transparently not caring at all about the effective set of supported
>>> + * features).
>>> + * On the other side we will expect to observe different behaviours if the
>>> + * feature is supported or not: usually getting a SIGILL when trying to use
>>> + * unsupported features. For this reason we have anyway in place some
>>> + * preliminary run-time checks about the cpu effectively supported features.
>>> + *
>>> + * This helper macro is meant to be used for regs readable at EL0, BUT some
>>> + * EL1 sysregs are indeed readable too through MRS emulation Kernel-mechanism
>>> + * if the required reg is included in the supported encoding space:
>>> + *
>>> + * Documentation/arm64/cpu-feature-regsiters.txt
>>> + *
>>> + * "The infrastructure emulates only the following system register space:
>>> + * Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7
>>> + */
>>> +#define get_regval(regname, out) \
>>> + asm volatile("mrs %0, " __stringify(regname) : "=r" (out) :: "memory")
>>> +
>>> +/* Regs encoding and masks naming copied in from sysreg.h */
>>> +#define SYS_ID_AA64MMFR1_EL1 S3_0_C0_C7_1 /* MRS Emulated */
>>> +#define SYS_ID_AA64MMFR2_EL1 S3_0_C0_C7_2 /* MRS Emulated */
>>> +#define ID_AA64MMFR1_PAN_SHIFT 20
>>> +#define ID_AA64MMFR2_UAO_SHIFT 4
>>> +
>>> +/* Local Helpers */
>>> +#define IS_PAN_SUPPORTED(val) \
>>> + (!!((val) & (0xfUL << ID_AA64MMFR1_PAN_SHIFT)))
>>> +#define IS_UAO_SUPPORTED(val) \
>>> + (!!((val) & (0xfUL << ID_AA64MMFR2_UAO_SHIFT)))
>>> +
>>> +#define S3_MRS_SSBS_SYSREG S3_3_C4_C2_6 /* EL0 supported */
>>> +
>>> +/*
>>> + * Feature flags used in tdescr.feats_required to specify
>>> + * any feature by the test
>>> + */
>>> +enum {
>>> + FSSBS_BIT,
>>> + FPAN_BIT,
>>> + FUAO_BIT,
>>> + FMAX_END
>>> +};
>>> +
>>> +#define FEAT_SSBS (1UL << FSSBS_BIT)
>>> +#define FEAT_PAN (1UL << FPAN_BIT)
>>> +#define FEAT_UAO (1UL << FUAO_BIT)
>>> +
>>> +/*
>>> + * A descriptor used to describe and configure a test case.
>>> + * Fields with a non-trivial meaning are described inline in the following.
>>> + */
>>> +struct tdescr {
>>> + /* KEEP THIS FIELD FIRST for easier lookup from assembly */
>>> + void *token;
>>> + /* when disabled token based sanity checking is skipped in handler */
>>> + bool sanity_disabled;
>>> + /* just a name for the test-case; manadatory field */
>>> + char *name;
>>> + char *descr;
>>> + unsigned long feats_required;
>>> + /* bitmask of effectively supported feats: populated at run-time */
>>> + unsigned long feats_supported;
>>> + bool feats_ok;
>>> + bool initialized;
>>> + unsigned int minsigstksz;
>>> + /* signum used as a test trigger. Zero if no trigger-signal is used */
>>> + int sig_trig;
>>> + /*
>>> + * signum considered as a successful test completion.
>>> + * Zero when no signal is expected on success
>>> + */
>>> + int sig_ok;
>>> + /* signum expected on unsupported CPU features. */
>>> + int sig_unsupp;
>>> + /* a timeout in second for test completion */
>>> + unsigned int timeout;
>>> + bool triggered;
>>> + bool pass;
>>> + /* optional sa_flags for the installed handler */
>>> + int sa_flags;
>>> + ucontext_t saved_uc;
>>> +
>>> + /* a setup function to be called before test starts */
>>> + int (*setup)(struct tdescr *td);
>>> + void (*cleanup)(struct tdescr *td);
>>> +
>>> + /* an optional function to be used as a trigger for test starting */
>>> + int (*trigger)(struct tdescr *td);
>>> + /*
>>> + * the actual test-core: invoked differently depending on the
>>> + * presence of the trigger function above; this is mandatory
>>> + */
>>> + int (*run)(struct tdescr *td, siginfo_t *si, ucontext_t *uc);
>>> +
>>> + /* an optional function for custom results' processing */
>>> + void (*check_result)(struct tdescr *td);
>>> +
>>> + void *priv;
>>> +};
>>> +#endif
>>> diff --git a/tools/testing/selftests/arm64/signal/test_signals_utils.c b/tools/testing/selftests/arm64/signal/test_signals_utils.c
>>> new file mode 100644
>>> index 000000000000..ac0055f6340b
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/test_signals_utils.c
>>> @@ -0,0 +1,261 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/* Copyright (C) 2019 ARM Limited */
>>> +
>>> +#include <stdio.h>
>>> +#include <stdlib.h>
>>> +#include <signal.h>
>>> +#include <string.h>
>>> +#include <unistd.h>
>>> +#include <assert.h>
>>> +#include <sys/auxv.h>
>>> +#include <linux/auxvec.h>
>>> +#include <ucontext.h>
>>> +
>>> +#include "test_signals.h"
>>> +#include "test_signals_utils.h"
>>> +#include "testcases/testcases.h"
>>> +
>>> +extern struct tdescr *current;
>>> +
>>> +static char *feats_store[FMAX_END] = {
>>> + "SSBS",
>>> + "PAN",
>>> + "UAO"
>>> +};
>>> +
>>> +#define MAX_FEATS_SZ 128
>>> +static inline char *feats_to_string(unsigned long feats)
>>> +{
>>> + static char feats_string[MAX_FEATS_SZ];
>>> +
>>> + for (int i = 0; i < FMAX_END && feats_store[i][0]; i++) {
>>> + if (feats & 1UL << i)
>>> + snprintf(feats_string, MAX_FEATS_SZ - 1, "%s %s ",
>>> + feats_string, feats_store[i]);
>>> + }
>>> +
>>> + return feats_string;
>>> +}
>>> +
>>> +static void unblock_signal(int signum)
>>> +{
>>> + sigset_t sset;
>>> +
>>> + sigemptyset(&sset);
>>> + sigaddset(&sset, signum);
>>> + sigprocmask(SIG_UNBLOCK, &sset, NULL);
>>> +}
>>> +
>>> +static void default_result(struct tdescr *td, bool force_exit)
>>> +{
>>> + if (td->pass)
>>> + fprintf(stderr, "==>> completed. PASS(1)\n");
>>> + else
>>> + fprintf(stdout, "==>> completed. FAIL(0)\n");
>>> + if (force_exit)
>>> + exit(td->pass ? EXIT_SUCCESS : EXIT_FAILURE);
>>> +}
>>> +
>>> +static inline bool are_feats_ok(struct tdescr *td)
>>> +{
>>> + return td ? td->feats_required == td->feats_supported : 0;
>>> +}
>>> +
>>> +static void default_handler(int signum, siginfo_t *si, void *uc)
>>> +{
>>> + if (current->sig_trig && signum == current->sig_trig) {
>>> + fprintf(stderr, "Handling SIG_TRIG\n");
>>> + current->triggered = 1;
>>> + /* ->run was asserted NON-NULL in test_setup() already */
>>> + current->run(current, si, uc);
>>> + } else if (signum == SIGILL && !current->initialized) {
>>> + /*
>>> + * A SIGILL here while still not initialized means we failed
>>> + * even to asses the existence of features during init
>>> + */
>>> + fprintf(stdout,
>>> + "Got SIGILL test_init. Marking ALL features UNSUPPORTED.\n");
>>> + current->feats_supported = 0;
>>> + } else if (current->sig_ok && signum == current->sig_ok) {
>>> + /* it's a bug in the test code when this assert fail */
>>> + assert(!current->sig_trig || current->triggered);
>>> + fprintf(stderr,
>>> + "SIG_OK -- SP:%p si_addr@:0x%p si_code:%d token@:0x%p offset:%ld\n",
>>> + ((ucontext_t *)uc)->uc_mcontext.sp,
>>> + si->si_addr, si->si_code, current->token,
>>> + current->token - si->si_addr);
>>> + /*
>>> + * fake_sigreturn tests, which have sanity_enabled=1, set, at
>>> + * the very last time, the token field to the SP address used
>>> + * to place the fake sigframe: so token==0 means we never made
>>> + * it to the end, segfaulting well-before, and the test is
>>> + * possibly broken.
>>> + */
>>> + if (!current->sanity_disabled && !current->token) {
>>> + fprintf(stdout,
>>> + "current->token ZEROED...test is probably broken!\n");
>>> + assert(0);
>>> + }
>>> + /*
>>> + * Trying to narrow down the SEGV to the ones generated by
>>> + * Kernel itself via arm64_notify_segfault()
>>> + */
>>> + if (current->sig_ok == SIGSEGV && si->si_code != SEGV_ACCERR) {
>>> + fprintf(stdout,
>>> + "si_code != SEGV_ACCERR...test is probably broken!\n");
>>> + assert(0);
>>> + }
>>> + fprintf(stderr, "Handling SIG_OK\n");
>>> + current->pass = 1;
>>> + /*
>>> + * Some tests can lead to SEGV loops: in such a case we want
>>> + * to terminate immediately exiting straight away
>>> + */
>>> + default_result(current, 1);
>>> + } else {
>>> + if (signum == current->sig_unsupp && !are_feats_ok(current)) {
>>> + fprintf(stderr, "-- RX SIG_UNSUPP on unsupported feature...OK\n");
>>> + current->pass = 1;
>>> + } else if (signum == SIGALRM && current->timeout) {
>>> + fprintf(stderr, "-- Timeout !\n");
>>> + } else {
>>> + fprintf(stderr,
>>> + "-- RX UNEXPECTED SIGNAL: %d\n", signum);
>>> + }
>>> + default_result(current, 1);
>>> + }
>>> +}
>>> +
>>> +static int default_setup(struct tdescr *td)
>>> +{
>>> + struct sigaction sa;
>>> +
>>> + sa.sa_sigaction = default_handler;
>>> + sa.sa_flags = SA_SIGINFO;
>>> + if (td->sa_flags)
>>> + sa.sa_flags |= td->sa_flags;
>>> + sigemptyset(&sa.sa_mask);
>>> + /* uncatchable signals naturally skipped ... */
>>> + for (int sig = 1; sig < 32; sig++)
>>> + sigaction(sig, &sa, NULL);
>>> + /*
>>> + * RT Signals default disposition is Term but they cannot be
>>> + * generated by the Kernel in response to our tests; so just catch
>>> + * them all and report them as UNEXPECTED signals.
>>> + */
>>> + for (int sig = SIGRTMIN; sig <= SIGRTMAX; sig++)
>>> + sigaction(sig, &sa, NULL);
>>> +
>>> + /* just in case...unblock explicitly all we need */
>>> + if (td->sig_trig)
>>> + unblock_signal(td->sig_trig);
>>> + if (td->sig_ok)
>>> + unblock_signal(td->sig_ok);
>>> + if (td->sig_unsupp)
>>> + unblock_signal(td->sig_unsupp);
>>> +
>>> + if (td->timeout) {
>>> + unblock_signal(SIGALRM);
>>> + alarm(td->timeout);
>>> + }
>>> + fprintf(stderr, "Registered handlers for all signals.\n");
>>> +
>>> + return 1;
>>> +}
>>> +
>>> +static inline int default_trigger(struct tdescr *td)
>>> +{
>>> + return !raise(td->sig_trig);
>>> +}
>>> +
>>> +static int test_init(struct tdescr *td)
>>> +{
>>> + td->minsigstksz = getauxval(AT_MINSIGSTKSZ);
>>> + if (!td->minsigstksz)
>>> + td->minsigstksz = MINSIGSTKSZ;
>>> + fprintf(stderr, "Detected MINSTKSIGSZ:%d\n", td->minsigstksz);
>>> +
>>> + if (td->feats_required) {
>>> + bool feats_ok = false;
>>> + td->feats_supported = 0;
>>> + /*
>>> + * Checking for CPU required features using both the
>>> + * auxval and the arm64 MRS Emulation to read sysregs.
>>> + */
>>> + if (getauxval(AT_HWCAP) & HWCAP_CPUID) {
>>> + uint64_t val = 0;
>>> +
>>> + if (td->feats_required & FEAT_SSBS) {
>>> + /* Uses HWCAP to check capability */
>>> + if (getauxval(AT_HWCAP) & HWCAP_SSBS)
>>> + td->feats_supported |= FEAT_SSBS;
>>> + }
>>> + if (td->feats_required & FEAT_PAN) {
>>> + /* Uses MRS emulation to check capability */
>>> + get_regval(SYS_ID_AA64MMFR1_EL1, val);
>>> + if (IS_PAN_SUPPORTED(val))
>>> + td->feats_supported |= FEAT_PAN;
>>> + }
>>> + if (td->feats_required & FEAT_UAO) {
>>> + /* Uses MRS emulation to check capability */
>>> + get_regval(SYS_ID_AA64MMFR2_EL1 , val);
>>> + if (IS_UAO_SUPPORTED(val))
>>> + td->feats_supported |= FEAT_UAO;
>>> + }
>>> + } else {
>>> + fprintf(stderr,
>>> + "HWCAP_CPUID NOT available. Mark ALL feats UNSUPPORTED.\n");
>>> + }
>>> + feats_ok = are_feats_ok(td);
>>> + fprintf(stderr,
>>> + "Required Features: [%s] %ssupported\n",
>>> + feats_ok ? feats_to_string(td->feats_supported) :
>>> + feats_to_string(td->feats_required ^ td->feats_supported),
>>> + !feats_ok ? "NOT " : "");
>>> + }
>>> +
>>> + td->initialized = 1;
>>> + return 1;
>>> +}
>>> +
>>> +int test_setup(struct tdescr *td)
>>> +{
>>> + /* assert core invariants symptom of a rotten testcase */
>>> + assert(current);
>>> + assert(td);
>>> + assert(td->name);
>>> + assert(td->run);
>>> +
>>> + if (!test_init(td))
>>> + return 0;
>>> +
>>> + if (td->setup)
>>> + return td->setup(td);
>>> + else
>>> + return default_setup(td);
>>> +}
>>> +
>>> +int test_run(struct tdescr *td)
>>> +{
>>> + if (td->sig_trig) {
>>> + if (td->trigger)
>>> + return td->trigger(td);
>>> + else
>>> + return default_trigger(td);
>>> + } else {
>>> + return td->run(td, NULL, NULL);
>>> + }
>>> +}
>>> +
>>> +void test_result(struct tdescr *td)
>>> +{
>>> + if (td->check_result)
>>> + td->check_result(td);
>>> + default_result(td, 0);
>>> +}
>>> +
>>> +void test_cleanup(struct tdescr *td)
>>> +{
>>> + if (td->cleanup)
>>> + td->cleanup(td);
>>> +}
>>> diff --git a/tools/testing/selftests/arm64/signal/test_signals_utils.h b/tools/testing/selftests/arm64/signal/test_signals_utils.h
>>> new file mode 100644
>>> index 000000000000..8658d1a7d4b9
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/test_signals_utils.h
>>> @@ -0,0 +1,13 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/* Copyright (C) 2019 ARM Limited */
>>> +
>>> +#ifndef __TEST_SIGNALS_UTILS_H__
>>> +#define __TEST_SIGNALS_UTILS_H__
>>> +
>>> +#include "test_signals.h"
>>> +
>>> +int test_setup(struct tdescr *td);
>>> +void test_cleanup(struct tdescr *td);
>>> +int test_run(struct tdescr *td);
>>> +void test_result(struct tdescr *td);
>>> +#endif
>>> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>>> new file mode 100644
>>> index 000000000000..8651272e3cfc
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>>> @@ -0,0 +1 @@
>>> +mangle_pstate_invalid_compat_toggle
>>> diff --git a/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_compat_toggle.c b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_compat_toggle.c
>>> new file mode 100644
>>> index 000000000000..971193e7501b
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/testcases/mangle_pstate_invalid_compat_toggle.c
>>> @@ -0,0 +1,25 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/* Copyright (C) 2019 ARM Limited */
>>> +
>>> +#include "test_signals_utils.h"
>>> +#include "testcases.h"
>>> +
>>> +static int mangle_invalid_pstate_run(struct tdescr *td, siginfo_t *si,
>>> + ucontext_t *uc)
>>> +{
>>> + ASSERT_GOOD_CONTEXT(uc);
>>> +
>>> + /* This config should trigger a SIGSEGV by Kernel */
>>> + uc->uc_mcontext.pstate ^= PSR_MODE32_BIT;
>>> +
>>> + return 1;
>>> +}
>>> +
>>> +struct tdescr tde = {
>>> + .sanity_disabled = true,
>>> + .name = "MANGLE_PSTATE_INVALID_STATE_TOGGLE",
>>> + .descr = "Mangling uc_mcontext with INVALID STATE_TOGGLE",
>>> + .sig_trig = SIGUSR1,
>>> + .sig_ok = SIGSEGV,
>>> + .run = mangle_invalid_pstate_run,
>>> +};
>>> diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.c b/tools/testing/selftests/arm64/signal/testcases/testcases.c
>>> new file mode 100644
>>> index 000000000000..a59785092e1f
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.c
>>> @@ -0,0 +1,150 @@
>>> +#include "testcases.h"
>>> +
>>> +struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic,
>>> + size_t resv_sz, size_t *offset)
>>> +{
>>> + size_t offs = 0;
>>> + struct _aarch64_ctx *found = NULL;
>>> +
>>> + if (!head || resv_sz < HDR_SZ)
>>> + return found;
>>> +
>>> + do {
>>> + if (head->magic == magic) {
>>> + found = head;
>>> + break;
>>> + }
>>> + offs += head->size;
>>> + head = GET_RESV_NEXT_HEAD(head);
>>> + } while (offs < resv_sz - HDR_SZ);
>>> +
>>> + if (offset)
>>> + *offset = offs;
>>> +
>>> + return found;
>>> +}
>>> +
>>> +bool validate_extra_context(struct extra_context *extra, char **err)
>>> +{
>>> + struct _aarch64_ctx *term;
>>> +
>>> + if (!extra || !err)
>>> + return false;
>>> +
>>> + fprintf(stderr, "Validating EXTRA...\n");
>>> + term = GET_RESV_NEXT_HEAD(extra);
>>> + if (!term || term->magic || term->size) {
>>> + *err = "UN-Terminated EXTRA context";
>>> + return false;
>>> + }
>>> + if (extra->datap & 0x0fUL)
>>> + *err = "Extra DATAP misaligned";
>>> + else if (extra->size & 0x0fUL)
>>> + *err = "Extra SIZE misaligned";
>>> + else if (extra->datap != (uint64_t)term + sizeof(*term))
>>> + *err = "Extra DATAP misplaced (not contiguos)";
>>> + if (*err)
>>> + return false;
>>> +
>>> + return true;
>>> +}
>>> +
>>> +bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err)
>>> +{
>>> + bool terminated = false;
>>> + size_t offs = 0;
>>> + int flags = 0;
>>> + struct extra_context *extra = NULL;
>>> + struct _aarch64_ctx *head =
>>> + (struct _aarch64_ctx *)uc->uc_mcontext.__reserved;
>>> +
>>> + if (!err)
>>> + return false;
>>> + /* Walk till the end terminator verifying __reserved contents */
>>> + while (head && !terminated && offs < resv_sz) {
>>> + if ((uint64_t)head & 0x0fUL) {
>>> + *err = "Misaligned HEAD";
>>> + return false;
>>> + }
>>> +
>>> + switch (head->magic) {
>>> + case 0:
>>> + if (head->size)
>>> + *err = "Bad size for MAGIC0";
>>> + else
>>> + terminated = true;
>>> + break;
>>> + case FPSIMD_MAGIC:
>>> + if (flags & FPSIMD_CTX)
>>> + *err = "Multiple FPSIMD_MAGIC";
>>> + else if (head->size !=
>>> + sizeof(struct fpsimd_context))
>>> + *err = "Bad size for fpsimd_context";
>>> + flags |= FPSIMD_CTX;
>>> + break;
>>> + case ESR_MAGIC:
>>> + if (head->size != sizeof(struct esr_context))
>>> + fprintf(stderr,
>>> + "Bad size for esr_context is not an error...just ignore.\n");
>>> + break;
>>> + case SVE_MAGIC:
>>> + if (flags & SVE_CTX)
>>> + *err = "Multiple SVE_MAGIC";
>>> + else if (head->size !=
>>> + sizeof(struct sve_context))
>>> + *err = "Bad size for sve_context";
>>> + flags |= SVE_CTX;
>>> + break;
>>> + case EXTRA_MAGIC:
>>> + if (flags & EXTRA_CTX)
>>> + *err = "Multiple EXTRA_MAGIC";
>>> + else if (head->size !=
>>> + sizeof(struct extra_context))
>>> + *err = "Bad size for extra_context";
>>> + flags |= EXTRA_CTX;
>>> + extra = (struct extra_context *)head;
>>> + break;
>>> + case KSFT_BAD_MAGIC:
>>> + /*
>>> + * This is a BAD magic header defined
>>> + * artificially by a testcase and surely
>>> + * unknown to the Kernel parse_user_sigframe().
>>> + * It MUST cause a Kernel induced SEGV
>>> + */
>>> + *err = "BAD MAGIC !";
>>> + break;
>>> + default:
>>> + /*
>>> + * A still unknown Magic: potentially freshly added
>>> + * to the Kernel code and still unknown to the
>>> + * tests.
>>> + */
>>> + fprintf(stdout,
>>> + "SKIP Unknown MAGIC: 0x%X - Is KSFT arm64/signal up to date ?\n",
>>> + head->magic);
>>> + break;
>>> + }
>>> +
>>> + if (*err)
>>> + return false;
>>> +
>>> + offs += head->size;
>>> + if (resv_sz - offs < sizeof(*head)) {
>>> + *err = "HEAD Overrun";
>>> + return false;
>>> + }
>>> +
>>> + if (flags & EXTRA_CTX)
>>> + if (!validate_extra_context(extra, err))
>>> + return false;
>>> +
>>> + head = GET_RESV_NEXT_HEAD(head);
>>> + }
>>> +
>>> + if (terminated && !(flags & FPSIMD_CTX)) {
>>> + *err = "Missing FPSIMD";
>>> + return false;
>>> + }
>>> +
>>> + return true;
>>> +}
>>> diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.h b/tools/testing/selftests/arm64/signal/testcases/testcases.h
>>> new file mode 100644
>>> index 000000000000..624717c71b1d
>>> --- /dev/null
>>> +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.h
>>> @@ -0,0 +1,83 @@
>>> +#ifndef __TESTCASES_H__
>>> +#define __TESTCASES_H__
>>> +
>>> +#include <stdio.h>
>>> +#include <stdbool.h>
>>> +#include <stdint.h>
>>> +#include <unistd.h>
>>> +#include <ucontext.h>
>>> +#include <assert.h>
>>> +
>>> +/* Architecture specific sigframe definitions */
>>> +#include <asm/sigcontext.h>
>>> +
>>> +#define FPSIMD_CTX (1 << 0)
>>> +#define SVE_CTX (1 << 1)
>>> +#define EXTRA_CTX (1 << 2)
>>> +
>>> +#define KSFT_BAD_MAGIC 0xdeadbeef
>>> +
>>> +#define HDR_SZ \
>>> + sizeof(struct _aarch64_ctx)
>>> +
>>> +#define GET_SF_RESV_HEAD(sf) \
>>> + (struct _aarch64_ctx *)(&(sf).uc.uc_mcontext.__reserved)
>>> +
>>> +#define GET_SF_RESV_SIZE(sf) \
>>> + sizeof((sf).uc.uc_mcontext.__reserved)
>>> +
>>> +#define GET_UCP_RESV_SIZE(ucp) \
>>> + sizeof((ucp)->uc_mcontext.__reserved)
>>> +
>>> +#define ASSERT_BAD_CONTEXT(uc) do { \
>>> + char *err = NULL; \
>>> + assert(!validate_reserved((uc), GET_UCP_RESV_SIZE((uc)), &err));\
>>> + if (err) \
>>> + fprintf(stderr, \
>>> + "Using badly built context - ERR: %s\n", err); \
>>> +} while(0)
>>> +
>>> +#define ASSERT_GOOD_CONTEXT(uc) do { \
>>> + char *err = NULL; \
>>> + if (!validate_reserved((uc), GET_UCP_RESV_SIZE((uc)), &err)) { \
>>> + if (err) \
>>> + fprintf(stderr, \
>>> + "Detected BAD context - ERR: %s\n", err);\
>>> + assert(0); \
>>> + } else { \
>>> + fprintf(stderr, "uc context validated.\n"); \
>>> + } \
>>> +} while(0)
>>> +
>>> +/* head->size accounts both for payload and header _aarch64_ctx size ! */
>>> +#define GET_RESV_NEXT_HEAD(h) \
>>> + (struct _aarch64_ctx *)((char *)(h) + (h)->size)
>>> +
>>> +struct fake_sigframe {
>>> + siginfo_t info;
>>> + ucontext_t uc;
>>> +};
>>> +
>>> +
>>> +bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err);
>>> +
>>> +bool validate_extra_context(struct extra_context *extra, char **err);
>>> +
>>> +struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic,
>>> + size_t resv_sz, size_t *offset);
>>> +
>>> +static inline struct _aarch64_ctx *get_terminator(struct _aarch64_ctx *head,
>>> + size_t resv_sz,
>>> + size_t *offset)
>>> +{
>>> + return get_header(head, 0, resv_sz, offset);
>>> +}
>>> +
>>> +static inline void write_terminator_record(struct _aarch64_ctx *tail)
>>> +{
>>> + if (tail) {
>>> + tail->magic = 0;
>>> + tail->size = 0;
>>> + }
>>> +}
>>> +#endif
>>>
>
>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/3] serial: atmel: Don't check for mctrl_gpio_to_gpiod() returning error
From: Geert Uytterhoeven @ 2019-08-14 10:20 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Alexandre Belloni, Pengutronix Kernel Team, Geert Uytterhoeven,
open list:SERIAL DRIVERS, Richard Genoud, Greg Kroah-Hartman,
Sascha Hauer, Frieder Schrempf, Linux-Renesas, Ludovic Desroches,
NXP Linux Team, Fabio Estevam, Jiri Slaby, Shawn Guo, Linux ARM
In-Reply-To: <20190814093558.xlx5ck54dw2dgb6k@pengutronix.de>
Hi Uwe,
On Wed, Aug 14, 2019 at 11:36 AM Uwe Kleine-König
<u.kleine-koenig@pengutronix.de> wrote:
> On Wed, Aug 14, 2019 at 11:29:22AM +0200, Geert Uytterhoeven wrote:
> > Since commit 1d267ea6539f2663 ("serial: mctrl-gpio: simplify init
> > routine"), mctrl_gpio_init() returns failure if the assignment to any
> > member of the gpio array results in an error pointer.
> > Since commit c359522194593815 ("serial: mctrl_gpio: Avoid probe failures
> > in case of missing gpiolib"), mctrl_gpio_to_gpiod() returns NULL in the
> > !CONFIG_GPIOLIB case.
> > Hence there is no longer a need to check for mctrl_gpio_to_gpiod()
> > returning an error value. A simple NULL check is sufficient.
> >
> > This follows the spirit of commit 445df7ff3fd1a0a9 ("serial: mctrl-gpio:
> > drop usages of IS_ERR_OR_NULL") in the mctrl-gpio core.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > drivers/tty/serial/atmel_serial.c | 12 ++++--------
> > 1 file changed, 4 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> > index 19a85d6fe3d20541..e9620a81166b7dc1 100644
> > --- a/drivers/tty/serial/atmel_serial.c
> > +++ b/drivers/tty/serial/atmel_serial.c
> > @@ -303,32 +303,28 @@ static unsigned int atmel_get_lines_status(struct uart_port *port)
> >
> > mctrl_gpio_get(atmel_port->gpios, &ret);
> >
> > - if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
> > - UART_GPIO_CTS))) {
> > + if (mctrl_gpio_to_gpiod(atmel_port->gpios, UART_GPIO_CTS)) {
> > if (ret & TIOCM_CTS)
> > status &= ~ATMEL_US_CTS;
> > else
> > status |= ATMEL_US_CTS;
> > }
>
> The change is fine, but it seems the atmel driver doesn't use mctrl_gpio
> as expected (at least as expected by me). IMHO driving the hardware
> function of the CTS pin shouldn't be conditional on the presence of a
> cts-gpio. Is there a reason not to just drop the if completely?
The above code returns the hardware status if CTS is not a GPIO, and
returns (overrides with) the GPIO status if CTS is a GPIO.
Isn't that correct, or am I missing something?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
From: Lorenzo Pieralisi @ 2019-08-14 10:11 UTC (permalink / raw)
To: Xiaowei Bao
Cc: Roy Zang, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
M.h. Lian, linux-arm-kernel@lists.infradead.org,
bhelgaas@google.com, linuxppc-dev@lists.ozlabs.org, Mingkai Hu
In-Reply-To: <AM5PR04MB32994A55A2951DD071C19F66F5AD0@AM5PR04MB3299.eurprd04.prod.outlook.com>
On Wed, Aug 14, 2019 at 09:48:00AM +0000, Xiaowei Bao wrote:
>
>
> > -----Original Message-----
> > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Sent: 2019年8月14日 17:30
> > To: Xiaowei Bao <xiaowei.bao@nxp.com>
> > Cc: M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu
> > <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>;
> > bhelgaas@google.com; linuxppc-dev@lists.ozlabs.org;
> > linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property
> > in EP driver.
Do not quote the email header in your replies.
> > I asked you to remove the period at the end of the patch $SUBJECT and you
> > did not, either you do not read what I write or explain me what's going on.
> Sorry, I didn't understand the meaning of period correctly before.
> >
> > On Wed, Aug 14, 2019 at 10:03:29AM +0800, Xiaowei Bao wrote:
> > > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > > 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware, so set
> > > the bar_fixed_64bit with 0x14.
> > >
> > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> >
> > Kishon ACK'ed this patch and you have not carried his tag.
> >
> > I will make these changes but that's the last time I do that for you.
> Thanks a lot, your means is that I don't need to send the v7 patch and you help me to
> Correct this patch, yes? Thanks a lot for your help about the rules of the upstream. I will
> Correct this error next time. ^.^
I fixed that up and pushed out, pci/layerscape, for v5.4.
Thanks,
Lorenzo
> > Lorenzo
> >
> > > ---
> > > v2:
> > > - Replace value 0x14 with a macro.
> > > v3:
> > > - No change.
> > > v4:
> > > - send the patch again with '--to'.
> > > v5:
> > > - fix the commit message.
> > > v6:
> > > - remove the [EXT] tag of the $SUBJECT in email.
> > >
> > > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > index be61d96..ca9aa45 100644
> > > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > @@ -44,6 +44,7 @@ static const struct pci_epc_features
> > ls_pcie_epc_features = {
> > > .linkup_notifier = false,
> > > .msi_capable = true,
> > > .msix_capable = false,
> > > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > > };
> > >
> > > static const struct pci_epc_features*
> > > --
> > > 2.9.5
> > >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 1/4] arm64: dts: mt8183: add thermal zone node
From: Michael Kao @ 2019-08-14 10:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: devicetree, linux-pm, linux-kernel, michael.kao, linux-mediatek,
linux-arm-kernel
In-Reply-To: <1565777209-21869-1-git-send-email-michael.kao@mediatek.com>
From: "michael.kao" <michael.kao@mediatek.com>
Add thermal zone node to Mediatek MT8183 dts file.
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 67 ++++++++++++++++++++++++++++++++
1 file changed, 67 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index c2749c4..47bde49 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -372,6 +372,70 @@
status = "disabled";
};
+ thermal: thermal@1100b000 {
+ #thermal-sensor-cells = <1>;
+ compatible = "mediatek,mt8183-thermal";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_INFRA_THERM>,
+ <&infracfg CLK_INFRA_AUXADC>;
+ clock-names = "therm", "auxadc";
+ resets = <&infracfg MT8183_INFRACFG_AO_THERM_SW_RST>;
+ mediatek,auxadc = <&auxadc>;
+ mediatek,apmixedsys = <&apmixedsys>;
+ mediatek,hw-reset-temp = <117000>;
+ nvmem-cells = <&thermal_calibration>;
+ nvmem-cell-names = "calibration-data";
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu_thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <500>;
+ thermal-sensors = <&thermal 0>;
+ sustainable-power = <4500>;
+ };
+
+ /* The tzts1 ~ tzts6 don't need to polling */
+ /* The tzts1 ~ tzts6 don't need to thermal throttle */
+
+ tzts1: tzts1 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 1>;
+ };
+
+ tzts2: tzts2 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 2>;
+ };
+
+ tzts3: tzts3 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 3>;
+ };
+
+ tzts4: tzts4 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 4>;
+ };
+
+ tzts5: tzts5 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 5>;
+ };
+
+ tztsABB: tztsABB {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&thermal 6>;
+ };
+ };
+
audiosys: syscon@11220000 {
compatible = "mediatek,mt8183-audiosys", "syscon";
reg = <0 0x11220000 0 0x1000>;
@@ -382,6 +446,9 @@
compatible = "mediatek,mt8183-efuse",
"mediatek,efuse";
reg = <0 0x11f10000 0 0x1000>;
+ thermal_calibration: calib@180 {
+ reg = <0x180 0xc>;
+ };
};
mfgcfg: syscon@13000000 {
--
1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 4/4] arm64: dts: mt8183: Configure CPU cooling
From: Michael Kao @ 2019-08-14 10:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: devicetree, linux-pm, linux-kernel, Michael Kao,
Matthias Kaehlcke, linux-mediatek, linux-arm-kernel
In-Reply-To: <1565777209-21869-1-git-send-email-michael.kao@mediatek.com>
From: Matthias Kaehlcke <mka@chromium.org>
Add SoC temperature threshold at 68°C and target at 80°C.
Add trip points and cooling maps for big and litter clusters.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 55 ++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index bc42b82..6611d29 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -411,6 +411,61 @@
polling-delay = <500>;
thermal-sensors = <&thermal 0>;
sustainable-power = <4500>;
+
+ trips {
+ threshold: trip-point@0 {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ target: trip-point@1 {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu-crit {
+ temperature = <115000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0
+ THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>,
+ <&cpu1
+ THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>,
+ <&cpu2
+ THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>,
+ <&cpu3
+ THERMAL_NO_LIMIT
+ THERMAL_NO_LIMIT>;
+ contribution = <3072>;
+ };
+ map1 {
+ trip = <&target>;
+ cooling-device = <&cpu4
+ THERMAL_NO_LIMIT
+ 14>,
+ <&cpu5
+ THERMAL_NO_LIMIT
+ 14>,
+ <&cpu6
+ THERMAL_NO_LIMIT
+ 14>,
+ <&cpu7
+ THERMAL_NO_LIMIT
+ 14>;
+ contribution = <1024>;
+ };
+ };
};
/* The tzts1 ~ tzts6 don't need to polling */
--
1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 3/4] arm64: dts: mt8183: Add #cooling-cells to CPU nodes
From: Michael Kao @ 2019-08-14 10:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: devicetree, linux-pm, linux-kernel, michael.kao, linux-mediatek,
linux-arm-kernel
In-Reply-To: <1565777209-21869-1-git-send-email-michael.kao@mediatek.com>
From: "michael.kao" <michael.kao@mediatek.com>
The #cooling-cells property needs to be specified to allow a CPU
to be used as cooling device.
Signed-off-by: michael.kao <michael.kao@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 9de706a..bc42b82 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "mt8183-pinfunc.h"
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "mediatek,mt8183";
@@ -59,6 +60,7 @@
enable-method = "psci";
capacity-dmips-mhz = <741>;
dynamic-power-coefficient = <84>;
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -68,6 +70,7 @@
enable-method = "psci";
capacity-dmips-mhz = <741>;
dynamic-power-coefficient = <84>;
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -77,6 +80,7 @@
enable-method = "psci";
capacity-dmips-mhz = <741>;
dynamic-power-coefficient = <84>;
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -86,6 +90,7 @@
enable-method = "psci";
capacity-dmips-mhz = <741>;
dynamic-power-coefficient = <84>;
+ #cooling-cells = <2>;
};
cpu4: cpu@100 {
@@ -95,6 +100,7 @@
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <211>;
+ #cooling-cells = <2>;
};
cpu5: cpu@101 {
@@ -104,6 +110,7 @@
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <211>;
+ #cooling-cells = <2>;
};
cpu6: cpu@102 {
@@ -113,6 +120,7 @@
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <211>;
+ #cooling-cells = <2>;
};
cpu7: cpu@103 {
@@ -122,6 +130,7 @@
enable-method = "psci";
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <211>;
+ #cooling-cells = <2>;
};
};
--
1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 2/4] arm64: dts: mt8183: add dynamic power coefficients
From: Michael Kao @ 2019-08-14 10:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: devicetree, linux-pm, linux-kernel, michael.kao, linux-mediatek,
linux-arm-kernel
In-Reply-To: <1565777209-21869-1-git-send-email-michael.kao@mediatek.com>
From: "michael.kao" <michael.kao@mediatek.com>
Add dynamic power coefficients for all cores.
Signed-off-by: michael.kao <michael.kao@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 47bde49..9de706a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -58,6 +58,7 @@
reg = <0x000>;
enable-method = "psci";
capacity-dmips-mhz = <741>;
+ dynamic-power-coefficient = <84>;
};
cpu1: cpu@1 {
@@ -66,6 +67,7 @@
reg = <0x001>;
enable-method = "psci";
capacity-dmips-mhz = <741>;
+ dynamic-power-coefficient = <84>;
};
cpu2: cpu@2 {
@@ -74,6 +76,7 @@
reg = <0x002>;
enable-method = "psci";
capacity-dmips-mhz = <741>;
+ dynamic-power-coefficient = <84>;
};
cpu3: cpu@3 {
@@ -82,6 +85,7 @@
reg = <0x003>;
enable-method = "psci";
capacity-dmips-mhz = <741>;
+ dynamic-power-coefficient = <84>;
};
cpu4: cpu@100 {
@@ -90,6 +94,7 @@
reg = <0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <211>;
};
cpu5: cpu@101 {
@@ -98,6 +103,7 @@
reg = <0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <211>;
};
cpu6: cpu@102 {
@@ -106,6 +112,7 @@
reg = <0x102>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <211>;
};
cpu7: cpu@103 {
@@ -114,6 +121,7 @@
reg = <0x103>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <211>;
};
};
--
1.9.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 0/4] add dts for Mediatek MT8183 thermal functions
From: Michael Kao @ 2019-08-14 10:06 UTC (permalink / raw)
To: Zhang Rui, Eduardo Valentin, Daniel Lezcano, Rob Herring,
Mark Rutland, Matthias Brugger, hsinyi
Cc: devicetree, linux-mediatek, linux-kernel, linux-arm-kernel,
linux-pm
Splitting the dtsi part from [1] and sending it again.
Add tzts1~5 and tztsABB from thermal sensor in SoC for
another get temperatrue. They don't need to thermal throttle.
And we bind coolers for thermal zone nodes of cpu_thermal.
Refernece:
[1] [v2,0/8] Add Mediatek thermal dirver and dtsi (https://patchwork.kernel.org/cover/10938809/)
Matthias Kaehlcke (1):
arm64: dts: mt8183: Configure CPU cooling
michael.kao (3):
arm64: dts: mt8183: add thermal zone node
arm64: dts: mt8183: add dynamic power coefficients
arm64: dts: mt8183: Add #cooling-cells to CPU nodes
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 139 +++++++++++++++++++++++++++++++
1 file changed, 139 insertions(+)
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v1] MAINTAINERS: i2c-imx: take over maintainership
From: Wolfram Sang @ 2019-08-14 10:02 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Aisheng Dong, Andrey Smirnov, Sascha Hauer,
Russell King - ARM Linux admin, Oleksij Rempel, linux-i2c,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team, Shawn Guo,
Chris Healy, linux-arm-kernel
In-Reply-To: <20190812064811.427cy7ahim54odkk@pengutronix.de>
[-- Attachment #1.1: Type: text/plain, Size: 333 bytes --]
> Even without this patch the generic "ARM/FREESCALE IMX / MXC ARM
> ARCHITECTURE" entry matches the i2c-imx driver.
It matches, but it didn't work well, I am afraid. Quite some IMX patches
in patchwork waiting for attention:
http://patchwork.ozlabs.org/project/linux-i2c/list/?series=&submitter=&state=&q=imx&archive=&delegate=
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v4 6/6] dt-bindings: arm: coresight: Add support for coresight-needs-save-restore
From: Andrew Murray @ 2019-08-14 10:01 UTC (permalink / raw)
To: Mathieu Poirier
Cc: Al Grant, Suzuki K Poulose, Alexander Shishkin, Coresight ML,
Sudeep Holla, Leo Yan, linux-arm-kernel, Mike Leach
In-Reply-To: <CANLsYkyVMRh_L5BfwWk=s-obh+xiZfjwqXUJkwgaZYWmc6Kuww@mail.gmail.com>
On Sun, Aug 04, 2019 at 07:13:45AM -0600, Mathieu Poirier wrote:
> On Fri, 2 Aug 2019 at 08:37, Andrew Murray <andrew.murray@arm.com> wrote:
> >
> > On Fri, Aug 02, 2019 at 11:40:54AM +0100, Suzuki K Poulose wrote:
> > > Hi Andrew,
> > >
> > > On 30/07/2019 13:51, Andrew Murray wrote:
> > > > Some coresight components, because of choices made during hardware
> > > > integration, require their state to be saved and restored across CPU low
> > > > power states.
> > > >
> > > > The software has no reliable method of detecting when save/restore is
> > > > required thus let's add a binding to inform the kernel.
> > > >
> > > > Signed-off-by: Andrew Murray <andrew.murray@arm.com>
> > > > ---
> > > > Documentation/devicetree/bindings/arm/coresight.txt | 3 +++
> > > > 1 file changed, 3 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
> > > > index fcc3bacfd8bc..7cbdb7893af8 100644
> > > > --- a/Documentation/devicetree/bindings/arm/coresight.txt
> > > > +++ b/Documentation/devicetree/bindings/arm/coresight.txt
> > > > @@ -92,6 +92,9 @@ its hardware characteristcs.
> > > > * arm,cp14: must be present if the system accesses ETM/PTM management
> > > > registers via co-processor 14.
> > > > + * arm,coresight-needs-save-restore: boolean. Indicates that software
> > > > + should save/restore state across power down.
> > > > +
> > >
> > > Do you think we could be a bit more descriptive here about when people could add
> > > it to the DT ? Here we don't mention when someone should use this property and
> > > it may be added to platforms where it may be absolutely unnecessary. How about :
> > >
> > > "Indicates that the hardware implementation may not honor the Powerup request
> > > from the software and thus might loose the register context on CPU power
> > > down (e.g, during CPUIdle). Software must save/restore the context during a
> > > CPU power transition cycle."
> >
> > How about the following:
> >
> > "Indicates that the hardware will loose register context on CPU power down (e.g.
> > CPUIdle), despite the TRCPDCR.PU bit being set."
> >
> > I'm keen to avoid making suggestions about what the kernel will do when it sees
> > this flag and thus prefer to focus on describing what the hardware does. So I
> > dropped your last sentence. However the name of the flag still implies policy
> > which I don't like.
> >
> > I also changed the 'may not honor' wording, I'm not sure if this is really the
> > case or if the spec is open to interpretation.
> >
> > It would great for this wording to also apply to other CS components though I
> > haven't investigated if these have a PU bit or something different.
>
> Exactly - the definition needs to be broad enough to apply to other CS
> components. Mike what do you think would be appropriate for CTIs?
How about we keep this short and simple:
* arm,coresight-loses-context-with-cpu : boolean. Indicates that the hardware
will lose register context on CPU power down (e.g. CPUIdle).
I could have added something like "... despite TRCPDCR.PU being set", or to
apply more generically: "... despite available register controls being set to
prevent such context loss". However whilst these are more informative - they
elude to some of reasons as to why context is lost and as we cannot be
exhaustive I'd rather not give a limited example.
However if a longer explaination is required:
* arm,coresight-loses-context-with-cpu : boolean. Indicates that the hardware
will lose register context on CPU power down (e.g. CPUIdle). An example of
where this may be needed are systems which contain a coresight component and
CPU in the same power domain. When the CPU powers down the coresight
component also powers down and loses its context.
Any objections/preference? :)
Thanks,
Andrew Murray
>
> >
> > Thanks,
> >
> > Andrew Murray
> >
> > >
> > > Cheers
> > > Suzuki
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v1] MAINTAINERS: i2c-imx: take over maintainership
From: Wolfram Sang @ 2019-08-14 9:54 UTC (permalink / raw)
To: Oleksij Rempel
Cc: Aisheng Dong, Andrey Smirnov, Sascha Hauer,
Russell King - ARM Linux admin, linux-i2c,
Pengutronix Kernel Team, Fabio Estevam, Chris Healy, Shawn Guo,
linux-arm-kernel, NXP Linux Team
In-Reply-To: <20190812050817.23279-1-o.rempel@pengutronix.de>
[-- Attachment #1.1: Type: text/plain, Size: 355 bytes --]
On Mon, Aug 12, 2019 at 07:08:17AM +0200, Oleksij Rempel wrote:
> I would like to maintain the i2c-imx driver. Since I work with
> different i.MX variants and have access to the hardware, I can spend
> some time on the reviewing of this driver.
>
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Applied to for-current, thanks a lot!
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/8] arm64: memory: Fix virt_addr_valid() using __is_lm_address()
From: Will Deacon @ 2019-08-14 9:48 UTC (permalink / raw)
To: Catalin Marinas
Cc: Mark Rutland, Steve Capper, Andrey Konovalov, Geert Uytterhoeven,
Qian Cai, linux-arm-kernel
In-Reply-To: <20190814091942.GA50688@arrakis.emea.arm.com>
On Wed, Aug 14, 2019 at 10:19:42AM +0100, Catalin Marinas wrote:
> On Tue, Aug 13, 2019 at 06:01:42PM +0100, Will Deacon wrote:
> > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
> > index afaf512c0e1b..442ab861cab8 100644
> > --- a/arch/arm64/include/asm/memory.h
> > +++ b/arch/arm64/include/asm/memory.h
> > @@ -244,9 +244,9 @@ static inline const void *__tag_set(const void *addr, u8 tag)
> > /*
> > * The linear kernel range starts in the middle of the virtual adddress
> > * space. Testing the top bit for the start of the region is a
> > - * sufficient check.
> > + * sufficient check and avoids having to worry about the tag.
> > */
> > -#define __is_lm_address(addr) (!((addr) & BIT(vabits_actual - 1)))
> > +#define __is_lm_address(addr) (!(((u64)addr) & BIT(vabits_actual - 1)))
> >
> > #define __lm_to_phys(addr) (((addr) + physvirt_offset))
> > #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
> > @@ -326,13 +326,13 @@ static inline void *phys_to_virt(phys_addr_t x)
> >
> > #define virt_to_page(vaddr) ((struct page *)((__virt_to_pgoff(vaddr)) + VMEMMAP_START))
> > #endif
> > -#endif
> >
> > -#define _virt_addr_is_linear(kaddr) \
> > - (__tag_reset((u64)(kaddr)) >= PAGE_OFFSET)
> > +#define virt_addr_valid(addr) ({ \
> > + __typeof__(addr) __addr = addr; \
> > + __is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \
> > +})
>
> There is a slight change of semantics here but I don't think it's an
> issue currently. __is_lm_address() is true even for a user address, so
> at least the first part of virt_addr_valid() now accepts such addresses.
> The pfn would be wrong eventually because of the virt-to-phys offsetting
> and pfn_valid() false but we rely on this rather than checking it's a
> kernel address. Slight concern as this macro is called from drivers.
>
> Should we keep the PAGE_OFFSET check as well?
In virt_addr_valid() or __is_lm_address()?
To be honest with you, I'm not even sure what virt_addr_valid() is supposed
to do with non-linear kernel addresses: look at powerpc and riscv, who
appear to convert the address straight to a pfn. Many callers check against
is_vmalloc_addr() first, but not all of them.
I think passing in a *user* address would be a huge bug in the caller,
just like it would be if you called virt_to_phys() on a user address.
If we care about that, then I think __is_lm_address() should be the one
doing the check against PAGE_OFFSET.
Thoughts? I'd be inclined to leave this patch as it is.
Will
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* RE: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
From: Xiaowei Bao @ 2019-08-14 9:48 UTC (permalink / raw)
To: Lorenzo Pieralisi
Cc: Roy Zang, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
M.h. Lian, linux-arm-kernel@lists.infradead.org,
bhelgaas@google.com, linuxppc-dev@lists.ozlabs.org, Mingkai Hu
In-Reply-To: <20190814092952.GA26840@e121166-lin.cambridge.arm.com>
> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: 2019年8月14日 17:30
> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> Cc: M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>;
> bhelgaas@google.com; linuxppc-dev@lists.ozlabs.org;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCHv6 1/2] PCI: layerscape: Add the bar_fixed_64bit property
> in EP driver.
>
> I asked you to remove the period at the end of the patch $SUBJECT and you
> did not, either you do not read what I write or explain me what's going on.
Sorry, I didn't understand the meaning of period correctly before.
>
> On Wed, Aug 14, 2019 at 10:03:29AM +0800, Xiaowei Bao wrote:
> > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > 32bit, BAR2 and BAR4 is 64bit, this is determined by hardware, so set
> > the bar_fixed_64bit with 0x14.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
>
> Kishon ACK'ed this patch and you have not carried his tag.
>
> I will make these changes but that's the last time I do that for you.
Thanks a lot, your means is that I don't need to send the v7 patch and you help me to
Correct this patch, yes? Thanks a lot for your help about the rules of the upstream. I will
Correct this error next time. ^.^
>
> Lorenzo
>
> > ---
> > v2:
> > - Replace value 0x14 with a macro.
> > v3:
> > - No change.
> > v4:
> > - send the patch again with '--to'.
> > v5:
> > - fix the commit message.
> > v6:
> > - remove the [EXT] tag of the $SUBJECT in email.
> >
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index be61d96..ca9aa45 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -44,6 +44,7 @@ static const struct pci_epc_features
> ls_pcie_epc_features = {
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = false,
> > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > };
> >
> > static const struct pci_epc_features*
> > --
> > 2.9.5
> >
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 1/3] ARM: dts: imx6ul: Add csi node
From: Sakari Ailus @ 2019-08-14 9:42 UTC (permalink / raw)
To: Sébastien Szymanski
Cc: Mark Rutland, devicetree, devel, Pengutronix Kernel Team,
Greg Kroah-Hartman, Fabio Estevam, Sascha Hauer, Rui Miguel Silva,
Rob Herring, NXP Linux Team, Philipp Zabel, Steve Longerbeam,
Mauro Carvalho Chehab, Shawn Guo, linux-arm-kernel, linux-media
In-Reply-To: <20190731163257.32448-1-sebastien.szymanski@armadeus.com>
Hi Sébastien,
On Wed, Jul 31, 2019 at 06:32:57PM +0200, Sébastien Szymanski wrote:
> Add csi node for i.MX6UL SoC.
>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
This should be probably merged through the ARM tree.
I can take the other two.
> ---
>
> Changes for v3:
> - none
>
> Changes for v2:
> - only "mclk" clock is required now.
>
> arch/arm/boot/dts/imx6ul.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index 81d4b4925127..56cfcf0e5084 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -957,6 +957,15 @@
> };
> };
>
> + csi: csi@21c4000 {
> + compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
> + reg = <0x021c4000 0x4000>;
> + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6UL_CLK_CSI>;
> + clock-names = "mclk";
> + status = "disabled";
> + };
> +
> lcdif: lcdif@21c8000 {
> compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
> reg = <0x021c8000 0x4000>;
--
Sakari Ailus
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox