* Re: [PATCH v3 0/6] Add support of New Amlogic temperature sensor for G12 SoCs
From: guillaume La Roque @ 2019-08-21 21:19 UTC (permalink / raw)
To: Christian Hewitt
Cc: devicetree, linux-pm, khilman, daniel.lezcano, linux-kernel,
linux-amlogic, linux-arm-kernel
In-Reply-To: <357FACA6-6EAC-4E9D-B6F7-4D8D0D59A20A@gmail.com>
Hi Christian,
thanks for testing on this 3 boards.
guillaume
On 8/14/19 2:24 PM, Christian Hewitt wrote:
> On 6 Aug 2019, at 5:05 pm, Guillaume La Roque <glaroque@baylibre.com> wrote:
>> This patchs series add support of New Amlogic temperature sensor and minimal
>> thermal zone for SEI510 and ODROID-N2 boards.
>>
>> First implementation was doing on IIO[1] but after comments i move on thermal framework.
>> Formulas and calibration values come from amlogic.
>>
>> Changes since v2:
>> - fix yaml documention
>> - remove unneeded status variable for temperature-sensor node
>> - rework driver after Martin review
>> - add some information in commit message
>>
>> Changes since v1:
>> - fix enum vs const in documentation
>> - fix error with thermal-sensor-cells value set to 1 instead of 0
>> - add some dependencies needed to add cooling-maps
>>
>> Dependencies :
>> - patch 3,4 & 5: depends on Neil's patch and series :
>> - missing dwc2 phy-names[2]
>> - patchsets to add DVFS on G12a[3] which have deps on [4] and [5]
>>
>> [1] https://lore.kernel.org/linux-amlogic/20190604144714.2009-1-glaroque@baylibre.com/
>> [2] https://lore.kernel.org/linux-amlogic/20190625123647.26117-1-narmstrong@baylibre.com/
>> [3] https://lore.kernel.org/linux-amlogic/20190729132622.7566-1-narmstrong@baylibre.com/
>> [4] https://lore.kernel.org/linux-amlogic/20190731084019.8451-5-narmstrong@baylibre.com/
>> [5] https://lore.kernel.org/linux-amlogic/20190729132622.7566-3-narmstrong@baylibre.com/
>>
>> Guillaume La Roque (6):
>> dt-bindings: thermal: Add DT bindings documentation for Amlogic
>> Thermal
>> thermal: amlogic: Add thermal driver to support G12 SoCs
>> arm64: dts: amlogic: g12: add temperature sensor
>> arm64: dts: meson: sei510: Add minimal thermal zone
>> arm64: dts: amlogic: odroid-n2: add minimal thermal zone
>> MAINTAINERS: add entry for Amlogic Thermal driver
> Tested-by: Christian Hewitt <christianshewitt@gmail.com>
>
> I’ve tested this series with Odroid N2 and Khadas VIM3, X96-Max. Patches to add
> support for VIM3/X96-max will be submitted once the driver is merged.
>
> VIM3:~ # dmesg | grep thermal
> [ 0.046375] thermal_sys: Registered thermal governor 'step_wise'
>
> VIM3:~ # cat /sys/devices/virtual/thermal/thermal_zone0/temp
> 51300
>
> VIM3:~ # cat /sys/devices/virtual/thermal/thermal_zone1/temp
> 52800
>
> Christian
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* Re: [PATCH v2 4/6] dt-bindings: serial: Document Freescale LINFlex UART
From: Rob Herring @ 2019-08-21 21:18 UTC (permalink / raw)
To: Stefan-gabriel Mirea
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, will@kernel.org,
corbet@lwn.net, gregkh@linuxfoundation.org, jslaby@suse.com,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Leo Li,
Cosmin Stefan Stoica, linux-serial@vger.kernel.org,
catalin.marinas@arm.com, shawnguo@kernel.org,
linux-arm-kernel@lists.infradead.org, Larisa Ileana Grigore
In-Reply-To: <20190809112853.15846-5-stefan-gabriel.mirea@nxp.com>
On Fri, Aug 09, 2019 at 11:29:14AM +0000, Stefan-gabriel Mirea wrote:
> From: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
>
> Add documentation for the serial communication interface module (LINFlex),
> found in two instances on S32V234.
>
> Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
> ---
> .../bindings/serial/fsl,s32-linflexuart.txt | 24 +++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
>
> diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
> new file mode 100644
> index 000000000000..957ffeaca9f1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.txt
> @@ -0,0 +1,24 @@
> +* Freescale Linflex UART
Be consistent with the name: LINFlexD?
> +
> +The LINFlexD controller implements several LIN protocol versions, as well as
> +support for full-duplex UART communication through 8-bit and 9-bit frames. The
> +Linflex UART driver enables operation only in UART mode.
What the driver supports or not is independent of the binding.
> +
> +See chapter 47 ("LINFlexD") in the reference manual[1].
> +
> +Required properties:
> +- compatible :
> + - "fsl,s32-linflexuart" for linflex configured in uart mode which
LINFlexD?
> + is compatible with the one integrated on S32V234 SoC
Compatibles should be SoC specific. Is 's32' specific enough to account
for any differences or future bugs found?
> +- reg : Address and length of the register set for the device
> +- interrupts : Should contain uart interrupt
> +
> +Example:
> +uart0:serial@40053000 {
space ^
> + compatible = "fsl,s32-linflexuart";
> + reg = <0x0 0x40053000 0x0 0x1000>;
> + interrupts = <0 59 4>;
> + status = "disabled";
Don't show status in examples.
> +};
> +
> +[1] https://www.nxp.com/webapp/Download?colCode=S32V234RM
> --
> 2.22.0
>
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* Re: [PATCH v2 08/14] arm64: dts: meson-gxl: fix internal phy compatible
From: Martin Blumenstingl @ 2019-08-21 21:16 UTC (permalink / raw)
To: Neil Armstrong
Cc: khilman, devicetree, linux-kernel, linux-arm-kernel,
linux-amlogic
In-Reply-To: <20190821142043.14649-9-narmstrong@baylibre.com>
On Wed, Aug 21, 2019 at 4:23 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This fixes the following DT schemas check errors:
> meson-gxl-s805x-libretech-ac.dt.yaml: ethernet-phy@8: compatible: ['ethernet-phy-id0181.4400', 'ethernet-phy-ieee802.3-c22'] is not valid under any of the given schemas
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
based on the explanation in v1 we can program any arbitrary PHY ID so
Jerome's argument to list the PHY ID here applies
with that:
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Re: [PATCH v2 12/14] arm64: dts: meson-gxbb-nanopi-k2: add missing model
From: Martin Blumenstingl @ 2019-08-21 21:15 UTC (permalink / raw)
To: Neil Armstrong
Cc: khilman, devicetree, linux-kernel, linux-arm-kernel,
linux-amlogic
In-Reply-To: <20190821142043.14649-13-narmstrong@baylibre.com>
On Wed, Aug 21, 2019 at 4:24 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This fixes the following DT schemas check errors:
> meson-gxbb-nanopi-k2.dt.yaml: /: 'model' is a required property
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Re: [PATCH 11/14] arm64: dts: meson-g12a-x96-max: fix compatible
From: Martin Blumenstingl @ 2019-08-21 21:14 UTC (permalink / raw)
To: Neil Armstrong
Cc: khilman, devicetree, linux-kernel, linux-arm-kernel,
linux-amlogic
In-Reply-To: <c2d78c7c-d9a8-e486-d3b1-c1447e24284b@baylibre.com>
On Wed, Aug 21, 2019 at 4:08 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> On 20/08/2019 22:32, Martin Blumenstingl wrote:
> > On Wed, Aug 14, 2019 at 4:33 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
> >>
> >> This fixes the following DT schemas check errors:
> >> meson-g12a-x96-max.dt.yaml: /: compatible: ['amediatech,x96-max', 'amlogic,u200', 'amlogic,g12a'] is not valid under any of the given schemas
> >>
> >> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> > Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> >
> > [...]
> >> - compatible = "amediatech,x96-max", "amlogic,u200", "amlogic,g12a";
> >> + compatible = "amediatech,x96-max", "amlogic,g12a";
> > only partially related: I wonder if we should add a s905x2 compatible
> > string here and to the .dts filename (just like we separate the GXL
> > variants s905x, s905d, s905w, ...)
> >
>
> We could, but AFAIK no variants of G12A are planned yet...
we already support two variants: S905X2 and S905D2 (I'm assuming that
these are similar to S905X and S905D meaning both are almost
identical)
but I guess we can stay with what we have until there's a reason to
have separate compatible strings (for example if we discover that
there is a difference that matters - like the OPP table on S922X vs
A311D)
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* Re: [PATCH 04/19] dt-bindings: phy-mmp3-usb: Add bindings
From: Rob Herring @ 2019-08-21 21:13 UTC (permalink / raw)
To: Lubomir Rintel
Cc: Mark Rutland, devicetree, Jason Cooper, Stephen Boyd,
Marc Zyngier, Michael Turquette, Russell King,
Kishon Vijay Abraham I, linux-arm-kernel, Olof Johansson,
Thomas Gleixner, linux-clk, linux-kernel
In-Reply-To: <20190809093158.7969-5-lkundrak@v3.sk>
On Fri, Aug 09, 2019 at 11:31:43AM +0200, Lubomir Rintel wrote:
> This is the PHY chip for USB OTG on MMP3 platform.
>
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---
> .../devicetree/bindings/phy/phy-mmp3-usb.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt b/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt
> new file mode 100644
> index 0000000000000..b9623b98151bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-mmp3-usb.txt
> @@ -0,0 +1,16 @@
> +Marvell MMP3 USB PHY
> +--------------------
> +
> +Required properties:
> +- compatible: must be "marvell,mmp3-usb-phy"
> +- #phy-cells: must be 0
> +
> +Example:
> + usb-phy: usbphy@d4207000 {
usb-phy@...
> + compatible = "marvell,mmp3-usb-phy";
> + reg = <0xd4207000 0x40>;
> + #phy-cells = <0>;
> + };
> +
> +This document explains the device tree binding. For general information
> +about PHY subsystem refer to Documentation/phy.txt
Drop this statement.
> --
> 2.21.0
>
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* Re: [PATCH 03/19] dt-bindings: mrvl,intc: Add a MMP3 interrupt controller
From: Rob Herring @ 2019-08-21 21:11 UTC (permalink / raw)
To: Lubomir Rintel
Cc: Mark Rutland, devicetree, Jason Cooper, Stephen Boyd,
Marc Zyngier, Michael Turquette, Russell King,
Kishon Vijay Abraham I, linux-arm-kernel, Olof Johansson,
Thomas Gleixner, linux-clk, linux-kernel
In-Reply-To: <20190809093158.7969-4-lkundrak@v3.sk>
On Fri, Aug 09, 2019 at 11:31:42AM +0200, Lubomir Rintel wrote:
> Similar to MMP2 one, but has an extra range for the other core. The
> muxes stay the same.
>
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---
> .../interrupt-controller/mrvl,intc.txt | 23 ++++++++++++++-----
> 1 file changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
> index 608fee15a4cfc..41c131d026f94 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
> @@ -1,13 +1,15 @@
> * Marvell MMP Interrupt controller
>
> Required properties:
> -- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
> - "mrvl,mmp2-mux-intc"
> +- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc",
> + "marvell,mmp3-intc", "mrvl,mmp2-mux-intc"
Reformat to 1 valid combination per line.
> - reg : Address and length of the register set of the interrupt controller.
> If the interrupt controller is intc, address and length means the range
> - of the whole interrupt controller. If the interrupt controller is mux-intc,
> - address and length means one register. Since address of mux-intc is in the
> - range of intc. mux-intc is secondary interrupt controller.
> + of the whole interrupt controller. The "marvell,mmp3-intc" controller
> + also has a secondary range for the second CPU core. If the interrupt
> + controller is mux-intc, address and length means one register. Since
> + address of mux-intc is in the range of intc. mux-intc is secondary
> + interrupt controller.
> - reg-names : Name of the register set of the interrupt controller. It's
> only required in mux-intc interrupt controller.
> - interrupts : Should be the port interrupt shared by mux interrupts. It's
> @@ -20,7 +22,7 @@ Required properties:
> - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
> detection first.
>
> -Example:
> +Examples:
> intc: interrupt-controller@d4282000 {
> compatible = "mrvl,mmp2-intc";
> interrupt-controller;
> @@ -29,6 +31,15 @@ Example:
> mrvl,intc-nr-irqs = <64>;
> };
>
> + intc: interrupt-controller@d4282000 {
What's special about this to warrant another example. Examples aren't
supposed to be an enumeration of all possible dts entries.
> + compatible = "marvell,mmp3-intc";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + reg = <0xd4282000 0x1000>,
> + <0xd4284000 0x100>;
> + mrvl,intc-nr-irqs = <64>;
> + };
> +
> intcmux4@d4282150 {
> compatible = "mrvl,mmp2-mux-intc";
> interrupts = <4>;
> --
> 2.21.0
>
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Andrew Lunn @ 2019-08-21 21:05 UTC (permalink / raw)
To: René van Dorst
Cc: Florian Fainelli, Frank Wunderlich, netdev, Sean Wang, linux-mips,
David S . Miller, linux-mediatek, John Crispin, Matthias Brugger,
Vivien Didelot, linux-arm-kernel
In-Reply-To: <20190821144547.15113-1-opensource@vdorst.com>
On Wed, Aug 21, 2019 at 04:45:44PM +0200, René van Dorst wrote:
> 1. net: dsa: mt7530: Convert to PHYLINK API
> This patch converts mt7530 to PHYLINK API.
> 2. dt-bindings: net: dsa: mt7530: Add support for port 5
> 3. net: dsa: mt7530: Add support for port 5
> These 2 patches adding support for port 5 of the switch.
>
> v1->v2:
> * Mostly phylink improvements after review.
Hi René
You are addressing comments mostly from Russell King. It would of been
good to Cc: him on the patchset.
Andrew
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* Re: [PATCH 02/19] dt-bindings: arm: mrvl: Document MMP3 compatible string
From: Rob Herring @ 2019-08-21 21:03 UTC (permalink / raw)
To: Lubomir Rintel
Cc: Mark Rutland, devicetree, Jason Cooper, Stephen Boyd,
Marc Zyngier, Michael Turquette, Russell King,
Kishon Vijay Abraham I, linux-arm-kernel, Olof Johansson,
Thomas Gleixner, linux-clk, linux-kernel
In-Reply-To: <20190809093158.7969-3-lkundrak@v3.sk>
On Fri, Aug 09, 2019 at 11:31:41AM +0200, Lubomir Rintel wrote:
> Marvel MMP3 is a successor to MMP2, containing similar peripherals with two
> PJ4B cores.
>
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
> ---
> Documentation/devicetree/bindings/arm/mrvl/mrvl.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt
> index 951687528efb0..66e1e1414245b 100644
> --- a/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt
> +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.txt
> @@ -12,3 +12,7 @@ Required root node properties:
> MMP2 Brownstone Board
> Required root node properties:
> - compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
> +
> +MMP3 SoC
> +Required root node properties:
> + - compatible = "marvell,mmp3";
Please convert this file to DT schema before adding new SoCs.
Rob
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* Re: [PATCH 5/6] dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
From: Rob Herring @ 2019-08-21 21:02 UTC (permalink / raw)
To: Lokesh Vutla
Cc: Nishanth Menon, Device Tree Mailing List, Keerthy, linus.walleij,
Tero Kristo, linux-gpio, Linux ARM Mailing List
In-Reply-To: <20190809082947.30590-6-lokeshvutla@ti.com>
On Fri, Aug 09, 2019 at 01:59:46PM +0530, Lokesh Vutla wrote:
> Add pinctrl macros for J721E SoC. These macro definitions are
> similar to that of AM6, but adding new definitions to avoid
> any naming confusions in the soc dts files.
>
> Acked-by: Nishanth Menon <nm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> include/dt-bindings/pinctrl/k3.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h
> index 45e11b6170ca..499de6216581 100644
> --- a/include/dt-bindings/pinctrl/k3.h
> +++ b/include/dt-bindings/pinctrl/k3.h
> @@ -32,4 +32,7 @@
> #define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
> #define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
>
> +#define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
> +#define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
checkpatch reports a parentheses error: (((pa) & 0x1fff) ((val) | (muxmode)))
> +
> #endif
> --
> 2.22.0
>
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* [RESEND PATCH 1/1] rtc: sun6i: Allow using as wakeup source from suspend
From: Alejandro González @ 2019-08-21 21:00 UTC (permalink / raw)
To: a.zummo, alexandre.belloni, maxime.ripard, wens, linux-rtc,
linux-arm-kernel, linux-kernel
Cc: linux-sunxi, Alejandro González
This patch allows userspace to set up wakeup alarms on any RTC handled by the
sun6i driver, and adds the necessary PM operations to allow resuming from
suspend when the configured wakeup alarm fires a IRQ. Of course, that the
device actually resumes depends on the suspend state and how a particular
hardware reacts to it, but that is out of scope for this patch.
I've tested these changes on a Pine H64 model B, which contains a
Allwinner H6 SoC, with the help of CONFIG_PM_TEST_SUSPEND kernel option.
These are the interesting outputs from the kernel and commands which
show that it works. As every RTC handled by this driver is largely the
same, I think that it shouldn't introduce any regression on other SoCs,
but I may be wrong.
[ 1.092705] PM: test RTC wakeup from 'freeze' suspend
[ 1.098230] PM: suspend entry (s2idle)
[ 1.212907] PM: suspend devices took 0.080 seconds
(The SoC freezes for some seconds)
[ 3.197604] PM: resume devices took 0.104 seconds
[ 3.215937] PM: suspend exit
[ 1.092812] PM: test RTC wakeup from 'mem' suspend
[ 1.098089] PM: suspend entry (deep)
[ 1.102033] PM: suspend exit
[ 1.105205] PM: suspend test failed, error -22
In any case, the RTC alarm interrupt gets fired as exptected:
$ echo +5 > /sys/class/rtc/rtc0/wakealarm && sleep 5 && grep rtc /proc/interrupts
29: 1 0 0 0 GICv2 133 Level 7000000.rtc
Signed-off-by: Alejandro González <alejandro.gonzalez.correo@gmail.com>
---
drivers/rtc/rtc-sun6i.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index c0e75c373605..b7611e5dea3f 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -598,6 +598,33 @@ static const struct rtc_class_ops sun6i_rtc_ops = {
.alarm_irq_enable = sun6i_rtc_alarm_irq_enable
};
+#ifdef CONFIG_PM_SLEEP
+/* Enable IRQ wake on suspend, to wake up from RTC. */
+static int sun6i_rtc_suspend(struct device *dev)
+{
+ struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
+
+ if (device_may_wakeup(dev))
+ enable_irq_wake(chip->irq);
+
+ return 0;
+}
+
+/* Disable IRQ wake on resume. */
+static int sun6i_rtc_resume(struct device *dev)
+{
+ struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
+
+ if (device_may_wakeup(dev))
+ disable_irq_wake(chip->irq);
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(sun6i_rtc_pm_ops,
+ sun6i_rtc_suspend, sun6i_rtc_resume);
+
static int sun6i_rtc_probe(struct platform_device *pdev)
{
struct sun6i_rtc_dev *chip = sun6i_rtc;
@@ -650,6 +677,8 @@ static int sun6i_rtc_probe(struct platform_device *pdev)
clk_prepare_enable(chip->losc);
+ device_init_wakeup(&pdev->dev, 1);
+
chip->rtc = devm_rtc_device_register(&pdev->dev, "rtc-sun6i",
&sun6i_rtc_ops, THIS_MODULE);
if (IS_ERR(chip->rtc)) {
@@ -684,6 +713,7 @@ static struct platform_driver sun6i_rtc_driver = {
.driver = {
.name = "sun6i-rtc",
.of_match_table = sun6i_rtc_dt_ids,
+ .pm = &sun6i_rtc_pm_ops,
},
};
builtin_platform_driver(sun6i_rtc_driver);
--
2.20.1
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^ permalink raw reply related
* Re: [PATCH v1 1/3] gpio: mpc8xxx: add ls1088a platform gpio node DT binding description
From: Rob Herring @ 2019-08-21 20:53 UTC (permalink / raw)
To: Hui Song
Cc: Mark Rutland, devicetree, Song Hui, linux-gpio, Linus Walleij,
linux-kernel, Li Yang, Bartosz Golaszewski, Shawn Guo,
linux-arm-kernel
In-Reply-To: <20190808101628.36782-1-hui.song_1@nxp.com>
On Thu, 8 Aug 2019 18:16:26 +0800, Hui Song wrote:
> From: Song Hui <hui.song_1@nxp.com>
>
> ls1088a and ls1028a platform share common gpio node.
>
> Signed-off-by: Song Hui <hui.song_1@nxp.com>
> ---
> Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [PATCH net-next] net: stmmac: dwc-qos: use devm_platform_ioremap_resource() to simplify code
From: David Miller @ 2019-08-21 20:53 UTC (permalink / raw)
To: yuehaibing
Cc: alexandre.torgue, khilman, linux-kernel, joabreu, mcoquelin.stm32,
netdev, peppe.cavallaro, linux-amlogic, linux-stm32,
linux-arm-kernel
In-Reply-To: <20190821135701.46780-1-yuehaibing@huawei.com>
From: YueHaibing <yuehaibing@huawei.com>
Date: Wed, 21 Aug 2019 21:57:01 +0800
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Applied.
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^ permalink raw reply
* Re: [PATCH net-next] net: stmmac: dwmac-anarion: use devm_platform_ioremap_resource() to simplify code
From: David Miller @ 2019-08-21 20:53 UTC (permalink / raw)
To: yuehaibing
Cc: alexandre.torgue, khilman, linux-kernel, joabreu, mcoquelin.stm32,
netdev, peppe.cavallaro, linux-amlogic, linux-stm32,
linux-arm-kernel
In-Reply-To: <20190821135550.55200-1-yuehaibing@huawei.com>
From: YueHaibing <yuehaibing@huawei.com>
Date: Wed, 21 Aug 2019 21:55:50 +0800
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Applied.
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^ permalink raw reply
* Re: [PATCH net-next] net: stmmac: dwmac-meson: use devm_platform_ioremap_resource() to simplify code
From: David Miller @ 2019-08-21 20:53 UTC (permalink / raw)
To: yuehaibing
Cc: alexandre.torgue, khilman, linux-kernel, joabreu, mcoquelin.stm32,
netdev, peppe.cavallaro, linux-amlogic, linux-stm32,
linux-arm-kernel
In-Reply-To: <20190821135406.26200-1-yuehaibing@huawei.com>
From: YueHaibing <yuehaibing@huawei.com>
Date: Wed, 21 Aug 2019 21:54:06 +0800
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Applied.
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^ permalink raw reply
* Re: [PATCH net-next] net: stmmac: dwmac-meson8b: use devm_platform_ioremap_resource() to simplify code
From: David Miller @ 2019-08-21 20:53 UTC (permalink / raw)
To: yuehaibing
Cc: alexandre.torgue, khilman, linux-kernel, joabreu, mcoquelin.stm32,
netdev, peppe.cavallaro, linux-amlogic, linux-stm32,
linux-arm-kernel
In-Reply-To: <20190821135130.68636-1-yuehaibing@huawei.com>
From: YueHaibing <yuehaibing@huawei.com>
Date: Wed, 21 Aug 2019 21:51:30 +0800
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Applied.
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^ permalink raw reply
* Re: [PATCH v4] arm64: dts: imx8mq: Init rates and parents configs for clocks
From: Leonard Crestez @ 2019-08-21 20:39 UTC (permalink / raw)
To: Daniel Baluta, shawnguo@kernel.org, Abel Vesa
Cc: devicetree@vger.kernel.org, baruch@tkos.co.il, Jacky Bai,
Anson Huang, ccaione@baylibre.com, andrew.smirnov@gmail.com,
s.hauer@pengutronix.de, angus@akkea.ca, Stephen Boyd,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
agx@sigxcpu.org, dl-linux-imx, Peng Fan, festevam@gmail.com,
S.j. Wang, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <20190728152040.15323-1-daniel.baluta@nxp.com>
On 28.07.2019 18:20, Daniel Baluta wrote:
> From: Abel Vesa <abel.vesa@nxp.com>
>
> Add the initial configuration for clocks that need default parent and rate
> setting. This is based on the vendor tree clock provider parents and rates
> configuration except this is doing the setup in dts rather then using clock
> consumer API in a clock provider driver.
>
> Note that by adding the initial rate setting for audio_pll1/audio_pll
> setting we need to remove it from imx8mq-librem5-devkit.dts
Setting default rates for audio_pll1 and audio_pll2 in soc dtsi makes a
lot of sense to me; the intention is for one to run at a multiple of
44.1k and another at a multiple of 48k.
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 02fbd0625318..a55d72ba2e05 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -494,6 +494,25 @@
> clock-names = "ckil", "osc_25m", "osc_27m",
> "clk_ext1", "clk_ext2",
> "clk_ext3", "clk_ext4";
> + assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1>,
> + <&clk IMX8MQ_AUDIO_PLL1>,
> + <&clk IMX8MQ_AUDIO_PLL2>,
> + <&clk IMX8MQ_CLK_AHB>,
> + <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
> + <&clk IMX8MQ_CLK_AUDIO_AHB>,
> + <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
> + <&clk IMX8MQ_CLK_NOC>;
> + assigned-clock-parents = <0>,
> + <0>,
> + <0> > + <&clk IMX8MQ_SYS1_PLL_133M>,
> + <&clk IMX8MQ_SYS1_PLL_266M>,
> + <&clk IMX8MQ_SYS2_PLL_500M>,
> + <&clk IMX8MQ_CLK_27M>,
> + <&clk IMX8MQ_SYS1_PLL_800M>;
> + assigned-clock-rates = <593999999>,
> + <786432000>,
> + <722534400>;
The audio PLLs should run below 650 mHz so please use 393216000 and
361267200 instead of 786432000 and 722534400. For the 8mm equivalent see
commit 053a4ffe2988 ("clk: imx: imx8mm: fix audio pll setting").
You should also move the unbypassing of AUDIO_PLL1 and AUDIO_PLL2 here
just add two more assigned-clocks and assigned-clock-parents.
--
Regards,
Leonard
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^ permalink raw reply
* Re: [RESEND PATCH v5 4/4] dt-bindings: devfreq: exynos-bus: remove unused property
From: Rob Herring @ 2019-08-21 20:35 UTC (permalink / raw)
To: Kamil Konieczny
Cc: Mark Rutland, Nishanth Menon, linux-samsung-soc, linux-arm-kernel,
Bartlomiej Zolnierkiewicz, Stephen Boyd, Viresh Kumar, linux-pm,
linux-kernel, Krzysztof Kozlowski, Chanwoo Choi, Kyungmin Park,
Kukjin Kim, MyungJoo Ham, devicetree, Marek Szyprowski
In-Reply-To: <20190808090234.12577-5-k.konieczny@partner.samsung.com>
On Thu, Aug 08, 2019 at 11:02:34AM +0200, Kamil Konieczny wrote:
> Remove unused DT property "exynos,voltage-tolerance".
>
> Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com>
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 2 --
> 1 file changed, 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [RFC,v4,1/4] media: dt-bindings: mt8183: Added camera ISP Pass 1
From: Rob Herring @ 2019-08-21 20:17 UTC (permalink / raw)
To: Jungo Lin
Cc: ryan.yu, frankie.chiu, laurent.pinchart, Rynn.Wu, suleiman,
Jerry-ch.Chen, frederic.chen, linux-media, devicetree,
hverkuil-cisco, shik, yuzhao, linux-mediatek, matthias.bgg,
mchehab, linux-arm-kernel, Sean.Cheng, srv_heupstream, sj.huang,
tfiga, zwisler, ddavenport
In-Reply-To: <20190807124803.29884-2-jungo.lin@mediatek.com>
On Wed, Aug 07, 2019 at 08:48:00PM +0800, Jungo Lin wrote:
> This patch adds DT binding document for the Pass 1 (P1) unit
> in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor
> data out from the sensor interface, applies ISP image effects
> from tuning data and outputs the image data or statistics data to DRAM.
>
> Signed-off-by: Jungo Lin <jungo.lin@mediatek.com>
> ---
> .../bindings/media/mediatek,camisp.txt | 73 +++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> new file mode 100644
> index 000000000000..fa2713acceca
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> @@ -0,0 +1,73 @@
> +* Mediatek Image Signal Processor Pass 1 (ISP P1)
> +
> +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out
> +from the sensor interface, applies ISP effects from tuning data and outputs
> +the image data and statistics data to DRAM. Furthermore, Pass 1 unit has
> +the ability to output two different resolutions frames at the same time to
> +increase the performance of the camera application.
> +
> +Required properties:
> +- compatible: Must be "mediatek,mt8183-camisp" for MT8183.
> +- reg: Physical base address of the camera function block register and
> + length of memory mapped region. Must contain an entry for each entry
> + in reg-names.
> +- reg-names: Must include the following entries:
> + "cam_sys": Camera base function block
> + "cam_uni": Camera UNI function block
> + "cam_a": Camera ISP P1 hardware unit A
> + "cam_b": Camera ISP P1 hardware unit B
> + "cam_c": Camera ISP P1 hardware unit C
> +- interrupts: Must contain an entry for each entry in interrupt-names.
> +- interrupt-names : Must include the following entries:
> + "cam_uni": Camera UNI interrupt
> + "cam_a": Camera unit A interrupt
> + "cam_b": Camera unit B interrupt
> + "cam_c": Camera unit C interrupt
> +- iommus: Shall point to the respective IOMMU block with master port
> + as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> + for details.
> +- clocks: A list of phandle and clock specifier pairs as listed
> + in clock-names property, see
> + Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> +- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn".
> +- mediatek,larb: Must contain the local arbiters in the current SoCs, see
> + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> + for details.
> +- power-domains: a phandle to the power domain, see
> + Documentation/devicetree/bindings/power/power_domain.txt for details.
> +- mediatek,scp : The node of system control processor (SCP), see
> + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details.
> +
> +Example:
> +SoC specific DT entry:
> +
> + camisp: camisp@1a000000 {
Also, you can remove 2 levels of indentation here.
> + compatible = "mediatek,mt8183-camisp", "syscon";
> + reg = <0 0x1a000000 0 0x1000>,
> + <0 0x1a003000 0 0x1000>,
> + <0 0x1a004000 0 0x2000>,
> + <0 0x1a006000 0 0x2000>,
> + <0 0x1a008000 0 0x2000>;
> + reg-names = "cam_sys",
> + "cam_uni",
> + "cam_a",
> + "cam_b",
> + "cam_c";
> + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 254 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 255 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 256 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "cam_uni",
> + "cam_a",
> + "cam_b",
> + "cam_c";
> + iommus = <&iommu M4U_PORT_CAM_IMGO>;
> + clocks = <&camsys CLK_CAM_CAM>,
> + <&camsys CLK_CAM_CAMTG>;
> + clock-names = "camsys_cam_cgpdn",
> + "camsys_camtg_cgpdn";
> + mediatek,larb = <&larb3>,
> + <&larb6>;
> + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
> + mediatek,scp = <&scp>;
> + };
> --
> 2.18.0
>
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^ permalink raw reply
* Re: [PATCH v3] arm64: implement KPROBES_ON_FTRACE
From: Naveen N. Rao @ 2019-08-21 20:12 UTC (permalink / raw)
To: Catalin Marinas, Jonathan Corbet, Jisheng Zhang, Masami Hiramatsu,
Peter Zijlstra, Thomas Gleixner, Will Deacon
Cc: Ingo Molnar, Steven Rostedt, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org
In-Reply-To: <20190821183501.33588dd8@xhacker.debian>
Jisheng Zhang wrote:
> KPROBES_ON_FTRACE avoids much of the overhead with regular kprobes as it
> eliminates the need for a trap, as well as the need to emulate or
> single-step instructions.
>
> Tested on berlin arm64 platform.
>
> ~ # mount -t debugfs debugfs /sys/kernel/debug/
> ~ # cd /sys/kernel/debug/
> /sys/kernel/debug # echo 'p _do_fork' > tracing/kprobe_events
>
> before the patch:
>
> /sys/kernel/debug # cat kprobes/list
> ffffff801009fe28 k _do_fork+0x0 [DISABLED]
>
> after the patch:
>
> /sys/kernel/debug # cat kprobes/list
> ffffff801009ff54 k _do_fork+0x4 [DISABLED][FTRACE]
>
> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
> ---
> KPROBES_ON_FTRACE avoids much of the overhead with regular kprobes as it
> eliminates the need for a trap, as well as the need to emulate or
> single-step instructions.
>
> Applied after arm64 FTRACE_WITH_REGS:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2019-August/674404.html
>
> Changes since v2:
> - remove patch1, make it a single cleanup patch
> - remove "This patch" in the change log
> - implement arm64's kprobe_lookup_name() and arch_kprobe_on_func_entry instead
> patching the common kprobes code
>
> Changes since v1:
> - make the kprobes/x86: use instruction_pointer and instruction_pointer_set
> as patch1
> - add Masami's ACK to patch1
> - add some description about KPROBES_ON_FTRACE and why we need it on
> arm64
> - correct the log before the patch
> - remove the consolidation patch, make it as TODO
> - only adjust kprobe's addr when KPROBE_FLAG_FTRACE is set
> - if KPROBES_ON_FTRACE, ftrace_call_adjust() the kprobe's addr before
> calling ftrace_location()
> - update the kprobes-on-ftrace/arch-support.txt in doc
>
>
> .../debug/kprobes-on-ftrace/arch-support.txt | 2 +-
> arch/arm64/Kconfig | 1 +
> arch/arm64/kernel/probes/Makefile | 1 +
> arch/arm64/kernel/probes/ftrace.c | 60 +++++++++++++++++++
> arch/arm64/kernel/probes/kprobes.c | 23 +++++++
> 5 files changed, 86 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/kernel/probes/ftrace.c
>
> diff --git a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
> index 68f266944d5f..e8358a38981c 100644
> --- a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
> +++ b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt
> @@ -9,7 +9,7 @@
> | alpha: | TODO |
> | arc: | TODO |
> | arm: | TODO |
> - | arm64: | TODO |
> + | arm64: | ok |
> | c6x: | TODO |
> | csky: | TODO |
> | h8300: | TODO |
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 663392d1eae2..928700f15e23 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -167,6 +167,7 @@ config ARM64
> select HAVE_STACKPROTECTOR
> select HAVE_SYSCALL_TRACEPOINTS
> select HAVE_KPROBES
> + select HAVE_KPROBES_ON_FTRACE
> select HAVE_KRETPROBES
> select HAVE_GENERIC_VDSO
> select IOMMU_DMA if IOMMU_SUPPORT
> diff --git a/arch/arm64/kernel/probes/Makefile b/arch/arm64/kernel/probes/Makefile
> index 8e4be92e25b1..4020cfc66564 100644
> --- a/arch/arm64/kernel/probes/Makefile
> +++ b/arch/arm64/kernel/probes/Makefile
> @@ -4,3 +4,4 @@ obj-$(CONFIG_KPROBES) += kprobes.o decode-insn.o \
> simulate-insn.o
> obj-$(CONFIG_UPROBES) += uprobes.o decode-insn.o \
> simulate-insn.o
> +obj-$(CONFIG_KPROBES_ON_FTRACE) += ftrace.o
> diff --git a/arch/arm64/kernel/probes/ftrace.c b/arch/arm64/kernel/probes/ftrace.c
> new file mode 100644
> index 000000000000..1f0c09d02bb8
> --- /dev/null
> +++ b/arch/arm64/kernel/probes/ftrace.c
> @@ -0,0 +1,60 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Dynamic Ftrace based Kprobes Optimization
> + *
> + * Copyright (C) Hitachi Ltd., 2012
> + * Copyright (C) 2019 Jisheng Zhang <jszhang@kernel.org>
> + * Synaptics Incorporated
> + */
> +
> +#include <linux/kprobes.h>
> +
> +/* Ftrace callback handler for kprobes -- called under preepmt disabed */
> +void kprobe_ftrace_handler(unsigned long ip, unsigned long parent_ip,
> + struct ftrace_ops *ops, struct pt_regs *regs)
> +{
> + struct kprobe *p;
> + struct kprobe_ctlblk *kcb;
> +
> + /* Preempt is disabled by ftrace */
> + p = get_kprobe((kprobe_opcode_t *)ip);
> + if (unlikely(!p) || kprobe_disabled(p))
> + return;
> +
> + kcb = get_kprobe_ctlblk();
> + if (kprobe_running()) {
> + kprobes_inc_nmissed_count(p);
> + } else {
> + unsigned long orig_ip = instruction_pointer(regs);
> + /* Kprobe handler expects regs->pc = pc + 4 as breakpoint hit */
> + instruction_pointer_set(regs, ip + sizeof(kprobe_opcode_t));
> +
> + __this_cpu_write(current_kprobe, p);
> + kcb->kprobe_status = KPROBE_HIT_ACTIVE;
> + if (!p->pre_handler || !p->pre_handler(p, regs)) {
> + /*
> + * Emulate singlestep (and also recover regs->pc)
> + * as if there is a nop
> + */
> + instruction_pointer_set(regs,
> + (unsigned long)p->addr + MCOUNT_INSN_SIZE);
> + if (unlikely(p->post_handler)) {
> + kcb->kprobe_status = KPROBE_HIT_SSDONE;
> + p->post_handler(p, regs, 0);
> + }
> + instruction_pointer_set(regs, orig_ip);
> + }
> + /*
> + * If pre_handler returns !0, it changes regs->pc. We have to
> + * skip emulating post_handler.
> + */
> + __this_cpu_write(current_kprobe, NULL);
> + }
> +}
> +NOKPROBE_SYMBOL(kprobe_ftrace_handler);
> +
> +int arch_prepare_kprobe_ftrace(struct kprobe *p)
> +{
> + p->ainsn.api.insn = NULL;
> + return 0;
> +}
> diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c
> index c4452827419b..f2bf8c70da79 100644
> --- a/arch/arm64/kernel/probes/kprobes.c
> +++ b/arch/arm64/kernel/probes/kprobes.c
> @@ -551,6 +551,29 @@ void __kprobes __used *trampoline_probe_handler(struct pt_regs *regs)
> return (void *)orig_ret_address;
> }
>
> +#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
This should be CONFIG_KPROBES_ON_FTRACE since you only want to choose
the ftrace entry in that case.
> +kprobe_opcode_t *kprobe_lookup_name(const char *name, unsigned int offset)
> +{
> + unsigned long addr = kallsyms_lookup_name(name);
> + unsigned long faddr;
> +
> + /*
> + * with -fpatchable-function-entry=2, the first 4 bytes is the
> + * LR saver, then the actual call insn. So ftrace location is
> + * always on the first 4 bytes offset.
> + */
> + faddr = ftrace_location_range(addr, addr + AARCH64_INSN_SIZE);
> + if (faddr)
> + return (kprobe_opcode_t *)faddr;
You should only return the ftrace location if offset is 0, since the
offset is added to the address returned from here (see _kprobe_addr()).
- Naveen
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* [PATCH v3 2/2] arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
From: Sunil Mohan Adapa @ 2019-08-21 19:52 UTC (permalink / raw)
To: linux-arm-kernel, devicetree
Cc: mark.rutland, maxime.ripard, Sunil Mohan Adapa, Martin Ayotte,
wens, robh+dt
In-Reply-To: <20190821195217.4166-1-sunil@medhas.org>
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
This patch has been tested on A64-OLinuXino-1Ge16GW with Linux 5.0 from Debain.
Basic benchmarks using Flexible IO Tester show reasonable performance from the
eMMC.
eMMC - Random Write: 21.3MiB/s
eMMC - Sequential Write: 68.2MiB/s
SD Card - Random Write: 1690KiB/s
SD Card - Sequential Write: 11.0MiB/s
Changes:
v3: Separate dts for eMMC variants
v2: Fix descriptions for VCC and VCCQ
Link: https://github.com/armbian/build/commit/174953de1eb09e6aa1ef7075066b573dba625398
Signed-off-by: Martin Ayotte <martinayotte@gmail.com>
[sunil@medhas.org Fix descriptions for VCC and VCCQ, separate dts for eMMC]
Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
Tested-by: Sunil Mohan Adapa <sunil@medhas.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-a64-olinuxino-emmc.dts | 23 +++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 395fe76f6819..d2418021768b 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
new file mode 100644
index 000000000000..96ab0227e82d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Martin Ayotte <martinayotte@gmail.com>
+ * Copyright (C) 2019 Sunil Mohan Adapa <sunil@medhas.org>
+ */
+
+#include "sun50i-a64-olinuxino.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-eMMC";
+ compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <®_dcdc1>;
+ vqmmc-supply = <®_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
--
2.20.1
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* [PATCH v3 1/2] dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC
From: Sunil Mohan Adapa @ 2019-08-21 19:52 UTC (permalink / raw)
To: linux-arm-kernel, devicetree
Cc: maxime.ripard, mark.rutland, wens, robh+dt, Sunil Mohan Adapa
In-Reply-To: <20190821195217.4166-1-sunil@medhas.org>
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
Add new compatible string to the bindings documentation for the A64 OlinuXino
board variant with on-board eMMC.
Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index 93dc4c607f07..972b1e9ee804 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -574,6 +574,11 @@ properties:
- const: olimex,a64-olinuxino
- const: allwinner,sun50i-a64
+ - description: Olimex A64-OlinuXino (with eMMC)
+ items:
+ - const: olimex,a64-olinuxino-emmc
+ - const: allwinner,sun50i-a64
+
- description: Olimex A64 Teres-I
items:
- const: olimex,a64-teres-i
--
2.20.1
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* [PATCH v3 0/2] arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
From: Sunil Mohan Adapa @ 2019-08-21 19:52 UTC (permalink / raw)
To: linux-arm-kernel, devicetree
Cc: maxime.ripard, mark.rutland, wens, robh+dt, Sunil Mohan Adapa
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
Changes:
v3: Separate dts for eMMC variants
v2: Fix descriptions for VCC and VCCQ
Version 2 of this series already committed in linux-sunxi tree as
8d3071f3e85894be35a1b35bcf6fdef970c81018 must be reverted before applying this.
Sunil Mohan Adapa (2):
dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC
arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
.../devicetree/bindings/arm/sunxi.yaml | 5 ++++
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-a64-olinuxino-emmc.dts | 23 +++++++++++++++++++
3 files changed, 29 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
--
2.20.1
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* Re: [RFC,v4,1/4] media: dt-bindings: mt8183: Added camera ISP Pass 1
From: Rob Herring @ 2019-08-21 19:47 UTC (permalink / raw)
To: Jungo Lin
Cc: ryan.yu, frankie.chiu, laurent.pinchart, Rynn.Wu, suleiman,
Jerry-ch.Chen, frederic.chen, linux-media, devicetree,
hverkuil-cisco, shik, yuzhao, linux-mediatek, matthias.bgg,
mchehab, linux-arm-kernel, Sean.Cheng, srv_heupstream, sj.huang,
tfiga, zwisler, ddavenport
In-Reply-To: <20190807124803.29884-2-jungo.lin@mediatek.com>
On Wed, Aug 07, 2019 at 08:48:00PM +0800, Jungo Lin wrote:
> This patch adds DT binding document for the Pass 1 (P1) unit
> in Mediatek's camera ISP system. The Pass 1 unit grabs the sensor
> data out from the sensor interface, applies ISP image effects
> from tuning data and outputs the image data or statistics data to DRAM.
>
> Signed-off-by: Jungo Lin <jungo.lin@mediatek.com>
> ---
> .../bindings/media/mediatek,camisp.txt | 73 +++++++++++++++++++
> 1 file changed, 73 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/mediatek,camisp.txt
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,camisp.txt b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> new file mode 100644
> index 000000000000..fa2713acceca
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,camisp.txt
> @@ -0,0 +1,73 @@
> +* Mediatek Image Signal Processor Pass 1 (ISP P1)
> +
> +The Pass 1 unit of Mediatek's camera ISP system grabs the sensor data out
> +from the sensor interface, applies ISP effects from tuning data and outputs
> +the image data and statistics data to DRAM. Furthermore, Pass 1 unit has
> +the ability to output two different resolutions frames at the same time to
> +increase the performance of the camera application.
> +
> +Required properties:
> +- compatible: Must be "mediatek,mt8183-camisp" for MT8183.
> +- reg: Physical base address of the camera function block register and
> + length of memory mapped region. Must contain an entry for each entry
> + in reg-names.
> +- reg-names: Must include the following entries:
> + "cam_sys": Camera base function block
> + "cam_uni": Camera UNI function block
> + "cam_a": Camera ISP P1 hardware unit A
> + "cam_b": Camera ISP P1 hardware unit B
> + "cam_c": Camera ISP P1 hardware unit C
> +- interrupts: Must contain an entry for each entry in interrupt-names.
> +- interrupt-names : Must include the following entries:
> + "cam_uni": Camera UNI interrupt
> + "cam_a": Camera unit A interrupt
> + "cam_b": Camera unit B interrupt
> + "cam_c": Camera unit C interrupt
> +- iommus: Shall point to the respective IOMMU block with master port
> + as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> + for details.
> +- clocks: A list of phandle and clock specifier pairs as listed
> + in clock-names property, see
> + Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> +- clock-names: Must be "camsys_cam_cgpdn" and "camsys_camtg_cgpdn".
> +- mediatek,larb: Must contain the local arbiters in the current SoCs, see
> + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> + for details.
> +- power-domains: a phandle to the power domain, see
> + Documentation/devicetree/bindings/power/power_domain.txt for details.
> +- mediatek,scp : The node of system control processor (SCP), see
> + Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for details.
> +
> +Example:
> +SoC specific DT entry:
> +
> + camisp: camisp@1a000000 {
> + compatible = "mediatek,mt8183-camisp", "syscon";
syscon doesn't seem appropriate nor is it documented.
> + reg = <0 0x1a000000 0 0x1000>,
> + <0 0x1a003000 0 0x1000>,
> + <0 0x1a004000 0 0x2000>,
> + <0 0x1a006000 0 0x2000>,
> + <0 0x1a008000 0 0x2000>;
> + reg-names = "cam_sys",
> + "cam_uni",
> + "cam_a",
> + "cam_b",
> + "cam_c";
> + interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 254 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 255 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 256 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "cam_uni",
> + "cam_a",
> + "cam_b",
> + "cam_c";
> + iommus = <&iommu M4U_PORT_CAM_IMGO>;
> + clocks = <&camsys CLK_CAM_CAM>,
> + <&camsys CLK_CAM_CAMTG>;
> + clock-names = "camsys_cam_cgpdn",
> + "camsys_camtg_cgpdn";
> + mediatek,larb = <&larb3>,
> + <&larb6>;
> + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>;
> + mediatek,scp = <&scp>;
> + };
> --
> 2.18.0
>
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* Re: [PATCH 16/20] dt-bindings: marvell: Declare the CN913x SoC compatibles
From: Rob Herring @ 2019-08-21 19:37 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland, devicetree, Yan Markman, Antoine Tenart,
Grzegorz Jaszczyk, Gregory Clement, Maxime Chevallier,
Nadav Haklai, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
linux-arm-kernel
In-Reply-To: <20190806145500.24109-17-miquel.raynal@bootlin.com>
On Tue, Aug 06, 2019 at 04:54:56PM +0200, Miquel Raynal wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> Describe the compatible properties for the new Marvell SoCs:
> * CN9130: 1x AP807-quad + 1x CP115 (1x embedded)
> * CN9131: 1x AP807-quad + 2x CP115 (1x embedded + 1x modular)
> * CN9132: 1x AP807-quad + 3x CP115 (1x embedded + 2x modular)
>
> CP115 are similar to CP110 in terms of features.
>
> There are three development boards based on these SoCs:
> * CN9130-DB: comes as a single mother board (with the CP115 bundled)
> * CN9131-DB: same as CN9130-DB with one additional modular CP115
> * CN9132-DB: same as CN9130-DB with two additional modular CP115
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> .../bindings/arm/marvell/armada-7k-8k.txt | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
Please convert this to DT schema first.
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
> index df98a9c82a8c..8eb34ca4c4f0 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.txt
> @@ -1,7 +1,7 @@
> Marvell Armada 7K/8K Platforms Device Tree Bindings
> ---------------------------------------------------
>
> -Boards using a SoC of the Marvell Armada 7K or 8K families must carry
> +Boards using a SoC of the Marvell Armada 7K/8K or CN913x families must carry
> the following root node property:
>
> - compatible, with one of the following values:
> @@ -18,6 +18,17 @@ the following root node property:
> - "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806"
> when the SoC being used is the Armada 8040
>
> + - "marvell,cn9130", "marvell,armada-ap807-quad", "marvell,armada-ap807"
> + when the SoC being used is the Armada CN9130 with no external CP.
> +
> + - "marvell,cn9131", "marvell,cn9130",
> + "marvell,armada-ap807-quad", "marvell,armada-ap807"
> + when the SoC being used is the Armada CN9130 with one external CP.
> +
> + - "marvell,cn9132", "marvell,cn9131", "marvell,cn9130",
> + "marvell,armada-ap807-quad", "marvell,armada-ap807"
It's generally not all that useful to have all these compatibles.
> + when the SoC being used is the Armada CN9130 with two external CPs.
Is the number of external CPs not discoverable somewhere else in the DT?
> +
> Example:
>
> compatible = "marvell,armada7040-db", "marvell,armada7040",
> --
> 2.20.1
>
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