* Re: [BUG] [PATCH v5 02/10] mfd: mt6397: extract irq related code from core driver
From: Matthias Brugger @ 2019-08-23 14:56 UTC (permalink / raw)
To: Frank Wunderlich, Hsin-Hsiung Wang
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, srv_heupstream,
devicetree, Greg Kroah-Hartman, Sean Wang, Liam Girdwood,
Rob Herring, linux-kernel, Richard Fontana, Mark Brown,
linux-mediatek, linux-arm-kernel, René van Dorst,
Thomas Gleixner, Eddie Huang, Lee Jones, Kate Stewart, linux-rtc
In-Reply-To: <trinity-1f82bff1-535e-47cd-9a2f-8faccb56e356-1566562433314@3c-app-gmx-bs11>
On 23/08/2019 14:13, Frank Wunderlich wrote:
> Hi,
>
> this commit breaks mt6323 pmic on BananaPi-R2
>
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=a4872e80ce7d2a1844328176dbf279d0a2b89bdb
>
> resulting in this message in dmesg:
>
> mt6397 1000d000.pwrap:mt6323: unsupported chip: 0x0
> and multiple
> mtk-cpufreq mtk-cpufreq: failed to initialize dvfs info for cpu0
>
> see discussion here:
> http://lists.infradead.org/pipermail/linux-mediatek/2019-August/022505.html
>
> after reverting this one the errors are gone, please provide a fix
are you sure that you provide the correct chip_id here? I saw 0x2023 (if I
remember correctly), while this switch checks for 0x23, 0x91 and 0x97, so I'm
not sure if the problem really lies here. I didn't dig into the code to find out
how the chip_id is created.
Regards,
Matthias
>
> regards Frank
>
>
>> Gesendet: Freitag, 23. August 2019 um 05:45 Uhr
>> Von: "Hsin-Hsiung Wang" <hsin-hsiung.wang@mediatek.com>
>> Betreff: [PATCH v5 02/10] mfd: mt6397: extract irq related code from core driver
>>
>> In order to support different types of irq design, we decide to add
>> separate irq drivers for different design and keep mt6397 mfd core
>> simple and reusable to all generations of PMICs so far.
>>
>> Acked-for-mfd-by: Lee Jones <lee.jones@linaro.org>
>> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
>> ---
>> drivers/mfd/Makefile | 3 +-
>> drivers/mfd/mt6397-core.c | 146 --------------------------------
>> drivers/mfd/mt6397-irq.c | 181 ++++++++++++++++++++++++++++++++++++++++
>> include/linux/mfd/mt6397/core.h | 9 ++
>> 4 files changed, 192 insertions(+), 147 deletions(-)
>> create mode 100644 drivers/mfd/mt6397-irq.c
>
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* [RFC 9/9] ARM: dts: exynos: Remove not accurate secondary ADC compatible
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
The Exynos3250 ADC has its own compatible because of differences from
other Exynos SoCs. Therefore it is not entirely compatible with
samsung,exynos-adc-v2. Remove the samsung,exynos-adc-v2.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm/boot/dts/exynos3250.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 5659c4a10729..784818490376 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -450,8 +450,7 @@
};
adc: adc@126c0000 {
- compatible = "samsung,exynos3250-adc",
- "samsung,exynos-adc-v2";
+ compatible = "samsung,exynos3250-adc";
reg = <0x126C0000 0x100>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "adc", "sclk";
--
2.17.1
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* [RFC 8/9] dt-bindings: iio: adc: exynos: Convert Exynos ADC bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Convert Samsung Exynos Analog to Digital Converter bindings to DT schema
format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../bindings/iio/adc/samsung,exynos-adc.txt | 107 ------------
.../bindings/iio/adc/samsung,exynos-adc.yaml | 159 ++++++++++++++++++
2 files changed, 159 insertions(+), 107 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
create mode 100644 Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
deleted file mode 100644
index e1fe02f3e3e9..000000000000
--- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
+++ /dev/null
@@ -1,107 +0,0 @@
-Samsung Exynos Analog to Digital Converter bindings
-
-The devicetree bindings are for the new ADC driver written for
-Exynos4 and upward SoCs from Samsung.
-
-New driver handles the following
-1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
- and future SoCs from Samsung
-2. Add ADC driver under iio/adc framework
-3. Also adds the Documentation for device tree bindings
-
-Required properties:
-- compatible: Must be "samsung,exynos-adc-v1"
- for Exynos5250 controllers.
- Must be "samsung,exynos-adc-v2" for
- future controllers.
- Must be "samsung,exynos3250-adc" for
- controllers compatible with ADC of Exynos3250.
- Must be "samsung,exynos4212-adc" for
- controllers compatible with ADC of Exynos4212 and Exynos4412.
- Must be "samsung,exynos7-adc" for
- the ADC in Exynos7 and compatibles
- Must be "samsung,s3c2410-adc" for
- the ADC in s3c2410 and compatibles
- Must be "samsung,s3c2416-adc" for
- the ADC in s3c2416 and compatibles
- Must be "samsung,s3c2440-adc" for
- the ADC in s3c2440 and compatibles
- Must be "samsung,s3c2443-adc" for
- the ADC in s3c2443 and compatibles
- Must be "samsung,s3c6410-adc" for
- the ADC in s3c6410 and compatibles
- Must be "samsung,s5pv210-adc" for
- the ADC in s5pv210 and compatibles
-- reg: List of ADC register address range
- - The base address and range of ADC register
- - The base address and range of ADC_PHY register (every
- SoC except for s3c24xx/s3c64xx ADC)
-- interrupts: Contains the interrupt information for the timer. The
- format is being dependent on which interrupt controller
- the Samsung device uses.
-- #io-channel-cells = <1>; As ADC has multiple outputs
-- clocks From common clock bindings: handles to clocks specified
- in "clock-names" property, in the same order.
-- clock-names From common clock bindings: list of clock input names
- used by ADC block:
- - "adc" : ADC bus clock
- - "sclk" : ADC special clock (only for Exynos3250 and
- compatible ADC block)
-- vdd-supply VDD input supply.
-
-- samsung,syscon-phandle Contains the PMU system controller node
- (To access the ADC_PHY register on Exynos5250/5420/5800/3250)
-Optional properties:
-- has-touchscreen: If present, indicates that a touchscreen is
- connected an usable.
-
-Note: child nodes can be added for auto probing from device tree.
-
-Example: adding device info in dtsi file
-
-adc: adc@12d10000 {
- compatible = "samsung,exynos-adc-v1";
- reg = <0x12D10000 0x100>;
- interrupts = <0 106 0>;
- #io-channel-cells = <1>;
- io-channel-ranges;
-
- clocks = <&clock 303>;
- clock-names = "adc";
-
- vdd-supply = <&buck5_reg>;
- samsung,syscon-phandle = <&pmu_system_controller>;
-};
-
-Example: adding device info in dtsi file for Exynos3250 with additional sclk
-
-adc: adc@126c0000 {
- compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
- reg = <0x126C0000 0x100>;
- interrupts = <0 137 0>;
- #io-channel-cells = <1>;
- io-channel-ranges;
-
- clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
- clock-names = "adc", "sclk";
-
- vdd-supply = <&buck5_reg>;
- samsung,syscon-phandle = <&pmu_system_controller>;
-};
-
-Example: Adding child nodes in dts file
-
-adc@12d10000 {
-
- /* NTC thermistor is a hwmon device */
- ncp15wb473@0 {
- compatible = "murata,ncp15wb473";
- pullup-uv = <1800000>;
- pullup-ohm = <47000>;
- pulldown-ohm = <0>;
- io-channels = <&adc 4>;
- };
-};
-
-Note: Does not apply to ADC driver under arch/arm/plat-samsung/
-Note: The child node can be added under the adc node or separately.
diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
new file mode 100644
index 000000000000..c989d455b508
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
@@ -0,0 +1,159 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos Analog to Digital Converter (ADC)
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - samsung,exynos-adc-v1 # Exynos5250
+ - samsung,exynos-adc-v2
+ - samsung,exynos3250-adc
+ - samsung,exynos4212-adc # Exynos4212 and Exynos4412
+ - samsung,exynos7-adc
+ - samsung,s3c2410-adc
+ - samsung,s3c2416-adc
+ - samsung,s3c2440-adc
+ - samsung,s3c2443-adc
+ - samsung,s3c6410-adc
+ - samsung,s5pv210-adc
+ reg:
+ oneOf:
+ - items:
+ - description: base registers
+ - items:
+ # For S5P and Exynos
+ - description: base registers
+ - description: phy registers
+
+ clocks:
+ description:
+ Phandle to ADC bus clock. For Exynos3250 additional clock is needed.
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ description:
+ Must contain clock names matching phandles in clocks property.
+ oneOf:
+ - items:
+ - const: adc
+ - items:
+ # TODO: This can be in any order matching clocks, how to express it?
+ - const: adc
+ - const: sclk
+
+ interrupts:
+ maxItems: 1
+
+ "#io-channel-cells":
+ const: 1
+
+ vdd-supply:
+ description: VDD input supply
+ maxItems: 1
+
+ samsung,syscon-phandle:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ # TODO: reference to PMU schema?
+ description:
+ Phandle to the PMU system controller node (to access the ADC_PHY
+ register on Exynos5250/5420/5800/3250)
+ maxItems: 1
+
+ has-touchscreen:
+ description: If present, indicates that a touchscreen is connected an usable
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - "#io-channel-cells"
+ - samsung,syscon-phandle
+ - vdd-supply
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,exynos-adc-v1
+ - samsung,exynos-adc-v2
+ - samsung,exynos3250-adc
+ - samsung,exynos4212-adc
+ - samsung,exynos7-adc
+ - samsung,s5pv210-adc
+ then:
+ properties:
+ reg:
+ items:
+ # For S5P and Exynos
+ - description: base registers
+ - description: phy registers
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,exynos3250-adc
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: adc
+ - const: sclk
+
+examples:
+ - |
+ adc: adc@12d10000 {
+ compatible = "samsung,exynos-adc-v1";
+ reg = <0x12d10000 0x100>;
+ interrupts = <0 106 0>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ clocks = <&clock 303>;
+ clock-names = "adc";
+
+ vdd-supply = <&buck5_reg>;
+ samsung,syscon-phandle = <&pmu_system_controller>;
+
+ /* NTC thermistor is a hwmon device */
+ ncp15wb473@0 {
+ compatible = "murata,ncp15wb473";
+ pullup-uv = <1800000>;
+ pullup-ohm = <47000>;
+ pulldown-ohm = <0>;
+ io-channels = <&adc 4>;
+ };
+ };
+
+ - |
+ adc@126c0000 {
+ compatible = "samsung,exynos3250-adc";
+ reg = <0x126C0000 0x100>;
+ interrupts = <0 137 0>;
+ #io-channel-cells = <1>;
+ io-channel-ranges;
+
+ clocks = <&cmu 0>, // CLK_TSADC
+ <&cmu 1>; // CLK_SCLK_TSADC
+ clock-names = "adc", "sclk";
+
+ vdd-supply = <&buck5_reg>;
+ samsung,syscon-phandle = <&pmu_system_controller>;
+ };
--
2.17.1
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* [RFC 7/9] dt-bindings: rtc: s3c: Convert S3C/Exynos RTC bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Convert Samsung S3C/Exynos Real Time Clock bindings to DT schema format
using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../devicetree/bindings/rtc/s3c-rtc.txt | 31 ------
.../devicetree/bindings/rtc/s3c-rtc.yaml | 95 +++++++++++++++++++
2 files changed, 95 insertions(+), 31 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/rtc/s3c-rtc.txt
create mode 100644 Documentation/devicetree/bindings/rtc/s3c-rtc.yaml
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt b/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
deleted file mode 100644
index fdde63a5419c..000000000000
--- a/Documentation/devicetree/bindings/rtc/s3c-rtc.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-* Samsung's S3C Real Time Clock controller
-
-Required properties:
-- compatible: should be one of the following.
- * "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc.
- * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
- * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
- * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
- * "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with
- exynos3250 rtc (use "samsung,s3c6410-rtc").
-- reg: physical base address of the controller and length of memory mapped
- region.
-- interrupts: Two interrupt numbers to the cpu should be specified. First
- interrupt number is the rtc alarm interrupt and second interrupt number
- is the rtc tick interrupt. The number of cells representing a interrupt
- depends on the parent interrupt controller.
-- clocks: Must contain a list of phandle and clock specifier for the rtc
- clock and in the case of a s3c6410 compatible controller, also
- a source clock.
-- clock-names: Must contain "rtc" and for a s3c6410 compatible controller,
- a "rtc_src" sorted in the same order as the clocks property.
-
-Example:
-
- rtc@10070000 {
- compatible = "samsung,s3c6410-rtc";
- reg = <0x10070000 0x100>;
- interrupts = <44 0 45 0>;
- clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
- clock-names = "rtc", "rtc_src";
- };
diff --git a/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml
new file mode 100644
index 000000000000..44b021812a83
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/s3c-rtc.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/s3c-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung S3C, S5P and Exynos Real Time Clock controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+# Select also deprecated compatibles (for finding deprecate usage)
+select:
+ properties:
+ compatible:
+ items:
+ - enum:
+ - samsung,s3c2410-rtc
+ - samsung,s3c2416-rtc
+ - samsung,s3c2443-rtc
+ - samsung,s3c6410-rtc
+ # Deprecated, use samsung,s3c6410-rtc
+ - samsung,exynos3250-rtc
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - samsung,s3c2410-rtc
+ - samsung,s3c2416-rtc
+ - samsung,s3c2443-rtc
+ - samsung,s3c6410-rtc
+ reg:
+ maxItems: 1
+
+ clocks:
+ description:
+ Must contain a list of phandle and clock specifier for the rtc
+ clock and in the case of a s3c6410 compatible controller, also
+ a source clock.
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ description:
+ Must contain "rtc" and for a s3c6410 compatible controller,
+ a "rtc_src" sorted in the same order as the clocks property.
+ oneOf:
+ - items:
+ - const: rtc
+ - items:
+ # TODO: This can be in any order matching clocks, how to express it?
+ - const: rtc
+ - const: rtc_src
+
+ interrupts:
+ description:
+ Two interrupt numbers to the cpu should be specified. First
+ interrupt number is the rtc alarm interrupt and second interrupt number
+ is the rtc tick interrupt. The number of cells representing a interrupt
+ depends on the parent interrupt controller.
+ minItems: 2
+ maxItems: 2
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - samsung,s3c6410-rtc
+ - samsung,exynos3250-rtc
+
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: rtc
+ - const: rtc_src
+
+examples:
+ - |
+ rtc@10070000 {
+ compatible = "samsung,s3c6410-rtc";
+ reg = <0x10070000 0x100>;
+ interrupts = <0 44 4>, <0 45 4>;
+ clocks = <&clock 0>, // CLK_RTC
+ <&s2mps11_osc 0>; // S2MPS11_CLK_AP
+ clock-names = "rtc", "rtc_src";
+ };
--
2.17.1
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* [RFC 6/9] dt-bindings: arm: samsung: Convert Exynos System Registers bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Convert Samsung Exynos System Registers (SYSREG) bindings to DT schema
format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
Example somehow fails:
Documentation/devicetree/bindings/arm/samsung/pmu.example.dt.yaml:
system-controller@10040000: compatible:0: 'samsung,exynos5250-pmu' is
not one of ['samsung,exynos4-sysreg', 'samsung,exynos5-sysreg']
It seems that PMU schema is applied to sysreq nodes (and vice-versa).
---
.../bindings/arm/samsung/sysreg.txt | 19 -----------
.../bindings/arm/samsung/sysreg.yaml | 33 +++++++++++++++++++
2 files changed, 33 insertions(+), 19 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/samsung/sysreg.txt
create mode 100644 Documentation/devicetree/bindings/arm/samsung/sysreg.yaml
diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt b/Documentation/devicetree/bindings/arm/samsung/sysreg.txt
deleted file mode 100644
index 4fced6e9d5e4..000000000000
--- a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt
+++ /dev/null
@@ -1,19 +0,0 @@
-SAMSUNG S5P/Exynos SoC series System Registers (SYSREG)
-
-Properties:
- - compatible : should contain two values. First value must be one from following list:
- - "samsung,exynos4-sysreg" - for Exynos4 based SoCs,
- - "samsung,exynos5-sysreg" - for Exynos5 based SoCs.
- second value must be always "syscon".
- - reg : offset and length of the register set.
-
-Example:
- syscon@10010000 {
- compatible = "samsung,exynos4-sysreg", "syscon";
- reg = <0x10010000 0x400>;
- };
-
- syscon@10050000 {
- compatible = "samsung,exynos5-sysreg", "syscon";
- reg = <0x10050000 0x5000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml b/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml
new file mode 100644
index 000000000000..a3d44646e441
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/samsung/sysreg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung S5P/Exynos SoC series System Registers (SYSREG)
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - samsung,exynos4-sysreg
+ - samsung,exynos5-sysreg
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+examples:
+ - |
+ syscon@10010000 {
+ compatible = "samsung,exynos4-sysreg", "syscon";
+ reg = <0x10010000 0x400>;
+ };
+
+ syscon@10050000 {
+ compatible = "samsung,exynos5-sysreg", "syscon";
+ reg = <0x10050000 0x5000>;
+ };
--
2.17.1
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^ permalink raw reply related
* [RFC 5/9] dt-bindings: arm: samsung: Convert Exynos PMU bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Convert Samsung Exynos Power Management Unit (PMU) bindings to DT schema
format using json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../devicetree/bindings/arm/samsung/pmu.txt | 72 --------------
.../devicetree/bindings/arm/samsung/pmu.yaml | 93 +++++++++++++++++++
2 files changed, 93 insertions(+), 72 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/samsung/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
deleted file mode 100644
index 433bfd7593ac..000000000000
--- a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
+++ /dev/null
@@ -1,72 +0,0 @@
-SAMSUNG Exynos SoC series PMU Registers
-
-Properties:
- - compatible : should contain two values. First value must be one from following list:
- - "samsung,exynos3250-pmu" - for Exynos3250 SoC,
- - "samsung,exynos4210-pmu" - for Exynos4210 SoC,
- - "samsung,exynos4412-pmu" - for Exynos4412 SoC,
- - "samsung,exynos5250-pmu" - for Exynos5250 SoC,
- - "samsung,exynos5260-pmu" - for Exynos5260 SoC.
- - "samsung,exynos5410-pmu" - for Exynos5410 SoC,
- - "samsung,exynos5420-pmu" - for Exynos5420 SoC.
- - "samsung,exynos5433-pmu" - for Exynos5433 SoC.
- - "samsung,exynos7-pmu" - for Exynos7 SoC.
- second value must be always "syscon".
-
- - reg : offset and length of the register set.
-
- - #clock-cells : must be <1>, since PMU requires once cell as clock specifier.
- The single specifier cell is used as index to list of clocks
- provided by PMU, which is currently:
- 0 : SoC clock output (CLKOUT pin)
-
- - clock-names : list of clock names for particular CLKOUT mux inputs in
- following format:
- "clkoutN", where N is a decimal number corresponding to
- CLKOUT mux control bits value for given input, e.g.
- "clkout0", "clkout7", "clkout15".
-
- - clocks : list of phandles and specifiers to all input clocks listed in
- clock-names property.
-
-Optional properties:
-
-Some PMUs are capable of behaving as an interrupt controller (mostly
-to wake up a suspended PMU). In which case, they can have the
-following properties:
-
-- interrupt-controller: indicate that said PMU is an interrupt controller
-
-- #interrupt-cells: must be identical to the that of the parent interrupt
- controller.
-
-
-Optional nodes:
-
-- nodes defining the restart and poweroff syscon children
-
-
-Example :
-pmu_system_controller: system-controller@10040000 {
- compatible = "samsung,exynos5250-pmu", "syscon";
- reg = <0x10040000 0x5000>;
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupt-parent = <&gic>;
- #clock-cells = <1>;
- clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
- "clkout4", "clkout8", "clkout9";
- clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
- <&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
- <&clock CLK_OUT_CPU>, <&clock CLK_XXTI>,
- <&clock CLK_XUSBXTI>;
-};
-
-Example of clock consumer :
-
-usb3503: usb3503@8 {
- /* ... */
- clock-names = "refclk";
- clocks = <&pmu_system_controller 0>;
- /* ... */
-};
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml
new file mode 100644
index 000000000000..818c6f3488ef
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/samsung/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC series Power Management Unit (PMU)
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - samsung,exynos3250-pmu
+ - samsung,exynos4210-pmu
+ - samsung,exynos4412-pmu
+ - samsung,exynos5250-pmu
+ - samsung,exynos5260-pmu
+ - samsung,exynos5410-pmu
+ - samsung,exynos5420-pmu
+ - samsung,exynos5433-pmu
+ - samsung,exynos7-pmu
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#clock-cells':
+ const: 1
+
+ clock-names:
+ description:
+ list of clock names for particular CLKOUT mux inputs
+ # TODO: what is the maximum number of elements (mux inputs)?
+ minItems: 1
+ maxItems: 32
+ items:
+ - enum:
+ - clkout0
+ - clkout1
+ - clkout2
+ - clkout3
+ - clkout4
+ - clkout5
+ - clkout6
+ - clkout7
+ - clkout8
+ - clkout9
+ - clkout10
+ - clkout11
+ - clkout12
+ - clkout13
+ - clkout14
+ - clkout15
+ - clkout16
+
+ clocks:
+ minItems: 1
+ maxItems: 32
+
+ interrupt-controller:
+ description:
+ Some PMUs are capable of behaving as an interrupt controller (mostly
+ to wake up a suspended PMU).
+
+ '#interrupt-cells':
+ # TODO: must be identical to the that of the parent interrupt controller.
+ const: 3
+
+ # TODO: Mark interrupt-controller and #interrupt-cells as required, if one is present
+ # TODO: nodes defining the restart and poweroff syscon children
+
+required:
+ - compatible
+ - reg
+ - '#clock-cells'
+ - clock-names
+ - clocks
+
+examples:
+ - |
+ pmu_system_controller: system-controller@10040000 {
+ compatible = "samsung,exynos5250-pmu", "syscon";
+ reg = <0x10040000 0x5000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ #clock-cells = <1>;
+ clock-names = "clkout16";
+ clocks = <&clock 0>; // CLK_FIN_PLL
+ };
--
2.17.1
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^ permalink raw reply related
* [RFC 4/9] dt-bindings: arm: samsung: Convert Exynos Chipid bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Convert Samsung Exynos Chipid bindings to DT schema format using
json-schema.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../bindings/arm/samsung/exynos-chipid.txt | 12 ----------
.../bindings/arm/samsung/exynos-chipid.yaml | 24 +++++++++++++++++++
2 files changed, 24 insertions(+), 12 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt
create mode 100644 Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt
deleted file mode 100644
index 85c5dfd4a720..000000000000
--- a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-SAMSUNG Exynos SoCs Chipid driver.
-
-Required properties:
-- compatible : Should at least contain "samsung,exynos4210-chipid".
-
-- reg: offset and length of the register set
-
-Example:
- chipid@10000000 {
- compatible = "samsung,exynos4210-chipid";
- reg = <0x10000000 0x100>;
- };
diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml
new file mode 100644
index 000000000000..d22d5376a11e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/exynos-chipid.yaml
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/samsung/exynos-chipid.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC series Chipid driver
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ compatible:
+ items:
+ - const: samsung,exynos4210-chipid
+ reg:
+ maxItems: 1
+
+examples:
+ - |
+ chipid@10000000 {
+ compatible = "samsung,exynos4210-chipid";
+ reg = <0x10000000 0x100>;
+ };
--
2.17.1
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^ permalink raw reply related
* [RFC 3/9] dt-bindings: arm: samsung: Document missing Exynos7 boards bindings
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Add missing documentation of ARMv8 Samsung Exynos7 SoC based boards
bindings.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../devicetree/bindings/arm/samsung/samsung-boards.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index f8da3b5fb374..c640191c5d73 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -174,6 +174,12 @@ properties:
- samsung,tm2e # Samsung TM2E
- const: samsung,exynos5433
+ - description: Exynos7 based boards
+ items:
+ - enum:
+ - samsung,exynos7-espresso # Samsung Exynos7 Espresso
+ - const: samsung,exynos7
+
firmware:
type: object
description:
--
2.17.1
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^ permalink raw reply related
* [RFC 2/9] dt-bindings: arm: samsung: Document missing S5Pv210 boards bindings
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
In-Reply-To: <20190823145356.6341-1-krzk@kernel.org>
Add missing documentation of Samsung S5Pv210 SoC based boards bindings.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
.../bindings/arm/samsung/samsung-boards.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
index e963fd70c436..f8da3b5fb374 100644
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -14,6 +14,16 @@ properties:
const: '/'
compatible:
oneOf:
+ - description: S5PV210 based boards
+ items:
+ - enum:
+ - aesop,torbreck # aESOP Torbreck based on S5PV210
+ - samsung,aquila # Samsung Aquila based on S5PC110
+ - samsung,goni # Samsung Goni based on S5PC110
+ - yic,smdkc110 # YIC System SMDKC110 based on S5PC110
+ - yic,smdkv210 # YIC System SMDKV210 based on S5PV210
+ - const: samsung,s5pv210
+
- description: S5PV210 based Aries boards
items:
- enum:
--
2.17.1
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^ permalink raw reply related
* [RFC 1/9] dt-bindings: arm: samsung: Convert Samsung board/soc bindings to json-schema
From: Krzysztof Kozlowski @ 2019-08-23 14:53 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Krzysztof Kozlowski, Jonathan Cameron,
Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Alessandro Zummo, Alexandre Belloni, Paweł Chmiel,
devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
linux-iio, linux-rtc
Cc: Olof Johansson, Marek Szyprowski, Tomasz Figa, Arnd Bergmann,
notify
Convert Samsung S5P and Exynos SoC bindings to DT schema format using
json-schema. This is purely conversion of already documented bindings
so it does not cover all of DTS in the Linux kernel (few S5P/Exynos and
all S3C are missing).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
If the schema looks sensible, I will continue on converting other
SoC and driver bindings and later adding missing schemas (S3C
SoCs).
---
.../bindings/arm/samsung/samsung-boards.txt | 83 --------
.../bindings/arm/samsung/samsung-boards.yaml | 188 ++++++++++++++++++
2 files changed, 188 insertions(+), 83 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
create mode 100644 Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
deleted file mode 100644
index 56021bf2a916..000000000000
--- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
+++ /dev/null
@@ -1,83 +0,0 @@
-* Samsung's Exynos and S5P SoC based boards
-
-Required root node properties:
- - compatible = should be one or more of the following.
- - "samsung,aries" - for S5PV210-based Samsung Aries board.
- - "samsung,fascinate4g" - for S5PV210-based Samsung Galaxy S Fascinate 4G (SGH-T959P) board.
- - "samsung,galaxys" - for S5PV210-based Samsung Galaxy S (i9000) board.
- - "samsung,artik5" - for Exynos3250-based Samsung ARTIK5 module.
- - "samsung,artik5-eval" - for Exynos3250-based Samsung ARTIK5 eval board.
- - "samsung,monk" - for Exynos3250-based Samsung Simband board.
- - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
- - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
- - "samsung,trats" - for Exynos4210-based Tizen Reference board.
- - "samsung,universal_c210" - for Exynos4210-based Samsung board.
- - "samsung,i9300" - for Exynos4412-based Samsung GT-I9300 board.
- - "samsung,i9305" - for Exynos4412-based Samsung GT-I9305 board.
- - "samsung,midas" - for Exynos4412-based Samsung Midas board.
- - "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
- - "samsung,n710x" - for Exynos4412-based Samsung GT-N7100/GT-N7105 board.
- - "samsung,trats2" - for Exynos4412-based Tizen Reference board.
- - "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
- - "samsung,xyref5260" - for Exynos5260-based Samsung board.
- - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
- - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
- - "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
- - "samsung,tm2e" - for Exynos5433-based Samsung TM2E board.
-
-* Other companies Exynos SoC based
- * FriendlyARM
- - "friendlyarm,tiny4412" - for Exynos4412-based FriendlyARM
- TINY4412 board.
- * TOPEET
- - "topeet,itop4412-elite" - for Exynos4412-based TOPEET
- Elite base board.
-
- * Google
- - "google,pi" - for Exynos5800-based Google Peach Pi
- Rev 10+ board,
- also: "google,pi-rev16", "google,pi-rev15", "google,pi-rev14",
- "google,pi-rev13", "google,pi-rev12", "google,pi-rev11",
- "google,pi-rev10", "google,peach".
-
- - "google,pit" - for Exynos5420-based Google Peach Pit
- Rev 6+ (Exynos5420),
- also: "google,pit-rev16", "google,pit-rev15", "google,pit-rev14",
- "google,pit-rev13", "google,pit-rev12", "google,pit-rev11",
- "google,pit-rev10", "google,pit-rev9", "google,pit-rev8",
- "google,pit-rev7", "google,pit-rev6", "google,peach".
-
- - "google,snow-rev4" - for Exynos5250-based Google Snow board,
- also: "google,snow"
- - "google,snow-rev5" - for Exynos5250-based Google Snow
- Rev 5+ board.
- - "google,spring" - for Exynos5250-based Google Spring board.
-
- * Hardkernel
- - "hardkernel,odroid-u3" - for Exynos4412-based Hardkernel Odroid U3.
- - "hardkernel,odroid-x" - for Exynos4412-based Hardkernel Odroid X.
- - "hardkernel,odroid-x2" - for Exynos4412-based Hardkernel Odroid X2.
- - "hardkernel,odroid-xu" - for Exynos5410-based Hardkernel Odroid XU.
- - "hardkernel,odroid-xu3" - for Exynos5422-based Hardkernel Odroid XU3.
- - "hardkernel,odroid-xu3-lite" - for Exynos5422-based Hardkernel
- Odroid XU3 Lite board.
- - "hardkernel,odroid-xu4" - for Exynos5422-based Hardkernel Odroid XU4.
- - "hardkernel,odroid-hc1" - for Exynos5422-based Hardkernel Odroid HC1.
-
- * Insignal
- - "insignal,arndale" - for Exynos5250-based Insignal Arndale board.
- - "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale
- Octa board.
- - "insignal,origen" - for Exynos4210-based Insignal Origen board.
- - "insignal,origen4412" - for Exynos4412-based Insignal Origen board.
-
-
-Optional nodes:
- - firmware node, specifying presence and type of secure firmware:
- - compatible: only "samsung,secure-firmware" is currently supported
- - reg: address of non-secure SYSRAM used for communication with firmware
-
- firmware@203f000 {
- compatible = "samsung,secure-firmware";
- reg = <0x0203F000 0x1000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
new file mode 100644
index 000000000000..e963fd70c436
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml
@@ -0,0 +1,188 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/samsung/samsung-boards.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos and S5P SoC based boards
+
+maintainers:
+ - Krzysztof Kozlowski <krzk@kernel.org>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: S5PV210 based Aries boards
+ items:
+ - enum:
+ - samsung,fascinate4g # Samsung Galaxy S Fascinate 4G (SGH-T959P)
+ - samsung,galaxys # Samsung Galaxy S (i9000)
+ - const: samsung,aries
+ - const: samsung,s5pv210
+
+ - description: Exynos3250 based boards
+ items:
+ - enum:
+ - samsung,monk # Samsung Simband
+ - samsung,rinato # Samsung Gear2
+ - const: samsung,exynos3250
+ - const: samsung,exynos3
+
+ - description: Samsung ARTIK5 boards
+ items:
+ - enum:
+ - samsung,artik5-eval # Samsung ARTIK5 eval board
+ - const: samsung,artik5 # Samsung ARTIK5 module
+ - const: samsung,exynos3250
+ - const: samsung,exynos3
+
+ - description: Exynos4210 based boards
+ items:
+ - enum:
+ - insignal,origen # Insignal Origen
+ - samsung,smdkv310 # Samsung SMDKV310 eval
+ - samsung,trats # Samsung Tizen Reference
+ - samsung,universal_c210 # Samsung C210
+ - const: samsung,exynos4210
+ - const: samsung,exynos4
+
+ - description: Exynos4412 based boards
+ items:
+ - enum:
+ - friendlyarm,tiny4412 # FriendlyARM TINY4412
+ - hardkernel,odroid-u3 # Hardkernel Odroid U3
+ - hardkernel,odroid-x # Hardkernel Odroid X
+ - hardkernel,odroid-x2 # Hardkernel Odroid X2
+ - insignal,origen4412 # Insignal Origen
+ - samsung,smdk4412 # Samsung SMDK4412 eval
+ - topeet,itop4412-elite # TOPEET Elite base
+ - const: samsung,exynos4412
+ - const: samsung,exynos4
+
+ - description: Samsung Midas family boards
+ items:
+ - enum:
+ - samsung,i9300 # Samsung GT-I9300
+ - samsung,i9305 # Samsung GT-I9305
+ - samsung,n710x # Samsung GT-N7100/GT-N7105
+ - samsung,trats2 # Samsung Tizen Reference
+ - const: samsung,midas
+ - const: samsung,exynos4412
+ - const: samsung,exynos4
+
+ - description: Exynos5250 based boards
+ items:
+ - enum:
+ - google,snow-rev5 # Google Snow Rev 5+
+ - google,spring # Google Spring
+ - insignal,arndale # Insignal Arndale
+ - samsung,smdk5250 # Samsung SMDK5250 eval
+ - const: samsung,exynos5250
+ - const: samsung,exynos5
+
+ - description: Google Snow Boards (Rev 4+)
+ items:
+ - enum:
+ - google,snow-rev4
+ - const: google,snow
+ - const: samsung,exynos5250
+ - const: samsung,exynos5
+
+ - description: Exynos5260 based boards
+ items:
+ - enum:
+ - samsung,xyref5260 # Samsung Xyref5260 eval
+ - const: samsung,exynos5260
+ - const: samsung,exynos5
+
+ - description: Exynos5410 based boards
+ items:
+ - enum:
+ - hardkernel,odroid-xu # Hardkernel Odroid XU
+ - samsung,smdk5410 # Samsung SMDK5410 eval
+ - const: samsung,exynos5410
+ - const: samsung,exynos5
+
+ - description: Exynos5420 based boards
+ items:
+ - enum:
+ - insignal,arndale-octa # Insignal Arndale Octa
+ - samsung,smdk5420 # Samsung SMDK5420 eval
+ - const: samsung,exynos5420
+ - const: samsung,exynos5
+
+ - description: Google Peach Pit Boards (Rev 6+)
+ items:
+ - enum:
+ - google,pit-rev16
+ - const: google,pit-rev15
+ - const: google,pit-rev14
+ - const: google,pit-rev13
+ - const: google,pit-rev12
+ - const: google,pit-rev11
+ - const: google,pit-rev10
+ - const: google,pit-rev9
+ - const: google,pit-rev8
+ - const: google,pit-rev7
+ - const: google,pit-rev6
+ - const: google,pit
+ - const: google,peach
+ - const: samsung,exynos5420
+ - const: samsung,exynos5
+
+ - description: Exynos5800 based boards
+ items:
+ - enum:
+ - hardkernel,odroid-xu3 # Hardkernel Odroid XU3
+ - hardkernel,odroid-xu3-lite # Hardkernel Odroid XU3 Lite
+ - hardkernel,odroid-xu4 # Hardkernel Odroid XU4
+ - hardkernel,odroid-hc1 # Hardkernel Odroid HC1
+ - const: samsung,exynos5800
+ - const: samsung,exynos5
+
+ - description: Google Peach Pi Boards (Rev 10+)
+ items:
+ - enum:
+ - google,pi-rev16
+ - const: google,pi-rev15
+ - const: google,pi-rev14
+ - const: google,pi-rev13
+ - const: google,pi-rev12
+ - const: google,pi-rev11
+ - const: google,pi-rev10
+ - const: google,pi
+ - const: google,peach
+ - const: samsung,exynos5800
+ - const: samsung,exynos5
+
+ - description: Exynos5433 based boards
+ items:
+ - enum:
+ - samsung,tm2 # Samsung TM2
+ - samsung,tm2e # Samsung TM2E
+ - const: samsung,exynos5433
+
+ firmware:
+ type: object
+ description:
+ node specifying presence and type of secure firmware
+ properties:
+ compatible:
+ enum:
+ - samsung,secure-firmware
+ reg:
+ description:
+ address of non-secure SYSRAM used for communication with firmware
+ maxItems: 1
+
+required:
+ - compatible
+
+examples:
+ - |
+ firmware@203f000 {
+ compatible = "samsung,secure-firmware";
+ reg = <0x0203F000 0x1000>;
+ };
--
2.17.1
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^ permalink raw reply related
* Re: [PATCH v5 02/10] mfd: mt6397: extract irq related code from core driver
From: Matthias Brugger @ 2019-08-23 14:53 UTC (permalink / raw)
To: Hsin-Hsiung Wang, Lee Jones, Rob Herring, Mark Brown,
Alexandre Belloni
Cc: Mark Rutland, Alessandro Zummo, srv_heupstream, devicetree,
Greg Kroah-Hartman, Sean Wang, Liam Girdwood, linux-kernel,
Richard Fontana, linux-mediatek, linux-arm-kernel,
Thomas Gleixner, Eddie Huang, Kate Stewart, linux-rtc
In-Reply-To: <1566531931-9772-3-git-send-email-hsin-hsiung.wang@mediatek.com>
On 23/08/2019 05:45, Hsin-Hsiung Wang wrote:
> In order to support different types of irq design, we decide to add
> separate irq drivers for different design and keep mt6397 mfd core
> simple and reusable to all generations of PMICs so far.
>
> Acked-for-mfd-by: Lee Jones <lee.jones@linaro.org>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/mfd/Makefile | 3 +-
> drivers/mfd/mt6397-core.c | 146 --------------------------------
> drivers/mfd/mt6397-irq.c | 181 ++++++++++++++++++++++++++++++++++++++++
> include/linux/mfd/mt6397/core.h | 9 ++
> 4 files changed, 192 insertions(+), 147 deletions(-)
> create mode 100644 drivers/mfd/mt6397-irq.c
>
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index f026ada..9a96325 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -241,7 +241,8 @@ obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o
> obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o
> obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC) += intel_soc_pmic_chtwc.o
> obj-$(CONFIG_INTEL_SOC_PMIC_CHTDC_TI) += intel_soc_pmic_chtdc_ti.o
> -obj-$(CONFIG_MFD_MT6397) += mt6397-core.o
> +mt6397-objs := mt6397-core.o mt6397-irq.o
> +obj-$(CONFIG_MFD_MT6397) += mt6397.o
>
> obj-$(CONFIG_MFD_ALTERA_A10SR) += altera-a10sr.o
> obj-$(CONFIG_MFD_ALTERA_SYSMGR) += altera-sysmgr.o
> diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
> index c070862..93c8881 100644
> --- a/drivers/mfd/mt6397-core.c
> +++ b/drivers/mfd/mt6397-core.c
> @@ -18,10 +18,6 @@
> #define MT6397_RTC_BASE 0xe000
> #define MT6397_RTC_SIZE 0x3e
>
> -#define MT6323_CHIP_ID 0x23
> -#define MT6391_CHIP_ID 0x91
> -#define MT6397_CHIP_ID 0x97
> -
> static const struct resource mt6397_rtc_resources[] = {
> {
> .start = MT6397_RTC_BASE,
> @@ -86,148 +82,6 @@
> }
> };
>
> -static void mt6397_irq_lock(struct irq_data *data)
> -{
> - struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> -
> - mutex_lock(&mt6397->irqlock);
> -}
> -
> -static void mt6397_irq_sync_unlock(struct irq_data *data)
> -{
> - struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> -
> - regmap_write(mt6397->regmap, mt6397->int_con[0],
> - mt6397->irq_masks_cur[0]);
> - regmap_write(mt6397->regmap, mt6397->int_con[1],
> - mt6397->irq_masks_cur[1]);
> -
> - mutex_unlock(&mt6397->irqlock);
> -}
> -
> -static void mt6397_irq_disable(struct irq_data *data)
> -{
> - struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> - int shift = data->hwirq & 0xf;
> - int reg = data->hwirq >> 4;
> -
> - mt6397->irq_masks_cur[reg] &= ~BIT(shift);
> -}
> -
> -static void mt6397_irq_enable(struct irq_data *data)
> -{
> - struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> - int shift = data->hwirq & 0xf;
> - int reg = data->hwirq >> 4;
> -
> - mt6397->irq_masks_cur[reg] |= BIT(shift);
> -}
> -
> -#ifdef CONFIG_PM_SLEEP
> -static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
> -{
> - struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
> - int shift = irq_data->hwirq & 0xf;
> - int reg = irq_data->hwirq >> 4;
> -
> - if (on)
> - mt6397->wake_mask[reg] |= BIT(shift);
> - else
> - mt6397->wake_mask[reg] &= ~BIT(shift);
> -
> - return 0;
> -}
> -#else
> -#define mt6397_irq_set_wake NULL
> -#endif
> -
> -static struct irq_chip mt6397_irq_chip = {
> - .name = "mt6397-irq",
> - .irq_bus_lock = mt6397_irq_lock,
> - .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
> - .irq_enable = mt6397_irq_enable,
> - .irq_disable = mt6397_irq_disable,
> - .irq_set_wake = mt6397_irq_set_wake,
> -};
> -
> -static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
> - int irqbase)
> -{
> - unsigned int status;
> - int i, irq, ret;
> -
> - ret = regmap_read(mt6397->regmap, reg, &status);
> - if (ret) {
> - dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
> - return;
> - }
> -
> - for (i = 0; i < 16; i++) {
> - if (status & BIT(i)) {
> - irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
> - if (irq)
> - handle_nested_irq(irq);
> - }
> - }
> -
> - regmap_write(mt6397->regmap, reg, status);
> -}
> -
> -static irqreturn_t mt6397_irq_thread(int irq, void *data)
> -{
> - struct mt6397_chip *mt6397 = data;
> -
> - mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
> - mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
> -
> - return IRQ_HANDLED;
> -}
> -
> -static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
> - irq_hw_number_t hw)
> -{
> - struct mt6397_chip *mt6397 = d->host_data;
> -
> - irq_set_chip_data(irq, mt6397);
> - irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
> - irq_set_nested_thread(irq, 1);
> - irq_set_noprobe(irq);
> -
> - return 0;
> -}
> -
> -static const struct irq_domain_ops mt6397_irq_domain_ops = {
> - .map = mt6397_irq_domain_map,
> -};
> -
> -static int mt6397_irq_init(struct mt6397_chip *mt6397)
> -{
> - int ret;
> -
> - mutex_init(&mt6397->irqlock);
> -
> - /* Mask all interrupt sources */
> - regmap_write(mt6397->regmap, mt6397->int_con[0], 0x0);
> - regmap_write(mt6397->regmap, mt6397->int_con[1], 0x0);
> -
> - mt6397->irq_domain = irq_domain_add_linear(mt6397->dev->of_node,
> - MT6397_IRQ_NR, &mt6397_irq_domain_ops, mt6397);
> - if (!mt6397->irq_domain) {
> - dev_err(mt6397->dev, "could not create irq domain\n");
> - return -ENOMEM;
> - }
> -
> - ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL,
> - mt6397_irq_thread, IRQF_ONESHOT, "mt6397-pmic", mt6397);
> - if (ret) {
> - dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n",
> - mt6397->irq, ret);
> - return ret;
> - }
> -
> - return 0;
> -}
> -
> #ifdef CONFIG_PM_SLEEP
> static int mt6397_irq_suspend(struct device *dev)
> {
> diff --git a/drivers/mfd/mt6397-irq.c b/drivers/mfd/mt6397-irq.c
> new file mode 100644
> index 0000000..b2d3ce1
> --- /dev/null
> +++ b/drivers/mfd/mt6397-irq.c
> @@ -0,0 +1,181 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2019 MediaTek Inc.
> +
> +#include <linux/interrupt.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/mfd/mt6323/core.h>
> +#include <linux/mfd/mt6323/registers.h>
> +#include <linux/mfd/mt6397/core.h>
> +#include <linux/mfd/mt6397/registers.h>
> +
> +static void mt6397_irq_lock(struct irq_data *data)
> +{
> + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> +
> + mutex_lock(&mt6397->irqlock);
> +}
> +
> +static void mt6397_irq_sync_unlock(struct irq_data *data)
> +{
> + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> +
> + regmap_write(mt6397->regmap, mt6397->int_con[0],
> + mt6397->irq_masks_cur[0]);
> + regmap_write(mt6397->regmap, mt6397->int_con[1],
> + mt6397->irq_masks_cur[1]);
> +
> + mutex_unlock(&mt6397->irqlock);
> +}
> +
> +static void mt6397_irq_disable(struct irq_data *data)
> +{
> + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> + int shift = data->hwirq & 0xf;
> + int reg = data->hwirq >> 4;
> +
> + mt6397->irq_masks_cur[reg] &= ~BIT(shift);
> +}
> +
> +static void mt6397_irq_enable(struct irq_data *data)
> +{
> + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
> + int shift = data->hwirq & 0xf;
> + int reg = data->hwirq >> 4;
> +
> + mt6397->irq_masks_cur[reg] |= BIT(shift);
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
> +{
> + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
> + int shift = irq_data->hwirq & 0xf;
> + int reg = irq_data->hwirq >> 4;
> +
> + if (on)
> + mt6397->wake_mask[reg] |= BIT(shift);
> + else
> + mt6397->wake_mask[reg] &= ~BIT(shift);
> +
> + return 0;
> +}
> +#else
> +#define mt6397_irq_set_wake NULL
> +#endif
> +
> +static struct irq_chip mt6397_irq_chip = {
> + .name = "mt6397-irq",
> + .irq_bus_lock = mt6397_irq_lock,
> + .irq_bus_sync_unlock = mt6397_irq_sync_unlock,
> + .irq_enable = mt6397_irq_enable,
> + .irq_disable = mt6397_irq_disable,
> + .irq_set_wake = mt6397_irq_set_wake,
> +};
> +
> +static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
> + int irqbase)
> +{
> + unsigned int status;
> + int i, irq, ret;
> +
> + ret = regmap_read(mt6397->regmap, reg, &status);
> + if (ret) {
> + dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
> + return;
> + }
> +
> + for (i = 0; i < 16; i++) {
> + if (status & BIT(i)) {
> + irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
> + if (irq)
> + handle_nested_irq(irq);
> + }
> + }
> +
> + regmap_write(mt6397->regmap, reg, status);
> +}
> +
> +static irqreturn_t mt6397_irq_thread(int irq, void *data)
> +{
> + struct mt6397_chip *mt6397 = data;
> +
> + mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
> + mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
> + irq_hw_number_t hw)
> +{
> + struct mt6397_chip *mt6397 = d->host_data;
> +
> + irq_set_chip_data(irq, mt6397);
> + irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
> + irq_set_nested_thread(irq, 1);
> + irq_set_noprobe(irq);
> +
> + return 0;
> +}
> +
> +static const struct irq_domain_ops mt6397_irq_domain_ops = {
> + .map = mt6397_irq_domain_map,
> +};
> +
> +int mt6397_irq_init(struct mt6397_chip *chip)
> +{
> + int ret;
> +
> + mutex_init(&chip->irqlock);
> +
> + switch (chip->chip_id) {
> + case MT6323_CHIP_ID:
> + chip->int_con[0] = MT6323_INT_CON0;
> + chip->int_con[1] = MT6323_INT_CON1;
> + chip->int_status[0] = MT6323_INT_STATUS0;
> + chip->int_status[1] = MT6323_INT_STATUS1;
> + break;
> +
> + case MT6391_CHIP_ID:
> + case MT6397_CHIP_ID:
> + chip->int_con[0] = MT6397_INT_CON0;
> + chip->int_con[1] = MT6397_INT_CON1;
> + chip->int_status[0] = MT6397_INT_STATUS0;
> + chip->int_status[1] = MT6397_INT_STATUS1;
> + break;
> +
Just stumbled over this in linux-next. I personally would prefer to have two
patches, one that moves the code and another one that adds the switch etc.
This way it would be much easier to realize this change.
Not sure if this is still possible, because it seems to be in one of Lee's
repositories already. (and if Lee thinks the same as I do, of course)
Regards,
Matthias
> + default:
> + dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
> + return -ENODEV;
> + }
> +
> + /* Mask all interrupt sources */
> + regmap_write(chip->regmap, chip->int_con[0], 0x0);
> + regmap_write(chip->regmap, chip->int_con[1], 0x0);
> +
> + chip->irq_domain = irq_domain_add_linear(chip->dev->of_node,
> + MT6397_IRQ_NR,
> + &mt6397_irq_domain_ops,
> + chip);
> + if (!chip->irq_domain) {
> + dev_err(chip->dev, "could not create irq domain\n");
> + return -ENOMEM;
> + }
> +
> + ret = devm_request_threaded_irq(chip->dev, chip->irq, NULL,
> + mt6397_irq_thread, IRQF_ONESHOT,
> + "mt6397-pmic", chip);
> + if (ret) {
> + dev_err(chip->dev, "failed to register irq=%d; err: %d\n",
> + chip->irq, ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h
> index 25a95e7..9320c2a 100644
> --- a/include/linux/mfd/mt6397/core.h
> +++ b/include/linux/mfd/mt6397/core.h
> @@ -7,6 +7,12 @@
> #ifndef __MFD_MT6397_CORE_H__
> #define __MFD_MT6397_CORE_H__
>
> +enum chip_id {
> + MT6323_CHIP_ID = 0x23,
> + MT6391_CHIP_ID = 0x91,
> + MT6397_CHIP_ID = 0x97,
> +};
> +
> enum mt6397_irq_numbers {
> MT6397_IRQ_SPKL_AB = 0,
> MT6397_IRQ_SPKR_AB,
> @@ -54,6 +60,9 @@ struct mt6397_chip {
> u16 irq_masks_cache[2];
> u16 int_con[2];
> u16 int_status[2];
> + u16 chip_id;
> };
>
> +int mt6397_irq_init(struct mt6397_chip *chip);
> +
> #endif /* __MFD_MT6397_CORE_H__ */
>
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^ permalink raw reply
* [PATCH] arm64: Add support for the Transactional Memory Extension (TME)
From: Will Deacon @ 2019-08-23 14:52 UTC (permalink / raw)
To: linux-arm-kernel
Cc: mark.rutland, catalin.marinas, maz, Will Deacon, jade.alglave
Whilst the Transactional Memory Extension doesn't require substantial
support in the kernel in order to be used from userspace or guest
operating systems, we do need to enable it before exposing its existence
via the ID register emulation and a new hwcap.
Signed-off-by: Will Deacon <will@kernel.org>
---
Documentation/arm64/cpu-feature-registers.rst | 2 ++
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/esr.h | 3 ++-
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/asm/kvm_arm.h | 5 +++--
arch/arm64/include/asm/kvm_emulate.h | 3 +++
arch/arm64/include/asm/sysreg.h | 5 +++++
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 18 ++++++++++++++++++
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/kernel/traps.c | 1 +
11 files changed, 39 insertions(+), 4 deletions(-)
diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst
index 2955287e9acc..ec256423982e 100644
--- a/Documentation/arm64/cpu-feature-registers.rst
+++ b/Documentation/arm64/cpu-feature-registers.rst
@@ -131,6 +131,8 @@ infrastructure:
+------------------------------+---------+---------+
| RDM | [31-28] | y |
+------------------------------+---------+---------+
+ | TME | [27-24] | y |
+ +------------------------------+---------+---------+
| ATOMICS | [23-20] | y |
+------------------------------+---------+---------+
| CRC32 | [19-16] | y |
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index f19fe4b9acc4..0996ae1b9036 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -52,7 +52,8 @@
#define ARM64_HAS_IRQ_PRIO_MASKING 42
#define ARM64_HAS_DCPODP 43
#define ARM64_WORKAROUND_1463225 44
+#define ARM64_HAS_TME 45
-#define ARM64_NCAPS 45
+#define ARM64_NCAPS 46
#endif /* __ASM_CPUCAPS_H */
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
index cb29253ae86b..e3b47853389a 100644
--- a/arch/arm64/include/asm/esr.h
+++ b/arch/arm64/include/asm/esr.h
@@ -35,7 +35,8 @@
#define ESR_ELx_EC_SYS64 (0x18)
#define ESR_ELx_EC_SVE (0x19)
#define ESR_ELx_EC_ERET (0x1a) /* EL2 only */
-/* Unallocated EC: 0x1b - 0x1E */
+#define ESR_ELx_EC_TME (0x1b)
+/* Unallocated EC: 0x1C - 0x1E */
#define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */
#define ESR_ELx_EC_IABT_LOW (0x20)
#define ESR_ELx_EC_IABT_CUR (0x21)
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 3d2f2472a36c..365cbaa97d66 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -86,6 +86,7 @@
#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
#define KERNEL_HWCAP_FLAGM2 __khwcap2_feature(FLAGM2)
#define KERNEL_HWCAP_FRINT __khwcap2_feature(FRINT)
+#define KERNEL_HWCAP_TME __khwcap2_feature(TME)
/*
* This yields a mask that user programs can use to figure out what
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index a8b205e5c4a8..ca8ac52827d4 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -15,6 +15,7 @@
#define HCR_FWB (UL(1) << 46)
#define HCR_API (UL(1) << 41)
#define HCR_APK (UL(1) << 40)
+#define HCR_TME (UL(1) << 39)
#define HCR_TEA (UL(1) << 37)
#define HCR_TERR (UL(1) << 36)
#define HCR_TLOR (UL(1) << 35)
@@ -78,8 +79,8 @@
HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
HCR_FMO | HCR_IMO)
#define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
-#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
-#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
+#define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_TME)
+#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H | HCR_TME)
/* TCR_EL2 Registers bits */
#define TCR_EL2_RES1 ((1 << 31) | (1 << 23))
diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index d69c1efc63e7..ac3b3db923a6 100644
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -70,6 +70,9 @@ static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
if (cpus_have_const_cap(ARM64_MISMATCHED_CACHE_TYPE) ||
vcpu_el1_is_32bit(vcpu))
vcpu->arch.hcr_el2 |= HCR_TID2;
+
+ if (cpus_have_const_cap(ARM64_HAS_TME))
+ vcpu->arch.hcr_el2 |= HCR_TME;
}
static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 1df45c7ffcf7..55a4ad380d71 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -478,6 +478,10 @@
#define SYS_CNTV_CVAL_EL02 sys_reg(3, 5, 14, 3, 2)
/* Common SCTLR_ELx flags. */
+#define SCTLR_ELx_TME (BIT(53))
+#define SCTLR_ELx_TME0 (BIT(52))
+#define SCTLR_ELx_TMT (BIT(51))
+#define SCTLR_ELx_TMT0 (BIT(50))
#define SCTLR_ELx_DSSBS (BIT(44))
#define SCTLR_ELx_ENIA (BIT(31))
#define SCTLR_ELx_ENIB (BIT(30))
@@ -543,6 +547,7 @@
#define ID_AA64ISAR0_SM3_SHIFT 36
#define ID_AA64ISAR0_SHA3_SHIFT 32
#define ID_AA64ISAR0_RDM_SHIFT 28
+#define ID_AA64ISAR0_TME_SHIFT 24
#define ID_AA64ISAR0_ATOMICS_SHIFT 20
#define ID_AA64ISAR0_CRC32_SHIFT 16
#define ID_AA64ISAR0_SHA2_SHIFT 12
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index a1e72886b30c..751d889265e2 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -65,5 +65,6 @@
#define HWCAP2_SVESM4 (1 << 6)
#define HWCAP2_FLAGM2 (1 << 7)
#define HWCAP2_FRINT (1 << 8)
+#define HWCAP2_TME (1 << 9)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 95201e5ff5e1..6d3593299463 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -126,6 +126,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = {
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SM3_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA3_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_RDM_SHIFT, 4, 0),
+ ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_TME_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_ATOMICS_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_CRC32_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_SHA2_SHIFT, 4, 0),
@@ -1252,6 +1253,11 @@ static bool can_use_gic_priorities(const struct arm64_cpu_capabilities *entry,
}
#endif
+static void cpu_enable_tme(const struct arm64_cpu_capabilities *cap)
+{
+ sysreg_clear_set(sctlr_el1, 0, SCTLR_ELx_TME0);
+}
+
static const struct arm64_cpu_capabilities arm64_features[] = {
{
.desc = "GIC system register CPU interface",
@@ -1552,6 +1558,17 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.min_field_value = 1,
},
#endif
+ {
+ .desc = "Transactional memory extension",
+ .capability = ARM64_HAS_TME,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .sys_reg = SYS_ID_AA64ISAR0_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64ISAR0_TME_SHIFT,
+ .min_field_value = 1,
+ .matches = has_cpuid_feature,
+ .cpu_enable = cpu_enable_tme,
+ },
{},
};
@@ -1615,6 +1632,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SHA2_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_SHA512),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_CRC32_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_CRC32),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_ATOMICS_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_ATOMICS),
+ HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_TME_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_TME),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_RDM_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ASIMDRDM),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SHA3_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SHA3),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_SM3_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SM3),
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 05933c065732..834ea12323ce 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -84,6 +84,7 @@ static const char *const hwcap_str[] = {
"svesm4",
"flagm2",
"frint",
+ "tme",
NULL
};
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 6e950908eb97..1ec8e13a0191 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -746,6 +746,7 @@ static const char *esr_class_str[] = {
[ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
[ESR_ELx_EC_SVE] = "SVE",
[ESR_ELx_EC_ERET] = "ERET/ERETAA/ERETAB",
+ [ESR_ELx_EC_TME] = "TME TSTART",
[ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
[ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
[ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
--
2.11.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH v2 1/3] kprobes/x86: use instruction_pointer and instruction_pointer_set
From: Masami Hiramatsu @ 2019-08-23 14:51 UTC (permalink / raw)
To: Jisheng Zhang
Cc: Jonathan Corbet, Catalin Marinas, x86@kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Anil S Keshavamurthy, Ingo Molnar, Borislav Petkov,
H. Peter Anvin, Naveen N. Rao, Thomas Gleixner, Will Deacon,
David S. Miller, linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190821095527.729b2b0d@xhacker.debian>
Hi Jisheng,
On Wed, 21 Aug 2019 02:09:10 +0000
Jisheng Zhang <Jisheng.Zhang@synaptics.com> wrote:
> > > In v2, actually, the arm64 version's kprobe_ftrace_handler() is the same
> > > as x86's, the only difference is comment, e.g
> > >
> > > /* Kprobe handler expects regs->ip = ip + 1 as breakpoint hit */
> > >
> > > while in arm64
> > >
> > > /* Kprobe handler expects regs->pc = ip + 1 as breakpoint hit */
> >
> > As Peter pointed, on arm64, is that really 1 or 4 bytes?
> > This part is heavily depends on the processor software-breakpoint
> > implementation.
>
> Per my understanding, the "+1" here means "+ one kprobe_opcode_t".
No, that is the size of INT3. It just emulates the software trap on x86.
Thank you,
--
Masami Hiramatsu <mhiramat@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [BOOTWRAPPER PATCH] Enable TME for lower exception levels
From: Will Deacon @ 2019-08-23 14:50 UTC (permalink / raw)
To: mark.rutland; +Cc: Will Deacon, linux-arm-kernel
By default, TME is not available to exception levels below EL3, so
enable it in SCR_EL3 if we detect that it is implemented.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/aarch64/boot.S | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S
index 74705cded338..c2fe92c90297 100644
--- a/arch/aarch64/boot.S
+++ b/arch/aarch64/boot.S
@@ -48,6 +48,13 @@ _start:
orr x0, x0, #(1 << 16) // AP key enable
orr x0, x0, #(1 << 17) // AP insn enable
1:
+ /* Enable TME if present */
+ mrs x1, id_aa64isar0_el1
+ ubfx x1, x1, #24, #4
+ cbz x1, 1f
+
+ orr x0, x0, #(1 << 34) // TME enable
+1:
#ifndef KERNEL_32
orr x0, x0, #(1 << 10) // 64-bit EL2
#endif
--
2.11.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [GIT PULL] Allwinner Device Tree Changes for 5.4
From: Maxime Ripard @ 2019-08-23 14:38 UTC (permalink / raw)
To: arm, soc; +Cc: Chen-Yu Tsai, linux-arm-kernel, Maxime Ripard
[-- Attachment #1.1: Type: text/plain, Size: 10501 bytes --]
Hi,
Please pull the following changes for the next release.
Thanks!
Maxime
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git refs/tags/sunxi-dt-for-5.4-1
for you to fetch changes up to 15ede97054889c0bec09f1f9b71beffecf06fc67:
arm64: dts: allwinner: orange-pi-3: Enable WiFi (2019-08-23 13:50:05 +0200)
----------------------------------------------------------------
Allwinner DT changes for 5.4
Our usual pile of patches for the next release, which include mostly:
- More fixes thanks to the DT validation using the YAML bindings
- IR receiver support on the H6
- SPDIF support on the H6
- I2C Support on the H6
- CSI support on the A20
- RTC support on the H6
- New Boards: Lichee Zero Plus, Tanix TX6, A64-Olinuxino-eMMC
-----BEGIN PGP SIGNATURE-----
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xc+VAQDjZWvNeMX75qsrz7Jbdy7jlbJJ/oDFBGx3C4clcTn7tgD6AsHeM760Pc6o
4a7G5DGcJakuFGsb1s4hNQOylmG3IQ4=
=pXxO
-----END PGP SIGNATURE-----
----------------------------------------------------------------
Bhushan Shah (2):
dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node.
arm64: allwinner: h6: add I2C nodes
Chen-Yu Tsai (2):
ARM: dts: sun8i: a83t: Enable HDMI output on Cubietruck Plus
ARM: dts: sunxi: Add mdio bus sub-node to GMAC
Clément Péron (7):
ARM: dts: sunxi: Prefer A31 bindings for IR
ARM: dts: sunxi: Prefer A31 bindings for IR
arm64: dts: allwinner: h6: Add IR receiver node
arm64: dts: allwinner: h6: Enable IR on H6 boards
arm64: dts: allwinner: Add SPDIF node for Allwinner H6
arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1
arm64: dts: allwinner: Enable DDC regulator for Beelink GS1
Icenowy Zheng (3):
dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board
ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3
Igors Makejevs (1):
arm64: dts: allwinner: a64: Add IR node
Jernej Skrabec (3):
arm64: dts: allwinner: a64: Enable IR on Orange Pi Win
dt-bindings: arm: sunxi: Add compatible for Tanix TX6 board
arm64: dts: allwinner: h6: Introduce Tanix TX6 board
Maxime Ripard (17):
ARM: dts: sunxi: Switch to the generic PHY properties
ARM: dts: sunxi: Switch from phy to phy-handle
ARM: dts: sunxi: Unify the DE2 bus clocks order
arm64: dts: allwinner: h6: Fix SID node name
ARM: dts: sunxi: Remove simple-panel compatible
ARM: dts: sunxi: Fix the HDMI PHY name
dt-bindings: mfd: Convert Allwinner GPADC bindings to a schema
ARM: dts: sun4i: Add missing timers interrupts
ARM: dts: sun5i: Add missing timers interrupts
ARM: dts: sun6i: Add missing timers interrupts
ARM: dts: a23/a33: Change the timers compatible
ARM: dts: a83t: Change the timers compatible
ARM: dts: h3: Change the timers compatible
ARM: dts: v3s: Change the timers compatible
ARM: dts: sun7i: Add CSI0 controller
ARM: dts: sunxi: Add missing watchdog interrupts
ARM: dts: sunxi: Add missing watchdog clocks
Ondrej Jirman (3):
arm64: dts: allwinner: orange-pi-3: Enable HDMI output
arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree
arm64: dts: allwinner: orange-pi-3: Enable WiFi
Sunil Mohan Adapa (2):
dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC
arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
Documentation/devicetree/bindings/arm/sunxi.yaml | 16 +-
Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 3 +-
Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml | 43 ++-
Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml | 76 ++++-
Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt | 59 +---
arch/arm/boot/dts/Makefile | 1 +-
arch/arm/boot/dts/sun4i-a10-a1000.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-hackberry.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-marsboard.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 2 +-
arch/arm/boot/dts/sun4i-a10-pcduino.dts | 2 +-
arch/arm/boot/dts/sun4i-a10.dtsi | 9 +-
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 +-
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts | 2 +-
arch/arm/boot/dts/sun5i-a13-q8-tablet.dts | 2 +-
arch/arm/boot/dts/sun5i.dtsi | 9 +-
arch/arm/boot/dts/sun6i-a31-colombus.dts | 12 +-
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 18 +-
arch/arm/boot/dts/sun6i-a31-i7.dts | 12 +-
arch/arm/boot/dts/sun6i-a31-m9.dts | 12 +-
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts | 12 +-
arch/arm/boot/dts/sun6i-a31.dtsi | 15 +-
arch/arm/boot/dts/sun6i-a31s-cs908.dts | 11 +-
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 12 +-
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts | 18 +-
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 21 +-
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-itead-ibox.dts | 4 +-
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-m3.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 20 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 12 +-
arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 12 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 35 +-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 3 +-
arch/arm/boot/dts/sun8i-a23-q8-tablet.dts | 2 +-
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 25 +-
arch/arm/boot/dts/sun8i-a83t.dtsi | 14 +-
arch/arm/boot/dts/sun8i-r40.dtsi | 12 +-
arch/arm/boot/dts/sun8i-s3-lichee-zero-plus.dts | 53 +++-
arch/arm/boot/dts/sun8i-v3.dtsi | 14 +-
arch/arm/boot/dts/sun8i-v3s.dtsi | 14 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 12 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 4 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 10 +-
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 15 +-
arch/arm64/boot/dts/allwinner/Makefile | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 23 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4 +-
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 29 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 27 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 72 ++++-
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 4 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 4 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts | 100 +++++-
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 135 ++++++-
73 files changed, 937 insertions(+), 289 deletions(-)
create mode 100644 Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml
create mode 100644 Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml
delete mode 100644 Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt
create mode 100644 arch/arm/boot/dts/sun8i-s3-lichee-zero-plus.dts
create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply
* [RFCv4 7/7] arm64: dts: imx8mm: Add interconnect properties
From: Leonard Crestez @ 2019-08-23 14:37 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
Add #interconnect-cells and interconnect-node-id properties on devfreq
nodes. The imx interconnect provider will scan these.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 5474c50784c2..8b5442d8b1b2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -6,10 +6,11 @@
#include <dt-bindings/clock/imx8mm-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/interconnect/imx8mm.h>
#include "imx8mm-pinfunc.h"
/ {
compatible = "fsl,imx8mm";
@@ -806,10 +807,12 @@
noc: noc@32700000 {
compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
reg = <0x32700000 0x100000>;
clocks = <&clk IMX8MM_CLK_NOC>;
devfreq = <&ddrc>;
+ #interconnect-cells = <1>;
+ interconnect-node-id = <IMX8MM_ICN_NOC>;
operating-points-v2 = <&noc_opp_table>;
};
aips4: bus@32c00000 {
compatible = "fsl,aips-bus", "simple-bus";
@@ -896,10 +899,12 @@
};
ddrc: dram-controller@3d400000 {
compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
reg = <0x3d400000 0x400000>;
+ #interconnect-cells = <1>;
+ interconnect-node-id = <IMX8MM_ICS_DRAM>;
clock-names = "dram_core",
"dram_pll",
"dram_alt",
"dram_apb";
clocks = <&clk IMX8MM_CLK_DRAM_CORE>,
--
2.17.1
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^ permalink raw reply related
* [RFCv4 6/7] soc: imx8mm: Register interconnect platform device
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
Since there is no virtual devicetree node representing the interconnect
we need to probe the icc device externally. Probing this from the SOC
driver allows the interconnect device to be built as a module.
This is very similar to imx-cpufreq-dt.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/soc/imx/soc-imx8.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/soc/imx/soc-imx8.c b/drivers/soc/imx/soc-imx8.c
index b9831576dd25..24d515a9fdb2 100644
--- a/drivers/soc/imx/soc-imx8.c
+++ b/drivers/soc/imx/soc-imx8.c
@@ -22,10 +22,11 @@
/* Same as ANADIG_DIGPROG_IMX7D */
#define ANADIG_DIGPROG_IMX8MM 0x800
struct imx8_soc_data {
char *name;
+ char *icc_driver;
u32 (*soc_revision)(void);
};
static u64 soc_uid;
@@ -115,10 +116,11 @@ static const struct imx8_soc_data imx8mq_soc_data = {
};
static const struct imx8_soc_data imx8mm_soc_data = {
.name = "i.MX8MM",
.soc_revision = imx8mm_soc_revision,
+ .icc_driver = "imx8mm-interconnect",
};
static const struct imx8_soc_data imx8mn_soc_data = {
.name = "i.MX8MN",
.soc_revision = imx8mm_soc_revision,
@@ -185,10 +187,12 @@ static int __init imx8_soc_init(void)
if (ret)
goto free_rev;
if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
+ if (IS_ENABLED(CONFIG_INTERCONNECT_IMX))
+ platform_device_register_simple(data->icc_driver, -1, NULL, 0);
return 0;
free_rev:
if (strcmp(soc_dev_attr->revision, "unknown"))
--
2.17.1
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^ permalink raw reply related
* [RFCv4 5/7] interconnect: imx: Add platform driver for imx8mm
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
Add a platform driver for the i.MX8MM SoC describing bus topology.
Bandwidth adjustments is currently only supported on the DDRC and main
NOC. Scaling for the vpu/gpu/display NICs could be added in the future.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/interconnect/imx/Kconfig | 4 +
drivers/interconnect/imx/Makefile | 1 +
drivers/interconnect/imx/imx8mm.c | 105 ++++++++++++++++++++++
include/dt-bindings/interconnect/imx8mm.h | 49 ++++++++++
4 files changed, 159 insertions(+)
create mode 100644 drivers/interconnect/imx/imx8mm.c
create mode 100644 include/dt-bindings/interconnect/imx8mm.h
diff --git a/drivers/interconnect/imx/Kconfig b/drivers/interconnect/imx/Kconfig
index 7d81d3c83a61..15671fe7f600 100644
--- a/drivers/interconnect/imx/Kconfig
+++ b/drivers/interconnect/imx/Kconfig
@@ -1,5 +1,9 @@
config INTERCONNECT_IMX
bool "i.MX interconnect drivers"
depends on ARCH_MXC || COMPILE_TEST
help
Generic interconnect driver for i.MX SOCs
+
+config INTERCONNECT_IMX8MM
+ def_bool y
+ depends on INTERCONNECT_IMX
diff --git a/drivers/interconnect/imx/Makefile b/drivers/interconnect/imx/Makefile
index bb92fd9fe4a5..5f658c1608a6 100644
--- a/drivers/interconnect/imx/Makefile
+++ b/drivers/interconnect/imx/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_INTERCONNECT_IMX) += imx.o
+obj-$(CONFIG_INTERCONNECT_IMX8MM) += imx8mm.o
diff --git a/drivers/interconnect/imx/imx8mm.c b/drivers/interconnect/imx/imx8mm.c
new file mode 100644
index 000000000000..acc002153729
--- /dev/null
+++ b/drivers/interconnect/imx/imx8mm.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019, BayLibre
+ * Copyright (c) 2019, NXP
+ * Author: Alexandre Bailon <abailon@baylibre.com>
+ * Author: Leonard Crestez <leonard.crestez@nxp.com>
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#include <dt-bindings/interconnect/imx8mm.h>
+
+#include "imx.h"
+
+static const struct imx_icc_node_adj_desc imx8mm_dram_adj = {
+ .bw_mul = 1,
+ .bw_div = 16,
+};
+
+static const struct imx_icc_node_adj_desc imx8mm_noc_adj = {
+ .bw_mul = 1,
+ .bw_div = 16,
+};
+
+/*
+ * Describe bus masters, slaves and connections between them
+ *
+ * This is a simplified subset of the bus diagram, there are several other
+ * PL301 nics which are skipped/merged into PL301_MAIN
+ */
+static struct imx_icc_node_desc nodes[] = {
+ DEFINE_BUS_INTERCONNECT("NOC", IMX8MM_ICN_NOC, &imx8mm_noc_adj,
+ IMX8MM_ICS_DRAM, IMX8MM_ICN_MAIN),
+
+ DEFINE_BUS_SLAVE("DRAM", IMX8MM_ICS_DRAM, &imx8mm_dram_adj),
+ DEFINE_BUS_SLAVE("OCRAM", IMX8MM_ICS_OCRAM, NULL),
+ DEFINE_BUS_MASTER("A53", IMX8MM_ICM_A53, IMX8MM_ICN_NOC),
+
+ /* VPUMIX */
+ DEFINE_BUS_MASTER("VPU H1", IMX8MM_ICM_VPU_H1, IMX8MM_ICN_VIDEO),
+ DEFINE_BUS_MASTER("VPU G1", IMX8MM_ICM_VPU_G1, IMX8MM_ICN_VIDEO),
+ DEFINE_BUS_MASTER("VPU G2", IMX8MM_ICM_VPU_G2, IMX8MM_ICN_VIDEO),
+ DEFINE_BUS_INTERCONNECT("PL301_VIDEO", IMX8MM_ICN_VIDEO, NULL, IMX8MM_ICN_NOC),
+
+ /* GPUMIX */
+ DEFINE_BUS_MASTER("GPU 2D", IMX8MM_ICM_GPU2D, IMX8MM_ICN_GPU),
+ DEFINE_BUS_MASTER("GPU 3D", IMX8MM_ICM_GPU3D, IMX8MM_ICN_GPU),
+ DEFINE_BUS_INTERCONNECT("PL301_GPU", IMX8MM_ICN_GPU, NULL, IMX8MM_ICN_NOC),
+
+ /* DISPLAYMIX */
+ DEFINE_BUS_MASTER("CSI", IMX8MM_ICM_CSI, IMX8MM_ICN_MIPI),
+ DEFINE_BUS_MASTER("LCDIF", IMX8MM_ICM_LCDIF, IMX8MM_ICN_MIPI),
+ DEFINE_BUS_INTERCONNECT("PL301_MIPI", IMX8MM_ICN_MIPI, NULL, IMX8MM_ICN_NOC),
+
+ /* HSIO */
+ DEFINE_BUS_MASTER("USB1", IMX8MM_ICM_USB1, IMX8MM_ICN_HSIO),
+ DEFINE_BUS_MASTER("USB2", IMX8MM_ICM_USB2, IMX8MM_ICN_HSIO),
+ DEFINE_BUS_MASTER("PCIE", IMX8MM_ICM_PCIE, IMX8MM_ICN_HSIO),
+ DEFINE_BUS_INTERCONNECT("PL301_HSIO", IMX8MM_ICN_HSIO, NULL, IMX8MM_ICN_NOC),
+
+ /* Audio */
+ DEFINE_BUS_MASTER("SDMA2", IMX8MM_ICM_SDMA2, IMX8MM_ICN_AUDIO),
+ DEFINE_BUS_MASTER("SDMA3", IMX8MM_ICM_SDMA3, IMX8MM_ICN_AUDIO),
+ DEFINE_BUS_INTERCONNECT("PL301_AUDIO", IMX8MM_ICN_AUDIO, NULL, IMX8MM_ICN_MAIN),
+
+ /* Ethernet */
+ DEFINE_BUS_MASTER("ENET", IMX8MM_ICM_ENET, IMX8MM_ICN_ENET),
+ DEFINE_BUS_INTERCONNECT("PL301_ENET", IMX8MM_ICN_ENET, NULL, IMX8MM_ICN_MAIN),
+
+ /* Other */
+ DEFINE_BUS_MASTER("SDMA1", IMX8MM_ICM_SDMA1, IMX8MM_ICN_MAIN),
+ DEFINE_BUS_MASTER("NAND", IMX8MM_ICM_NAND, IMX8MM_ICN_MAIN),
+ DEFINE_BUS_MASTER("USDHC1", IMX8MM_ICM_USDHC1, IMX8MM_ICN_MAIN),
+ DEFINE_BUS_MASTER("USDHC2", IMX8MM_ICM_USDHC2, IMX8MM_ICN_MAIN),
+ DEFINE_BUS_MASTER("USDHC3", IMX8MM_ICM_USDHC3, IMX8MM_ICN_MAIN),
+ DEFINE_BUS_INTERCONNECT("PL301_MAIN", IMX8MM_ICN_MAIN, NULL,
+ IMX8MM_ICN_NOC, IMX8MM_ICS_OCRAM),
+};
+
+static int imx8mm_icc_probe(struct platform_device *pdev)
+{
+ return imx_icc_register(pdev, nodes, ARRAY_SIZE(nodes));
+}
+
+static int imx8mm_icc_remove(struct platform_device *pdev)
+{
+ return imx_icc_unregister(pdev);
+}
+
+static struct platform_driver imx8mm_icc_driver = {
+ .probe = imx8mm_icc_probe,
+ .remove = imx8mm_icc_remove,
+ .driver = {
+ .name = "imx8mm-interconnect",
+ },
+};
+
+module_platform_driver(imx8mm_icc_driver);
+MODULE_AUTHOR("Alexandre Bailon <abailon@baylibre.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/dt-bindings/interconnect/imx8mm.h b/include/dt-bindings/interconnect/imx8mm.h
new file mode 100644
index 000000000000..5404f2af15c3
--- /dev/null
+++ b/include/dt-bindings/interconnect/imx8mm.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019, BayLibre
+ * Author: Alexandre Bailon <abailon@baylibre.com>
+ */
+
+#ifndef __IMX8MM_ICM_INTERCONNECT_IDS_H
+#define __IMX8MM_ICM_INTERCONNECT_IDS_H
+
+#define IMX8MM_ICN_NOC 1
+#define IMX8MM_ICS_DRAM 2
+#define IMX8MM_ICS_OCRAM 3
+#define IMX8MM_ICM_A53 4
+
+#define IMX8MM_ICM_VPU_H1 5
+#define IMX8MM_ICM_VPU_G1 6
+#define IMX8MM_ICM_VPU_G2 7
+#define IMX8MM_ICN_VIDEO 8
+
+#define IMX8MM_ICM_GPU2D 9
+#define IMX8MM_ICM_GPU3D 10
+#define IMX8MM_ICN_GPU 11
+
+#define IMX8MM_ICM_CSI 12
+#define IMX8MM_ICM_LCDIF 13
+#define IMX8MM_ICN_MIPI 14
+
+#define IMX8MM_ICM_USB1 15
+#define IMX8MM_ICM_USB2 16
+#define IMX8MM_ICM_PCIE 17
+#define IMX8MM_ICN_HSIO 18
+
+#define IMX8MM_ICM_SDMA2 19
+#define IMX8MM_ICM_SDMA3 20
+#define IMX8MM_ICN_AUDIO 21
+
+#define IMX8MM_ICN_ENET 22
+#define IMX8MM_ICM_ENET 23
+
+#define IMX8MM_ICN_MAIN 24
+#define IMX8MM_ICM_NAND 25
+#define IMX8MM_ICM_SDMA1 26
+#define IMX8MM_ICM_USDHC1 27
+#define IMX8MM_ICM_USDHC2 28
+#define IMX8MM_ICM_USDHC3 29
+
+#endif /* __IMX8MM_ICM_INTERCONNECT_IDS_H */
--
2.17.1
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^ permalink raw reply related
* [RFCv4 4/7] interconnect: Add imx core driver
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
This adds support for i.MX SoC family to interconnect framework.
Platform drivers can describe the interconnect graph and several
adjustment knobs where icc node bandwidth is converted to a
DEV_PM_QOS_MIN_FREQUENCY request.
The adjustable nodes are found based on an "interconnect-node-id"
property by scanning the entire device tree.
The interconnect provider doesn't need an virtual OF node, instead those
same adjustable nodes are registered as proxies which xlate to the
platform-level provider.
The platform device for the interconnect needs to be registered from a
SOC driver (similar to cpufreq).
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/interconnect/Kconfig | 1 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/imx/Kconfig | 5 +
drivers/interconnect/imx/Makefile | 1 +
drivers/interconnect/imx/imx.c | 279 ++++++++++++++++++++++++++++++
drivers/interconnect/imx/imx.h | 60 +++++++
6 files changed, 347 insertions(+)
create mode 100644 drivers/interconnect/imx/Kconfig
create mode 100644 drivers/interconnect/imx/Makefile
create mode 100644 drivers/interconnect/imx/imx.c
create mode 100644 drivers/interconnect/imx/imx.h
diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig
index bfa4ca3ab7a9..e61802230f90 100644
--- a/drivers/interconnect/Kconfig
+++ b/drivers/interconnect/Kconfig
@@ -10,7 +10,8 @@ menuconfig INTERCONNECT
If unsure, say no.
if INTERCONNECT
source "drivers/interconnect/qcom/Kconfig"
+source "drivers/interconnect/imx/Kconfig"
endif
diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile
index 28f2ab0824d5..20a13b7eb37f 100644
--- a/drivers/interconnect/Makefile
+++ b/drivers/interconnect/Makefile
@@ -2,5 +2,6 @@
icc-core-objs := core.o
obj-$(CONFIG_INTERCONNECT) += icc-core.o
obj-$(CONFIG_INTERCONNECT_QCOM) += qcom/
+obj-$(CONFIG_INTERCONNECT_IMX) += imx/
diff --git a/drivers/interconnect/imx/Kconfig b/drivers/interconnect/imx/Kconfig
new file mode 100644
index 000000000000..7d81d3c83a61
--- /dev/null
+++ b/drivers/interconnect/imx/Kconfig
@@ -0,0 +1,5 @@
+config INTERCONNECT_IMX
+ bool "i.MX interconnect drivers"
+ depends on ARCH_MXC || COMPILE_TEST
+ help
+ Generic interconnect driver for i.MX SOCs
diff --git a/drivers/interconnect/imx/Makefile b/drivers/interconnect/imx/Makefile
new file mode 100644
index 000000000000..bb92fd9fe4a5
--- /dev/null
+++ b/drivers/interconnect/imx/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_INTERCONNECT_IMX) += imx.o
diff --git a/drivers/interconnect/imx/imx.c b/drivers/interconnect/imx/imx.c
new file mode 100644
index 000000000000..0a04ac723c15
--- /dev/null
+++ b/drivers/interconnect/imx/imx.c
@@ -0,0 +1,279 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019, BayLibre
+ * Copyright (c) 2019, NXP
+ * Author: Alexandre Bailon <abailon@baylibre.com>
+ * Author: Leonard Crestez <leonard.crestez@nxp.com>
+ */
+
+#include <linux/devfreq.h>
+#include <linux/device.h>
+#include <linux/interconnect-provider.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pm_qos.h>
+
+#include "imx.h"
+
+/* private icc_provider data */
+struct imx_icc_provider {
+ struct device *dev;
+};
+
+/* private icc_node data */
+struct imx_icc_node {
+ const struct imx_icc_node_desc *desc;
+ struct devfreq *devfreq;
+ struct dev_pm_qos_request qos_req;
+};
+
+static int imx_icc_aggregate(struct icc_node *node, u32 tag,
+ u32 avg_bw, u32 peak_bw,
+ u32 *agg_avg, u32 *agg_peak)
+{
+ *agg_avg += avg_bw;
+ *agg_peak = max(*agg_peak, peak_bw);
+
+ return 0;
+}
+
+static struct icc_node *imx_icc_xlate(struct of_phandle_args *spec, void *data)
+{
+ struct imx_icc_provider *desc = data;
+ struct icc_provider *provider = dev_get_drvdata(desc->dev);
+ unsigned int id = spec->args[0];
+ struct icc_node *node;
+
+ list_for_each_entry(node, &provider->nodes, node_list)
+ if (node->id == id)
+ return node;
+
+ return ERR_PTR(-EINVAL);
+}
+
+static int imx_icc_node_set(struct icc_node *node)
+{
+ struct device *dev = node->provider->dev;
+ struct imx_icc_node *node_data = node->data;
+ u64 freq;
+
+ if (!node_data->devfreq)
+ return 0;
+
+ freq = (node->avg_bw + node->peak_bw) * node_data->desc->adj->bw_mul;
+ do_div(freq, node_data->desc->adj->bw_div);
+ dev_dbg(dev, "%s avg_bw %ukBps peak_bw %ukBps min_freq %llukHz\n",
+ node->name, node->avg_bw, node->peak_bw, freq);
+
+ if (freq > S32_MAX) {
+ dev_err(dev, "%s can't request more S32_MAX freq\n",
+ node->name);
+ return -ERANGE;
+ }
+
+ dev_pm_qos_update_request(&node_data->qos_req, freq);
+
+ return 0;
+}
+
+static int imx_icc_set(struct icc_node *src, struct icc_node *dst)
+{
+ return imx_icc_node_set(dst);
+}
+
+static const struct of_device_id imx_icc_node_of_match[] = {
+ { .compatible = "fsl,imx8m-nic" },
+ { .compatible = "fsl,imx8m-noc" },
+ { .compatible = "fsl,imx8m-ddrc" },
+ {},
+};
+
+static int imx_icc_node_init_devfreq(struct device *dev,
+ struct icc_node *node)
+{
+ struct imx_icc_node *node_data = node->data;
+ struct device_node *dn;
+ u32 node_id;
+ int ret;
+
+ for_each_matching_node(dn, imx_icc_node_of_match) {
+ ret = of_property_read_u32(dn, "interconnect-node-id",
+ &node_id);
+ if (ret != 0)
+ continue;
+
+ if (node_id == node->id) {
+ of_node_get(dn);
+ break;
+ }
+ }
+
+ if (!dn)
+ return 0;
+
+ dev_info(dev, "node %s[%d] has device node %pOF\n",
+ node->name, node->id, dn);
+ node_data->devfreq = devfreq_get_devfreq_by_node(dn);
+ if (IS_ERR(node_data->devfreq)) {
+ of_node_put(dn);
+ ret = PTR_ERR(node_data->devfreq);
+ dev_err(dev, "failed to fetch devfreq for %s: %d\n",
+ node->name, ret);
+ return ret;
+ }
+
+ of_icc_add_proxy(dn, node->provider);
+ of_node_put(dn);
+
+ return dev_pm_qos_add_request(node_data->devfreq->dev.parent,
+ &node_data->qos_req,
+ DEV_PM_QOS_MIN_FREQUENCY, 0);
+}
+
+static struct icc_node *imx_icc_node_add(struct icc_provider *provider,
+ const struct imx_icc_node_desc *node_desc)
+{
+ struct imx_icc_provider *provider_data = provider->data;
+ struct device *dev = provider_data->dev;
+ struct imx_icc_node *node_data;
+ struct icc_node *node;
+ int ret;
+
+ node = icc_node_create(node_desc->id);
+ if (IS_ERR(node)) {
+ dev_err(dev, "failed to create node %d\n", node_desc->id);
+ return node;
+ }
+
+ if (node->data) {
+ dev_err(dev, "already created node %s id=%d\n",
+ node_desc->name, node_desc->id);
+ return ERR_PTR(-EEXIST);
+ }
+
+ node_data = devm_kzalloc(dev, sizeof(*node_data), GFP_KERNEL);
+ if (!node_data) {
+ icc_node_destroy(node->id);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ node->name = node_desc->name;
+ node->data = node_data;
+ node_data->desc = node_desc;
+ icc_node_add(node, provider);
+
+ if (node_desc->adj) {
+ ret = imx_icc_node_init_devfreq(dev, node);
+ if (ret < 0) {
+ icc_node_del(node);
+ icc_node_destroy(node->id);
+ return ERR_PTR(ret);
+ }
+ }
+
+ return node;
+}
+
+static void imx_icc_unregister_nodes(struct icc_provider *provider)
+{
+ struct icc_node *node, *tmp;
+
+ list_for_each_entry_safe(node, tmp, &provider->nodes, node_list) {
+ struct imx_icc_node *node_data = node->data;
+
+ icc_node_del(node);
+ icc_node_destroy(node->id);
+ if (dev_pm_qos_request_active(&node_data->qos_req))
+ dev_pm_qos_remove_request(&node_data->qos_req);
+ }
+}
+
+static int imx_icc_register_nodes(struct icc_provider *provider,
+ const struct imx_icc_node_desc *descs,
+ int count)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < count; i++) {
+ struct icc_node *node;
+ const struct imx_icc_node_desc *node_desc = &descs[i];
+ size_t j;
+
+ node = imx_icc_node_add(provider, node_desc);
+ if (IS_ERR(node)) {
+ ret = PTR_ERR(node);
+ if (ret != -EPROBE_DEFER)
+ dev_err(provider->dev, "failed to add %s: %d\n",
+ node_desc->name, ret);
+ goto err;
+ }
+
+ for (j = 0; j < node_desc->num_links; j++)
+ icc_link_create(node, node_desc->links[j]);
+ }
+
+ return 0;
+
+err:
+ imx_icc_unregister_nodes(provider);
+
+ return ret;
+}
+
+int imx_icc_register(struct platform_device *pdev,
+ struct imx_icc_node_desc *nodes, int nodes_count)
+{
+ struct device *dev = &pdev->dev;
+ struct imx_icc_provider *provider_data;
+ struct icc_provider *provider;
+ int ret;
+
+ provider_data = devm_kzalloc(dev, sizeof(*provider_data), GFP_KERNEL);
+ if (!provider_data)
+ return -ENOMEM;
+ provider_data->dev = dev;
+
+ provider = devm_kzalloc(dev, sizeof(*provider), GFP_KERNEL);
+ if (!provider)
+ return -ENOMEM;
+ provider->set = imx_icc_set;
+ provider->aggregate = imx_icc_aggregate;
+ provider->xlate = imx_icc_xlate;
+ provider->data = provider_data;
+ provider->dev = dev;
+ platform_set_drvdata(pdev, provider);
+
+ ret = icc_provider_add(provider);
+ if (ret) {
+ dev_err(dev, "error adding interconnect provider: %d\n", ret);
+ return ret;
+ }
+
+ ret = imx_icc_register_nodes(provider, nodes, nodes_count);
+ if (ret)
+ goto provider_del;
+
+ pr_info("registered %s\n", pdev->name);
+
+ return 0;
+
+provider_del:
+ icc_provider_del(provider);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(imx_icc_register);
+
+int imx_icc_unregister(struct platform_device *pdev)
+{
+ struct icc_provider *provider = platform_get_drvdata(pdev);
+
+ icc_provider_del(provider);
+ imx_icc_unregister_nodes(provider);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(imx_icc_unregister);
diff --git a/drivers/interconnect/imx/imx.h b/drivers/interconnect/imx/imx.h
new file mode 100644
index 000000000000..9299b8d941f0
--- /dev/null
+++ b/drivers/interconnect/imx/imx.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019, BayLibre
+ * Copyright (c) 2019, NXP
+ * Author: Alexandre Bailon <abailon@baylibre.com>
+ * Author: Leonard Crestez <leonard.crestez@nxp.com>
+ */
+#ifndef __DRIVERS_INTERCONNECT_IMX_H
+#define __DRIVERS_INTERCONNECT_IMX_H
+
+#include <linux/kernel.h>
+
+#define IMX_ICC_MAX_LINKS 4
+
+/*
+ * struct imx_icc_node_adj - Describe a dynamic adjustment knob
+ */
+struct imx_icc_node_adj_desc {
+ unsigned int bw_mul, bw_div;
+};
+
+/*
+ * struct imx_icc_node - Describe an interconnect node
+ * @name: name of the node
+ * @id: an unique id to identify the node
+ * @links: an array of slaves' node id
+ * @num_links: number of id defined in links
+ */
+struct imx_icc_node_desc {
+ const char *name;
+ u16 id;
+ u16 links[IMX_ICC_MAX_LINKS];
+ u16 num_links;
+
+ const struct imx_icc_node_adj_desc *adj;
+};
+
+#define DEFINE_BUS_INTERCONNECT(_name, _id, _adj, ...) \
+ { \
+ .id = _id, \
+ .name = _name, \
+ .adj = _adj, \
+ .num_links = ARRAY_SIZE(((int[]){ __VA_ARGS__ })), \
+ .links = { __VA_ARGS__ }, \
+ }
+
+#define DEFINE_BUS_MASTER(_name, _id, _dest_id) \
+ DEFINE_BUS_INTERCONNECT(_name, _id, NULL, 1, _dest_id)
+
+#define DEFINE_BUS_SLAVE(_name, _id, _adj) \
+ DEFINE_BUS_INTERCONNECT(_name, _id, _adj, 0)
+
+int imx_icc_register(struct platform_device *pdev,
+ struct imx_icc_node_desc *nodes,
+ int nodes_count);
+int imx_icc_unregister(struct platform_device *pdev);
+
+#endif /* __DRIVERS_INTERCONNECT_IMX_H */
--
2.17.1
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^ permalink raw reply related
* [RFCv4 3/7] dt-bindings: devfreq: imx: Describe interconnect properties
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
The interconnect-node-id property is parsed by the imx interconnect
driver to find nodes on which frequencies can be adjusted.
Add #interconnect-cells so that device drivers can request paths from
bus nodes instead of requiring a separate "virtual" node to represent
the interconnect itself.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml | 5 +++++
Documentation/devicetree/bindings/devfreq/imx.yaml | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
index 31db204e6845..014449a9dd01 100644
--- a/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
+++ b/Documentation/devicetree/bindings/devfreq/imx-ddrc.yaml
@@ -31,10 +31,15 @@ properties:
- const: dram_alt
- const: dram_apb
operating-points-v2: true
+ interconnect-node-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ '#interconnect-cells':
+ const: 1
+
devfreq-events:
description: Phandle of PMU node
$ref: "/schemas/types.yaml#/definitions/phandle"
required:
diff --git a/Documentation/devicetree/bindings/devfreq/imx.yaml b/Documentation/devicetree/bindings/devfreq/imx.yaml
index 634870496d5e..f2f9b76c752f 100644
--- a/Documentation/devicetree/bindings/devfreq/imx.yaml
+++ b/Documentation/devicetree/bindings/devfreq/imx.yaml
@@ -43,10 +43,15 @@ properties:
clocks:
maxItems: 1
operating-points-v2: true
+ interconnect-node-id:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ '#interconnect-cells':
+ const: 1
+
devfreq:
description: |
Phandle to another devfreq device to match OPPs with by using the
passive governor.
$ref: "/schemas/types.yaml#/definitions/phandle"
--
2.17.1
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^ permalink raw reply related
* [RFCv4 2/7] interconnect: Add of_icc_add_proxy
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
On many SOCs there is no single node that describes the "interconnect",
instead are multiple pieces of bus fabric which already support scaling.
Add support for mapping multiple device nodes to the same icc_provider
(likely a platform-level singleton). This is implemented at the
devicetree parsing level: just add more device nodes which map to the
same icc_provider instead.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/interconnect/core.c | 88 ++++++++++++++++++++++++---
include/linux/interconnect-provider.h | 7 +++
2 files changed, 88 insertions(+), 7 deletions(-)
diff --git a/drivers/interconnect/core.c b/drivers/interconnect/core.c
index 7b971228df38..01109e335baf 100644
--- a/drivers/interconnect/core.c
+++ b/drivers/interconnect/core.c
@@ -17,12 +17,19 @@
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/overflow.h>
+struct of_icc_proxy {
+ struct device_node *of_node;
+ struct icc_provider *provider;
+ struct list_head list_node;
+};
+
static DEFINE_IDR(icc_idr);
static LIST_HEAD(icc_providers);
+static LIST_HEAD(icc_proxy_list);
static DEFINE_MUTEX(icc_lock);
static struct dentry *icc_debugfs_dir;
/**
* struct icc_req - constraints that are attached to each node
@@ -267,10 +274,61 @@ struct icc_node *of_icc_xlate_onecell(struct of_phandle_args *spec,
return icc_data->nodes[idx];
}
EXPORT_SYMBOL_GPL(of_icc_xlate_onecell);
+struct icc_provider *__of_icc_get_provider(struct device_node *np)
+{
+ struct of_icc_proxy *proxy;
+
+ lockdep_assert_held(&icc_lock);
+ list_for_each_entry(proxy, &icc_proxy_list, list_node)
+ if (proxy->of_node == np)
+ return proxy->provider;
+
+ return NULL;
+}
+
+static int __of_icc_add_proxy(struct device_node *np,
+ struct icc_provider *provider)
+{
+ struct of_icc_proxy *proxy;
+
+ lockdep_assert_held(&icc_lock);
+ proxy = kmalloc(sizeof(*proxy), GFP_KERNEL);
+ if (!proxy)
+ return -ENOMEM;
+ proxy->of_node = np;
+ proxy->provider = provider;
+ list_add_tail(&proxy->list_node, &icc_proxy_list);
+
+ return 0;
+}
+
+/**
+ * of_icc_add_proxy() - Add another device_node for a provider
+ * @np: OF node to alias from
+ * @provider: Interconnect provider to map to
+ *
+ * Make another device_node map to the same provider.
+ *
+ * This lasts until icc_provider_del.
+ */
+int of_icc_add_proxy(struct device_node *np, struct icc_provider *provider)
+{
+ int ret;
+
+ mutex_lock(&icc_lock);
+
+ ret = __of_icc_add_proxy(np, provider);
+
+ mutex_unlock(&icc_lock);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(of_icc_add_proxy);
+
/**
* of_icc_get_from_provider() - Look-up interconnect node
* @spec: OF phandle args to use for look-up
*
* Looks for interconnect provider under the node specified by @spec and if
@@ -279,23 +337,22 @@ EXPORT_SYMBOL_GPL(of_icc_xlate_onecell);
* Returns a valid pointer to struct icc_node on success or ERR_PTR()
* on failure.
*/
static struct icc_node *of_icc_get_from_provider(struct of_phandle_args *spec)
{
- struct icc_node *node = ERR_PTR(-EPROBE_DEFER);
struct icc_provider *provider;
+ struct icc_node *node;
if (!spec || spec->args_count != 1)
return ERR_PTR(-EINVAL);
mutex_lock(&icc_lock);
- list_for_each_entry(provider, &icc_providers, provider_list) {
- if (provider->dev->of_node == spec->np)
- node = provider->xlate(spec, provider->data);
- if (!IS_ERR(node))
- break;
- }
+ provider = __of_icc_get_provider(spec->np);
+ if (provider)
+ node = provider->xlate(spec, provider->data);
+ else
+ node = ERR_PTR(-EPROBE_DEFER);
mutex_unlock(&icc_lock);
return node;
}
@@ -744,17 +801,26 @@ EXPORT_SYMBOL_GPL(icc_node_del);
*
* Return: 0 on success, or an error code otherwise
*/
int icc_provider_add(struct icc_provider *provider)
{
+ int ret;
+
if (WARN_ON(!provider->set))
return -EINVAL;
if (WARN_ON(!provider->xlate))
return -EINVAL;
mutex_lock(&icc_lock);
+ if (provider->dev) {
+ ret = __of_icc_add_proxy(provider->dev->of_node, provider);
+ if (ret) {
+ mutex_unlock(&icc_lock);
+ return ret;
+ }
+ }
INIT_LIST_HEAD(&provider->nodes);
list_add_tail(&provider->provider_list, &icc_providers);
mutex_unlock(&icc_lock);
@@ -770,10 +836,12 @@ EXPORT_SYMBOL_GPL(icc_provider_add);
*
* Return: 0 on success, or an error code otherwise
*/
int icc_provider_del(struct icc_provider *provider)
{
+ struct of_icc_proxy *proxy, *tmp;
+
mutex_lock(&icc_lock);
if (provider->users) {
pr_warn("interconnect provider still has %d users\n",
provider->users);
mutex_unlock(&icc_lock);
@@ -785,10 +853,16 @@ int icc_provider_del(struct icc_provider *provider)
mutex_unlock(&icc_lock);
return -EBUSY;
}
list_del(&provider->provider_list);
+ list_for_each_entry_safe(proxy, tmp, &icc_proxy_list, list_node)
+ if (proxy->provider == provider) {
+ list_del(&proxy->list_node);
+ of_node_put(proxy->of_node);
+ kfree(proxy);
+ }
mutex_unlock(&icc_lock);
return 0;
}
EXPORT_SYMBOL_GPL(icc_provider_del);
diff --git a/include/linux/interconnect-provider.h b/include/linux/interconnect-provider.h
index b16f9effa555..e6773ecac164 100644
--- a/include/linux/interconnect-provider.h
+++ b/include/linux/interconnect-provider.h
@@ -98,10 +98,11 @@ int icc_link_create(struct icc_node *node, const int dst_id);
int icc_link_destroy(struct icc_node *src, struct icc_node *dst);
void icc_node_add(struct icc_node *node, struct icc_provider *provider);
void icc_node_del(struct icc_node *node);
int icc_provider_add(struct icc_provider *provider);
int icc_provider_del(struct icc_provider *provider);
+int of_icc_add_proxy(struct device_node *np, struct icc_provider *provider);
#else
static inline struct icc_node *icc_node_create(int id)
{
@@ -138,8 +139,14 @@ static inline int icc_provider_add(struct icc_provider *provider)
static inline int icc_provider_del(struct icc_provider *provider)
{
return -ENOTSUPP;
}
+static inline int of_icc_add_proxy(struct device_node *np,
+ struct icc_provider *provider)
+{
+ return -ENOTSUPP;
+}
+
#endif /* CONFIG_INTERCONNECT */
#endif /* __LINUX_INTERCONNECT_PROVIDER_H */
--
2.17.1
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^ permalink raw reply related
* [RFCv4 1/7] PM / devfreq: Add devfreq_get_devfreq_by_node
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
In-Reply-To: <cover.1566570260.git.leonard.crestez@nxp.com>
Split off part of devfreq_get_devfreq_by_phandle into a separate
function. This allows callers to fetch devfreq instances by enumerating
devicetree instead of explicit phandles.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/devfreq/devfreq.c | 42 +++++++++++++++++++++++++++++----------
include/linux/devfreq.h | 1 +
2 files changed, 32 insertions(+), 11 deletions(-)
diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 687deadd08ed..57352a757d79 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -907,10 +907,33 @@ struct devfreq *devm_devfreq_add_device(struct device *dev,
return devfreq;
}
EXPORT_SYMBOL(devm_devfreq_add_device);
#ifdef CONFIG_OF
+/*
+ * devfreq_get_devfreq_by_node - Get the devfreq device from devicetree
+ * @np - pointer to device_node
+ *
+ * return the instance of devfreq device
+ */
+struct devfreq *devfreq_get_devfreq_by_node(struct device_node *node)
+{
+ struct devfreq *devfreq;
+
+ mutex_lock(&devfreq_list_lock);
+ list_for_each_entry(devfreq, &devfreq_list, node) {
+ if (devfreq->dev.parent
+ && devfreq->dev.parent->of_node == node) {
+ mutex_unlock(&devfreq_list_lock);
+ return devfreq;
+ }
+ }
+ mutex_unlock(&devfreq_list_lock);
+
+ return ERR_PTR(-EPROBE_DEFER);
+}
+
/*
* devfreq_get_devfreq_by_phandle - Get the devfreq device from devicetree
* @dev - instance to the given device
* @index - index into list of devfreq
*
@@ -929,25 +952,22 @@ struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
node = of_parse_phandle(dev->of_node, "devfreq", index);
if (!node)
return ERR_PTR(-ENODEV);
- mutex_lock(&devfreq_list_lock);
- list_for_each_entry(devfreq, &devfreq_list, node) {
- if (devfreq->dev.parent
- && devfreq->dev.parent->of_node == node) {
- mutex_unlock(&devfreq_list_lock);
- of_node_put(node);
- return devfreq;
- }
- }
- mutex_unlock(&devfreq_list_lock);
+ devfreq = devfreq_get_devfreq_by_node(node);
of_node_put(node);
- return ERR_PTR(-EPROBE_DEFER);
+ return devfreq;
}
+
#else
+struct devfreq *devfreq_get_devfreq_by_node(struct device_node *node)
+{
+ return ERR_PTR(-ENODEV);
+}
+
struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
{
return ERR_PTR(-ENODEV);
}
#endif /* CONFIG_OF */
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index d2c5bb7add0a..4b5cc80abbe3 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -242,10 +242,11 @@ extern int devm_devfreq_register_notifier(struct device *dev,
unsigned int list);
extern void devm_devfreq_unregister_notifier(struct device *dev,
struct devfreq *devfreq,
struct notifier_block *nb,
unsigned int list);
+extern struct devfreq *devfreq_get_devfreq_by_node(struct device_node *node);
extern struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev,
int index);
#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
/**
--
2.17.1
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^ permalink raw reply related
* [RFCv4 0/7] interconnect: Add imx support via devfreq
From: Leonard Crestez @ 2019-08-23 14:36 UTC (permalink / raw)
To: Georgi Djakov, Rob Herring, Artur Świgoń, Chanwoo Choi
Cc: Mark Rutland, Dong Aisheng, linux-arm-kernel, Saravana Kannan,
linux-pm, Stephen Boyd, Viresh Kumar, Michael Turquette,
Krzysztof Kozlowski, Kyungmin Park, MyungJoo Ham,
Alexandre Bailon, kernel, Fabio Estevam, Shawn Guo, devicetree,
linux-imx
This series add imx support for interconnect via devfreq: the ICC
framework is used to aggregate requests from devices and then those are
converted to DEV_PM_QOS_MIN_FREQUENCY requests for devfreq.
The devfreq parts are posted separately, this series only intersects in
devicetree: https://patchwork.kernel.org/cover/11104113/
Since there is no single devicetree node that can represent the "interconnect"
new API is added to allow individual devfreq nodes to act as parsing proxies
all mapping to a single soc-level icc provider. This is still RFC
because this
The rest of the changes are small and deal with review comments.
Changes since RFCv3:
* Remove the virtual "icc" node and add devfreq nodes as proxy providers
* Fix build on 32-bit arm (reported by kbuilt test robot)
* Remove ARCH_MXC_ARM64 (never existed in upstream)
* Remove _numlinks, calculate instead
* Replace __BUSFREQ_H header guard
* Improve commit message and comment spelling
* Fix checkpatch issues
Link to RFCv3: https://patchwork.kernel.org/cover/11078671/
Changes since RFCv2 and initial work by Alexandre Bailon:
* Relying on devfreq and dev_pm_qos instead of CLK
* No more "platform opp" stuff
* No more special suspend handling: use suspend-opp on devfreq instead.
* Replace all mentions of "busfreq" with "interconnect"
Link to v2: https://patchwork.kernel.org/patch/11056789/
Leonard Crestez (7):
PM / devfreq: Add devfreq_get_devfreq_by_node
interconnect: Add of_icc_add_proxy
dt-bindings: devfreq: imx: Describe interconnect properties
interconnect: Add imx core driver
interconnect: imx: Add platform driver for imx8mm
soc: imx8mm: Register interconnect platform device
arm64: dts: imx8mm: Add interconnect properties
.../devicetree/bindings/devfreq/imx-ddrc.yaml | 5 +
.../devicetree/bindings/devfreq/imx.yaml | 5 +
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +
drivers/devfreq/devfreq.c | 42 ++-
drivers/interconnect/Kconfig | 1 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/core.c | 88 +++++-
drivers/interconnect/imx/Kconfig | 9 +
drivers/interconnect/imx/Makefile | 2 +
drivers/interconnect/imx/imx.c | 279 ++++++++++++++++++
drivers/interconnect/imx/imx.h | 60 ++++
drivers/interconnect/imx/imx8mm.c | 105 +++++++
drivers/soc/imx/soc-imx8.c | 4 +
include/dt-bindings/interconnect/imx8mm.h | 49 +++
include/linux/devfreq.h | 1 +
include/linux/interconnect-provider.h | 7 +
16 files changed, 645 insertions(+), 18 deletions(-)
create mode 100644 drivers/interconnect/imx/Kconfig
create mode 100644 drivers/interconnect/imx/Makefile
create mode 100644 drivers/interconnect/imx/imx.c
create mode 100644 drivers/interconnect/imx/imx.h
create mode 100644 drivers/interconnect/imx/imx8mm.c
create mode 100644 include/dt-bindings/interconnect/imx8mm.h
--
2.17.1
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^ permalink raw reply
* [GIT PULL] Allwinner Drivers Changes for 5.4
From: Maxime Ripard @ 2019-08-23 14:33 UTC (permalink / raw)
To: arm, soc; +Cc: Chen-Yu Tsai, linux-arm-kernel, Maxime Ripard
[-- Attachment #1.1: Type: text/plain, Size: 1288 bytes --]
Hi,
Please pull the following changes for the next release.
Thanks!
Maxime
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git refs/tags/sunxi-drivers-for-5.4-2
for you to fetch changes up to 9d4db2f5f0e6dc4c0dfb94110fe488e9eb191748:
bus: sunxi-rsb: Remove dev_err() usage after platform_get_irq() (2019-08-06 14:15:49 +0800)
----------------------------------------------------------------
Allwinner drivers patches for 5.4
One driver to remove a redundant error message in the Allwinner RSB
driver.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXV/5PwAKCRDj7w1vZxhR
xUPDAQDCRzdhQef1Ki9OvNcT8o5tbxLK+YcWmmrlLAA4qe2TRQEA1/Um5ZS8s8p5
MKz27KwMjt3PHVc9AoQiEzCHETKb1AA=
=safB
-----END PGP SIGNATURE-----
----------------------------------------------------------------
Stephen Boyd (1):
bus: sunxi-rsb: Remove dev_err() usage after platform_get_irq()
drivers/bus/sunxi-rsb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply
* Re: [PATCH 4/6] x86: remove set_memory_x and set_memory_nx
From: Peter Zijlstra @ 2019-08-23 14:31 UTC (permalink / raw)
To: Christoph Hellwig
Cc: Dave Hansen, Catalin Marinas, x86, linux-kernel, Andy Lutomirski,
Will Deacon, linux-arm-kernel
In-Reply-To: <20190813090146.26377-5-hch@lst.de>
On Tue, Aug 13, 2019 at 11:01:44AM +0200, Christoph Hellwig wrote:
> These wrappers don't provide a real benefit over just using
> set_memory_x and set_memory_nx.
>
> Signed-off-by: Christoph Hellwig <hch@lst.de>
> ---
> arch/x86/include/asm/set_memory.h | 2 --
> arch/x86/kernel/machine_kexec_32.c | 4 ++--
> arch/x86/mm/init_32.c | 2 +-
> arch/x86/mm/pageattr.c | 16 ----------------
> 4 files changed, 3 insertions(+), 21 deletions(-)
>
> diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
> index 899ec9ae7cff..fd549c3ebb17 100644
> --- a/arch/x86/include/asm/set_memory.h
> +++ b/arch/x86/include/asm/set_memory.h
> @@ -75,8 +75,6 @@ int set_pages_array_wb(struct page **pages, int addrinarray);
>
> int set_pages_uc(struct page *page, int numpages);
> int set_pages_wb(struct page *page, int numpages);
> -int set_pages_x(struct page *page, int numpages);
> -int set_pages_nx(struct page *page, int numpages);
> int set_pages_ro(struct page *page, int numpages);
> int set_pages_rw(struct page *page, int numpages);
$Subject and patch content don't match up.
Other than that,
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
for all x86 patches.
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