* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Russell King - ARM Linux admin @ 2019-08-24 22:18 UTC (permalink / raw)
To: David Miller
Cc: andrew, f.fainelli, frank-w, netdev, sean.wang, linux-mips,
opensource, linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190824.141803.1656753287804303137.davem@davemloft.net>
On Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added to the mt7530 entry?
Probably some way to make MAINTAINERS pick up on phylink-containing
patches. Something like:
K: phylink
maybe?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Ondřej Jirman @ 2019-08-24 22:16 UTC (permalink / raw)
To: Jernej Škrabec
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
Chen-Yu Tsai, linux-arm-kernel, linux-rtc
In-Reply-To: <7913281.jYEbquIlsS@jernej-laptop>
On Sat, Aug 24, 2019 at 11:36:26PM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a):
> > Hello Jernej,
> >
> > On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > > > Visually?
> > > >
> > > > That would explain why it doesn't work for you. The mainline RTC driver
> > > > disables auto-switch feature, and if your board doesn't have a crystal
> > > > for
> > > > LOSC, RTC will not generate a clock for the RTC.
> > > >
> > > > H6's dtsi describes by default a situatiuon with external 32k crystal
> > > > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > > > doesn't have the crystal. You need to fix this in the DTS for your board
> > > > instead of patching the driver.
> > >
> > > I see that reparenting is supported, but I'm not sure how to fix that in
> > > DT. Any suggestion?
> >
> > You may try removing the clocks property from rtc node.
>
> I don't think this would work:
> https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L246
Well, I don't know. There has to be some way to make it work, since the code
deals with it here:
https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L270
Number of parents for LOSC is calculated from the DT somehow. Maybne something
to do with the #clock-cells property?
Sorry I can't be of more help here.
> >
> > > > The driver has parent clock selection logic in case the LOSC crystal is
> > > > not
> > > > used.
> > > >
> > > > Your patch enables automatic detection of LOSC failure and RTC changes
> > > > clock to LOSC automatically, despite what's described in the DTS. That
> > > > may fix the issue, but is not the correct solution.
> > > >
> > > > Registers on my board look like this (external 32k osc is used) for
> > > > reference:
> > > >
> > > > LOSC_CTRL_REG[7000000]: 8011
> > > >
> > > > KEY_FIELD ??? (0)
> > > > LOSC_AUTO_SWT_BYPASS EN (1)
> > > > LOSC_AUTO_SWT_EN DIS (0)
> > > > EXT_LOSC_EN EN (1)
> > > > EXT_LOSC_GSM LOW (0)
> > > > BATTERY_DIR DISCHARGE (0)
> > > > LOSC_SRC_SEL EXT32k (1)
> > > >
> > > > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > > >
> > > > EXT_LOSC_STA OK (0)
> > > > LOSC_AUTO_SWT_PEND NOEFF (0)
> > > > LOSC_SRC_SEL_STA EXT32K (1)
> > >
> > > In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> > > has value 0x4, so there is issue with external crystal (it's missing) and
> > > RTC switched to internal one.
> > >
> > > BTW, what's wrong with automatic switching? Why is it disabled?
> >
> > It always was disabled on mainline (bit 14 was set to 0 even before my
> > patch). H6 just probably has another extra undocummented bit, that's needed
> > to disables it properly.
> >
> > You probably don't want a glitch to switch your RTC from high-precision
> > clock to a low precision one possibly without any indication in the
> > userspace or a kernel log.
> >
> > Regardless of all this, DTS needs to have a correct description of the HW,
> > which means if RTC module is not connected to the 32.757kHz crystal/clock,
> > clocks property should be empty.
>
> If we are talking about correct HW description, then clock property should
> actually have possibility that two clocks are defined - one for internal RC
> (always present) and one external crystal (optional). In such case I could
> really just omit external clock and be done with it. But I'm not sure if such
Internal RC is thought to be part of the RTC module, so it's not defined as an
input clock to the RTC module.
regards,
Ondrej
>
> Best regards,
> Jernej
>
> >
> > regards,
> > o.
> >
> > > Best regards,
> > > Jernej
> > >
> > > > regards,
> > > >
> > > > o.
> > > >
> > > > > > The real issue probably is that the mainline driver is missing this:
> > > > > >
> > > > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-b
> > > > > > sp#n
> > > > > > 650
> > > > >
> > > > > Not sure what you mean by that. ext vs. int source selection?
> > > > >
> > > > >
> > > > >
> > > > > Best regards,
> > > > > Jernej
> > > > >
> > > > > > regards,
> > > > > >
> > > > > > o.
>
>
>
>
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^ permalink raw reply
* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Andrew Lunn @ 2019-08-24 22:15 UTC (permalink / raw)
To: David Miller
Cc: f.fainelli, frank-w, netdev, sean.wang, linux-mips, opensource,
linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190824.141803.1656753287804303137.davem@davemloft.net>
65;5402;1cOn Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added to the mt7530 entry?
Hi David
No. I think we need a phylink entry. And then make use of the K: line
format to list keywords. I hope that even though changes like this
don't touch any files listed as being part of phylink, they will match
the keyword and pickup Russell.
I need to do some testing and see if this actually works.
Andrew
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Jernej Škrabec @ 2019-08-24 21:36 UTC (permalink / raw)
To: linux-sunxi, megous
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, Chen-Yu Tsai, Rob Herring,
linux-arm-kernel, linux-rtc
In-Reply-To: <20190824212746.a5pyilkrrvysjjbd@core.my.home>
Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a):
> Hello Jernej,
>
> On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > > Visually?
> > >
> > > That would explain why it doesn't work for you. The mainline RTC driver
> > > disables auto-switch feature, and if your board doesn't have a crystal
> > > for
> > > LOSC, RTC will not generate a clock for the RTC.
> > >
> > > H6's dtsi describes by default a situatiuon with external 32k crystal
> > > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > > doesn't have the crystal. You need to fix this in the DTS for your board
> > > instead of patching the driver.
> >
> > I see that reparenting is supported, but I'm not sure how to fix that in
> > DT. Any suggestion?
>
> You may try removing the clocks property from rtc node.
I don't think this would work:
https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L246
>
> > > The driver has parent clock selection logic in case the LOSC crystal is
> > > not
> > > used.
> > >
> > > Your patch enables automatic detection of LOSC failure and RTC changes
> > > clock to LOSC automatically, despite what's described in the DTS. That
> > > may fix the issue, but is not the correct solution.
> > >
> > > Registers on my board look like this (external 32k osc is used) for
> > > reference:
> > >
> > > LOSC_CTRL_REG[7000000]: 8011
> > >
> > > KEY_FIELD ??? (0)
> > > LOSC_AUTO_SWT_BYPASS EN (1)
> > > LOSC_AUTO_SWT_EN DIS (0)
> > > EXT_LOSC_EN EN (1)
> > > EXT_LOSC_GSM LOW (0)
> > > BATTERY_DIR DISCHARGE (0)
> > > LOSC_SRC_SEL EXT32k (1)
> > >
> > > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > >
> > > EXT_LOSC_STA OK (0)
> > > LOSC_AUTO_SWT_PEND NOEFF (0)
> > > LOSC_SRC_SEL_STA EXT32K (1)
> >
> > In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> > has value 0x4, so there is issue with external crystal (it's missing) and
> > RTC switched to internal one.
> >
> > BTW, what's wrong with automatic switching? Why is it disabled?
>
> It always was disabled on mainline (bit 14 was set to 0 even before my
> patch). H6 just probably has another extra undocummented bit, that's needed
> to disables it properly.
>
> You probably don't want a glitch to switch your RTC from high-precision
> clock to a low precision one possibly without any indication in the
> userspace or a kernel log.
>
> Regardless of all this, DTS needs to have a correct description of the HW,
> which means if RTC module is not connected to the 32.757kHz crystal/clock,
> clocks property should be empty.
If we are talking about correct HW description, then clock property should
actually have possibility that two clocks are defined - one for internal RC
(always present) and one external crystal (optional). In such case I could
really just omit external clock and be done with it. But I'm not sure if such
solution is acceptable at this point.
Best regards,
Jernej
>
> regards,
> o.
>
> > Best regards,
> > Jernej
> >
> > > regards,
> > >
> > > o.
> > >
> > > > > The real issue probably is that the mainline driver is missing this:
> > > > >
> > > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-b
> > > > > sp#n
> > > > > 650
> > > >
> > > > Not sure what you mean by that. ext vs. int source selection?
> > > >
> > > >
> > > >
> > > > Best regards,
> > > > Jernej
> > > >
> > > > > regards,
> > > > >
> > > > > o.
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* Re: [PATCH RFC v1 2/2] mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host
From: Martin Blumenstingl @ 2019-08-24 21:34 UTC (permalink / raw)
To: Ulf Hansson
Cc: Mark Rutland, DTML, jianxin.pan, linux-mmc@vger.kernel.org,
Linux Kernel Mailing List, Rob Herring,
open list:ARM/Amlogic Meson..., Linux ARM
In-Reply-To: <CAPDyKFoFQ_QvHD-+Mg_VAR5rqs3CM_h7dw25p81JTzE1Yz7d1A@mail.gmail.com>
Hi Ulf,
On Thu, Aug 22, 2019 at 3:53 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> On Mon, 8 Jul 2019 at 19:33, Martin Blumenstingl
> <martin.blumenstingl@googlemail.com> wrote:
> >
> > WiP - only partially working - see performance numbers.
> >
> > Odroid-C1 eMMC (HS-200):
> > Amlogic's vendor driver @ Linux 3.10:
> > 7781351936 bytes (7.8 GB) copied, 134.714 s, 57.8 MB/s
> > This driver:
> > 7781351936 bytes (7.8 GB, 7.2 GiB) copied, 189.02 s, 41.2 MB/s
> >
> > EC-100 eMMC (HS MMC):
> > Amlogic's vendor driver @ Linux 3.10:
> > 15762194432 bytes (16 GB) copied, 422.967 s, 37.3 MB/s
> > This driver:
> > 15762194432 bytes (16 GB, 15 GiB) copied, 9232.65 s, 1.7 MB/s
> >
> > 1) Amlogic's vendor driver does some magic with the divider:
> > clk_div = input_rate / clk_ios - !(input_rate%clk_ios);
> > if (!(clk_div & 0x01)) // if even number, turn it to an odd one
> > clk_div++;
> > It's not clear to me whether what the reason behind this is, what is
> > supposed to be achieved with this?
> >
> > 2) The hardcoded RX clock phases are taken from the vendor driver. It
> > seems that these are only valid when fclk_div3 is used as input
> > clock (however, there are four more inputs). It's not clear to me how
> > to calculate the RX clock phases in set_ios based on the input clock
> > and the ios rate.
> >
> > 3) The hardware supports a timeout IRQ but the max_busy_timeout is not
> > documented anywhere.
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>
> Martin, overall this looks good to me. Once you moved from RFC to a
> formal patch I will check again, of course.
OK, great
in the meantime I got answers to my questions (off-list) from Jianxin.
also someone asked me (just this week) for the .dts patches so he
could test on his own board (I have them ready but didn't send them
yet)
unfortunately he ran into some data corruption on writing
I can reproduce it but I didn't have time to debug this yet
I'll send an updated version once I have resolved that - as non-RFC
> There are a couple of calls to readl_poll_timeout(), for different
> reasons, that I have some questions about, but we can discuss those in
> the next step.
sure.
feel free to ask now since I still have to debug that data corruption
problem as stated above
Martin
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* Re: [PATCH v2, 3/3] arm64: dts: meson-g12b-ugoos-am6: add initial device-tree
From: Martin Blumenstingl @ 2019-08-24 21:29 UTC (permalink / raw)
To: Christian Hewitt
Cc: Mark Rutland, devicetree, Oleg Ivanov, Kevin Hilman, linux-kernel,
Rob Herring, linux-amlogic, linux-arm-kernel
In-Reply-To: <1566633850-9421-4-git-send-email-christianshewitt@gmail.com>
Hi Christian,
On Sat, Aug 24, 2019 at 10:06 AM Christian Hewitt
<christianshewitt@gmail.com> wrote:
>
> The Ugoos AM6 is based on the Amlogic W400 (G12B) reference design using the
> S922X chipset. Hardware specifications:
>
> - 2GB LPDDR4 RAM
> - 16GB eMMC storage
> - 10/100/1000 Base-T Ethernet using External RGMII PHY
> - 802.11 a/b/g/b/ac + BT 5.0 sdio wireless (Ampak 6398S)
> - HDMI 2.0 (4k@60p) video
> - Composite video + 2-channel audio output on 3.5mm jack
> - S/PDIF audio output
> - Aux input
> - 1x USB 3.0
> - 3x USB 2.0
> - 1x micro SD card slot
>
> The device-tree is laregly based on meson-g12b-odroid-n2 but with audio
typo -> largely
[...]
> + tflash_vdd: regulator-tflash_vdd {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "TFLASH_VDD";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
do we need regulator-always-on here as well, see [0]?
[...]
> + usb_pwr_en: regulator-usb_pwr_en {
> + compatible = "regulator-fixed";
> + regulator-name = "USB_PWR_EN";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v>;
> +
> + /* Connected to the microUSB port power enable */
> + gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
the photos I found don't show a micro USB port (but 3x USB A 2.0 and
1x USB A 3.0 - just like you mentioned in the patch description)
does this regulator exist?
[...]
> +ðmac {
> + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> + phy-mode = "rgmii";
> + phy-handle = <&external_phy>;
> + amlogic,tx-delay-ns = <2>;
> +};
is the PHY reset GPIO not wired to GPIOZ_15 like on Odroid-N2 and X96 Max?
Martin
[0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts?id=dc7f2cb218b5ef65ab3d455a0e62d27e44075203
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Ondřej Jirman @ 2019-08-24 21:27 UTC (permalink / raw)
To: Jernej Škrabec
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
Chen-Yu Tsai, linux-arm-kernel, linux-rtc
In-Reply-To: <1690798.2HKiRSsjat@jernej-laptop>
Hello Jernej,
On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > Visually?
> >
> > That would explain why it doesn't work for you. The mainline RTC driver
> > disables auto-switch feature, and if your board doesn't have a crystal for
> > LOSC, RTC will not generate a clock for the RTC.
> >
> > H6's dtsi describes by default a situatiuon with external 32k crystal
> > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > doesn't have the crystal. You need to fix this in the DTS for your board
> > instead of patching the driver.
>
> I see that reparenting is supported, but I'm not sure how to fix that in DT.
> Any suggestion?
You may try removing the clocks property from rtc node.
> >
> > The driver has parent clock selection logic in case the LOSC crystal is not
> > used.
> >
> > Your patch enables automatic detection of LOSC failure and RTC changes clock
> > to LOSC automatically, despite what's described in the DTS. That may fix
> > the issue, but is not the correct solution.
> >
> > Registers on my board look like this (external 32k osc is used) for
> > reference:
> >
> > LOSC_CTRL_REG[7000000]: 8011
> > KEY_FIELD ??? (0)
> > LOSC_AUTO_SWT_BYPASS EN (1)
> > LOSC_AUTO_SWT_EN DIS (0)
> > EXT_LOSC_EN EN (1)
> > EXT_LOSC_GSM LOW (0)
> > BATTERY_DIR DISCHARGE (0)
> > LOSC_SRC_SEL EXT32k (1)
> >
> > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > EXT_LOSC_STA OK (0)
> > LOSC_AUTO_SWT_PEND NOEFF (0)
> > LOSC_SRC_SEL_STA EXT32K (1)
> >
>
> In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> has value 0x4, so there is issue with external crystal (it's missing) and RTC
> switched to internal one.
>
> BTW, what's wrong with automatic switching? Why is it disabled?
It always was disabled on mainline (bit 14 was set to 0 even before my patch).
H6 just probably has another extra undocummented bit, that's needed to disables
it properly.
You probably don't want a glitch to switch your RTC from high-precision
clock to a low precision one possibly without any indication in the userspace
or a kernel log.
Regardless of all this, DTS needs to have a correct description of the HW,
which means if RTC module is not connected to the 32.757kHz crystal/clock,
clocks property should be empty.
regards,
o.
> Best regards,
> Jernej
>
> > regards,
> > o.
> >
> > > > The real issue probably is that the mainline driver is missing this:
> > > >
> > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-bsp#n
> > > > 650
> > >
> > > Not sure what you mean by that. ext vs. int source selection?
> > >
> > >
> > >
> > > Best regards,
> > > Jernej
> > >
> > > > regards,
> > > >
> > > > o.
>
>
>
>
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* Re: [PATCHv4 0/3] Odroid c2 usb fixs
From: Martin Blumenstingl @ 2019-08-24 21:18 UTC (permalink / raw)
To: Anand Moon
Cc: devicetree, Neil Armstrong, Kevin Hilman, linux-kernel,
Rob Herring, linux-amlogic, linux-arm-kernel, Jerome Brunet
In-Reply-To: <20190824184912.795-1-linux.amoon@gmail.com>
Hi Anand,
thank you for the patches
On Sat, Aug 24, 2019 at 8:49 PM Anand Moon <linux.amoon@gmail.com> wrote:
[...]
> Anand Moon (3):
> arm64: dts: meson: odroid-c2: p5v0 is the main 5V power input
> arm64: dts: meson: odroid-c2: Add missing linking regulator to usb bus
> arm64: dts: meson: odroid-c2: Disable usb_otg bus to avoid power
> failed warning
this whole series is:
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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^ permalink raw reply
* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: David Miller @ 2019-08-24 21:18 UTC (permalink / raw)
To: andrew
Cc: f.fainelli, frank-w, netdev, sean.wang, linux-mips, opensource,
linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190823010928.GK13020@lunn.ch>
From: Andrew Lunn <andrew@lunn.ch>
Date: Fri, 23 Aug 2019 03:09:28 +0200
> That would be Russell.
>
> We should try to improve MAINTAINER so that Russell King gets picked
> by the get_maintainer script.
Shoule he be added to the mt7530 entry?
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Jernej Škrabec @ 2019-08-24 21:09 UTC (permalink / raw)
To: linux-sunxi, megous
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, Chen-Yu Tsai, Rob Herring,
linux-arm-kernel, linux-rtc
In-Reply-To: <20190824133057.rhpj3xuzr3vymdiy@core.my.home>
Dne sobota, 24. avgust 2019 ob 15:30:57 CEST je Ondřej Jirman napisal(a):
> On Sat, Aug 24, 2019 at 03:16:41PM +0200, Jernej Škrabec wrote:
> > Dne sobota, 24. avgust 2019 ob 15:05:44 CEST je Ondřej Jirman napisal(a):
> > > On Sat, Aug 24, 2019 at 02:51:54PM +0200, Jernej Škrabec wrote:
> > > > Dne sobota, 24. avgust 2019 ob 14:46:54 CEST je Ondřej Jirman
napisal(a):
> > > > > Hi,
> > > > >
> > > > > On Sat, Aug 24, 2019 at 02:32:32PM +0200, Jernej Škrabec wrote:
> > > > > > Hi!
> > > > > >
> > > > > > Dne torek, 20. avgust 2019 ob 17:19:33 CEST je megous@megous.com
> > > >
> > > > napisal(a):
> > > > > > > From: Ondrej Jirman <megous@megous.com>
> > > > > > >
> > > > > > > RTC on H6 is mostly the same as on H5 and H3. It has slight
> > > > > > > differences
> > > > > > > mostly in features that are not yet supported by this driver.
> > > > > > >
> > > > > > > Some differences are already stated in the comments in existing
> > > > > > > code.
> > > > > > > One other difference is that H6 has extra bit in LOSC_CTRL_REG,
> > > > > > > called
> > > > > > > EXT_LOSC_EN to enable/disable external low speed crystal
> > > > > > > oscillator.
> > > > > > >
> > > > > > > It also has bit EXT_LOSC_STA in LOSC_AUTO_SWT_STA_REG, to check
> > > > > > > whether
> > > > > > > external low speed oscillator is working correctly.
> > > > > > >
> > > > > > > This patch adds support for enabling LOSC when necessary:
> > > > > > >
> > > > > > > - during reparenting
> > > > > > > - when probing the clock
> > > > > > >
> > > > > > > H6 also has capacbility to automatically reparent RTC clock from
> > > > > > > external crystal oscillator, to internal RC oscillator, if
> > > > > > > external
> > > > > > > oscillator fails. This is enabled by default. Disable it during
> > > > > > > probe.
> > > > > > >
> > > > > > > Signed-off-by: Ondrej Jirman <megous@megous.com>
> > > > > > > Reviewed-by: Chen-Yu Tsai <wens@csie.org>
> > > > > > > ---
> > > > > > >
> > > > > > > drivers/rtc/rtc-sun6i.c | 40
> > > > > > > ++++++++++++++++++++++++++++++++++++++--
> > > > > > > 1 file changed, 38 insertions(+), 2 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
> > > > > > > index d50ee023b559..b0c3752bed3f 100644
> > > > > > > --- a/drivers/rtc/rtc-sun6i.c
> > > > > > > +++ b/drivers/rtc/rtc-sun6i.c
> > > > > > > @@ -32,9 +32,11 @@
> > > > > > >
> > > > > > > /* Control register */
> > > > > > > #define SUN6I_LOSC_CTRL
0x0000
> > > > > > > #define SUN6I_LOSC_CTRL_KEY (0x16aa
> >
> > << 16)
> >
> > > > > > > +#define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS BIT(15)
> > > > > >
> > > > > > User manual says that above field is bit 14.
> > > > >
> > > > > See the previous discussion, this is from BSP.
> > > >
> > > > I have two versions of BSP (don't ask me which) which have this set as
> > > > bit
> > > > 14 and changing this to 14 actually solves all my problems with LOSC
> > > > (no
> > > > more issues with setting RTC and HDMI-CEC works now - it uses LOSC as
> > > > parent) on Tanix TX6 box.
> > >
> > > Interesting. Is LOSC fed externally generated clock, or is it setup as a
> > > crystal oscillator on your board?
> >
> > I really don't know, but here is DT: http://ix.io/1ThI
> >
> > > Anyway, see here:
> > >
> > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.h?h=h6-4.9-bsp#n
> > > 649
> > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-bsp#n
> > > 652
> >
> > Interesting, 4.9 BSP has additional bit definition, which is not
> > documented in manual and 3.10 BSP to which I refer.
> >
> > I was referring to 3.10 BSP, which uses only bit 14. I thought that you
> > named it differently.
> >
> > > It would be nice to know what's really happening.
> > >
> > > My output is:
> > >
> > > [ 0.832252] sun6i-rtc 7000000.rtc: registered as rtc0
> > > [ 0.832257] sun6i-rtc 7000000.rtc: RTC enabled
> > > [ 1.728968] sun6i-rtc 7000000.rtc: setting system clock to
> > > 1970-01-01T00:00:07 UTC (7)
> >
> > With change, I get same output.
> >
> > > I think, you may have just enabled the auto switch feature, and running
> > > the
> > > clock from low precision RC oscillator with your patch.
> >
> > True, now I think there is no external crystal, but I'm still not sure how
> > to confirm that.
>
> Visually?
>
> That would explain why it doesn't work for you. The mainline RTC driver
> disables auto-switch feature, and if your board doesn't have a crystal for
> LOSC, RTC will not generate a clock for the RTC.
>
> H6's dtsi describes by default a situatiuon with external 32k crystal
> oscillator. See ext_osc32k node. That's incorrect for your board if it
> doesn't have the crystal. You need to fix this in the DTS for your board
> instead of patching the driver.
I see that reparenting is supported, but I'm not sure how to fix that in DT.
Any suggestion?
>
> The driver has parent clock selection logic in case the LOSC crystal is not
> used.
>
> Your patch enables automatic detection of LOSC failure and RTC changes clock
> to LOSC automatically, despite what's described in the DTS. That may fix
> the issue, but is not the correct solution.
>
> Registers on my board look like this (external 32k osc is used) for
> reference:
>
> LOSC_CTRL_REG[7000000]: 8011
> KEY_FIELD ??? (0)
> LOSC_AUTO_SWT_BYPASS EN (1)
> LOSC_AUTO_SWT_EN DIS (0)
> EXT_LOSC_EN EN (1)
> EXT_LOSC_GSM LOW (0)
> BATTERY_DIR DISCHARGE (0)
> LOSC_SRC_SEL EXT32k (1)
>
> LOSC_AUTO_SWT_STA_REG[7000004]: 1
> EXT_LOSC_STA OK (0)
> LOSC_AUTO_SWT_PEND NOEFF (0)
> LOSC_SRC_SEL_STA EXT32K (1)
>
In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
has value 0x4, so there is issue with external crystal (it's missing) and RTC
switched to internal one.
BTW, what's wrong with automatic switching? Why is it disabled?
Best regards,
Jernej
> regards,
> o.
>
> > > The real issue probably is that the mainline driver is missing this:
> > >
> > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-bsp#n
> > > 650
> >
> > Not sure what you mean by that. ext vs. int source selection?
> >
> >
> >
> > Best regards,
> > Jernej
> >
> > > regards,
> > >
> > > o.
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* Re: [PATCH 1/1] arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
From: Shawn Guo @ 2019-08-24 20:47 UTC (permalink / raw)
To: Guido Günther
Cc: Mark Rutland, devicetree, Abel Vesa, Anson Huang, Carlo Caione,
Andrey Smirnov, Sascha Hauer, Angus Ainslie (Purism),
linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel,
Lucas Stach
In-Reply-To: <fa3b1df7fc5e74f375df5de53061d1a93d154b51.1566471985.git.agx@sigxcpu.org>
On Thu, Aug 22, 2019 at 01:10:23PM +0200, Guido Günther wrote:
> The only mux controls the MIPI DSI input selection.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
Applied, thanks.
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* Re: [PATCH v7 1/4] dt-bindings: vendor-prefixes: Add Anvo-Systems
From: Shawn Guo @ 2019-08-24 20:46 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Mark Rutland, devicetree, Sascha Hauer, linux-kernel,
Schrempf Frieder, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
In-Reply-To: <20190822060238.3887-1-krzk@kernel.org>
On Thu, Aug 22, 2019 at 08:02:35AM +0200, Krzysztof Kozlowski wrote:
> Add vendor prefix for Anvo-Systems Dresden GmbH.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> Reviewed-by: Rob Herring <robh@kernel.org>
Applied all, thanks.
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* Re: [PATCH] soc: imx: gpcv2: Print the correct error code
From: Shawn Guo @ 2019-08-24 20:41 UTC (permalink / raw)
To: Guido Günther
Cc: Rob Herring, Anson Huang, Andrey Smirnov, Sascha Hauer,
linux-kernel, NXP Linux Team, Pengutronix Kernel Team,
Fabio Estevam, linux-arm-kernel, Lucas Stach
In-Reply-To: <ceab1bb4984d0a4f59a580cd9956c1fd6d6a78f3.1566405120.git.agx@sigxcpu.org>
On Wed, Aug 21, 2019 at 06:33:04PM +0200, Guido Günther wrote:
> The current code prints 'ret' (thus 0) while it should use 'err'.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
Applied, thanks.
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* Re: [PATCH v4 2/2] dt-bindings: arm: fsl: add Hummingboard Pulse
From: Shawn Guo @ 2019-08-24 20:38 UTC (permalink / raw)
To: Baruch Siach
Cc: Sascha Hauer, Marco Felsch, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
In-Reply-To: <f6b31016f833358e27d96e992f180b8cdb4c96f9.1566375619.git.baruch@tkos.co.il>
On Wed, Aug 21, 2019 at 11:20:19AM +0300, Baruch Siach wrote:
> Add binding documentation for the SolidRun Hummingboard Pulse board.
>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Applied, thanks.
Minor note: we usually put bindings patch prior to the one using it
in a series.
Shawn
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* Re: [PATCH v4 1/2] arm64: dts: fsl: add support for Hummingboard Pulse
From: Shawn Guo @ 2019-08-24 20:36 UTC (permalink / raw)
To: Baruch Siach
Cc: Sascha Hauer, Jon Nettleton, Marco Felsch, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
In-Reply-To: <250bf15602801b09a1c1e6d286d0eb125029fd49.1566375619.git.baruch@tkos.co.il>
On Wed, Aug 21, 2019 at 11:20:18AM +0300, Baruch Siach wrote:
> From: Jon Nettleton <jon@solid-run.com>
>
> The SolidRun Hummingboard Pulse carrier board carries the SolidRun
> i.MX8MQ based SOM.
>
> Notably missing is PCIe support that depends on analog PLLOUT clock.
> Current imx clk driver does not support this clock.
>
> Signed-off-by: Jon Nettleton <jon@solid-run.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Applied, thanks.
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* Re: [PATCH RESEND v11 7/8] open: openat2(2) syscall
From: Daniel Colascione @ 2019-08-24 20:17 UTC (permalink / raw)
To: Aleksa Sarai
Cc: linux-ia64, linux-sh, Alexei Starovoitov, linux-kernel,
David Howells, open list:KERNEL SELFTEST FRAMEWORK, sparclinux,
Shuah Khan, linux-arch, linux-s390, Tycho Andersen, Aleksa Sarai,
linux-arm-kernel, linux-mips, linux-xtensa, Kees Cook,
Arnd Bergmann, Jann Horn, linuxppc-dev, linux-m68k, Al Viro,
Andy Lutomirski, Shuah Khan, David Drysdale, Christian Brauner,
J. Bruce Fields, linux-parisc, Linux API, Chanho Min, Jeff Layton,
Oleg Nesterov, Eric Biederman, linux-alpha, Linux FS Devel,
Andrew Morton, Linus Torvalds, containers
In-Reply-To: <20190820033406.29796-8-cyphar@cyphar.com>
On Mon, Aug 19, 2019 at 8:37 PM Aleksa Sarai <cyphar@cyphar.com> wrote:
>
> The most obvious syscall to add support for the new LOOKUP_* scoping
> flags would be openat(2). However, there are a few reasons why this is
> not the best course of action:
>
> * The new LOOKUP_* flags are intended to be security features, and
> openat(2) will silently ignore all unknown flags. This means that
> users would need to avoid foot-gunning themselves constantly when
> using this interface if it were part of openat(2). This can be fixed
> by having userspace libraries handle this for users[1], but should be
> avoided if possible.
>
> * Resolution scoping feels like a different operation to the existing
> O_* flags. And since openat(2) has limited flag space, it seems to be
> quite wasteful to clutter it with 5 flags that are all
> resolution-related. Arguably O_NOFOLLOW is also a resolution flag but
> its entire purpose is to error out if you encounter a trailing
> symlink -- not to scope resolution.
>
> * Other systems would be able to reimplement this syscall allowing for
> cross-OS standardisation rather than being hidden amongst O_* flags
> which may result in it not being used by all the parties that might
> want to use it (file servers, web servers, container runtimes, etc).
>
> * It gives us the opportunity to iterate on the O_PATH interface. In
> particular, the new @how->upgrade_mask field for fd re-opening is
> only possible because we have a clean slate without needing to re-use
> the ACC_MODE flag design nor the existing openat(2) @mode semantics.
>
> To this end, we introduce the openat2(2) syscall. It provides all of the
> features of openat(2) through the @how->flags argument, but also
> also provides a new @how->resolve argument which exposes RESOLVE_* flags
> that map to our new LOOKUP_* flags. It also eliminates the long-standing
> ugliness of variadic-open(2) by embedding it in a struct.
>
> In order to allow for userspace to lock down their usage of file
> descriptor re-opening, openat2(2) has the ability for users to disallow
> certain re-opening modes through @how->upgrade_mask. At the moment,
> there is no UPGRADE_NOEXEC. The open_how struct is padded to 64 bytes
> for future extensions (all of the reserved bits must be zeroed).
Why pad the structure when new functionality (perhaps accommodated via
a larger structure) could be signaled by passing a new flag? Adding
reserved fields to a structure with a size embedded in the ABI makes a
lot of sense --- e.g., pthread_mutex_t can't grow. But this structure
can grow, so the reservation seems needless to me.
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* Re: [PATCH v2] ARM: dts: vf610-zii-cfu1: Slow I2C0 down to 100 kHz
From: Shawn Guo @ 2019-08-24 19:25 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: Fabio Estevam, Chris Healy, linux-arm-kernel, linux-kernel
In-Reply-To: <20190821013936.12223-1-andrew.smirnov@gmail.com>
On Tue, Aug 20, 2019 at 06:39:36PM -0700, Andrey Smirnov wrote:
> Fiber-optic modules attached to the bus are only rated to work at
> 100 kHz, so decrease the bus frequency to accommodate that.
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Chris Healy <cphealy@gmail.com>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
Applied, thanks.
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* Re: [PATCH V4 02/11] dt-bindings: clock: imx-lpcg: add support to parse clocks from device tree
From: Shawn Guo @ 2019-08-24 19:21 UTC (permalink / raw)
To: Dong Aisheng
Cc: devicetree, sboyd, mturquette, Rob Herring, linux-imx, kernel,
fabio.estevam, linux-clk, linux-arm-kernel
In-Reply-To: <1566299605-15641-3-git-send-email-aisheng.dong@nxp.com>
On Tue, Aug 20, 2019 at 07:13:16AM -0400, Dong Aisheng wrote:
> MX8QM and MX8QXP LPCG Clocks are mostly the same except they may reside
> in different subsystems across CPUs and also vary a bit on the availability.
>
> Same as SCU clock, we want to move the clock definition into device tree
> which can fully decouple the dependency of Clock ID definition from device
> tree and make us be able to write a fully generic lpcg clock driver.
>
> And we can also use the existence of clock nodes in device tree to address
> the device and clock availability differences across different SoCs.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
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* Re: [PATCH V4 01/11] dt-bindings: firmware: imx-scu: new binding to parse clocks from device tree
From: Shawn Guo @ 2019-08-24 19:19 UTC (permalink / raw)
To: Dong Aisheng
Cc: devicetree, sboyd, mturquette, Rob Herring, linux-imx, kernel,
fabio.estevam, linux-clk, linux-arm-kernel
In-Reply-To: <1566299605-15641-2-git-send-email-aisheng.dong@nxp.com>
On Tue, Aug 20, 2019 at 07:13:15AM -0400, Dong Aisheng wrote:
> There's a few limitations on the original one cell clock binding
> (#clock-cells = <1>) that we have to define some SW clock IDs for device
> tree to reference. This may cause troubles if we want to use common
> clock IDs for multi platforms support when the clock of those platforms
> are mostly the same.
> e.g. Current clock IDs name are defined with SS prefix.
>
> However the device may reside in different SS across CPUs, that means the
> SS prefix may not valid anymore for a new SoC. Furthermore, the device
> availability of those clocks may also vary a bit.
>
> For such situation, we want to eliminate the using of SW Clock IDs and
> change to use a more close to HW one instead.
> For SCU clocks usage, only two params required: Resource id + Clock Type.
> Both parameters are platform independent. So we could use two cells binding
> to pass those parameters,
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
I'm fine with it.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Shawn
> ---
> ChangeLog:
> v3->v4:
> * add some comments for various clock types
> v2->v3:
> * Changed to two cells binding and register all clocks in driver
> instead of parse from device tree.
> v1->v2:
> * changed to one cell binding inspired by arm,scpi.txt
> Documentation/devicetree/bindings/arm/arm,scpi.txt
> Resource ID is encoded in 'reg' property.
> Clock type is encoded in generic clock-indices property.
> Then we don't have to search all the DT nodes to fetch
> those two value to construct clocks which is relatively
> low efficiency.
> * Add required power-domain property as well.
> ---
> .../devicetree/bindings/arm/freescale/fsl,scu.txt | 12 ++++++-----
> include/dt-bindings/firmware/imx/rsrc.h | 23 ++++++++++++++++++++++
> 2 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> index a575e42..8cee5bf 100644
> --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> @@ -89,7 +89,10 @@ Required properties:
> "fsl,imx8qm-clock"
> "fsl,imx8qxp-clock"
> followed by "fsl,scu-clk"
> -- #clock-cells: Should be 1. Contains the Clock ID value.
> +- #clock-cells: Should be either
> + 2: Contains the Resource and Clock ID value.
> + or
> + 1: Contains the Clock ID value. (DEPRECATED)
> - clocks: List of clock specifiers, must contain an entry for
> each required entry in clock-names
> - clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
> @@ -184,7 +187,7 @@ firmware {
>
> clk: clk {
> compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> - #clock-cells = <1>;
> + #clock-cells = <2>;
> };
>
> iomuxc {
> @@ -229,8 +232,7 @@ serial@5a060000 {
> ...
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_lpuart0>;
> - clocks = <&clk IMX8QXP_UART0_CLK>,
> - <&clk IMX8QXP_UART0_IPG_CLK>;
> - clock-names = "per", "ipg";
> + clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
> + clock-names = "ipg";
> power-domains = <&pd IMX_SC_R_UART_0>;
> };
> diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h
> index 4e61f64..24c153d 100644
> --- a/include/dt-bindings/firmware/imx/rsrc.h
> +++ b/include/dt-bindings/firmware/imx/rsrc.h
> @@ -547,4 +547,27 @@
> #define IMX_SC_R_ATTESTATION 545
> #define IMX_SC_R_LAST 546
>
> +/*
> + * Defines for SC PM CLK
> + */
> +
> +/* Normal device resource clock */
> +#define IMX_SC_PM_CLK_SLV_BUS 0 /* Slave bus clock */
> +#define IMX_SC_PM_CLK_MST_BUS 1 /* Master bus clock */
> +#define IMX_SC_PM_CLK_PER 2 /* Peripheral clock */
> +#define IMX_SC_PM_CLK_PHY 3 /* Phy clock */
> +#define IMX_SC_PM_CLK_MISC 4 /* Misc clock */
> +
> +/* Special clock types which do not belong to above normal clock types */
> +#define IMX_SC_PM_CLK_MISC0 0 /* Misc 0 clock */
> +#define IMX_SC_PM_CLK_MISC1 1 /* Misc 1 clock */
> +#define IMX_SC_PM_CLK_MISC2 2 /* Misc 2 clock */
> +#define IMX_SC_PM_CLK_MISC3 3 /* Misc 3 clock */
> +#define IMX_SC_PM_CLK_MISC4 4 /* Misc 4 clock */
> +
> +/* Special clock types for CPU/PLL/BYPASS only */
> +#define IMX_SC_PM_CLK_CPU 2 /* CPU clock */
> +#define IMX_SC_PM_CLK_PLL 4 /* PLL */
> +#define IMX_SC_PM_CLK_BYPASS 4 /* Bypass clock */
> +
> #endif /* __DT_BINDINGS_RSCRC_IMX_H */
> --
> 2.7.4
>
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* Re: [PATCH v4] arm64: dts: ls1088a: fix gpio node
From: Shawn Guo @ 2019-08-24 19:14 UTC (permalink / raw)
To: Hui Song
Cc: Mark Rutland, devicetree, linux-gpio, Linus Walleij, linux-kernel,
Li Yang, Bartosz Golaszewski, Rob Herring, linux-arm-kernel
In-Reply-To: <20190820055438.43469-1-hui.song_1@nxp.com>
On Tue, Aug 20, 2019 at 01:54:38PM +0800, Hui Song wrote:
> From: Song Hui <hui.song_1@nxp.com>
>
> add ls1088a gpio specify compatible.
>
> Signed-off-by: Song Hui <hui.song_1@nxp.com>
I updated the patch subject as below, and applied the patch.
arm64: dts: ls1088a: update gpio compatible
Shawn
> ---
> Changes in v4:
> - update the patch description.
> Changes in v3:
> - delete the attribute of little-endian.
> Changes in v2:
> - update the subject.
>
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index dfbead4..ff669c8 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -269,7 +269,7 @@
> };
>
> gpio0: gpio@2300000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
> reg = <0x0 0x2300000 0x0 0x10000>;
> interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
> little-endian;
> @@ -280,7 +280,7 @@
> };
>
> gpio1: gpio@2310000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
> reg = <0x0 0x2310000 0x0 0x10000>;
> interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
> little-endian;
> @@ -291,7 +291,7 @@
> };
>
> gpio2: gpio@2320000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
> reg = <0x0 0x2320000 0x0 0x10000>;
> interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
> little-endian;
> @@ -302,7 +302,7 @@
> };
>
> gpio3: gpio@2330000 {
> - compatible = "fsl,qoriq-gpio";
> + compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio";
> reg = <0x0 0x2330000 0x0 0x10000>;
> interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
> little-endian;
> --
> 2.9.5
>
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* Re: [PATCH] ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties
From: Shawn Guo @ 2019-08-24 19:11 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: Fabio Estevam, Chris Healy, linux-arm-kernel, linux-kernel
In-Reply-To: <20190820031952.14804-1-andrew.smirnov@gmail.com>
On Mon, Aug 19, 2019 at 08:19:52PM -0700, Andrey Smirnov wrote:
> Drop redundant I2C properties that are already specified in
> vf610-zii-dev.dtsi
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Chris Healy <cphealy@gmail.com>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 10 ----------
> 1 file changed, 10 deletions(-)
>
> diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
> index 48086c5e8549..e500911ce0a5 100644
> --- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
> +++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
> @@ -323,11 +323,6 @@
> };
>
> &i2c0 {
> - clock-frequency = <100000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c0>;
pinctrl for i2c0 is not same as what vf610-zii-dev.dtsi has.
Shawn
> - status = "okay";
> -
> gpio5: io-expander@20 {
> compatible = "nxp,pca9554";
> reg = <0x20>;
> @@ -350,11 +345,6 @@
> };
>
> &i2c2 {
> - clock-frequency = <100000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_i2c2>;
> - status = "okay";
> -
> tca9548@70 {
> compatible = "nxp,pca9548";
> pinctrl-0 = <&pinctrl_i2c_mux_reset>;
> --
> 2.21.0
>
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* Re: [PATCH] ARM: dts: vf610-zii-scu4-aib: Drop "rs485-rts-delay" property
From: Shawn Guo @ 2019-08-24 19:09 UTC (permalink / raw)
To: Andrey Smirnov; +Cc: Fabio Estevam, Chris Healy, linux-arm-kernel, linux-kernel
In-Reply-To: <20190820031301.11172-1-andrew.smirnov@gmail.com>
On Mon, Aug 19, 2019 at 08:13:01PM -0700, Andrey Smirnov wrote:
> LPUART driver does not support specifying "rs485-rts-delay"
> property. Drop it.
If so, we need to fix bindings/serial/fsl-lpuart.txt in the meantime?
Shawn
>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Chris Healy <cphealy@gmail.com>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> ---
> arch/arm/boot/dts/vf610-zii-scu4-aib.dts | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/vf610-zii-scu4-aib.dts
> index 666ec27a73e3..d8c38ef6a98a 100644
> --- a/arch/arm/boot/dts/vf610-zii-scu4-aib.dts
> +++ b/arch/arm/boot/dts/vf610-zii-scu4-aib.dts
> @@ -685,7 +685,6 @@
> linux,rs485-enabled-at-boot-time;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart1>;
> - rs485-rts-delay = <0 200>;
> status = "okay";
> };
>
> @@ -693,7 +692,6 @@
> linux,rs485-enabled-at-boot-time;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart2>;
> - rs485-rts-delay = <0 200>;
> status = "okay";
> };
>
> --
> 2.21.0
>
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* Re: [PATCH v4 2/2] arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support
From: Shawn Guo @ 2019-08-24 19:03 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: mark.rutland, devicetree, s.hauer, linux-kernel, Troy Kisky,
Gary Bisson, robh+dt, kernel, kernel, ezequiel, linux-arm-kernel
In-Reply-To: <20190819172606.6410-3-dafna.hirschfeld@collabora.com>
On Mon, Aug 19, 2019 at 07:26:06PM +0200, Dafna Hirschfeld wrote:
> From: Gary Bisson <gary.bisson@boundarydevices.com>
>
> Add basic dts support for i.MX8MQ NITROGEN8M.
>
> Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> [Dafna: porting vendor's code to mainline]
> Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
Applied, thanks.
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* Re: [PATCH v4 1/2] dt-bindings: arm: imx: add imx8mq nitrogen support
From: Shawn Guo @ 2019-08-24 19:01 UTC (permalink / raw)
To: Dafna Hirschfeld
Cc: Mark Rutland, devicetree, Sascha Hauer,
linux-kernel@vger.kernel.org, Troy Kisky, Gary Bisson,
Rob Herring, Sascha Hauer, kernel, Ezequiel Garcia,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <26b78fe57106f47d34f14bec2f81732af40c3d8d.camel@collabora.com>
On Tue, Aug 20, 2019 at 06:27:39PM +0200, Dafna Hirschfeld wrote:
> On Mon, 2019-08-19 at 14:08 -0500, Rob Herring wrote:
> > On Mon, Aug 19, 2019 at 12:26 PM Dafna Hirschfeld
> > <dafna.hirschfeld@collabora.com> wrote:
> > > From: Gary Bisson <gary.bisson@boundarydevices.com>
> > >
> > > The Nitrogen8M is an ARM based single board computer (SBC)
> > > designed to leverage the full capabilities of NXP’s i.MX8M
> > > Quad processor.
> > >
> > > Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
> > > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> > > [Dafna: porting vendor's code to mainline]
> > > Signed-off-by: Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
> > > ---
> > > Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
> > > 1 file changed, 1 insertion(+)
> >
> > Please add acks/reviewed-bys when posting new versions.
> >
> Hi,
> Thank you for the remark, I forgot to add it. I will add it in the
> next.
I applied the patch with Rob's Reviewed-by on v3.
Shawn
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* [PATCHv4 3/3] arm64: dts: meson: odroid-c2: Disable usb_otg bus to avoid power failed warning
From: Anand Moon @ 2019-08-24 18:49 UTC (permalink / raw)
To: Rob Herring, Martin Blumenstingl, Jerome Brunet, Neil Armstrong,
Kevin Hilman
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-amlogic
In-Reply-To: <20190824184912.795-1-linux.amoon@gmail.com>
usb_otg bus needs to get initialize from the u-boot to be configured
to used as power source to SBC or usb otg port will get configured
as host device. Right now this support is missing in the u-boot and
phy driver so to avoid power failed warning, we would disable this
feature until proper fix is found.
[ 2.716048] phy phy-c0000000.phy.0: USB ID detect failed!
[ 2.720186] phy phy-c0000000.phy.0: phy poweron failed --> -22
[ 2.726001] ------------[ cut here ]------------
[ 2.730583] WARNING: CPU: 0 PID: 12 at drivers/regulator/core.c:2039 _regulator_put+0x3c/0xe8
[ 2.738983] Modules linked in:
[ 2.742005] CPU: 0 PID: 12 Comm: kworker/0:1 Not tainted 5.2.9-1-ARCH #1
[ 2.748643] Hardware name: Hardkernel ODROID-C2 (DT)
[ 2.753566] Workqueue: events deferred_probe_work_func
[ 2.758649] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 2.763394] pc : _regulator_put+0x3c/0xe8
[ 2.767361] lr : _regulator_put+0x3c/0xe8
[ 2.771326] sp : ffff000011aa3a50
[ 2.774604] x29: ffff000011aa3a50 x28: ffff80007ed1b600
[ 2.779865] x27: ffff80007f7036a8 x26: ffff80007f7036a8
[ 2.785126] x25: 0000000000000000 x24: ffff000011a44458
[ 2.790387] x23: ffff000011344218 x22: 0000000000000009
[ 2.795649] x21: ffff000011aa3b68 x20: ffff80007ed1b500
[ 2.800910] x19: ffff80007ed1b500 x18: 0000000000000010
[ 2.806171] x17: 000000005be5943c x16: 00000000f1c73b29
[ 2.811432] x15: ffffffffffffffff x14: ffff0000117396c8
[ 2.816694] x13: ffff000091aa37a7 x12: ffff000011aa37af
[ 2.821955] x11: ffff000011763000 x10: ffff000011aa3730
[ 2.827216] x9 : 00000000ffffffd0 x8 : ffff000010871760
[ 2.832477] x7 : 00000000000000d0 x6 : ffff0000119d151b
[ 2.837739] x5 : 000000000000000f x4 : 0000000000000000
[ 2.843000] x3 : 0000000000000000 x2 : 38104b2678c20100
[ 2.848261] x1 : 0000000000000000 x0 : 0000000000000024
[ 2.853523] Call trace:
[ 2.855940] _regulator_put+0x3c/0xe8
[ 2.859562] regulator_put+0x34/0x48
[ 2.863098] regulator_bulk_free+0x40/0x58
[ 2.867153] devm_regulator_bulk_release+0x24/0x30
[ 2.871896] release_nodes+0x1f0/0x2e0
[ 2.875604] devres_release_all+0x64/0xa4
[ 2.879571] really_probe+0x1c8/0x3e0
[ 2.883194] driver_probe_device+0xe4/0x138
[ 2.887334] __device_attach_driver+0x90/0x110
[ 2.891733] bus_for_each_drv+0x8c/0xd8
[ 2.895527] __device_attach+0xdc/0x160
[ 2.899322] device_initial_probe+0x24/0x30
[ 2.903463] bus_probe_device+0x9c/0xa8
[ 2.907258] deferred_probe_work_func+0xa0/0xf0
[ 2.911745] process_one_work+0x1b4/0x408
[ 2.915711] worker_thread+0x54/0x4b8
[ 2.919334] kthread+0x12c/0x130
[ 2.922526] ret_from_fork+0x10/0x1c
[ 2.926060] ---[ end trace 51a68f4c0035d6c0 ]---
[ 2.930691] ------------[ cut here ]------------
[ 2.935242] WARNING: CPU: 0 PID: 12 at drivers/regulator/core.c:2039 _regulator_put+0x3c/0xe8
[ 2.943653] Modules linked in:
[ 2.946675] CPU: 0 PID: 12 Comm: kworker/0:1 Tainted: G W 5.2.9-1-ARCH #1
[ 2.954694] Hardware name: Hardkernel ODROID-C2 (DT)
[ 2.959613] Workqueue: events deferred_probe_work_func
[ 2.964700] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 2.969445] pc : _regulator_put+0x3c/0xe8
[ 2.973412] lr : _regulator_put+0x3c/0xe8
[ 2.977377] sp : ffff000011aa3a50
[ 2.980655] x29: ffff000011aa3a50 x28: ffff80007ed1b600
[ 2.985916] x27: ffff80007f7036a8 x26: ffff80007f7036a8
[ 2.991177] x25: 0000000000000000 x24: ffff000011a44458
[ 2.996439] x23: ffff000011344218 x22: 0000000000000009
[ 3.001700] x21: ffff000011aa3b68 x20: ffff80007ed1bd00
[ 3.006961] x19: ffff80007ed1bd00 x18: 0000000000000010
[ 3.012222] x17: 000000005be5943c x16: 00000000f1c73b29
[ 3.017484] x15: ffffffffffffffff x14: ffff0000117396c8
[ 3.022745] x13: ffff000091aa37a7 x12: ffff000011aa37af
[ 3.028006] x11: ffff000011763000 x10: ffff000011aa3730
[ 3.033267] x9 : 00000000ffffffd0 x8 : ffff000010871760
[ 3.038528] x7 : 00000000000000fd x6 : ffff0000119d151b
[ 3.043790] x5 : 000000000000000f x4 : 0000000000000000
[ 3.049051] x3 : 0000000000000000 x2 : 38104b2678c20100
[ 3.054312] x1 : 0000000000000000 x0 : 0000000000000024
[ 3.059574] Call trace:
[ 3.061991] _regulator_put+0x3c/0xe8
[ 3.065613] regulator_put+0x34/0x48
[ 3.069149] regulator_bulk_free+0x40/0x58
[ 3.073203] devm_regulator_bulk_release+0x24/0x30
[ 3.077947] release_nodes+0x1f0/0x2e0
[ 3.081655] devres_release_all+0x64/0xa4
[ 3.085622] really_probe+0x1c8/0x3e0
[ 3.089245] driver_probe_device+0xe4/0x138
[ 3.093385] __device_attach_driver+0x90/0x110
[ 3.097784] bus_for_each_drv+0x8c/0xd8
[ 3.101578] __device_attach+0xdc/0x160
[ 3.105373] device_initial_probe+0x24/0x30
[ 3.109514] bus_probe_device+0x9c/0xa8
[ 3.113309] deferred_probe_work_func+0xa0/0xf0
[ 3.117796] process_one_work+0x1b4/0x408
[ 3.121762] worker_thread+0x54/0x4b8
[ 3.125384] kthread+0x12c/0x130
[ 3.128575] ret_from_fork+0x10/0x1c
[ 3.132110] ---[ end trace 51a68f4c0035d6c1 ]---
[ 3.136753] dwc2: probe of c9000000.usb failed with error -22
Fixes: 5a0803bd5ae2 ("ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes")
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
[0] https://patchwork.kernel.org/patch/10757569/
Earlier my approach to initialize the usb0 bus was limited, some more
phy tuning is required both at driver and u-boot to get this feature
working. So for now just disable this.
---
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index f3dcabf97c63..792698a60a12 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -312,7 +312,7 @@
};
&usb0_phy {
- status = "okay";
+ status = "disabled";
phy-supply = <&usb_otg_pwr>;
};
@@ -322,7 +322,7 @@
};
&usb0 {
- status = "okay";
+ status = "disabled";
};
&usb1 {
--
2.23.0
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