* Re: [PATCH] input: keyboard: snvs_pwrkey: Send press and release event for i.MX6 S,DL and Q
From: Shawn Guo @ 2019-08-25 7:10 UTC (permalink / raw)
To: Robin van der Gracht
Cc: Mark Rutland, devicetree, Adam Ford, Sascha Hauer,
Dmitry Torokhov, linux-kernel, Rob Herring, NXP Linux Team,
Pengutronix Kernel Team, linux-input, Robin Gong, Fabio Estevam,
linux-arm-kernel
In-Reply-To: <20190823123002.10448-1-robin@protonic.nl>
On Fri, Aug 23, 2019 at 02:30:02PM +0200, Robin van der Gracht wrote:
> The older generation i.MX6 processors send a powerdown request interrupt if
> the powerkey is released before a hard shutdown (5 second press). This should
> allow software to bring down the SoC safely.
>
> For this driver to work as a regular powerkey with the older SoCs, we need to
> send a keypress AND release when we get the powerdown request interrupt.
>
> Signed-off-by: Robin van der Gracht <robin@protonic.nl>
> ---
> arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
> arch/arm/boot/dts/imx6sll.dtsi | 2 +-
> arch/arm/boot/dts/imx6sx.dtsi | 2 +-
> arch/arm/boot/dts/imx6ul.dtsi | 2 +-
> arch/arm/boot/dts/imx7s.dtsi | 2 +-
Please have dts changes in a separate patch.
> drivers/input/keyboard/Kconfig | 2 +-
> drivers/input/keyboard/snvs_pwrkey.c | 59 +++++++++++++++++++++++-----
> 7 files changed, 56 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index b3a77bcf00d51..c10d12658743c 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -836,7 +836,7 @@
> };
>
> snvs_pwrkey: snvs-powerkey {
> - compatible = "fsl,sec-v4.0-pwrkey";
> + compatible = "fsl,imx6qdl-sec-v4.0-pwrkey";
> regmap = <&snvs>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> linux,keycode = <KEY_POWER>;
> diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
> index 1b4899f0fcded..91c7d5bdcc359 100644
> --- a/arch/arm/boot/dts/imx6sll.dtsi
> +++ b/arch/arm/boot/dts/imx6sll.dtsi
> @@ -571,7 +571,7 @@
> };
>
> snvs_pwrkey: snvs-powerkey {
> - compatible = "fsl,sec-v4.0-pwrkey";
> + compatible = "fsl,imx6sx-sec-v4.0-pwrkey";
> regmap = <&snvs>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> linux,keycode = <KEY_POWER>;
> diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
> index b16a123990a26..b6736db65350f 100644
> --- a/arch/arm/boot/dts/imx6sx.dtsi
> +++ b/arch/arm/boot/dts/imx6sx.dtsi
> @@ -733,7 +733,7 @@
> };
>
> snvs_pwrkey: snvs-powerkey {
> - compatible = "fsl,sec-v4.0-pwrkey";
> + compatible = "fsl,imx6sx-sec-v4.0-pwrkey";
> regmap = <&snvs>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> linux,keycode = <KEY_POWER>;
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index a7f6d1d58e20d..d4678c52b55db 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -644,7 +644,7 @@
> };
>
> snvs_pwrkey: snvs-powerkey {
> - compatible = "fsl,sec-v4.0-pwrkey";
> + compatible = "fsl,imx6sx-sec-v4.0-pwrkey";
> regmap = <&snvs>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> linux,keycode = <KEY_POWER>;
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
> index 106711d2c01b0..bb68c23beb199 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -604,7 +604,7 @@
> };
>
> snvs_pwrkey: snvs-powerkey {
> - compatible = "fsl,sec-v4.0-pwrkey";
> + compatible = "fsl,imx6sx-sec-v4.0-pwrkey";
> regmap = <&snvs>;
> interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
> linux,keycode = <KEY_POWER>;
> diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
> index 7c4f19dab34fd..937e58da5ce17 100644
> --- a/drivers/input/keyboard/Kconfig
> +++ b/drivers/input/keyboard/Kconfig
> @@ -436,7 +436,7 @@ config KEYBOARD_SNVS_PWRKEY
> depends on OF
> help
> This is the snvs powerkey driver for the Freescale i.MX application
> - processors that are newer than i.MX6 SX.
> + processors.
>
> To compile this driver as a module, choose M here; the
> module will be called snvs_pwrkey.
> diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c
> index 5342d8d45f811..c321e5f2d1087 100644
> --- a/drivers/input/keyboard/snvs_pwrkey.c
> +++ b/drivers/input/keyboard/snvs_pwrkey.c
> @@ -29,6 +29,11 @@
> #define DEBOUNCE_TIME 30
> #define REPEAT_INTERVAL 60
>
> +enum imx_snvs_hwtype {
> + IMX6SX_SNVS, /* i.MX6 SoloX and newer */
> + IMX6QDL_SNVS, /* i.MX6 Solo, DualLite adn Quad */
> +};
> +
> struct pwrkey_drv_data {
> struct regmap *snvs;
> int irq;
> @@ -37,6 +42,19 @@ struct pwrkey_drv_data {
> int wakeup;
> struct timer_list check_timer;
> struct input_dev *input;
> + enum imx_snvs_hwtype hwtype;
> +};
> +
> +static const struct platform_device_id imx_snvs_devtype[] = {
> + {
> + .name = "imx6sx-snvs-pwrkey",
> + .driver_data = IMX6SX_SNVS,
> + }, {
> + .name = "imx6qdl-snvs-pwrkey",
> + .driver_data = IMX6QDL_SNVS,
> + }, {
> + /* sentinel */
> + }
> };
>
> static void imx_imx_snvs_check_for_events(struct timer_list *t)
> @@ -67,13 +85,23 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id)
> {
> struct platform_device *pdev = dev_id;
> struct pwrkey_drv_data *pdata = platform_get_drvdata(pdev);
> + struct input_dev *input = pdata->input;
> u32 lp_status;
>
> - pm_wakeup_event(pdata->input->dev.parent, 0);
> + pm_wakeup_event(input->dev.parent, 0);
>
> regmap_read(pdata->snvs, SNVS_LPSR_REG, &lp_status);
> - if (lp_status & SNVS_LPSR_SPO)
> - mod_timer(&pdata->check_timer, jiffies + msecs_to_jiffies(DEBOUNCE_TIME));
> + if (lp_status & SNVS_LPSR_SPO) {
> + if (pdata->hwtype == IMX6QDL_SNVS) {
> + input_report_key(input, pdata->keycode, 1);
> + input_report_key(input, pdata->keycode, 0);
> + input_sync(input);
> + pm_relax(input->dev.parent);
> + } else {
> + mod_timer(&pdata->check_timer,
> + jiffies + msecs_to_jiffies(DEBOUNCE_TIME));
> + }
> + }
>
> /* clear SPO status */
> regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO);
> @@ -88,11 +116,24 @@ static void imx_snvs_pwrkey_act(void *pdata)
> del_timer_sync(&pd->check_timer);
> }
>
> +static const struct of_device_id imx_snvs_pwrkey_ids[] = {
> + {
> + .compatible = "fsl,imx6sx-sec-v4.0-pwrkey",
The new compatible should be documented.
> + .data = &imx_snvs_devtype[IMX6SX_SNVS],
> + }, {
> + .compatible = "fsl,imx6qdl-sec-v4.0-pwrkey",
> + .data = &imx_snvs_devtype[IMX6QDL_SNVS],
> + },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, imx_snvs_pwrkey_ids);
> +
> static int imx_snvs_pwrkey_probe(struct platform_device *pdev)
> {
> struct pwrkey_drv_data *pdata = NULL;
> struct input_dev *input = NULL;
> struct device_node *np;
> + const struct of_device_id *of_id;
> int error;
>
> /* Get SNVS register Page */
> @@ -100,6 +141,11 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev)
> if (!np)
> return -ENODEV;
>
> + of_id = of_match_node(imx_snvs_pwrkey_ids, np);
> + if (!of_id)
> + return -ENODEV;
> + pdev->id_entry = of_id->data;
> +
> pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> if (!pdata)
> return -ENOMEM;
> @@ -116,6 +162,7 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev)
> }
>
> pdata->wakeup = of_property_read_bool(np, "wakeup-source");
> + pdata->hwtype = pdev->id_entry->driver_data;
>
> pdata->irq = platform_get_irq(pdev, 0);
> if (pdata->irq < 0) {
> @@ -175,12 +222,6 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev)
> return 0;
> }
>
> -static const struct of_device_id imx_snvs_pwrkey_ids[] = {
> - { .compatible = "fsl,sec-v4.0-pwrkey" },
The compatible should be kept for not breaking existing DTBs.
Shawn
> - { /* sentinel */ }
> -};
> -MODULE_DEVICE_TABLE(of, imx_snvs_pwrkey_ids);
> -
> static struct platform_driver imx_snvs_pwrkey_driver = {
> .driver = {
> .name = "snvs_pwrkey",
> --
> 2.20.1
>
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* [PATCH 7/7] arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
Swap to the rc-khadas keymap that maps the mouse button to KEY_MUTE.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
index 989d33a..f25ddd1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
@@ -299,7 +299,7 @@
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
- linux,rc-map-name = "rc-geekbox";
+ linux,rc-map-name = "rc-khadas";
};
&pwm_AO_ab {
--
2.7.4
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* [PATCH 6/7] arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
add the rc-tx3mini keymap to the ir node
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts
index 789c819..dd729ac 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts
@@ -20,3 +20,7 @@
reg = <0x0 0x0 0x0 0x40000000>; /* 1 GiB or 2 GiB */
};
};
+
+&ir {
+ linux,rc-map-name = "rc-tanix-tx3mini";
+};
--
2.7.4
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* [PATCH 5/7] arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
Swap to the rc-khadas keymap that maps the mouse button to KEY_MUTE.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
index 5499e8d..2a5cd30 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -110,7 +110,7 @@
};
&ir {
- linux,rc-map-name = "rc-geekbox";
+ linux,rc-map-name = "rc-khadas";
};
&gpio_ao {
--
2.7.4
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* [PATCH 4/7] arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
add the rc-wetek-play2 keymap to the ir node
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index 0038522..1d32d1f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -54,3 +54,7 @@
&usb1 {
status = "okay";
};
+
+&ir {
+ linux,rc-map-name = "rc-wetek-play2";
+};
--
2.7.4
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* [PATCH 3/7] arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
add the rc-wetek-hub keymap to the ir node
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
index 2bfe699..83b985b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
@@ -12,3 +12,7 @@
compatible = "wetek,hub", "amlogic,meson-gxbb";
model = "WeTek Hub";
};
+
+&ir {
+ linux,rc-map-name = "rc-wetek-hub";
+};
--
2.7.4
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* [PATCH 2/7] arm64: dts: meson-g12a-x96-max: add rc-x96max keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
add the rc-x96max keymap to the ir node
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
index fe4013c..357d7dc 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
@@ -277,6 +277,7 @@
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
+ linux,rc-map-name = "rc-x96max";
};
&ext_mdio {
--
2.7.4
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* [PATCH 1/7] arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
In-Reply-To: <1566705688-18442-1-git-send-email-christianshewitt@gmail.com>
add the rc-odroid keymap to the ir node
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index 81780ff..35cef76 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -314,6 +314,7 @@
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
+ linux,rc-map-name = "rc-odroid";
};
/* SD card */
--
2.7.4
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* [PATCH 0/7] arm64: dts: meson: ir keymap updates
From: Christian Hewitt @ 2019-08-25 4:01 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Chrisitian Hewitt
This series adds keymaps for several box/board vendor IR remote devices
to respective device-tree files. The keymaps were submitted in [0] and
have been queued for inclusion in Linux 5.4.
The Khadas remote change swaps the rc-geekbox keymap for rc-khadas. The
Geekbox branded remote was only sold for a brief period when VIM(1) was
a new device. The Khadas branded remote that replaced it exchanged the
Geekbox full-screen key for an Android mouse button using a different IR
keycode. The rc-khadas keymap supports the mouse button keycode and maps
it to KEY_MUTE.
[0] https://patchwork.kernel.org/project/linux-media/list/?series=160309
Christian Hewitt (7):
arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap
arm64: dts: meson-g12a-x96-max: add rc-x96max keymap
arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap
arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap
arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap
arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap
arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 1 +
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 1 +
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905w-tx3-mini.dts | 4 ++++
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts | 2 +-
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts | 2 +-
7 files changed, 16 insertions(+), 2 deletions(-)
--
2.7.4
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* RE: [PATCH v2 08/10] PCI: layerscape: Add EP mode support for ls1088a and ls2088a
From: Xiaowei Bao @ 2019-08-25 3:07 UTC (permalink / raw)
To: christophe leroy, Andrew Murray
Cc: mark.rutland@arm.com, Roy Zang, bhelgaas@google.com,
lorenzo.pieralisi@arm.co, arnd@arndb.de,
devicetree@vger.kernel.org, gregkh@linuxfoundation.org, Leo Li,
linux-kernel@vger.kernel.org, kishon@ti.com, M.h. Lian,
robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
linux-pci@vger.kernel.org, jingoohan1@gmail.com,
shawnguo@kernel.org, gustavo.pimentel@synopsys.com,
linuxppc-dev@lists.ozlabs.org, Mingkai Hu
In-Reply-To: <89c90732-5e42-f87e-73b1-8d615355afc4@c-s.fr>
> -----Original Message-----
> From: christophe leroy <christophe.leroy@c-s.fr>
> Sent: 2019年8月24日 14:45
> To: Xiaowei Bao <xiaowei.bao@nxp.com>; Andrew Murray
> <andrew.murray@arm.com>
> Cc: mark.rutland@arm.com; Roy Zang <roy.zang@nxp.com>;
> lorenzo.pieralisi@arm.co; arnd@arndb.de; devicetree@vger.kernel.org;
> gregkh@linuxfoundation.org; linuxppc-dev@lists.ozlabs.org;
> linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org; kishon@ti.com; M.h.
> Lian <minghuan.lian@nxp.com>; robh+dt@kernel.org;
> gustavo.pimentel@synopsys.com; jingoohan1@gmail.com;
> bhelgaas@google.com; Leo Li <leoyang.li@nxp.com>; shawnguo@kernel.org;
> Mingkai Hu <mingkai.hu@nxp.com>; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH v2 08/10] PCI: layerscape: Add EP mode support for
> ls1088a and ls2088a
>
>
>
> Le 24/08/2019 à 02:18, Xiaowei Bao a écrit :
> >
> >
> >> -----Original Message-----
> >> From: Andrew Murray <andrew.murray@arm.com>
> >> Sent: 2019年8月23日 22:28
> >> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> >> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> >> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> >> lorenzo.pieralisi@arm.co; arnd@arndb.de; gregkh@linuxfoundation.org;
> M.h.
> >> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> >> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> >> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> >> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> >> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
> >> Subject: Re: [PATCH v2 08/10] PCI: layerscape: Add EP mode support
> >> for ls1088a and ls2088a
> >>
> >> On Thu, Aug 22, 2019 at 07:22:40PM +0800, Xiaowei Bao wrote:
> >>> Add PCIe EP mode support for ls1088a and ls2088a, there are some
> >>> difference between LS1 and LS2 platform, so refactor the code of the
> >>> EP driver.
> >>>
> >>> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> >>> ---
> >>> v2:
> >>> - New mechanism for layerscape EP driver.
> >>
> >> Was there a v1 of this patch?
> >
> > Yes, but I don't know how to comments, ^_^
>
> As far as I can see, in the previous version of the series
> (https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.ozlabs.org%2Fproject%2Flinuxppc-dev%2Flist%2F%3Fseries%3D125315
> %26state%3D*&data=02%7C01%7Cxiaowei.bao%40nxp.com%7C1befe9
> a67c8046f9535e08d7285eaab6%7C686ea1d3bc2b4c6fa92cd99c5c301635%
> 7C0%7C0%7C637022259387139020&sdata=p4wbycd04Z7qRUfAoZtwc
> UP7pR%2FuA3%2FjVcWMz6YyQVQ%3D&reserved=0),
> the 8/10 was something completely different, and I can't find any other patch
> in the series that could have been the v1 of this patch.
Thanks, I will correct it to v1 in next version patch.
>
> Christophe
>
> >
> >>
> >>>
> >>> drivers/pci/controller/dwc/pci-layerscape-ep.c | 76
> >>> ++++++++++++++++++++------
> >>> 1 file changed, 58 insertions(+), 18 deletions(-)
> >>>
> >>> diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> >>> b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> >>> index 7ca5fe8..2a66f07 100644
> >>> --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> >>> +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> >>> @@ -20,27 +20,29 @@
> >>>
> >>> #define PCIE_DBI2_OFFSET 0x1000 /* DBI2 base address*/
> >>>
> >>> -struct ls_pcie_ep {
> >>> - struct dw_pcie *pci;
> >>> - struct pci_epc_features *ls_epc;
> >>> +#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
> >>> +
> >>> +struct ls_pcie_ep_drvdata {
> >>> + u32 func_offset;
> >>> + const struct dw_pcie_ep_ops *ops;
> >>> + const struct dw_pcie_ops *dw_pcie_ops;
> >>> };
> >>>
> >>> -#define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev)
> >>> +struct ls_pcie_ep {
> >>> + struct dw_pcie *pci;
> >>> + struct pci_epc_features *ls_epc;
> >>> + const struct ls_pcie_ep_drvdata *drvdata; };
> >>>
> >>> static int ls_pcie_establish_link(struct dw_pcie *pci) {
> >>> return 0;
> >>> }
> >>>
> >>> -static const struct dw_pcie_ops ls_pcie_ep_ops = {
> >>> +static const struct dw_pcie_ops dw_ls_pcie_ep_ops = {
> >>> .start_link = ls_pcie_establish_link, };
> >>>
> >>> -static const struct of_device_id ls_pcie_ep_of_match[] = {
> >>> - { .compatible = "fsl,ls-pcie-ep",},
> >>> - { },
> >>> -};
> >>> -
> >>> static const struct pci_epc_features*
> >>> ls_pcie_ep_get_features(struct dw_pcie_ep *ep) { @@ -82,10 +84,44
> >>> @@ static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
> >>> }
> >>> }
> >>>
> >>> -static const struct dw_pcie_ep_ops pcie_ep_ops = {
> >>> +static unsigned int ls_pcie_ep_func_conf_select(struct dw_pcie_ep *ep,
> >>> + u8 func_no)
> >>> +{
> >>> + struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
> >>> + struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci);
> >>> + u8 header_type;
> >>> +
> >>> + header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
> >>> +
> >>> + if (header_type & (1 << 7))
> >>> + return pcie->drvdata->func_offset * func_no;
> >>> + else
> >>> + return 0;
> >>
> >> It looks like there isn't a PCI define for multi function, the
> >> nearest I could find was PCI_HEADER_TYPE_MULTIDEVICE in
> >> hotplug/ibmphp.h. A comment above the test might be helpful to explain
> the test.
> >
> > Yes, I have not find the PCI_HEADER_TYPE_MULTIDEVICE define. OK, I
> > will add The comments in next version patch.
> >
> >>
> >> As the ls_pcie_ep_drvdata structures are static, the unset
> >> .func_offset will be initialised to 0, so you could just drop the test above.
> >
> > OK, thanks
> >
> >>
> >> However something to the effect of the following may help spot
> >> misconfiguration:
> >>
> >> WARN_ON(func_no && !pcie->drvdata->func_offset); return
> >> pcie->drvdata->func_offset * func_no;
> >
> > Thanks a lot, this looks better.
> >
> >>
> >> The WARN is probably quite useful as if you are attempting to use
> >> non-zero functions and func_offset isn't set - then things may appear
> >> to work normally but actually will break horribly.
> >
> > got it, thanks.
> >
> >>
> >> Thanks,
> >>
> >> Andrew Murray
> >>
> >>> +}
> >>> +
> >>> +static const struct dw_pcie_ep_ops ls_pcie_ep_ops = {
> >>> .ep_init = ls_pcie_ep_init,
> >>> .raise_irq = ls_pcie_ep_raise_irq,
> >>> .get_features = ls_pcie_ep_get_features,
> >>> + .func_conf_select = ls_pcie_ep_func_conf_select, };
> >>> +
> >>> +static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = {
> >>> + .ops = &ls_pcie_ep_ops,
> >>> + .dw_pcie_ops = &dw_ls_pcie_ep_ops, };
> >>> +
> >>> +static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = {
> >>> + .func_offset = 0x20000,
> >>> + .ops = &ls_pcie_ep_ops,
> >>> + .dw_pcie_ops = &dw_ls_pcie_ep_ops, };
> >>> +
> >>> +static const struct of_device_id ls_pcie_ep_of_match[] = {
> >>> + { .compatible = "fsl,ls1046a-pcie-ep", .data = &ls1_ep_drvdata },
> >>> + { .compatible = "fsl,ls1088a-pcie-ep", .data = &ls2_ep_drvdata },
> >>> + { .compatible = "fsl,ls2088a-pcie-ep", .data = &ls2_ep_drvdata },
> >>> + { },
> >>> };
> >>>
> >>> static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie, @@ -98,7
> >>> +134,7 @@ static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie,
> >>> int ret;
> >>>
> >>> ep = &pci->ep;
> >>> - ep->ops = &pcie_ep_ops;
> >>> + ep->ops = pcie->drvdata->ops;
> >>>
> >>> res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> >> "addr_space");
> >>> if (!res)
> >>> @@ -137,14 +173,11 @@ static int __init ls_pcie_ep_probe(struct
> >> platform_device *pdev)
> >>> if (!ls_epc)
> >>> return -ENOMEM;
> >>>
> >>> - dbi_base = platform_get_resource_byname(pdev,
> IORESOURCE_MEM,
> >> "regs");
> >>> - pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
> >>> - if (IS_ERR(pci->dbi_base))
> >>> - return PTR_ERR(pci->dbi_base);
> >>> + pcie->drvdata = of_device_get_match_data(dev);
> >>>
> >>> - pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET;
> >>> pci->dev = dev;
> >>> - pci->ops = &ls_pcie_ep_ops;
> >>> + pci->ops = pcie->drvdata->dw_pcie_ops;
> >>> +
> >>> pcie->pci = pci;
> >>>
> >>> ls_epc->linkup_notifier = false,
> >>> @@ -152,6 +185,13 @@ static int __init ls_pcie_ep_probe(struct
> >>> platform_device *pdev)
> >>>
> >>> pcie->ls_epc = ls_epc;
> >>>
> >>> + dbi_base = platform_get_resource_byname(pdev,
> IORESOURCE_MEM,
> >> "regs");
> >>> + pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base);
> >>> + if (IS_ERR(pci->dbi_base))
> >>> + return PTR_ERR(pci->dbi_base);
> >>> +
> >>> + pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET;
> >>> +
> >>> platform_set_drvdata(pdev, pcie);
> >>>
> >>> ret = ls_add_pcie_ep(pcie, pdev);
> >>> --
> >>> 2.9.5
> >>>
>
> ---
> L'absence de virus dans ce courrier électronique a été vérifiée par le logiciel
> antivirus Avast.
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
> avast.com%2Fantivirus&data=02%7C01%7Cxiaowei.bao%40nxp.com%7
> C1befe9a67c8046f9535e08d7285eaab6%7C686ea1d3bc2b4c6fa92cd99c5c3
> 01635%7C0%7C0%7C637022259387139020&sdata=JAYds7X%2FHVxgtrg
> e%2F%2FvnP84zdb2yReXcctQUiSLC11I%3D&reserved=0
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* Re: [PATCH v2 2/2] dma-contiguous: Use fallback alloc_pages for single pages
From: Christoph Hellwig @ 2019-08-25 1:10 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Ulf Hansson, Tony Lindgren, Catalin Marinas, Will Deacon,
Linux Kernel Mailing List, Max Filippov, Christoph Hellwig,
Marek Szyprowski, Stephen Rothwell, Joerg Roedel, Russell King,
Thierry Reding, linux-xtensa, Kees Cook, Nicolin Chen,
Andrew Morton, linux-arm-kernel, Chris Zankel, Wolfram Sang,
Robin Murphy, linux-mmc, Adrian Hunter, iommu, iamjoonsoo.kim,
David Woodhouse
In-Reply-To: <CAK7LNAQfYBCoChMV=MOwcUyVoqRkrPWs7DaWdzDqjBe18gGiAQ@mail.gmail.com>
On Fri, Aug 23, 2019 at 09:56:52PM +0900, Masahiro Yamada wrote:
> + linux-mmc, Ulf Hansson, Adrian Hunter,
>
>
> ADMA of SDHCI is not working
> since bd2e75633c8012fc8a7431c82fda66237133bf7e
Does it work for you with this commit:
http://git.infradead.org/users/hch/dma-mapping.git/commitdiff/90ae409f9eb3bcaf38688f9ec22375816053a08e
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* Re: [PATCH net-next v2 3/3] net: dsa: mt7530: Add support for port 5
From: David Miller @ 2019-08-24 23:19 UTC (permalink / raw)
To: opensource
Cc: andrew, f.fainelli, frank-w, netdev, sean.wang, linux-mips,
linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190821144547.15113-4-opensource@vdorst.com>
From: René van Dorst <opensource@vdorst.com>
Date: Wed, 21 Aug 2019 16:45:47 +0200
> + dev_info(ds->dev, "Setup P5, HWTRAP=0x%x, intf_sel=%s, phy-mode=%s\n",
> + val, p5_intf_modes(priv->p5_intf_sel), phy_modes(interface));
This is debugging, at best. Please make this a debugging message or
remove it entirely.
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* Re: [PATCH V5 1/5] iommu/amd: Remove unnecessary locking from AMD iommu driver
From: Christoph Hellwig @ 2019-08-24 22:41 UTC (permalink / raw)
To: Tom Murphy
Cc: Heiko Stuebner, virtualization, Matthias Brugger, Thierry Reding,
Will Deacon, Jean-Philippe Brucker, linux-samsung-soc,
Krzysztof Kozlowski, Jonathan Hunter, Christoph Hellwig,
linux-rockchip, Kukjin Kim, Andy Gross, linux-s390,
Gerald Schaefer, linux-arm-msm, linux-mediatek, linux-tegra,
linux-arm-kernel, Robin Murphy, Linux Kernel Mailing List, iommu,
David Woodhouse
In-Reply-To: <CALQxJussiGDzWFT1xhko6no5jZNOezWCFuJQUCr4XwH4NHri3Q@mail.gmail.com>
Thank for the explanation Tom. It might make sense to add a condensed
version of it to commit log for the next iteration.
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* Re: cleanup the dma_pgprot handling
From: Christoph Hellwig @ 2019-08-24 22:34 UTC (permalink / raw)
To: Paul Burton
Cc: Shawn Anastasio, Will Deacon, linux-m68k@lists.linux-m68k.org,
Catalin Marinas, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org, Russell King,
linux-mips@vger.kernel.org, iommu@lists.linux-foundation.org,
Geert Uytterhoeven, James Hogan, Guan Xuetao, Christoph Hellwig,
linux-arm-kernel@lists.infradead.org, Robin Murphy
In-Reply-To: <20190823215759.zprrwotlbva46y33@pburton-laptop>
On Fri, Aug 23, 2019 at 09:58:04PM +0000, Paul Burton wrote:
> So I believe uncached & uncached accelerated are another case like that
> described above - they're 2 different CCAs but the same "access type",
> namely uncached.
>
> Section 4.9 then goes on to forbid mixing access types, but not CCAs.
>
> It would be nice if the precise mapping from CCA to access type was
> provided, but I don't see that anywhere. I can check with the
> architecture team to be sure, but to my knowledge we're fine to mix
> access via kseg1 (ie. uncached) & mappings with CCA=7 (uncached
> accelerated).
Ok. Looks like we can keep it then and I'll add a comment to the
code with the above reference.
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Russell King - ARM Linux admin @ 2019-08-24 22:31 UTC (permalink / raw)
To: Andrew Lunn
Cc: f.fainelli, frank-w, netdev, sean.wang, linux-mips,
vivien.didelot, opensource, linux-mediatek, john, matthias.bgg,
David Miller, linux-arm-kernel
In-Reply-To: <20190824221519.GF8251@lunn.ch>
On Sun, Aug 25, 2019 at 12:15:19AM +0200, Andrew Lunn wrote:
> 65;5402;1cOn Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> > From: Andrew Lunn <andrew@lunn.ch>
> > Date: Fri, 23 Aug 2019 03:09:28 +0200
> >
> > > That would be Russell.
> > >
> > > We should try to improve MAINTAINER so that Russell King gets picked
> > > by the get_maintainer script.
> >
> > Shoule he be added to the mt7530 entry?
>
> Hi David
>
> No. I think we need a phylink entry. And then make use of the K: line
> format to list keywords. I hope that even though changes like this
> don't touch any files listed as being part of phylink, they will match
> the keyword and pickup Russell.
Note that phylink itself is already covered by
"SFF/SFP/SFP+ MODULE SUPPORT"
but doesn't pick up on keywords.
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Russell King - ARM Linux admin @ 2019-08-24 22:29 UTC (permalink / raw)
To: René van Dorst
Cc: Andrew Lunn, Florian Fainelli, Frank Wunderlich, netdev,
Sean Wang, linux-mips, David S . Miller, linux-mediatek,
John Crispin, Matthias Brugger, Vivien Didelot, linux-arm-kernel
In-Reply-To: <20190821144547.15113-1-opensource@vdorst.com>
On Wed, Aug 21, 2019 at 04:45:44PM +0200, René van Dorst wrote:
> 1. net: dsa: mt7530: Convert to PHYLINK API
> This patch converts mt7530 to PHYLINK API.
> 2. dt-bindings: net: dsa: mt7530: Add support for port 5
> 3. net: dsa: mt7530: Add support for port 5
> These 2 patches adding support for port 5 of the switch.
>
> v1->v2:
> * Mostly phylink improvements after review.
> rfc -> v1:
> * Mostly phylink improvements after review.
> * Drop phy isolation patches. Adds no value for now.
> René van Dorst (3):
> net: dsa: mt7530: Convert to PHYLINK API
> dt-bindings: net: dsa: mt7530: Add support for port 5
> net: dsa: mt7530: Add support for port 5
>
> .../devicetree/bindings/net/dsa/mt7530.txt | 218 ++++++++++
> drivers/net/dsa/mt7530.c | 371 +++++++++++++++---
> drivers/net/dsa/mt7530.h | 61 ++-
> 3 files changed, 577 insertions(+), 73 deletions(-)
Having looked through this set of patches, I don't see anything
from the phylink point of view that concerns me. So, for the
series from the phylink perspective:
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Thanks.
I did notice a dev_info() in patch 3 that you may like to consider
whether they should be printed at info level or debug level. You
may keep my ack on the patch when fixing that.
I haven't considered whether the patch passes davem's style
requirements for networking code; what I spotted did look like
the declarations were upside-down christmas tree.
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Russell King - ARM Linux admin @ 2019-08-24 22:18 UTC (permalink / raw)
To: David Miller
Cc: andrew, f.fainelli, frank-w, netdev, sean.wang, linux-mips,
opensource, linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190824.141803.1656753287804303137.davem@davemloft.net>
On Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added to the mt7530 entry?
Probably some way to make MAINTAINERS pick up on phylink-containing
patches. Something like:
K: phylink
maybe?
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Ondřej Jirman @ 2019-08-24 22:16 UTC (permalink / raw)
To: Jernej Škrabec
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
Chen-Yu Tsai, linux-arm-kernel, linux-rtc
In-Reply-To: <7913281.jYEbquIlsS@jernej-laptop>
On Sat, Aug 24, 2019 at 11:36:26PM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a):
> > Hello Jernej,
> >
> > On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > > > Visually?
> > > >
> > > > That would explain why it doesn't work for you. The mainline RTC driver
> > > > disables auto-switch feature, and if your board doesn't have a crystal
> > > > for
> > > > LOSC, RTC will not generate a clock for the RTC.
> > > >
> > > > H6's dtsi describes by default a situatiuon with external 32k crystal
> > > > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > > > doesn't have the crystal. You need to fix this in the DTS for your board
> > > > instead of patching the driver.
> > >
> > > I see that reparenting is supported, but I'm not sure how to fix that in
> > > DT. Any suggestion?
> >
> > You may try removing the clocks property from rtc node.
>
> I don't think this would work:
> https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L246
Well, I don't know. There has to be some way to make it work, since the code
deals with it here:
https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L270
Number of parents for LOSC is calculated from the DT somehow. Maybne something
to do with the #clock-cells property?
Sorry I can't be of more help here.
> >
> > > > The driver has parent clock selection logic in case the LOSC crystal is
> > > > not
> > > > used.
> > > >
> > > > Your patch enables automatic detection of LOSC failure and RTC changes
> > > > clock to LOSC automatically, despite what's described in the DTS. That
> > > > may fix the issue, but is not the correct solution.
> > > >
> > > > Registers on my board look like this (external 32k osc is used) for
> > > > reference:
> > > >
> > > > LOSC_CTRL_REG[7000000]: 8011
> > > >
> > > > KEY_FIELD ??? (0)
> > > > LOSC_AUTO_SWT_BYPASS EN (1)
> > > > LOSC_AUTO_SWT_EN DIS (0)
> > > > EXT_LOSC_EN EN (1)
> > > > EXT_LOSC_GSM LOW (0)
> > > > BATTERY_DIR DISCHARGE (0)
> > > > LOSC_SRC_SEL EXT32k (1)
> > > >
> > > > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > > >
> > > > EXT_LOSC_STA OK (0)
> > > > LOSC_AUTO_SWT_PEND NOEFF (0)
> > > > LOSC_SRC_SEL_STA EXT32K (1)
> > >
> > > In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> > > has value 0x4, so there is issue with external crystal (it's missing) and
> > > RTC switched to internal one.
> > >
> > > BTW, what's wrong with automatic switching? Why is it disabled?
> >
> > It always was disabled on mainline (bit 14 was set to 0 even before my
> > patch). H6 just probably has another extra undocummented bit, that's needed
> > to disables it properly.
> >
> > You probably don't want a glitch to switch your RTC from high-precision
> > clock to a low precision one possibly without any indication in the
> > userspace or a kernel log.
> >
> > Regardless of all this, DTS needs to have a correct description of the HW,
> > which means if RTC module is not connected to the 32.757kHz crystal/clock,
> > clocks property should be empty.
>
> If we are talking about correct HW description, then clock property should
> actually have possibility that two clocks are defined - one for internal RC
> (always present) and one external crystal (optional). In such case I could
> really just omit external clock and be done with it. But I'm not sure if such
Internal RC is thought to be part of the RTC module, so it's not defined as an
input clock to the RTC module.
regards,
Ondrej
>
> Best regards,
> Jernej
>
> >
> > regards,
> > o.
> >
> > > Best regards,
> > > Jernej
> > >
> > > > regards,
> > > >
> > > > o.
> > > >
> > > > > > The real issue probably is that the mainline driver is missing this:
> > > > > >
> > > > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-b
> > > > > > sp#n
> > > > > > 650
> > > > >
> > > > > Not sure what you mean by that. ext vs. int source selection?
> > > > >
> > > > >
> > > > >
> > > > > Best regards,
> > > > > Jernej
> > > > >
> > > > > > regards,
> > > > > >
> > > > > > o.
>
>
>
>
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: Andrew Lunn @ 2019-08-24 22:15 UTC (permalink / raw)
To: David Miller
Cc: f.fainelli, frank-w, netdev, sean.wang, linux-mips, opensource,
linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190824.141803.1656753287804303137.davem@davemloft.net>
65;5402;1cOn Sat, Aug 24, 2019 at 02:18:03PM -0700, David Miller wrote:
> From: Andrew Lunn <andrew@lunn.ch>
> Date: Fri, 23 Aug 2019 03:09:28 +0200
>
> > That would be Russell.
> >
> > We should try to improve MAINTAINER so that Russell King gets picked
> > by the get_maintainer script.
>
> Shoule he be added to the mt7530 entry?
Hi David
No. I think we need a phylink entry. And then make use of the K: line
format to list keywords. I hope that even though changes like this
don't touch any files listed as being part of phylink, they will match
the keyword and pickup Russell.
I need to do some testing and see if this actually works.
Andrew
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Jernej Škrabec @ 2019-08-24 21:36 UTC (permalink / raw)
To: linux-sunxi, megous
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, Chen-Yu Tsai, Rob Herring,
linux-arm-kernel, linux-rtc
In-Reply-To: <20190824212746.a5pyilkrrvysjjbd@core.my.home>
Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a):
> Hello Jernej,
>
> On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > > Visually?
> > >
> > > That would explain why it doesn't work for you. The mainline RTC driver
> > > disables auto-switch feature, and if your board doesn't have a crystal
> > > for
> > > LOSC, RTC will not generate a clock for the RTC.
> > >
> > > H6's dtsi describes by default a situatiuon with external 32k crystal
> > > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > > doesn't have the crystal. You need to fix this in the DTS for your board
> > > instead of patching the driver.
> >
> > I see that reparenting is supported, but I'm not sure how to fix that in
> > DT. Any suggestion?
>
> You may try removing the clocks property from rtc node.
I don't think this would work:
https://elixir.bootlin.com/linux/latest/source/drivers/rtc/rtc-sun6i.c#L246
>
> > > The driver has parent clock selection logic in case the LOSC crystal is
> > > not
> > > used.
> > >
> > > Your patch enables automatic detection of LOSC failure and RTC changes
> > > clock to LOSC automatically, despite what's described in the DTS. That
> > > may fix the issue, but is not the correct solution.
> > >
> > > Registers on my board look like this (external 32k osc is used) for
> > > reference:
> > >
> > > LOSC_CTRL_REG[7000000]: 8011
> > >
> > > KEY_FIELD ??? (0)
> > > LOSC_AUTO_SWT_BYPASS EN (1)
> > > LOSC_AUTO_SWT_EN DIS (0)
> > > EXT_LOSC_EN EN (1)
> > > EXT_LOSC_GSM LOW (0)
> > > BATTERY_DIR DISCHARGE (0)
> > > LOSC_SRC_SEL EXT32k (1)
> > >
> > > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > >
> > > EXT_LOSC_STA OK (0)
> > > LOSC_AUTO_SWT_PEND NOEFF (0)
> > > LOSC_SRC_SEL_STA EXT32K (1)
> >
> > In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> > has value 0x4, so there is issue with external crystal (it's missing) and
> > RTC switched to internal one.
> >
> > BTW, what's wrong with automatic switching? Why is it disabled?
>
> It always was disabled on mainline (bit 14 was set to 0 even before my
> patch). H6 just probably has another extra undocummented bit, that's needed
> to disables it properly.
>
> You probably don't want a glitch to switch your RTC from high-precision
> clock to a low precision one possibly without any indication in the
> userspace or a kernel log.
>
> Regardless of all this, DTS needs to have a correct description of the HW,
> which means if RTC module is not connected to the 32.757kHz crystal/clock,
> clocks property should be empty.
If we are talking about correct HW description, then clock property should
actually have possibility that two clocks are defined - one for internal RC
(always present) and one external crystal (optional). In such case I could
really just omit external clock and be done with it. But I'm not sure if such
solution is acceptable at this point.
Best regards,
Jernej
>
> regards,
> o.
>
> > Best regards,
> > Jernej
> >
> > > regards,
> > >
> > > o.
> > >
> > > > > The real issue probably is that the mainline driver is missing this:
> > > > >
> > > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-b
> > > > > sp#n
> > > > > 650
> > > >
> > > > Not sure what you mean by that. ext vs. int source selection?
> > > >
> > > >
> > > >
> > > > Best regards,
> > > > Jernej
> > > >
> > > > > regards,
> > > > >
> > > > > o.
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* Re: [PATCH RFC v1 2/2] mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host
From: Martin Blumenstingl @ 2019-08-24 21:34 UTC (permalink / raw)
To: Ulf Hansson
Cc: Mark Rutland, DTML, jianxin.pan, linux-mmc@vger.kernel.org,
Linux Kernel Mailing List, Rob Herring,
open list:ARM/Amlogic Meson..., Linux ARM
In-Reply-To: <CAPDyKFoFQ_QvHD-+Mg_VAR5rqs3CM_h7dw25p81JTzE1Yz7d1A@mail.gmail.com>
Hi Ulf,
On Thu, Aug 22, 2019 at 3:53 PM Ulf Hansson <ulf.hansson@linaro.org> wrote:
>
> On Mon, 8 Jul 2019 at 19:33, Martin Blumenstingl
> <martin.blumenstingl@googlemail.com> wrote:
> >
> > WiP - only partially working - see performance numbers.
> >
> > Odroid-C1 eMMC (HS-200):
> > Amlogic's vendor driver @ Linux 3.10:
> > 7781351936 bytes (7.8 GB) copied, 134.714 s, 57.8 MB/s
> > This driver:
> > 7781351936 bytes (7.8 GB, 7.2 GiB) copied, 189.02 s, 41.2 MB/s
> >
> > EC-100 eMMC (HS MMC):
> > Amlogic's vendor driver @ Linux 3.10:
> > 15762194432 bytes (16 GB) copied, 422.967 s, 37.3 MB/s
> > This driver:
> > 15762194432 bytes (16 GB, 15 GiB) copied, 9232.65 s, 1.7 MB/s
> >
> > 1) Amlogic's vendor driver does some magic with the divider:
> > clk_div = input_rate / clk_ios - !(input_rate%clk_ios);
> > if (!(clk_div & 0x01)) // if even number, turn it to an odd one
> > clk_div++;
> > It's not clear to me whether what the reason behind this is, what is
> > supposed to be achieved with this?
> >
> > 2) The hardcoded RX clock phases are taken from the vendor driver. It
> > seems that these are only valid when fclk_div3 is used as input
> > clock (however, there are four more inputs). It's not clear to me how
> > to calculate the RX clock phases in set_ios based on the input clock
> > and the ios rate.
> >
> > 3) The hardware supports a timeout IRQ but the max_busy_timeout is not
> > documented anywhere.
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>
> Martin, overall this looks good to me. Once you moved from RFC to a
> formal patch I will check again, of course.
OK, great
in the meantime I got answers to my questions (off-list) from Jianxin.
also someone asked me (just this week) for the .dts patches so he
could test on his own board (I have them ready but didn't send them
yet)
unfortunately he ran into some data corruption on writing
I can reproduce it but I didn't have time to debug this yet
I'll send an updated version once I have resolved that - as non-RFC
> There are a couple of calls to readl_poll_timeout(), for different
> reasons, that I have some questions about, but we can discuss those in
> the next step.
sure.
feel free to ask now since I still have to debug that data corruption
problem as stated above
Martin
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* Re: [PATCH v2, 3/3] arm64: dts: meson-g12b-ugoos-am6: add initial device-tree
From: Martin Blumenstingl @ 2019-08-24 21:29 UTC (permalink / raw)
To: Christian Hewitt
Cc: Mark Rutland, devicetree, Oleg Ivanov, Kevin Hilman, linux-kernel,
Rob Herring, linux-amlogic, linux-arm-kernel
In-Reply-To: <1566633850-9421-4-git-send-email-christianshewitt@gmail.com>
Hi Christian,
On Sat, Aug 24, 2019 at 10:06 AM Christian Hewitt
<christianshewitt@gmail.com> wrote:
>
> The Ugoos AM6 is based on the Amlogic W400 (G12B) reference design using the
> S922X chipset. Hardware specifications:
>
> - 2GB LPDDR4 RAM
> - 16GB eMMC storage
> - 10/100/1000 Base-T Ethernet using External RGMII PHY
> - 802.11 a/b/g/b/ac + BT 5.0 sdio wireless (Ampak 6398S)
> - HDMI 2.0 (4k@60p) video
> - Composite video + 2-channel audio output on 3.5mm jack
> - S/PDIF audio output
> - Aux input
> - 1x USB 3.0
> - 3x USB 2.0
> - 1x micro SD card slot
>
> The device-tree is laregly based on meson-g12b-odroid-n2 but with audio
typo -> largely
[...]
> + tflash_vdd: regulator-tflash_vdd {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "TFLASH_VDD";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
do we need regulator-always-on here as well, see [0]?
[...]
> + usb_pwr_en: regulator-usb_pwr_en {
> + compatible = "regulator-fixed";
> + regulator-name = "USB_PWR_EN";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc_5v>;
> +
> + /* Connected to the microUSB port power enable */
> + gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
the photos I found don't show a micro USB port (but 3x USB A 2.0 and
1x USB A 3.0 - just like you mentioned in the patch description)
does this regulator exist?
[...]
> +ðmac {
> + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> + phy-mode = "rgmii";
> + phy-handle = <&external_phy>;
> + amlogic,tx-delay-ns = <2>;
> +};
is the PHY reset GPIO not wired to GPIOZ_15 like on Odroid-N2 and X96 Max?
Martin
[0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts?id=dc7f2cb218b5ef65ab3d455a0e62d27e44075203
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* Re: [linux-sunxi] [PATCH v2 2/3] rtc: sun6i: Add support for H6 RTC
From: Ondřej Jirman @ 2019-08-24 21:27 UTC (permalink / raw)
To: Jernej Škrabec
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni, devicetree,
Maxime Ripard, linux-kernel, linux-sunxi, Rob Herring,
Chen-Yu Tsai, linux-arm-kernel, linux-rtc
In-Reply-To: <1690798.2HKiRSsjat@jernej-laptop>
Hello Jernej,
On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > Visually?
> >
> > That would explain why it doesn't work for you. The mainline RTC driver
> > disables auto-switch feature, and if your board doesn't have a crystal for
> > LOSC, RTC will not generate a clock for the RTC.
> >
> > H6's dtsi describes by default a situatiuon with external 32k crystal
> > oscillator. See ext_osc32k node. That's incorrect for your board if it
> > doesn't have the crystal. You need to fix this in the DTS for your board
> > instead of patching the driver.
>
> I see that reparenting is supported, but I'm not sure how to fix that in DT.
> Any suggestion?
You may try removing the clocks property from rtc node.
> >
> > The driver has parent clock selection logic in case the LOSC crystal is not
> > used.
> >
> > Your patch enables automatic detection of LOSC failure and RTC changes clock
> > to LOSC automatically, despite what's described in the DTS. That may fix
> > the issue, but is not the correct solution.
> >
> > Registers on my board look like this (external 32k osc is used) for
> > reference:
> >
> > LOSC_CTRL_REG[7000000]: 8011
> > KEY_FIELD ??? (0)
> > LOSC_AUTO_SWT_BYPASS EN (1)
> > LOSC_AUTO_SWT_EN DIS (0)
> > EXT_LOSC_EN EN (1)
> > EXT_LOSC_GSM LOW (0)
> > BATTERY_DIR DISCHARGE (0)
> > LOSC_SRC_SEL EXT32k (1)
> >
> > LOSC_AUTO_SWT_STA_REG[7000004]: 1
> > EXT_LOSC_STA OK (0)
> > LOSC_AUTO_SWT_PEND NOEFF (0)
> > LOSC_SRC_SEL_STA EXT32K (1)
> >
>
> In my case LOSC_CTRL_REG has value 0x4010 and LOSC_AUTO_SWT_STA_REG
> has value 0x4, so there is issue with external crystal (it's missing) and RTC
> switched to internal one.
>
> BTW, what's wrong with automatic switching? Why is it disabled?
It always was disabled on mainline (bit 14 was set to 0 even before my patch).
H6 just probably has another extra undocummented bit, that's needed to disables
it properly.
You probably don't want a glitch to switch your RTC from high-precision
clock to a low precision one possibly without any indication in the userspace
or a kernel log.
Regardless of all this, DTS needs to have a correct description of the HW,
which means if RTC module is not connected to the 32.757kHz crystal/clock,
clocks property should be empty.
regards,
o.
> Best regards,
> Jernej
>
> > regards,
> > o.
> >
> > > > The real issue probably is that the mainline driver is missing this:
> > > >
> > > > https://megous.com/git/linux/tree/drivers/rtc/rtc-sunxi.c?h=h6-4.9-bsp#n
> > > > 650
> > >
> > > Not sure what you mean by that. ext vs. int source selection?
> > >
> > >
> > >
> > > Best regards,
> > > Jernej
> > >
> > > > regards,
> > > >
> > > > o.
>
>
>
>
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* Re: [PATCHv4 0/3] Odroid c2 usb fixs
From: Martin Blumenstingl @ 2019-08-24 21:18 UTC (permalink / raw)
To: Anand Moon
Cc: devicetree, Neil Armstrong, Kevin Hilman, linux-kernel,
Rob Herring, linux-amlogic, linux-arm-kernel, Jerome Brunet
In-Reply-To: <20190824184912.795-1-linux.amoon@gmail.com>
Hi Anand,
thank you for the patches
On Sat, Aug 24, 2019 at 8:49 PM Anand Moon <linux.amoon@gmail.com> wrote:
[...]
> Anand Moon (3):
> arm64: dts: meson: odroid-c2: p5v0 is the main 5V power input
> arm64: dts: meson: odroid-c2: Add missing linking regulator to usb bus
> arm64: dts: meson: odroid-c2: Disable usb_otg bus to avoid power
> failed warning
this whole series is:
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Re: [PATCH net-next v2 0/3] net: dsa: mt7530: Convert to PHYLINK and add support for port 5
From: David Miller @ 2019-08-24 21:18 UTC (permalink / raw)
To: andrew
Cc: f.fainelli, frank-w, netdev, sean.wang, linux-mips, opensource,
linux-mediatek, john, matthias.bgg, vivien.didelot,
linux-arm-kernel
In-Reply-To: <20190823010928.GK13020@lunn.ch>
From: Andrew Lunn <andrew@lunn.ch>
Date: Fri, 23 Aug 2019 03:09:28 +0200
> That would be Russell.
>
> We should try to improve MAINTAINER so that Russell King gets picked
> by the get_maintainer script.
Shoule he be added to the mt7530 entry?
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