* Re: [PATCH v3 07/11] kselftest: arm64: fake_sigreturn_bad_size_for_magic0
From: Cristian Marussi @ 2019-08-30 14:49 UTC (permalink / raw)
To: Dave Martin; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190813162550.GE10425@arm.com>
On 13/08/2019 17:25, Dave Martin wrote:
> On Fri, Aug 02, 2019 at 06:02:56PM +0100, Cristian Marussi wrote:
>> Added a simple fake_sigreturn testcase which builds a ucontext_t
>
> Add
Ok
>
>> with a badly sized magic0 header and place it onto the stack.
>
> I usually call a record with magic number 0 a "terminator record".
>
Ok
>> Expects a SIGSEGV on test PASS.
>>
>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>> ---
>> .../arm64/signal/testcases/.gitignore | 1 +
>> .../fake_sigreturn_bad_size_for_magic0.c | 57 +++++++++++++++++++
>> 2 files changed, 58 insertions(+)
>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
>>
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> index 0ea6fdc3765c..cf2a73599818 100644
>> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> @@ -5,3 +5,4 @@ mangle_pstate_invalid_mode_el2
>> mangle_pstate_invalid_mode_el3
>> mangle_pstate_ssbs_regs
>> fake_sigreturn_bad_magic
>> +fake_sigreturn_bad_size_for_magic0
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
>> new file mode 100644
>> index 000000000000..2f53c4740c85
>> --- /dev/null
>> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size_for_magic0.c
>> @@ -0,0 +1,57 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (C) 2019 ARM Limited */
>> +
>
> #include <signal.h> ?
>
Ok
>> +#include <stdio.h>
>> +#include <ucontext.h>
>> +
>> +#include "test_signals_utils.h"
>> +#include "testcases.h"
>> +
>> +struct fake_sigframe sf;
>> +
>> +#define MIN_SZ_ALIGN 16
>> +
>> +static int fake_sigreturn_bad_size_for_magic0_run(struct tdescr *td,
>> + siginfo_t *si, ucontext_t *uc)
>> +{
>> + size_t resv_sz, offset;
>> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
>> +
>> + /* just to fill the ucontext_t with something real */
>> + if (!get_current_context(td, &sf.uc))
>> + return 1;
>> +
>> + resv_sz = GET_SF_RESV_SIZE(sf);
>> + /*
>> + * find the terminator, preserving existing headers
>> + * and verify amount of spare room in __reserved area.
>> + */
>> + head = get_terminator(shead, resv_sz, &offset);
>> + /*
>> + * try stripping extra_context header when low on space:
>> + * we need at least HDR_SZ + 16 space for the bad sized terminator.
>> + */
>> + if (head && resv_sz - offset < HDR_SZ + MIN_SZ_ALIGN) {
>> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
>> + resv_sz - offset);
>> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
>> + }
>> + /* just give up and timeout if still not enough space */
>> + if (head && resv_sz - offset >= HDR_SZ + MIN_SZ_ALIGN) {
>> + head->magic = 0;
>> + head->size = MIN_SZ_ALIGN;
>
> This is different from the amount of space we tested for
> (HDR_SZ + MIN_SZ_ALIGN) earlier.
>
> I'm not sure it matters which we use, but we should be consistent.
>
> I suggest sticking with HDR_SZ, unless there's something I've missed.
>
I'll stick to HDR_SZ in this case and use the new helper from 06/11
(get_starting_head)
> [...]
>
> Cheers
> ---Dave
>
Cheers
Cristian
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* Re: [PATCH 1/1] sched/rt: avoid contend with CFS task
From: Qais Yousef @ 2019-08-30 14:55 UTC (permalink / raw)
To: Valentin Schneider
Cc: wsd_upstream, Peter Zijlstra, linux-kernel, Jing-Ting Wu,
linux-mediatek, Matthias Brugger, linux-arm-kernel
In-Reply-To: <d5100b2d-46c4-5811-8274-8b06710d2594@arm.com>
On 08/29/19 11:38, Valentin Schneider wrote:
> On 29/08/2019 04:15, Jing-Ting Wu wrote:
> > At original linux design, RT & CFS scheduler are independent.
> > Current RT task placement policy will select the first cpu in
> > lowest_mask, even if the first CPU is running a CFS task.
> > This may put RT task to a running cpu and let CFS task runnable.
> >
> > So we select idle cpu in lowest_mask first to avoid preempting
> > CFS task.
> >
>
> Regarding the RT & CFS thing, that's working as intended. RT is a whole
> class above CFS, it shouldn't have to worry about CFS.
>
> On the other side of things, CFS does worry about RT. We have the concept
> of RT-pressure in the CFS scheduler, where RT tasks will reduce a CPU's
> capacity (see fair.c::scale_rt_capacity()).
>
> CPU capacity is looked at on CFS wakeup (see wake_cap() and
> find_idlest_cpu()), and the periodic load balancer tries to spread load
> over capacity, so it'll tend to put less things on CPUs that are also
> running RT tasks.
>
> If RT were to start avoiding rqs with CFS tasks, we'd end up with a nasty
> situation were both are avoiding each other. It's even more striking when
> you see that RT pressure is done with a rq-wide RT util_avg, which
> *doesn't* get migrated when a RT task migrates. So if you decide to move
> a RT task to an idle CPU "B" because CPU "A" had runnable CFS tasks, the
> CFS scheduler will keep seeing CPU "B" as not significantly RT-pressured
> while that util_avg signal ramps up, whereas it would correctly see CPU
> "A" as RT-pressured if the RT task previously ran there.
>
> So overall I think this is the wrong approach.
I like the idea, but yeah tend to agree the current approach might not be
enough.
I think the major problem here is that on generic systems where CFS is a first
class citizen, RT tasks can be hostile to them - not always necessarily for a
good reason.
To further complicate the matter, even among CFS tasks we can't tell which are
more important than the others - though hopefully latency-nice proposal will
make the situation better.
So I agree we have a problem here, but I think this patch is just a temporary
band aid and we need to do better. Though I have no concrete suggestion yet on
how to do that.
Another thing I couldn't quantify yet how common and how severe this problem is
yet. Jing-Ting, if you can share the details of your use case that'd be great.
Cheers
--
Qais Yousef
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* Re: [PATCH v3 08/11] kselftest: arm64: fake_sigreturn_missing_fpsimd
From: Cristian Marussi @ 2019-08-30 14:55 UTC (permalink / raw)
To: Dave Martin; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190813162622.GF10425@arm.com>
Hi
On 13/08/2019 17:26, Dave Martin wrote:
> On Fri, Aug 02, 2019 at 06:02:57PM +0100, Cristian Marussi wrote:
>> Added a simple fake_sigreturn testcase which builds a ucontext_t
>
> Add
Ok
>
>> without the required fpsimd_context and place it onto the stack.
>> Expects a SIGSEGV on test PASS.
>>
>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>> ---
>> .../arm64/signal/testcases/.gitignore | 1 +
>> .../testcases/fake_sigreturn_missing_fpsimd.c | 44 +++++++++++++++++++
>> 2 files changed, 45 insertions(+)
>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
>>
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> index cf2a73599818..17d1c5e73319 100644
>> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> @@ -6,3 +6,4 @@ mangle_pstate_invalid_mode_el3
>> mangle_pstate_ssbs_regs
>> fake_sigreturn_bad_magic
>> fake_sigreturn_bad_size_for_magic0
>> +fake_sigreturn_missing_fpsimd
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
>> new file mode 100644
>> index 000000000000..b8dd57ce6844
>> --- /dev/null
>> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_missing_fpsimd.c
>> @@ -0,0 +1,44 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (C) 2019 ARM Limited */
>> +
>
> signal.h?
>
Ok
>> +#include <stdio.h>
>> +#include <ucontext.h>
>> +
>> +#include "test_signals_utils.h"
>> +#include "testcases.h"
>> +
>> +struct fake_sigframe sf;
>> +
>> +static int fake_sigreturn_missing_fpsimd_run(struct tdescr *td,
>> + siginfo_t *si, ucontext_t *uc)
>> +{
>> + size_t resv_sz, offset;
>> + struct _aarch64_ctx *head = GET_SF_RESV_HEAD(sf);
>> +
>> + /* just to fill the ucontext_t with something real */
>> + if (!get_current_context(td, &sf.uc))
>> + return 1;
>> +
>> + resv_sz = GET_SF_RESV_SIZE(sf);
>> + head = get_header(head, FPSIMD_MAGIC, resv_sz, &offset);
>> + /* just give up and timeout if still not enough space */
>> + if (head && resv_sz - offset >= HDR_SZ) {
>> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
>> + resv_sz - offset);
>> + /* Just overwrite fpsmid_context */
>> + write_terminator_record(head);
>> +
>> + ASSERT_BAD_CONTEXT(&sf.uc);
>> + fake_sigreturn(&sf, sizeof(sf), 16);
>> + }
>> +
>> + return 1;
>> +}
>
> [...]
>
> Seems reasonable otherwise.
>
> Cheers
> ---Dave
>
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* Re: [PATCH 1/4] vmalloc: lift the arm flag for coherent mappings to common code
From: Christoph Hellwig @ 2019-08-30 14:59 UTC (permalink / raw)
To: Russell King - ARM Linux admin
Cc: linux-xtensa, linux-kernel, linux-mm, iommu, Robin Murphy,
Christoph Hellwig, linux-arm-kernel
In-Reply-To: <20190830092918.GV13294@shell.armlinux.org.uk>
On Fri, Aug 30, 2019 at 10:29:18AM +0100, Russell King - ARM Linux admin wrote:
> On Fri, Aug 30, 2019 at 08:29:21AM +0200, Christoph Hellwig wrote:
> > The arm architecture had a VM_ARM_DMA_CONSISTENT flag to mark DMA
> > coherent remapping for a while. Lift this flag to common code so
> > that we can use it generically. We also check it in the only place
> > VM_USERMAP is directly check so that we can entirely replace that
> > flag as well (although I'm not even sure why we'd want to allow
> > remapping DMA appings, but I'd rather not change behavior).
>
> Good, because if you did change that behaviour, you'd break almost
> every ARM framebuffer and cripple ARM audio drivers.
How would that break them? All the usual video and audio drivers that
use dma_alloc_* then use dma_mmap_* which never end up in the only place
that actually checks VM_USERMAP (remap_vmalloc_range_partial) as they
end up in the dma_map_ops mmap methods which contain what is effecitvely
open coded versions of that routine. There are very few callers of
remap_vmalloc_range_partial / remap_vmalloc_range, and while a few of
those actually are in media drivers and the virtual frame buffer video
driver, none of these seems to be called on dma memory (which would
be a layering violation anyway).
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* Re: [PATCH 1/7] iommu/arm-smmu: add Nvidia SMMUv2 implementation
From: Robin Murphy @ 2019-08-30 15:02 UTC (permalink / raw)
To: Krishna Reddy
Cc: talho, treding, mperttunen, linux-kernel, iommu, praithatha,
thomasz, snikam, linux-tegra, yhsu, jtukkinen, avanbrunt,
linux-arm-kernel
In-Reply-To: <1567118827-26358-2-git-send-email-vdumpa@nvidia.com>
On 29/08/2019 23:47, Krishna Reddy wrote:
> Add Nvidia SMMUv2 implementation and model info.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> MAINTAINERS | 2 +
> drivers/iommu/Makefile | 2 +-
> drivers/iommu/arm-smmu-impl.c | 2 +
> drivers/iommu/arm-smmu-nvidia.c | 97 +++++++++++++++++++++++++++++++++++++++++
> drivers/iommu/arm-smmu.c | 2 +
> drivers/iommu/arm-smmu.h | 2 +
> 6 files changed, 106 insertions(+), 1 deletion(-)
> create mode 100644 drivers/iommu/arm-smmu-nvidia.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 289fb06..b9d59e51 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -15785,9 +15785,11 @@ F: drivers/i2c/busses/i2c-tegra.c
>
> TEGRA IOMMU DRIVERS
> M: Thierry Reding <thierry.reding@gmail.com>
> +R: Krishna Reddy <vdumpa@nvidia.com>
> L: linux-tegra@vger.kernel.org
> S: Supported
> F: drivers/iommu/tegra*
> +F: drivers/iommu/arm-smmu-nvidia.c
>
> TEGRA KBC DRIVER
> M: Laxman Dewangan <ldewangan@nvidia.com>
> diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
> index a2729aa..7f5489e 100644
> --- a/drivers/iommu/Makefile
> +++ b/drivers/iommu/Makefile
> @@ -13,7 +13,7 @@ obj-$(CONFIG_MSM_IOMMU) += msm_iommu.o
> obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o amd_iommu_init.o
> obj-$(CONFIG_AMD_IOMMU_DEBUGFS) += amd_iommu_debugfs.o
> obj-$(CONFIG_AMD_IOMMU_V2) += amd_iommu_v2.o
> -obj-$(CONFIG_ARM_SMMU) += arm-smmu.o arm-smmu-impl.o
> +obj-$(CONFIG_ARM_SMMU) += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o
> obj-$(CONFIG_ARM_SMMU_V3) += arm-smmu-v3.o
> obj-$(CONFIG_DMAR_TABLE) += dmar.o
> obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o intel-pasid.o
> diff --git a/drivers/iommu/arm-smmu-impl.c b/drivers/iommu/arm-smmu-impl.c
> index 5c87a38..e5e595f 100644
> --- a/drivers/iommu/arm-smmu-impl.c
> +++ b/drivers/iommu/arm-smmu-impl.c
> @@ -162,6 +162,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu)
> break;
> case CAVIUM_SMMUV2:
> return cavium_smmu_impl_init(smmu);
> + case NVIDIA_SMMUV2:
> + return nvidia_smmu_impl_init(smmu);
> default:
> break;
> }
> diff --git a/drivers/iommu/arm-smmu-nvidia.c b/drivers/iommu/arm-smmu-nvidia.c
> new file mode 100644
> index 0000000..d93ceda
> --- /dev/null
> +++ b/drivers/iommu/arm-smmu-nvidia.c
> @@ -0,0 +1,97 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +// Nvidia ARM SMMU v2 implementation quirks
> +// Copyright (C) 2019 NVIDIA CORPORATION. All rights reserved.
> +
> +#define pr_fmt(fmt) "nvidia-smmu: " fmt
> +
> +#include <linux/bitfield.h>
> +#include <linux/delay.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include "arm-smmu.h"
> +
> +#define NUM_SMMU_INSTANCES 3
> +
> +struct nvidia_smmu {
> + struct arm_smmu_device smmu;
> + int num_inst;
> + void __iomem *bases[NUM_SMMU_INSTANCES];
> +};
> +
> +#define to_nsmmu(s) container_of(s, struct nvidia_smmu, smmu)
> +
> +#define nsmmu_page(smmu, inst, page) \
> + (((inst) ? to_nsmmu(smmu)->bases[(inst)] : smmu->base) + \
> + ((page) << smmu->pgshift))
> +
> +static u32 nsmmu_read_reg(struct arm_smmu_device *smmu,
> + int page, int offset)
> +{
> + return readl_relaxed(nsmmu_page(smmu, 0, page) + offset);
> +}
> +
> +static void nsmmu_write_reg(struct arm_smmu_device *smmu,
> + int page, int offset, u32 val)
> +{
> + int i;
> +
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++)
> + writel_relaxed(val, nsmmu_page(smmu, i, page) + offset);
> +}
> +
> +static u64 nsmmu_read_reg64(struct arm_smmu_device *smmu,
> + int page, int offset)
> +{
> + return readq_relaxed(nsmmu_page(smmu, 0, page) + offset);
> +}
> +
> +static void nsmmu_write_reg64(struct arm_smmu_device *smmu,
> + int page, int offset, u64 val)
> +{
> + int i;
> +
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++)
> + writeq_relaxed(val, nsmmu_page(smmu, i, page) + offset);
> +}
> +
> +static const struct arm_smmu_impl nsmmu_impl = {
> + .read_reg = nsmmu_read_reg,
> + .write_reg = nsmmu_write_reg,
> + .read_reg64 = nsmmu_read_reg64,
> + .write_reg64 = nsmmu_write_reg64,
> +};
> +
> +struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
> +{
> + int i;
> + struct nvidia_smmu *nsmmu;
> + struct resource *res;
> + struct device *dev = smmu->dev;
> + struct platform_device *pdev = to_platform_device(smmu->dev);
> +
> + nsmmu = devm_kzalloc(smmu->dev, sizeof(*nsmmu), GFP_KERNEL);
> + if (!nsmmu)
> + return ERR_PTR(-ENOMEM);
> +
> + nsmmu->smmu = *smmu;
> + /* Instance 0 is ioremapped by arm-smmu.c */
> + nsmmu->num_inst = 1;
> +
> + for (i = 1; i < NUM_SMMU_INSTANCES; i++) {
> + res = platform_get_resource(pdev, IORESOURCE_MEM, i);
> + if (!res)
> + break;
> + nsmmu->bases[i] = devm_ioremap_resource(dev, res);
> + if (IS_ERR(nsmmu->bases[i]))
> + return (struct arm_smmu_device *)nsmmu->bases[i];
> + nsmmu->num_inst++;
> + }
> +
> + nsmmu->smmu.impl = &nsmmu_impl;
> + devm_kfree(smmu->dev, smmu);
> + pr_info("Nvidia SMMUv2, Instances=%d\n", nsmmu->num_inst);
> +
> + return &nsmmu->smmu;
> +}
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 5b93c79..46e1641 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -1871,6 +1871,7 @@ ARM_SMMU_MATCH_DATA(arm_mmu401, ARM_SMMU_V1_64K, GENERIC_SMMU);
> ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500);
> ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
> ARM_SMMU_MATCH_DATA(qcom_smmuv2, ARM_SMMU_V2, QCOM_SMMUV2);
> +ARM_SMMU_MATCH_DATA(nvidia_smmuv2, ARM_SMMU_V2, NVIDIA_SMMUV2);
From the previous discussions, I got the impression that other than the
'novel' way they're integrated, the actual SMMU implementations were
unmodified Arm MMU-500s. Is that the case, or have I misread something?
Robin.
>
> static const struct of_device_id arm_smmu_of_match[] = {
> { .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 },
> @@ -1880,6 +1881,7 @@ static const struct of_device_id arm_smmu_of_match[] = {
> { .compatible = "arm,mmu-500", .data = &arm_mmu500 },
> { .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 },
> { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 },
> + { .compatible = "nvidia,smmu-v2", .data = &nvidia_smmuv2 },
> { },
> };
>
> diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
> index b19b6ca..9645bf1 100644
> --- a/drivers/iommu/arm-smmu.h
> +++ b/drivers/iommu/arm-smmu.h
> @@ -220,6 +220,7 @@ enum arm_smmu_implementation {
> ARM_MMU500,
> CAVIUM_SMMUV2,
> QCOM_SMMUV2,
> + NVIDIA_SMMUV2,
> };
>
> struct arm_smmu_device {
> @@ -398,5 +399,6 @@ static inline void arm_smmu_writeq(struct arm_smmu_device *smmu, int page,
> arm_smmu_writeq((s), ARM_SMMU_CB((s), (n)), (o), (v))
>
> struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu);
> +struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu);
>
> #endif /* _ARM_SMMU_H */
>
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* Re: [PATCH v4 07/10] KVM: arm64: Provide VCPU attributes for stolen time
From: Steven Price @ 2019-08-30 15:04 UTC (permalink / raw)
To: Marc Zyngier, Will Deacon, linux-arm-kernel, kvmarm
Cc: Mark Rutland, Radim Krčmář, kvm, Suzuki K Pouloze,
Catalin Marinas, linux-doc, Russell King, linux-kernel,
James Morse, Paolo Bonzini, Julien Thierry
In-Reply-To: <36104ec0-2237-fb0e-376f-ab50c23c6101@kernel.org>
On 30/08/2019 11:02, Marc Zyngier wrote:
> On 30/08/2019 09:42, Steven Price wrote:
>> Allow user space to inform the KVM host where in the physical memory
>> map the paravirtualized time structures should be located.
>>
>> User space can set an attribute on the VCPU providing the IPA base
>> address of the stolen time structure for that VCPU. This must be
>> repeated for every VCPU in the VM.
>>
>> The address is given in terms of the physical address visible to
>> the guest and must be 64 byte aligned. The guest will discover the
>> address via a hypercall.
>>
>> Signed-off-by: Steven Price <steven.price@arm.com>
>> ---
>> arch/arm64/include/asm/kvm_host.h | 7 +++++
>> arch/arm64/include/uapi/asm/kvm.h | 2 ++
>> arch/arm64/kvm/guest.c | 9 ++++++
>> include/uapi/linux/kvm.h | 2 ++
>> virt/kvm/arm/pvtime.c | 47 +++++++++++++++++++++++++++++++
>> 5 files changed, 67 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
>> index 1697e63f6dd8..6af16b29a41f 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -489,6 +489,13 @@ long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu);
>> long kvm_hypercall_stolen_time(struct kvm_vcpu *vcpu);
>> int kvm_update_stolen_time(struct kvm_vcpu *vcpu, bool init);
>>
>> +int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr);
>> +int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr);
>> +int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr);
>> +
>> static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch)
>> {
>> vcpu_arch->steal.base = GPA_INVALID;
>> diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h
>> index 9a507716ae2f..bde9f165ad3a 100644
>> --- a/arch/arm64/include/uapi/asm/kvm.h
>> +++ b/arch/arm64/include/uapi/asm/kvm.h
>> @@ -323,6 +323,8 @@ struct kvm_vcpu_events {
>> #define KVM_ARM_VCPU_TIMER_CTRL 1
>> #define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
>> #define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
>> +#define KVM_ARM_VCPU_PVTIME_CTRL 2
>> +#define KVM_ARM_VCPU_PVTIME_SET_IPA 0
>>
>> /* KVM_IRQ_LINE irq field index values */
>> #define KVM_ARM_IRQ_TYPE_SHIFT 24
>> diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
>> index dfd626447482..d3ac9d2fd405 100644
>> --- a/arch/arm64/kvm/guest.c
>> +++ b/arch/arm64/kvm/guest.c
>> @@ -858,6 +858,9 @@ int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
>> case KVM_ARM_VCPU_TIMER_CTRL:
>> ret = kvm_arm_timer_set_attr(vcpu, attr);
>> break;
>> + case KVM_ARM_VCPU_PVTIME_CTRL:
>> + ret = kvm_arm_pvtime_set_attr(vcpu, attr);
>> + break;
>> default:
>> ret = -ENXIO;
>> break;
>> @@ -878,6 +881,9 @@ int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
>> case KVM_ARM_VCPU_TIMER_CTRL:
>> ret = kvm_arm_timer_get_attr(vcpu, attr);
>> break;
>> + case KVM_ARM_VCPU_PVTIME_CTRL:
>> + ret = kvm_arm_pvtime_get_attr(vcpu, attr);
>> + break;
>> default:
>> ret = -ENXIO;
>> break;
>> @@ -898,6 +904,9 @@ int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
>> case KVM_ARM_VCPU_TIMER_CTRL:
>> ret = kvm_arm_timer_has_attr(vcpu, attr);
>> break;
>> + case KVM_ARM_VCPU_PVTIME_CTRL:
>> + ret = kvm_arm_pvtime_has_attr(vcpu, attr);
>> + break;
>> default:
>> ret = -ENXIO;
>> break;
>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
>> index 5e3f12d5359e..265156a984f2 100644
>> --- a/include/uapi/linux/kvm.h
>> +++ b/include/uapi/linux/kvm.h
>> @@ -1222,6 +1222,8 @@ enum kvm_device_type {
>> #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS
>> KVM_DEV_TYPE_XIVE,
>> #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE
>> + KVM_DEV_TYPE_ARM_PV_TIME,
>> +#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME
>> KVM_DEV_TYPE_MAX,
>> };
>>
>> diff --git a/virt/kvm/arm/pvtime.c b/virt/kvm/arm/pvtime.c
>> index d9d0dbc6994b..7b1834b98a68 100644
>> --- a/virt/kvm/arm/pvtime.c
>> +++ b/virt/kvm/arm/pvtime.c
>> @@ -2,7 +2,9 @@
>> // Copyright (C) 2019 Arm Ltd.
>>
>> #include <linux/arm-smccc.h>
>> +#include <linux/kvm_host.h>
>>
>> +#include <asm/kvm_mmu.h>
>> #include <asm/pvclock-abi.h>
>>
>> #include <kvm/arm_hypercalls.h>
>> @@ -75,3 +77,48 @@ long kvm_hypercall_stolen_time(struct kvm_vcpu *vcpu)
>>
>> return vcpu->arch.steal.base;
>> }
>> +
>> +int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr)
>> +{
>> + u64 __user *user = (u64 __user *)attr->addr;
>> + u64 ipa;
>> +
>> + if (attr->attr != KVM_ARM_VCPU_PVTIME_SET_IPA)
>> + return -ENXIO;
>> +
>> + if (get_user(ipa, user))
>> + return -EFAULT;
>> + if (ipa & 63)
>
> nit: Please express this as !IS_ALIGNED(ipa, 64) instead.
Sure
>> + return -EINVAL;
>> + if (vcpu->arch.steal.base != GPA_INVALID)
>> + return -EEXIST;
>> + vcpu->arch.steal.base = ipa;
>
> I'm still worried that you end-up not knowing whether the IPA is valid
> or not at this stage, nor that we check about overlapping vcpus. How do
> we validate that?
Considering we really can't reasonably validate IPA overlapping with
guest memory (how is the host to know what is 'guest memory'), I'm not
convinced it's worth the code to detect overlapping vcpus. Nothing bad
will happen to the host in this case (the kvm_put_guest() calls will
just clobber each other).
In terms of checking the IPA is valid - again this is something that can
change in the lifetime of the VM, so the check at setup time isn't
particularly useful. Currently it's also possible to create the vcpus
(including setting up the stolen time) before the memory is assigned to
the guest as long as the vcpus are not started. This seems like a useful
level of flexibility.
> I also share Christoffer's concern that the memslot parsing may be
> expensive on a system with multiple memslots. But maybe that can be
> solved by adding some caching capabilities to your kvm_put_guest(),
> should this become a problem.
Yes it should be possible to add it - I'd like to wait to see whether
user actually want to use multiple memslots though - it's quite possible
to use a single memslot for both guest memory and stolen time structures.
>> + return 0;
>> +}
>> +
>> +int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr)
>> +{
>> + u64 __user *user = (u64 __user *)attr->addr;
>> + u64 ipa;
>> +
>> + if (attr->attr != KVM_ARM_VCPU_PVTIME_SET_IPA)
>
> It is a bit odd that this is using "SET_IPA" as a way to GET it.
Yes that does look weird. I'll drop the "SET_" part from the symbol. I'm
not sure what I was thinking when I named that.
Thanks,
Steve
>> + return -ENXIO;
>> +
>> + ipa = vcpu->arch.steal.base;
>> +
>> + if (put_user(ipa, user))
>> + return -EFAULT;
>> + return 0;
>> +}
>> +
>> +int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,
>> + struct kvm_device_attr *attr)
>> +{
>> + switch (attr->attr) {
>> + case KVM_ARM_VCPU_PVTIME_SET_IPA:
>> + return 0;
>> + }
>> + return -ENXIO;
>> +}
>>
>
> Thanks,
>
> M.
>
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^ permalink raw reply
* [PATCH] PCI: Move ATS declarations to linux/pci.h
From: Krzysztof Wilczynski @ 2019-08-30 15:07 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Will Deacon, Joerg Roedel, linux-kernel, iommu, linux-pci,
Robin Murphy, David Woodhouse, linux-arm-kernel
Move ATS function prototypes from include/linux/pci-ats.h to
include/linux/pci.h so users only need to include <linux/pci.h>:
Realted to PRI capability:
pci_enable_pri()
pci_disable_pri()
pci_restore_pri_state()
pci_reset_pri()
Related to PASID capability:
pci_enable_pasid()
pci_disable_pasid()
pci_restore_pasid_state()
pci_pasid_features()
pci_max_pasids()
pci_prg_resp_pasid_required()
No functional changes intended.
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
---
drivers/iommu/amd_iommu.c | 1 -
drivers/iommu/arm-smmu-v3.c | 1 -
drivers/iommu/intel-iommu.c | 1 -
drivers/iommu/intel-pasid.c | 1 -
drivers/iommu/intel-svm.c | 1 -
drivers/pci/ats.c | 1 -
drivers/pci/pci.c | 1 -
include/linux/pci-ats.h | 77 -------------------------------------
include/linux/pci.h | 34 ++++++++++++++++
9 files changed, 34 insertions(+), 84 deletions(-)
delete mode 100644 include/linux/pci-ats.h
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 04a9f8443344..d43913386915 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -13,7 +13,6 @@
#include <linux/acpi.h>
#include <linux/amba/bus.h>
#include <linux/platform_device.h>
-#include <linux/pci-ats.h>
#include <linux/bitmap.h>
#include <linux/slab.h>
#include <linux/debugfs.h>
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 0ad6d34d1e96..3bd9455efc39 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -29,7 +29,6 @@
#include <linux/of_iommu.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
-#include <linux/pci-ats.h>
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 4658cda6f3d2..362845b5c88a 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -35,7 +35,6 @@
#include <linux/syscore_ops.h>
#include <linux/tboot.h>
#include <linux/dmi.h>
-#include <linux/pci-ats.h>
#include <linux/memblock.h>
#include <linux/dma-contiguous.h>
#include <linux/dma-direct.h>
diff --git a/drivers/iommu/intel-pasid.c b/drivers/iommu/intel-pasid.c
index 040a445be300..f670315afa67 100644
--- a/drivers/iommu/intel-pasid.c
+++ b/drivers/iommu/intel-pasid.c
@@ -16,7 +16,6 @@
#include <linux/iommu.h>
#include <linux/memory.h>
#include <linux/pci.h>
-#include <linux/pci-ats.h>
#include <linux/spinlock.h>
#include "intel-pasid.h"
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c
index 780de0caafe8..ee9dfc84f925 100644
--- a/drivers/iommu/intel-svm.c
+++ b/drivers/iommu/intel-svm.c
@@ -13,7 +13,6 @@
#include <linux/intel-svm.h>
#include <linux/rculist.h>
#include <linux/pci.h>
-#include <linux/pci-ats.h>
#include <linux/dmar.h>
#include <linux/interrupt.h>
#include <linux/mm_types.h>
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c
index e18499243f84..3f5fb2d4a763 100644
--- a/drivers/pci/ats.c
+++ b/drivers/pci/ats.c
@@ -10,7 +10,6 @@
*/
#include <linux/export.h>
-#include <linux/pci-ats.h>
#include <linux/pci.h>
#include <linux/slab.h>
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index f20a3de57d21..c8f2a05e6b37 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -29,7 +29,6 @@
#include <linux/pm_runtime.h>
#include <linux/pci_hotplug.h>
#include <linux/vmalloc.h>
-#include <linux/pci-ats.h>
#include <asm/setup.h>
#include <asm/dma.h>
#include <linux/aer.h>
diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h
deleted file mode 100644
index 1ebb88e7c184..000000000000
--- a/include/linux/pci-ats.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef LINUX_PCI_ATS_H
-#define LINUX_PCI_ATS_H
-
-#include <linux/pci.h>
-
-#ifdef CONFIG_PCI_PRI
-
-int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
-void pci_disable_pri(struct pci_dev *pdev);
-void pci_restore_pri_state(struct pci_dev *pdev);
-int pci_reset_pri(struct pci_dev *pdev);
-
-#else /* CONFIG_PCI_PRI */
-
-static inline int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
-{
- return -ENODEV;
-}
-
-static inline void pci_disable_pri(struct pci_dev *pdev)
-{
-}
-
-static inline void pci_restore_pri_state(struct pci_dev *pdev)
-{
-}
-
-static inline int pci_reset_pri(struct pci_dev *pdev)
-{
- return -ENODEV;
-}
-
-#endif /* CONFIG_PCI_PRI */
-
-#ifdef CONFIG_PCI_PASID
-
-int pci_enable_pasid(struct pci_dev *pdev, int features);
-void pci_disable_pasid(struct pci_dev *pdev);
-void pci_restore_pasid_state(struct pci_dev *pdev);
-int pci_pasid_features(struct pci_dev *pdev);
-int pci_max_pasids(struct pci_dev *pdev);
-int pci_prg_resp_pasid_required(struct pci_dev *pdev);
-
-#else /* CONFIG_PCI_PASID */
-
-static inline int pci_enable_pasid(struct pci_dev *pdev, int features)
-{
- return -EINVAL;
-}
-
-static inline void pci_disable_pasid(struct pci_dev *pdev)
-{
-}
-
-static inline void pci_restore_pasid_state(struct pci_dev *pdev)
-{
-}
-
-static inline int pci_pasid_features(struct pci_dev *pdev)
-{
- return -EINVAL;
-}
-
-static inline int pci_max_pasids(struct pci_dev *pdev)
-{
- return -EINVAL;
-}
-
-static inline int pci_prg_resp_pasid_required(struct pci_dev *pdev)
-{
- return 0;
-}
-#endif /* CONFIG_PCI_PASID */
-
-
-#endif /* LINUX_PCI_ATS_H*/
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 463486016290..8ac142801890 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -2349,6 +2349,40 @@ static inline bool pci_is_thunderbolt_attached(struct pci_dev *pdev)
void pci_uevent_ers(struct pci_dev *pdev, enum pci_ers_result err_type);
#endif
+#ifdef CONFIG_PCI_PRI
+int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
+void pci_disable_pri(struct pci_dev *pdev);
+void pci_restore_pri_state(struct pci_dev *pdev);
+int pci_reset_pri(struct pci_dev *pdev);
+#else /* CONFIG_PCI_PRI */
+static inline int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
+{ return -ENODEV; }
+static inline void pci_disable_pri(struct pci_dev *pdev) { }
+static inline void pci_restore_pri_state(struct pci_dev *pdev) { }
+static inline int pci_reset_pri(struct pci_dev *pdev)
+{ return -ENODEV; }
+#endif /* CONFIG_PCI_PRI */
+
+#ifdef CONFIG_PCI_PASID
+int pci_enable_pasid(struct pci_dev *pdev, int features);
+void pci_disable_pasid(struct pci_dev *pdev);
+void pci_restore_pasid_state(struct pci_dev *pdev);
+int pci_pasid_features(struct pci_dev *pdev);
+int pci_max_pasids(struct pci_dev *pdev);
+int pci_prg_resp_pasid_required(struct pci_dev *pdev);
+#else /* CONFIG_PCI_PASID */
+static inline int pci_enable_pasid(struct pci_dev *pdev, int features)
+{ return -EINVAL; }
+static inline void pci_disable_pasid(struct pci_dev *pdev) { }
+static inline void pci_restore_pasid_state(struct pci_dev *pdev) { }
+static inline int pci_pasid_features(struct pci_dev *pdev)
+{ return -EINVAL; }
+static inline int pci_max_pasids(struct pci_dev *pdev)
+{ return -EINVAL; }
+static inline int pci_prg_resp_pasid_required(struct pci_dev *pdev)
+{ return 0; }
+#endif /* CONFIG_PCI_PASID */
+
/* Provide the legacy pci_dma_* API */
#include <linux/pci-dma-compat.h>
--
2.22.1
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^ permalink raw reply related
* Re: [PATCH v3 09/11] kselftest: arm64: fake_sigreturn_duplicated_fpsimd
From: Cristian Marussi @ 2019-08-30 15:11 UTC (permalink / raw)
To: Dave Martin; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190813162633.GG10425@arm.com>
On 13/08/2019 17:26, Dave Martin wrote:
> On Fri, Aug 02, 2019 at 06:02:58PM +0100, Cristian Marussi wrote:
>> Added a simple fake_sigreturn testcase which builds a ucontext_t
>
> Add
Ok
>
>> with an anomalous additional fpsimd_context and place it onto the stack.
>> Expects a SIGSEGV on test PASS.
>>
>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>> ---
>> .../arm64/signal/testcases/.gitignore | 1 +
>> .../fake_sigreturn_duplicated_fpsimd.c | 62 +++++++++++++++++++
>> 2 files changed, 63 insertions(+)
>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
>>
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> index 17d1c5e73319..94f9baaf638c 100644
>> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> @@ -7,3 +7,4 @@ mangle_pstate_ssbs_regs
>> fake_sigreturn_bad_magic
>> fake_sigreturn_bad_size_for_magic0
>> fake_sigreturn_missing_fpsimd
>> +fake_sigreturn_duplicated_fpsimd
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
>> new file mode 100644
>> index 000000000000..09af7a0f8776
>> --- /dev/null
>> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_duplicated_fpsimd.c
>> @@ -0,0 +1,62 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (C) 2019 ARM Limited */
>> +
>
> signal.h?
Ok
>
>> +#include <stdio.h>
>> +#include <ucontext.h>
>> +
>> +#include "test_signals_utils.h"
>> +#include "testcases.h"
>> +
>> +struct fake_sigframe sf;
>> +
>> +static int fake_sigreturn_duplicated_fpsimd_run(struct tdescr *td,
>> + siginfo_t *si, ucontext_t *uc)
>> +{
>> + size_t resv_sz, offset;
>> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
>> +
>> + /* just to fill the ucontext_t with something real */
>> + if (!get_current_context(td, &sf.uc))
>> + return 1;
>> +
>> + resv_sz = GET_SF_RESV_SIZE(sf);
>> + /*
>> + * find the terminator, preserving existing headers
>> + * and verify amount of spare room in __reserved area.
>> + */
>> + head = get_terminator(shead, resv_sz, &offset);
>> + /*
>> + * try stripping extra_context header when low on space:
>> + * we need at least space for one additional fpsimd_context
>> + */
>> + if (head && resv_sz - offset < sizeof(struct fpsimd_context)) {
>> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
>> + resv_sz - offset);
>> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
>> + }
>> +
>> + /* just give up and timeout if still not enough space */
>> + if (head &&
>> + resv_sz - offset >= sizeof(struct fpsimd_context) + HDR_SZ) {
>> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
>> + resv_sz - offset);
>> + /* Add a spurios fpsimd_context */
>> + head->magic = FPSIMD_MAGIC;
>> + head->size = sizeof(struct fpsimd_context);
>> + /* and terminate */
>> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
>> +
>> + ASSERT_BAD_CONTEXT(&sf.uc);
>> + fake_sigreturn(&sf, sizeof(sf), 16);
>> + }
>> +
>> + return 1;
>> +}
>
I'll convert to use new helper get_starting_head() to make space in __reserved.
Cheers
Cristian
> [...]
>
> Otherwise looks ok.
>
> Cheers
> ---Dave
>
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^ permalink raw reply
* Re: [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia, smmu-v2
From: Robin Murphy @ 2019-08-30 15:13 UTC (permalink / raw)
To: Krishna Reddy
Cc: talho, treding, mperttunen, linux-kernel, iommu, praithatha,
thomasz, snikam, linux-tegra, yhsu, jtukkinen, avanbrunt,
linux-arm-kernel
In-Reply-To: <1567118827-26358-3-git-send-email-vdumpa@nvidia.com>
On 29/08/2019 23:47, Krishna Reddy wrote:
> Add binding doc for Nvidia's smmu-v2 implementation.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> index 3133f3b..0de3759 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
> @@ -17,6 +17,7 @@ conditions.
> "arm,mmu-401"
> "arm,mmu-500"
> "cavium,smmu-v2"
> + "nidia,smmu-v2"
> "qcom,smmu-v2"
I agree with Mikko that the compatible must be at least SoC-specific,
but potentially even instance-specific (e.g. "nvidia,tegra194-gpu-smmu")
depending on how many of these parallel-SMMU configurations might be
hiding in current and future SoCs.
Robin.
>
> depending on the particular implementation and/or the
>
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^ permalink raw reply
* Re: [PATCH v3 10/11] kselftest: arm64: fake_sigreturn_bad_size
From: Cristian Marussi @ 2019-08-30 15:21 UTC (permalink / raw)
To: Dave Martin; +Cc: andreyknvl, shuah, linux-arm-kernel, linux-kselftest
In-Reply-To: <20190813162646.GH10425@arm.com>
On 13/08/2019 17:26, Dave Martin wrote:
> On Fri, Aug 02, 2019 at 06:02:59PM +0100, Cristian Marussi wrote:
>> Added a simple fake_sigreturn testcase which builds a ucontext_t
>
> Add
Ok
>
>> with a badly sized header that causes a overrun in the __reserved
>> area and place it onto the stack. Expects a SIGSEGV on test PASS.
>>
>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>> ---
>> .../arm64/signal/testcases/.gitignore | 1 +
>> .../testcases/fake_sigreturn_bad_size.c | 85 +++++++++++++++++++
>> 2 files changed, 86 insertions(+)
>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
>>
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/.gitignore b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> index 94f9baaf638c..3408e0f5ba98 100644
>> --- a/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> +++ b/tools/testing/selftests/arm64/signal/testcases/.gitignore
>> @@ -8,3 +8,4 @@ fake_sigreturn_bad_magic
>> fake_sigreturn_bad_size_for_magic0
>> fake_sigreturn_missing_fpsimd
>> fake_sigreturn_duplicated_fpsimd
>> +fake_sigreturn_bad_size
>> diff --git a/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
>> new file mode 100644
>> index 000000000000..1467fb534d8b
>> --- /dev/null
>> +++ b/tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_bad_size.c
>> @@ -0,0 +1,85 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/* Copyright (C) 2019 ARM Limited */
>> +
>
> signal.h?
>
Ok
>> +#include <stdio.h>
>> +#include <ucontext.h>
>> +
>> +#include "test_signals_utils.h"
>> +#include "testcases.h"
>> +
>> +struct fake_sigframe sf;
>> +
>> +#define MIN_SZ_ALIGN 16
>> +
>> +static int fake_sigreturn_bad_size_run(struct tdescr *td,
>> + siginfo_t *si, ucontext_t *uc)
>> +{
>> + size_t resv_sz, need_sz, offset;
>> + struct _aarch64_ctx *shead = GET_SF_RESV_HEAD(sf), *head;
>> +
>> + /* just to fill the ucontext_t with something real */
>> + if (!get_current_context(td, &sf.uc))
>> + return 1;
>> +
>> + resv_sz = GET_SF_RESV_SIZE(sf);
>> + /*
>> + * find the terminator, preserving existing headers
>> + * and verify amount of spare room in __reserved area.
>> + */
>> + head = get_terminator(shead, resv_sz, &offset);
>> + /*
>> + * try stripping extra_context header when low on space:
>> + * we need at least for the bad sized esr_context.
>
> double space
>
ok.
>> + */
>> + need_sz = HDR_SZ + sizeof(struct esr_context);
>> + if (head && resv_sz - offset < need_sz) {
>> + fprintf(stderr, "Low on space:%zd. Discarding extra_context.\n",
>> + resv_sz - offset);
>> + head = get_header(shead, EXTRA_MAGIC, resv_sz, &offset);
>> + }
>> + /* just give up and timeout if still not enough space */
>> + if (head && resv_sz - offset >= need_sz) {
>> + fprintf(stderr, "Mangling template header. Spare space:%zd\n",
>> + resv_sz - offset);
>> + /*
>> + * Use an esr_context to build a fake header with a
>> + * size greater then the free __reserved area minus HDR_SZ;
>> + * using ESR_MAGIC here since it is not checked for size nor
>> + * is limited to one instance.
>> + *
>> + * At first inject an additional normal esr_context
>> + */
>> + head->magic = ESR_MAGIC;
>> + head->size = sizeof(struct esr_context);
>> + /* and terminate properly */
>> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
>> + ASSERT_GOOD_CONTEXT(&sf.uc);
>> +
>> + /*
>> + * now mess with fake esr_context size: leaving less space than
>> + * neededwhile keeping size value 16-aligned
>> + *
>> + * It must trigger a SEGV from Kernel on:
>> + *
>> + * resv_sz - offset < sizeof(*head)
>> + */
>> + /* at first set the maximum good 16-aligned size */
>> + head->size = (resv_sz - offset - need_sz + MIN_SZ_ALIGN) & ~0xfUL;
>> + /* plus a bit more of 16-aligned sized stuff */
>> + head->size += MIN_SZ_ALIGN;
>> + /* and terminate properly */
>> + write_terminator_record(GET_RESV_NEXT_HEAD(head));
>> + ASSERT_BAD_CONTEXT(&sf.uc);
>> + fake_sigreturn(&sf, sizeof(sf), 16);
>> + }
>> +
>> + return 1;
>> +}
>
I'll convert to use new helper get_starting_head() to make space in __reserved.
> [...]
>
> Otherwise looks reasonable.
>
> Cheers
> ---Dave
Cheers
Cristian
>
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^ permalink raw reply
* Re: [PATCH v3 11/11] kselftest: arm64: fake_sigreturn_misaligned_sp
From: Cristian Marussi @ 2019-08-30 15:22 UTC (permalink / raw)
To: Dave Martin; +Cc: linux-arm-kernel, linux-kselftest
In-Reply-To: <20190813162806.GJ10425@arm.com>
On 13/08/2019 17:28, Dave Martin wrote:
> On Wed, Aug 07, 2019 at 05:04:13PM +0100, Cristian Marussi wrote:
>> On 02/08/2019 18:03, Cristian Marussi wrote:
>>> Added a simple fake_sigreturn testcase which places a valid
>>> sigframe on a non-16 bytes aligned SP.
>>> fake_sigretrun() helper function has been patched accordingly
>>> to support placing a sigframe on a non-16 bytes aligned address.
>>> Expects a SIGSEGV on test PASS.
>>>
>>> Adds also a test TODO lists holding some further test ideas.
>>>
>>> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
>>> ---
>>> Re-added this text after fixing the forced misaglinment procedure in
>>> fake_sigreturn() itself: require a ZERO alignment and you'll get
>>> your sigframe placed on a misaligned SP (2-bytes off the 16-align)
>>> ---
>>> .../testing/selftests/arm64/signal/signals.S | 21 +++++++++----
>>> .../arm64/signal/testcases/TODO.readme | 8 +++++
>>> .../testcases/fake_sigreturn_misaligned_sp.c | 30 +++++++++++++++++++
>>> 3 files changed, 53 insertions(+), 6 deletions(-)
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/TODO.readme
>>> create mode 100644 tools/testing/selftests/arm64/signal/testcases/fake_sigreturn_misaligned_sp.c
>>>
>>
>> When this test was re-added in V3, the related .gitignore was missed.
>> It will go in V4
>
> Ack, or otherwise try switching to using wildcards in .gitignore as
> suggested in my reply to patch 4.
Used wildcard in .gitignore as advised.
>
> [...]
>
> Cheers
> ---Dave
>
Cheers
Cristian
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^ permalink raw reply
* Re: [PATCH 3/7] iommu/arm-smmu: Add tlb_sync implementation hook
From: Robin Murphy @ 2019-08-30 15:23 UTC (permalink / raw)
To: Krishna Reddy
Cc: talho, treding, mperttunen, linux-kernel, iommu, praithatha,
thomasz, snikam, linux-tegra, yhsu, jtukkinen, avanbrunt,
linux-arm-kernel
In-Reply-To: <1567118827-26358-4-git-send-email-vdumpa@nvidia.com>
On 29/08/2019 23:47, Krishna Reddy wrote:
> tlb_sync hook allows nvidia smmu handle tlb sync
> across multiple SMMUs as necessary.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> drivers/iommu/arm-smmu-nvidia.c | 32 ++++++++++++++++++++++++++++++++
> drivers/iommu/arm-smmu.c | 8 +++++---
> drivers/iommu/arm-smmu.h | 4 ++++
> 3 files changed, 41 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iommu/arm-smmu-nvidia.c b/drivers/iommu/arm-smmu-nvidia.c
> index d93ceda..a429b2c 100644
> --- a/drivers/iommu/arm-smmu-nvidia.c
> +++ b/drivers/iommu/arm-smmu-nvidia.c
> @@ -56,11 +56,43 @@ static void nsmmu_write_reg64(struct arm_smmu_device *smmu,
> writeq_relaxed(val, nsmmu_page(smmu, i, page) + offset);
> }
>
> +static void nsmmu_tlb_sync_wait(struct arm_smmu_device *smmu, int page,
> + int sync, int status, int inst)
> +{
> + u32 reg;
> + unsigned int spin_cnt, delay;
> +
> + for (delay = 1; delay < TLB_LOOP_TIMEOUT; delay *= 2) {
> + for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) {
> + reg = readl_relaxed(
> + nsmmu_page(smmu, inst, page) + status);
> + if (!(reg & sTLBGSTATUS_GSACTIVE))
> + return;
> + cpu_relax();
> + }
> + udelay(delay);
> + }
> + dev_err_ratelimited(smmu->dev,
> + "TLB sync timed out -- SMMU may be deadlocked\n");
> +}
> +
> +static void nsmmu_tlb_sync(struct arm_smmu_device *smmu, int page,
> + int sync, int status)
> +{
> + int i;
> +
> + arm_smmu_writel(smmu, page, sync, 0);
> +
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++)
It might make more sense to make this the innermost loop, i.e.:
for (i = 0; i < nsmmu->num_inst; i++)
reg &= readl_relaxed(nsmmu_page(smmu, i, page)...
since polling the instances in parallel rather than in series seems like
it might be a bit more efficient.
> + nsmmu_tlb_sync_wait(smmu, page, sync, status, i);
> +}
> +
> static const struct arm_smmu_impl nsmmu_impl = {
> .read_reg = nsmmu_read_reg,
> .write_reg = nsmmu_write_reg,
> .read_reg64 = nsmmu_read_reg64,
> .write_reg64 = nsmmu_write_reg64,
> + .tlb_sync = nsmmu_tlb_sync,
> };
>
> struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index 46e1641..f5454e71 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -52,9 +52,6 @@
> */
> #define QCOM_DUMMY_VAL -1
>
> -#define TLB_LOOP_TIMEOUT 1000000 /* 1s! */
> -#define TLB_SPIN_COUNT 10
> -
> #define MSI_IOVA_BASE 0x8000000
> #define MSI_IOVA_LENGTH 0x100000
>
> @@ -244,6 +241,11 @@ static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, int page,
> unsigned int spin_cnt, delay;
> u32 reg;
>
> + if (smmu->impl->tlb_sync) {
> + smmu->impl->tlb_sync(smmu, page, sync, status);
What I'd hoped is that rather than needing a hook for this, you could
just override smmu_domain->tlb_ops from .init_context to wire up the
alternate .sync method directly. That would save this extra level of
indirection.
Robin.
> + return;
> + }
> +
> arm_smmu_writel(smmu, page, sync, QCOM_DUMMY_VAL);
> for (delay = 1; delay < TLB_LOOP_TIMEOUT; delay *= 2) {
> for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) {
> diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
> index 9645bf1..d3217f1 100644
> --- a/drivers/iommu/arm-smmu.h
> +++ b/drivers/iommu/arm-smmu.h
> @@ -207,6 +207,8 @@ enum arm_smmu_cbar_type {
> /* Maximum number of context banks per SMMU */
> #define ARM_SMMU_MAX_CBS 128
>
> +#define TLB_LOOP_TIMEOUT 1000000 /* 1s! */
> +#define TLB_SPIN_COUNT 10
>
> /* Shared driver definitions */
> enum arm_smmu_arch_version {
> @@ -336,6 +338,8 @@ struct arm_smmu_impl {
> int (*cfg_probe)(struct arm_smmu_device *smmu);
> int (*reset)(struct arm_smmu_device *smmu);
> int (*init_context)(struct arm_smmu_domain *smmu_domain);
> + void (*tlb_sync)(struct arm_smmu_device *smmu, int page, int sync,
> + int status);
> };
>
> static inline void __iomem *arm_smmu_page(struct arm_smmu_device *smmu, int n)
>
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^ permalink raw reply
* Re: [PATCH v4 01/10] KVM: arm64: Document PV-time interface
From: Steven Price @ 2019-08-30 15:25 UTC (permalink / raw)
To: Andrew Jones
Cc: Mark Rutland, Radim Krčmář, kvm, Suzuki K Pouloze,
Marc Zyngier, linux-doc, Russell King, linux-kernel, James Morse,
linux-arm-kernel, Catalin Marinas, Paolo Bonzini, Will Deacon,
kvmarm, Julien Thierry
In-Reply-To: <20190830144734.kvj4dvt32qzmhw32@kamzik.brq.redhat.com>
On 30/08/2019 15:47, Andrew Jones wrote:
> On Fri, Aug 30, 2019 at 09:42:46AM +0100, Steven Price wrote:
>> Introduce a paravirtualization interface for KVM/arm64 based on the
>> "Arm Paravirtualized Time for Arm-Base Systems" specification DEN 0057A.
>>
>> This only adds the details about "Stolen Time" as the details of "Live
>> Physical Time" have not been fully agreed.
>>
>> User space can specify a reserved area of memory for the guest and
>> inform KVM to populate the memory with information on time that the host
>> kernel has stolen from the guest.
>>
>> A hypercall interface is provided for the guest to interrogate the
>> hypervisor's support for this interface and the location of the shared
>> memory structures.
>>
>> Signed-off-by: Steven Price <steven.price@arm.com>
>> ---
>> Documentation/virt/kvm/arm/pvtime.txt | 64 +++++++++++++++++++++++++
>> Documentation/virt/kvm/devices/vcpu.txt | 14 ++++++
>> 2 files changed, 78 insertions(+)
>> create mode 100644 Documentation/virt/kvm/arm/pvtime.txt
>>
>> diff --git a/Documentation/virt/kvm/arm/pvtime.txt b/Documentation/virt/kvm/arm/pvtime.txt
>> new file mode 100644
>> index 000000000000..dda3f0f855b9
>> --- /dev/null
>> +++ b/Documentation/virt/kvm/arm/pvtime.txt
>> @@ -0,0 +1,64 @@
>> +Paravirtualized time support for arm64
>> +======================================
>> +
>> +Arm specification DEN0057/A defined a standard for paravirtualised time
>> +support for AArch64 guests:
>> +
>> +https://developer.arm.com/docs/den0057/a
>> +
>> +KVM/arm64 implements the stolen time part of this specification by providing
>> +some hypervisor service calls to support a paravirtualized guest obtaining a
>> +view of the amount of time stolen from its execution.
>> +
>> +Two new SMCCC compatible hypercalls are defined:
>> +
>> +PV_FEATURES 0xC5000020
>> +PV_TIME_ST 0xC5000022
>> +
>> +These are only available in the SMC64/HVC64 calling convention as
>> +paravirtualized time is not available to 32 bit Arm guests. The existence of
>> +the PV_FEATURES hypercall should be probed using the SMCCC 1.1 ARCH_FEATURES
>> +mechanism before calling it.
>> +
>> +PV_FEATURES
>> + Function ID: (uint32) : 0xC5000020
>> + PV_func_id: (uint32) : Either PV_TIME_LPT or PV_TIME_ST
>
> PV_TIME_LPT doesn't exist
Thanks, will remove.
>> + Return value: (int32) : NOT_SUPPORTED (-1) or SUCCESS (0) if the relevant
>> + PV-time feature is supported by the hypervisor.
>> +
>> +PV_TIME_ST
>> + Function ID: (uint32) : 0xC5000022
>> + Return value: (int64) : IPA of the stolen time data structure for this
>> + VCPU. On failure:
>> + NOT_SUPPORTED (-1)
>> +
>> +The IPA returned by PV_TIME_ST should be mapped by the guest as normal memory
>> +with inner and outer write back caching attributes, in the inner shareable
>> +domain. A total of 16 bytes from the IPA returned are guaranteed to be
>> +meaningfully filled by the hypervisor (see structure below).
>> +
>> +PV_TIME_ST returns the structure for the calling VCPU.
>> +
>> +Stolen Time
>> +-----------
>> +
>> +The structure pointed to by the PV_TIME_ST hypercall is as follows:
>> +
>> + Field | Byte Length | Byte Offset | Description
>> + ----------- | ----------- | ----------- | --------------------------
>> + Revision | 4 | 0 | Must be 0 for version 0.1
>> + Attributes | 4 | 4 | Must be 0
>
> The above fields don't appear to be exposed to userspace in anyway. How
> will we handle migration from one KVM with one version of the structure
> to another?
Interesting question. User space does have access to them now it is
providing the memory, but it's not exactly an easy method. In particular
user space has no (simple) way of probing the kernel's supported version.
I guess one solution would be to add an extra attribute on the VCPU
which would provide the revision information. The current kernel would
then reject any revision other than 0, but this could then be extended
to support other revision numbers in the future.
Although there's some logic in saying we could add the extra attribute
when(/if) there is a new version. Future kernels would then be expected
to use the current version unless user space explicitly set the new
attribute.
Do you feel this is something that needs to be addressed now, or can it
be deferred until another version is proposed?
>> + Stolen time | 8 | 8 | Stolen time in unsigned
>> + | | | nanoseconds indicating how
>> + | | | much time this VCPU thread
>> + | | | was involuntarily not
>> + | | | running on a physical CPU.
>> +
>> +The structure will be updated by the hypervisor prior to scheduling a VCPU. It
>> +will be present within a reserved region of the normal memory given to the
>> +guest. The guest should not attempt to write into this memory. There is a
>> +structure per VCPU of the guest.
>
> Should we provide a recommendation as to how that reserved memory is
> provided? One memslot divided into NR_VCPUS subregions? Should the
> reserved region be described to the guest kernel with DT/ACPI? Or
> should userspace ensure the region is not within any DT/ACPI described
> regions?
I'm open to providing a recommendation, but I'm not entirely sure I know
enough here to provide one.
There is an obvious efficiency argument for minimizing memslots with the
current code. But if someone has a reason for using multiple memslots
then that's probably a good argument for implementing a memslot-caching
kvm_put_user() rather than to be dis-recommended.
My assumption (and testing) has been with a single memslot divided into
NR_VCPUS (or more accurately the number of VCPUs in the VM) subregions.
For testing DT I've tested both methods: an explicit reserved region or
just ensuring it's not in any DT described region. Both seem reasonable,
but it might be easier to integrate into existing migration mechanisms
if it's simply a reserved region (then the memory block of the guest is
just as it always was).
For ACPI the situation should be similar, but my testing has been with DT.
Thanks,
Steve
>> +
>> +For the user space interface see Documentation/virt/kvm/devices/vcpu.txt
>> +section "3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL".
>> +
>> diff --git a/Documentation/virt/kvm/devices/vcpu.txt b/Documentation/virt/kvm/devices/vcpu.txt
>> index 2b5dab16c4f2..896777f76f36 100644
>> --- a/Documentation/virt/kvm/devices/vcpu.txt
>> +++ b/Documentation/virt/kvm/devices/vcpu.txt
>> @@ -60,3 +60,17 @@ time to use the number provided for a given timer, overwriting any previously
>> configured values on other VCPUs. Userspace should configure the interrupt
>> numbers on at least one VCPU after creating all VCPUs and before running any
>> VCPUs.
>> +
>> +3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL
>> +Architectures: ARM64
>> +
>> +3.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_SET_IPA
>> +Parameters: 64-bit base address
>> +Returns: -ENXIO: Stolen time not implemented
>> + -EEXIST: Base address already set for this VCPU
>> + -EINVAL: Base address not 64 byte aligned
>> +
>> +Specifies the base address of the stolen time structure for this VCPU. The
>> +base address must be 64 byte aligned and exist within a valid guest memory
>> +region. See Documentation/virt/kvm/arm/pvtime.txt for more information
>> +including the layout of the stolen time structure.
>> --
>> 2.20.1
>>
>
> Thanks,
> drew
>
> _______________________________________________
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> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
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^ permalink raw reply
* Re: [PATCH v2 2/5] ASoC: dt-bindings: Convert Allwinner A10 codec to a schema
From: Rob Herring @ 2019-08-30 15:36 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Linux-ALSA, Liam Girdwood, Chen-Yu Tsai,
Mark Brown, Frank Rowand,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190828125209.28173-2-mripard@kernel.org>
On Wed, Aug 28, 2019 at 7:52 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> From: Maxime Ripard <maxime.ripard@bootlin.com>
>
> The Allwinner SoCs have an embedded audio codec that is supported in Linux,
> with a matching Device Tree binding.
>
> Now that we have the DT validation in place, let's convert the device tree
> bindings for that controller over to a YAML schemas.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
>
> ---
>
> Changes from v1:
> - Fix subject prefix
> ---
> .../sound/allwinner,sun4i-a10-codec.yaml | 162 ++++++++++++++++++
> .../devicetree/bindings/sound/sun4i-codec.txt | 94 ----------
> 2 files changed, 162 insertions(+), 94 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml
> delete mode 100644 Documentation/devicetree/bindings/sound/sun4i-codec.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml
> new file mode 100644
> index 000000000000..44feefae0ef0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml
> @@ -0,0 +1,162 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-codec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner A10 Codec Device Tree Bindings
> +
> +maintainers:
> + - Chen-Yu Tsai <wens@csie.org>
> + - Maxime Ripard <maxime.ripard@bootlin.com>
> +
> +properties:
> + "#sound-dai-cells":
> + const: 0
> +
> + compatible:
> + enum:
> + - allwinner,sun4i-a10-codec
> + - allwinner,sun6i-a31-codec
> + - allwinner,sun7i-a20-codec
> + - allwinner,sun8i-a23-codec
> + - allwinner,sun8i-h3-codec
> + - allwinner,sun8i-v3s-codec
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Bus Clock
> + - description: Module Clock
> +
> + clock-names:
> + items:
> + - const: apb
> + - const: codec
> +
> + dmas:
> + items:
> + - description: RX DMA Channel
> + - description: TX DMA Channel
> +
> + dma-names:
> + items:
> + - const: rx
> + - const: tx
> +
> + resets:
> + maxItems: 1
> +
> + allwinner,audio-routing:
> + $ref: /schemas/types.yaml#definitions/non-unique-string-array
> + description: |-
> + A list of the connections between audio components. Each entry
> + is a pair of strings, the first being the connection\'s sink, the
> + second being the connection\'s source. Valid names include
> +
> + Audio pins on the SoC
> + HP
> + HPCOM
> + LINEIN (not on sun8i-v3s)
> + LINEOUT (not on sun8i-a23 or sun8i-v3s)
> + MIC1
> + MIC2 (not on sun8i-v3s)
> + MIC3 (only on sun6i-a31)
> +
> + Microphone biases from the SoC
> + HBIAS
> + MBIAS (not on sun8i-v3s)
> +
> + Board connectors
> + Headphone
> + Headset Mic
> + Line In
> + Line Out
> + Mic
> + Speaker
All these strings should be in an enum. If 'items' is a schema rather
than a list, it applies to all items.
Also, I assume that maxItems can be 18 and minItems is 2?
> +
> + allwinner,codec-analog-controls:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Phandle to the codec analog controls in the PRCM
> +
> + allwinner,pa-gpios:
> + description: GPIO to enable the external amplifier
> +
> +required:
> + - "#sound-dai-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - dmas
> + - dma-names
> +
> +if:
> + properties:
> + compatible:
> + enum:
> + - allwinner,sun6i-a31-codec
> + - allwinner,sun8i-a23-codec
> + - allwinner,sun8i-h3-codec
> + - allwinner,sun8i-v3s-codec
> +
> +then:
> + if:
> + properties:
> + compatible:
> + const: allwinner,sun6i-a31-codec
> +
> + then:
> + required:
> + - resets
> + - allwinner,audio-routing
> +
> + else:
> + required:
> + - resets
> + - allwinner,audio-routing
> + - allwinner,codec-analog-controls
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + codec@1c22c00 {
> + #sound-dai-cells = <0>;
> + compatible = "allwinner,sun7i-a20-codec";
> + reg = <0x01c22c00 0x40>;
> + interrupts = <0 30 4>;
> + clocks = <&apb0_gates 0>, <&codec_clk>;
> + clock-names = "apb", "codec";
> + dmas = <&dma 0 19>, <&dma 0 19>;
> + dma-names = "rx", "tx";
> + };
> +
> + - |
> + codec@1c22c00 {
> + #sound-dai-cells = <0>;
> + compatible = "allwinner,sun6i-a31-codec";
> + reg = <0x01c22c00 0x98>;
> + interrupts = <0 29 4>;
> + clocks = <&ccu 61>, <&ccu 135>;
> + clock-names = "apb", "codec";
> + resets = <&ccu 42>;
> + dmas = <&dma 15>, <&dma 15>;
> + dma-names = "rx", "tx";
> + allwinner,audio-routing =
> + "Headphone", "HP",
> + "Speaker", "LINEOUT",
> + "LINEIN", "Line In",
> + "MIC1", "MBIAS",
> + "MIC1", "Mic",
> + "MIC2", "HBIAS",
> + "MIC2", "Headset Mic";
> + };
> +
> +...
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* Re: [PATCH v2 4/5] ASoC: dt-bindings: Convert Allwinner A23 analog codec to a schema
From: Rob Herring @ 2019-08-30 15:39 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Linux-ALSA, Liam Girdwood, Chen-Yu Tsai,
Mark Brown, Frank Rowand,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190828125209.28173-4-mripard@kernel.org>
On Wed, Aug 28, 2019 at 7:52 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> From: Maxime Ripard <maxime.ripard@bootlin.com>
>
> The Allwinner A23 SoC and later have an embedded audio codec that uses a
> separate controller to drive its analog part, which is supported in Linux,
> with a matching Device Tree binding.
>
> Now that we have the DT validation in place, let's convert the device tree
> bindings for that controller over to a YAML schemas.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
>
> ---
>
> Changes from v1:
> - Fix subject prefix
> ---
> .../allwinner,sun8i-a23-codec-analog.yaml | 38 +++++++++++++++++++
> .../bindings/sound/sun8i-codec-analog.txt | 17 ---------
> 2 files changed, 38 insertions(+), 17 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
> delete mode 100644 Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
> new file mode 100644
> index 000000000000..832779389cbd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
> @@ -0,0 +1,38 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/allwinner,sun8i-a23-codec-analog.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allwinner A23 Analog Codec Device Tree Bindings
> +
> +maintainers:
> + - Chen-Yu Tsai <wens@csie.org>
> + - Maxime Ripard <maxime.ripard@bootlin.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + # FIXME: This is documented in the PRCM binding, but needs to be
> + # migrated here at some point
> + # - const: allwinner,sun8i-a23-codec-analog
> + - const: allwinner,sun8i-h3-codec-analog
> + - const: allwinner,sun8i-v3s-codec-analog
enum is nicer than oneOf+const.
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + codec_analog: codec-analog@1f015c0 {
> + compatible = "allwinner,sun8i-h3-codec-analog";
> + reg = <0x01f015c0 0x4>;
> + };
> +
> +...
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* Re: [PATCH v2 3/5] ASoC: dt-bindings: Convert Allwinner A33 codec to a schema
From: Rob Herring @ 2019-08-30 15:41 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Linux-ALSA, Liam Girdwood, Chen-Yu Tsai,
Mark Brown, Frank Rowand,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190828125209.28173-3-mripard@kernel.org>
On Wed, Aug 28, 2019 at 7:52 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> From: Maxime Ripard <maxime.ripard@bootlin.com>
>
> The Allwinner A33 SoC have an embedded audio codec that is supported in Linux,
> with a matching Device Tree binding.
>
> Now that we have the DT validation in place, let's convert the device tree
> bindings for that controller over to a YAML schemas.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
>
> ---
>
> Changes from v1:
> - Fix subject prefix
> ---
> .../sound/allwinner,sun8i-a33-codec.yaml | 57 +++++++++++++++++
> .../bindings/sound/sun8i-a33-codec.txt | 63 -------------------
> 2 files changed, 57 insertions(+), 63 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml
> delete mode 100644 Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt
Reviewed-by: Rob Herring <robh@kernel.org>
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* Re: [PATCH v2 5/5] ASoC: dt-bindings: Convert Allwinner A64 analog codec to a schema
From: Rob Herring @ 2019-08-30 15:42 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Linux-ALSA, Liam Girdwood, Chen-Yu Tsai,
Mark Brown, Frank Rowand,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190828125209.28173-5-mripard@kernel.org>
On Wed, Aug 28, 2019 at 7:52 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> From: Maxime Ripard <maxime.ripard@bootlin.com>
>
> The Allwinner A64 SoC has an embedded audio codec that uses a separate
> controller to drive its analog part, which is supported in Linux, with a
> matching Device Tree binding.
>
> Now that we have the DT validation in place, let's convert the device tree
> bindings for that controller over to a YAML schemas.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
>
> ---
>
> Changes from v1:
> - Fix subject prefix
> ---
> .../allwinner,sun50i-a64-codec-analog.yaml | 39 +++++++++++++++++++
> .../bindings/sound/sun50i-codec-analog.txt | 14 -------
> 2 files changed, 39 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml
> delete mode 100644 Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt
Reviewed-by: Rob Herring <robh@kernel.org>
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* Re: [PATCH v2 1/5] ASoC: dt-bindings: sun4i-spdif: Fix dma-names warning
From: Rob Herring @ 2019-08-30 15:42 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, Linux-ALSA, Liam Girdwood, Chen-Yu Tsai,
Mark Brown, Frank Rowand,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190828125209.28173-1-mripard@kernel.org>
On Wed, Aug 28, 2019 at 7:52 AM Maxime Ripard <mripard@kernel.org> wrote:
>
> From: Maxime Ripard <maxime.ripard@bootlin.com>
>
> Even though the H6 compatible has been properly added, the exeption for the
> number of DMA channels hasn't been updated, leading in a validation
> warning.
>
> Fix this.
>
> Fixes: b20453031472 ("dt-bindings: sound: sun4i-spdif: Add Allwinner H6 compatible")
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
>
> ---
>
> Changes from v1:
> - Fix subject prefix
> ---
> .../devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Rob Herring <robh@kernel.org>
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* Re: [PATCH 4/7] iommu/arm-smmu: Add global/context fault implementation hooks
From: Robin Murphy @ 2019-08-30 15:43 UTC (permalink / raw)
To: Krishna Reddy
Cc: talho, treding, mperttunen, linux-kernel, iommu, praithatha,
thomasz, snikam, linux-tegra, yhsu, jtukkinen, avanbrunt,
linux-arm-kernel
In-Reply-To: <1567118827-26358-5-git-send-email-vdumpa@nvidia.com>
On 29/08/2019 23:47, Krishna Reddy wrote:
> Add global/context fault hooks to allow Nvidia SMMU implementation
> handle faults across multiple SMMUs.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> drivers/iommu/arm-smmu-nvidia.c | 127 ++++++++++++++++++++++++++++++++++++++++
> drivers/iommu/arm-smmu.c | 6 ++
> drivers/iommu/arm-smmu.h | 4 ++
> 3 files changed, 137 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu-nvidia.c b/drivers/iommu/arm-smmu-nvidia.c
> index a429b2c..b2a3c49 100644
> --- a/drivers/iommu/arm-smmu-nvidia.c
> +++ b/drivers/iommu/arm-smmu-nvidia.c
> @@ -14,6 +14,10 @@
>
> #define NUM_SMMU_INSTANCES 3
>
> +static irqreturn_t nsmmu_context_fault_inst(int irq,
> + struct arm_smmu_device *smmu,
> + int idx, int inst);
> +
> struct nvidia_smmu {
> struct arm_smmu_device smmu;
> int num_inst;
> @@ -87,12 +91,135 @@ static void nsmmu_tlb_sync(struct arm_smmu_device *smmu, int page,
> nsmmu_tlb_sync_wait(smmu, page, sync, status, i);
> }
>
> +static irqreturn_t nsmmu_global_fault_inst(int irq,
> + struct arm_smmu_device *smmu,
> + int inst)
> +{
> + u32 gfsr, gfsynr0, gfsynr1, gfsynr2;
> +
> + gfsr = readl_relaxed(nsmmu_page(smmu, inst, 0) + ARM_SMMU_GR0_sGFSR);
> + gfsynr0 = readl_relaxed(nsmmu_page(smmu, inst, 0) +
> + ARM_SMMU_GR0_sGFSYNR0);
> + gfsynr1 = readl_relaxed(nsmmu_page(smmu, inst, 0) +
> + ARM_SMMU_GR0_sGFSYNR1);
> + gfsynr2 = readl_relaxed(nsmmu_page(smmu, inst, 0) +
> + ARM_SMMU_GR0_sGFSYNR2);
> +
> + if (!gfsr)
> + return IRQ_NONE;
> +
> + dev_err_ratelimited(smmu->dev,
> + "Unexpected global fault, this could be serious\n");
> + dev_err_ratelimited(smmu->dev,
> + "\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x\n",
> + gfsr, gfsynr0, gfsynr1, gfsynr2);
> +
> + writel_relaxed(gfsr, nsmmu_page(smmu, inst, 0) + ARM_SMMU_GR0_sGFSR);
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t nsmmu_global_fault(int irq, struct arm_smmu_device *smmu)
> +{
> + int i;
> + irqreturn_t irq_ret = IRQ_NONE;
> +
> + /* Interrupt line is shared between global and context faults.
> + * Check for both type of interrupts on either fault handlers.
> + */
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++) {
> + irq_ret = nsmmu_context_fault_inst(irq, smmu, 0, i);
> + if (irq_ret == IRQ_HANDLED)
> + return irq_ret;
> + }
> +
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++) {
> + irq_ret = nsmmu_global_fault_inst(irq, smmu, i);
> + if (irq_ret == IRQ_HANDLED)
> + return irq_ret;
> + }
> +
> + return irq_ret;
> +}
> +
> +static irqreturn_t nsmmu_context_fault_bank(int irq,
> + struct arm_smmu_device *smmu,
> + int idx, int inst)
> +{
> + u32 fsr, fsynr, cbfrsynra;
> + unsigned long iova;
> +
> + fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR);
> + if (!(fsr & FSR_FAULT))
> + return IRQ_NONE;
> +
> + fsynr = readl_relaxed(nsmmu_page(smmu, inst, smmu->numpage + idx) +
> + ARM_SMMU_CB_FSYNR0);
> + iova = readq_relaxed(nsmmu_page(smmu, inst, smmu->numpage + idx) +
> + ARM_SMMU_CB_FAR);
> + cbfrsynra = readl_relaxed(nsmmu_page(smmu, inst, 1) +
> + ARM_SMMU_GR1_CBFRSYNRA(idx));
> +
> + dev_err_ratelimited(smmu->dev,
> + "Unhandled context fault: fsr=0x%x, iova=0x%08lx, fsynr=0x%x, cbfrsynra=0x%x, cb=%d\n",
> + fsr, iova, fsynr, cbfrsynra, idx);
> +
> + writel_relaxed(fsr, nsmmu_page(smmu, inst, smmu->numpage + idx) +
> + ARM_SMMU_CB_FSR);
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t nsmmu_context_fault_inst(int irq,
> + struct arm_smmu_device *smmu,
> + int idx, int inst)
> +{
> + irqreturn_t irq_ret = IRQ_NONE;
> +
> + /* Interrupt line shared between global and all context faults.
> + * Check for faults across all contexts.
> + */
> + for (idx = 0; idx < smmu->num_context_banks; idx++) {
> + irq_ret = nsmmu_context_fault_bank(irq, smmu, idx, inst);
> +
> + if (irq_ret == IRQ_HANDLED)
> + break;
> + }
> +
> + return irq_ret;
> +}
> +
> +static irqreturn_t nsmmu_context_fault(int irq,
> + struct arm_smmu_device *smmu,
> + int cbndx)
> +{
> + int i;
> + irqreturn_t irq_ret = IRQ_NONE;
> +
> + /* Interrupt line is shared between global and context faults.
> + * Check for both type of interrupts on either fault handlers.
> + */
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++) {
> + irq_ret = nsmmu_global_fault_inst(irq, smmu, i);
> + if (irq_ret == IRQ_HANDLED)
> + return irq_ret;
> + }
> +
> + for (i = 0; i < to_nsmmu(smmu)->num_inst; i++) {
> + irq_ret = nsmmu_context_fault_inst(irq, smmu, cbndx, i);
> + if (irq_ret == IRQ_HANDLED)
> + return irq_ret;
> + }
> +
> + return irq_ret;
> +}
> +
> static const struct arm_smmu_impl nsmmu_impl = {
> .read_reg = nsmmu_read_reg,
> .write_reg = nsmmu_write_reg,
> .read_reg64 = nsmmu_read_reg64,
> .write_reg64 = nsmmu_write_reg64,
> .tlb_sync = nsmmu_tlb_sync,
> + .global_fault = nsmmu_global_fault,
> + .context_fault = nsmmu_context_fault,
> };
>
> struct arm_smmu_device *nvidia_smmu_impl_init(struct arm_smmu_device *smmu)
> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> index f5454e71..9cc532d 100644
> --- a/drivers/iommu/arm-smmu.c
> +++ b/drivers/iommu/arm-smmu.c
> @@ -454,6 +454,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
> struct arm_smmu_device *smmu = smmu_domain->smmu;
> int idx = smmu_domain->cfg.cbndx;
>
> + if (smmu->impl->context_fault)
> + return smmu->impl->context_fault(irq, smmu, idx);
> +
> fsr = arm_smmu_cb_read(smmu, idx, ARM_SMMU_CB_FSR);
> if (!(fsr & FSR_FAULT))
> return IRQ_NONE;
> @@ -475,6 +478,9 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev)
> u32 gfsr, gfsynr0, gfsynr1, gfsynr2;
> struct arm_smmu_device *smmu = dev;
>
> + if (smmu->impl->global_fault)
> + return smmu->impl->global_fault(irq, smmu);
Can't we just register impl->global_fault (if set) instead of
arm_smmu_global_fault as the handler when we first set up the IRQs in
arm_smmu_device_probe()?
Ideally we'd do the same for the context banks as well, although we
might need an additional hook from which to request the secondary IRQs
that the main flow can't accommodate.
Robin.
> +
> gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR);
> gfsynr0 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR0);
> gfsynr1 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR1);
> diff --git a/drivers/iommu/arm-smmu.h b/drivers/iommu/arm-smmu.h
> index d3217f1..dec5e1a 100644
> --- a/drivers/iommu/arm-smmu.h
> +++ b/drivers/iommu/arm-smmu.h
> @@ -17,6 +17,7 @@
> #include <linux/io-64-nonatomic-hi-lo.h>
> #include <linux/io-pgtable.h>
> #include <linux/iommu.h>
> +#include <linux/irqreturn.h>
> #include <linux/mutex.h>
> #include <linux/spinlock.h>
> #include <linux/types.h>
> @@ -340,6 +341,9 @@ struct arm_smmu_impl {
> int (*init_context)(struct arm_smmu_domain *smmu_domain);
> void (*tlb_sync)(struct arm_smmu_device *smmu, int page, int sync,
> int status);
> + irqreturn_t (*global_fault)(int irq, struct arm_smmu_device *smmu);
> + irqreturn_t (*context_fault)(int irq, struct arm_smmu_device *smmu,
> + int cbndx);
> };
>
> static inline void __iomem *arm_smmu_page(struct arm_smmu_device *smmu, int n)
>
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* Re: [PATCH 6/7] arm64: tegra: Add DT node for T194 SMMU
From: Robin Murphy @ 2019-08-30 15:44 UTC (permalink / raw)
To: Krishna Reddy
Cc: talho, treding, mperttunen, linux-kernel, iommu, praithatha,
thomasz, snikam, linux-tegra, yhsu, jtukkinen, avanbrunt,
linux-arm-kernel
In-Reply-To: <1567118827-26358-7-git-send-email-vdumpa@nvidia.com>
On 29/08/2019 23:47, Krishna Reddy wrote:
> Add DT node for T194 SMMU to enable SMMU support.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 75 ++++++++++++++++++++++++++++++++
> 1 file changed, 75 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index d906958..ad509bb 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1401,6 +1401,81 @@
> 0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
> };
>
> + smmu: iommu@12000000 {
> + compatible = "nvidia,smmu-v2";
> + reg = <0 0x12000000 0 0x800000>,
> + <0 0x11000000 0 0x800000>,
> + <0 0x10000000 0 0x800000>;
> + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
> + stream-match-mask = <0x7f80>;
> + #global-interrupts = <1>;
Shouldn't that be 3?
Robin.
> + #iommu-cells = <1>;
> + };
> +
> sysram@40000000 {
> compatible = "nvidia,tegra194-sysram", "mmio-sram";
> reg = <0x0 0x40000000 0x0 0x50000>;
>
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^ permalink raw reply
* Re: [PATCH v4 3/4] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
From: Stephen Boyd @ 2019-08-30 16:01 UTC (permalink / raw)
To: Bjorn Andersson, Jorge Ramirez
Cc: mark.rutland, robh, jackp, devicetree, gregkh, linux-usb,
khasim.mohammed, linux-kernel, kishon, linux-arm-msm, andy.gross,
shawn.guo, linux-arm-kernel
In-Reply-To: <6dc0957d-5806-7643-4454-966015865d38@linaro.org>
Quoting Jorge Ramirez (2019-08-29 00:03:48)
> On 2/23/19 17:52, Bjorn Andersson wrote:
> > On Thu 07 Feb 03:17 PST 2019, Jorge Ramirez-Ortiz wrote:
> >> +
> >> +Required child nodes:
> >> +
> >> +- usb connector node as defined in bindings/connector/usb-connector.txt
> >> + containing the property vbus-supply.
> >> +
> >> +Example:
> >> +
> >> +usb3_phy: usb3-phy@78000 {
> >> + compatible = "qcom,snps-usb-ssphy";
> >> + reg = <0x78000 0x400>;
> >> + #phy-cells = <0>;
> >> + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
> >> + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
> >> + <&gcc GCC_USB3_PHY_PIPE_CLK>;
> >> + clock-names = "ref", "phy", "pipe";
> >> + resets = <&gcc GCC_USB3_PHY_BCR>,
> >> + <&gcc GCC_USB3PHY_PHY_BCR>;
> >> + reset-names = "com", "phy";
> >> + vdd-supply = <&vreg_l3_1p05>;
> >> + vdda1p8-supply = <&vreg_l5_1p8>;
> >> + usb3_c_connector: usb3-c-connector {
Node name should be 'connector', not usb3-c-connector.
> >
> > The USB-C connector is attached both to the HS and SS PHYs, so I think
> > you should represent this external to this node and use of_graph to
> > query it.
>
> but AFAICS we wont be able to retrieve the vbux-supply from an external
> node (that interface does not exist).
>
> rob, do you have a suggestion?
Shouldn't the vbus supply be in the phy? Or is this a situation where
the phy itself doesn't have the vbus supply going to it because the PMIC
gets in the way and handles the vbus for the connector by having the SoC
communicate with the PMIC about when to turn the vbus on and off, etc?
>
> >
> > So the connector should look similar to example 2 in
> > connector/usb-connector.txt.
> >
> > Regards,
> > Bjorn
> >
> >> + compatible = "usb-c-connector";
> >> + label = "USB-C";
> >> + type = "micro";
> >> + vbus-supply = <&usb3_vbus_reg>;
> >> + };
> >> +};
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^ permalink raw reply
* Re: [PATCH 12/26] x86: clean up ioremap
From: Christoph Hellwig @ 2019-08-30 16:04 UTC (permalink / raw)
To: Ingo Molnar
Cc: linux-ia64, linux-sh, linux-kernel, Guo Ren, sparclinux,
linux-riscv, Vincent Chen, Christoph Hellwig, linux-arch,
linux-s390, linux-hexagon, x86, linux-snps-arc, linux-xtensa,
Arnd Bergmann, linux-m68k, openrisc, Greentime Hu, linux-mtd,
Guan Xuetao, linux-arm-kernel, Michal Simek, linux-parisc,
linux-mips, linux-alpha, nios2-dev
In-Reply-To: <20190817103402.GA7602@gmail.com>
On Sat, Aug 17, 2019 at 12:34:02PM +0200, Ingo Molnar wrote:
>
> * Christoph Hellwig <hch@lst.de> wrote:
>
> > Use ioremap as the main implemented function, and defined
> > ioremap_nocache to it as a deprecated alias.
> >
> > Signed-off-by: Christoph Hellwig <hch@lst.de>
> > ---
> > arch/x86/include/asm/io.h | 8 ++------
> > arch/x86/mm/ioremap.c | 8 ++++----
> > arch/x86/mm/pageattr.c | 4 ++--
> > 3 files changed, 8 insertions(+), 12 deletions(-)
>
> Acked-by: Ingo Molnar <mingo@kernel.org>
Can you pick it up through tip for 5.4? That way we can get most
bits in through their maintainer trees, and then I'll resubmit the
rest for the next merge window.
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^ permalink raw reply
* Re: [PATCH 19/26] arm64: remove __iounmap
From: Christoph Hellwig @ 2019-08-30 16:05 UTC (permalink / raw)
To: Will Deacon
Cc: linux-ia64, linux-sh, linux-kernel, Guo Ren, sparclinux,
linux-riscv, Vincent Chen, Christoph Hellwig, linux-arch,
linux-s390, linux-hexagon, x86, linux-snps-arc, linux-xtensa,
Arnd Bergmann, linux-m68k, openrisc, Greentime Hu, linux-mtd,
Guan Xuetao, linux-arm-kernel, Michal Simek, linux-parisc,
linux-mips, linux-alpha, nios2-dev
In-Reply-To: <20190819073601.4yxjvmyjtpi7tk56@willie-the-truck>
On Mon, Aug 19, 2019 at 08:36:02AM +0100, Will Deacon wrote:
> On Sat, Aug 17, 2019 at 09:32:46AM +0200, Christoph Hellwig wrote:
> > No need to indirect iounmap for arm64.
> >
> > Signed-off-by: Christoph Hellwig <hch@lst.de>
> > ---
> > arch/arm64/include/asm/io.h | 3 +--
> > arch/arm64/mm/ioremap.c | 4 ++--
> > 2 files changed, 3 insertions(+), 4 deletions(-)
>
> Not sure why we did it like this...
>
> Acked-by: Will Deacon <will@kernel.org>
Can you just pick this one up through the arm64 tree for 5.4?
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^ permalink raw reply
* Applied "ASoC: dt-bindings: sun4i-spdif: Fix dma-names warning" to the asoc tree
From: Mark Brown @ 2019-08-30 16:06 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, alsa-devel, Liam Girdwood,
Maxime Ripard, Rob Herring, Chen-Yu Tsai, Mark Brown,
Frank Rowand, linux-arm-kernel
In-Reply-To: <20190828125209.28173-1-mripard@kernel.org>
The patch
ASoC: dt-bindings: sun4i-spdif: Fix dma-names warning
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From 1a8e7cdfa4f5872bf0c202d09bff6628aba6b9f6 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@bootlin.com>
Date: Wed, 28 Aug 2019 14:52:05 +0200
Subject: [PATCH] ASoC: dt-bindings: sun4i-spdif: Fix dma-names warning
Even though the H6 compatible has been properly added, the exeption for the
number of DMA channels hasn't been updated, leading in a validation
warning.
Fix this.
Fixes: b20453031472 ("dt-bindings: sound: sun4i-spdif: Add Allwinner H6 compatible")
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://lore.kernel.org/r/20190828125209.28173-1-mripard@kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
.../devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
index e0284d8c3b63..38d4cede0860 100644
--- a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml
@@ -70,7 +70,9 @@ allOf:
properties:
compatible:
contains:
- const: allwinner,sun8i-h3-spdif
+ enum:
+ - allwinner,sun8i-h3-spdif
+ - allwinner,sun50i-h6-spdif
then:
properties:
--
2.20.1
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^ permalink raw reply related
* Applied "ASoC: dt-bindings: Convert Allwinner A64 analog codec to a schema" to the asoc tree
From: Mark Brown @ 2019-08-30 16:06 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mark Rutland, devicetree, alsa-devel, Liam Girdwood,
Maxime Ripard, Rob Herring, Chen-Yu Tsai, Mark Brown,
Frank Rowand, linux-arm-kernel
In-Reply-To: <20190828125209.28173-5-mripard@kernel.org>
The patch
ASoC: dt-bindings: Convert Allwinner A64 analog codec to a schema
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
From 497144a5b7af12097c09b0ca30409ee7122499a0 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@bootlin.com>
Date: Wed, 28 Aug 2019 14:52:09 +0200
Subject: [PATCH] ASoC: dt-bindings: Convert Allwinner A64 analog codec to a
schema
The Allwinner A64 SoC has an embedded audio codec that uses a separate
controller to drive its analog part, which is supported in Linux, with a
matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://lore.kernel.org/r/20190828125209.28173-5-mripard@kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
.../allwinner,sun50i-a64-codec-analog.yaml | 39 +++++++++++++++++++
.../bindings/sound/sun50i-codec-analog.txt | 14 -------
2 files changed, 39 insertions(+), 14 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml
delete mode 100644 Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt
diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml
new file mode 100644
index 000000000000..f290eb72a878
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/allwinner,sun50i-a64-codec-analog.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A64 Analog Codec Device Tree Bindings
+
+maintainers:
+ - Chen-Yu Tsai <wens@csie.org>
+ - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+ compatible:
+ const: allwinner,sun50i-a64-codec-analog
+
+ reg:
+ maxItems: 1
+
+ cpvdd-supply:
+ description:
+ Regulator for the headphone amplifier
+
+required:
+ - compatible
+ - reg
+ - cpvdd-supply
+
+additionalProperties: false
+
+examples:
+ - |
+ codec_analog: codec-analog@1f015c0 {
+ compatible = "allwinner,sun50i-a64-codec-analog";
+ reg = <0x01f015c0 0x4>;
+ cpvdd-supply = <®_eldo1>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt b/Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt
deleted file mode 100644
index 056a098495cc..000000000000
--- a/Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-* Allwinner A64 Codec Analog Controls
-
-Required properties:
-- compatible: must be one of the following compatibles:
- - "allwinner,sun50i-a64-codec-analog"
-- reg: must contain the registers location and length
-- cpvdd-supply: Regulator supply for the headphone amplifier
-
-Example:
- codec_analog: codec-analog@1f015c0 {
- compatible = "allwinner,sun50i-a64-codec-analog";
- reg = <0x01f015c0 0x4>;
- cpvdd-supply = <®_eldo1>;
- };
--
2.20.1
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