* Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file
From: Guo Ren @ 2019-09-07 23:52 UTC (permalink / raw)
To: Will Deacon
Cc: julien.thierry, Catalin Marinas, Palmer Dabbelt, Will Deacon,
christoffer.dall, Atish Patra, Julien Grall, gary, linux-riscv,
kvmarm, Mike Rapoport, Christoph Hellwig, aou, Arnd Bergmann,
suzuki.poulose, Marc Zyngier, Paul Walmsley, linux-arm-kernel,
Anup Patel, Linux Kernel Mailing List, iommu, james.morse
In-Reply-To: <20190624104006.lvm32nahemaqklxc@willie-the-truck>
Thx Will,
On Mon, Jun 24, 2019 at 6:40 PM Will Deacon <will@kernel.org> wrote:
> > I'll keep my system use the same ASID for SMP + IOMMU :P
>
> You will want a separate allocator for that:
>
> https://lkml.kernel.org/r/20190610184714.6786-2-jean-philippe.brucker@arm.com
Yes, it is hard to maintain ASID between IOMMU and CPUMMU or different
system, because it's difficult to synchronize the IO_ASID when the CPU
ASID is rollover.
But we could still use hardware broadcast TLB invalidation instruction
to uniformly manage the ASID and IO_ASID, or OTHER_ASID in our IOMMU.
Welcome to join our disscusion:
"Introduce an implementation of IOMMU in linux-riscv"
9 Sep 2019, 10:45 Jade-room-I&II (Corinthia Hotel Lisbon) RISC-V MC
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
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^ permalink raw reply
* Re: [V4, 2/2] media: i2c: Add Omnivision OV02A10 camera sensor driver
From: kbuild test robot @ 2019-09-08 2:00 UTC (permalink / raw)
To: dongchun.zhu
Cc: mark.rutland, drinkcat, andriy.shevchenko, srv_heupstream,
devicetree, shengnan.wang, dongchun.zhu, tfiga, louis.kuo,
sj.huang, robh+dt, linux-mediatek, kbuild-all, sakari.ailus,
matthias.bgg, bingbu.cao, mchehab, linux-arm-kernel, linux-media
In-Reply-To: <20190907092728.23897-3-dongchun.zhu@mediatek.com>
[-- Attachment #1: Type: text/plain, Size: 2822 bytes --]
Hi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[cannot apply to v5.3-rc7 next-20190904]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/dongchun-zhu-mediatek-com/media-i2c-Add-support-for-OV02A10-sensor/20190908-065643
base: git://linuxtv.org/media_tree.git master
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
drivers/media/i2c/ov02a10.c: In function 'ov02a10_set_ctrl':
>> drivers/media/i2c/ov02a10.c:699:9: warning: 'ret' may be used uninitialized in this function [-Wmaybe-uninitialized]
return ret;
^~~
vim +/ret +699 drivers/media/i2c/ov02a10.c
658
659 static int ov02a10_set_ctrl(struct v4l2_ctrl *ctrl)
660 {
661 struct ov02a10 *ov02a10 = container_of(ctrl->handler,
662 struct ov02a10, ctrl_handler);
663 struct i2c_client *client = v4l2_get_subdevdata(&ov02a10->subdev);
664 s64 max_expo;
665 int ret;
666
667 /* Propagate change of current control to all related controls */
668 if (ctrl->id == V4L2_CID_VBLANK) {
669 /* Update max exposure while meeting expected vblanking */
670 max_expo = ov02a10->cur_mode->height + ctrl->val -
671 OV02A10_EXPOSURE_MAX_MARGIN;
672 __v4l2_ctrl_modify_range(ov02a10->exposure,
673 ov02a10->exposure->minimum, max_expo,
674 ov02a10->exposure->step,
675 ov02a10->exposure->default_value);
676 }
677
678 /* V4L2 controls values will be applied only when power is already up */
679 if (!pm_runtime_get_if_in_use(&client->dev))
680 return 0;
681
682 switch (ctrl->id) {
683 case V4L2_CID_EXPOSURE:
684 ret = ov02a10_set_exposure(ov02a10, ctrl->val);
685 break;
686 case V4L2_CID_ANALOGUE_GAIN:
687 ret = ov02a10_set_gain(ov02a10, ctrl->val);
688 break;
689 case V4L2_CID_VBLANK:
690 ret = ov02a10_set_vblank(ov02a10, ctrl->val);
691 break;
692 case V4L2_CID_TEST_PATTERN:
693 ret = ov02a10_set_test_pattern(ov02a10, ctrl->val);
694 break;
695 };
696
697 pm_runtime_put(&client->dev);
698
> 699 return ret;
700 }
701
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 69517 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply
* Re: [V4, 2/2] media: i2c: Add Omnivision OV02A10 camera sensor driver
From: kbuild test robot @ 2019-09-08 2:31 UTC (permalink / raw)
To: dongchun.zhu
Cc: mark.rutland, drinkcat, andriy.shevchenko, srv_heupstream,
devicetree, shengnan.wang, dongchun.zhu, tfiga, louis.kuo,
sj.huang, robh+dt, linux-mediatek, kbuild-all, sakari.ailus,
matthias.bgg, bingbu.cao, mchehab, linux-arm-kernel, linux-media
In-Reply-To: <20190907092728.23897-3-dongchun.zhu@mediatek.com>
Hi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[cannot apply to v5.3-rc7 next-20190904]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/dongchun-zhu-mediatek-com/media-i2c-Add-support-for-OV02A10-sensor/20190908-065643
base: git://linuxtv.org/media_tree.git master
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
coccinelle warnings: (new ones prefixed by >>)
>> drivers/media/i2c/ov02a10.c:695:2-3: Unneeded semicolon
Please review and possibly fold the followup patch.
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply
* [PATCH] media: i2c: fix semicolon.cocci warnings
From: kbuild test robot @ 2019-09-08 2:31 UTC (permalink / raw)
To: dongchun.zhu
Cc: mark.rutland, drinkcat, andriy.shevchenko, srv_heupstream,
devicetree, shengnan.wang, dongchun.zhu, tfiga, louis.kuo,
sj.huang, robh+dt, linux-mediatek, kbuild-all, sakari.ailus,
matthias.bgg, bingbu.cao, mchehab, linux-arm-kernel, linux-media
In-Reply-To: <20190907092728.23897-3-dongchun.zhu@mediatek.com>
From: kbuild test robot <lkp@intel.com>
drivers/media/i2c/ov02a10.c:695:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Fixes: 2bca4b808db1 ("media: i2c: Add Omnivision OV02A10 camera sensor driver")
CC: Dongchun Zhu <dongchun.zhu@mediatek.com>
Signed-off-by: kbuild test robot <lkp@intel.com>
---
url: https://github.com/0day-ci/linux/commits/dongchun-zhu-mediatek-com/media-i2c-Add-support-for-OV02A10-sensor/20190908-065643
base: git://linuxtv.org/media_tree.git master
ov02a10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/media/i2c/ov02a10.c
+++ b/drivers/media/i2c/ov02a10.c
@@ -692,7 +692,7 @@ static int ov02a10_set_ctrl(struct v4l2_
case V4L2_CID_TEST_PATTERN:
ret = ov02a10_set_test_pattern(ov02a10, ctrl->val);
break;
- };
+ }
pm_runtime_put(&client->dev);
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^ permalink raw reply
* [PATCH] Revert "mmc: bcm2835: Terminate timeout work synchronously"
From: Stefan Wahren @ 2019-09-08 7:45 UTC (permalink / raw)
To: Ulf Hansson, Eric Anholt, Florian Fainelli, Ray Jui,
Scott Branden, Lukas Wunner
Cc: stable, linux-mmc, Stefan Wahren, linux-arm-kernel
The commit 37fefadee8bb ("mmc: bcm2835: Terminate timeout work
synchronously") causes lockups in case of hardware timeouts due the
timeout work also calling cancel_delayed_work_sync() on its own.
So revert it.
Fixes: 37fefadee8bb ("mmc: bcm2835: Terminate timeout work synchronously")
Cc: stable@vger.kernel.org
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
drivers/mmc/host/bcm2835.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c
index 7e0d3a4..bb31e13 100644
--- a/drivers/mmc/host/bcm2835.c
+++ b/drivers/mmc/host/bcm2835.c
@@ -597,7 +597,7 @@ static void bcm2835_finish_request(struct bcm2835_host *host)
struct dma_chan *terminate_chan = NULL;
struct mmc_request *mrq;
- cancel_delayed_work_sync(&host->timeout_work);
+ cancel_delayed_work(&host->timeout_work);
mrq = host->mrq;
--
2.7.4
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^ permalink raw reply related
* Re: [PATCH] Revert "mmc: bcm2835: Terminate timeout work synchronously"
From: Ulf Hansson @ 2019-09-08 10:32 UTC (permalink / raw)
To: Stefan Wahren
Cc: Florian Fainelli, Scott Branden, Ray Jui,
linux-mmc@vger.kernel.org, # 4.0+, Eric Anholt, Lukas Wunner,
Linux ARM
In-Reply-To: <1567928752-2557-1-git-send-email-wahrenst@gmx.net>
On Sun, 8 Sep 2019 at 09:46, Stefan Wahren <wahrenst@gmx.net> wrote:
>
> The commit 37fefadee8bb ("mmc: bcm2835: Terminate timeout work
> synchronously") causes lockups in case of hardware timeouts due the
> timeout work also calling cancel_delayed_work_sync() on its own.
> So revert it.
>
> Fixes: 37fefadee8bb ("mmc: bcm2835: Terminate timeout work synchronously")
> Cc: stable@vger.kernel.org
> Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Applied for fixes, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/bcm2835.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c
> index 7e0d3a4..bb31e13 100644
> --- a/drivers/mmc/host/bcm2835.c
> +++ b/drivers/mmc/host/bcm2835.c
> @@ -597,7 +597,7 @@ static void bcm2835_finish_request(struct bcm2835_host *host)
> struct dma_chan *terminate_chan = NULL;
> struct mmc_request *mrq;
>
> - cancel_delayed_work_sync(&host->timeout_work);
> + cancel_delayed_work(&host->timeout_work);
>
> mrq = host->mrq;
>
> --
> 2.7.4
>
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^ permalink raw reply
* Re: [PATCH 2/2] vhost: re-introducing metadata acceleration through kernel virtual address
From: Michael S. Tsirkin @ 2019-09-08 11:05 UTC (permalink / raw)
To: Jason Wang
Cc: aarcange, Christoph Hellwig, linux-parisc, kvm, netdev,
linux-kernel, virtualization, James Bottomley, linux-mm, jglisse,
jgg, David Miller, linux-arm-kernel
In-Reply-To: <20190905122736.19768-3-jasowang@redhat.com>
On Thu, Sep 05, 2019 at 08:27:36PM +0800, Jason Wang wrote:
> This is a rework on the commit 7f466032dc9e ("vhost: access vq
> metadata through kernel virtual address").
>
> It was noticed that the copy_to/from_user() friends that was used to
> access virtqueue metdata tends to be very expensive for dataplane
> implementation like vhost since it involves lots of software checks,
> speculation barriers,
So if we drop speculation barrier,
there's a problem here in access will now be speculated.
This effectively disables the defence in depth effect of
b3bbfb3fb5d25776b8e3f361d2eedaabb0b496cd
x86: Introduce __uaccess_begin_nospec() and uaccess_try_nospec
So now we need to sprinkle array_index_nospec or barrier_nospec over the
code whenever we use an index we got from userspace.
See below for some examples.
> hardware feature toggling (e.g SMAP). The
> extra cost will be more obvious when transferring small packets since
> the time spent on metadata accessing become more significant.
>
> This patch tries to eliminate those overheads by accessing them
> through direct mapping of those pages. Invalidation callbacks is
> implemented for co-operation with general VM management (swap, KSM,
> THP or NUMA balancing). We will try to get the direct mapping of vq
> metadata before each round of packet processing if it doesn't
> exist. If we fail, we will simplely fallback to copy_to/from_user()
> friends.
>
> This invalidation, direct mapping access and set are synchronized
> through spinlock. This takes a step back from the original commit
> 7f466032dc9e ("vhost: access vq metadata through kernel virtual
> address") which tries to RCU which is suspicious and hard to be
> reviewed. This won't perform as well as RCU because of the atomic,
> this could be addressed by the future optimization.
>
> This method might does not work for high mem page which requires
> temporary mapping so we just fallback to normal
> copy_to/from_user() and may not for arch that has virtual tagged cache
> since extra cache flushing is needed to eliminate the alias. This will
> result complex logic and bad performance. For those archs, this patch
> simply go for copy_to/from_user() friends. This is done by ruling out
> kernel mapping codes through ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE.
>
> Note that this is only done when device IOTLB is not enabled. We
> could use similar method to optimize IOTLB in the future.
>
> Tests shows at most about 22% improvement on TX PPS when using
> virtio-user + vhost_net + xdp1 + TAP on 4.0GHz Kaby Lake.
>
> SMAP on | SMAP off
> Before: 4.9Mpps | 6.9Mpps
> After: 6.0Mpps | 7.5Mpps
>
> On a elder CPU Sandy Bridge without SMAP support. TX PPS doesn't see
> any difference.
Why is not Kaby Lake with SMAP off the same as Sandy Bridge?
> Cc: Andrea Arcangeli <aarcange@redhat.com>
> Cc: James Bottomley <James.Bottomley@hansenpartnership.com>
> Cc: Christoph Hellwig <hch@infradead.org>
> Cc: David Miller <davem@davemloft.net>
> Cc: Jerome Glisse <jglisse@redhat.com>
> Cc: Jason Gunthorpe <jgg@mellanox.com>
> Cc: linux-mm@kvack.org
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-parisc@vger.kernel.org
> Signed-off-by: Jason Wang <jasowang@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> drivers/vhost/vhost.c | 551 +++++++++++++++++++++++++++++++++++++++++-
> drivers/vhost/vhost.h | 41 ++++
> 2 files changed, 589 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
> index 791562e03fe0..f98155f28f02 100644
> --- a/drivers/vhost/vhost.c
> +++ b/drivers/vhost/vhost.c
> @@ -298,6 +298,182 @@ static void vhost_vq_meta_reset(struct vhost_dev *d)
> __vhost_vq_meta_reset(d->vqs[i]);
> }
>
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> +static void vhost_map_unprefetch(struct vhost_map *map)
> +{
> + kfree(map->pages);
> + kfree(map);
> +}
> +
> +static void vhost_set_map_dirty(struct vhost_virtqueue *vq,
> + struct vhost_map *map, int index)
> +{
> + struct vhost_uaddr *uaddr = &vq->uaddrs[index];
> + int i;
> +
> + if (uaddr->write) {
> + for (i = 0; i < map->npages; i++)
> + set_page_dirty(map->pages[i]);
> + }
> +}
> +
> +static void vhost_uninit_vq_maps(struct vhost_virtqueue *vq)
> +{
> + struct vhost_map *map[VHOST_NUM_ADDRS];
> + int i;
> +
> + spin_lock(&vq->mmu_lock);
> + for (i = 0; i < VHOST_NUM_ADDRS; i++) {
> + map[i] = vq->maps[i];
> + if (map[i]) {
> + vhost_set_map_dirty(vq, map[i], i);
> + vq->maps[i] = NULL;
> + }
> + }
> + spin_unlock(&vq->mmu_lock);
> +
> + /* No need for synchronization since we are serialized with
> + * memory accessors (e.g vq mutex held).
> + */
> +
> + for (i = 0; i < VHOST_NUM_ADDRS; i++)
> + if (map[i])
> + vhost_map_unprefetch(map[i]);
> +
> +}
> +
> +static void vhost_reset_vq_maps(struct vhost_virtqueue *vq)
> +{
> + int i;
> +
> + vhost_uninit_vq_maps(vq);
> + for (i = 0; i < VHOST_NUM_ADDRS; i++)
> + vq->uaddrs[i].size = 0;
> +}
> +
> +static bool vhost_map_range_overlap(struct vhost_uaddr *uaddr,
> + unsigned long start,
> + unsigned long end)
> +{
> + if (unlikely(!uaddr->size))
> + return false;
> +
> + return !(end < uaddr->uaddr || start > uaddr->uaddr - 1 + uaddr->size);
> +}
> +
> +static void inline vhost_vq_access_map_begin(struct vhost_virtqueue *vq)
> +{
> + spin_lock(&vq->mmu_lock);
> +}
> +
> +static void inline vhost_vq_access_map_end(struct vhost_virtqueue *vq)
> +{
> + spin_unlock(&vq->mmu_lock);
> +}
> +
> +static int vhost_invalidate_vq_start(struct vhost_virtqueue *vq,
> + int index,
> + unsigned long start,
> + unsigned long end,
> + bool blockable)
> +{
> + struct vhost_uaddr *uaddr = &vq->uaddrs[index];
> + struct vhost_map *map;
> +
> + if (!vhost_map_range_overlap(uaddr, start, end))
> + return 0;
> + else if (!blockable)
> + return -EAGAIN;
> +
> + spin_lock(&vq->mmu_lock);
> + ++vq->invalidate_count;
> +
> + map = vq->maps[index];
> + if (map)
> + vq->maps[index] = NULL;
> + spin_unlock(&vq->mmu_lock);
> +
> + if (map) {
> + vhost_set_map_dirty(vq, map, index);
> + vhost_map_unprefetch(map);
> + }
> +
> + return 0;
> +}
> +
> +static void vhost_invalidate_vq_end(struct vhost_virtqueue *vq,
> + int index,
> + unsigned long start,
> + unsigned long end)
> +{
> + if (!vhost_map_range_overlap(&vq->uaddrs[index], start, end))
> + return;
> +
> + spin_lock(&vq->mmu_lock);
> + --vq->invalidate_count;
> + spin_unlock(&vq->mmu_lock);
> +}
> +
> +static int vhost_invalidate_range_start(struct mmu_notifier *mn,
> + const struct mmu_notifier_range *range)
> +{
> + struct vhost_dev *dev = container_of(mn, struct vhost_dev,
> + mmu_notifier);
> + bool blockable = mmu_notifier_range_blockable(range);
> + int i, j, ret;
> +
> + for (i = 0; i < dev->nvqs; i++) {
> + struct vhost_virtqueue *vq = dev->vqs[i];
> +
> + for (j = 0; j < VHOST_NUM_ADDRS; j++) {
> + ret = vhost_invalidate_vq_start(vq, j,
> + range->start,
> + range->end, blockable);
> + if (ret)
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> +static void vhost_invalidate_range_end(struct mmu_notifier *mn,
> + const struct mmu_notifier_range *range)
> +{
> + struct vhost_dev *dev = container_of(mn, struct vhost_dev,
> + mmu_notifier);
> + int i, j;
> +
> + for (i = 0; i < dev->nvqs; i++) {
> + struct vhost_virtqueue *vq = dev->vqs[i];
> +
> + for (j = 0; j < VHOST_NUM_ADDRS; j++)
> + vhost_invalidate_vq_end(vq, j,
> + range->start,
> + range->end);
> + }
> +}
> +
> +static const struct mmu_notifier_ops vhost_mmu_notifier_ops = {
> + .invalidate_range_start = vhost_invalidate_range_start,
> + .invalidate_range_end = vhost_invalidate_range_end,
> +};
> +
> +static void vhost_init_maps(struct vhost_dev *dev)
> +{
> + struct vhost_virtqueue *vq;
> + int i, j;
> +
> + dev->mmu_notifier.ops = &vhost_mmu_notifier_ops;
> +
> + for (i = 0; i < dev->nvqs; ++i) {
> + vq = dev->vqs[i];
> + for (j = 0; j < VHOST_NUM_ADDRS; j++)
> + vq->maps[j] = NULL;
> + }
> +}
> +#endif
> +
> static void vhost_vq_reset(struct vhost_dev *dev,
> struct vhost_virtqueue *vq)
> {
> @@ -326,7 +502,11 @@ static void vhost_vq_reset(struct vhost_dev *dev,
> vq->busyloop_timeout = 0;
> vq->umem = NULL;
> vq->iotlb = NULL;
> + vq->invalidate_count = 0;
> __vhost_vq_meta_reset(vq);
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + vhost_reset_vq_maps(vq);
> +#endif
> }
>
> static int vhost_worker(void *data)
> @@ -471,12 +651,15 @@ void vhost_dev_init(struct vhost_dev *dev,
> dev->iov_limit = iov_limit;
> dev->weight = weight;
> dev->byte_weight = byte_weight;
> + dev->has_notifier = false;
> init_llist_head(&dev->work_list);
> init_waitqueue_head(&dev->wait);
> INIT_LIST_HEAD(&dev->read_list);
> INIT_LIST_HEAD(&dev->pending_list);
> spin_lock_init(&dev->iotlb_lock);
> -
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + vhost_init_maps(dev);
> +#endif
>
> for (i = 0; i < dev->nvqs; ++i) {
> vq = dev->vqs[i];
> @@ -485,6 +668,7 @@ void vhost_dev_init(struct vhost_dev *dev,
> vq->heads = NULL;
> vq->dev = dev;
> mutex_init(&vq->mutex);
> + spin_lock_init(&vq->mmu_lock);
> vhost_vq_reset(dev, vq);
> if (vq->handle_kick)
> vhost_poll_init(&vq->poll, vq->handle_kick,
> @@ -564,7 +748,19 @@ long vhost_dev_set_owner(struct vhost_dev *dev)
> if (err)
> goto err_cgroup;
>
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + err = mmu_notifier_register(&dev->mmu_notifier, dev->mm);
> + if (err)
> + goto err_mmu_notifier;
> +#endif
> + dev->has_notifier = true;
> +
> return 0;
> +
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> +err_mmu_notifier:
> + vhost_dev_free_iovecs(dev);
> +#endif
> err_cgroup:
> kthread_stop(worker);
> dev->worker = NULL;
> @@ -655,6 +851,107 @@ static void vhost_clear_msg(struct vhost_dev *dev)
> spin_unlock(&dev->iotlb_lock);
> }
>
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> +static void vhost_setup_uaddr(struct vhost_virtqueue *vq,
> + int index, unsigned long uaddr,
> + size_t size, bool write)
> +{
> + struct vhost_uaddr *addr = &vq->uaddrs[index];
> +
> + addr->uaddr = uaddr;
> + addr->size = size;
> + addr->write = write;
> +}
> +
> +static void vhost_setup_vq_uaddr(struct vhost_virtqueue *vq)
> +{
> + vhost_setup_uaddr(vq, VHOST_ADDR_DESC,
> + (unsigned long)vq->desc,
> + vhost_get_desc_size(vq, vq->num),
> + false);
> + vhost_setup_uaddr(vq, VHOST_ADDR_AVAIL,
> + (unsigned long)vq->avail,
> + vhost_get_avail_size(vq, vq->num),
> + false);
> + vhost_setup_uaddr(vq, VHOST_ADDR_USED,
> + (unsigned long)vq->used,
> + vhost_get_used_size(vq, vq->num),
> + true);
> +}
> +
> +static int vhost_map_prefetch(struct vhost_virtqueue *vq,
> + int index)
> +{
> + struct vhost_map *map;
> + struct vhost_uaddr *uaddr = &vq->uaddrs[index];
> + struct page **pages;
> + int npages = DIV_ROUND_UP(uaddr->size, PAGE_SIZE);
> + int npinned;
> + void *vaddr, *v;
> + int err;
> + int i;
> +
> + spin_lock(&vq->mmu_lock);
> +
> + err = -EFAULT;
> + if (vq->invalidate_count)
> + goto err;
> +
> + err = -ENOMEM;
> + map = kmalloc(sizeof(*map), GFP_ATOMIC);
> + if (!map)
> + goto err;
> +
> + pages = kmalloc_array(npages, sizeof(struct page *), GFP_ATOMIC);
> + if (!pages)
> + goto err_pages;
> +
> + err = EFAULT;
> + npinned = __get_user_pages_fast(uaddr->uaddr, npages,
> + uaddr->write, pages);
> + if (npinned > 0)
> + release_pages(pages, npinned);
> + if (npinned != npages)
> + goto err_gup;
> +
> + for (i = 0; i < npinned; i++)
> + if (PageHighMem(pages[i]))
> + goto err_gup;
> +
> + vaddr = v = page_address(pages[0]);
> +
> + /* For simplicity, fallback to userspace address if VA is not
> + * contigious.
> + */
> + for (i = 1; i < npinned; i++) {
> + v += PAGE_SIZE;
> + if (v != page_address(pages[i]))
> + goto err_gup;
> + }
> +
> + map->addr = vaddr + (uaddr->uaddr & (PAGE_SIZE - 1));
> + map->npages = npages;
> + map->pages = pages;
> +
> + vq->maps[index] = map;
> + /* No need for a synchronize_rcu(). This function should be
> + * called by dev->worker so we are serialized with all
> + * readers.
> + */
> + spin_unlock(&vq->mmu_lock);
> +
> + return 0;
> +
> +err_gup:
> + kfree(pages);
> +err_pages:
> + kfree(map);
> +err:
> + spin_unlock(&vq->mmu_lock);
> + return err;
> +}
> +#endif
> +
> void vhost_dev_cleanup(struct vhost_dev *dev)
> {
> int i;
> @@ -684,8 +981,20 @@ void vhost_dev_cleanup(struct vhost_dev *dev)
> kthread_stop(dev->worker);
> dev->worker = NULL;
> }
> - if (dev->mm)
> + if (dev->mm) {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + if (dev->has_notifier) {
> + mmu_notifier_unregister(&dev->mmu_notifier,
> + dev->mm);
> + dev->has_notifier = false;
> + }
> +#endif
> mmput(dev->mm);
> + }
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + for (i = 0; i < dev->nvqs; i++)
> + vhost_uninit_vq_maps(dev->vqs[i]);
> +#endif
> dev->mm = NULL;
> }
> EXPORT_SYMBOL_GPL(vhost_dev_cleanup);
> @@ -914,6 +1223,26 @@ static inline void __user *__vhost_get_user(struct vhost_virtqueue *vq,
>
> static inline int vhost_put_avail_event(struct vhost_virtqueue *vq)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_used *used;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_USED];
> + if (likely(map)) {
> + used = map->addr;
> + *((__virtio16 *)&used->ring[vq->num]) =
> + cpu_to_vhost16(vq, vq->avail_idx);
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_put_user(vq, cpu_to_vhost16(vq, vq->avail_idx),
> vhost_avail_event(vq));
> }
> @@ -922,6 +1251,27 @@ static inline int vhost_put_used(struct vhost_virtqueue *vq,
> struct vring_used_elem *head, int idx,
> int count)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_used *used;
> + size_t size;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_USED];
> + if (likely(map)) {
> + used = map->addr;
> + size = count * sizeof(*head);
> + memcpy(used->ring + idx, head, size);
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_copy_to_user(vq, vq->used->ring + idx, head,
> count * sizeof(*head));
> }
> @@ -929,6 +1279,25 @@ static inline int vhost_put_used(struct vhost_virtqueue *vq,
> static inline int vhost_put_used_flags(struct vhost_virtqueue *vq)
>
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_used *used;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_USED];
> + if (likely(map)) {
> + used = map->addr;
> + used->flags = cpu_to_vhost16(vq, vq->used_flags);
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_put_user(vq, cpu_to_vhost16(vq, vq->used_flags),
> &vq->used->flags);
> }
> @@ -936,6 +1305,25 @@ static inline int vhost_put_used_flags(struct vhost_virtqueue *vq)
> static inline int vhost_put_used_idx(struct vhost_virtqueue *vq)
>
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_used *used;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_USED];
> + if (likely(map)) {
> + used = map->addr;
> + used->idx = cpu_to_vhost16(vq, vq->last_used_idx);
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_put_user(vq, cpu_to_vhost16(vq, vq->last_used_idx),
> &vq->used->idx);
> }
> @@ -981,12 +1369,50 @@ static void vhost_dev_unlock_vqs(struct vhost_dev *d)
> static inline int vhost_get_avail_idx(struct vhost_virtqueue *vq,
> __virtio16 *idx)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_avail *avail;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_AVAIL];
> + if (likely(map)) {
> + avail = map->addr;
> + *idx = avail->idx;
index can now be speculated.
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_get_avail(vq, *idx, &vq->avail->idx);
> }
>
> static inline int vhost_get_avail_head(struct vhost_virtqueue *vq,
> __virtio16 *head, int idx)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_avail *avail;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_AVAIL];
> + if (likely(map)) {
> + avail = map->addr;
> + *head = avail->ring[idx & (vq->num - 1)];
Since idx can be speculated, I guess we need array_index_nospec here?
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_get_avail(vq, *head,
> &vq->avail->ring[idx & (vq->num - 1)]);
> }
> @@ -994,24 +1420,98 @@ static inline int vhost_get_avail_head(struct vhost_virtqueue *vq,
> static inline int vhost_get_avail_flags(struct vhost_virtqueue *vq,
> __virtio16 *flags)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_avail *avail;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_AVAIL];
> + if (likely(map)) {
> + avail = map->addr;
> + *flags = avail->flags;
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_get_avail(vq, *flags, &vq->avail->flags);
> }
>
> static inline int vhost_get_used_event(struct vhost_virtqueue *vq,
> __virtio16 *event)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_avail *avail;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> + map = vq->maps[VHOST_ADDR_AVAIL];
> + if (likely(map)) {
> + avail = map->addr;
> + *event = (__virtio16)avail->ring[vq->num];
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_get_avail(vq, *event, vhost_used_event(vq));
> }
>
> static inline int vhost_get_used_idx(struct vhost_virtqueue *vq,
> __virtio16 *idx)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_used *used;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_USED];
> + if (likely(map)) {
> + used = map->addr;
> + *idx = used->idx;
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_get_used(vq, *idx, &vq->used->idx);
> }
This seems to be used during init. Why do we bother
accelerating this?
>
> static inline int vhost_get_desc(struct vhost_virtqueue *vq,
> struct vring_desc *desc, int idx)
> {
> +#if VHOST_ARCH_CAN_ACCEL_UACCESS
> + struct vhost_map *map;
> + struct vring_desc *d;
> +
> + if (!vq->iotlb) {
> + vhost_vq_access_map_begin(vq);
> +
> + map = vq->maps[VHOST_ADDR_DESC];
> + if (likely(map)) {
> + d = map->addr;
> + *desc = *(d + idx);
Since idx can be speculated, I guess we need array_index_nospec here?
> + vhost_vq_access_map_end(vq);
> + return 0;
> + }
> +
> + vhost_vq_access_map_end(vq);
> + }
> +#endif
> +
> return vhost_copy_from_user(vq, desc, vq->desc + idx, sizeof(*desc));
> }
>
I also wonder about the userspace address we get eventualy.
It would seem that we need to prevent that from speculating -
and that seems like a good idea even if this patch isn't
applied. As you are playing with micro-benchmarks, maybe
you could the below patch?
It's unfortunately untested.
Thanks a lot in advance!
===>
vhost: block speculation of translated descriptors
iovec addresses coming from vhost are assumed to be
pre-validated, but in fact can be speculated to a value
out of range.
Userspace address are later validated with array_index_nospec so we can
be sure kernel info does not leak through these addresses, but vhost
must also not leak userspace info outside the allowed memory table to
guests.
Following the defence in depth principle, make sure
the address is not validated out of node range.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
index 5dc174ac8cac..863e25011ef6 100644
--- a/drivers/vhost/vhost.c
+++ b/drivers/vhost/vhost.c
@@ -2072,7 +2076,9 @@ static int translate_desc(struct vhost_virtqueue *vq, u64 addr, u32 len,
size = node->size - addr + node->start;
_iov->iov_len = min((u64)len - s, size);
_iov->iov_base = (void __user *)(unsigned long)
- (node->userspace_addr + addr - node->start);
+ (node->userspace_addr +
+ array_index_nospec(addr - node->start,
+ node->size));
s += size;
addr += size;
++ret;
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH] iio: adc: meson_saradc: Fix memory allocation order
From: Jonathan Cameron @ 2019-09-08 11:33 UTC (permalink / raw)
To: Elie Roudninski
Cc: Lars-Peter Clausen, Neil Armstrong, Martin Blumenstingl,
Kevin Hilman, linux-kernel, linux-iio, Remi Pommarel,
Peter Meerwald-Stadler, Hartmut Knaack, linux-amlogic,
linux-arm-kernel
In-Reply-To: <CAJJ5kavS6RU1tK-BqgWD-VmJzPuG114y+pNApYay=+xwCtAwQg@mail.gmail.com>
On Mon, 2 Sep 2019 21:40:49 +0100
Elie Roudninski <xademax@gmail.com> wrote:
> On Sun, Sep 1, 2019 at 12:29 PM Martin Blumenstingl
> <martin.blumenstingl@googlemail.com> wrote:
> >
> > On Sun, Sep 1, 2019 at 12:45 PM Remi Pommarel <repk@triplefau.lt> wrote:
> > >
> > > meson_saradc's irq handler uses priv->regmap so make sure that it is
> > > allocated before the irq get enabled.
> > >
> > > This also fixes crash when CONFIG_DEBUG_SHIRQ is enabled, as device
> > > managed resources are freed in the inverted order they had been
> > > allocated, priv->regmap was freed before the spurious fake irq that
> > > CONFIG_DEBUG_SHIRQ adds called the handler.
> > >
> >
> > Fixes: 3af109131b7eb8 ("iio: adc: meson-saradc: switch from polling to
> > interrupt mode")
> > > Reported-by: Elie Roudninski <xademax@gmail.com>
> > > Signed-off-by: Remi Pommarel <repk@triplefau.lt>
> > Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> >
> > thank you for fixing this!
> The patch fixed the kernel panic I had, i can now successfully boot my
> meson-gxl-s905x-libretech-cc boad using patched linux 5.2.11
>
> Tested-by: Elie ROUDNINSKI <xademax@gmail.com>
Rather than rush through a quick pull request I'm going to hold this one
until after the merge window.
Applied to the fixes-togreg branch of iio.git (which is now based
on staging-next).
Thanks,
Jonathan
>
> Elie
> >
> >
> > Martin
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^ permalink raw reply
* Re: [PATCH v2 10/11] dt-bindings: iio: adc: exynos: Convert Exynos ADC bindings to json-schema
From: Jonathan Cameron @ 2019-09-08 12:29 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni,
Lars-Peter Clausen, devicetree, linux-iio, linux-pm,
Sebastian Reichel, linux-kernel, linux-samsung-soc, Rob Herring,
Kukjin Kim, Peter Meerwald-Stadler, Hartmut Knaack, linux-rtc,
linux-arm-kernel, Paweł Chmiel
In-Reply-To: <20190907092007.9946-10-krzk@kernel.org>
On Sat, 7 Sep 2019 11:20:06 +0200
Krzysztof Kozlowski <krzk@kernel.org> wrote:
> Convert Samsung Exynos Analog to Digital Converter bindings to DT schema
> format using json-schema.
>
> This is a direct conversion of existing bindings so it also copies the
> existing error in the bindings regarding the requirement of two register
> address ranges for certain compatibles. The inconsistency in binding
> was caused by commit fafb37cfae6d ("iio: exyno-adc: use syscon for PMU
> register access").
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
To my less than experienced eye when it comes to yaml, this looks fine.
I'll wait on more experienced review before I apply it however!
Thanks,
Jonathan
>
> ---
>
> Changes since v1:
> 1. Rework reg, clocks and clock-names matching for specific compatibles,
> 2. Make samsung,syscon-phandle required only on certain compatibles,
> 3. Fix indentation.
> ---
> .../bindings/iio/adc/samsung,exynos-adc.txt | 107 ------------
> .../bindings/iio/adc/samsung,exynos-adc.yaml | 163 ++++++++++++++++++
> 2 files changed, 163 insertions(+), 107 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
> create mode 100644 Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
> deleted file mode 100644
> index e1fe02f3e3e9..000000000000
> --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.txt
> +++ /dev/null
> @@ -1,107 +0,0 @@
> -Samsung Exynos Analog to Digital Converter bindings
> -
> -The devicetree bindings are for the new ADC driver written for
> -Exynos4 and upward SoCs from Samsung.
> -
> -New driver handles the following
> -1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
> - and future SoCs from Samsung
> -2. Add ADC driver under iio/adc framework
> -3. Also adds the Documentation for device tree bindings
> -
> -Required properties:
> -- compatible: Must be "samsung,exynos-adc-v1"
> - for Exynos5250 controllers.
> - Must be "samsung,exynos-adc-v2" for
> - future controllers.
> - Must be "samsung,exynos3250-adc" for
> - controllers compatible with ADC of Exynos3250.
> - Must be "samsung,exynos4212-adc" for
> - controllers compatible with ADC of Exynos4212 and Exynos4412.
> - Must be "samsung,exynos7-adc" for
> - the ADC in Exynos7 and compatibles
> - Must be "samsung,s3c2410-adc" for
> - the ADC in s3c2410 and compatibles
> - Must be "samsung,s3c2416-adc" for
> - the ADC in s3c2416 and compatibles
> - Must be "samsung,s3c2440-adc" for
> - the ADC in s3c2440 and compatibles
> - Must be "samsung,s3c2443-adc" for
> - the ADC in s3c2443 and compatibles
> - Must be "samsung,s3c6410-adc" for
> - the ADC in s3c6410 and compatibles
> - Must be "samsung,s5pv210-adc" for
> - the ADC in s5pv210 and compatibles
> -- reg: List of ADC register address range
> - - The base address and range of ADC register
> - - The base address and range of ADC_PHY register (every
> - SoC except for s3c24xx/s3c64xx ADC)
> -- interrupts: Contains the interrupt information for the timer. The
> - format is being dependent on which interrupt controller
> - the Samsung device uses.
> -- #io-channel-cells = <1>; As ADC has multiple outputs
> -- clocks From common clock bindings: handles to clocks specified
> - in "clock-names" property, in the same order.
> -- clock-names From common clock bindings: list of clock input names
> - used by ADC block:
> - - "adc" : ADC bus clock
> - - "sclk" : ADC special clock (only for Exynos3250 and
> - compatible ADC block)
> -- vdd-supply VDD input supply.
> -
> -- samsung,syscon-phandle Contains the PMU system controller node
> - (To access the ADC_PHY register on Exynos5250/5420/5800/3250)
> -Optional properties:
> -- has-touchscreen: If present, indicates that a touchscreen is
> - connected an usable.
> -
> -Note: child nodes can be added for auto probing from device tree.
> -
> -Example: adding device info in dtsi file
> -
> -adc: adc@12d10000 {
> - compatible = "samsung,exynos-adc-v1";
> - reg = <0x12D10000 0x100>;
> - interrupts = <0 106 0>;
> - #io-channel-cells = <1>;
> - io-channel-ranges;
> -
> - clocks = <&clock 303>;
> - clock-names = "adc";
> -
> - vdd-supply = <&buck5_reg>;
> - samsung,syscon-phandle = <&pmu_system_controller>;
> -};
> -
> -Example: adding device info in dtsi file for Exynos3250 with additional sclk
> -
> -adc: adc@126c0000 {
> - compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
> - reg = <0x126C0000 0x100>;
> - interrupts = <0 137 0>;
> - #io-channel-cells = <1>;
> - io-channel-ranges;
> -
> - clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
> - clock-names = "adc", "sclk";
> -
> - vdd-supply = <&buck5_reg>;
> - samsung,syscon-phandle = <&pmu_system_controller>;
> -};
> -
> -Example: Adding child nodes in dts file
> -
> -adc@12d10000 {
> -
> - /* NTC thermistor is a hwmon device */
> - ncp15wb473@0 {
> - compatible = "murata,ncp15wb473";
> - pullup-uv = <1800000>;
> - pullup-ohm = <47000>;
> - pulldown-ohm = <0>;
> - io-channels = <&adc 4>;
> - };
> -};
> -
> -Note: Does not apply to ADC driver under arch/arm/plat-samsung/
> -Note: The child node can be added under the adc node or separately.
> diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> new file mode 100644
> index 000000000000..dd58121f25b1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> @@ -0,0 +1,163 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos Analog to Digital Converter (ADC)
> +
> +maintainers:
> + - Krzysztof Kozlowski <krzk@kernel.org>
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos-adc-v1 # Exynos5250
> + - samsung,exynos-adc-v2
> + - samsung,exynos3250-adc
> + - samsung,exynos4212-adc # Exynos4212 and Exynos4412
> + - samsung,exynos7-adc
> + - samsung,s3c2410-adc
> + - samsung,s3c2416-adc
> + - samsung,s3c2440-adc
> + - samsung,s3c2443-adc
> + - samsung,s3c6410-adc
> + - samsung,s5pv210-adc
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> +
> + clocks:
> + description:
> + Phandle to ADC bus clock. For Exynos3250 additional clock is needed.
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + description:
> + Must contain clock names (adc, sclk) matching phandles in clocks
> + property.
> + minItems: 1
> + maxItems: 2
> +
> + interrupts:
> + maxItems: 1
> +
> + "#io-channel-cells":
> + const: 1
> +
> + vdd-supply:
> + description: VDD input supply
> + maxItems: 1
> +
> + samsung,syscon-phandle:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description:
> + Phandle to the PMU system controller node (to access the ADC_PHY
> + register on Exynos5250/5420/5800/3250).
> +
> + has-touchscreen:
> + description:
> + If present, indicates that a touchscreen is connected and usable.
> + type: boolean
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> + - "#io-channel-cells"
> + - vdd-supply
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - samsung,exynos-adc-v1
> + - samsung,exynos-adc-v2
> + - samsung,exynos3250-adc
> + - samsung,exynos4212-adc
> + - samsung,s5pv210-adc
> + then:
> + properties:
> + reg:
> + items:
> + # For S5P and Exynos
> + - description: base registers
> + - description: phy registers
> + required:
> + - samsung,syscon-phandle
> + else:
> + properties:
> + reg:
> + items:
> + - description: base registers
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - samsung,exynos3250-adc
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: adc
> + - const: sclk
> + else:
> + properties:
> + clocks:
> + minItems: 1
> + maxItems: 1
> + clock-names:
> + items:
> + - const: adc
> +
> +examples:
> + - |
> + adc: adc@12d10000 {
> + compatible = "samsung,exynos-adc-v1";
> + reg = <0x12d10000 0x100>;
> + interrupts = <0 106 0>;
> + #io-channel-cells = <1>;
> + io-channel-ranges;
> +
> + clocks = <&clock 303>;
> + clock-names = "adc";
> +
> + vdd-supply = <&buck5_reg>;
> + samsung,syscon-phandle = <&pmu_system_controller>;
> +
> + /* NTC thermistor is a hwmon device */
> + ncp15wb473@0 {
> + compatible = "murata,ncp15wb473";
> + pullup-uv = <1800000>;
> + pullup-ohm = <47000>;
> + pulldown-ohm = <0>;
> + io-channels = <&adc 4>;
> + };
> + };
> +
> + - |
> + adc@126c0000 {
> + compatible = "samsung,exynos3250-adc";
> + reg = <0x126C0000 0x100>;
> + interrupts = <0 137 0>;
> + #io-channel-cells = <1>;
> + io-channel-ranges;
> +
> + clocks = <&cmu 0>, // CLK_TSADC
> + <&cmu 1>; // CLK_SCLK_TSADC
> + clock-names = "adc", "sclk";
> +
> + vdd-supply = <&buck5_reg>;
> + samsung,syscon-phandle = <&pmu_system_controller>;
> + };
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^ permalink raw reply
* Re: [PATCH v2 11/11] dt-bindings: iio: adc: exynos: Remove old requirement of two register address ranges
From: Jonathan Cameron @ 2019-09-08 12:31 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Mark Rutland, Alessandro Zummo, Alexandre Belloni,
Lars-Peter Clausen, devicetree, linux-iio, linux-pm,
Sebastian Reichel, linux-kernel, linux-samsung-soc, Rob Herring,
Kukjin Kim, Peter Meerwald-Stadler, Hartmut Knaack, linux-rtc,
linux-arm-kernel, Paweł Chmiel
In-Reply-To: <20190907092007.9946-11-krzk@kernel.org>
On Sat, 7 Sep 2019 11:20:07 +0200
Krzysztof Kozlowski <krzk@kernel.org> wrote:
> Commit fafb37cfae6d ("iio: exyno-adc: use syscon for PMU
> register access") changed the Exynos ADC driver so the PMU syscon
> phandle is required instead of second register address space. The
> bindings were not updated so fix them now.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Seems sensible. Thanks for cleaning this up.
As before I'll wait on review from Rob or similar. If they
are going via another path (fine by me as well).
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> for
both IIO related binding patches.
Thanks,
Jonathan
>
> ---
>
> Changes since v1:
> 1. New patch.
> ---
> .../bindings/iio/adc/samsung,exynos-adc.yaml | 16 ++--------------
> 1 file changed, 2 insertions(+), 14 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> index dd58121f25b1..b4c6c26681d9 100644
> --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml
> @@ -25,8 +25,7 @@ properties:
> - samsung,s5pv210-adc
>
> reg:
> - minItems: 1
> - maxItems: 2
> + maxItems: 1
>
> clocks:
> description:
> @@ -55,7 +54,7 @@ properties:
> $ref: '/schemas/types.yaml#/definitions/phandle'
> description:
> Phandle to the PMU system controller node (to access the ADC_PHY
> - register on Exynos5250/5420/5800/3250).
> + register on Exynos3250/4x12/5250/5420/5800).
>
> has-touchscreen:
> description:
> @@ -83,19 +82,8 @@ allOf:
> - samsung,exynos4212-adc
> - samsung,s5pv210-adc
> then:
> - properties:
> - reg:
> - items:
> - # For S5P and Exynos
> - - description: base registers
> - - description: phy registers
> required:
> - samsung,syscon-phandle
> - else:
> - properties:
> - reg:
> - items:
> - - description: base registers
>
> - if:
> properties:
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^ permalink raw reply
* [PATCH 4.4 17/23] spi: bcm2835aux: ensure interrupts are enabled for shared handler
From: Greg Kroah-Hartman @ 2019-09-08 12:41 UTC (permalink / raw)
To: linux-kernel
Cc: Stefan Wahren, Rob Herring, Florian Fainelli, Scott Branden,
Sasha Levin, Marc Zyngier, Greg Kroah-Hartman, Alexander Graf,
stable, linux-spi, Eric Anholt, Mark Brown,
bcm-kernel-feedback-list, linux-rpi-kernel, Ray Jui,
linux-arm-kernel
In-Reply-To: <20190908121052.898169328@linuxfoundation.org>
[ Upstream commit bc519d9574618e47a0c788000fb78da95e18d953 ]
The BCM2835 AUX SPI has a shared interrupt line (with AUX UART).
Downstream fixes this with an AUX irqchip to demux the IRQ sources and a
DT change which breaks compatibility with older kernels. The AUX irqchip
was already rejected for upstream[1] and the DT change would break
working systems if the DTB is updated to a newer one. The latter issue
was brought to my attention by Alex Graf.
The root cause however is a bug in the shared handler. Shared handlers
must check that interrupts are actually enabled before servicing the
interrupt. Add a check that the TXEMPTY or IDLE interrupts are enabled.
[1] https://patchwork.kernel.org/patch/9781221/
Cc: Alexander Graf <agraf@suse.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-spi@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/spi/spi-bcm2835aux.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
index 7de6f8472a810..6f4c6aa801f14 100644
--- a/drivers/spi/spi-bcm2835aux.c
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -187,6 +187,11 @@ static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id)
struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
irqreturn_t ret = IRQ_NONE;
+ /* IRQ may be shared, so return if our interrupts are disabled */
+ if (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_CNTL1) &
+ (BCM2835_AUX_SPI_CNTL1_TXEMPTY | BCM2835_AUX_SPI_CNTL1_IDLE)))
+ return ret;
+
/* check if we have data to read */
while (bs->rx_len &&
(!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
--
2.20.1
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^ permalink raw reply related
* [PATCH 4.9 18/26] spi: bcm2835aux: ensure interrupts are enabled for shared handler
From: Greg Kroah-Hartman @ 2019-09-08 12:41 UTC (permalink / raw)
To: linux-kernel
Cc: Stefan Wahren, Rob Herring, Florian Fainelli, Scott Branden,
Sasha Levin, Marc Zyngier, Greg Kroah-Hartman, Alexander Graf,
stable, linux-spi, Eric Anholt, Mark Brown,
bcm-kernel-feedback-list, linux-rpi-kernel, Ray Jui,
linux-arm-kernel
In-Reply-To: <20190908121057.216802689@linuxfoundation.org>
[ Upstream commit bc519d9574618e47a0c788000fb78da95e18d953 ]
The BCM2835 AUX SPI has a shared interrupt line (with AUX UART).
Downstream fixes this with an AUX irqchip to demux the IRQ sources and a
DT change which breaks compatibility with older kernels. The AUX irqchip
was already rejected for upstream[1] and the DT change would break
working systems if the DTB is updated to a newer one. The latter issue
was brought to my attention by Alex Graf.
The root cause however is a bug in the shared handler. Shared handlers
must check that interrupts are actually enabled before servicing the
interrupt. Add a check that the TXEMPTY or IDLE interrupts are enabled.
[1] https://patchwork.kernel.org/patch/9781221/
Cc: Alexander Graf <agraf@suse.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Eric Anholt <eric@anholt.net>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-spi@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/spi/spi-bcm2835aux.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
index 7428091d3f5b8..bd00b7cc8b78b 100644
--- a/drivers/spi/spi-bcm2835aux.c
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -184,6 +184,11 @@ static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id)
struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
irqreturn_t ret = IRQ_NONE;
+ /* IRQ may be shared, so return if our interrupts are disabled */
+ if (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_CNTL1) &
+ (BCM2835_AUX_SPI_CNTL1_TXEMPTY | BCM2835_AUX_SPI_CNTL1_IDLE)))
+ return ret;
+
/* check if we have data to read */
while (bs->rx_len &&
(!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
--
2.20.1
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^ permalink raw reply related
* Re: [PATCH v2 0/5] ARM: make DaVinci part of the ARM v5 multiplatform build
From: Bartosz Golaszewski @ 2019-09-08 13:31 UTC (permalink / raw)
To: Arnd Bergmann
Cc: David Lechner, Kevin Hilman, Sekhar Nori,
Linux Kernel Mailing List, Bartosz Golaszewski, Hans Verkuil,
Mauro Carvalho Chehab, Linux ARM, Linux Media Mailing List
In-Reply-To: <CAK8P3a0+kfDbGrcFi5TLxNNpoOM6u6KRW+PaLFNSQJ9BTxX=-w@mail.gmail.com>
sob., 7 wrz 2019 o 10:21 Arnd Bergmann <arnd@arndb.de> napisał(a):
>
> On Wed, Aug 28, 2019 at 9:55 AM Bartosz Golaszewski
> <bgolaszewski@baylibre.com> wrote:
> > śr., 28 sie 2019 o 09:44 Sekhar Nori <nsekhar@ti.com> napisał(a):
> >
> > Actually I tested this without the clocksource conversion and it works
> > - the previous driver still selects relevant config options. But I
> > think you're right - it's worth picking up all the bug fixes from this
> > series and then merging the rest once dm365 issue is fixed.
>
> I just had another look at the series and found that the driver fixes
> (patches 1 and 2) are queued in linux-next, and patch 3 was merged.
>
> If you like, I could put the remaining two patches into the arm/late branch
> and send that after the media and staging trees are merged into mainline.
>
> Arnd
Sure! Makes sense.
Sekhar: this series doesn't break current mainline (i.e. without the
clocksource series) so I think we're safe even for dm365.
Bart
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^ permalink raw reply
* [PATCH 0/6] arm64: dts: meson-g12: add support for PCIe
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
This patchset :
- updates the Amlogic PCI bindings for G12A
- reworks the Amlogic PCIe driver to make use of the
G12a USB3+PCIe Combo PHY instead of directly writing in
the PHY register
- adds the necessary operations to the G12a USB3+PCIe Combo PHY driver
- adds the PCIe Node for G12A, G12B and SM1 SoCs
- adds the commented support for the S922X, A311D and S905D3 based
VIM3 boards.
This patchset has been tested in a A311D VIM3 using a 128Go
TS128GMTE110S NVMe PCIe module.
For indication, here is a bonnie++ run as ext4 formatted:
------Sequential Output------ --Sequential Input- --Random-
-Per Chr- --Block-- -Rewrite- -Per Chr- --Block-- --Seeks--
Size K/sec %CP K/sec %CP K/sec %CP K/sec %CP K/sec %CP /sec %CP
4G 93865 99 312837 96 194487 23 102808 97 415501 21 +++++ +++
Neil Armstrong (6):
dt-bindings: pci: amlogic,meson-pcie: Add G12A bindings
PCI: amlogic: Fix probed clock names
PCI: amlogic: meson: Add support for G12A
phy: meson-g12a-usb3-pcie: Add support for PCIe mode
arm64: dts: meson-g12a: Add PCIe node
arm64: dts: khadas-vim3: add commented support for PCIe
.../bindings/pci/amlogic,meson-pcie.txt | 12 +-
.../boot/dts/amlogic/meson-g12-common.dtsi | 33 ++++++
.../amlogic/meson-g12b-a311d-khadas-vim3.dts | 22 ++++
.../amlogic/meson-g12b-s922x-khadas-vim3.dts | 22 ++++
.../boot/dts/amlogic/meson-khadas-vim3.dtsi | 4 +
.../dts/amlogic/meson-sm1-khadas-vim3l.dts | 22 ++++
drivers/pci/controller/dwc/pci-meson.c | 105 ++++++++++++++----
.../phy/amlogic/phy-meson-g12a-usb3-pcie.c | 70 ++++++++++--
8 files changed, 258 insertions(+), 32 deletions(-)
--
2.17.1
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^ permalink raw reply
* [PATCH 1/6] dt-bindings: pci: amlogic,meson-pcie: Add G12A bindings
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon,
devicetree
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
Add PCIE bindings for the Amlogic G12A SoC, the support is the same
but the PHY is shared with USB3 to control the differential lines.
Thus this adds a phy phandle to control the PHY, and sets invalid
MIPI clock as optional for G12A.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../devicetree/bindings/pci/amlogic,meson-pcie.txt | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt b/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt
index efa2c8b9b85a..84fdc422792e 100644
--- a/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt
@@ -9,13 +9,16 @@ Additional properties are described here:
Required properties:
- compatible:
- should contain "amlogic,axg-pcie" to identify the core.
+ should contain :
+ - "amlogic,axg-pcie" for AXG SoC Family
+ - "amlogic,g12a-pcie" for G12A SoC Family
+ to identify the core.
- reg:
should contain the configuration address space.
- reg-names: Must be
- "elbi" External local bus interface registers
- "cfg" Meson specific registers
- - "phy" Meson PCIE PHY registers
+ - "phy" Meson PCIE PHY registers for AXG SoC Family
- "config" PCIe configuration space
- reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.
- clocks: Must contain an entry for each entry in clock-names.
@@ -23,12 +26,13 @@ Required properties:
- "pclk" PCIe GEN 100M PLL clock
- "port" PCIe_x(A or B) RC clock gate
- "general" PCIe Phy clock
- - "mipi" PCIe_x(A or B) 100M ref clock gate
+ - "mipi" PCIe_x(A or B) 100M ref clock gate for AXG SoC Family
- resets: phandle to the reset lines.
- reset-names: must contain "phy" "port" and "apb"
- - "phy" Share PHY reset
+ - "phy" Share PHY reset for AXG SoC Family
- "port" Port A or B reset
- "apb" Share APB reset
+- phys: should contain a phandle to the shared phy for G12A SoC Family
- device_type:
should be "pci". As specified in designware-pcie.txt
--
2.17.1
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^ permalink raw reply related
* [PATCH 2/6] PCI: amlogic: Fix probed clock names
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
Fix the clock names used in the probe function according
to the bindings.
Fixes: 9c0ef6d34fdb ("PCI: amlogic: Add the Amlogic Meson PCIe controller driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/pci/controller/dwc/pci-meson.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index 541f37a6f6a5..ab79990798f8 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -250,15 +250,15 @@ static int meson_pcie_probe_clocks(struct meson_pcie *mp)
if (IS_ERR(res->port_clk))
return PTR_ERR(res->port_clk);
- res->mipi_gate = meson_pcie_probe_clock(dev, "pcie_mipi_en", 0);
+ res->mipi_gate = meson_pcie_probe_clock(dev, "mipi", 0);
if (IS_ERR(res->mipi_gate))
return PTR_ERR(res->mipi_gate);
- res->general_clk = meson_pcie_probe_clock(dev, "pcie_general", 0);
+ res->general_clk = meson_pcie_probe_clock(dev, "general", 0);
if (IS_ERR(res->general_clk))
return PTR_ERR(res->general_clk);
- res->clk = meson_pcie_probe_clock(dev, "pcie", 0);
+ res->clk = meson_pcie_probe_clock(dev, "pclk", 0);
if (IS_ERR(res->clk))
return PTR_ERR(res->clk);
--
2.17.1
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* [PATCH 3/6] PCI: amlogic: meson: Add support for G12A
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
Add support for the Amlogic G12A SoC using a separate shared PHY.
This adds support for fetching a PHY phandle and call the PHY init,
reset and power on/off calls instead of writing in the PHY register or
toggling the PHY reset line.
The MIPI clock is also made optional since it is used for setting up
the PHY reference clock chared with the DSI controller on AXG.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/pci/controller/dwc/pci-meson.c | 101 ++++++++++++++++++++-----
1 file changed, 84 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index ab79990798f8..3fadad381762 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -16,6 +16,7 @@
#include <linux/reset.h>
#include <linux/resource.h>
#include <linux/types.h>
+#include <linux/phy/phy.h>
#include "pcie-designware.h"
@@ -96,12 +97,18 @@ struct meson_pcie_rc_reset {
struct reset_control *apb;
};
+struct meson_pcie_param {
+ bool has_shared_phy;
+};
+
struct meson_pcie {
struct dw_pcie pci;
struct meson_pcie_mem_res mem_res;
struct meson_pcie_clk_res clk_res;
struct meson_pcie_rc_reset mrst;
struct gpio_desc *reset_gpio;
+ struct phy *phy;
+ const struct meson_pcie_param *param;
};
static struct reset_control *meson_pcie_get_reset(struct meson_pcie *mp,
@@ -123,10 +130,12 @@ static int meson_pcie_get_resets(struct meson_pcie *mp)
{
struct meson_pcie_rc_reset *mrst = &mp->mrst;
- mrst->phy = meson_pcie_get_reset(mp, "phy", PCIE_SHARED_RESET);
- if (IS_ERR(mrst->phy))
- return PTR_ERR(mrst->phy);
- reset_control_deassert(mrst->phy);
+ if (!mp->param->has_shared_phy) {
+ mrst->phy = meson_pcie_get_reset(mp, "phy", PCIE_SHARED_RESET);
+ if (IS_ERR(mrst->phy))
+ return PTR_ERR(mrst->phy);
+ reset_control_deassert(mrst->phy);
+ }
mrst->port = meson_pcie_get_reset(mp, "port", PCIE_NORMAL_RESET);
if (IS_ERR(mrst->port))
@@ -180,6 +189,9 @@ static int meson_pcie_get_mems(struct platform_device *pdev,
if (IS_ERR(mp->mem_res.cfg_base))
return PTR_ERR(mp->mem_res.cfg_base);
+ if (mp->param->has_shared_phy)
+ return 0;
+
/* Meson SoC has two PCI controllers use same phy register*/
mp->mem_res.phy_base = meson_pcie_get_mem_shared(pdev, mp, "phy");
if (IS_ERR(mp->mem_res.phy_base))
@@ -188,19 +200,33 @@ static int meson_pcie_get_mems(struct platform_device *pdev,
return 0;
}
-static void meson_pcie_power_on(struct meson_pcie *mp)
+static int meson_pcie_power_on(struct meson_pcie *mp)
{
- writel(MESON_PCIE_PHY_POWERUP, mp->mem_res.phy_base);
+ int ret = 0;
+
+ if (mp->param->has_shared_phy)
+ ret = phy_power_on(mp->phy);
+ else
+ writel(MESON_PCIE_PHY_POWERUP, mp->mem_res.phy_base);
+
+ return ret;
}
-static void meson_pcie_reset(struct meson_pcie *mp)
+static int meson_pcie_reset(struct meson_pcie *mp)
{
struct meson_pcie_rc_reset *mrst = &mp->mrst;
-
- reset_control_assert(mrst->phy);
- udelay(PCIE_RESET_DELAY);
- reset_control_deassert(mrst->phy);
- udelay(PCIE_RESET_DELAY);
+ int ret = 0;
+
+ if (mp->param->has_shared_phy) {
+ ret = phy_reset(mp->phy);
+ if (ret)
+ return ret;
+ } else {
+ reset_control_assert(mrst->phy);
+ udelay(PCIE_RESET_DELAY);
+ reset_control_deassert(mrst->phy);
+ udelay(PCIE_RESET_DELAY);
+ }
reset_control_assert(mrst->port);
reset_control_assert(mrst->apb);
@@ -208,6 +234,8 @@ static void meson_pcie_reset(struct meson_pcie *mp)
reset_control_deassert(mrst->port);
reset_control_deassert(mrst->apb);
udelay(PCIE_RESET_DELAY);
+
+ return 0;
}
static inline struct clk *meson_pcie_probe_clock(struct device *dev,
@@ -250,9 +278,11 @@ static int meson_pcie_probe_clocks(struct meson_pcie *mp)
if (IS_ERR(res->port_clk))
return PTR_ERR(res->port_clk);
- res->mipi_gate = meson_pcie_probe_clock(dev, "mipi", 0);
- if (IS_ERR(res->mipi_gate))
- return PTR_ERR(res->mipi_gate);
+ if (!mp->param->has_shared_phy) {
+ res->mipi_gate = meson_pcie_probe_clock(dev, "mipi", 0);
+ if (IS_ERR(res->mipi_gate))
+ return PTR_ERR(res->mipi_gate);
+ }
res->general_clk = meson_pcie_probe_clock(dev, "general", 0);
if (IS_ERR(res->general_clk))
@@ -524,6 +554,7 @@ static const struct dw_pcie_ops dw_pcie_ops = {
static int meson_pcie_probe(struct platform_device *pdev)
{
+ const struct meson_pcie_param *match_data;
struct device *dev = &pdev->dev;
struct dw_pcie *pci;
struct meson_pcie *mp;
@@ -537,6 +568,20 @@ static int meson_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
+ match_data = of_device_get_match_data(dev);
+ if (!match_data) {
+ dev_err(dev, "failed to get match data\n");
+ return -ENODEV;
+ }
+ mp->param = match_data;
+
+ if (mp->param->has_shared_phy) {
+ mp->phy = devm_phy_get(dev, "pcie");
+ if (IS_ERR(mp->phy)) {
+ return PTR_ERR(mp->phy);
+ }
+ }
+
mp->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
if (IS_ERR(mp->reset_gpio)) {
dev_err(dev, "get reset gpio failed\n");
@@ -555,8 +600,17 @@ static int meson_pcie_probe(struct platform_device *pdev)
return ret;
}
- meson_pcie_power_on(mp);
- meson_pcie_reset(mp);
+ ret = meson_pcie_power_on(mp);
+ if (ret) {
+ dev_err(dev, "phy power on failed, %d\n", ret);
+ return ret;
+ }
+
+ ret = meson_pcie_reset(mp);
+ if (ret) {
+ dev_err(dev, "reset failed, %d\n", ret);
+ return ret;
+ }
ret = meson_pcie_probe_clocks(mp);
if (ret) {
@@ -575,9 +629,22 @@ static int meson_pcie_probe(struct platform_device *pdev)
return 0;
}
+static struct meson_pcie_param meson_pcie_axg_param = {
+ .has_shared_phy = false,
+};
+
+static struct meson_pcie_param meson_pcie_g12a_param = {
+ .has_shared_phy = true,
+};
+
static const struct of_device_id meson_pcie_of_match[] = {
{
.compatible = "amlogic,axg-pcie",
+ .data = &meson_pcie_axg_param,
+ },
+ {
+ .compatible = "amlogic,g12a-pcie",
+ .data = &meson_pcie_g12a_param,
},
{},
};
--
2.17.1
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* [PATCH 4/6] phy: meson-g12a-usb3-pcie: Add support for PCIe mode
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
This adds extended PCIe PHY functions for the Amlogic G12A
USB3+PCIE Combo PHY to support reset, power_on and power_off for
PCIe exclusively.
With these callbacks, we can handle all the needed operations of the
Amlogic PCIe controller driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../phy/amlogic/phy-meson-g12a-usb3-pcie.c | 70 ++++++++++++++++---
1 file changed, 61 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
index ac322d643c7a..08e322789e59 100644
--- a/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
+++ b/drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
@@ -50,6 +50,8 @@
#define PHY_R5_PHY_CR_ACK BIT(16)
#define PHY_R5_PHY_BS_OUT BIT(17)
+#define PCIE_RESET_DELAY 500
+
struct phy_g12a_usb3_pcie_priv {
struct regmap *regmap;
struct regmap *regmap_cr;
@@ -196,6 +198,10 @@ static int phy_g12a_usb3_init(struct phy *phy)
struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
int data, ret;
+ ret = reset_control_reset(priv->reset);
+ if (ret)
+ return ret;
+
/* Switch PHY to USB3 */
/* TODO figure out how to handle when PCIe was set in the bootloader */
regmap_update_bits(priv->regmap, PHY_R0,
@@ -272,24 +278,64 @@ static int phy_g12a_usb3_init(struct phy *phy)
return 0;
}
-static int phy_g12a_usb3_pcie_init(struct phy *phy)
+static int phy_g12a_usb3_pcie_power_on(struct phy *phy)
+{
+ struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
+
+ if (priv->mode == PHY_TYPE_USB3)
+ return 0;
+
+ regmap_update_bits(priv->regmap, PHY_R0,
+ PHY_R0_PCIE_POWER_STATE,
+ FIELD_PREP(PHY_R0_PCIE_POWER_STATE, 0x1c));
+
+ return 0;
+}
+
+static int phy_g12a_usb3_pcie_power_off(struct phy *phy)
+{
+ struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
+
+ if (priv->mode == PHY_TYPE_USB3)
+ return 0;
+
+ regmap_update_bits(priv->regmap, PHY_R0,
+ PHY_R0_PCIE_POWER_STATE,
+ FIELD_PREP(PHY_R0_PCIE_POWER_STATE, 0x1d));
+
+ return 0;
+}
+
+static int phy_g12a_usb3_pcie_reset(struct phy *phy)
{
struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
int ret;
- ret = reset_control_reset(priv->reset);
+ if (priv->mode == PHY_TYPE_USB3)
+ return 0;
+
+ ret = reset_control_assert(priv->reset);
if (ret)
return ret;
+ udelay(PCIE_RESET_DELAY);
+
+ ret = reset_control_deassert(priv->reset);
+ if (ret)
+ return ret;
+
+ udelay(PCIE_RESET_DELAY);
+
+ return 0;
+}
+
+static int phy_g12a_usb3_pcie_init(struct phy *phy)
+{
+ struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
+
if (priv->mode == PHY_TYPE_USB3)
return phy_g12a_usb3_init(phy);
- /* Power UP PCIE */
- /* TODO figure out when the bootloader has set USB3 mode before */
- regmap_update_bits(priv->regmap, PHY_R0,
- PHY_R0_PCIE_POWER_STATE,
- FIELD_PREP(PHY_R0_PCIE_POWER_STATE, 0x1c));
-
return 0;
}
@@ -297,7 +343,10 @@ static int phy_g12a_usb3_pcie_exit(struct phy *phy)
{
struct phy_g12a_usb3_pcie_priv *priv = phy_get_drvdata(phy);
- return reset_control_reset(priv->reset);
+ if (priv->mode == PHY_TYPE_USB3)
+ return reset_control_reset(priv->reset);
+
+ return 0;
}
static struct phy *phy_g12a_usb3_pcie_xlate(struct device *dev,
@@ -326,6 +375,9 @@ static struct phy *phy_g12a_usb3_pcie_xlate(struct device *dev,
static const struct phy_ops phy_g12a_usb3_pcie_ops = {
.init = phy_g12a_usb3_pcie_init,
.exit = phy_g12a_usb3_pcie_exit,
+ .power_on = phy_g12a_usb3_pcie_power_on,
+ .power_off = phy_g12a_usb3_pcie_power_off,
+ .reset = phy_g12a_usb3_pcie_reset,
.owner = THIS_MODULE,
};
--
2.17.1
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* [PATCH 6/6] arm64: dts: khadas-vim3: add commented support for PCIe
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.
The needed DT configuration when the MCU is configured to mux
the PCIe/USB3.0 differential lines to the M.2 Key M slot is
added commented and may uncommented to disable USB3.0 from the
USB Complex and enable the PCIe controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../amlogic/meson-g12b-a311d-khadas-vim3.dts | 22 +++++++++++++++++++
.../amlogic/meson-g12b-s922x-khadas-vim3.dts | 22 +++++++++++++++++++
.../boot/dts/amlogic/meson-khadas-vim3.dtsi | 4 ++++
.../dts/amlogic/meson-sm1-khadas-vim3l.dts | 22 +++++++++++++++++++
4 files changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
index 3a6a1e0c1e32..0577b1435cbb 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
@@ -14,3 +14,25 @@
/ {
compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
};
+
+/*
+ * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
+ * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
+ * an USB3.0 Type A connector and a M.2 Key M slot.
+ * The PHY driving these differential lines is shared between
+ * the USB3.0 controller and the PCIe Controller, thus only
+ * a single controller can use it.
+ * If the MCU is configured to mux the PCIe/USB3.0 differential lines
+ * to the M.2 Key M slot, uncomment the following block to disable
+ * USB3.0 from the USB Complex and enable the PCIe controller.
+ */
+/*
+&pcie {
+ status = "okay";
+};
+
+&usb {
+ phys = <&usb2_phy0>, <&usb2_phy1>;
+ phy-names = "usb2-phy0", "usb2-phy1";
+};
+ */
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
index b73deb282120..1ef5c2f04f67 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-s922x-khadas-vim3.dts
@@ -14,3 +14,25 @@
/ {
compatible = "khadas,vim3", "amlogic,s922x", "amlogic,g12b";
};
+
+/*
+ * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
+ * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
+ * an USB3.0 Type A connector and a M.2 Key M slot.
+ * The PHY driving these differential lines is shared between
+ * the USB3.0 controller and the PCIe Controller, thus only
+ * a single controller can use it.
+ * If the MCU is configured to mux the PCIe/USB3.0 differential lines
+ * to the M.2 Key M slot, uncomment the following block to disable
+ * USB3.0 from the USB Complex and enable the PCIe controller.
+ */
+/*
+&pcie {
+ status = "okay";
+};
+
+&usb {
+ phys = <&usb2_phy0>, <&usb2_phy1>;
+ phy-names = "usb2-phy0", "usb2-phy1";
+};
+ */
diff --git a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
index 8647da7d6609..eac5720dc15f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi
@@ -246,6 +246,10 @@
linux,rc-map-name = "rc-khadas";
};
+&pcie {
+ reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
+};
+
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
index 5233bd7cacfb..d9c7cbedce53 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
@@ -68,3 +68,25 @@
clock-names = "clkin1";
status = "okay";
};
+
+/*
+ * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
+ * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
+ * an USB3.0 Type A connector and a M.2 Key M slot.
+ * The PHY driving these differential lines is shared between
+ * the USB3.0 controller and the PCIe Controller, thus only
+ * a single controller can use it.
+ * If the MCU is configured to mux the PCIe/USB3.0 differential lines
+ * to the M.2 Key M slot, uncomment the following block to disable
+ * USB3.0 from the USB Complex and enable the PCIe controller.
+ */
+/*
+&pcie {
+ status = "okay";
+};
+
+&usb {
+ phys = <&usb2_phy0>, <&usb2_phy1>;
+ phy-names = "usb2-phy0", "usb2-phy1";
+};
+ */
--
2.17.1
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* [PATCH 5/6] arm64: dts: meson-g12a: Add PCIe node
From: Neil Armstrong @ 2019-09-08 13:42 UTC (permalink / raw)
To: khilman, bhelgaas, lorenzo.pieralisi, yue.wang, kishon
Cc: Neil Armstrong, maz, linux-kernel, repk, linux-pci, linux-amlogic,
linux-arm-kernel
In-Reply-To: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com>
This adds the Amlogic G12A PCI Express controller node, also
using the USB3+PCIe Combo PHY.
The PHY mode selection is static, thus the USB3+PCIe Combo PHY
phandle would need to be removed from the USB control node if the
shared differentil lines are used for PCIe instead of USB3.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../boot/dts/amlogic/meson-g12-common.dtsi | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 852cf9cf121b..7330dc37b7a6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -95,6 +95,39 @@
#size-cells = <2>;
ranges;
+ pcie: pcie@fc000000 {
+ compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
+ reg = <0x0 0xfc000000 0x0 0x400000
+ 0x0 0xff648000 0x0 0x2000
+ 0x0 0xfc400000 0x0 0x200000>;
+ reg-names = "elbi", "cfg", "config";
+ interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000
+ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
+
+ clocks = <&clkc CLKID_PCIE_PHY
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PLL>;
+ clock-names = "general",
+ "pclk",
+ "port";
+ resets = <&reset RESET_PCIE_CTRL_A>,
+ <&reset RESET_PCIE_APB>;
+ reset-names = "port",
+ "apb";
+ num-lanes = <1>;
+ phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
+ phy-names = "pcie";
+ status = "disabled";
+ };
+
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
"snps,dwmac-3.70a",
--
2.17.1
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* Re: [PATCH v5 0/5] Add HDMI jack support on RK3288
From: Cheng-yi Chiang @ 2019-09-08 13:51 UTC (permalink / raw)
To: Tzung-Bi Shih
Cc: ALSA development, Douglas Anderson, Heiko Stuebner, Liam Girdwood,
David Airlie, dri-devel, Neil Armstrong, Takashi Iwai, tzungbi,
Linux Kernel Mailing List, Hans Verkuil, Andrzej Hajda,
Russell King, Mark Brown, Laurent Pinchart, Daniel Vetter,
linux-rockchip, Dylan Reid, Jaroslav Kysela, linux-arm-kernel
In-Reply-To: <CAFv8NwLiY+ro0L4c5vjSOGN8jA-Qr4zm2OWvVHkiuoa7_4e2Fg@mail.gmail.com>
On Fri, Aug 30, 2019 at 10:55 AM Cheng-yi Chiang <cychiang@chromium.org> wrote:
>
> On Wed, Jul 17, 2019 at 6:28 PM Tzung-Bi Shih <tzungbi@google.com> wrote:
> >
> > On Wed, Jul 17, 2019 at 4:33 PM Cheng-Yi Chiang <cychiang@chromium.org> wrote:
> > >
> > > This patch series supports HDMI jack reporting on RK3288, which uses
> > > DRM dw-hdmi driver and hdmi-codec codec driver.
> > >
> > > The previous discussion about reporting jack status using hdmi-notifier
> > > and drm_audio_component is at
> > >
> > > https://lore.kernel.org/patchwork/patch/1083027/
> > >
> > > The new approach is to use a callback mechanism that is
> > > specific to hdmi-codec.
> > >
> > > Changes from v4 to v5:
> > > - synopsys/Kconfig: Remove the incorrect dependency change in v4.
> > > - rockchip/Kconfig: Add dependency of hdmi-codec when it is really need
> > > for jack support.
> > >
> > > Cheng-Yi Chiang (5):
> > > ASoC: hdmi-codec: Add an op to set callback function for plug event
> > > drm: bridge: dw-hdmi: Report connector status using callback
> > > drm: dw-hdmi-i2s: Use fixed id for codec device
> > > ASoC: rockchip_max98090: Add dai_link for HDMI
> > > ASoC: rockchip_max98090: Add HDMI jack support
> > >
> > LGTM.
> >
> > Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
>
> Hi Daniel,
> Do you have further concern on this patch series related to hdmi-codec
> and drm part ?
> We would like to merge this patch series if possible.
> They will be needed in many future chrome projects for HDMI audio jack
> detection.
> Thanks a lot!
Hi Neil,
I am not sure if this patch series is under your radar.
Would you mind taking a look ?
This patch series has been following great suggestions from various
reviewers, so I hope it is fine now.
Audio jack reporting for HDMI might not be needed for other OS, but it
is a must on ChromeOS.
We have many previous projects using different local patch sets to
achieve HDMI jack reporting.
I hope that we can achieve a proper way and really get the patches
merged to mainline.
Thanks a lot!
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* Re: [PATCH v2 04/14] dmaengine: Add metadata_ops for dma_async_tx_descriptor
From: Vinod Koul @ 2019-09-08 14:12 UTC (permalink / raw)
To: Peter Ujfalusi
Cc: nm, devicetree, grygorii.strashko, lokeshvutla, j-keerthy,
linux-kernel, t-kristo, tony, robh+dt, ssantosh, dmaengine,
dan.j.williams, linux-arm-kernel
In-Reply-To: <20190730093450.12664-5-peter.ujfalusi@ti.com>
On 30-07-19, 12:34, Peter Ujfalusi wrote:
> The metadata is best described as side band data or parameters traveling
> alongside the data DMAd by the DMA engine. It is data
> which is understood by the peripheral and the peripheral driver only, the
> DMA engine see it only as data block and it is not interpreting it in any
> way.
>
> The metadata can be different per descriptor as it is a parameter for the
> data being transferred.
>
> If the DMA supports per descriptor metadata it can implement the attach,
> get_ptr/set_len callbacks.
>
> Client drivers must only use either attach or get_ptr/set_len to avoid
> misconfiguration.
>
> Client driver can check if a given metadata mode is supported by the
> channel during probe time with
> dmaengine_is_metadata_mode_supported(chan, DESC_METADATA_CLIENT);
> dmaengine_is_metadata_mode_supported(chan, DESC_METADATA_ENGINE);
>
> and based on this information can use either mode.
>
> Wrappers are also added for the metadata_ops.
>
> To be used in DESC_METADATA_CLIENT mode:
> dmaengine_desc_attach_metadata()
>
> To be used in DESC_METADATA_ENGINE mode:
> dmaengine_desc_get_metadata_ptr()
> dmaengine_desc_set_metadata_len()
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
> drivers/dma/dmaengine.c | 73 ++++++++++++++++++++++++++
> include/linux/dmaengine.h | 108 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 181 insertions(+)
>
> diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
> index 03ac4b96117c..6baddf7dcbfd 100644
> --- a/drivers/dma/dmaengine.c
> +++ b/drivers/dma/dmaengine.c
> @@ -1302,6 +1302,79 @@ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
> }
> EXPORT_SYMBOL(dma_async_tx_descriptor_init);
>
> +static inline int desc_check_and_set_metadata_mode(
> + struct dma_async_tx_descriptor *desc, enum dma_desc_metadata_mode mode)
> +{
> + /* Make sure that the metadata mode is not mixed */
> + if (!desc->desc_metadata_mode) {
> + if (dmaengine_is_metadata_mode_supported(desc->chan, mode))
> + desc->desc_metadata_mode = mode;
So do we have different descriptors supporting different modes or is it
controlled based? For latter we can do this check at controller
registration!
--
~Vinod
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^ permalink raw reply
* Re: [PATCH v2 06/14] dmaengine: ti: Add cppi5 header for UDMA
From: Vinod Koul @ 2019-09-08 14:25 UTC (permalink / raw)
To: Peter Ujfalusi
Cc: nm, devicetree, grygorii.strashko, lokeshvutla, j-keerthy,
linux-kernel, t-kristo, tony, robh+dt, ssantosh, dmaengine,
dan.j.williams, linux-arm-kernel
In-Reply-To: <20190730093450.12664-7-peter.ujfalusi@ti.com>
On 30-07-19, 12:34, Peter Ujfalusi wrote:
> +/**
> + * Descriptor header, present in all types of descriptors
> + */
> +struct cppi5_desc_hdr_t {
> + u32 pkt_info0; /* Packet info word 0 (n/a in Buffer desc) */
> + u32 pkt_info1; /* Packet info word 1 (n/a in Buffer desc) */
> + u32 pkt_info2; /* Packet info word 2 Buffer reclamation info */
> + u32 src_dst_tag; /* Packet info word 3 (n/a in Buffer desc) */
Can we move these comments to kernel-doc style please
> +/**
> + * cppi5_desc_get_type - get descriptor type
> + * @desc_hdr: packet descriptor/TR header
> + *
> + * Returns descriptor type:
> + * CPPI5_INFO0_DESC_TYPE_VAL_HOST
> + * CPPI5_INFO0_DESC_TYPE_VAL_MONO
> + * CPPI5_INFO0_DESC_TYPE_VAL_TR
> + */
> +static inline u32 cppi5_desc_get_type(struct cppi5_desc_hdr_t *desc_hdr)
> +{
> + WARN_ON(!desc_hdr);
why WARN_ON and not return error!
> +/**
> + * cppi5_hdesc_calc_size - Calculate Host Packet Descriptor size
> + * @epib: is EPIB present
> + * @psdata_size: PSDATA size
> + * @sw_data_size: SWDATA size
> + *
> + * Returns required Host Packet Descriptor size
> + * 0 - if PSDATA > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE
> + */
> +static inline u32 cppi5_hdesc_calc_size(bool epib, u32 psdata_size,
> + u32 sw_data_size)
> +{
> + u32 desc_size;
> +
> + if (psdata_size > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE)
> + return 0;
> + //TODO_GS: align
:)
--
~Vinod
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* [PATCH] Revert "ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware."
From: Stefan Wahren @ 2019-09-08 15:44 UTC (permalink / raw)
To: Eric Anholt, Florian Fainelli, Ray Jui, Scott Branden,
Paul Kocialkowski, boris.brezillon
Cc: stable, bcm-kernel-feedback-list, dri-devel, linux-arm-kernel,
Stefan Wahren
Since release of the new BCM2835 PM driver there has been several reports
of V3D probing issues. This is caused by timeouts during powering-up the
GRAFX PM domain:
bcm2835-power: Timeout waiting for grafx power OK
I was able to reproduce this reliable on my Raspberry Pi 3B+ after setting
force_turbo=1 in the firmware configuration. Since there are no issues
using the firmware PM driver with the same setup, there must be an issue
in the BCM2835 PM driver.
Unfortunately there hasn't been much progress in identifying the root cause
since June (mostly in the lack of documentation), so i decided to switch
back until the issue in the BCM2835 PM driver is fixed.
Link: https://github.com/raspberrypi/linux/issues/3046
Fixes: e1dc2b2e1bef (" ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.")
Cc: stable@vger.kernel.org
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
---
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 ++++
arch/arm/boot/dts/bcm283x.dtsi | 4 +---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 6c6a7f6..b909e3b 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -67,6 +67,10 @@
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
+&v3d {
+ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
+};
+
&vec {
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
status = "okay";
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 2d191fc..b238567 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -3,7 +3,6 @@
#include <dt-bindings/clock/bcm2835-aux.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/soc/bcm2835-pm.h>
/* firmware-provided startup stubs live here, where the secondary CPUs are
* spinning.
@@ -121,7 +120,7 @@
#interrupt-cells = <2>;
};
- pm: watchdog@7e100000 {
+ watchdog@7e100000 {
compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
#power-domain-cells = <1>;
#reset-cells = <1>;
@@ -641,7 +640,6 @@
compatible = "brcm,bcm2835-v3d";
reg = <0x7ec00000 0x1000>;
interrupts = <1 10>;
- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
};
vc4: gpu {
--
2.7.4
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* Re: [PATCH v12 11/12] open: openat2(2) syscall
From: Aleksa Sarai @ 2019-09-08 16:24 UTC (permalink / raw)
To: Jeff Layton
Cc: linux-ia64, linux-sh, Peter Zijlstra, Rasmus Villemoes,
Alexei Starovoitov, linux-kernel, David Howells, linux-kselftest,
sparclinux, Jiri Olsa, linux-arch, linux-s390, Tycho Andersen,
Aleksa Sarai, Shuah Khan, Alexander Shishkin, Ingo Molnar,
linux-arm-kernel, linux-mips, linux-xtensa, Kees Cook,
Arnd Bergmann, Jann Horn, linuxppc-dev, linux-m68k, Al Viro,
Andy Lutomirski, Shuah Khan, Namhyung Kim, David Drysdale,
Christian Brauner, J. Bruce Fields, linux-parisc, linux-api,
Chanho Min, Oleg Nesterov, Eric Biederman, linux-alpha,
linux-fsdevel, Andrew Morton, Linus Torvalds, containers
In-Reply-To: <7236f382d72130f2afbbe8940e72cc67e5c6dce0.camel@kernel.org>
[-- Attachment #1.1: Type: text/plain, Size: 1275 bytes --]
On 2019-09-07, Jeff Layton <jlayton@kernel.org> wrote:
> On Thu, 2019-09-05 at 06:19 +1000, Aleksa Sarai wrote:
> > + * @flags: O_* flags.
> > + * @mode: O_CREAT/O_TMPFILE file mode.
> > + * @upgrade_mask: UPGRADE_* flags (to restrict O_PATH re-opening).
> > + * @resolve: RESOLVE_* flags.
> > + */
> > +struct open_how {
> > + __u32 flags;
> > + union {
> > + __u16 mode;
> > + __u16 upgrade_mask;
> > + };
> > + __u16 resolve;
> > +};
> > +
> > +#define OPEN_HOW_SIZE_VER0 8 /* sizeof first published struct */
> > +
>
> Hmm, there is no version field. When you want to expand this in the
> future, what is the plan? Add a new flag to indicate that it's some
> length?
The "version number" is the size of the struct. Any extensions we make
are appended to the struct (openat2 now takes a size_t argument), and
the new copy_struct_{to,from}_user() helpers handle all of the
permutations of {old,new} kernel and {old,new} user space.
This is how clone3(), sched_[gs]etattr() and perf_event_open() all
operate (all of the sigset syscalls operate similarly but don't
gracefully handle different kernel vintages -- you just get -EINVAL).
--
Aleksa Sarai
Senior Software Engineer (Containers)
SUSE Linux GmbH
<https://www.cyphar.com/>
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