* [PATCH v5 6/8] arm64: dts: bitmain: Source common clock for UART controllers
From: Manivannan Sadhasivam @ 2019-09-16 16:14 UTC (permalink / raw)
To: sboyd, mturquette, robh+dt
Cc: devicetree, Manivannan Sadhasivam, darren.tsao, linux-kernel,
linux-arm-kernel, fisher.cheng, alec.lin, linux-clk, haitao.suo
In-Reply-To: <20190916161447.32715-1-manivannan.sadhasivam@linaro.org>
Remove fixed clock and source common clock for UART controllers.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts | 9 ---------
arch/arm64/boot/dts/bitmain/bm1880.dtsi | 12 ++++++++++++
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts b/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts
index 3e8c70778e24..7a2c7f9c2660 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts
+++ b/arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts
@@ -49,12 +49,6 @@
reg = <0x1 0x00000000 0x0 0x40000000>; // 1GB
};
- uart_clk: uart-clk {
- compatible = "fixed-clock";
- clock-frequency = <500000000>;
- #clock-cells = <0>;
- };
-
soc {
gpio0: gpio@50027000 {
porta: gpio-controller@0 {
@@ -173,21 +167,18 @@
&uart0 {
status = "okay";
- clocks = <&uart_clk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
};
&uart1 {
status = "okay";
- clocks = <&uart_clk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
};
&uart2 {
status = "okay";
- clocks = <&uart_clk>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_default>;
};
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index 8471662413da..fa6e6905f588 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -174,6 +174,9 @@
uart0: serial@58018000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x58018000 0x0 0x2000>;
+ clocks = <&clk BM1880_CLK_UART_500M>,
+ <&clk BM1880_CLK_APB_UART>;
+ clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -184,6 +187,9 @@
uart1: serial@5801A000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x5801a000 0x0 0x2000>;
+ clocks = <&clk BM1880_CLK_UART_500M>,
+ <&clk BM1880_CLK_APB_UART>;
+ clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -194,6 +200,9 @@
uart2: serial@5801C000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x5801c000 0x0 0x2000>;
+ clocks = <&clk BM1880_CLK_UART_500M>,
+ <&clk BM1880_CLK_APB_UART>;
+ clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -204,6 +213,9 @@
uart3: serial@5801E000 {
compatible = "snps,dw-apb-uart";
reg = <0x0 0x5801e000 0x0 0x2000>;
+ clocks = <&clk BM1880_CLK_UART_500M>,
+ <&clk BM1880_CLK_APB_UART>;
+ clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
--
2.17.1
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* [PATCH v5 7/8] clk: Add common clock driver for BM1880 SoC
From: Manivannan Sadhasivam @ 2019-09-16 16:14 UTC (permalink / raw)
To: sboyd, mturquette, robh+dt
Cc: devicetree, Manivannan Sadhasivam, darren.tsao, linux-kernel,
linux-arm-kernel, fisher.cheng, alec.lin, linux-clk, haitao.suo
In-Reply-To: <20190916161447.32715-1-manivannan.sadhasivam@linaro.org>
Add common clock driver for Bitmain BM1880 SoC. The clock controller on
BM1880 has supplies clocks to all peripherals in the form of gate clocks
and composite clocks (fixed factor + gate).
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/clk/Kconfig | 7 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-bm1880.c | 966 +++++++++++++++++++++++++++++++++++++++
3 files changed, 974 insertions(+)
create mode 100644 drivers/clk/clk-bm1880.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 801fa1cd0321..e70c64e43ff9 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -139,6 +139,13 @@ config COMMON_CLK_SI570
This driver supports Silicon Labs 570/571/598/599 programmable
clock generators.
+config COMMON_CLK_BM1880
+ bool "Clock driver for Bitmain BM1880 SoC"
+ depends on ARCH_BITMAIN || COMPILE_TEST
+ default ARCH_BITMAIN
+ help
+ This driver supports the clocks on Bitmain BM1880 SoC.
+
config COMMON_CLK_CDCE706
tristate "Clock driver for TI CDCE706 clock synthesizer"
depends on I2C
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 0cad76021297..2c1ae6289a78 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
obj-$(CONFIG_COMMON_CLK_BD718XX) += clk-bd718x7.o
+obj-$(CONFIG_COMMON_CLK_BM1880) += clk-bm1880.o
obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
diff --git a/drivers/clk/clk-bm1880.c b/drivers/clk/clk-bm1880.c
new file mode 100644
index 000000000000..3b10de929fd4
--- /dev/null
+++ b/drivers/clk/clk-bm1880.c
@@ -0,0 +1,966 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Bitmain BM1880 SoC clock driver
+ *
+ * Copyright (c) 2019 Linaro Ltd.
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include <dt-bindings/clock/bm1880-clock.h>
+
+#define BM1880_CLK_MPLL_CTL 0x00
+#define BM1880_CLK_SPLL_CTL 0x04
+#define BM1880_CLK_FPLL_CTL 0x08
+#define BM1880_CLK_DDRPLL_CTL 0x0c
+
+#define BM1880_CLK_ENABLE0 0x00
+#define BM1880_CLK_ENABLE1 0x04
+#define BM1880_CLK_SELECT 0x20
+#define BM1880_CLK_DIV0 0x40
+#define BM1880_CLK_DIV1 0x44
+#define BM1880_CLK_DIV2 0x48
+#define BM1880_CLK_DIV3 0x4c
+#define BM1880_CLK_DIV4 0x50
+#define BM1880_CLK_DIV5 0x54
+#define BM1880_CLK_DIV6 0x58
+#define BM1880_CLK_DIV7 0x5c
+#define BM1880_CLK_DIV8 0x60
+#define BM1880_CLK_DIV9 0x64
+#define BM1880_CLK_DIV10 0x68
+#define BM1880_CLK_DIV11 0x6c
+#define BM1880_CLK_DIV12 0x70
+#define BM1880_CLK_DIV13 0x74
+#define BM1880_CLK_DIV14 0x78
+#define BM1880_CLK_DIV15 0x7c
+#define BM1880_CLK_DIV16 0x80
+#define BM1880_CLK_DIV17 0x84
+#define BM1880_CLK_DIV18 0x88
+#define BM1880_CLK_DIV19 0x8c
+#define BM1880_CLK_DIV20 0x90
+#define BM1880_CLK_DIV21 0x94
+#define BM1880_CLK_DIV22 0x98
+#define BM1880_CLK_DIV23 0x9c
+#define BM1880_CLK_DIV24 0xa0
+#define BM1880_CLK_DIV25 0xa4
+#define BM1880_CLK_DIV26 0xa8
+#define BM1880_CLK_DIV27 0xac
+#define BM1880_CLK_DIV28 0xb0
+
+#define to_bm1880_pll_clk(_hw) container_of(_hw, struct bm1880_pll_hw_clock, hw)
+#define to_bm1880_div_clk(_hw) container_of(_hw, struct bm1880_div_hw_clock, hw)
+
+static DEFINE_SPINLOCK(bm1880_clk_lock);
+
+struct bm1880_clock_data {
+ void __iomem *pll_base;
+ void __iomem *sys_base;
+ struct clk_hw_onecell_data *clk_data;
+};
+
+struct bm1880_gate_clock {
+ unsigned int id;
+ const char *name;
+ const char *parent;
+ u32 gate_reg;
+ s8 gate_shift;
+ unsigned long flags;
+};
+
+struct bm1880_mux_clock {
+ unsigned int id;
+ const char *name;
+ const char * const *parents;
+ s8 num_parents;
+ u32 reg;
+ s8 shift;
+ unsigned long flags;
+};
+
+struct bm1880_div_clock {
+ unsigned int id;
+ const char *name;
+ u32 reg;
+ u8 shift;
+ u8 width;
+ u32 initval;
+ const struct clk_div_table *table;
+ unsigned long flags;
+};
+
+struct bm1880_div_hw_clock {
+ struct bm1880_div_clock div;
+ void __iomem *base;
+ spinlock_t *lock;
+ struct clk_hw hw;
+ struct clk_init_data init;
+};
+
+struct bm1880_composite_clock {
+ unsigned int id;
+ const char *name;
+ const char *parent;
+ const char * const *parents;
+ unsigned int num_parents;
+ unsigned long flags;
+
+ u32 gate_reg;
+ u32 mux_reg;
+ u32 div_reg;
+
+ s8 gate_shift;
+ s8 mux_shift;
+ s8 div_shift;
+ s8 div_width;
+ s16 div_initval;
+ const struct clk_div_table *table;
+};
+
+struct bm1880_pll_clock {
+ unsigned int id;
+ const char *name;
+ u32 reg;
+ unsigned long flags;
+};
+
+struct bm1880_pll_hw_clock {
+ struct bm1880_pll_clock pll;
+ void __iomem *base;
+ struct clk_hw hw;
+ struct clk_init_data init;
+};
+
+static const struct clk_ops bm1880_pll_ops;
+static const struct clk_ops bm1880_clk_div_ops;
+
+#define GATE_DIV(_id, _name, _parent, _gate_reg, _gate_shift, _div_reg, \
+ _div_shift, _div_width, _div_initval, _table, \
+ _flags) { \
+ .id = _id, \
+ .parent = _parent, \
+ .name = _name, \
+ .gate_reg = _gate_reg, \
+ .gate_shift = _gate_shift, \
+ .div_reg = _div_reg, \
+ .div_shift = _div_shift, \
+ .div_width = _div_width, \
+ .div_initval = _div_initval, \
+ .table = _table, \
+ .mux_shift = -1, \
+ .flags = _flags, \
+ }
+
+#define GATE_MUX(_id, _name, _parents, _gate_reg, _gate_shift, \
+ _mux_reg, _mux_shift, _flags) { \
+ .id = _id, \
+ .parents = _parents, \
+ .num_parents = ARRAY_SIZE(_parents), \
+ .name = _name, \
+ .gate_reg = _gate_reg, \
+ .gate_shift = _gate_shift, \
+ .div_shift = -1, \
+ .mux_reg = _mux_reg, \
+ .mux_shift = _mux_shift, \
+ .flags = _flags, \
+ }
+
+#define CLK_PLL(_id, _name, _parent, _reg, _flags) { \
+ .pll.id = _id, \
+ .pll.name = _name, \
+ .pll.reg = _reg, \
+ .hw.init = CLK_HW_INIT_PARENTS_DATA(_name, _parent, \
+ &bm1880_pll_ops, \
+ _flags), \
+ }
+
+#define CLK_DIV(_id, _name, _parent, _reg, _shift, _width, _initval, \
+ _table, _flags) { \
+ .div.id = _id, \
+ .div.name = _name, \
+ .div.reg = _reg, \
+ .div.shift = _shift, \
+ .div.width = _width, \
+ .div.initval = _initval, \
+ .div.table = _table, \
+ .hw.init = CLK_HW_INIT_HW(_name, _parent, \
+ &bm1880_clk_div_ops, \
+ _flags), \
+ }
+
+static struct clk_parent_data bm1880_pll_parent[] = {
+ { .fw_name = "osc", .name = "osc" },
+};
+
+/*
+ * All PLL clocks are marked as CRITICAL, hence they are very crucial
+ * for the functioning of the SoC
+ */
+static struct bm1880_pll_hw_clock bm1880_pll_clks[] = {
+ CLK_PLL(BM1880_CLK_MPLL, "clk_mpll", bm1880_pll_parent,
+ BM1880_CLK_MPLL_CTL, CLK_IS_CRITICAL),
+ CLK_PLL(BM1880_CLK_SPLL, "clk_spll", bm1880_pll_parent,
+ BM1880_CLK_SPLL_CTL, CLK_IS_CRITICAL),
+ CLK_PLL(BM1880_CLK_FPLL, "clk_fpll", bm1880_pll_parent,
+ BM1880_CLK_FPLL_CTL, CLK_IS_CRITICAL),
+ CLK_PLL(BM1880_CLK_DDRPLL, "clk_ddrpll", bm1880_pll_parent,
+ BM1880_CLK_DDRPLL_CTL, CLK_IS_CRITICAL),
+};
+
+/*
+ * Clocks marked as CRITICAL are needed for the proper functioning
+ * of the SoC.
+ */
+static const struct bm1880_gate_clock bm1880_gate_clks[] = {
+ { BM1880_CLK_AHB_ROM, "clk_ahb_rom", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 2, CLK_IS_CRITICAL },
+ { BM1880_CLK_AXI_SRAM, "clk_axi_sram", "clk_axi1",
+ BM1880_CLK_ENABLE0, 3, CLK_IS_CRITICAL },
+ { BM1880_CLK_DDR_AXI, "clk_ddr_axi", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 4, CLK_IS_CRITICAL },
+ { BM1880_CLK_APB_EFUSE, "clk_apb_efuse", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 6, CLK_IS_CRITICAL },
+ { BM1880_CLK_AXI5_EMMC, "clk_axi5_emmc", "clk_axi5",
+ BM1880_CLK_ENABLE0, 7, 0 },
+ { BM1880_CLK_AXI5_SD, "clk_axi5_sd", "clk_axi5",
+ BM1880_CLK_ENABLE0, 10, 0 },
+ { BM1880_CLK_AXI4_ETH0, "clk_axi4_eth0", "clk_axi4",
+ BM1880_CLK_ENABLE0, 14, 0 },
+ { BM1880_CLK_AXI4_ETH1, "clk_axi4_eth1", "clk_axi4",
+ BM1880_CLK_ENABLE0, 16, 0 },
+ { BM1880_CLK_AXI1_GDMA, "clk_axi1_gdma", "clk_axi1",
+ BM1880_CLK_ENABLE0, 17, 0 },
+ /* Don't gate GPIO clocks as it is not owned by the GPIO driver */
+ { BM1880_CLK_APB_GPIO, "clk_apb_gpio", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 18, CLK_IGNORE_UNUSED },
+ { BM1880_CLK_APB_GPIO_INTR, "clk_apb_gpio_intr", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 19, CLK_IGNORE_UNUSED },
+ { BM1880_CLK_AXI1_MINER, "clk_axi1_miner", "clk_axi1",
+ BM1880_CLK_ENABLE0, 21, 0 },
+ { BM1880_CLK_AHB_SF, "clk_ahb_sf", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 22, 0 },
+ { BM1880_CLK_SDMA_AXI, "clk_sdma_axi", "clk_axi5",
+ BM1880_CLK_ENABLE0, 23, 0 },
+ { BM1880_CLK_APB_I2C, "clk_apb_i2c", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 25, 0 },
+ { BM1880_CLK_APB_WDT, "clk_apb_wdt", "clk_mux_axi6",
+ BM1880_CLK_ENABLE0, 26, 0 },
+ { BM1880_CLK_APB_JPEG, "clk_apb_jpeg", "clk_axi6",
+ BM1880_CLK_ENABLE0, 27, 0 },
+ { BM1880_CLK_AXI5_NF, "clk_axi5_nf", "clk_axi5",
+ BM1880_CLK_ENABLE0, 29, 0 },
+ { BM1880_CLK_APB_NF, "clk_apb_nf", "clk_axi6",
+ BM1880_CLK_ENABLE0, 30, 0 },
+ { BM1880_CLK_APB_PWM, "clk_apb_pwm", "clk_mux_axi6",
+ BM1880_CLK_ENABLE1, 0, 0 },
+ { BM1880_CLK_RV, "clk_rv", "clk_mux_rv",
+ BM1880_CLK_ENABLE1, 1, 0 },
+ { BM1880_CLK_APB_SPI, "clk_apb_spi", "clk_mux_axi6",
+ BM1880_CLK_ENABLE1, 2, 0 },
+ { BM1880_CLK_UART_500M, "clk_uart_500m", "clk_div_uart_500m",
+ BM1880_CLK_ENABLE1, 4, 0 },
+ { BM1880_CLK_APB_UART, "clk_apb_uart", "clk_axi6",
+ BM1880_CLK_ENABLE1, 5, 0 },
+ { BM1880_CLK_APB_I2S, "clk_apb_i2s", "clk_axi6",
+ BM1880_CLK_ENABLE1, 6, 0 },
+ { BM1880_CLK_AXI4_USB, "clk_axi4_usb", "clk_axi4",
+ BM1880_CLK_ENABLE1, 7, 0 },
+ { BM1880_CLK_APB_USB, "clk_apb_usb", "clk_axi6",
+ BM1880_CLK_ENABLE1, 8, 0 },
+ { BM1880_CLK_12M_USB, "clk_12m_usb", "clk_div_12m_usb",
+ BM1880_CLK_ENABLE1, 11, 0 },
+ { BM1880_CLK_APB_VIDEO, "clk_apb_video", "clk_axi6",
+ BM1880_CLK_ENABLE1, 12, 0 },
+ { BM1880_CLK_APB_VPP, "clk_apb_vpp", "clk_axi6",
+ BM1880_CLK_ENABLE1, 15, 0 },
+ { BM1880_CLK_AXI6, "clk_axi6", "clk_mux_axi6",
+ BM1880_CLK_ENABLE1, 21, CLK_IS_CRITICAL },
+};
+
+static const char * const clk_a53_parents[] = { "clk_spll", "clk_mpll" };
+static const char * const clk_rv_parents[] = { "clk_div_1_rv", "clk_div_0_rv" };
+static const char * const clk_axi1_parents[] = { "clk_div_1_axi1", "clk_div_0_axi1" };
+static const char * const clk_axi6_parents[] = { "clk_div_1_axi6", "clk_div_0_axi6" };
+
+static const struct bm1880_mux_clock bm1880_mux_clks[] = {
+ { BM1880_CLK_MUX_RV, "clk_mux_rv", clk_rv_parents, 2,
+ BM1880_CLK_SELECT, 1, 0 },
+ { BM1880_CLK_MUX_AXI6, "clk_mux_axi6", clk_axi6_parents, 2,
+ BM1880_CLK_SELECT, 3, 0 },
+};
+
+static const struct clk_div_table bm1880_div_table_0[] = {
+ { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
+ { 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
+ { 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
+ { 12, 13 }, { 13, 14 }, { 14, 15 }, { 15, 16 },
+ { 16, 17 }, { 17, 18 }, { 18, 19 }, { 19, 20 },
+ { 20, 21 }, { 21, 22 }, { 22, 23 }, { 23, 24 },
+ { 24, 25 }, { 25, 26 }, { 26, 27 }, { 27, 28 },
+ { 28, 29 }, { 29, 30 }, { 30, 31 }, { 31, 32 },
+ { 0, 0 }
+};
+
+static const struct clk_div_table bm1880_div_table_1[] = {
+ { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
+ { 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
+ { 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
+ { 12, 13 }, { 13, 14 }, { 14, 15 }, { 15, 16 },
+ { 16, 17 }, { 17, 18 }, { 18, 19 }, { 19, 20 },
+ { 20, 21 }, { 21, 22 }, { 22, 23 }, { 23, 24 },
+ { 24, 25 }, { 25, 26 }, { 26, 27 }, { 27, 28 },
+ { 28, 29 }, { 29, 30 }, { 30, 31 }, { 31, 32 },
+ { 127, 128 }, { 0, 0 }
+};
+
+static const struct clk_div_table bm1880_div_table_2[] = {
+ { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
+ { 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
+ { 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
+ { 12, 13 }, { 13, 14 }, { 14, 15 }, { 15, 16 },
+ { 16, 17 }, { 17, 18 }, { 18, 19 }, { 19, 20 },
+ { 20, 21 }, { 21, 22 }, { 22, 23 }, { 23, 24 },
+ { 24, 25 }, { 25, 26 }, { 26, 27 }, { 27, 28 },
+ { 28, 29 }, { 29, 30 }, { 30, 31 }, { 31, 32 },
+ { 127, 128 }, { 255, 256 }, { 0, 0 }
+};
+
+static const struct clk_div_table bm1880_div_table_3[] = {
+ { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
+ { 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
+ { 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
+ { 12, 13 }, { 13, 14 }, { 14, 15 }, { 15, 16 },
+ { 16, 17 }, { 17, 18 }, { 18, 19 }, { 19, 20 },
+ { 20, 21 }, { 21, 22 }, { 22, 23 }, { 23, 24 },
+ { 24, 25 }, { 25, 26 }, { 26, 27 }, { 27, 28 },
+ { 28, 29 }, { 29, 30 }, { 30, 31 }, { 31, 32 },
+ { 127, 128 }, { 255, 256 }, { 511, 512 }, { 0, 0 }
+};
+
+static const struct clk_div_table bm1880_div_table_4[] = {
+ { 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
+ { 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
+ { 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
+ { 12, 13 }, { 13, 14 }, { 14, 15 }, { 15, 16 },
+ { 16, 17 }, { 17, 18 }, { 18, 19 }, { 19, 20 },
+ { 20, 21 }, { 21, 22 }, { 22, 23 }, { 23, 24 },
+ { 24, 25 }, { 25, 26 }, { 26, 27 }, { 27, 28 },
+ { 28, 29 }, { 29, 30 }, { 30, 31 }, { 31, 32 },
+ { 127, 128 }, { 255, 256 }, { 511, 512 }, { 65535, 65536 },
+ { 0, 0 }
+};
+
+/*
+ * Clocks marked as CRITICAL are needed for the proper functioning
+ * of the SoC.
+ */
+static struct bm1880_div_hw_clock bm1880_div_clks[] = {
+ CLK_DIV(BM1880_CLK_DIV_0_RV, "clk_div_0_rv", &bm1880_pll_clks[1].hw,
+ BM1880_CLK_DIV12, 16, 5, 1, bm1880_div_table_0, 0),
+ CLK_DIV(BM1880_CLK_DIV_1_RV, "clk_div_1_rv", &bm1880_pll_clks[2].hw,
+ BM1880_CLK_DIV13, 16, 5, 1, bm1880_div_table_0, 0),
+ CLK_DIV(BM1880_CLK_DIV_UART_500M, "clk_div_uart_500m", &bm1880_pll_clks[2].hw,
+ BM1880_CLK_DIV15, 16, 7, 3, bm1880_div_table_1, 0),
+ CLK_DIV(BM1880_CLK_DIV_0_AXI1, "clk_div_0_axi1", &bm1880_pll_clks[0].hw,
+ BM1880_CLK_DIV21, 16, 5, 2, bm1880_div_table_0,
+ CLK_IS_CRITICAL),
+ CLK_DIV(BM1880_CLK_DIV_1_AXI1, "clk_div_1_axi1", &bm1880_pll_clks[2].hw,
+ BM1880_CLK_DIV22, 16, 5, 3, bm1880_div_table_0,
+ CLK_IS_CRITICAL),
+ CLK_DIV(BM1880_CLK_DIV_0_AXI6, "clk_div_0_axi6", &bm1880_pll_clks[2].hw,
+ BM1880_CLK_DIV27, 16, 5, 15, bm1880_div_table_0,
+ CLK_IS_CRITICAL),
+ CLK_DIV(BM1880_CLK_DIV_1_AXI6, "clk_div_1_axi6", &bm1880_pll_clks[0].hw,
+ BM1880_CLK_DIV28, 16, 5, 11, bm1880_div_table_0,
+ CLK_IS_CRITICAL),
+ CLK_DIV(BM1880_CLK_DIV_12M_USB, "clk_div_12m_usb", &bm1880_pll_clks[2].hw,
+ BM1880_CLK_DIV18, 16, 7, 125, bm1880_div_table_1, 0),
+};
+
+/*
+ * Clocks marked as CRITICAL are all needed for the proper functioning
+ * of the SoC.
+ */
+static struct bm1880_composite_clock bm1880_composite_clks[] = {
+ GATE_MUX(BM1880_CLK_A53, "clk_a53", clk_a53_parents,
+ BM1880_CLK_ENABLE0, 0, BM1880_CLK_SELECT, 0,
+ CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_50M_A53, "clk_50m_a53", "clk_fpll",
+ BM1880_CLK_ENABLE0, 1, BM1880_CLK_DIV0, 16, 5, 30,
+ bm1880_div_table_0, CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_EFUSE, "clk_efuse", "clk_fpll",
+ BM1880_CLK_ENABLE0, 5, BM1880_CLK_DIV1, 16, 7, 60,
+ bm1880_div_table_1, 0),
+ GATE_DIV(BM1880_CLK_EMMC, "clk_emmc", "clk_fpll",
+ BM1880_CLK_ENABLE0, 8, BM1880_CLK_DIV2, 16, 5, 15,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_100K_EMMC, "clk_100k_emmc", "clk_div_12m_usb",
+ BM1880_CLK_ENABLE0, 9, BM1880_CLK_DIV3, 16, 8, 120,
+ bm1880_div_table_2, 0),
+ GATE_DIV(BM1880_CLK_SD, "clk_sd", "clk_fpll",
+ BM1880_CLK_ENABLE0, 11, BM1880_CLK_DIV4, 16, 5, 15,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_100K_SD, "clk_100k_sd", "clk_div_12m_usb",
+ BM1880_CLK_ENABLE0, 12, BM1880_CLK_DIV5, 16, 8, 120,
+ bm1880_div_table_2, 0),
+ GATE_DIV(BM1880_CLK_500M_ETH0, "clk_500m_eth0", "clk_fpll",
+ BM1880_CLK_ENABLE0, 13, BM1880_CLK_DIV6, 16, 5, 3,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_500M_ETH1, "clk_500m_eth1", "clk_fpll",
+ BM1880_CLK_ENABLE0, 15, BM1880_CLK_DIV7, 16, 5, 3,
+ bm1880_div_table_0, 0),
+ /* Don't gate GPIO clocks as it is not owned by the GPIO driver */
+ GATE_DIV(BM1880_CLK_GPIO_DB, "clk_gpio_db", "clk_div_12m_usb",
+ BM1880_CLK_ENABLE0, 20, BM1880_CLK_DIV8, 16, 16, 120,
+ bm1880_div_table_4, CLK_IGNORE_UNUSED),
+ GATE_DIV(BM1880_CLK_SDMA_AUD, "clk_sdma_aud", "clk_fpll",
+ BM1880_CLK_ENABLE0, 24, BM1880_CLK_DIV9, 16, 7, 61,
+ bm1880_div_table_1, 0),
+ GATE_DIV(BM1880_CLK_JPEG_AXI, "clk_jpeg_axi", "clk_fpll",
+ BM1880_CLK_ENABLE0, 28, BM1880_CLK_DIV10, 16, 5, 4,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_NF, "clk_nf", "clk_fpll",
+ BM1880_CLK_ENABLE0, 31, BM1880_CLK_DIV11, 16, 5, 30,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_TPU_AXI, "clk_tpu_axi", "clk_spll",
+ BM1880_CLK_ENABLE1, 3, BM1880_CLK_DIV14, 16, 5, 1,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_125M_USB, "clk_125m_usb", "clk_fpll",
+ BM1880_CLK_ENABLE1, 9, BM1880_CLK_DIV16, 16, 5, 12,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_33K_USB, "clk_33k_usb", "clk_div_12m_usb",
+ BM1880_CLK_ENABLE1, 10, BM1880_CLK_DIV17, 16, 9, 363,
+ bm1880_div_table_3, 0),
+ GATE_DIV(BM1880_CLK_VIDEO_AXI, "clk_video_axi", "clk_fpll",
+ BM1880_CLK_ENABLE1, 13, BM1880_CLK_DIV19, 16, 5, 4,
+ bm1880_div_table_0, 0),
+ GATE_DIV(BM1880_CLK_VPP_AXI, "clk_vpp_axi", "clk_fpll",
+ BM1880_CLK_ENABLE1, 14, BM1880_CLK_DIV20, 16, 5, 4,
+ bm1880_div_table_0, 0),
+ GATE_MUX(BM1880_CLK_AXI1, "clk_axi1", clk_axi1_parents,
+ BM1880_CLK_ENABLE1, 15, BM1880_CLK_SELECT, 2,
+ CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_AXI2, "clk_axi2", "clk_fpll",
+ BM1880_CLK_ENABLE1, 17, BM1880_CLK_DIV23, 16, 5, 3,
+ bm1880_div_table_0, CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_AXI3, "clk_axi3", "clk_mux_rv",
+ BM1880_CLK_ENABLE1, 18, BM1880_CLK_DIV24, 16, 5, 2,
+ bm1880_div_table_0, CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_AXI4, "clk_axi4", "clk_fpll",
+ BM1880_CLK_ENABLE1, 19, BM1880_CLK_DIV25, 16, 5, 6,
+ bm1880_div_table_0, CLK_IS_CRITICAL),
+ GATE_DIV(BM1880_CLK_AXI5, "clk_axi5", "clk_fpll",
+ BM1880_CLK_ENABLE1, 20, BM1880_CLK_DIV26, 16, 5, 15,
+ bm1880_div_table_0, CLK_IS_CRITICAL),
+};
+
+static unsigned long bm1880_pll_rate_calc(u32 regval, unsigned long parent_rate)
+{
+ u32 fbdiv, fref, refdiv;
+ u32 postdiv1, postdiv2;
+ unsigned long rate, numerator, denominator;
+
+ fbdiv = (regval >> 16) & 0xfff;
+ fref = parent_rate;
+ refdiv = regval & 0x1f;
+ postdiv1 = (regval >> 8) & 0x7;
+ postdiv2 = (regval >> 12) & 0x7;
+
+ numerator = parent_rate * fbdiv;
+ denominator = refdiv * postdiv1 * postdiv2;
+ do_div(numerator, denominator);
+ rate = numerator;
+
+ return rate;
+}
+
+static unsigned long bm1880_pll_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct bm1880_pll_hw_clock *pll_hw = to_bm1880_pll_clk(hw);
+ unsigned long rate;
+ u32 regval;
+
+ regval = readl(pll_hw->base + pll_hw->pll.reg);
+ rate = bm1880_pll_rate_calc(regval, parent_rate);
+
+ return rate;
+}
+
+static const struct clk_ops bm1880_pll_ops = {
+ .recalc_rate = bm1880_pll_recalc_rate,
+};
+
+static struct clk_hw *bm1880_clk_register_pll(struct bm1880_pll_hw_clock *pll_clk,
+ void __iomem *sys_base)
+{
+ struct clk_hw *hw;
+ int err;
+
+ pll_clk->base = sys_base;
+ hw = &pll_clk->hw;
+
+ err = clk_hw_register(NULL, hw);
+ if (err)
+ return ERR_PTR(err);
+
+ return hw;
+}
+
+static void bm1880_clk_unregister_pll(struct clk_hw *hw)
+{
+ struct bm1880_pll_hw_clock *pll_hw = to_bm1880_pll_clk(hw);
+
+ clk_hw_unregister(hw);
+ kfree(pll_hw);
+}
+
+static int bm1880_clk_register_plls(struct bm1880_pll_hw_clock *clks,
+ int num_clks, struct bm1880_clock_data *data)
+{
+ struct clk_hw *hw;
+ void __iomem *pll_base = data->pll_base;
+ int i;
+
+ for (i = 0; i < num_clks; i++) {
+ struct bm1880_pll_hw_clock *bm1880_clk = &clks[i];
+
+ hw = bm1880_clk_register_pll(bm1880_clk, pll_base);
+ if (IS_ERR(hw)) {
+ pr_err("%s: failed to register clock %s\n",
+ __func__, bm1880_clk->pll.name);
+ goto err_clk;
+ }
+
+ data->clk_data->hws[clks[i].pll.id] = hw;
+ }
+
+ return 0;
+
+err_clk:
+ while (i--)
+ bm1880_clk_unregister_pll(data->clk_data->hws[clks[i].pll.id]);
+
+ return PTR_ERR(hw);
+}
+
+static int bm1880_clk_register_mux(const struct bm1880_mux_clock *clks,
+ int num_clks, struct bm1880_clock_data *data)
+{
+ struct clk_hw *hw;
+ void __iomem *sys_base = data->sys_base;
+ int i;
+
+ for (i = 0; i < num_clks; i++) {
+ hw = clk_hw_register_mux(NULL, clks[i].name,
+ clks[i].parents,
+ clks[i].num_parents,
+ clks[i].flags,
+ sys_base + clks[i].reg,
+ clks[i].shift, 1, 0,
+ &bm1880_clk_lock);
+ if (IS_ERR(hw)) {
+ pr_err("%s: failed to register clock %s\n",
+ __func__, clks[i].name);
+ goto err_clk;
+ }
+
+ data->clk_data->hws[clks[i].id] = hw;
+ }
+
+ return 0;
+
+err_clk:
+ while (i--)
+ clk_hw_unregister_mux(data->clk_data->hws[clks[i].id]);
+
+ return PTR_ERR(hw);
+}
+
+static unsigned long bm1880_clk_div_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);
+ struct bm1880_div_clock *div = &div_hw->div;
+ void __iomem *reg_addr = div_hw->base + div->reg;
+ unsigned int val;
+ unsigned long rate;
+
+ if (!(readl(reg_addr) & BIT(3))) {
+ val = div->initval;
+ } else {
+ val = readl(reg_addr) >> div->shift;
+ val &= clk_div_mask(div->width);
+ }
+
+ rate = divider_recalc_rate(hw, parent_rate, val, div->table,
+ div->flags, div->width);
+
+ return rate;
+}
+
+static long bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);
+ struct bm1880_div_clock *div = &div_hw->div;
+ void __iomem *reg_addr = div_hw->base + div->reg;
+
+ if (div->flags & CLK_DIVIDER_READ_ONLY) {
+ u32 val;
+
+ val = readl(reg_addr) >> div->shift;
+ val &= clk_div_mask(div->width);
+
+ return divider_ro_round_rate(hw, rate, prate, div->table,
+ div->width, div->flags,
+ val);
+ }
+
+ return divider_round_rate(hw, rate, prate, div->table,
+ div->width, div->flags);
+}
+
+static int bm1880_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);
+ struct bm1880_div_clock *div = &div_hw->div;
+ void __iomem *reg_addr = div_hw->base + div->reg;
+ unsigned long flags = 0;
+ int value;
+ u32 val;
+
+ value = divider_get_val(rate, parent_rate, div->table,
+ div->width, div_hw->div.flags);
+ if (value < 0)
+ return value;
+
+ if (div_hw->lock)
+ spin_lock_irqsave(div_hw->lock, flags);
+ else
+ __acquire(div_hw->lock);
+
+ if (div->flags & CLK_DIVIDER_HIWORD_MASK) {
+ val = clk_div_mask(div->width) << (div_hw->div.shift + 16);
+ } else {
+ val = readl(reg_addr);
+ val &= ~(clk_div_mask(div->width) << div_hw->div.shift);
+ }
+ val |= (u32)value << div->shift;
+ writel(val, reg_addr);
+
+ if (div_hw->lock)
+ spin_unlock_irqrestore(div_hw->lock, flags);
+ else
+ __release(div_hw->lock);
+
+ return 0;
+}
+
+static const struct clk_ops bm1880_clk_div_ops = {
+ .recalc_rate = bm1880_clk_div_recalc_rate,
+ .round_rate = bm1880_clk_div_round_rate,
+ .set_rate = bm1880_clk_div_set_rate,
+};
+
+static struct clk_hw *bm1880_clk_register_div(struct bm1880_div_hw_clock *div_clk,
+ void __iomem *sys_base)
+{
+ struct clk_hw *hw;
+ int err;
+
+ div_clk->div.flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO;
+ div_clk->base = sys_base;
+ div_clk->lock = &bm1880_clk_lock;
+
+ hw = &div_clk->hw;
+ err = clk_hw_register(NULL, hw);
+ if (err)
+ return ERR_PTR(err);
+
+ return hw;
+}
+
+static void bm1880_clk_unregister_div(struct clk_hw *hw)
+{
+ struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);
+
+ clk_hw_unregister(hw);
+ kfree(div_hw);
+}
+
+static int bm1880_clk_register_divs(struct bm1880_div_hw_clock *clks,
+ int num_clks, struct bm1880_clock_data *data)
+{
+ struct clk_hw *hw;
+ void __iomem *sys_base = data->sys_base;
+ int i;
+
+ for (i = 0; i < num_clks; i++) {
+ struct bm1880_div_hw_clock *bm1880_clk = &clks[i];
+
+ hw = bm1880_clk_register_div(bm1880_clk, sys_base);
+ if (IS_ERR(hw)) {
+ pr_err("%s: failed to register clock %s\n",
+ __func__, bm1880_clk->div.name);
+ goto err_clk;
+ }
+
+ data->clk_data->hws[clks[i].div.id] = hw;
+ }
+
+ return 0;
+
+err_clk:
+ while (i--)
+ bm1880_clk_unregister_div(data->clk_data->hws[clks[i].div.id]);
+
+ return PTR_ERR(hw);
+}
+
+static int bm1880_clk_register_gate(const struct bm1880_gate_clock *clks,
+ int num_clks, struct bm1880_clock_data *data)
+{
+ struct clk_hw *hw;
+ void __iomem *sys_base = data->sys_base;
+ int i;
+
+ for (i = 0; i < num_clks; i++) {
+ hw = clk_hw_register_gate(NULL, clks[i].name,
+ clks[i].parent,
+ clks[i].flags,
+ sys_base + clks[i].gate_reg,
+ clks[i].gate_shift,
+ 0,
+ &bm1880_clk_lock);
+ if (IS_ERR(hw)) {
+ pr_err("%s: failed to register clock %s\n",
+ __func__, clks[i].name);
+ goto err_clk;
+ }
+
+ data->clk_data->hws[clks[i].id] = hw;
+ }
+
+ return 0;
+
+err_clk:
+ while (i--)
+ clk_hw_unregister_gate(data->clk_data->hws[clks[i].id]);
+
+ return PTR_ERR(hw);
+}
+
+static struct clk_hw *bm1880_clk_register_composite(struct bm1880_composite_clock *clks,
+ void __iomem *sys_base)
+{
+ struct clk_hw *hw;
+ struct clk_mux *mux = NULL;
+ struct clk_gate *gate = NULL;
+ struct bm1880_div_hw_clock *div_hws = NULL;
+ struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL;
+ const struct clk_ops *mux_ops = NULL, *gate_ops = NULL, *div_ops = NULL;
+ const char * const *parent_names;
+ const char *parent;
+ int num_parents;
+ int ret;
+
+ if (clks->mux_shift >= 0) {
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ return ERR_PTR(-ENOMEM);
+
+ mux->reg = sys_base + clks->mux_reg;
+ mux->mask = 1;
+ mux->shift = clks->mux_shift;
+ mux_hw = &mux->hw;
+ mux_ops = &clk_mux_ops;
+ mux->lock = &bm1880_clk_lock;
+
+ parent_names = clks->parents;
+ num_parents = clks->num_parents;
+ } else {
+ parent = clks->parent;
+ parent_names = &parent;
+ num_parents = 1;
+ }
+
+ if (clks->gate_shift >= 0) {
+ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+ if (!gate) {
+ ret = -ENOMEM;
+ goto err_out;
+ }
+
+ gate->reg = sys_base + clks->gate_reg;
+ gate->bit_idx = clks->gate_shift;
+ gate->lock = &bm1880_clk_lock;
+
+ gate_hw = &gate->hw;
+ gate_ops = &clk_gate_ops;
+ }
+
+ if (clks->div_shift >= 0) {
+ div_hws = kzalloc(sizeof(*div_hws), GFP_KERNEL);
+ if (!div_hws) {
+ ret = -ENOMEM;
+ goto err_out;
+ }
+
+ div_hws->base = sys_base;
+ div_hws->div.reg = clks->div_reg;
+ div_hws->div.shift = clks->div_shift;
+ div_hws->div.width = clks->div_width;
+ div_hws->div.table = clks->table;
+ div_hws->div.initval = clks->div_initval;
+ div_hws->lock = &bm1880_clk_lock;
+ div_hws->div.flags = CLK_DIVIDER_ONE_BASED |
+ CLK_DIVIDER_ALLOW_ZERO;
+
+ div_hw = &div_hws->hw;
+ div_ops = &bm1880_clk_div_ops;
+ }
+
+ hw = clk_hw_register_composite(NULL, clks->name, parent_names,
+ num_parents, mux_hw, mux_ops, div_hw,
+ div_ops, gate_hw, gate_ops,
+ clks->flags);
+
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_out;
+ }
+
+ return hw;
+
+err_out:
+ kfree(div_hws);
+ kfree(gate);
+ kfree(mux);
+
+ return ERR_PTR(ret);
+}
+
+static int bm1880_clk_register_composites(struct bm1880_composite_clock *clks,
+ int num_clks, struct bm1880_clock_data *data)
+{
+ struct clk_hw *hw;
+ void __iomem *sys_base = data->sys_base;
+ int i;
+
+ for (i = 0; i < num_clks; i++) {
+ struct bm1880_composite_clock *bm1880_clk = &clks[i];
+
+ hw = bm1880_clk_register_composite(bm1880_clk, sys_base);
+ if (IS_ERR(hw)) {
+ pr_err("%s: failed to register clock %s\n",
+ __func__, bm1880_clk->name);
+ goto err_clk;
+ }
+
+ data->clk_data->hws[clks[i].id] = hw;
+ }
+
+ return 0;
+
+err_clk:
+ while (i--)
+ clk_hw_unregister_composite(data->clk_data->hws[clks[i].id]);
+
+ return PTR_ERR(hw);
+}
+
+static int bm1880_clk_probe(struct platform_device *pdev)
+{
+ struct bm1880_clock_data *clk_data;
+ void __iomem *pll_base, *sys_base;
+ struct device_node *np = pdev->dev.of_node;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ struct clk_hw_onecell_data *clk_hw_data;
+ int num_clks, i;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pll_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pll_base))
+ return PTR_ERR(pll_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ sys_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(sys_base))
+ return PTR_ERR(sys_base);
+
+ clk_data = devm_kzalloc(dev, sizeof(*clk_data), GFP_KERNEL);
+ if (!clk_data)
+ return -ENOMEM;
+
+ clk_data->pll_base = pll_base;
+ clk_data->sys_base = sys_base;
+
+ num_clks = ARRAY_SIZE(bm1880_pll_clks) +
+ ARRAY_SIZE(bm1880_div_clks) +
+ ARRAY_SIZE(bm1880_mux_clks) +
+ ARRAY_SIZE(bm1880_composite_clks) +
+ ARRAY_SIZE(bm1880_gate_clks);
+
+ clk_hw_data = devm_kzalloc(&pdev->dev, struct_size(clk_hw_data, hws,
+ num_clks), GFP_KERNEL);
+ if (!clk_hw_data)
+ return -ENOMEM;
+
+ clk_data->clk_data = clk_hw_data;
+
+ for (i = 0; i < num_clks; i++)
+ clk_data->clk_data->hws[i] = ERR_PTR(-ENOENT);
+
+ clk_data->clk_data->num = num_clks;
+
+ bm1880_clk_register_plls(bm1880_pll_clks,
+ ARRAY_SIZE(bm1880_pll_clks),
+ clk_data);
+
+ bm1880_clk_register_divs(bm1880_div_clks,
+ ARRAY_SIZE(bm1880_div_clks),
+ clk_data);
+
+ bm1880_clk_register_mux(bm1880_mux_clks,
+ ARRAY_SIZE(bm1880_mux_clks),
+ clk_data);
+
+ bm1880_clk_register_composites(bm1880_composite_clks,
+ ARRAY_SIZE(bm1880_composite_clks),
+ clk_data);
+
+ bm1880_clk_register_gate(bm1880_gate_clks,
+ ARRAY_SIZE(bm1880_gate_clks),
+ clk_data);
+
+ return of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
+ clk_data->clk_data);
+}
+
+static const struct of_device_id bm1880_of_match[] = {
+ { .compatible = "bitmain,bm1880-clk", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, bm1880_of_match);
+
+static struct platform_driver bm1880_clk_driver = {
+ .driver = {
+ .name = "bm1880-clk",
+ .of_match_table = bm1880_of_match,
+ },
+ .probe = bm1880_clk_probe,
+};
+module_platform_driver(bm1880_clk_driver);
+
+MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
+MODULE_DESCRIPTION("Clock driver for Bitmain BM1880 SoC");
+MODULE_LICENSE("GPL v2");
--
2.17.1
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* [PATCH v5 8/8] MAINTAINERS: Add entry for BM1880 SoC clock driver
From: Manivannan Sadhasivam @ 2019-09-16 16:14 UTC (permalink / raw)
To: sboyd, mturquette, robh+dt
Cc: devicetree, Manivannan Sadhasivam, darren.tsao, linux-kernel,
linux-arm-kernel, fisher.cheng, alec.lin, linux-clk, haitao.suo
In-Reply-To: <20190916161447.32715-1-manivannan.sadhasivam@linaro.org>
Add MAINTAINERS entry for Bitmain BM1880 SoC clock driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 997a4f8fe88e..280defec35b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1503,8 +1503,10 @@ M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: arch/arm64/boot/dts/bitmain/
+F: drivers/clk/clk-bm1880.c
F: drivers/pinctrl/pinctrl-bm1880.c
F: Documentation/devicetree/bindings/arm/bitmain.yaml
+F: Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml
F: Documentation/devicetree/bindings/pinctrl/bitmain,bm1880-pinctrl.txt
ARM/CALXEDA HIGHBANK ARCHITECTURE
--
2.17.1
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* Re: [PATCH v3 5/8] cpufreq: ti-cpufreq: omap36xx use "cpu0", "vbb" if run in multi_regulator mode
From: Tony Lindgren @ 2019-09-16 16:24 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Mark Rutland, devicetree, letux-kernel, linux-pm,
Enric Balletbo i Serra, Viresh Kumar, Rafael J. Wysocki,
linux-kernel, Rob Herring, André Roth, Benoît Cousson,
kernel, Teresa Remmet, Javier Martinez Canillas, linux-omap,
Adam Ford, linux-arm-kernel, Roger Quadros
In-Reply-To: <1c803be8060fb99b7d92e2f5cde3c0e1962fbe2b.1568224033.git.hns@goldelico.com>
* H. Nikolaus Schaller <hns@goldelico.com> [190911 17:48]:
> In preparation for using the multi_regulator capability of
> this driver for handling the ABB LDO for OPP1G of the omap36xx
> we have to take care that the (legacy) vdd-supply name is
> cpu0-supply = <&vcc>;
>
> To do this we add another field to the SoC description table which
> optionally can specify a list of regulator names.
>
> For omap36xx we define "cpu0-supply" and "vbb-supply".
>
> The default remains "vdd-supply" and "vbb-supply".
Acked-by: Tony Lindgren <tony@atomide.com>
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* Re: [PATCH v3 6/8] ARM: dts: omap36xx: using OPP1G needs to control the abb_ldo
From: Tony Lindgren @ 2019-09-16 16:25 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Mark Rutland, devicetree, letux-kernel, linux-pm,
Enric Balletbo i Serra, Viresh Kumar, Rafael J. Wysocki,
linux-kernel, Rob Herring, André Roth, Benoît Cousson,
kernel, Teresa Remmet, Javier Martinez Canillas, linux-omap,
Adam Ford, linux-arm-kernel, Roger Quadros
In-Reply-To: <59a0f6267c75859c25665548db2e8a9c4229d3b4.1568224033.git.hns@goldelico.com>
* H. Nikolaus Schaller <hns@goldelico.com> [190911 17:48]:
> See DM3730,DM275 data sheet (SPRS685B) footnote (6) in Table 4-19
> which says that ABB must be switched to FBB mode when using the
> OPP1G.
>
> The LOD definition abb_mpu_iva already exists so that we need
> to add plumbing for vbb-supply = <&abb_mpu_iva>
> and define two voltage vectors for each OPP so that the abb LDO
> is also updated by the ti-cpufreq driver.
>
> We also must switch the ti_cpufreq_soc_data to multi_regulator.
>
> Note: reading out the abb reglator voltage to verify that
> it does do transitions can be done by
>
> cat /sys/devices/platform/68000000.ocp/483072f0.regulator-abb-mpu/regulator/regulator.*/microvolts
>
> Likewise, read the twl4030 provided VDD voltage by
>
> cat /sys/devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:regulator-vdd1/regulator/regulator.*/microvolts
>
> Note: to check if the ABB FBB is enabled/disabled, check
> registers
>
> PRM_LDO_ABB_CTRL 0x483072F4 bit 3:0 1=bypass 5=FBB
> PRM_LDO_ABB_SETUP 0x483072F0 0x00=bypass 0x11=FBB
>
> e.g.
>
> /dev/mem opened.
> Memory mapped at address 0xb6fe4000.
> Value at address 0x483072F4 (0xb6fe42f4): 0x3205
> /dev/mem opened.
> Memory mapped at address 0xb6f89000.
> Value at address 0x483072F4 (0xb6f892f4): 0x3201
>
> Note: omap34xx and am3517 have/need no comparable LDO
> or mechanism.
Acked-by: Tony Lindgren <tony@atomide.com>
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* Re: [PATCH v3 7/8] cpufreq: ti-cpufreq: Add support for AM3517
From: Tony Lindgren @ 2019-09-16 16:26 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Mark Rutland, devicetree, letux-kernel, linux-pm,
Enric Balletbo i Serra, Viresh Kumar, Rafael J. Wysocki,
linux-kernel, Rob Herring, André Roth, Benoît Cousson,
kernel, Teresa Remmet, Javier Martinez Canillas, linux-omap,
Adam Ford, linux-arm-kernel, Roger Quadros
In-Reply-To: <beda9274922c0fdc293a974a707426fac7c77921.1568224033.git.hns@goldelico.com>
* H. Nikolaus Schaller <hns@goldelico.com> [190911 17:48]:
> From: Adam Ford <aford173@gmail.com>
>
> The AM3517 only lists 600MHz @ 1.2V, but the register values for
> 0x4830A204 = 1b86 802f, it seems like am3517 might be a derivative
> of the omap36 which OPPs would be OPP50 (300 MHz) and OPP100
> (600 MHz).
>
> This patch simply adds the am3517 to the compatible table
> similar to a mix of the omap3430 and omap3430 structure.
Acked-by: Tony Lindgren <tony@atomide.com>
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* Re: [PATCH v3 8/8] ARM: dts: Add OPP-V2 table for AM3517
From: Tony Lindgren @ 2019-09-16 16:26 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Mark Rutland, devicetree, letux-kernel, linux-pm,
Enric Balletbo i Serra, Viresh Kumar, Rafael J. Wysocki,
linux-kernel, Rob Herring, André Roth, Benoît Cousson,
kernel, Teresa Remmet, Javier Martinez Canillas, linux-omap,
Adam Ford, linux-arm-kernel, Roger Quadros
In-Reply-To: <6089486dcf1f327aa53348f5434cd57cc964c30f.1568224033.git.hns@goldelico.com>
* H. Nikolaus Schaller <hns@goldelico.com> [190911 17:48]:
> From: Adam Ford <aford173@gmail.com>
>
> The AM3517 only lists 600MHz @ 1.2V, but the register values for
> 0x4830A204 = 1b86 802f, it seems like am3517 might be a derivative
> of the omap36 which OPPs would be OPP50 (300 MHz) and OPP100
> (600 MHz).
>
> This patch sets up the OPP50 and OPP100 tables at 300MHz and 600MHz
> for the AM3517 with each having an operating voltage at 1.2V.
Acked-by: Tony Lindgren <tony@atomide.com>
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* [GIT PULL 0/5] ARM SoC updates for v5.4, part 1
From: Arnd Bergmann @ 2019-09-16 16:27 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
This is the first set of ARM SoC updates, split into the usual soc,
driver, defconfig and dt branches. There is also a "late" branch
again that I plan to send after more of the dependencies are
merged.
In total, we have 743 non-merge changeset, most of which
came through 83 pull requests into our tree. This is again a
smaller release for us, but not exceptionally small. 476 of the
commits are for device tree changes.
As multiple of the older platforms are removed, the a lot of code
gets removed, but not as much as we add. The overall dirstat
(including the late branch) is:
1.3% Documentation/devicetree/bindings/
17.7% arch/arm/boot/dts/
1.1% arch/arm/configs/
0.6% arch/arm/mach-davinci/
3.3% arch/arm/mach-iop13xx/include/mach/
4.4% arch/arm/mach-iop13xx/
1.1% arch/arm/mach-iop33x/
1.2% arch/arm/mach-ks8695/include/mach/
3.5% arch/arm/mach-ks8695/
1.2% arch/arm/mach-omap2/
1.2% arch/arm/mach-w90x900/include/mach/
3.3% arch/arm/mach-w90x900/
2.6% arch/arm/
0.5% arch/arm64/boot/dts/allwinner/
9.7% arch/arm64/boot/dts/amlogic/
5.6% arch/arm64/boot/dts/freescale/
1.1% arch/arm64/boot/dts/marvell/
5.6% arch/arm64/boot/dts/qcom/
0.8% arch/arm64/boot/dts/renesas/
0.9% arch/arm64/boot/dts/rockchip/
0.6% arch/arm64/boot/dts/ti/
0.5% arch/arm64/boot/dts/
1.5% drivers/bus/
2.4% drivers/clk/imx/
7.9% drivers/clk/meson/
1.7% drivers/clk/
1.5% drivers/firmware/arm_scmi/
1.1% drivers/firmware/
0.6% drivers/gpio/
3.0% drivers/net/ethernet/micrel/
1.7% drivers/net/ethernet/nuvoton/
1.2% drivers/soc/amlogic/
0.5% drivers/soc/fsl/qbman/
1.0% drivers/soc/qcom/
0.7% drivers/soc/
0.5% drivers/spi/
1.5% drivers/video/fbdev/
0.8% drivers/
0.6% include/dt-bindings/clock/
0.6% include/dt-bindings/reset/
0.8% include/linux/
841 files changed, 37919 insertions(+), 26043 deletions(-)
Contributors with the most non-merge commits this time are:
49 Neil Armstrong
31 Anson Huang
28 Arnd Bergmann
26 Yoshihiro Kaneko
23 Sudeep Holla
19 Vinod Koul
19 Tony Lindgren
17 Maxime Ripard
17 Bartosz Golaszewski
15 Linus Walleij
14 Joel Stanley
13 Alexandre Mergnat
12 Marek Behún
12 Lokesh Vutla
12 Geert Uytterhoeven
12 Christian Hewitt
11 Uwe Kleine-König
11 Fabrizio Castro
10 Stefan Riedmueller
9 Matthias Kaehlcke
Arnd
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* Re: [PATCH v3 0/8] OMAP3: convert opp-v1 to opp-v2 and read speed binned / 720MHz grade bits
From: Tony Lindgren @ 2019-09-16 16:28 UTC (permalink / raw)
To: H. Nikolaus Schaller
Cc: Mark Rutland, devicetree, letux-kernel, linux-pm,
Enric Balletbo i Serra, Viresh Kumar, Rafael J. Wysocki,
linux-kernel, Rob Herring, André Roth, Benoît Cousson,
kernel, Teresa Remmet, Javier Martinez Canillas, linux-omap,
Adam Ford, linux-arm-kernel, Roger Quadros
In-Reply-To: <cover.1568224032.git.hns@goldelico.com>
* H. Nikolaus Schaller <hns@goldelico.com> [190911 17:48]:
> CHANGES V3:
> * make omap36xx control the abb-ldo and properly switch mode
> (suggested by Adam Ford <aford173@gmail.com>)
> * add a note about enabling the turbo-mode OPPs
Looks good to me, when applying, please provide a
minimal immutable branch maybe against v5.3 or v5.4-rc1,
that I can also merge in if needed for the dts changes.
Thanks,
Tony
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* Re: [PATCH 0/6] ARM, arm64: Remove arm_pm_restart()
From: Arnd Bergmann @ 2019-09-16 16:29 UTC (permalink / raw)
To: Thierry Reding; +Cc: Linux ARM, linux-kernel@vger.kernel.org, Guenter Roeck
In-Reply-To: <20190916155031.GE7488@ulmo>
On Mon, Sep 16, 2019 at 5:50 PM Thierry Reding <thierry.reding@gmail.com> wrote:
> On Mon, Sep 16, 2019 at 08:43:36AM -0700, Guenter Roeck wrote:
> > On Mon, Sep 16, 2019 at 03:49:20PM +0200, Thierry Reding wrote:
> > > On Mon, Sep 16, 2019 at 06:17:01AM -0700, Guenter Roeck wrote:
> > > > On 9/16/19 12:49 AM, Arnd Bergmann wrote:
> > > > > On Sat, Sep 14, 2019 at 5:26 PM Guenter Roeck <linux@roeck-us.net> wrote:
> > > > > > On Mon, Jan 30, 2017 at 12:05:06PM +0100, Thierry Reding wrote:
> > > > > > > From: Thierry Reding <treding@nvidia.com>
> > > > > > >
> > > > > > > Hi everyone,
> > > > > > >
> > > > > > > This small series is preparatory work for a series that I'm working on
> > > > > > > which attempts to establish a formal framework for system restart and
> > > > > > > power off.
> > > > > > >
> > > > > > > Guenter has done a lot of good work in this area, but it never got
> > > > > > > merged. I think this set is a valuable addition to the kernel because
> > > > > > > it converts all odd providers to the established mechanism for restart.
> > > > > > >
> > > > > > > Since this is stretched across both 32-bit and 64-bit ARM, as well as
> > > > > > > PSCI, and given the SoC/board level of functionality, I think it might
> > > > > > > make sense to take this through the ARM SoC tree in order to simplify
> > > > > > > the interdependencies. But it should also be possible to take patches
> > > > > > > 1-4 via their respective trees this cycle and patches 5-6 through the
> > > > > > > ARM and arm64 trees for the next cycle, if that's preferred.
> > > > > > >
> > > > > >
> > > > > > We tried this twice now, and it seems to go nowhere. What does it take
> > > > > > to get it applied ?
> > > > >
> > > > > Can you send a pull request to soc@kernel.org after the merge window,
> > > > > with everyone else on Cc? If nobody objects, I'll merge it through
> > > > > the soc tree.
> > > > >
> > > >
> > > > Sure, I'll rebase and do that.
> > >
> > > I've uploaded a rebased tree here:
> > >
> > > https://github.com/thierryreding/linux/tree/for-5.5/system-power-reset
> > >
> > > The first 6 patches in that tree correspond to this series. There were a
> > > couple of conflicts I had to resolve and I haven't fully tested the
> > > series yet, but if you haven't done any of the rebasing, the above may
> > > be useful to you.
> > >
> >
> > Maybe Arnd can just use your branch (or rather part of it if you would
> > split it off) since you already did the work ?
The branch needs to be rebased once more as it is currently
based on linux-next.
> Yeah, I can just send the pull request for the 6 patches after -rc1.
Ok, sounds good. I'm also happy to take the remaining patches
in that branch, for the other architectures.
Arnd
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* [GIT PULL 1/5] ARM: SoC platform updates for v5.4
From: Arnd Bergmann @ 2019-09-16 16:32 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a3ArYx8LUbYhjTw2wOEZgK9mJOE_PaLzuZTfn29Z5+K3Q@mail.gmail.com>
The following changes since commit d45331b00ddb179e291766617259261c112db872:
Linux 5.3-rc4 (2019-08-11 13:26:41 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/armsoc-soc
for you to fetch changes up to 0366977480c43a221e4309f242d1144e85a368c3:
ARM: multi_v5_defconfig: make DaVinci part of the ARM v5
multiplatform build (2019-09-09 21:36:56 +0200)
----------------------------------------------------------------
ARM: SoC platform updates for v5.4
The main change this time around is a cleanup of some of the oldest
platforms based on the XScale and ARM9 CPU cores, which are between 10
and 20 years old.
The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
IOP33x/IOP13xx platforms are removed after we determined that nobody is
using them any more.
The TI Davinci and NXP LPC32xx platforms on the other hand are still in
active use and are converted to the ARCH_MULTIPLATFORM build, meaning
that we can compile a kernel that works on these along with most other
ARMv5 platforms. Changes toward that goal are also merged for IOP32x,
but additional work is needed to complete this. Patches for the
remaining ARMv5 platforms have started but need more work and some
testing.
Support for the new ASpeed AST2600 gets added, this is based on the
Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
ARMv6 chips in the same family.
Other changes include a cleanup of the ST-Ericsson ux500 platform
and the move of the TI Davinci platform to a new clocksource driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----------------------------------------------------------------
André Draszik (1):
ARM: imx: stop adjusting ar8031 phy tx delay
Anson Huang (1):
arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms
Arnd Bergmann (34):
ARM: remove ks8695 platform
ARM: remove w90x900 platform
ARM: remove Intel iop33x and iop13xx support
dmaengine: iop-adma: include prefetch.h
dmaengine: iop-adma: use correct printk format strings
dma: iop-adma: allow building without platform headers
ARM: xscale: fix multi-cpu compilation
ARM: iop32x: make mach/uncompress.h independent of mach/hardware.h
ARM: iop32x: merge everything into mach-iop32x/
Merge tag 'ux500-v5.4-1' of
git://git.kernel.org/.../linusw/linux-stericsson into arm/soc
ARM: dove: clean up mach/*.h headers
ARM: orion/mvebu: unify debug-ll virtual addresses
usb: ohci-nxp: enable compile-testing
usb: udc: lpc32xx: allow compile-testing
watchdog: pnx4008_wdt: allow compile-testing
serial: lpc32xx_hs: allow compile-testing
gpio: lpc32xx: allow building on non-lpc32xx targets
net: lpc-enet: factor out iram access
net: lpc-enet: move phy setup into platform code
net: lpc-enet: fix printk format strings
net: lpc-enet: allow compile testing
serial: lpc32xx: allow compile testing
ARM: lpc32xx: clean up header files
ARM: lpc32xx: allow multiplatform build
Merge branch 'lpc32xx/multiplatform' into arm/soc
Merge tag 'vexpress-update-5.4' of
git://git.kernel.org/.../sudeep.holla/linux into arm/soc
Merge tag 'aspeed-5.4-arch' of
git://git.kernel.org/.../joel/aspeed into arm/soc
Merge tag 'imx-soc-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/soc
Merge tag 'at91-5.4-soc' of git://git.kernel.org/.../at91/linux
into arm/soc
Merge tag 'omap-for-v5.4/soc-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/soc
Merge tag 'zynq-soc-for-v5.4' of
https://github.com/Xilinx/linux-xlnx into arm/soc
Merge tag 'renesas-arm-soc-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/soc
Merge tag 'davinci-for-v5.4/soc' of
git://git.kernel.org/.../nsekhar/linux-davinci into arm/soc
Merge tag 'samsung-soc-5.4-2' of
git://git.kernel.org/.../krzk/linux into arm/soc
Bartosz Golaszewski (10):
ARM: davinci: enable the clocksource driver for DT mode
ARM: davinci: WARN_ON() if clk_get() fails
ARM: davinci: da850: switch to using the clocksource driver
ARM: davinci: da830: switch to using the clocksource driver
ARM: davinci: move timer definitions to davinci.h
ARM: davinci: dm355: switch to using the clocksource driver
ARM: davinci: dm644x: switch to using the clocksource driver
ARM: davinci: dm646x: switch to using the clocksource driver
ARM: davinci: support multiplatform build for ARM v5
ARM: multi_v5_defconfig: make DaVinci part of the ARM v5
multiplatform build
Christophe JAILLET (1):
ARM: davinci: dm646x: Fix a typo in the comment
Geert Uytterhoeven (1):
ARM: debug-ll: Add support for r7s9210
Joel Stanley (4):
dt-bindings: arm: cpus: Add ASPEED SMP
ARM: aspeed: Select timer in each SoC
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Enable SMP boot
Krzysztof Kozlowski (1):
MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem
and clock drivers
Linus Walleij (4):
ARM: ux500: Stop populating the PRCMU devices early
ARM: ux500: simplify and move debug UART
ARM: mach-nspire: Kill off CLCD auxdata
ARM: samsung: Include GPIO driver header
Luis Araneda (2):
ARM: zynq: Support smp in thumb mode
ARM: zynq: Use memcpy_toio instead of memcpy on smp bring-up
Markus Elfring (1):
ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init()
Masahiro Yamada (3):
ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c
ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91
ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2
Nicholas Mc Guire (2):
ARM: ux500: add missing of_node_put()
MAINTAINERS: add soc/ux500
Nicolas Ferre (3):
MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry
MAINTAINERS: at91: remove the TC entry
mailmap: map old company name to new one @microchip.com
Pankaj Dubey (2):
ARM: exynos: Enable exynos-chipid driver
arm64: exynos: Enable exynos-chipid driver
Phong Tran (1):
ARM: vexpress: Cleanup cppcheck shifting warning
kbuild test robot (1):
net: lpc-enet: fix badzero.cocci warnings
.mailmap | 1 +
Documentation/devicetree/bindings/arm/cpus.yaml | 1 +
MAINTAINERS | 55 +-
arch/arm/Kconfig | 98 +-
arch/arm/Kconfig.debug | 41 +-
arch/arm/Makefile | 6 +-
arch/arm/configs/acs5k_defconfig | 77 --
arch/arm/configs/acs5k_tiny_defconfig | 69 --
arch/arm/configs/davinci_all_defconfig | 5 +
arch/arm/configs/iop13xx_defconfig | 118 ---
arch/arm/configs/iop33x_defconfig | 85 --
arch/arm/configs/ks8695_defconfig | 67 --
arch/arm/configs/lpc32xx_defconfig | 2 +
arch/arm/configs/multi_v5_defconfig | 12 +
arch/arm/configs/nuc910_defconfig | 51 -
arch/arm/configs/nuc950_defconfig | 67 --
arch/arm/configs/nuc960_defconfig | 57 -
arch/arm/include/debug/ks8695.S | 37 -
arch/arm/include/debug/renesas-scif.S | 6 +-
arch/arm/include/debug/ux500.S | 9 +-
arch/arm/mach-aspeed/Kconfig | 17 +-
arch/arm/mach-aspeed/Makefile | 5 +
arch/arm/mach-aspeed/platsmp.c | 61 ++
arch/arm/mach-at91/.gitignore | 1 +
arch/arm/mach-at91/Makefile | 5 +-
arch/arm/mach-at91/pm_suspend.S | 2 +-
arch/arm/mach-davinci/Kconfig | 17 +-
arch/arm/mach-davinci/Makefile | 2 +
arch/arm/mach-davinci/da830.c | 45 +-
arch/arm/mach-davinci/da850.c | 50 +-
arch/arm/mach-davinci/davinci.h | 3 +
arch/arm/mach-davinci/dm355.c | 28 +-
arch/arm/mach-davinci/dm365.c | 4 +
arch/arm/mach-davinci/dm644x.c | 28 +-
arch/arm/mach-davinci/dm646x.c | 30 +-
arch/arm/mach-davinci/include/mach/time.h | 2 -
arch/arm/mach-davinci/time.c | 14 -
.../arm/mach-dove/{include/mach => }/bridge-regs.h | 4 +-
arch/arm/mach-dove/cm-a510.c | 3 +-
arch/arm/mach-dove/common.c | 4 +-
arch/arm/mach-dove/dove-db-setup.c | 2 +-
arch/arm/mach-dove/{include/mach => }/dove.h | 14 +-
arch/arm/mach-dove/include/mach/hardware.h | 19 -
arch/arm/mach-dove/include/mach/uncompress.h | 8 +-
arch/arm/mach-dove/irq.c | 5 +-
arch/arm/mach-dove/{include/mach => }/irqs.h | 2 -
arch/arm/mach-dove/mpp.c | 2 +-
arch/arm/mach-dove/pcie.c | 4 +-
arch/arm/mach-dove/{include/mach => }/pm.h | 4 +-
arch/arm/mach-exynos/Kconfig | 1 +
arch/arm/mach-imx/mach-imx7d.c | 6 -
arch/arm/mach-iop13xx/Kconfig | 21 -
arch/arm/mach-iop13xx/Makefile | 9 -
arch/arm/mach-iop13xx/Makefile.boot | 4 -
arch/arm/mach-iop13xx/include/mach/adma.h | 608 -----------
arch/arm/mach-iop13xx/include/mach/entry-macro.S | 29 -
arch/arm/mach-iop13xx/include/mach/hardware.h | 22 -
arch/arm/mach-iop13xx/include/mach/iop13xx.h | 508 ---------
arch/arm/mach-iop13xx/include/mach/iq81340.h | 29 -
arch/arm/mach-iop13xx/include/mach/irqs.h | 195 ----
arch/arm/mach-iop13xx/include/mach/memory.h | 68 --
arch/arm/mach-iop13xx/include/mach/time.h | 127 ---
arch/arm/mach-iop13xx/include/mach/uncompress.h | 23 -
arch/arm/mach-iop13xx/io.c | 77 --
arch/arm/mach-iop13xx/iq81340mc.c | 84 --
arch/arm/mach-iop13xx/iq81340sc.c | 86 --
arch/arm/mach-iop13xx/irq.c | 227 ----
arch/arm/mach-iop13xx/msi.c | 152 ---
arch/arm/mach-iop13xx/msi.h | 12 -
arch/arm/mach-iop13xx/pci.c | 1115 --------------------
arch/arm/mach-iop13xx/pci.h | 66 --
arch/arm/mach-iop13xx/setup.c | 595 -----------
arch/arm/mach-iop13xx/tpmi.c | 244 -----
arch/arm/mach-iop32x/Makefile | 10 +-
arch/arm/{plat-iop => mach-iop32x}/adma.c | 39 +-
arch/arm/{plat-iop => mach-iop32x}/cp6.c | 0
arch/arm/mach-iop32x/em7210.c | 5 +-
arch/arm/mach-iop32x/glantank.c | 5 +-
arch/arm/mach-iop32x/{include/mach => }/glantank.h | 2 -
arch/arm/mach-iop32x/{include/mach => }/hardware.h | 6 +-
arch/arm/{plat-iop => mach-iop32x}/i2c.c | 21 +-
arch/arm/mach-iop32x/include/mach/adma.h | 6 -
arch/arm/mach-iop32x/include/mach/entry-macro.S | 2 -
arch/arm/mach-iop32x/include/mach/iop32x.h | 31 -
arch/arm/mach-iop32x/include/mach/irqs.h | 33 -
arch/arm/mach-iop32x/include/mach/time.h | 5 -
arch/arm/mach-iop32x/include/mach/uncompress.h | 18 +-
.../{include/asm/hardware => mach-iop32x}/iop3xx.h | 18 +-
arch/arm/mach-iop32x/iq31244.c | 5 +-
arch/arm/mach-iop32x/{include/mach => }/iq31244.h | 2 -
arch/arm/mach-iop32x/iq80321.c | 5 +-
arch/arm/mach-iop32x/{include/mach => }/iq80321.h | 2 -
arch/arm/mach-iop32x/irq.c | 3 +-
arch/arm/mach-iop32x/irqs.h | 42 +
arch/arm/mach-iop32x/n2100.c | 5 +-
arch/arm/mach-iop32x/{include/mach => }/n2100.h | 2 -
arch/arm/{plat-iop => mach-iop32x}/pci.c | 4 +-
arch/arm/{plat-iop => mach-iop32x}/pmu.c | 8 +-
arch/arm/{plat-iop => mach-iop32x}/restart.c | 4 +-
arch/arm/{plat-iop => mach-iop32x}/setup.c | 2 +-
arch/arm/{plat-iop => mach-iop32x}/time.c | 7 +-
arch/arm/mach-iop33x/Kconfig | 22 -
arch/arm/mach-iop33x/Makefile | 9 -
arch/arm/mach-iop33x/Makefile.boot | 4 -
arch/arm/mach-iop33x/include/mach/adma.h | 6 -
arch/arm/mach-iop33x/include/mach/entry-macro.S | 34 -
arch/arm/mach-iop33x/include/mach/hardware.h | 44 -
arch/arm/mach-iop33x/include/mach/iop33x.h | 37 -
arch/arm/mach-iop33x/include/mach/iq80331.h | 17 -
arch/arm/mach-iop33x/include/mach/iq80332.h | 17 -
arch/arm/mach-iop33x/include/mach/irqs.h | 57 -
arch/arm/mach-iop33x/include/mach/time.h | 5 -
arch/arm/mach-iop33x/include/mach/uncompress.h | 37 -
arch/arm/mach-iop33x/iq80331.c | 148 ---
arch/arm/mach-iop33x/iq80332.c | 148 ---
arch/arm/mach-iop33x/irq.c | 115 --
arch/arm/mach-iop33x/uart.c | 100 --
arch/arm/mach-ks8695/Kconfig | 88 --
arch/arm/mach-ks8695/Makefile | 23 -
arch/arm/mach-ks8695/Makefile.boot | 9 -
arch/arm/mach-ks8695/board-acs5k.c | 238 -----
arch/arm/mach-ks8695/board-dsm320.c | 127 ---
arch/arm/mach-ks8695/board-micrel.c | 59 --
arch/arm/mach-ks8695/board-og.c | 197 ----
arch/arm/mach-ks8695/board-sg.c | 118 ---
arch/arm/mach-ks8695/cpu.c | 60 --
arch/arm/mach-ks8695/devices.c | 197 ----
arch/arm/mach-ks8695/devices.h | 29 -
arch/arm/mach-ks8695/generic.h | 12 -
arch/arm/mach-ks8695/include/mach/entry-macro.S | 47 -
arch/arm/mach-ks8695/include/mach/gpio-ks8695.h | 36 -
arch/arm/mach-ks8695/include/mach/hardware.h | 42 -
arch/arm/mach-ks8695/include/mach/irqs.h | 51 -
arch/arm/mach-ks8695/include/mach/memory.h | 51 -
arch/arm/mach-ks8695/include/mach/regs-gpio.h | 55 -
arch/arm/mach-ks8695/include/mach/regs-irq.h | 41 -
arch/arm/mach-ks8695/include/mach/regs-misc.h | 97 --
arch/arm/mach-ks8695/include/mach/regs-switch.h | 66 --
arch/arm/mach-ks8695/include/mach/regs-uart.h | 89 --
arch/arm/mach-ks8695/include/mach/uncompress.h | 33 -
arch/arm/mach-ks8695/irq.c | 164 ---
arch/arm/mach-ks8695/pci.c | 247 -----
arch/arm/mach-ks8695/regs-hpna.h | 25 -
arch/arm/mach-ks8695/regs-lan.h | 65 --
arch/arm/mach-ks8695/regs-mem.h | 89 --
arch/arm/mach-ks8695/regs-pci.h | 53 -
arch/arm/mach-ks8695/regs-sys.h | 34 -
arch/arm/mach-ks8695/regs-wan.h | 65 --
arch/arm/mach-ks8695/time.c | 159 ---
arch/arm/mach-lpc32xx/Kconfig | 11 +
arch/arm/mach-lpc32xx/common.c | 24 +-
arch/arm/mach-lpc32xx/common.h | 1 -
arch/arm/mach-lpc32xx/include/mach/board.h | 15 -
arch/arm/mach-lpc32xx/include/mach/entry-macro.S | 28 -
arch/arm/mach-lpc32xx/include/mach/hardware.h | 25 -
arch/arm/mach-lpc32xx/include/mach/uncompress.h | 50 -
.../{include/mach/platform.h => lpc32xx.h} | 18 +-
arch/arm/mach-lpc32xx/pm.c | 3 +-
arch/arm/mach-lpc32xx/serial.c | 33 +-
arch/arm/mach-lpc32xx/suspend.S | 3 +-
arch/arm/mach-mv78xx0/mv78xx0.h | 4 +-
arch/arm/mach-nspire/Makefile | 1 -
arch/arm/mach-nspire/clcd.c | 114 --
arch/arm/mach-nspire/clcd.h | 10 -
arch/arm/mach-nspire/nspire.c | 25 -
arch/arm/mach-omap2/.gitignore | 1 +
arch/arm/mach-omap2/Makefile | 5 +-
arch/arm/mach-omap2/hsmmc.c | 4 +-
arch/arm/mach-omap2/sleep33xx.S | 2 +-
arch/arm/mach-omap2/sleep43xx.S | 2 +-
arch/arm/mach-orion5x/orion5x.h | 4 +-
arch/arm/mach-s3c64xx/setup-usb-phy.c | 5 +
arch/arm/mach-ux500/cpu-db8500.c | 1 -
arch/arm/mach-vexpress/spc.c | 4 +-
arch/arm/mach-w90x900/Kconfig | 50 -
arch/arm/mach-w90x900/Makefile | 20 -
arch/arm/mach-w90x900/Makefile.boot | 4 -
arch/arm/mach-w90x900/clksel.c | 88 --
arch/arm/mach-w90x900/clock.c | 121 ---
arch/arm/mach-w90x900/clock.h | 40 -
arch/arm/mach-w90x900/cpu.c | 238 -----
arch/arm/mach-w90x900/cpu.h | 56 -
arch/arm/mach-w90x900/dev.c | 537 ----------
arch/arm/mach-w90x900/gpio.c | 150 ---
arch/arm/mach-w90x900/include/mach/entry-macro.S | 26 -
arch/arm/mach-w90x900/include/mach/hardware.h | 19 -
arch/arm/mach-w90x900/include/mach/irqs.h | 82 --
arch/arm/mach-w90x900/include/mach/map.h | 153 ---
arch/arm/mach-w90x900/include/mach/mfp.h | 21 -
arch/arm/mach-w90x900/include/mach/regs-clock.h | 49 -
arch/arm/mach-w90x900/include/mach/regs-irq.h | 46 -
arch/arm/mach-w90x900/include/mach/regs-ldm.h | 248 -----
arch/arm/mach-w90x900/include/mach/regs-serial.h | 54 -
arch/arm/mach-w90x900/include/mach/uncompress.h | 43 -
arch/arm/mach-w90x900/irq.c | 212 ----
arch/arm/mach-w90x900/mach-nuc910evb.c | 38 -
arch/arm/mach-w90x900/mach-nuc950evb.c | 42 -
arch/arm/mach-w90x900/mach-nuc960evb.c | 38 -
arch/arm/mach-w90x900/mfp.c | 197 ----
arch/arm/mach-w90x900/nuc910.c | 58 -
arch/arm/mach-w90x900/nuc910.h | 17 -
arch/arm/mach-w90x900/nuc950.c | 52 -
arch/arm/mach-w90x900/nuc950.h | 17 -
arch/arm/mach-w90x900/nuc960.c | 50 -
arch/arm/mach-w90x900/nuc960.h | 17 -
arch/arm/mach-w90x900/nuc9xx.h | 22 -
arch/arm/mach-w90x900/regs-ebi.h | 29 -
arch/arm/mach-w90x900/regs-gcr.h | 34 -
arch/arm/mach-w90x900/regs-timer.h | 37 -
arch/arm/mach-w90x900/regs-usb.h | 31 -
arch/arm/mach-w90x900/time.c | 168 ---
arch/arm/mach-zynq/headsmp.S | 2 +
arch/arm/mach-zynq/platsmp.c | 4 +-
arch/arm/mm/Kconfig | 2 +-
arch/arm/mm/copypage-xscale.c | 6 +-
arch/arm/plat-iop/Makefile | 28 -
arch/arm/plat-samsung/include/plat/gpio-core.h | 1 +
arch/arm/plat-samsung/include/plat/usb-phy.h | 2 -
arch/arm64/Kconfig.platforms | 2 +
drivers/dma/Kconfig | 4 +-
drivers/dma/iop-adma.c | 22 +-
.../iop3xx-adma.h => drivers/dma/iop-adma.h | 7 +-
drivers/gpio/Kconfig | 9 +-
drivers/gpio/Makefile | 2 +-
drivers/gpio/gpio-lpc32xx.c | 118 ++-
drivers/i2c/busses/Kconfig | 2 +-
drivers/net/ethernet/nxp/Kconfig | 2 +-
drivers/net/ethernet/nxp/lpc_eth.c | 45 +-
drivers/soc/ux500/ux500-soc-id.c | 5 +-
drivers/tty/serial/Kconfig | 3 +-
drivers/tty/serial/lpc32xx_hs.c | 37 +-
drivers/usb/gadget/udc/Kconfig | 3 +-
drivers/usb/gadget/udc/lpc32xx_udc.c | 3 +-
drivers/usb/host/Kconfig | 3 +-
drivers/usb/host/ohci-nxp.c | 25 +-
drivers/watchdog/Kconfig | 2 +-
drivers/watchdog/pnx4008_wdt.c | 1 -
.../linux/platform_data/dma-iop32x.h | 4 +
include/linux/soc/nxp/lpc32xx-misc.h | 33 +
include/linux/usb/samsung_usb_phy.h | 17 -
240 files changed, 679 insertions(+), 12527 deletions(-)
delete mode 100644 arch/arm/configs/acs5k_defconfig
delete mode 100644 arch/arm/configs/acs5k_tiny_defconfig
delete mode 100644 arch/arm/configs/iop13xx_defconfig
delete mode 100644 arch/arm/configs/iop33x_defconfig
delete mode 100644 arch/arm/configs/ks8695_defconfig
delete mode 100644 arch/arm/configs/nuc910_defconfig
delete mode 100644 arch/arm/configs/nuc950_defconfig
delete mode 100644 arch/arm/configs/nuc960_defconfig
delete mode 100644 arch/arm/include/debug/ks8695.S
create mode 100644 arch/arm/mach-aspeed/Makefile
create mode 100644 arch/arm/mach-aspeed/platsmp.c
create mode 100644 arch/arm/mach-at91/.gitignore
rename arch/arm/mach-dove/{include/mach => }/bridge-regs.h (96%)
rename arch/arm/mach-dove/{include/mach => }/dove.h (95%)
delete mode 100644 arch/arm/mach-dove/include/mach/hardware.h
rename arch/arm/mach-dove/{include/mach => }/irqs.h (98%)
rename arch/arm/mach-dove/{include/mach => }/pm.h (97%)
delete mode 100644 arch/arm/mach-iop13xx/Kconfig
delete mode 100644 arch/arm/mach-iop13xx/Makefile
delete mode 100644 arch/arm/mach-iop13xx/Makefile.boot
delete mode 100644 arch/arm/mach-iop13xx/include/mach/adma.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-iop13xx/include/mach/hardware.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/iop13xx.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/iq81340.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/irqs.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/memory.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/time.h
delete mode 100644 arch/arm/mach-iop13xx/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-iop13xx/io.c
delete mode 100644 arch/arm/mach-iop13xx/iq81340mc.c
delete mode 100644 arch/arm/mach-iop13xx/iq81340sc.c
delete mode 100644 arch/arm/mach-iop13xx/irq.c
delete mode 100644 arch/arm/mach-iop13xx/msi.c
delete mode 100644 arch/arm/mach-iop13xx/msi.h
delete mode 100644 arch/arm/mach-iop13xx/pci.c
delete mode 100644 arch/arm/mach-iop13xx/pci.h
delete mode 100644 arch/arm/mach-iop13xx/setup.c
delete mode 100644 arch/arm/mach-iop13xx/tpmi.c
rename arch/arm/{plat-iop => mach-iop32x}/adma.c (75%)
rename arch/arm/{plat-iop => mach-iop32x}/cp6.c (100%)
rename arch/arm/mach-iop32x/{include/mach => }/glantank.h (78%)
rename arch/arm/mach-iop32x/{include/mach => }/hardware.h (90%)
rename arch/arm/{plat-iop => mach-iop32x}/i2c.c (81%)
delete mode 100644 arch/arm/mach-iop32x/include/mach/adma.h
delete mode 100644 arch/arm/mach-iop32x/include/mach/iop32x.h
delete mode 100644 arch/arm/mach-iop32x/include/mach/time.h
rename arch/arm/{include/asm/hardware => mach-iop32x}/iop3xx.h (96%)
rename arch/arm/mach-iop32x/{include/mach => }/iq31244.h (89%)
rename arch/arm/mach-iop32x/{include/mach => }/iq80321.h (89%)
create mode 100644 arch/arm/mach-iop32x/irqs.h
rename arch/arm/mach-iop32x/{include/mach => }/n2100.h (89%)
rename arch/arm/{plat-iop => mach-iop32x}/pci.c (99%)
rename arch/arm/{plat-iop => mach-iop32x}/pmu.c (79%)
rename arch/arm/{plat-iop => mach-iop32x}/restart.c (82%)
rename arch/arm/{plat-iop => mach-iop32x}/setup.c (95%)
rename arch/arm/{plat-iop => mach-iop32x}/time.c (97%)
delete mode 100644 arch/arm/mach-iop33x/Kconfig
delete mode 100644 arch/arm/mach-iop33x/Makefile
delete mode 100644 arch/arm/mach-iop33x/Makefile.boot
delete mode 100644 arch/arm/mach-iop33x/include/mach/adma.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-iop33x/include/mach/hardware.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/iop33x.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/iq80331.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/iq80332.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/irqs.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/time.h
delete mode 100644 arch/arm/mach-iop33x/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-iop33x/iq80331.c
delete mode 100644 arch/arm/mach-iop33x/iq80332.c
delete mode 100644 arch/arm/mach-iop33x/irq.c
delete mode 100644 arch/arm/mach-iop33x/uart.c
delete mode 100644 arch/arm/mach-ks8695/Kconfig
delete mode 100644 arch/arm/mach-ks8695/Makefile
delete mode 100644 arch/arm/mach-ks8695/Makefile.boot
delete mode 100644 arch/arm/mach-ks8695/board-acs5k.c
delete mode 100644 arch/arm/mach-ks8695/board-dsm320.c
delete mode 100644 arch/arm/mach-ks8695/board-micrel.c
delete mode 100644 arch/arm/mach-ks8695/board-og.c
delete mode 100644 arch/arm/mach-ks8695/board-sg.c
delete mode 100644 arch/arm/mach-ks8695/cpu.c
delete mode 100644 arch/arm/mach-ks8695/devices.c
delete mode 100644 arch/arm/mach-ks8695/devices.h
delete mode 100644 arch/arm/mach-ks8695/generic.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-ks8695/include/mach/gpio-ks8695.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/hardware.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/irqs.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/memory.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/regs-gpio.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/regs-irq.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/regs-misc.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/regs-switch.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/regs-uart.h
delete mode 100644 arch/arm/mach-ks8695/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-ks8695/irq.c
delete mode 100644 arch/arm/mach-ks8695/pci.c
delete mode 100644 arch/arm/mach-ks8695/regs-hpna.h
delete mode 100644 arch/arm/mach-ks8695/regs-lan.h
delete mode 100644 arch/arm/mach-ks8695/regs-mem.h
delete mode 100644 arch/arm/mach-ks8695/regs-pci.h
delete mode 100644 arch/arm/mach-ks8695/regs-sys.h
delete mode 100644 arch/arm/mach-ks8695/regs-wan.h
delete mode 100644 arch/arm/mach-ks8695/time.c
create mode 100644 arch/arm/mach-lpc32xx/Kconfig
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/board.h
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/hardware.h
delete mode 100644 arch/arm/mach-lpc32xx/include/mach/uncompress.h
rename arch/arm/mach-lpc32xx/{include/mach/platform.h => lpc32xx.h} (98%)
delete mode 100644 arch/arm/mach-nspire/clcd.c
delete mode 100644 arch/arm/mach-nspire/clcd.h
create mode 100644 arch/arm/mach-omap2/.gitignore
delete mode 100644 arch/arm/mach-w90x900/Kconfig
delete mode 100644 arch/arm/mach-w90x900/Makefile
delete mode 100644 arch/arm/mach-w90x900/Makefile.boot
delete mode 100644 arch/arm/mach-w90x900/clksel.c
delete mode 100644 arch/arm/mach-w90x900/clock.c
delete mode 100644 arch/arm/mach-w90x900/clock.h
delete mode 100644 arch/arm/mach-w90x900/cpu.c
delete mode 100644 arch/arm/mach-w90x900/cpu.h
delete mode 100644 arch/arm/mach-w90x900/dev.c
delete mode 100644 arch/arm/mach-w90x900/gpio.c
delete mode 100644 arch/arm/mach-w90x900/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-w90x900/include/mach/hardware.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/irqs.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/map.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/mfp.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/regs-clock.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/regs-irq.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/regs-ldm.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/regs-serial.h
delete mode 100644 arch/arm/mach-w90x900/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-w90x900/irq.c
delete mode 100644 arch/arm/mach-w90x900/mach-nuc910evb.c
delete mode 100644 arch/arm/mach-w90x900/mach-nuc950evb.c
delete mode 100644 arch/arm/mach-w90x900/mach-nuc960evb.c
delete mode 100644 arch/arm/mach-w90x900/mfp.c
delete mode 100644 arch/arm/mach-w90x900/nuc910.c
delete mode 100644 arch/arm/mach-w90x900/nuc910.h
delete mode 100644 arch/arm/mach-w90x900/nuc950.c
delete mode 100644 arch/arm/mach-w90x900/nuc950.h
delete mode 100644 arch/arm/mach-w90x900/nuc960.c
delete mode 100644 arch/arm/mach-w90x900/nuc960.h
delete mode 100644 arch/arm/mach-w90x900/nuc9xx.h
delete mode 100644 arch/arm/mach-w90x900/regs-ebi.h
delete mode 100644 arch/arm/mach-w90x900/regs-gcr.h
delete mode 100644 arch/arm/mach-w90x900/regs-timer.h
delete mode 100644 arch/arm/mach-w90x900/regs-usb.h
delete mode 100644 arch/arm/mach-w90x900/time.c
delete mode 100644 arch/arm/plat-iop/Makefile
rename arch/arm/include/asm/hardware/iop3xx-adma.h =>
drivers/dma/iop-adma.h (99%)
rename arch/arm/include/asm/hardware/iop_adma.h =>
include/linux/platform_data/dma-iop32x.h (98%)
create mode 100644 include/linux/soc/nxp/lpc32xx-misc.h
delete mode 100644 include/linux/usb/samsung_usb_phy.h
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
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^ permalink raw reply
* [GIT PULL 2/5] ARM SoC driver updates for v5.4
From: Arnd Bergmann @ 2019-09-16 16:33 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a3ArYx8LUbYhjTw2wOEZgK9mJOE_PaLzuZTfn29Z5+K3Q@mail.gmail.com>
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/armsoc-drivers
for you to fetch changes up to 3dc8dcb02fdba3370aec0696727e6adfe8033aa4:
Merge tag 'qcom-drivers-for-5.4' of
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into
arm/drivers (2019-09-12 13:46:20 +0200)
----------------------------------------------------------------
ARM: SoC driver updates for v5.4
The branch contains driver changes that are tightly
connected to SoC specific code. Aside from smaller
cleanups and bug fixes, here is a list of the notable
changes.
New device drivers:
- The Turris Mox router has a new "moxtet" bus driver
for its on-board pluggable extension bus. The
same platform also gains a firmware driver.
- The Samsung Exynos family gains a new Chipid driver
exporting using the soc device sysfs interface
- A similar socinfo driver for Qualcomm Snapdragon
chips.
- A firmware driver for the NXP i.MX DSP IPC protocol
using shared memory and a mailbox
Other changes:
- The i.MX reset controller driver now supports the
NXP i.MX8MM chip
- Amlogic SoC specific drivers gain support for
the S905X3 and A311D chips
- A rework of the TI Davinci framebuffer driver to
allow important cleanups in the platform code
- A couple of device drivers for removed ARM SoC
platforms are removed. Most of the removals were
picked up by other maintainers, this contains
whatever was left.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----------------------------------------------------------------
Anson Huang (4):
soc: imx8: Add i.MX8MQ UID(unique identifier) support
soc: imx8: Add i.MX8MM UID(unique identifier) support
dt-bindings: reset: imx7: Add support for i.MX8MM
soc: imx-scu: Add SoC UID(unique identifier) support
Arnd Bergmann (20):
Merge tag 'reset-for-v5.4' of
git://git.pengutronix.de/git/pza/linux into arm/drivers
Merge tag 'renesas-drivers-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/drivers
Merge tag 'scmi-updates-5.4' of
git://git.kernel.org/.../sudeep.holla/linux into arm/drivers
Merge tag 'tee-optee-for-5.4' of
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
Merge tag 'samsung-drivers-5.4' of
git://git.kernel.org/.../krzk/linux into arm/drivers
Merge tag 'renesas-drivers-for-v5.4-tag2' of
git://git.kernel.org/.../geert/renesas-devel into arm/drivers
Merge tag 'soc-fsl-next-v5.4' of
git://git.kernel.org/.../leo/linux into arm/drivers
Merge tag 'amlogic-drivers' of
git://git.kernel.org/.../khilman/linux-amlogic into arm/drivers
Merge tag 'sunxi-drivers-for-5.4-2' of
git://git.kernel.org/.../sunxi/linux into arm/drivers
Merge tag 'v5.3-next-soc' of
git://git.kernel.org/.../matthias.bgg/linux into arm/drivers
Merge tag 'amlogic-drivers-2.1' of
git://git.kernel.org/.../khilman/linux-amlogic into arm/drivers
Merge tag 'imx-drivers-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/drivers
Merge tag 'davinci-for-v5.4/fbdev' of
git://git.kernel.org/.../nsekhar/linux-davinci into arm/drivers
net: remove ks8695 driver
net: remove w90p910-ether driver
spi: remove w90x900 driver
fbdev: remove w90x900/nuc900 platform drivers
bus: imx-weim: remove incorrect __init annotations
Merge tag 'samsung-drivers-5.4-2' of
git://git.kernel.org/.../krzk/linux into arm/drivers
Merge tag 'qcom-drivers-for-5.4' of
git://git.kernel.org/.../qcom/linux into arm/drivers
Bartosz Golaszewski (7):
ARM: davinci: da850-evm: model the backlight GPIO as an actual device
fbdev: da8xx: add support for a regulator
ARM: davinci: da850-evm: switch to using a fixed regulator for lcdc
fbdev: da8xx: remove panel_power_ctrl() callback from platform data
fbdev: da8xx-fb: use devm_platform_ioremap_resource()
fbdev: da8xx-fb: drop a redundant if
fbdev: da8xx: use resource management for dma
Bibby Hsieh (2):
soc: mediatek: cmdq: reorder the parameter
soc: mediatek: cmdq: change the type of input parameter
Bjorn Andersson (2):
base: soc: Add serial_number attribute to soc
soc: qcom: socinfo: Annotate switch cases with fall through
Christian Hewitt (1):
soc: amlogic: meson-gx-socinfo: add A311D id
Colin Ian King (3):
soc: fsl: fix spelling mistake "Firmaware" -> "Firmware"
soc: samsung: chipid: Fix memory leak in error path
bus: moxtet: fix unsigned comparison to less than zero
Daniel Baluta (4):
firmware: imx: scu-pd: Rename mu PD range to mu_a
firmware: imx: scu-pd: Add mu13 b side PD range
firmware: imx: scu-pd: Add IRQSTR_DSP PD range
firmware: imx: Add DSP IPC protocol interface
Geert Uytterhoeven (5):
soc: renesas: rcar-sysc: Use [] to denote a flexible array member
soc: renesas: rcar-sysc: Eliminate local variable gov
soc: renesas: rmobile-sysc: Set GENPD_FLAG_ALWAYS_ON for always-on domain
soc: renesas: Enable ARM_ERRATA_814220 for affected Cortex-A7
soc: renesas: Enable ARM_ERRATA_754322 for affected Cortex-A9
Guido Günther (2):
dt-bindings: reset: Fix typo in imx8mq resets
soc: imx: gpcv2: Print the correct error code
Gustavo Pimentel (1):
reset: Add DesignWare IP support to simple reset
Imran Khan (1):
soc: qcom: Add socinfo driver
Ioana Ciornei (2):
soc: fsl: dpio: remove explicit device_link_remove
bus: fsl-mc: remove explicit device_link_del
Jason Yan (1):
bus: moxtet: remove set but not used variable 'dummy'
Linus Walleij (1):
ARM: scoop: Use the right include
Lokesh Vutla (3):
firmware: ti_sci: Allow for device shared and exclusive requests
dt-bindings: ti_sci_pm_domains: Add support for exclusive and
shared access
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
Luis Oliveira (1):
dt-bindings: Document the DesignWare IP reset bindings
Marek Behún (8):
bus: Add support for Moxtet bus
dt-bindings: bus: Document moxtet bus binding
bus: moxtet: Add sysfs and debugfs documentation
drivers: gpio: Add support for GPIOs over Moxtet bus
dt-bindings: gpio: Document GPIOs via Moxtet bus
dt-bindings: firmware: Document cznic,turris-mox-rwtm binding
firmware: Add Turris Mox rWTM firmware driver
firmware: turris-mox-rwtm: Add sysfs documentation
Masahiro Yamada (1):
bus: uniphier-system-bus: use devm_platform_ioremap_resource()
Neil Armstrong (10):
reset: reset-meson: update with SPDX Licence identifier
dt-bindings: reset: amlogic,meson-gxbb-reset: update with SPDX
Licence identifier
dt-bindings: reset: amlogic,meson8b-reset: update with SPDX
Licence identifier
soc: amlogic: meson-clk-measure: protect measure with a mutex
soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs
dt-bindings: soc: amlogic: clk-measure: Add SM1 compatible
soc: amlogic: clk-measure: Add support for SM1
soc: amlogic: Add support for Everything-Else power domains controller
dt-bindings: power: add Amlogic Everything-Else power domains bindings
Nishka Dasgupta (2):
soc: renesas: rcar-sysc: Add goto to of_node_put() before return
soc: amlogic: meson-gx-socinfo: Add of_node_put() before return
Olof Johansson (1):
Merge tag 'soc-fsl-next-v5.3-2' of
git://git.kernel.org/.../leo/linux into arm/drivers
Pankaj Dubey (1):
soc: samsung: Add exynos chipid driver support
Rasmus Villemoes (6):
soc: fsl: qe: drop useless static qualifier
soc: fsl: qe: reduce static memory footprint by 1.7K
soc: fsl: qe: introduce qe_get_device_node helper
dt-bindings: soc: fsl: qe: document new fsl,qe-snums binding
soc: fsl: qe: support fsl,qe-snums property
soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_init
Rouven Czerwinski (1):
tee: optee: add might_sleep for RPC requests
Roy Pledge (7):
soc/fsl/qbman: Rework QBMan private memory setup
soc/fsl/qbman: Cleanup buffer pools if BMan was initialized
prior to bootup
soc/fsl/qbman: Cleanup QMan queues if device was already initialized
soc/fsl/qbman: Fix drain_mr_fqni()
soc/fsl/qbman: Disable interrupts during portal recovery
soc/fsl/qbman: Fixup qman_shutdown_fq()
soc/fsl/qbman: Update device tree with reserved memory
Sascha Hauer (1):
bus: imx-weim: use module_platform_driver()
Sibi Sankar (5):
soc: qcom: smem: Update max processor count
dt-bindings: firmware: scm: re-order compatible list
dt-bindings: firmware: scm: Add SM8150 and SC7180 support
dt-bindings: soc: qcom: aoss: Add SM8150 and SC7180 support
soc: qcom: aoss: Add AOSS QMP support
Stephen Boyd (5):
firmware: qcom_scm: Use proper types for dma mappings
firmware: qcom_scm: Fix some typos in docs and printks
firmware: qcom_scm: Cleanup code in qcom_scm_assign_mem()
bus: sunxi-rsb: Remove dev_err() usage after platform_get_irq()
soc: fsl: qbman: Remove dev_err() usage after platform_get_irq()
Sudeep Holla (22):
firmware: arm_scmi: Use the correct style for SPDX License Identifier
firmware: arm_scmi: Align few names in sensors protocol with
SCMI specification
firmware: arm_scmi: Remove extra check for invalid length
message responses
firmware: arm_scmi: Fix few trivial typos in comments
firmware: arm_scmi: Use the term 'message' instead of 'command'
firmware: arm_scmi: Check if platform has released shmem before using
firmware: arm_scmi: Reorder some functions to avoid forward declarations
firmware: arm_scmi: Segregate tx channel handling and prepare to add rx
firmware: arm_scmi: Add receive channel support for notifications
firmware: arm_scmi: Separate out tx buffer handling and prepare to add rx
firmware: arm_scmi: Add mechanism to unpack message headers
firmware: arm_scmi: Add support for asynchronous commands and
delayed response
firmware: arm_scmi: Drop async flag in sensor_ops->reading_get
firmware: arm_scmi: Add asynchronous sensor read if it supports
firmware: arm_scmi: Drop config flag in clk_ops->rate_set
firmware: arm_scmi: Use asynchronous CLOCK_RATE_SET when possible
firmware: arm_scmi: Use {get,put}_unaligned_le{32,64} accessors
firmware: arm_scmi: Add discovery of SCMI v2.0 performance fastchannels
firmware: arm_scmi: Make use SCMI v2.0 fastchannel for
performance protocol
dt-bindings: arm: Extend SCMI to support new reset protocol
firmware: arm_scmi: Add RESET protocol in SCMI v2.0
reset: Add support for resets provided by SCMI
Sven Van Asbroeck (1):
bus: imx-weim: optionally enable burst clock mode
Sylwester Nawrocki (3):
soc: samsung: chipid: Convert exynos-chipid driver to use the regmap API
soc: samsung: chipid: Remove the regmap lookup error log
soc: samsung: chipid: Select missing dependency for EXYNOS_CHIPID
Thara Gopinath (1):
soc: qcom: Extend AOSS QMP driver to support resources that are
used to wake up the SoC.
Vaishali Thakkar (2):
soc: qcom: socinfo: Expose custom attributes
soc: qcom: socinfo: Expose image information
Vinod Koul (1):
base: soc: Export soc_device_register/unregister APIs
Yinbo Zhu (1):
soc: fsl: guts: Add definition for LS1028A
Documentation/ABI/testing/debugfs-moxtet | 23 +
Documentation/ABI/testing/sysfs-bus-moxtet-devices | 17 +
Documentation/ABI/testing/sysfs-devices-soc | 7 +
.../ABI/testing/sysfs-firmware-turris-mox-rwtm | 37 +
Documentation/devicetree/bindings/arm/arm,scmi.txt | 17 +
Documentation/devicetree/bindings/bus/moxtet.txt | 46 +
.../bindings/firmware/cznic,turris-mox-rwtm.txt | 19 +
.../devicetree/bindings/firmware/qcom,scm.txt | 4 +-
.../devicetree/bindings/gpio/gpio-moxtet.txt | 18 +
.../bindings/power/amlogic,meson-ee-pwrc.yaml | 93 ++
.../devicetree/bindings/reset/fsl,imx7-src.txt | 6 +-
.../devicetree/bindings/reset/snps,dw-reset.txt | 30 +
.../bindings/soc/amlogic/clk-measure.txt | 1 +
.../devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 13 +-
.../devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 5 +-
.../devicetree/bindings/soc/ti/sci-pm-domain.txt | 11 +-
MAINTAINERS | 17 +
arch/arm/common/scoop.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 90 +-
drivers/base/soc.c | 9 +
drivers/bus/Kconfig | 10 +
drivers/bus/Makefile | 1 +
drivers/bus/fsl-mc/fsl-mc-allocator.c | 1 -
drivers/bus/fsl-mc/mc-io.c | 1 -
drivers/bus/imx-weim.c | 34 +-
drivers/bus/moxtet.c | 885 +++++++++++
drivers/bus/sunxi-rsb.c | 4 +-
drivers/bus/uniphier-system-bus.c | 4 +-
drivers/clk/clk-scmi.c | 2 +-
drivers/firmware/Kconfig | 14 +
drivers/firmware/Makefile | 1 +
drivers/firmware/arm_scmi/Makefile | 2 +-
drivers/firmware/arm_scmi/base.c | 2 +-
drivers/firmware/arm_scmi/clock.c | 33 +-
drivers/firmware/arm_scmi/common.h | 18 +-
drivers/firmware/arm_scmi/driver.c | 366 +++--
drivers/firmware/arm_scmi/perf.c | 264 +++-
drivers/firmware/arm_scmi/power.c | 6 +-
drivers/firmware/arm_scmi/reset.c | 231 +++
drivers/firmware/arm_scmi/sensors.c | 57 +-
drivers/firmware/imx/Kconfig | 11 +
drivers/firmware/imx/Makefile | 1 +
drivers/firmware/imx/imx-dsp.c | 155 ++
drivers/firmware/imx/scu-pd.c | 4 +-
drivers/firmware/qcom_scm.c | 47 +-
drivers/firmware/ti_sci.c | 45 +-
drivers/firmware/turris-mox-rwtm.c | 384 +++++
drivers/gpio/Kconfig | 9 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-moxtet.c | 179 +++
drivers/hwmon/scmi-hwmon.c | 2 +-
drivers/net/ethernet/Kconfig | 1 -
drivers/net/ethernet/Makefile | 1 -
drivers/net/ethernet/micrel/Kconfig | 11 +-
drivers/net/ethernet/micrel/Makefile | 1 -
drivers/net/ethernet/micrel/ks8695net.c | 1632 --------------------
drivers/net/ethernet/micrel/ks8695net.h | 108 --
drivers/net/ethernet/nuvoton/Kconfig | 29 -
drivers/net/ethernet/nuvoton/Makefile | 6 -
drivers/net/ethernet/nuvoton/w90p910_ether.c | 1082 -------------
drivers/reset/Kconfig | 13 +-
drivers/reset/Makefile | 1 +
drivers/reset/reset-imx7.c | 12 +-
drivers/reset/reset-meson.c | 51 +-
drivers/reset/reset-scmi.c | 124 ++
drivers/reset/reset-simple.c | 3 +
drivers/soc/amlogic/Kconfig | 11 +
drivers/soc/amlogic/Makefile | 1 +
drivers/soc/amlogic/meson-clk-measure.c | 148 +-
drivers/soc/amlogic/meson-ee-pwrc.c | 492 ++++++
drivers/soc/amlogic/meson-gx-socinfo.c | 7 +-
drivers/soc/fsl/dpaa2-console.c | 2 +-
drivers/soc/fsl/dpio/dpio-service.c | 2 -
drivers/soc/fsl/guts.c | 6 +
drivers/soc/fsl/qbman/bman.c | 17 +-
drivers/soc/fsl/qbman/bman_ccsr.c | 36 +-
drivers/soc/fsl/qbman/bman_portal.c | 22 +-
drivers/soc/fsl/qbman/bman_priv.h | 5 +
drivers/soc/fsl/qbman/dpaa_sys.c | 63 +-
drivers/soc/fsl/qbman/qman.c | 83 +-
drivers/soc/fsl/qbman/qman_ccsr.c | 68 +-
drivers/soc/fsl/qbman/qman_portal.c | 22 +-
drivers/soc/fsl/qbman/qman_priv.h | 8 +
drivers/soc/fsl/qe/qe.c | 163 +-
drivers/soc/imx/gpcv2.c | 2 +-
drivers/soc/imx/soc-imx-scu.c | 39 +
drivers/soc/imx/soc-imx8.c | 45 +
drivers/soc/mediatek/mtk-cmdq-helper.c | 10 +-
drivers/soc/qcom/Kconfig | 8 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/qcom_aoss.c | 133 ++
drivers/soc/qcom/smem.c | 11 +-
drivers/soc/qcom/socinfo.c | 476 ++++++
drivers/soc/renesas/Kconfig | 11 +
drivers/soc/renesas/rcar-sysc.c | 7 +-
drivers/soc/renesas/rmobile-sysc.c | 31 +-
drivers/soc/samsung/Kconfig | 6 +
drivers/soc/samsung/Makefile | 2 +
drivers/soc/samsung/exynos-chipid.c | 105 ++
drivers/soc/ti/ti_sci_pm_domains.c | 23 +-
drivers/spi/Kconfig | 7 -
drivers/spi/Makefile | 1 -
drivers/spi/spi-nuc900.c | 429 -----
drivers/tee/optee/call.c | 1 +
drivers/video/fbdev/Kconfig | 14 -
drivers/video/fbdev/Makefile | 1 -
drivers/video/fbdev/da8xx-fb.c | 118 +-
drivers/video/fbdev/nuc900fb.c | 760 ---------
drivers/video/fbdev/nuc900fb.h | 51 -
include/Kbuild | 2 -
include/dt-bindings/bus/moxtet.h | 16 +
include/dt-bindings/power/meson-g12a-power.h | 13 +
include/dt-bindings/power/meson-sm1-power.h | 18 +
.../dt-bindings/reset/amlogic,meson-gxbb-reset.h | 51 +-
include/dt-bindings/reset/amlogic,meson8b-reset.h | 51 +-
include/dt-bindings/reset/imx8mq-reset.h | 34 +-
include/dt-bindings/soc/ti,sci_pm_domain.h | 9 +
include/linux/firmware/imx/dsp.h | 67 +
include/linux/moxtet.h | 109 ++
include/linux/platform_data/spi-nuc900.h | 29 -
include/linux/platform_data/video-nuc900fb.h | 79 -
include/linux/qcom_scm.h | 9 +-
include/linux/scmi_protocol.h | 46 +-
include/linux/soc/mediatek/mtk-cmdq.h | 14 +-
include/linux/soc/samsung/exynos-chipid.h | 52 +
include/linux/soc/ti/ti_sci_protocol.h | 3 +
include/linux/sys_soc.h | 1 +
include/video/da8xx-fb.h | 1 -
128 files changed, 5409 insertions(+), 4957 deletions(-)
create mode 100644 Documentation/ABI/testing/debugfs-moxtet
create mode 100644 Documentation/ABI/testing/sysfs-bus-moxtet-devices
create mode 100644 Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm
create mode 100644 Documentation/devicetree/bindings/bus/moxtet.txt
create mode 100644
Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-moxtet.txt
create mode 100644
Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml
create mode 100644 Documentation/devicetree/bindings/reset/snps,dw-reset.txt
create mode 100644 drivers/bus/moxtet.c
create mode 100644 drivers/firmware/arm_scmi/reset.c
create mode 100644 drivers/firmware/imx/imx-dsp.c
create mode 100644 drivers/firmware/turris-mox-rwtm.c
create mode 100644 drivers/gpio/gpio-moxtet.c
delete mode 100644 drivers/net/ethernet/micrel/ks8695net.c
delete mode 100644 drivers/net/ethernet/micrel/ks8695net.h
delete mode 100644 drivers/net/ethernet/nuvoton/Kconfig
delete mode 100644 drivers/net/ethernet/nuvoton/Makefile
delete mode 100644 drivers/net/ethernet/nuvoton/w90p910_ether.c
create mode 100644 drivers/reset/reset-scmi.c
create mode 100644 drivers/soc/amlogic/meson-ee-pwrc.c
create mode 100644 drivers/soc/qcom/socinfo.c
create mode 100644 drivers/soc/samsung/exynos-chipid.c
delete mode 100644 drivers/spi/spi-nuc900.c
delete mode 100644 drivers/video/fbdev/nuc900fb.c
delete mode 100644 drivers/video/fbdev/nuc900fb.h
create mode 100644 include/dt-bindings/bus/moxtet.h
create mode 100644 include/dt-bindings/power/meson-g12a-power.h
create mode 100644 include/dt-bindings/power/meson-sm1-power.h
create mode 100644 include/dt-bindings/soc/ti,sci_pm_domain.h
create mode 100644 include/linux/firmware/imx/dsp.h
create mode 100644 include/linux/moxtet.h
delete mode 100644 include/linux/platform_data/spi-nuc900.h
delete mode 100644 include/linux/platform_data/video-nuc900fb.h
create mode 100644 include/linux/soc/samsung/exynos-chipid.h
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [GIT PULL 0/5] ARM SoC updates for v5.4, part 1
From: Arnd Bergmann @ 2019-09-16 16:35 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a3ArYx8LUbYhjTw2wOEZgK9mJOE_PaLzuZTfn29Z5+K3Q@mail.gmail.com>
The following changes since commit d45331b00ddb179e291766617259261c112db872:
Linux 5.3-rc4 (2019-08-11 13:26:41 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
tags/armsoc-defconfig
for you to fetch changes up to adce1767799b6f6cf18c13e746950fc976f2e15e:
Merge tag 'samsung-defconfig-5.4' of
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into
arm/defconfig (2019-09-04 22:31:24 +0200)
----------------------------------------------------------------
ARM: SoC defconfig updates for v5.4
As usual, a bunch of commits, mostly adding drivers and other
options to defconfigs after the code was merged through another
tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----------------------------------------------------------------
Andy Gross (1):
ARM: multi_v7_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
Anson Huang (2):
arm64: defconfig: Select CONFIG_PINCTRL_IMX8MN by default
arm64: defconfig: Select CONFIG_CLK_IMX8MN by default
Arnd Bergmann (13):
Merge tag 'stm32-defconfig-for-v5.4-1' of
git://git.kernel.org/.../atorgue/stm32 into arm/defconfig
Merge tag 'hisi-arm64-defconfig-for-5.4' of
git://github.com/hisilicon/linux-hisi into arm/defconfig
Merge tag 'arm64_defconfig_watchdog_for_v5.4' of
git://git.kernel.org/.../dinguyen/linux into arm/defconfig
Merge tag 'sunxi-config64-for-5.4-1' of
git://git.kernel.org/.../sunxi/linux into arm/defconfig
Merge tag 'aspeed-5.4-defconfig' of
git://git.kernel.org/.../joel/aspeed into arm/defconfig
Merge tag 'imx-defconfig-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/defconfig
Merge tag 'arm-soc/for-5.4/defconfig' of
https://github.com/Broadcom/stblinux into arm/defconfig
Merge tag 'arm-soc/for-5.4/defconfig-arm64' of
https://github.com/Broadcom/stblinux into arm/defconfig
Merge tag 'qcom-arm64-defconfig-for-5.4' of
git://git.kernel.org/.../qcom/linux into arm/defconfig
Merge tag 'qcom-defconfig-for-5.4' of
git://git.kernel.org/.../qcom/linux into arm/defconfig
Merge tag 'qcom-drivers-for-5.4' of
git://git.kernel.org/.../qcom/linux into arm/defconfig
Merge tag 'samsung-defconfig-5.4' of
git://git.kernel.org/.../krzk/linux into arm/defconfig
Merge tag 'armsoc-defconfig' of git://git.kernel.org/.../soc/soc
into for-next
Christian Gmeiner (1):
arm64: defconfig: CONFIG_DRM_ETNAVIV=m
Christophe Kerello (1):
ARM: multi_v7_defconfig: add FMC2 NAND controller support
Clément Péron (2):
arm64: defconfig: Enable IR SUNXI option
arm64: defconfig: Enable Sun4i SPDIF module
Dinh Nguyen (1):
arm64: defconfig: Enable the DesignWare watchdog
Fabio Estevam (1):
ARM: imx_v6_v7_defconfig: Select the OV5645 camera driver
Fabrice Gasnier (1):
ARM: multi_v7_defconfig: enable STM32 booster regulator
Florian Fainelli (2):
Merge tag 'tags/bcm2835-defconfig-next-2019-08-15' into defconfig/next
Merge tag 'tags/bcm2835-defconfig-64-next-2019-08-15' into
defconfig-arm64/next
Joel Stanley (3):
ARM: configs: aspeed: Refresh defconfigs
ARM: configs: multi_v7: Add ASPEED G6
ARM: configs: aspeed_g5: Enable AST2600
Jordan Crouse (2):
ARM: qcom_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
arm64: defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
Lee Jones (3):
arm64: defconfig: Enable Qualcomm GENI based I2C controller
arm64: defconfig: Enable the EFI Framebuffer
arm64: defconfig: Enable Qualcomm QUSB2 PHY
Leonard Crestez (1):
arm64: defconfig: Build imx8 ddr pmu as module
Lorenzo Pieralisi (2):
arm64: defconfig: Enable the PSCI CPUidle driver
ARM: imx_v6_v7_defconfig: Enable the PSCI CPUidle driver
Marc Gonzalez (1):
arm64: defconfig: Enable CPU clock drivers for Qualcomm msm8916
Marek Szyprowski (2):
ARM: exynos_defconfig: Enable AHCI-platform SATA driver
ARM: multi_v7_defconfig: Make MAX77802 regulator driver built-in
Nicolas Saenz Julienne (2):
ARM: defconfig: enable cpufreq driver for RPi
arm64: defconfig: enable cpufreq support for RPi3
Patrice Chotard (2):
ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
Robin Gong (1):
arm64: defconfig: Enable SDMA on i.mx8mq/8mm
Vinod Koul (1):
arm64: defconfig: Enable SM8150 GCC and pinctrl driver
William A. Kennington III (1):
ARM: configs: aspeed: Enable commonly used network functionality
Zhou Wang (1):
arm64: defconfig: Enable CONFIG_ACPI_APEI_PCIEAER
arch/arm/configs/aspeed_g4_defconfig | 50 +++++++++++---------------
arch/arm/configs/aspeed_g5_defconfig | 68 ++++++++++++++++++++----------------
arch/arm/configs/bcm2835_defconfig | 9 +++++
arch/arm/configs/exynos_defconfig | 5 ++-
arch/arm/configs/imx_v6_v7_defconfig | 2 ++
arch/arm/configs/multi_v7_defconfig | 27 +++++++++++++-
arch/arm/configs/qcom_defconfig | 1 +
arch/arm64/configs/defconfig | 22 ++++++++++++
8 files changed, 123 insertions(+), 61 deletions(-)
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [GIT PULL 3/5] ARM SoC defconfig updates for v5.4
From: Arnd Bergmann @ 2019-09-16 16:38 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a2NL=YXK1jWTk783sqMrNV80QkEae=kHk8-KeX2D0s74A@mail.gmail.com>
[originally missed the edit on the subject, sorry]
On Mon, Sep 16, 2019 at 6:35 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> The following changes since commit d45331b00ddb179e291766617259261c112db872:
>
> Linux 5.3-rc4 (2019-08-11 13:26:41 -0700)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git
> tags/armsoc-defconfig
>
> for you to fetch changes up to adce1767799b6f6cf18c13e746950fc976f2e15e:
>
> Merge tag 'samsung-defconfig-5.4' of
> git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into
> arm/defconfig (2019-09-04 22:31:24 +0200)
>
> ----------------------------------------------------------------
> ARM: SoC defconfig updates for v5.4
>
> As usual, a bunch of commits, mostly adding drivers and other
> options to defconfigs after the code was merged through another
> tree.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> ----------------------------------------------------------------
> Andy Gross (1):
> ARM: multi_v7_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
>
> Anson Huang (2):
> arm64: defconfig: Select CONFIG_PINCTRL_IMX8MN by default
> arm64: defconfig: Select CONFIG_CLK_IMX8MN by default
>
> Arnd Bergmann (13):
> Merge tag 'stm32-defconfig-for-v5.4-1' of
> git://git.kernel.org/.../atorgue/stm32 into arm/defconfig
> Merge tag 'hisi-arm64-defconfig-for-5.4' of
> git://github.com/hisilicon/linux-hisi into arm/defconfig
> Merge tag 'arm64_defconfig_watchdog_for_v5.4' of
> git://git.kernel.org/.../dinguyen/linux into arm/defconfig
> Merge tag 'sunxi-config64-for-5.4-1' of
> git://git.kernel.org/.../sunxi/linux into arm/defconfig
> Merge tag 'aspeed-5.4-defconfig' of
> git://git.kernel.org/.../joel/aspeed into arm/defconfig
> Merge tag 'imx-defconfig-5.4' of
> git://git.kernel.org/.../shawnguo/linux into arm/defconfig
> Merge tag 'arm-soc/for-5.4/defconfig' of
> https://github.com/Broadcom/stblinux into arm/defconfig
> Merge tag 'arm-soc/for-5.4/defconfig-arm64' of
> https://github.com/Broadcom/stblinux into arm/defconfig
> Merge tag 'qcom-arm64-defconfig-for-5.4' of
> git://git.kernel.org/.../qcom/linux into arm/defconfig
> Merge tag 'qcom-defconfig-for-5.4' of
> git://git.kernel.org/.../qcom/linux into arm/defconfig
> Merge tag 'qcom-drivers-for-5.4' of
> git://git.kernel.org/.../qcom/linux into arm/defconfig
> Merge tag 'samsung-defconfig-5.4' of
> git://git.kernel.org/.../krzk/linux into arm/defconfig
> Merge tag 'armsoc-defconfig' of git://git.kernel.org/.../soc/soc
> into for-next
>
> Christian Gmeiner (1):
> arm64: defconfig: CONFIG_DRM_ETNAVIV=m
>
> Christophe Kerello (1):
> ARM: multi_v7_defconfig: add FMC2 NAND controller support
>
> Clément Péron (2):
> arm64: defconfig: Enable IR SUNXI option
> arm64: defconfig: Enable Sun4i SPDIF module
>
> Dinh Nguyen (1):
> arm64: defconfig: Enable the DesignWare watchdog
>
> Fabio Estevam (1):
> ARM: imx_v6_v7_defconfig: Select the OV5645 camera driver
>
> Fabrice Gasnier (1):
> ARM: multi_v7_defconfig: enable STM32 booster regulator
>
> Florian Fainelli (2):
> Merge tag 'tags/bcm2835-defconfig-next-2019-08-15' into defconfig/next
> Merge tag 'tags/bcm2835-defconfig-64-next-2019-08-15' into
> defconfig-arm64/next
>
> Joel Stanley (3):
> ARM: configs: aspeed: Refresh defconfigs
> ARM: configs: multi_v7: Add ASPEED G6
> ARM: configs: aspeed_g5: Enable AST2600
>
> Jordan Crouse (2):
> ARM: qcom_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
> arm64: defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
>
> Lee Jones (3):
> arm64: defconfig: Enable Qualcomm GENI based I2C controller
> arm64: defconfig: Enable the EFI Framebuffer
> arm64: defconfig: Enable Qualcomm QUSB2 PHY
>
> Leonard Crestez (1):
> arm64: defconfig: Build imx8 ddr pmu as module
>
> Lorenzo Pieralisi (2):
> arm64: defconfig: Enable the PSCI CPUidle driver
> ARM: imx_v6_v7_defconfig: Enable the PSCI CPUidle driver
>
> Marc Gonzalez (1):
> arm64: defconfig: Enable CPU clock drivers for Qualcomm msm8916
>
> Marek Szyprowski (2):
> ARM: exynos_defconfig: Enable AHCI-platform SATA driver
> ARM: multi_v7_defconfig: Make MAX77802 regulator driver built-in
>
> Nicolas Saenz Julienne (2):
> ARM: defconfig: enable cpufreq driver for RPi
> arm64: defconfig: enable cpufreq support for RPi3
>
> Patrice Chotard (2):
> ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
> ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
>
> Robin Gong (1):
> arm64: defconfig: Enable SDMA on i.mx8mq/8mm
>
> Vinod Koul (1):
> arm64: defconfig: Enable SM8150 GCC and pinctrl driver
>
> William A. Kennington III (1):
> ARM: configs: aspeed: Enable commonly used network functionality
>
> Zhou Wang (1):
> arm64: defconfig: Enable CONFIG_ACPI_APEI_PCIEAER
>
> arch/arm/configs/aspeed_g4_defconfig | 50 +++++++++++---------------
> arch/arm/configs/aspeed_g5_defconfig | 68 ++++++++++++++++++++----------------
> arch/arm/configs/bcm2835_defconfig | 9 +++++
> arch/arm/configs/exynos_defconfig | 5 ++-
> arch/arm/configs/imx_v6_v7_defconfig | 2 ++
> arch/arm/configs/multi_v7_defconfig | 27 +++++++++++++-
> arch/arm/configs/qcom_defconfig | 1 +
> arch/arm64/configs/defconfig | 22 ++++++++++++
> 8 files changed, 123 insertions(+), 61 deletions(-)
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [GIT PULL 4/5] ARM: DT updates for v5.4
From: Arnd Bergmann @ 2019-09-16 16:40 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a3ArYx8LUbYhjTw2wOEZgK9mJOE_PaLzuZTfn29Z5+K3Q@mail.gmail.com>
The following changes since commit d45331b00ddb179e291766617259261c112db872:
Linux 5.3-rc4 (2019-08-11 13:26:41 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/armsoc-dt
for you to fetch changes up to 44acee207844789514233341ccbb3ec5086a6f7b:
arm64: dts: qcom: Add Lenovo Yoga C630 (2019-09-05 17:55:29 +0200)
----------------------------------------------------------------
ARM: DT updates for v5.4
This is another huge branch with close to 450 changessets related to
devicetree files, roughly half of this for 32-bit and 64-bit respectively.
There are lots of cleanups and additional hardware support for platforms
we already support based on SoCs from Renesas, ST-Microelectronics,
Intel/Altera, Rockchips, Allwinner, Broadcom and other manufacturers.
A total of 6 new SoCs and 37 new boards gets added this time, one more
SoC will come in a follow-up branch. Most of the new boards are for
64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7.
Going more into details for SoC platforms with new hardware support:
The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone platform,
usually paired with an external 5G modem. So far we only support the
Qualcomm SM8150 MTP reference platform, but no actual products.
For the slightly older Qualcomm platforms, support for several interesting
products is getting added: Three laptops based on Snapdragon 835/MSM8998
(Asus NovaGo, HP Envy X2 and Lenovo Miix 630), one laptop based on
Snapdragon 850/sdm850 (Lenovo Yoga C630) and several phones based on
the older Snapdragon 410/MSM8916 (Samsung A3 and A5, Longcheer L8150
aka Android One 2nd gen "seed" aka Wileyfox Swift).
Mediatek MT7629 is a new wireless network router chip, similar to
the older MT7623. It gets added together with the reference board
implementation.
Allwinner V3 is a repackaged version of the existing low-end V3s chip,
and is used in the tiny Lichee Pi Zero plus, also added here. There is
also a new TV set-top box based on Allwinner H6, the Tanix TX6, and the
eMMC variant of the Olimex A64-Olinuxino development board.
NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC family,
similar to the i.MX8M Mini. As usual, there is a large number of new
boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML, SolidRun Hummingboard
Pulse baseboard and System-on-Module, Boundary Devices i.MX8MQ Nitrogen8M,
and TechNexion PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit,
we get the Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC
phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight
Innovations i.MX7 RMU2 board.
In a different NXP product line, the Layerscape LS1046A "Freeway"
reference board gets added.
Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from their
set-top-box line and smart speaker with newer CPU and GPU cores compared
to their predecessors. Both are now also supported by the Khadas VIM3
development board series, and the dts files for that get reorganized a
bit to better deal with all variants. Another board based on SM1 that
gets added is the SEI Robotics SEI610.
There are a handful of new x86 and Power9 server boards using Aspeed BMC
chips that are gaining support for running Linux on the BMC through the
OpenBMC project: Facebook Minipack/Wedge100/Wedge40, Lenovo Hr855xg2,
and Mihawk. Notably these are still new machines using SoCs based on
the ARM9 and ARM11 CPU cores, as support for the new Cortex-A7 based
AST2600 is still ramping up.
There are three new end-user products using 32-bit Rockchips SoCs:
Mecer Xtreme Mini S6 is an Android "mini PC" box based on the low-end
RK3229 chip, while the two AOpen products Chromebox Mini (Fievel) and
Chromebase Mini (Tiger) run ChromeOS and are meant for commercial settings
(digital signage, PoS, ...).
One more single-board computer based on the popular 64-bit RK3399 is
added: the Leez RK3399 P710.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----------------------------------------------------------------
Abel Vesa (1):
arm64: dts: imx8mm: Init rates and parents configs for clocks
Adam Ford (1):
ARM: dts: da850-evm: Use generic jedec, spi-nor for flash
Alexandre Belloni (1):
ARM: dts: pbab01: correct rtc vendor
Alexandre Mergnat (13):
clk: meson: g12a: fix hifi typo in mali parent_names
clk: meson: axg-audio: migrate to the new parent description method
clk: meson: g12a-aoclk: migrate to the new parent description method
clk: meson: gxbb-aoclk: migrate to the new parent description method
clk: meson: axg-aoclk: migrate to the new parent description method
clk: meson: remove ao input bypass clocks
clk: meson: g12a: migrate to the new parent description method
clk: meson: gxbb: migrate to the new parent description method
clk: meson: axg: migrate to the new parent description method
clk: meson: meson8b: migrate to the new parent description method
clk: meson: clk-regmap: migrate to new parent description method
clk: meson: remove ee input bypass clocks
clk: meson: remove clk input helper
Alexandre Torgue (1):
ARM: dts: stm32: remove useless pinctrl entries in stm32mp157-pinctrl
Andra Danciu (1):
dt-bindings: arm: fsl: Add the pico-pi-imx8m board
Andrew Jeffery (2):
ARM: dts: aspeed: Describe SD controllers
ARM: dts: aspeed: Enable first MMC slot on AST2500 EVB
Andrew Peng (1):
ARM: dts: aspeed: Add Lenovo Hr855xg2 BMC
Andrey Smirnov (8):
dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board
ARM: dts: Add ZII support for ZII i.MX7 RMU2 board
ARM: dts: vf610-zii-spb4: Drop unused pinctrl_i2c1 pinmux config
ARM: dts: vf610-zii-scu4-aib: Fix pinctrl_i2c1's identation
ARM: dts: vf610-zii-scu4-aib: Drop unused pinctrl_i2c3 pinmux config
ARM: vf610-zii-cfu1: Add node for switch watchdog
ARM: dts: vf610-zii-cfu1: Slow I2C0 down to 100 kHz
ARM: dts: vf610-zii-scu4-aib: Configure IRQ line for GPIO expander
Andrius Štikonas (2):
arm64: dts: rockchip: Add PWM fan for RockPro64
arm64: dts: rockchip: enable internal SPI flash for RockPro64.
André Draszik (2):
ARM: dts: imx7d: cl-som-imx7: make ethernet work again
ARM: dts: imx7d: cl-som-imx7: add compatible for phy
Andy Yan (1):
arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC
Anson Huang (24):
ARM: dts: imx6sx: move GIC to right location in DT
ARM: dts: imx6sl: move GIC to right location in DT
ARM: dts: imx6ul: move GIC to right location in DT
ARM: dts: imx6sll: move GIC to right location in DT
dt-bindings: imx: Add clock binding doc for i.MX8MN
clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
clk: imx: Add API for clk unregister when driver probe fail
clk: imx: Add support for i.MX8MN clock driver
arm64: dts: imx8mq: Add gpio-ranges property
arm64: dts: imx8mm: Add gpio-ranges property
arm64: dts: imx8mm: Add "fsl,imx8mq-src" as src's fallback compatible
arm64: dts: imx8mm: Correct OPP table according to latest datasheet
arm64: dts: imx8mq: Correct OPP table according to latest datasheet
arm64: dts: imx8mq: Add clock for TMU node
arm64: dts: imx8mq: Add opp-suspend property to OPP table
arm64: dts: imx8mm: Add opp-suspend property to OPP table
dt-bindings: arm: imx: Add the soc binding for i.MX8MN
arm64: dts: imx8mm: Enable cpu-idle driver
arm64: dts: freescale: Add i.MX8MN dtsi support
arm64: dts: imx8mn: Add gpio-ranges property
arm64: dts: freescale: Add i.MX8MN DDR4 EVK board support
arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support
arm64: dts: imx8mn: Add cpu-freq support
Arnd Bergmann (38):
Merge tag 'ux500-dts-v5.4-1' of
git://git.kernel.org/.../linusw/linux-stericsson into arm/dt
Merge tag 'renesas-dt-bindings-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/dt
Merge tag 'stm32-dt-for-v5.4-1' of
git://git.kernel.org/.../atorgue/stm32 into arm/dt
Merge tag 'gemini-dts-v5.4-1' of
git://git.kernel.org/.../linusw/linux-nomadik into arm/dt
Merge tag 'renesas-arm64-dt-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/dt
Merge tag 'juno-update-5.4' of
git://git.kernel.org/.../sudeep.holla/linux into arm/dt
Merge tag 'vexpress-dt-updates-5.4' of
git://git.kernel.org/.../sudeep.holla/linux into arm/dt
Merge tag 'samsung-dt-5.4' of
git://git.kernel.org/.../krzk/linux into arm/dt
Merge tag 'v5.4-rockchip-dts32-1' of
git://git.kernel.org/.../mmind/linux-rockchip into arm/dt
Merge tag 'v5.4-rockchip-dts64-1' of
git://git.kernel.org/.../mmind/linux-rockchip into arm/dt
Merge tag 'socfpga_dts_updates_for_v5.4' of
git://git.kernel.org/.../dinguyen/linux into arm/dt
Merge tag 'amlogic-dt' of
git://git.kernel.org/.../khilman/linux-amlogic into arm/dt
Merge tag 'amlogic-dt64' of
git://git.kernel.org/.../khilman/linux-amlogic into arm/dt
Merge tag 'renesas-arm-dt-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/dt
Merge tag 'renesas-arm64-dt-for-v5.4-tag2' of
git://git.kernel.org/.../geert/renesas-devel into arm/dt
Merge tag 'renesas-dt-bindings-for-v5.4-tag2' of
git://git.kernel.org/.../geert/renesas-devel into arm/dt
Merge tag 'sunxi-dt-for-5.4-1' of
git://git.kernel.org/.../sunxi/linux into arm/dt
Merge tag 'v5.3-next-dts32' of
git://git.kernel.org/.../matthias.bgg/linux into arm/dt
Merge tag 'v5.3-next-dts64' of
git://git.kernel.org/.../matthias.bgg/linux into arm/dt
Merge tag 'omap-for-v5.4/dt-take2-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/dt
Merge tag 'aspeed-5.4-devicetree' of
git://git.kernel.org/.../joel/aspeed into arm/dt
Merge tag 'imx-bindings-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/dt
Merge tag 'imx-dt-clkdep-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/dt
Merge tag 'imx-dt-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/dt
Merge tag 'imx-dt64-5.4' of
git://git.kernel.org/.../shawnguo/linux into arm/dt
Merge tag 'at91-5.4-dt' of git://git.kernel.org/.../at91/linux into arm/dt
Merge tag 'mvebu-dt-5.4-1' of
git://git.infradead.org/linux-mvebu into arm/dt
Merge tag 'mvebu-dt64-5.4-1' of
git://git.infradead.org/linux-mvebu into arm/dt
Merge tag 'ux500-dts-v5.4-3' of
git://git.kernel.org/.../linusw/linux-stericsson into arm/dt
Merge tag 'amlogic-dt64-2.1' of
git://git.kernel.org/.../khilman/linux-amlogic into arm/dt
Merge tag 'bitmain-soc-5.4' of
git://git.kernel.org/.../mani/linux-bitmain into arm/dt
Merge tag 'davinci-for-v5.4/dt' of
git://git.kernel.org/.../nsekhar/linux-davinci into arm/dt
Merge tag 'qcom-arm64-for-5.4' of
git://git.kernel.org/.../qcom/linux into arm/dt
Merge tag 'arm-soc/for-5.4/devicetree' of
https://github.com/Broadcom/stblinux into arm/dt
Merge tag 'samsung-dt-5.4-2' of
git://git.kernel.org/.../krzk/linux into arm/dt
Merge tag 'aspeed-5.4-devicetree-2' of
git://git.kernel.org/.../joel/aspeed into arm/dt
Merge tag 'v5.4-rockchip-dts32-2' of
git://git.kernel.org/.../mmind/linux-rockchip into arm/dt
Merge tag 'v5.4-rockchip-dts64-2' of
git://git.kernel.org/.../mmind/linux-rockchip into arm/dt
Ashish Kumar (1):
arm64: dts: ls1028a: Add esdhc node in dts
Baruch Siach (1):
dt-bindings: arm: fsl: add Hummingboard Pulse
Ben Pai (1):
ARM: dts: aspeed: Add Mihawk BMC platform
Bhushan Shah (2):
dt-bindings: i2c: mv64xxx: Add compatible for the H6 i2c node.
arm64: allwinner: h6: add I2C nodes
Biju Das (3):
arm64: dts: renesas: hihope-common: Add PCA9654 I/O expander
arm64: dts: renesas: hihope-common: Add BT support
arm64: dts: renesas: hihope-common: Add WLAN support
Bjorn Andersson (4):
arm64: dts: qcom: msm8996: Rename smmu nodes
arm64: dts: qcom: qcs404-evb: Mark WCSS clocks protected
arm64: dts: qcom: qcs404: Update memory map to v3
arm64: dts: qcom: Add Lenovo Yoga C630
Cao Van Dong (1):
dt-bindings: can: rcar_can: document r8a77470 support
Chen-Yu Tsai (2):
ARM: dts: sun8i: a83t: Enable HDMI output on Cubietruck Plus
ARM: dts: sunxi: Add mdio bus sub-node to GMAC
Christian Hewitt (12):
soc: amlogic: meson-gx-socinfo: add A311D id
dt-bindings: arm: amlogic: add support for the Khadas VIM3
arm64: dts: meson-g12b: support a311d and s922x cpu operating points
dt-bindings: arm: amlogic: fix x96-max/sei510 section in amlogic.yaml
arm64: dts: meson-g12b-khadas-vim3: add initial device-tree
arm64: dts: meson-g12b-odroid-n2: add rc-odroid keymap
arm64: dts: meson-g12a-x96-max: add rc-x96max keymap
arm64: dts: meson-gxbb-wetek-hub: add rc-wetek-hub keymap
arm64: dts: meson-gxbb-wetek-play2: add rc-wetek-play2 keymap
arm64: dts: meson-gxl-s905x-khadas-vim: use rc-khadas keymap
arm64: dts: meson-gxl-s905w-tx3-mini: add rc-tx3mini keymap
arm64: dts: meson-gxm-khadas-vim2: use rc-khadas keymap
Christophe Kerello (3):
ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
ARM: dts: stm32: add FMC2 NAND controller pins muxing on stm32mp157c-ev1
ARM: dts: stm32: enable FMC2 NAND controller on stm32mp157c-ev1
Chuanhua Han (8):
arm64: dts: ls1088a: Revise gpio registers to little-endian
arm64: dts: ls1088a: Fix incorrect I2C clock divider
arm64: dts: ls1012a: Fix incorrect I2C clock divider
arm64: dts: ls1028a: Fix incorrect I2C clock divider
arm64: dts: lx2160a: Fix incorrect I2C clock divider
dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string
arm64: dts: ls1088a: Add the DSPI controller node
arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controller
Clément Péron (7):
ARM: dts: sunxi: Prefer A31 bindings for IR
ARM: dts: sunxi: Prefer A31 bindings for IR
arm64: dts: allwinner: h6: Add IR receiver node
arm64: dts: allwinner: h6: Enable IR on H6 boards
arm64: dts: allwinner: Add SPDIF node for Allwinner H6
arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1
arm64: dts: allwinner: Enable DDC regulator for Beelink GS1
Daniel Baluta (3):
clk: imx8: Add DSP related clocks
arm64: dts: imx8mq-evk: Unbypass audio_pll1
arm64: dts: imx8qxp: Add DSP DT node
David Lechner (1):
ARM: dts: am335x-boneblue: Use of am335x-osd335x-common.dtsi
Dinh Nguyen (5):
ARM: dts: socfpga: add the QSPI OCP reset property on arria10
ARM: dts: socfpga: add reset properties for DMA
arm64: dts: agilex/stratix10: Add reset properties for DMA
arm64: dts: stratix10: Add NAND device node
ARM: dts: socfpga: add missing reset-names for dma
Dmitry Torokhov (1):
ARM: ux500: improve BU21013 touchpad bindings
Douglas Anderson (3):
ARM: dts: rockchip: Specify rk3288-veyron-chromebook's display timings
ARM: dts: rockchip: Specify rk3288-veyron-minnie's display timings
Revert "ARM: dts: rockchip: add startup delay to rk3288-veyron
panel-regulators"
Eddie James (1):
ARM: dts: aspeed: swift: Change power supplies to version 2
Erwan Le Ray (1):
ARM: dts: stm32: fix -Wall W=1 compilation in stm32mp157 pinctrl for mcan
Ezequiel Garcia (3):
ARM: dts: imx6qdl-wandboard: Add OV5645 camera support
ARM: dts: am335x-cm-t335: Remove regulator-boot-off property
ARM: dts: omap3-n950-n9: Remove regulator-boot-off property
Fabien Dessenne (5):
ARM: dts: stm32: add m4 remoteproc support on STM32MP157c
ARM: dts: stm32: declare copro reserved memories on STM32MP157c-ed1
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157c-ed1
ARM: dts: stm32: declare copro reserved memories on STM32MP157a-dk1
ARM: dts: stm32: enable m4 coprocessor support on STM32MP157a-dk1
Fabio Estevam (4):
ARM: dts: imx7d-zii-rpu2: Remove unneeded snvs_pwrkey node
ARM: dts: imx7-colibri: Remove unneeded snvs_pwrkey node
arm64: dts: imx8mm-evk: Remove invalid properties
ARM: dts: imx6qdl-nit6xlite: Remove invalid properties
Fabrice Gasnier (8):
ARM: dts: stm32: remove fixed regulator unit address on stm32429i-eval
ARM: dts: stm32: add missing vdda-supply to adc on stm32429i-eval
ARM: dts: stm32: add missing vdda-supply to adc on stm32h743i-eval
ARM: dts: stm32: add booster for ADC analog switches on stm32mp157c
ARM: dts: stm32: add pwm cells to stm32mp157c
ARM: dts: stm32: add pwm cells to stm32f429
ARM: dts: stm32: add pwm cells to stm32f746
ARM: dts: stm32: add syscfg to ADC on stm32mp157c
Fabrizio Castro (11):
arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]
arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01]
arm64: dts: renesas: r8a774a1: Add CANFD support
arm64: dts: renesas: hihope-rzg2-ex: Enable CAN interfaces
arm64: dts: renesas: r8a774a1: Use extended audio dmac registers
arm64: dts: renesas: r8a774a1: Add SSIU support for sound
dt-bindings: can: rcar_canfd: document r8a774a1 support
dt-bindings: can: rcar_can: Complete documentation for RZ/G2[EM]
arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1
arm64: dts: renesas: r8a774c0: cat874: Add definition for 12V regulator
arm64: dts: renesas: hihope-common: Add HDMI audio support
Florian Fainelli (1):
Merge tag 'tags/bcm2835-dt-next-2019-08-15' into devicetree/next
Fugang Duan (3):
dt-bindings: serial: lpuart: add the clock requirement for imx8qxp
arm64: dts: imx8qxp: add lpuart baud clock
arm64: dts: imx8qxp: add serial alias
Gary Bisson (2):
dt-bindings: arm: imx: add imx8mq nitrogen support
arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support
Geert Uytterhoeven (6):
ARM: dts: vexpress: Add missing newline at end of file
arm64: dts: qcom: sdm845-cheza: Spelling s/conenctors/connectors/
ARM: dts: r8a7779: Use SYSC "always-on" PM Domain for HSCIF
arm64: dts: renesas: r8a77980: Fix IPMMU-VC0 base address
ARM: dts: r8a77470: Add PMU device node
arm64: dts: renesas: r8a774c0: Fix register range of display node
Govind Singh (1):
arm64: dts: qcom: qcs404: Add wifi rails in QCS404 dt node for proxy votes
Gregory CLEMENT (1):
arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
Guido Günther (3):
arm64: dts: imx8mq: Add MIPI D-PHY
arm64: dts: imx8mq-librem5: Enable MIPI D-PHY
arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
Guillaume Gardet (4):
ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board
ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250
ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow
ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board
H. Nikolaus Schaller (1):
ARM: dts: gta04: define chosen/stdout-path
Hongwei Zhang (1):
ARM: dts: aspeed: Add SGPM pinmux
Hsin-Hsiung Wang (1):
arm64: dts: mt8183: fix pwrap gic number
Icenowy Zheng (3):
dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board
ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3
Igors Makejevs (1):
arm64: dts: allwinner: a64: Add IR node
Ioana Ciornei (1):
arm64: dts: add the console node for DPAA2 platforms
Ivan Mikhaylov (2):
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
Jacopo Mondi (1):
arm64: dts: renesas: Update 'vsps' properties for readability
Jeffrey Hugo (4):
arm64: dts: qcom: Add Lenovo Miix 630
arm64: dts: qcom: Add HP Envy x2
arm64: dts: qcom: Add Asus NovaGo TP370QL
arm64: dts: qcom: msm8998: Node ordering, address cleanups
Jernej Skrabec (3):
arm64: dts: allwinner: a64: Enable IR on Orange Pi Win
dt-bindings: arm: sunxi: Add compatible for Tanix TX6 board
arm64: dts: allwinner: h6: Introduce Tanix TX6 board
Jerome Brunet (6):
ARM: dts: meson8b: add ethernet fifo sizes
Merge branch 'v5.4/dt' into v5.4/drivers
arm64: dts: meson: add ethernet fifo sizes
dt-bindings: clock: meson: add resets to the audio clock controller
arm64: dts: meson: g12a: audio clock controller provides resets
arm64: dts: meson: g12a: add reset to tdm formatters
Joel Stanley (3):
ARM: dts: aspeed: swift: Add eMMC device
ARM: dts: aspeed-g4: Add all flash chips
ARM; dts: aspeed: mihawk: File should not be executable
John Wang (1):
ARM: dts: aspeed: fp5280g2: Fix power supply address
Jon Nettleton (1):
arm64: dts: fsl: add support for Hummingboard Pulse
Jonas Karlman (1):
arm64: dts: rockchip: add rk3328 VPU node
Justin Swartz (1):
ARM: dts: add device tree for Mecer Xtreme Mini S6
Kever Yang (3):
arm64: dts: rockchip: fix vcc_host_5v regulator for usb3 host
ARM: dts: rockchip: remove rk3288 fennec board support
dt-bindings: arm: rockchip: remove reference to fennec board
Kevin Brodsky (1):
arm64: dts: fast models: Remove clcd's max-memory-bandwidth
Kevin Hilman (5):
arm64: dts: amlogic: g12 CPU timers stop in suspend
Merge tag 'clk-meson-v5.4-1' of
git://github.com/BayLibre/clk-meson into v5.4/dt64
Merge tag 'amlogic-drivers-2.1' of
https://git.kernel.org/.../khilman/linux-amlogic into v5.4/dt64-2
Merge tag 'clk-meson-dt-v5.4-3' of
git://github.com/BayLibre/clk-meson into v5.4/dt64-2
arm64: dts: meson: g12a-common: add VRTC
Krzysztof Kozlowski (8):
ARM: dts: rockchip: Cleanup style around assignment operator
ARM: dts: imx: Cleanup style around assignment operator
ARM: dts: exynos: Use space after '=' in exynos4412-itop-scp-core
dt-bindings: vendor-prefixes: Add Anvo-Systems
dt-bindings: eeprom: at25: Add Anvo ANV32E61W
dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles
ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards
ARM: dts: exynos: Remove not accurate secondary ADC compatible
Kuninori Morimoto (1):
arm64: dts: renesas: r8a77965-salvator-x(s): Enable HDMI sound
Leo Yan (1):
ARM: dts: ste: Update coresight DT bindings
Leonard Crestez (1):
arm64: dts: imx8m: Add ddr-pmu nodes
Li Jun (3):
arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REF
arm64: dts: imx8mm-evk: enable usb1 and typec support
arm64: dts: imx8mq: correct usb controller clocks
Linus Walleij (9):
ARM: dts: ux500: Fix up the thermal nodes
ARM: dts: ux500: set pull-up on STUIB STMPE IRQ line
ARM: dts: gemini: Fix up confused pin settings
ARM: dts: gemini: Switch to redboot partition parsing
ARM: dts: gemini: Mount root from mtdblock3
ARM: dts: nomadik: Set up the CS GPIO right
ARM: dts: Update the NSPIRE DTS files for DRM
ARM: dts: ux500: Drop TV-out muxgroup on HREFs
ARM: dts: ux500: Update thermal zone
Lucas Stach (1):
arm64: dts: rdu3: add UCS1002 charge controller node
Ludovic Barre (1):
ARM: dts: stm32: activate dma for qspi on stm32mp157
Malathi Gottam (1):
arm64: dts: sdm845: Add video nodes
Manivannan Sadhasivam (5):
dt-bindings: Add Vendor prefix for Einfochips
dt-bindings: arm: Document i.MX8QXP AI_ML board binding
arm64: dts: freescale: Add support for i.MX8QXP AI_ML board
arm64: dts: bitmain: Add reset controller support for BM1880 SoC
arm64: dts: bitmain: Modify pin controller memory map
Marcel Ziswiler (1):
ARM: dts: imx7-colibri: make sure module supplies are always on
Marco Felsch (2):
ARM: dts: imx6: replace simple-bus by simple-mfd for anatop
ARM: dts: imx6: drop gpmi-nand address and size cells
Marek Behún (1):
arm64: dts: marvell: armada-37xx: add mailbox node
Marek Szyprowski (5):
ARM: dts: exynos: Add port map to Exynos5250 AHCI node
ARM: dts: exynos: Move MSC power domain to the right (sorted) place
ARM: dts: exynos: Add G3D power domain to Exynos542x
ARM: dts: exynos: Add CAM power domain to Exynos5422/5800
ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks
Marek Vasut (4):
ARM: dts: socfpga: Fix up button mapping on VINING FPGA
ARM: dts: socfpga: Adjust GMAC1 clock and TXD lines skew on VINING FPGA
ARM: dts: imx53: Update LCD panel node on M53Menlo
dt-bindings: can: rcar_can: document r8a77990 support
Mars Cheng (3):
dt-bindings: mediatek: add support for mt6779 reference board
dt-bindings: mtk-uart: add mt6779 uart bindings
dt-bindings: irq: mtk, sysirq: add support for mt6779
Martin Blumenstingl (5):
ARM: dts: meson8b: add the PWM_D output pin
ARM: dts: meson8b: ec100: add the VDDEE regulator
ARM: dts: meson8b: odroidc1: add the VDDEE regulator
ARM: dts: meson8b: mxq: add the VDDEE regulator
ARM: dts: meson8b: odroidc1: use the MAC address stored in the eFuse
Martin Kaiser (9):
ARM: dts: imx25-pdk: native-mode is part of display-timings
ARM: dts: imx27 phyCARD-S: native-mode is part of display-timings
ARM: dts: imx25: mbimxsd25: native-mode is part of display-timings
ARM: dts: eukrea-mbimxsd27: native-mode is part of display-timings
ARM: dts: mbimxsd25: native-mode is part of display-timings
ARM: dts: imx27-phytec-phycore-rdk: native-mode is part of display-timings
ARM: dts: edb7211: native-mode is part of display-timings
ARM: dts: apf27dev: native-mode is part of display-timings
ARM: dts: imx25: mbimxsd25: native-mode is part of display-timings
Masahiro Yamada (1):
ARM: dts: socfpga: update to new Denali NAND binding
Matt Spinler (1):
ARM: dts: aspeed: swift: Fix FSI GPIOs
Matthias Kaehlcke (9):
ARM: dts: rockchip: Limit WiFi TX power on rk3288-veyron-jerry
ARM: dts: rockchip: move rk3288-veryon display settings into a
separate file
ARM: dts: rockchip: consolidate veyron panel and backlight settings
dt-bindings: ARM: dts: rockchip: Add bindings for
rk3288-veyron-{fievel,tiger}
ARM: dts: rockchip: add veyron-fievel board
ARM: dts: rockchip: add veyron-tiger board
ARM: dts: rockchip: A few fixes for veyron-{fievel,tiger}
ARM: dts: rockchip: Add pin names for rk3288-veyron fievel
arm64: dts: sdm845: Add dynamic CPU power coefficients
Maxime Jourdan (3):
dt-bindings: media: amlogic,vdec: add default compatible
arm64: dts: meson-gx: add video decoder entry
arm64: dts: meson: add video decoder entries
Maxime Ripard (17):
ARM: dts: sunxi: Switch to the generic PHY properties
ARM: dts: sunxi: Switch from phy to phy-handle
ARM: dts: sunxi: Unify the DE2 bus clocks order
arm64: dts: allwinner: h6: Fix SID node name
ARM: dts: sunxi: Remove simple-panel compatible
ARM: dts: sunxi: Fix the HDMI PHY name
dt-bindings: mfd: Convert Allwinner GPADC bindings to a schema
ARM: dts: sun4i: Add missing timers interrupts
ARM: dts: sun5i: Add missing timers interrupts
ARM: dts: sun6i: Add missing timers interrupts
ARM: dts: a23/a33: Change the timers compatible
ARM: dts: a83t: Change the timers compatible
ARM: dts: h3: Change the timers compatible
ARM: dts: v3s: Change the timers compatible
ARM: dts: sun7i: Add CSI0 controller
ARM: dts: sunxi: Add missing watchdog interrupts
ARM: dts: sunxi: Add missing watchdog clocks
Miquel Raynal (5):
arm64: dts: marvell: Add CP110 COMPHY clocks
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
Neil Armstrong (46):
soc: amlogic: meson-clk-measure: protect measure with a mutex
soc: amlogic: meson-clk-measure: add G12B second cluster cpu clk
clk: core: introduce clk_hw_set_parent()
clk: meson: add g12a cpu dynamic divider driver
clk: meson: g12a: add notifiers to handle cpu clock change
clk: meson: g12a: expose CPUB clock ID for G12B
arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsi
arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmux
arm64: dts: meson-g12a: add cpus OPP table
arm64: dts: meson-g12a: enable DVFS on G12A boards
arm64: dts: meson-g12b: add cpus OPP tables
dt-bindings: arm: amlogic: add bindings for G12B based S922X SoC
dt-bindings: arm: amlogic: add bindings for the Amlogic G12B
based A311D SoC
arm64: dts: meson-g12b-odroid-n2: enable DVFS
soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs
dt-bindings: soc: amlogic: clk-measure: Add SM1 compatible
soc: amlogic: clk-measure: Add support for SM1
dt-bindings: arm: amlogic: add SM1 bindings
dt-bindings: arm: amlogic: add SEI Robotics SEI610 bindings
arm64: dts: add support for SM1 based SEI Robotics SEI610
dt-bindings: clk: meson: add sm1 periph clock controller bindings
soc: amlogic: Add support for Everything-Else power domains controller
dt-bindings: power: add Amlogic Everything-Else power domains bindings
arm64: dts: meson: fix ethernet mac reg format
arm64: dts: meson-gx: drop the vpu dmc memory cell
arm64: dts: meson-gx: fix reset controller compatible
arm64: dts: meson-gx: fix spifc compatible
arm64: dts: meson-gx: fix watchdog compatible
arm64: dts: meson-gx: fix mhu compatible
arm64: dts: meson-gx: fix periphs bus node name
arm64: dts: meson-gxl: fix internal phy compatible
arm64: dts: meson-axg: fix MHU compatible
arm64: dts: meson-g12a: fix reset controller compatible
arm64: dts: meson-g12a-x96-max: fix compatible
arm64: dts: meson-gxbb-nanopi-k2: add missing model
arm64: dts: meson-gxbb-p201: fix snps, reset-delays-us format
arm64: dts: meson: fix boards regulators states format
arm64: dts: meson-g12: add Everything-Else power domain controller
arm64: dts: meson-sm1-sei610: add HDMI display support
arm64: dts: meson-sm1-sei610: add USB support
arm64: dts: meson-sm1-sei610: enable DVFS
arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi
dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings
arm64: dts: khadas-vim3: add support for the SM1 based VIM3L
arm64: dts: meson-sm1-sei610: enable DVFS
arm64: dts: meson-sm1-sei610: add stdout-path property back
Niklas Söderlund (1):
dt-bindings: rcar-{csi2,vin}: Rename bindings documentation files
Nishka Dasgupta (1):
soc: amlogic: meson-gx-socinfo: Add of_node_put() before return
Oleksandr Suvorov (1):
ARM: dts: imx7-colibri: add recovery for I2C for iMX7
Olivier Moysan (1):
ARM: dts: stm32: add audio codec support on stm32mp157a-dk1 board
Ondrej Jirman (3):
arm64: dts: allwinner: orange-pi-3: Enable HDMI output
arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree
arm64: dts: allwinner: orange-pi-3: Enable WiFi
Oscar A Perez (1):
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
Philippe Schenker (3):
ARM: dts: imx7-colibri: prepare module device tree for FlexCAN
ARM: dts: imx7-colibri: Add sleep pinctrl to ethernet
ARM: dts: imx6qdl-colibri: add phy to fec
Pramod Kumar (2):
dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board
arm64: dts: nxp: add ls1046a-frwy board support
Qii Wang (1):
arm64: dts: mt8183: add I2C nodes
Richard Hu (1):
arm64: dts: fsl: pico-pi: Add a device tree for the PICO-PI-IMX8M
Rob Herring (1):
ARM: dts: at91: Avoid colliding 'display' node and property names
Robin Gong (3):
ARM: dts: imx6ul: add dma support on ecspi
ARM: dts: imx6sll: correct sdma compatible
ARM: dts: imx7ulp: add edma device node
Ryder Lee (1):
arm: dts: mediatek: add basic support for MT7629 SoC
Sai Prakash Ranjan (3):
arm64: dts: sdm845: Add device node for Last level cache controller
arm64: dts: qcom: sdm845: Add Coresight support
arm64: dts: qcom: msm8998: Add Coresight support
Sean Paul (1):
arm64: dts: rockchip: Specify override mode for kevin panel
Shawn Lin (1):
arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328
Simon Horman (3):
dt-bindings: Rename file of DT bindings for Renesas memory controllers
dt-bindings: rcar-imr: Rename bindings documentation file
arm64: dts: renesas: ebisu, draak: Limit EtherAVB to 100Mbps
Song Hui (2):
arm64: dts: ls1028a: fix gpio nodes
arm64: dts: ls1088a: update gpio compatible
Srinivas Kandagatla (1):
arm64: sdm845: add adsp and cdsp fastrpc nodes
Stanimir Varbanov (1):
arm64: dts: qcom: msm8996: Add Venus video codec DT node
Stefan Agner (1):
ARM: dts: imx7-colibri: disable HS400
Stefan Riedmueller (10):
ARM: dts: imx6ul: phyboard-segin: Rename dts to PHYTEC name scheme
ARM: dts: imx6ul: segin: Add boot media to dts filename
ARM: dts: imx6ul: segin: Reduce eth drive strength
ARM: dts: imx6ul: segin: Fix LED naming for phyCORE and PEB-EVAL-01
ARM: dts: imx6ul: segin: Make FEC and ethphy configurable in dts
ARM: dts: imx6ul: segin: Only enable NAND if it is populated
ARM: dts: imx6ul: phycore: Add eMMC at usdhc2
ARM: dts: imx6ul: segin: Move ECSPI interface to board include file
ARM: dts: imx6ul: segin: Move machine include to dts files
ARM: dts: imx6ull: Add support for PHYTEC phyBOARD-Segin with i.MX 6ULL
Stefan Wahren (4):
ARM: bcm283x: Reduce register ranges for UART, SPI and I2C
ARM: dts: bcm283x: Define MMC interfaces at board level
ARM: dts: bcm283x: Define memory at board level
ARM: dts: bcm283x: Enable HDMI at board level
Stephan Gerhold (6):
dt-bindings: vendor-prefixes: Add Longcheer Technology Co., Ltd.
dt-bindings: qcom: Document bindings for new MSM8916 devices
arm64: dts: qcom: Add device tree for Samsung Galaxy A3U/A5U
arm64: dts: qcom: Add device tree for Longcheer L8150
ARM: dts: ux500: Move ab8500 nodes to ste-ab8500.dtsi
ARM: dts: ux500: Remove ab8500_ldo_usb regulator from device tree
Sudeep Holla (1):
ARM: dts: vexpress: add missing SPDX GPL-2.0 license identifier
Sunil Mohan Adapa (2):
dt-bindings: arm: sunxi: Add compatible for A64 OlinuXino with eMMC
arm64: dts: allwinner: a64: Add A64 OlinuXino board (with eMMC)
Sven Van Asbroeck (1):
dt-bindings: bus: imx-weim: document optional burst clock mode
Sébastien Szymanski (2):
ARM: dts: opos6uldev: use OF graph to describe the display
ARM: dts: imx6ul: Add csi node
Takeshi Kihara (1):
arm64: dts: renesas: r8a77990: Add cpg reset for DU
Tao Ren (3):
ARM: dts: aspeed: Add Facebook Minipack BMC
ARM: dts: aspeed: Add Facebook Wedge40 BMC
ARM: dts: aspeed: Add Facebook Wedge100 BMC
Thara Gopinath (1):
arm64: dts: qcom: Extend AOSS QMP node
Ulrich Hecht (2):
dt-bindings: can: rcar_can: document r8a77995 support
dt-bindings: can: rcar_canfd: document r8a77995 support
Uwe Kleine-König (11):
dt-bindings: add vendor prefix "acme" for "Acme Systems srl"
ARM: dts: at91: Add label for sam9x5's internal RTC
ARM: dts: at91: ariag25: Style cleanup
ARM: dts: at91: ariettag25: style cleanup
ARM: dts: at91: cosino: Style cleanup
ARM: dts: at91: kizboxmini: Style cleanup
ARM: dts: at91: at91sam9g15: Style cleanup
ARM: dts: at91: at91sam9xx5ek: Style cleanup
ARM: dts: at91: at91sam9x5_lcd.dtsi: Style cleanup
ARM: dts: at91: at91sam9x5dm.dtsi: Style cleanup
ARM: dts: kirkwood: ts219: disable the SoC's RTC
Vijay Khemka (3):
ARM: dts: aspeed: tiogapass: Add VR devices
ARM: dts: aspeed: tiogapass: Move battery sensor
ARM: dts: aspeed: tiogapass: Add Riser card
Vinod Koul (17):
arm64: dts: qcom: sdm845: Add unit name to soc node
arm64: dts: qcom: sdm845: remove unnecessary properties for dsi nodes
arm64: dts: qcom: sdm845: remove unit name for thermal trip points
arm64: dts: qcom: sdm845-cheza: remove macro from unit name
arm64: dts: qcom: sdm845: remove macro from unit name
arm64: dts: qcom: pms405: add unit name adc nodes
arm64: dts: qcom: pms405: remove reduandant properties
arm64: dts: qcom: qcs404: remove unit name for thermal trip points
arm64: dts: qcom: sm8150: Add base dts file
arm64: dts: qcom: pm8150: Add base dts file
arm64: dts: qcom: pm8150b: Add base dts file
arm64: dts: qcom: pm8150l: Add base dts file
arm64: dts: qcom: sm8150-mtp: Add base dts file
arm64: dts: qcom: sm8150-mtp: Add regulators
arm64: dts: qcom: sm8150: Add reserved-memory regions
arm64: dts: qcom: sm8150: Add apps shared nodes
arm64: dts: sdm845: Add parent clock for rpmhcc
Vivek Gautam (1):
arm64: dts: qcom: msm8996: Add Coresight support
Wen He (2):
arm64: dts: ls1028a: Add optional property node for Mali DP500
arm64: dts: ls1028a: Add properties node for Display output pixel clock
Yannick Fertré (1):
ARM: dts: stm32: add phy-dsi-supply property on stm32mp157c-ev1
Yoshihiro Kaneko (26):
arm64: dts: renesas: r8a77995: Add cpg reset for DU
arm64: dts: renesas: r8a77995: Fix register range of display node
arm64: dts: renesas: r8a7795: Sort nodes
arm64: dts: renesas: r8a7795-es1: Sort nodes
arm64: dts: renesas: r8a77965: Sort nodes
arm64: dts: renesas: r8a7795-es1: salvator-x: Sort nodes
arm64: dts: renesas: r8a7795: salvator-x: Sort nodes
arm64: dts: renesas: r8a7795: salvator-xs: Sort nodes
arm64: dts: renesas: r8a7796: salvator-x: Sort nodes
arm64: dts: renesas: r8a7796: salvator-xs: Sort nodes
arm64: dts: renesas: salvator-common: Sort nodes
arm64: dts: renesas: ulcb-kf: Sort nodes
arm64: dts: renesas: ulcb: Sort nodes
arm64: dts: renesas: r8a77970: eagle: Sort nodes
arm64: dts: renesas: r8a77970: v3msk: Sort nodes
arm64: dts: renesas: r8a77980: condor: Sort nodes
arm64: dts: renesas: r8a77980: v3hsk: Sort nodes
arm64: dts: renesas: r8a77990: ebisu: Sort nodes
arm64: dts: renesas: r8a77990: Sort nodes
arm64: dts: renesas: r8a77995: draak: Sort nodes
arm64: dts: renesas: r8a77995: Sort nodes
arm64: dts: renesas: r8a774a1: Sort nodes
arm64: dts: renesas: r8a774c0: cat874: Sort nodes
arm64: dts: renesas: r8a774c0: Sort nodes
arm64: dts: renesas: r8a7796: Sort nodes
arm64: dts: renesas: r8a77970: Sort nodes
Yuantian Tang (1):
arm64: dts: ls1028a: Add Thermal Monitor Unit node
Dirstat for brevity
0.4% Documentation/devicetree/bindings/arm/
0.0% Documentation/devicetree/bindings/bus/
0.3% Documentation/devicetree/bindings/clock/
0.0% Documentation/devicetree/bindings/eeprom/
0.0% Documentation/devicetree/bindings/i2c/
0.1% Documentation/devicetree/bindings/iio/adc/
0.0% Documentation/devicetree/bindings/interrupt-controller/
0.0% Documentation/devicetree/bindings/media/
0.4% Documentation/devicetree/bindings/mfd/
0.1% Documentation/devicetree/bindings/net/can/
0.0% Documentation/devicetree/bindings/serial/
0.0% Documentation/devicetree/bindings/spi/
0.0% Documentation/devicetree/bindings/
29.5% arch/arm/boot/dts/
1.0% arch/arm64/boot/dts/allwinner/
0.0% arch/arm64/boot/dts/altera/
19.0% arch/arm64/boot/dts/amlogic/
0.0% arch/arm64/boot/dts/arm/
0.0% arch/arm64/boot/dts/bitmain/
10.9% arch/arm64/boot/dts/freescale/
0.0% arch/arm64/boot/dts/intel/
0.4% arch/arm64/boot/dts/marvell/
0.8% arch/arm64/boot/dts/mediatek/
10.9% arch/arm64/boot/dts/qcom/
1.7% arch/arm64/boot/dts/renesas/
1.7% arch/arm64/boot/dts/rockchip/
4.8% drivers/clk/imx/
15.4% drivers/clk/meson/
0.0% drivers/clk/
0.9% include/dt-bindings/clock/
0.4% include/dt-bindings/reset/
0.0% include/linux/
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [GIT PULL 5/5] ARM: SoC: late updates for v5.4
From: Arnd Bergmann @ 2019-09-16 16:47 UTC (permalink / raw)
To: Linus Torvalds; +Cc: SoC Team, Linux ARM
In-Reply-To: <CAK8P3a3ArYx8LUbYhjTw2wOEZgK9mJOE_PaLzuZTfn29Z5+K3Q@mail.gmail.com>
This is the "late" branch, meant to be part 2.
It should all work as-is, but includes some portions of other trees as
dependencies that for a nicer git history should get merged first
(gpio, clk, irqchip). Feel free to pull it now, or wait a few days on
this one.
---
The following changes since commit 089cf7f6ecb266b6a4164919a2e69bd2f938374a:
Linux 5.3-rc7 (2019-09-02 09:57:40 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/armsoc-late
for you to fetch changes up to 2a7326caab479ca257c4b9bd67db42d1d49079bf:
ARM: dts: dir685: Drop spi-cpol from the display (2019-09-16 16:31:17 +0200)
----------------------------------------------------------------
ARM: SoC: late updates for v5.4
This is some material that we picked up into our tree late or
that had complex inter-depondencies. The fact that there are these
interdependencies tends to meant that these are often actually the most
interesting new additions:
The new Aspeed AST2600 baseboard management controller is added, this
is a Cortex-A7 based follow-up to the ARM11 based AST2500 and had some
dependencies on other device drivers.
After many years, support for the MMP2 based OLPC XO-1.75 finally makes
it into the kernel.
The Armada 3720 based Turris Mox open source router platform is a late
addition and it follows some preparatory work across multiple branches.
The OMAP2+ platform had some large-scale cleanup involving driver
changes and DT changes, here we finish it off, dropping a lot of the
now-unused platform data.
The TI K3 platform that got added for 5.3 gains a lot more support
for individual bits on the SoC, this part just came late for the
merge window.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----------------------------------------------------------------
Adam Ford (1):
ARM: dts: ARM: dts: Configure interconnect target module for am3517sgx
Andrew Jeffery (1):
ARM: dts: aspeed: Add AST2600 pinmux nodes
Anson Huang (1):
dt-bindings: reset: imx7: Add support for i.MX8MM
Arnd Bergmann (13):
Merge tag 'reset-for-v5.4' of
git://git.pengutronix.de/git/pza/linux into arm/drivers
Merge tag 'renesas-drivers-for-v5.4-tag1' of
git://git.kernel.org/.../geert/renesas-devel into arm/drivers
Merge tag 'scmi-updates-5.4' of
git://git.kernel.org/.../sudeep.holla/linux into arm/drivers
Merge tag 'tee-optee-for-5.4' of
git://git.linaro.org/people/jens.wiklander/linux-tee into arm/drivers
Merge tag 'omap-for-v5.4/ti-sysc-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/late
Merge tag 'omap-for-v5.4/ti-sysc-part2-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/late
Merge tag 'omap-for-v5.4/ti-sysc-drop-pdata-take2-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/late
Merge tag 'omap-for-v5.4/ti-sysc-sgx-signed' of
git://git.kernel.org/.../tmlind/linux-omap into arm/late
Merge tag 'ti-k3-soc-for-v5.4' of
git://git.kernel.org/.../kristo/linux into arm/late
Merge tag 'mvebu-dt64-5.4-2' of
git://git.infradead.org/linux-mvebu into arm/late
Merge tag 'samsung-soc-5.4-3' of
git://git.kernel.org/.../krzk/linux into arm/late
Merge branch 'clk/aspeed' into aspeed/dts
Merge branch 'aspeed/dt-3' into arm/late
Colin Ian King (1):
soc: fsl: fix spelling mistake "Firmaware" -> "Firmware"
Geert Uytterhoeven (1):
soc: renesas: rcar-sysc: Use [] to denote a flexible array member
Gregory CLEMENT (2):
arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
Merge remote-tracking branch 'arm-soc/arm/drivers' into HEAD
Guido Günther (1):
dt-bindings: reset: Fix typo in imx8mq resets
Gustavo Pimentel (1):
reset: Add DesignWare IP support to simple reset
Joel Stanley (4):
clk: aspeed: Add SDIO gate
clk: aspeed: Move structures to header
clk: Add support for AST2600 SoC
ARM: dts: aspeed: Add AST2600 and EVB
Krzysztof Kozlowski (1):
MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem
and clock drivers
Lihua Yao (1):
ARM: samsung: Fix system restart on S3C6410
Linus Walleij (2):
ARM: samsung: Include GPIO driver header
ARM: dts: dir685: Drop spi-cpol from the display
Lokesh Vutla (9):
firmware: ti_sci: Allow for device shared and exclusive requests
dt-bindings: ti_sci_pm_domains: Add support for exclusive and
shared access
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
arm64: dts: ti: k3-am654: Update the power domain cells
arm64: dts: ti: k3-j721e: Update the power domain cells
arm64: dts: ti: k3-j721e: Add gpio nodes in main domain
arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain
arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
Lubomir Rintel (6):
ARM: dts: mmp2: trivial whitespace fix
ARM: dts: mmp2: fix the SPI nodes
ARM: dts: mmp2: add camera interfaces
ARM: dts: mmp2: specify reg-shift for the UARTs
ARM: dts: mmp2: rename the USB PHY node
ARM: dts: mmp2: add OLPC XO 1.75 machine
Luis Oliveira (1):
dt-bindings: Document the DesignWare IP reset bindings
Marek Behún (9):
bus: Add support for Moxtet bus
dt-bindings: bus: Document moxtet bus binding
bus: moxtet: Add sysfs and debugfs documentation
drivers: gpio: Add support for GPIOs over Moxtet bus
dt-bindings: gpio: Document GPIOs via Moxtet bus
arm64: dts: marvell: armada-37xx: add mailbox node
arm64: dts: marvell: armada-37xx: add SPI CS1 pinctrl
dt-bindings: marvell: document Turris Mox compatible
arm64: dts: marvell: add DTS for Turris Mox
Marek Szyprowski (1):
ARM: exynos: Enable support for ARM architected timers
Masahiro Yamada (1):
ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c
Miquel Raynal (5):
arm64: dts: marvell: Add CP110 COMPHY clocks
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
Neil Armstrong (3):
reset: reset-meson: update with SPDX Licence identifier
dt-bindings: reset: amlogic,meson-gxbb-reset: update with SPDX
Licence identifier
dt-bindings: reset: amlogic,meson8b-reset: update with SPDX
Licence identifier
Nikhil Devshatwar (1):
arm64: dts: k3-j721e: Add gpio-keys on common processor board
Nishka Dasgupta (1):
bus: ti-sysc: Change return types of functions
Olof Johansson (1):
Merge tag 'soc-fsl-next-v5.3-2' of
git://git.kernel.org/.../leo/linux into arm/drivers
Pankaj Dubey (1):
ARM: exynos: Enable exynos-chipid driver
Rasmus Villemoes (6):
soc: fsl: qe: drop useless static qualifier
soc: fsl: qe: reduce static memory footprint by 1.7K
soc: fsl: qe: introduce qe_get_device_node helper
dt-bindings: soc: fsl: qe: document new fsl,qe-snums binding
soc: fsl: qe: support fsl,qe-snums property
soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_init
Rouven Czerwinski (1):
tee: optee: add might_sleep for RPC requests
Sudeep Holla (22):
firmware: arm_scmi: Use the correct style for SPDX License Identifier
firmware: arm_scmi: Align few names in sensors protocol with
SCMI specification
firmware: arm_scmi: Remove extra check for invalid length
message responses
firmware: arm_scmi: Fix few trivial typos in comments
firmware: arm_scmi: Use the term 'message' instead of 'command'
firmware: arm_scmi: Check if platform has released shmem before using
firmware: arm_scmi: Reorder some functions to avoid forward declarations
firmware: arm_scmi: Segregate tx channel handling and prepare to add rx
firmware: arm_scmi: Add receive channel support for notifications
firmware: arm_scmi: Separate out tx buffer handling and prepare to add rx
firmware: arm_scmi: Add mechanism to unpack message headers
firmware: arm_scmi: Add support for asynchronous commands and
delayed response
firmware: arm_scmi: Drop async flag in sensor_ops->reading_get
firmware: arm_scmi: Add asynchronous sensor read if it supports
firmware: arm_scmi: Drop config flag in clk_ops->rate_set
firmware: arm_scmi: Use asynchronous CLOCK_RATE_SET when possible
firmware: arm_scmi: Use {get,put}_unaligned_le{32,64} accessors
firmware: arm_scmi: Add discovery of SCMI v2.0 performance fastchannels
firmware: arm_scmi: Make use SCMI v2.0 fastchannel for
performance protocol
dt-bindings: arm: Extend SCMI to support new reset protocol
firmware: arm_scmi: Add RESET protocol in SCMI v2.0
reset: Add support for resets provided by SCMI
Suman Anna (8):
MAINTAINERS: Add ti-sysc files under the OMAP2+ entry
dt-bindings: ti-sysc: Add SPDX license identifier
bus: ti-sysc: Switch to SPDX license identifier
bus: ti-sysc: Add missing kerneldoc comments
arm64: dts: ti: k3-am65-main: Add hwspinlock node
arm64: dts: ti: k3-j721e-main: Add hwspinlock node
arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
Tero Kristo (3):
bus: ti-sysc: re-order the clkdm control around reset handling
bus: ti-sysc: rework the reset handling
bus: ti-sysc: allow reset sharing across devices
Tony Lindgren (19):
bus: ti-sysc: Add module enable quirk for SGX on omap36xx
bus: ti-sysc: Detect d2d when debug is enabled
ARM: dts: Add fck for cpsw mdio for omap variants
ARM: OMAP2+: Drop legacy platform data for cpsw on am3 and am4
ARM: OMAP2+: Drop legacy platform data for cpsw on dra7
ARM: dts: Drop custom hwmod property for omap4 i2c
ARM: OMAP2+: Drop legacy watchdog platform data for omap4
ARM: dts: Configure d2d dts data for omap4
ARM: OMAP2+: Drop legacy platform data for omap4 d2d
ARM: OMAP2+: Drop legacy platform data for omap4 gpu
clk: ti: add clkctrl data omap5 sgx
ARM: dts: Configure sgx for omap5
ARM: dts: Configure interconnect target module for omap3 sgx
ARM: OMAP2+: Drop legacy platform data for dra7 mcspi
ARM: OMAP2+: Drop legacy platform data for dra7 mcasp
ARM: dts: Drop legacy custom hwmods property for dra7 uart
ARM: dts: Drop legacy custom hwmods property for dra7 i2c
ARM: dts: Drop legacy custom hwmods property for dra7 mmc
ARM: dts: Drop legacy custom hwmods property for dra7 gpio
YueHaibing (1):
bus: ti-sysc: remove set but not used variable 'quirks'
Documentation/ABI/testing/debugfs-moxtet | 23 +
Documentation/ABI/testing/sysfs-bus-moxtet-devices | 17 +
Documentation/devicetree/bindings/arm/arm,scmi.txt | 17 +
.../bindings/arm/marvell/armada-37xx.txt | 8 +
Documentation/devicetree/bindings/bus/moxtet.txt | 46 +
.../devicetree/bindings/gpio/gpio-moxtet.txt | 18 +
.../devicetree/bindings/reset/fsl,imx7-src.txt | 6 +-
.../devicetree/bindings/reset/snps,dw-reset.txt | 30 +
.../devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 13 +-
.../devicetree/bindings/soc/ti/sci-pm-domain.txt | 11 +-
MAINTAINERS | 25 +-
arch/arm/boot/dts/Makefile | 4 +-
arch/arm/boot/dts/am33xx-l4.dtsi | 4 +-
arch/arm/boot/dts/am3517.dtsi | 24 +
arch/arm/boot/dts/am437x-l4.dtsi | 6 +-
arch/arm/boot/dts/aspeed-ast2600-evb.dts | 80 ++
arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 1154 ++++++++++++++++++++
arch/arm/boot/dts/aspeed-g6.dtsi | 261 +++++
arch/arm/boot/dts/dra7-l4.dtsi | 43 +-
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 1 -
arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts | 244 +++++
arch/arm/boot/dts/mmp2.dtsi | 48 +-
arch/arm/boot/dts/omap34xx.dtsi | 26 +
arch/arm/boot/dts/omap36xx.dtsi | 28 +
arch/arm/boot/dts/omap4-l4-abe.dtsi | 1 -
arch/arm/boot/dts/omap4-l4.dtsi | 39 +-
arch/arm/boot/dts/omap4.dtsi | 1 -
arch/arm/boot/dts/omap5.dtsi | 23 +
arch/arm/boot/dts/omap54xx-clocks.dtsi | 14 +
arch/arm/mach-exynos/Kconfig | 2 +
.../mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 3 -
.../omap_hwmod_33xx_43xx_interconnect_data.c | 6 -
.../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 50 -
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 9 -
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 9 -
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 168 ---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 475 --------
arch/arm/mach-s3c64xx/setup-usb-phy.c | 5 +
arch/arm/plat-samsung/include/plat/gpio-core.h | 1 +
arch/arm/plat-samsung/include/plat/usb-phy.h | 2 -
arch/arm/plat-samsung/watchdog-reset.c | 1 +
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../boot/dts/marvell/armada-3720-turris-mox.dts | 840 ++++++++++++++
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 12 +
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 37 +-
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +-
arch/arm64/boot/dts/marvell/armada-8040-db.dts | 43 +-
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi | 38 +-
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 5 +-
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +
arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 13 +
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 52 +-
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 10 +-
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 6 +-
arch/arm64/boot/dts/ti/k3-am65.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 +
.../boot/dts/ti/k3-j721e-common-proc-board.dts | 69 ++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 160 ++-
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 40 +-
arch/arm64/boot/dts/ti/k3-j721e.dtsi | 1 +
drivers/bus/Kconfig | 10 +
drivers/bus/Makefile | 1 +
drivers/bus/moxtet.c | 886 +++++++++++++++
drivers/bus/ti-sysc.c | 101 +-
drivers/clk/Makefile | 1 +
drivers/clk/clk-aspeed.c | 78 +-
drivers/clk/clk-aspeed.h | 82 ++
drivers/clk/clk-ast2600.c | 704 ++++++++++++
drivers/clk/clk-scmi.c | 2 +-
drivers/clk/ti/clk-54xx.c | 34 +
drivers/firmware/arm_scmi/Makefile | 2 +-
drivers/firmware/arm_scmi/base.c | 2 +-
drivers/firmware/arm_scmi/clock.c | 33 +-
drivers/firmware/arm_scmi/common.h | 18 +-
drivers/firmware/arm_scmi/driver.c | 366 ++++---
drivers/firmware/arm_scmi/perf.c | 264 ++++-
drivers/firmware/arm_scmi/power.c | 6 +-
drivers/firmware/arm_scmi/reset.c | 231 ++++
drivers/firmware/arm_scmi/sensors.c | 57 +-
drivers/firmware/ti_sci.c | 45 +-
drivers/gpio/Kconfig | 9 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-moxtet.c | 179 +++
drivers/hwmon/scmi-hwmon.c | 2 +-
drivers/reset/Kconfig | 13 +-
drivers/reset/Makefile | 1 +
drivers/reset/reset-imx7.c | 12 +-
drivers/reset/reset-meson.c | 51 +-
drivers/reset/reset-scmi.c | 124 +++
drivers/reset/reset-simple.c | 3 +
drivers/soc/fsl/dpaa2-console.c | 2 +-
drivers/soc/fsl/qe/qe.c | 163 ++-
drivers/soc/renesas/rcar-sysc.c | 2 +-
drivers/soc/ti/ti_sci_pm_domains.c | 23 +-
drivers/tee/optee/call.c | 1 +
include/dt-bindings/bus/moxtet.h | 16 +
include/dt-bindings/bus/ti-sysc.h | 1 +
include/dt-bindings/clock/ast2600-clock.h | 113 ++
include/dt-bindings/clock/omap5.h | 3 +
include/dt-bindings/pinctrl/k3.h | 3 +
.../dt-bindings/reset/amlogic,meson-gxbb-reset.h | 51 +-
include/dt-bindings/reset/amlogic,meson8b-reset.h | 51 +-
include/dt-bindings/reset/imx8mq-reset.h | 34 +-
include/dt-bindings/soc/ti,sci_pm_domain.h | 9 +
include/linux/moxtet.h | 109 ++
include/linux/platform_data/ti-sysc.h | 8 +-
include/linux/scmi_protocol.h | 46 +-
include/linux/soc/ti/ti_sci_protocol.h | 3 +
include/linux/usb/samsung_usb_phy.h | 17 -
109 files changed, 6788 insertions(+), 1489 deletions(-)
create mode 100644 Documentation/ABI/testing/debugfs-moxtet
create mode 100644 Documentation/ABI/testing/sysfs-bus-moxtet-devices
create mode 100644 Documentation/devicetree/bindings/bus/moxtet.txt
create mode 100644 Documentation/devicetree/bindings/gpio/gpio-moxtet.txt
create mode 100644 Documentation/devicetree/bindings/reset/snps,dw-reset.txt
create mode 100644 arch/arm/boot/dts/aspeed-ast2600-evb.dts
create mode 100644 arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/aspeed-g6.dtsi
create mode 100644 arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts
create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
create mode 100644 drivers/bus/moxtet.c
create mode 100644 drivers/clk/clk-aspeed.h
create mode 100644 drivers/clk/clk-ast2600.c
create mode 100644 drivers/firmware/arm_scmi/reset.c
create mode 100644 drivers/gpio/gpio-moxtet.c
create mode 100644 drivers/reset/reset-scmi.c
create mode 100644 include/dt-bindings/bus/moxtet.h
create mode 100644 include/dt-bindings/clock/ast2600-clock.h
create mode 100644 include/dt-bindings/soc/ti,sci_pm_domain.h
create mode 100644 include/linux/moxtet.h
delete mode 100644 include/linux/usb/samsung_usb_phy.h
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* [REGRESSION] sdhci no longer detects SD cards on LX2160A
From: Russell King - ARM Linux admin @ 2019-09-16 17:15 UTC (permalink / raw)
To: Adrian Hunter, linux-mmc, linux-arm-kernel
Hi,
It seems that somewhere between v5.2 and v5.3, sdhci fails to detect
SD cards on the NXP LX2160A, but continues to work with eMMC.
This uses the sdhci-esdhc driver.
v5.2:
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on 2140000.esdhc [2140000.esdhc] using ADMA 64-bit
mmc1: SDHCI controller on 2150000.esdhc [2150000.esdhc] using ADMA 64-bit
mmc0: new high speed SDHC card at address aaaa
mmcblk0: mmc0:aaaa SU04G 3.69 GiB
mmc1: new HS400 MMC card at address 0001
mmcblk1: mmc1:0001 DF4064 58.2 GiB
mmcblk1boot0: mmc1:0001 DF4064 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 DF4064 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 DF4064 partition 3 4.00 MiB, chardev (247:0)
mmcblk1: p1
v5.3:
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on 2140000.esdhc [2140000.esdhc] using ADMA 64-bit
mmc1: SDHCI controller on 2150000.esdhc [2150000.esdhc] using ADMA 64-bit
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000040d8
mmc0: sdhci: Timeout: 0x00000003 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x00008098
mmc0: sdhci: Timeout: 0x00000002 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
mmc1: new HS400 MMC card at address 0001
mmcblk1: mmc1:0001 DF4064 58.2 GiB
mmcblk1boot0: mmc1:0001 DF4064 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 DF4064 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 DF4064 partition 3 4.00 MiB, chardev (247:0)
mmcblk1: p1
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000080d8
mmc0: sdhci: Timeout: 0x00000002 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000080f8
mmc0: sdhci: Timeout: 0x00000002 | Int stat: 0x00000001
mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card
The platform has an iommu, which is in pass-through mode, via
arm_smmu.disable_bypass=0.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
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^ permalink raw reply
* RE: [EXT] Re: SCMI & Devfreq
From: Sujeet Kumar Baranwal @ 2019-09-16 17:36 UTC (permalink / raw)
To: Sudeep Holla; +Cc: linux-arm-kernel@lists.infradead.org
In-Reply-To: <20190916101505.GB6109@bogus>
Ok, Sudeep. I would wait for your mail.
Regards
Sujeet
-----Original Message-----
From: Sudeep Holla <sudeep.holla@arm.com>
Sent: Monday, September 16, 2019 3:15 AM
To: Sujeet Kumar Baranwal <sbaranwal@marvell.com>
Cc: linux-arm-kernel@lists.infradead.org
Subject: Re: [EXT] Re: SCMI & Devfreq
On Mon, Sep 16, 2019 at 05:22:02AM +0000, Sujeet Kumar Baranwal wrote:
> Thanks Sudeep.
>
>>> Good, but just a quick question to check if this is ACPI or DT based
>>> platform ?
>
> DT based.
>
Good.
>>> Yes it needs some work and I do have some prototype, but with no
>>> users in the upstream, I haven't added it yet.
>>> What kind of devices are these ? There was some work around generic
>>> devfreq driver that I had seen >>on the list and my plan was to do
>>> something similar, I need to dig up details as it was while ago.
>
> These are devices needing dedicated clocks like dsp engines. There is
> a need for a userspace dev governor controlling the frequency in
> different situation.
Okay, thanks for the info.
> Could you please share your patches and any instructions if needed.
>
It needs some polishing before I post them externally, they are still hackish. I will do soonish.
--
Regards,
Sudeep
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* Re: [PATCH] iommu/arm-smmu: Report USF more clearly
From: Will Deacon @ 2019-09-16 18:00 UTC (permalink / raw)
To: Doug Anderson
Cc: list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, ,
Robin Murphy,
list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, ,
Linux ARM
In-Reply-To: <CAD=FV=XPi+DCwg2DWbZkXQGTpxWy=vWa1LQR=zHZr93WKjCmzA@mail.gmail.com>
On Fri, Sep 13, 2019 at 03:44:12PM -0700, Doug Anderson wrote:
> On Fri, Sep 13, 2019 at 4:48 AM Robin Murphy <robin.murphy@arm.com> wrote:
> >
> > Although CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is a welcome tool
> > for smoking out inadequate firmware, the failure mode is non-obvious
> > and can be confusing for end users. Add some special-case reporting of
> > Unidentified Stream Faults to help clarify this particular symptom.
> >
> > CC: Douglas Anderson <dianders@chromium.org>
>
> nit that I believe that "Cc" (lowercase 2nd c) is correct.
>
> > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> > ---
> > drivers/iommu/arm-smmu.c | 5 +++++
> > drivers/iommu/arm-smmu.h | 2 ++
> > 2 files changed, 7 insertions(+)
> >
> > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > index b7cf24402a94..76ac8c180695 100644
> > --- a/drivers/iommu/arm-smmu.c
> > +++ b/drivers/iommu/arm-smmu.c
> > @@ -499,6 +499,11 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev)
> > dev_err_ratelimited(smmu->dev,
> > "\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x\n",
> > gfsr, gfsynr0, gfsynr1, gfsynr2);
> > + if (IS_ENABLED(CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT) &&
> > + (gfsr & sGFSR_USF))
> > + dev_err_ratelimited(smmu->dev,
> > + "Stream ID %hu may not be described by firmware, try booting with \"arm-smmu.disable_bypass=0\"\n",
> > + (u16)gfsynr1);
>
> In general it seems like a sane idea to surface an error like this. I
> guess a few nits:
>
> 1. "By firmware" might be a bit misleading. In most cases I'm aware
> of the problem is in the device tree that was bundled together with
> the kernel. If there are actually cases where firmware has baked in a
> device tree and it got this wrong then we might want to spend time
> figuring out what to do about it.
I thought that was usually the way UEFI systems worked, where the kernel
is updated independently of the device-tree? Either way, that should be
what we're aiming for, even if many platforms require the two to be tied
together.
> 2. Presumably booting with "arm-smmu.disable_bypass=0" is in most
> cases the least desirable option available. I always consider kernel
> command line parameters as something of a last resort for
> configuration and would only be something that and end user might do
> if they were given a kernel compiled by someone else (like if someone
> where taking a prebuilt Linux distro and trying to install it onto a
> generic PC). Are you seeing cases where this is happening? If people
> are compiling their own kernel I'd argue that telling them to set
> "CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT" to "no" is much better
> than trying to jam a command line option on. Command line options
> don't scale well.
Hmm. Recompiling seems like even more of a last resort to me!
> 3. Any chance you could make it more obvious that this change is
> undesirable and a last resort? AKA:
>
> "Stream ID x blocked for security reasons; allow anyway by booting
> with arm-smmu.disable_bypass=0"
How about:
"Blocked transaction from unknown Stream ID x; boot with
\"arm-smmu.disable_bypass=0\" to allow these transactions, although this
may have security implications."
Will
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* Re: [PATCH v4 2/7] dt-bindings: mmc: Add Actions Semi SD/MMC/SDIO controller binding
From: Rob Herring @ 2019-09-16 18:00 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: devicetree, Ulf Hansson, Stephen Boyd, linux-actions,
Linus Walleij, linux-mmc, linux-kernel@vger.kernel.org,
Thomas Liau, linux-clk, Andreas Färber,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190916154546.24982-3-manivannan.sadhasivam@linaro.org>
On Mon, Sep 16, 2019 at 10:46 AM Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> Add devicetree YAML binding for Actions Semi Owl SoC's SD/MMC/SDIO
> controller.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> .../devicetree/bindings/mmc/owl-mmc.yaml | 59 +++++++++++++++++++
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mmc/owl-mmc.yaml
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [PATCH v5 4/8] dt-bindings: clock: Add devicetree binding for BM1880 SoC
From: Rob Herring @ 2019-09-16 18:02 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: devicetree, Stephen Boyd, Michael Turquette,
linux-kernel@vger.kernel.org, darren.tsao, haitao.suo,
fisher.cheng, alec.lin, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <20190916161447.32715-5-manivannan.sadhasivam@linaro.org>
On Mon, Sep 16, 2019 at 11:15 AM Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> Add YAML devicetree binding for Bitmain BM1880 SoC.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> .../bindings/clock/bitmain,bm1880-clk.yaml | 76 +++++++++++++++++
> include/dt-bindings/clock/bm1880-clock.h | 82 +++++++++++++++++++
> 2 files changed, 158 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/bitmain,bm1880-clk.yaml
> create mode 100644 include/dt-bindings/clock/bm1880-clock.h
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file
From: Will Deacon @ 2019-09-16 18:18 UTC (permalink / raw)
To: Anup Patel
Cc: julien.thierry@arm.com, catalin.marinas@arm.com, Palmer Dabbelt,
Will Deacon, christoffer.dall@arm.com, Atish Patra,
julien.grall@arm.com, guoren@kernel.org, gary@garyguo.net,
linux-riscv@lists.infradead.org, kvmarm@lists.cs.columbia.edu,
rppt@linux.ibm.com, Christoph Hellwig, aou@eecs.berkeley.edu,
Arnd Bergmann, suzuki.poulose@arm.com, marc.zyngier@arm.com,
Paul Walmsley, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
james.morse@arm.com
In-Reply-To: <MN2PR04MB606117F2AC47385EF23D267D8D8D0@MN2PR04MB6061.namprd04.prod.outlook.com>
On Sun, Sep 15, 2019 at 05:03:38AM +0000, Anup Patel wrote:
>
>
> > -----Original Message-----
> > From: linux-kernel-owner@vger.kernel.org <linux-kernel-
> > owner@vger.kernel.org> On Behalf Of Palmer Dabbelt
> > Sent: Saturday, September 14, 2019 7:31 PM
> > To: will@kernel.org
> > Cc: guoren@kernel.org; Will Deacon <will.deacon@arm.com>;
> > julien.thierry@arm.com; aou@eecs.berkeley.edu; james.morse@arm.com;
> > Arnd Bergmann <arnd@arndb.de>; suzuki.poulose@arm.com;
> > marc.zyngier@arm.com; catalin.marinas@arm.com; Anup Patel
> > <Anup.Patel@wdc.com>; linux-kernel@vger.kernel.org;
> > rppt@linux.ibm.com; Christoph Hellwig <hch@infradead.org>; Atish Patra
> > <Atish.Patra@wdc.com>; julien.grall@arm.com; gary@garyguo.net; Paul
> > Walmsley <paul.walmsley@sifive.com>; christoffer.dall@arm.com; linux-
> > riscv@lists.infradead.org; kvmarm@lists.cs.columbia.edu; linux-arm-
> > kernel@lists.infradead.org; iommu@lists.linux-foundation.org
> > Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a
> > separate file
> >
> > On Thu, 12 Sep 2019 07:02:56 PDT (-0700), will@kernel.org wrote:
> > > On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
> > >> On Mon, Jun 24, 2019 at 6:40 PM Will Deacon <will@kernel.org> wrote:
> > >> > > I'll keep my system use the same ASID for SMP + IOMMU :P
> > >> >
> > >> > You will want a separate allocator for that:
> > >> >
> > >> > https://lkml.kernel.org/r/20190610184714.6786-2-jean-philippe.bruck
> > >> > er@arm.com
> > >>
> > >> Yes, it is hard to maintain ASID between IOMMU and CPUMMU or
> > >> different system, because it's difficult to synchronize the IO_ASID
> > >> when the CPU ASID is rollover.
> > >> But we could still use hardware broadcast TLB invalidation
> > >> instruction to uniformly manage the ASID and IO_ASID, or OTHER_ASID in
> > our IOMMU.
> > >
> > > That's probably a bad idea, because you'll likely stall execution on
> > > the CPU until the IOTLB has completed invalidation. In the case of
> > > ATS, I think an endpoint ATC is permitted to take over a minute to
> > > respond. In reality, I suspect the worst you'll ever see would be in
> > > the msec range, but that's still an unacceptable period of time to hold a
> > CPU.
> > >
> > >> Welcome to join our disscusion:
> > >> "Introduce an implementation of IOMMU in linux-riscv"
> > >> 9 Sep 2019, 10:45 Jade-room-I&II (Corinthia Hotel Lisbon) RISC-V MC
> > >
> > > I attended this session, but it unfortunately raised many more
> > > questions than it answered.
> >
> > Ya, we're a long way from figuring this out.
>
> For everyone's reference, here is our first attempt at RISC-V ASID allocator:
> http://archive.lwn.net:8080/linux-kernel/20190329045111.14040-1-anup.patel@wdc.com/T/#u
With a reply stating that the patch "absolutely does not work" ;)
What exactly do you want people to do with that? It's an awful lot of effort
to review this sort of stuff and given that Guo Ren is talking about sharing
page tables between the CPU and an accelerator, maybe you're better off
stabilising Linux for the platforms that you can actually test rather than
getting so far ahead of yourselves that you end up with a bunch of wasted
work on patches that probably won't get merged any time soon.
Seriously, they say "walk before you can run", but this is more "crawl
before you can fly". What's the rush?
Will
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^ permalink raw reply
* Re: [PATCH] iommu/arm-smmu: Report USF more clearly
From: Doug Anderson @ 2019-09-16 18:19 UTC (permalink / raw)
To: Will Deacon
Cc: list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, ,
Robin Murphy,
list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, ,
Linux ARM
In-Reply-To: <20190916180021.cp2onwou7pbsrygd@willie-the-truck>
Hi,
On Mon, Sep 16, 2019 at 11:00 AM Will Deacon <will@kernel.org> wrote:
>
> On Fri, Sep 13, 2019 at 03:44:12PM -0700, Doug Anderson wrote:
> > On Fri, Sep 13, 2019 at 4:48 AM Robin Murphy <robin.murphy@arm.com> wrote:
> > >
> > > Although CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is a welcome tool
> > > for smoking out inadequate firmware, the failure mode is non-obvious
> > > and can be confusing for end users. Add some special-case reporting of
> > > Unidentified Stream Faults to help clarify this particular symptom.
> > >
> > > CC: Douglas Anderson <dianders@chromium.org>
> >
> > nit that I believe that "Cc" (lowercase 2nd c) is correct.
> >
> > > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> > > ---
> > > drivers/iommu/arm-smmu.c | 5 +++++
> > > drivers/iommu/arm-smmu.h | 2 ++
> > > 2 files changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
> > > index b7cf24402a94..76ac8c180695 100644
> > > --- a/drivers/iommu/arm-smmu.c
> > > +++ b/drivers/iommu/arm-smmu.c
> > > @@ -499,6 +499,11 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev)
> > > dev_err_ratelimited(smmu->dev,
> > > "\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x\n",
> > > gfsr, gfsynr0, gfsynr1, gfsynr2);
> > > + if (IS_ENABLED(CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT) &&
> > > + (gfsr & sGFSR_USF))
> > > + dev_err_ratelimited(smmu->dev,
> > > + "Stream ID %hu may not be described by firmware, try booting with \"arm-smmu.disable_bypass=0\"\n",
> > > + (u16)gfsynr1);
> >
> > In general it seems like a sane idea to surface an error like this. I
> > guess a few nits:
> >
> > 1. "By firmware" might be a bit misleading. In most cases I'm aware
> > of the problem is in the device tree that was bundled together with
> > the kernel. If there are actually cases where firmware has baked in a
> > device tree and it got this wrong then we might want to spend time
> > figuring out what to do about it.
>
> I thought that was usually the way UEFI systems worked, where the kernel
> is updated independently of the device-tree? Either way, that should be
> what we're aiming for, even if many platforms require the two to be tied
> together.
It's my opinion that until there is a place in the kernel to "fixup"
broken device trees that were baked in firmware that it's a bad idea
to ship device trees separate from the kernel except if the device
trees are exceedingly simple. We'll run into too many problems
otherwise, either because the kernel the device tree was written for
had downstream patches or someone just made a mistake in them and
nobody noticed. I know device trees are supposed to be ABI, but
people make mistakes and we need a way to fix them up.
...but that's getting pretty far afield from Robin's patch.
> > 2. Presumably booting with "arm-smmu.disable_bypass=0" is in most
> > cases the least desirable option available. I always consider kernel
> > command line parameters as something of a last resort for
> > configuration and would only be something that and end user might do
> > if they were given a kernel compiled by someone else (like if someone
> > where taking a prebuilt Linux distro and trying to install it onto a
> > generic PC). Are you seeing cases where this is happening? If people
> > are compiling their own kernel I'd argue that telling them to set
> > "CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT" to "no" is much better
> > than trying to jam a command line option on. Command line options
> > don't scale well.
>
> Hmm. Recompiling seems like even more of a last resort to me!
Depends on what you're doing. If you're not in the habit of compiling
a kernel and you're just trying to make one work then the command line
is great. If you're trying to manage configuration for a whole bunch
of different hardware products then the command line is a terrible
place to store config.
...but I guess the summary is that we wouldn't want someone to
actually ship a kernel with this option on anyway. ;-)
> > 3. Any chance you could make it more obvious that this change is
> > undesirable and a last resort? AKA:
> >
> > "Stream ID x blocked for security reasons; allow anyway by booting
> > with arm-smmu.disable_bypass=0"
>
> How about:
>
> "Blocked transaction from unknown Stream ID x; boot with
> \"arm-smmu.disable_bypass=0\" to allow these transactions, although this
> may have security implications."
Fine with me if it's not too long for an error message.
-Doug
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^ permalink raw reply
* Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file
From: Palmer Dabbelt @ 2019-09-16 18:28 UTC (permalink / raw)
To: will
Cc: julien.thierry, catalin.marinas, Will Deacon, christoffer.dall,
Atish Patra, julien.grall, guoren, gary, linux-riscv, kvmarm,
rppt, Christoph Hellwig, aou, Arnd Bergmann, suzuki.poulose,
marc.zyngier, Paul Walmsley, linux-arm-kernel, Anup Patel,
linux-kernel, iommu, james.morse
In-Reply-To: <20190916181800.7lfpt3t627byoomt@willie-the-truck>
On Mon, 16 Sep 2019 11:18:00 PDT (-0700), will@kernel.org wrote:
> On Sun, Sep 15, 2019 at 05:03:38AM +0000, Anup Patel wrote:
>>
>>
>> > -----Original Message-----
>> > From: linux-kernel-owner@vger.kernel.org <linux-kernel-
>> > owner@vger.kernel.org> On Behalf Of Palmer Dabbelt
>> > Sent: Saturday, September 14, 2019 7:31 PM
>> > To: will@kernel.org
>> > Cc: guoren@kernel.org; Will Deacon <will.deacon@arm.com>;
>> > julien.thierry@arm.com; aou@eecs.berkeley.edu; james.morse@arm.com;
>> > Arnd Bergmann <arnd@arndb.de>; suzuki.poulose@arm.com;
>> > marc.zyngier@arm.com; catalin.marinas@arm.com; Anup Patel
>> > <Anup.Patel@wdc.com>; linux-kernel@vger.kernel.org;
>> > rppt@linux.ibm.com; Christoph Hellwig <hch@infradead.org>; Atish Patra
>> > <Atish.Patra@wdc.com>; julien.grall@arm.com; gary@garyguo.net; Paul
>> > Walmsley <paul.walmsley@sifive.com>; christoffer.dall@arm.com; linux-
>> > riscv@lists.infradead.org; kvmarm@lists.cs.columbia.edu; linux-arm-
>> > kernel@lists.infradead.org; iommu@lists.linux-foundation.org
>> > Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a
>> > separate file
>> >
>> > On Thu, 12 Sep 2019 07:02:56 PDT (-0700), will@kernel.org wrote:
>> > > On Sun, Sep 08, 2019 at 07:52:55AM +0800, Guo Ren wrote:
>> > >> On Mon, Jun 24, 2019 at 6:40 PM Will Deacon <will@kernel.org> wrote:
>> > >> > > I'll keep my system use the same ASID for SMP + IOMMU :P
>> > >> >
>> > >> > You will want a separate allocator for that:
>> > >> >
>> > >> > https://lkml.kernel.org/r/20190610184714.6786-2-jean-philippe.bruck
>> > >> > er@arm.com
>> > >>
>> > >> Yes, it is hard to maintain ASID between IOMMU and CPUMMU or
>> > >> different system, because it's difficult to synchronize the IO_ASID
>> > >> when the CPU ASID is rollover.
>> > >> But we could still use hardware broadcast TLB invalidation
>> > >> instruction to uniformly manage the ASID and IO_ASID, or OTHER_ASID in
>> > our IOMMU.
>> > >
>> > > That's probably a bad idea, because you'll likely stall execution on
>> > > the CPU until the IOTLB has completed invalidation. In the case of
>> > > ATS, I think an endpoint ATC is permitted to take over a minute to
>> > > respond. In reality, I suspect the worst you'll ever see would be in
>> > > the msec range, but that's still an unacceptable period of time to hold a
>> > CPU.
>> > >
>> > >> Welcome to join our disscusion:
>> > >> "Introduce an implementation of IOMMU in linux-riscv"
>> > >> 9 Sep 2019, 10:45 Jade-room-I&II (Corinthia Hotel Lisbon) RISC-V MC
>> > >
>> > > I attended this session, but it unfortunately raised many more
>> > > questions than it answered.
>> >
>> > Ya, we're a long way from figuring this out.
>>
>> For everyone's reference, here is our first attempt at RISC-V ASID allocator:
>> http://archive.lwn.net:8080/linux-kernel/20190329045111.14040-1-anup.patel@wdc.com/T/#u
>
> With a reply stating that the patch "absolutely does not work" ;)
>
> What exactly do you want people to do with that? It's an awful lot of effort
> to review this sort of stuff and given that Guo Ren is talking about sharing
> page tables between the CPU and an accelerator, maybe you're better off
> stabilising Linux for the platforms that you can actually test rather than
> getting so far ahead of yourselves that you end up with a bunch of wasted
> work on patches that probably won't get merged any time soon.
>
> Seriously, they say "walk before you can run", but this is more "crawl
> before you can fly". What's the rush?
I agree, and I think I've been pretty clear here: we're not merging this ASID
stuff until we have a platform we can test on, particularly as the platforms we
have now already need some wacky hacks around TLB flushing that we haven't
gotten to the bottom of.
> Will
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^ permalink raw reply
* Re: [PATCH V4 03/11] clk: imx: scu: add two cells binding support
From: Stephen Boyd @ 2019-09-16 18:44 UTC (permalink / raw)
To: Dong Aisheng
Cc: Dong Aisheng, Michael Turquette, dl-linux-imx, Sascha Hauer,
Fabio Estevam, Shawn Guo, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <CAA+hA=QoZFFb_EVfxcDuJB-9VobVd-1-RyhWeNTSePxW50P8Eg@mail.gmail.com>
Quoting Dong Aisheng (2019-09-09 03:23:25)
> Hi Stephen,
>
> Thanks for the review.
>
> On Sat, Sep 7, 2019 at 5:29 PM Stephen Boyd <sboyd@kernel.org> wrote:
> >
> > Quoting Dong Aisheng (2019-08-20 04:13:17)
> > > diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
> > > index 5e2903e..1ad3f2a 100644
> > > --- a/drivers/clk/imx/clk-imx8qxp.c
> > > +++ b/drivers/clk/imx/clk-imx8qxp.c
> > > @@ -134,7 +134,12 @@ static int imx8qxp_clk_probe(struct platform_device *pdev)
> > > i, PTR_ERR(clks[i]));
> > > }
> > >
> > > - return of_clk_add_hw_provider(ccm_node, of_clk_hw_onecell_get, clk_data);
> > > + if (clock_cells == 2)
> >
> > Can you just read this from the DT node again instead of having a global
> > variable called "clock_cells" for this?
> >
>
> I tried thinking about it.
> One problem is that we also need this information in the exist clk
> registration API to
> keep the backwards compatibility:
> e.g.
> static inline struct clk_hw *imx_clk_scu(const char *name, u32 rsrc_id,
> u8 clk_type)
> {
> - return __imx_clk_scu(name, NULL, 0, rsrc_id, clk_type);
> + if (clock_cells == 2)
> + return imx_clk_scu_alloc_dev(name, NULL, 0, rsrc_id, clk_type);
> + else
> + return __imx_clk_scu(name, NULL, 0, rsrc_id, clk_type);
> }
>
> Parsing it for all clocks seems not good.
Can you parse it once for the clock controller and then pass it to the
registration function as the number of cells? I dislike the global and
the name of the global.
>
> In the future, i planned to totally remove the legacy binding support which
> is a premature one and missing continued support.
> Then we will also remove this unneeded clock_cells.
Ok sure.
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