* Re: [PATCH v5 05/13] soc: mediatek: cmdq: return send msg error code
From: Matthias Brugger @ 2020-05-16 17:56 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-6-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> Return error code to client if send message fail,
> so that client has chance to error handling.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Fixes: 576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper")
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
Queued for v5.7-fixes
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 2e1bc513569b..98f23ba3ba47 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -351,7 +351,9 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
> spin_unlock_irqrestore(&client->lock, flags);
> }
>
> - mbox_send_message(client->chan, pkt);
> + err = mbox_send_message(client->chan, pkt);
> + if (err < 0)
> + return err;
> /* We can send next packet immediately, so just call txdone. */
> mbox_client_txdone(client->chan, 0);
>
>
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* Re: [PATCH v5 06/13] soc: mediatek: cmdq: add assign function
From: Matthias Brugger @ 2020-05-16 17:59 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-7-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> Add assign function in cmdq helper which assign constant value into
> internal register by index.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 24 +++++++++++++++++++++++-
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 14 ++++++++++++++
> 3 files changed, 38 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 98f23ba3ba47..33153d17c9d9 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -12,6 +12,7 @@
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> #define CMDQ_POLL_ENABLE_MASK BIT(0)
> #define CMDQ_EOC_IRQ_EN BIT(0)
> +#define CMDQ_REG_TYPE 1
>
> struct cmdq_instruction {
> union {
> @@ -21,8 +22,17 @@ struct cmdq_instruction {
> union {
> u16 offset;
> u16 event;
> + u16 reg_dst;
> + };
> + union {
> + u8 subsys;
> + struct {
> + u8 sop:5;
> + u8 arg_c_t:1;
> + u8 arg_b_t:1;
> + u8 dst_t:1;
> + };
This union seems without context in this patch. Please drop.
Regards,
Matthias
> };
> - u8 subsys;
> u8 op;
> };
>
> @@ -277,6 +287,18 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> }
> EXPORT_SYMBOL(cmdq_pkt_poll_mask);
>
> +int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value)
> +{
> + struct cmdq_instruction inst = { {0} };
> +
> + inst.op = CMDQ_CODE_LOGIC;
> + inst.dst_t = CMDQ_REG_TYPE;
> + inst.reg_dst = reg_idx;
> + inst.value = value;
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_assign);
> +
> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index dfe5b2eb85cc..121c3bb6d3de 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -59,6 +59,7 @@ enum cmdq_code {
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> + CMDQ_CODE_LOGIC = 0xa0,
> };
>
> enum cmdq_cb_status {
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index a74c1d5acdf3..83340211e1d3 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -152,6 +152,20 @@ int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> */
> int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask);
> +
> +/**
> + * cmdq_pkt_assign() - Append logic assign command to the CMDQ packet, ask GCE
> + * to execute an instruction that set a constant value into
> + * internal register and use as value, mask or address in
> + * read/write instruction.
> + * @pkt: the CMDQ packet
> + * @reg_idx: the CMDQ internal register ID
> + * @value: the specified value
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value);
> +
> /**
> * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
> * packet and call back at the end of done packet
>
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* Re: [PATCH v5 07/13] soc: mediatek: cmdq: add write_s function
From: Matthias Brugger @ 2020-05-16 18:14 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-8-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> writes value contains in internal register to address
> with large dma access support.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++++++++++++++++++++++-
> include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++
> include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++
> 3 files changed, 55 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 33153d17c9d9..90f1ff2b4b00 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -18,6 +18,10 @@ struct cmdq_instruction {
> union {
> u32 value;
> u32 mask;
> + struct {
> + u16 arg_c;
> + u16 src_reg;
> + };
> };
> union {
> u16 offset;
> @@ -29,7 +33,7 @@ struct cmdq_instruction {
> struct {
> u8 sop:5;
> u8 arg_c_t:1;
> - u8 arg_b_t:1;
> + u8 src_t:1;
fixing patch 6/13 please. seems the struct should be added in this patch.
> u8 dst_t:1;
> };
> };
> @@ -222,6 +226,34 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> }
> EXPORT_SYMBOL(cmdq_pkt_write_mask);
>
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u16 src_reg_idx, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + if (mask != U32_MAX) {
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + inst.mask = 0;
> + inst.op = CMDQ_CODE_WRITE_S_MASK;
> + } else {
> + inst.op = CMDQ_CODE_WRITE_S;
> + }
> +
> + inst.src_t = CMDQ_REG_TYPE;
Not defined.
Please make sure that every patch compiles on it's own and does not add a
regression. This is very helpful if we have to bisect the kernel in the future.
> + inst.sop = high_addr_reg_idx;
> + inst.offset = addr_low;
> + inst.src_reg = src_reg_idx;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_write_s);
> +
> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 121c3bb6d3de..8ef87e1bd03b 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -59,6 +59,8 @@ enum cmdq_code {
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> + CMDQ_CODE_WRITE_S = 0x90,
> + CMDQ_CODE_WRITE_S_MASK = 0x91,
> CMDQ_CODE_LOGIC = 0xa0,
> };
>
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 83340211e1d3..c72d826d8934 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -12,6 +12,8 @@
> #include <linux/timer.h>
>
> #define CMDQ_NO_TIMEOUT 0xffffffffu
> +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
> +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1))
>
> struct cmdq_pkt;
>
> @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
> int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask);
>
> +/**
> + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet
> + * @pkt: the CMDQ packet
> + * @high_addr_reg_idx: internal regisger ID which contains high address of pa
s/regisger/register
> + * @addr_low: low address of pa
> + * @src_reg_idx: the CMDQ internal register ID which cache source value
> + * @mask: the specified target address mask, use U32_MAX if no need
> + *
> + * Return: 0 for success; else the error code is returned
> + *
> + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
> + * to get high addrees and call cmdq_pkt_assign() to assign value into internal
s/addrees/address
> + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameterwhen
s/parameterwhen/parameter when
> + * call to this function.
> + */
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u16 src_reg_idx, u32 mask);
> +
In general I wonder if we shouldn't provide two functions, one that writes a
mask and on for the else case.
Regards,
Matthias
> /**
> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
> * @pkt: the CMDQ packet
>
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* Re: [PATCH] iio: adc: Add scaling support to exynos adc driver
From: Jonathan Cameron @ 2020-05-16 18:19 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: kstewart, linux-samsung-soc, lars, linux-iio, mpe,
Jonathan Bakker, linux-kernel, swboyd, cw00.choi, kgene, pmeerw,
knaack.h, tglx, linux-arm-kernel, m.szyprowski
In-Reply-To: <20200511074232.GA7134@kozik-lap>
On Mon, 11 May 2020 09:42:32 +0200
Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Sun, May 10, 2020 at 11:24:17AM +0100, Jonathan Cameron wrote:
> > On Fri, 8 May 2020 14:14:00 -0700
> > Jonathan Bakker <xc-racer2@live.ca> wrote:
> >
> > > Currently the driver only exposes the raw counts. As we
> > > have the regulator voltage and the maximum value (stored in
> > > the data mask), we can trivially produce a scaling fraction
> > > of voltage / max value.
> > >
> > > This assumes that the regulator voltage is in fact the max
> > > voltage, which appears to be the case for all mainline dts
> > > and cross referenced with the public Exynos4412 and S5PV210
> > > datasheets.
> > >
> > > Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
> >
> > Seems reasonable to me. I'd like an exynos Ack though before applying.
>
>
> It's correct, at least with ARMv7 Exynos datasheets
>
> The few ARMv8 Exynos chips are silent about the voltage levels. The
> Exynos 7 DTS board in mainline kernel does not have regulator but it
> looks clearly like mistake.
>
> I think they behave the same, so for Exynos:
> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to poke at it.
Thanks,
Jonathan
>
> Best regards,
> Krzysztof
>
> > thanks,
> >
> > Jonathan
> >
> >
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* Re: [PATCH v5 09/13] soc: mediatek: cmdq: add write_s value function
From: Matthias Brugger @ 2020-05-16 18:20 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-10-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> writes a constant value to address with large dma
> access support.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++
> include/linux/soc/mediatek/mtk-cmdq.h | 14 ++++++++++++++
> 2 files changed, 40 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 03c129230cd7..a9ebbabb7439 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -269,6 +269,32 @@ int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> }
> EXPORT_SYMBOL(cmdq_pkt_write_s);
>
> +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u32 value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + if (mask != U32_MAX) {
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + inst.op = CMDQ_CODE_WRITE_S_MASK;
> + } else {
> + inst.op = CMDQ_CODE_WRITE_S;
> + }
> +
> + inst.sop = high_addr_reg_idx;
Writing u16 value in a 5 bit wide variable?
> + inst.offset = addr_low;
> + inst.value = value;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_write_s_value);
> +
> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 01b4184af310..fec292aac83c 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -135,6 +135,20 @@ int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low,
> int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> u16 addr_low, u16 src_reg_idx, u32 mask);
>
> +/**
> + * cmdq_pkt_write_s_value() - append write_s command with mask to the CMDQ
> + * packet which write value to a physical address
> + * @pkt: the CMDQ packet
> + * @high_addr_reg_idx: internal regisger ID which contains high address of pa
register
> + * @addr_low: low address of pa
> + * @value: the specified target value
> + * @mask: the specified target mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> + u16 addr_low, u32 value, u32 mask);
> +
> /**
> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
> * @pkt: the CMDQ packet
>
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* Re: [PATCH v1 5/9] dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml
From: Amit Tomer @ 2020-05-16 18:21 UTC (permalink / raw)
To: André Przywara
Cc: devicetree, linux-actions, cristian.ciocaltea, Rob Herring,
Manivannan Sadhasivam, Andreas Färber, linux-arm-kernel
In-Reply-To: <afc0d7f3-d763-b936-988c-d802b86836bc@arm.com>
Hi,
> (The kernel chose to use only one, but that's nothing the binding is
> concerned about).
But there are four different interrupt events corresponds to these four
interrupts.
So, if Kernel chooses to have only one interrupt , how other events
would be notified ?
Thanks
-Amit
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* Re: [PATCH v5 10/13] soc: mediatek: cmdq: export finalize function
From: Matthias Brugger @ 2020-05-16 18:22 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-11-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> Export finalize function to client which helps append eoc and jump
> command to pkt. Let client decide call finalize or not.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 1 +
> drivers/soc/mediatek/mtk-cmdq-helper.c | 7 ++-----
> include/linux/soc/mediatek/mtk-cmdq.h | 8 ++++++++
> 3 files changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 0dfcd1787e65..7daaabc26eb1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -490,6 +490,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
> cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);
> cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event);
> mtk_crtc_ddp_config(crtc, cmdq_handle);
> + cmdq_pkt_finalize(cmdq_handle);
> cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
> }
> #endif
This should be a independent patch.
Other then that patch looks good.
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index a9ebbabb7439..59bc1164b411 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -372,7 +372,7 @@ int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value)
> }
> EXPORT_SYMBOL(cmdq_pkt_assign);
>
> -static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> +int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> struct cmdq_instruction inst = { {0} };
> int err;
> @@ -392,6 +392,7 @@ static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
>
> return err;
> }
> +EXPORT_SYMBOL(cmdq_pkt_finalize);
>
> static void cmdq_pkt_flush_async_cb(struct cmdq_cb_data data)
> {
> @@ -426,10 +427,6 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
> unsigned long flags = 0;
> struct cmdq_client *client = (struct cmdq_client *)pkt->cl;
>
> - err = cmdq_pkt_finalize(pkt);
> - if (err < 0)
> - return err;
> -
> pkt->cb.cb = cb;
> pkt->cb.data = data;
> pkt->async_cb.cb = cmdq_pkt_flush_async_cb;
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index fec292aac83c..99e77155f967 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -213,6 +213,14 @@ int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> */
> int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value);
>
> +/**
> + * cmdq_pkt_finalize() - Append EOC and jump command to pkt.
> + * @pkt: the CMDQ packet
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_finalize(struct cmdq_pkt *pkt);
> +
> /**
> * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
> * packet and call back at the end of done packet
>
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^ permalink raw reply
* Re: [PATCH v5 12/13] soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
From: Matthias Brugger @ 2020-05-16 18:30 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-13-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> Add clear parameter to let client decide if
> event should be clear to 0 after GCE receive it.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> drivers/soc/mediatek/mtk-cmdq-helper.c | 5 +++--
> include/linux/mailbox/mtk-cmdq-mailbox.h | 3 +--
> include/linux/soc/mediatek/mtk-cmdq.h | 5 +++--
> 4 files changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 7daaabc26eb1..a065b3a412cf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -488,7 +488,7 @@ static void mtk_drm_crtc_hw_config(struct mtk_drm_crtc *mtk_crtc)
> if (mtk_crtc->cmdq_client) {
> cmdq_handle = cmdq_pkt_create(mtk_crtc->cmdq_client, PAGE_SIZE);
> cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);
> - cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event);
> + cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);
> mtk_crtc_ddp_config(crtc, cmdq_handle);
> cmdq_pkt_finalize(cmdq_handle);
> cmdq_pkt_flush_async(cmdq_handle, ddp_cmdq_cb, cmdq_handle);
This should be an independent patch
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index bb5be20fc70a..ec5637d43254 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -296,15 +296,16 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> }
> EXPORT_SYMBOL(cmdq_pkt_write_s_value);
>
> -int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> +int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear)
> {
> struct cmdq_instruction inst = { {0} };
> + u32 clear_option = clear ? CMDQ_WFE_UPDATE : 0;
>
> if (event >= CMDQ_MAX_EVENT)
> return -EINVAL;
>
> inst.op = CMDQ_CODE_WFE;
> - inst.value = CMDQ_WFE_OPTION;
> + inst.value = CMDQ_WFE_OPTION | clear_option;
> inst.event = event;
>
> return cmdq_pkt_append_command(pkt, inst);
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 3f6bc0dfd5da..42d2a30e6a70 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -27,8 +27,7 @@
> * bit 16-27: update value
> * bit 31: 1 - update, 0 - no update
> */
> -#define CMDQ_WFE_OPTION (CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \
> - CMDQ_WFE_WAIT_VALUE)
> +#define CMDQ_WFE_OPTION (CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE)
>
> /** cmdq event maximum */
> #define CMDQ_MAX_EVENT 0x3ff
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 1a6c56f3bec1..d63749440697 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -152,11 +152,12 @@ int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> /**
> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
> * @pkt: the CMDQ packet
> - * @event: the desired event type to "wait and CLEAR"
> + * @event: the desired event type to wait
> + * @clear: clear event or not after event arrive
> *
> * Return: 0 for success; else the error code is returned
> */
> -int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
> +int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear);
>
> /**
> * cmdq_pkt_clear_event() - append clear event command to the CMDQ packet
>
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^ permalink raw reply
* Re: [PATCH v5 13/13] soc: mediatek: cmdq: add set event function
From: Matthias Brugger @ 2020-05-16 18:32 UTC (permalink / raw)
To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
Philipp Zabel, David Airlie, Daniel Vetter
Cc: devicetree, wsd_upstream, linux-kernel, dri-devel, HS Liao,
linux-mediatek, Houlong Wei, Bibby Hsieh, CK Hu, linux-arm-kernel
In-Reply-To: <1583664775-19382-14-git-send-email-dennis-yc.hsieh@mediatek.com>
On 08/03/2020 11:52, Dennis YC Hsieh wrote:
> Add set event function in cmdq helper functions to set specific event.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> Reviewed-by: CK Hu <ck.hu@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++++++++++++++
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++
> 3 files changed, 25 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index ec5637d43254..3294c9285994 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -327,6 +327,21 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
> }
> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>
> +int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event)
> +{
> + struct cmdq_instruction inst = { {0} };
> +
> + if (event >= CMDQ_MAX_EVENT)
> + return -EINVAL;
> +
> + inst.op = CMDQ_CODE_WFE;
> + inst.value = CMDQ_WFE_UPDATE | CMDQ_WFE_UPDATE_VALUE;
> + inst.event = event;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_set_event);
> +
> int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value)
> {
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 42d2a30e6a70..ba2d811183a9 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -17,6 +17,7 @@
> #define CMDQ_JUMP_PASS CMDQ_INST_SIZE
>
> #define CMDQ_WFE_UPDATE BIT(31)
> +#define CMDQ_WFE_UPDATE_VALUE BIT(16)
> #define CMDQ_WFE_WAIT BIT(15)
> #define CMDQ_WFE_WAIT_VALUE 0x1
>
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index d63749440697..ca70296ae120 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -168,6 +168,15 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear);
> */
> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
>
> +/**
> + * cmdq_pkt_set_event() - append set event command to the CMDQ packet
> + * @pkt: the CMDQ packet
> + * @event: the desired event to be set
Can we add the events and their code, so that later on, when a consumer calls
cmdq_pkt_set_event() we don't have any magic values that are hard to understand?
Regards,
Matthias
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event);
> +
> /**
> * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
> * execute an instruction that wait for a specified
>
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^ permalink raw reply
* [GIT PULL] arm: mediatek fixes for v5.7
From: Matthias Brugger @ 2020-05-16 18:48 UTC (permalink / raw)
To: SoC Team, arm-soc
Cc: Dennis-YC Hsieh, moderated list:ARM/Mediatek SoC support,
linux-arm-kernel@lists.infradead.org, Hsin-Yi Wang
Hi Arnd and Olof,
Please take these two fixes into account for v5.7
Thanks,
Matthias
---
The following changes since commit 2ef96a5bb12be62ef75b5828c0aab838ebb29cb8:
Linux 5.7-rc5 (2020-05-10 15:16:58 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/ v5.7-fixes
for you to fetch changes up to 34c4e4072603ff5c174df73b973896abb76cbb51:
soc: mediatek: cmdq: return send msg error code (2020-05-16 19:55:50 +0200)
----------------------------------------------------------------
Dennis YC Hsieh (1):
soc: mediatek: cmdq: return send msg error code
Hsin-Yi Wang (1):
arm64: dts: mt8173: fix vcodec-enc clock
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++--
drivers/soc/mediatek/mtk-cmdq-helper.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
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* Re: [Linux-stm32] [PATCH v7 5/6] clocksource: Add Low Power STM32 timers driver
From: Benjamin GAIGNARD @ 2020-05-16 18:51 UTC (permalink / raw)
To: Daniel Lezcano, Fabrice GASNIER, lee.jones@linaro.org,
robh+dt@kernel.org, mark.rutland@arm.com,
mcoquelin.stm32@gmail.com, Alexandre TORGUE, tglx@linutronix.de
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Pascal PAILLET-LME, Benjamin Gaignard,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <103c5558-4dc9-63c9-4994-5c8f97646eee@linaro.org>
On 5/15/20 5:25 PM, Daniel Lezcano wrote:
> Hi Benjamin,
>
> On 05/05/2020 09:26, Benjamin GAIGNARD wrote:
>>
>> On 4/20/20 2:16 PM, Benjamin Gaignard wrote:
>>> From: Benjamin Gaignard <benjamin.gaignard@linaro.org>
>>>
>>> Implement clock event driver using low power STM32 timers.
>>> Low power timer counters running even when CPUs are stopped.
>>> It could be used as clock event broadcaster to wake up CPUs but not like
>>> a clocksource because each it rise an interrupt the counter restart from 0.
>>>
>>> Low power timers have a 16 bits counter and a prescaler which allow to
>>> divide the clock per power of 2 to up 128 to target a 32KHz rate.
>> Gentle ping to reviewers on this driver part of the series.
>> The bindings and the MFD have been reviewed so I hope I can progress
>> on the driver part too.
> [ ... ]
>
> sorry for the delay.
>
> How do you want these patches to be merged?
>
> Shall I pick patch 6/7 ?
If Lee agrees I think the best is to get all the patches in mfd tree because
of the dependencies between them.
Benjamin
>
>
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^ permalink raw reply
* [PATCH v2 0/4] Introduce the Counter character device interface
From: William Breathitt Gray @ 2020-05-16 19:19 UTC (permalink / raw)
To: jic23
Cc: kamel.bouhara, gwendal, david, linux-iio, patrick.havelange,
alexandre.belloni, linux-kernel, mcoquelin.stm32,
William Breathitt Gray, fabrice.gasnier, syednwaris, linux-stm32,
linux-arm-kernel, alexandre.torgue
Changes in v2:
- Use fixed-width data types to represent Counter data types
- Use union of function prototypes to store read/write callbacks
- Eliminate the counter-strings and counter-sysfs-callback files by
inlining relevant code
- Reimplement chrdev code to handle read/write calls instead of ioctl
- Remove struct counter_enum (I'm postponing this development until I
get the core functionality solid)
- Remove devm_counter_unregister as unnecessary
Over the past couple years we have noticed some shortcomings with the
Counter sysfs interface. Although useful in the majority of situations,
there are certain use-cases where interacting through sysfs attributes
can become cumbersome and inefficient. A desire to support more advanced
functionality such as timestamps, multi-axis positioning tables, and
other such latency-sensitive applications, has motivated a reevaluation
of the Counter subsystem. I believe a character device interface will be
helpful for this more niche area of counter device use.
To quell any concerns from the offset: this patchset makes no changes to
the existing Counter sysfs userspace interface -- existing userspace
applications will continue to work with no modifications necessary. I
request that driver maintainers please test their applications to verify
that this is true, and report any discrepancies if they arise.
However, this patchset does contain a major reimplementation of the
Counter subsystem core and driver API. A reimplementation was necessary
in order to separate the sysfs code from the counter device drivers and
internalize it as a dedicated component of the core Counter subsystem
module. A minor benefit from all of this is that the sysfs interface is
now ensured a certain amount of consistency because the translation is
performed outside of individual counter device drivers.
Essentially, the reimplementation has enabled counter device drivers to
pass and handle data as native C datatypes now rather than the sysfs
strings from before. A high-level view of how a count value is passed
down from a counter device driver can be exemplified by the following:
----------------------
/ Counter device \
+----------------------+
| Count register: 0x28 |
+----------------------+
|
-----------------
/ raw count data /
-----------------
|
V
+----------------------------+
| Counter device driver |----------+
+----------------------------+ |
| Processes data from device | -------------------
|----------------------------| / driver callbacks /
| Type: u64 | -------------------
| Value: 42 | |
+----------------------------+ |
| |
---------- |
/ u64 / |
---------- |
| |
| V
| +----------------------+
| | Counter core |
| +----------------------+
| | Routes device driver |
| | callbacks to the |
| | userspace interfaces |
| +----------------------+
| |
| -------------------
| / driver callbacks /
| -------------------
| |
+-------+---------------+ |
| | |
| +-------|-------+
| | |
V | V
+--------------------+ | +---------------------+
| Counter sysfs |<-+->| Counter chrdev |
+--------------------+ +---------------------+
| Translates to the | | Translates to the |
| standard Counter | | standard Counter |
| sysfs output | | character device |
|--------------------| |---------------------+
| Type: const char * | | Type: u64 |
| Value: "42" | | Value: 42 |
+--------------------+ +---------------------+
| |
--------------- ----------
/ const char * / / u64 /
--------------- ----------
| |
| V
| +-----------+
| | read |
| +-----------+
| \ Count: 42 /
| -----------
|
V
+--------------------------------------------------+
| `/sys/bus/counter/devices/counterX/countY/count` |
+--------------------------------------------------+
\ Count: "42" /
--------------------------------------------------
I am aware that an in-kernel API can simplify the data transfer between
counter device drivers and the userspace interfaces, but I want to
postpone that development until after the new Counter character device
interface is solidified. A userspace ABI is effectively immutable so I
want to make sure we get that right before working on an in-kernel API
that is more flexible to change. However, when we do develop an
in-kernel API, it will likely be housed as part of the Counter core
component, through which the userspace interfaces will then communicate.
Interaction with Counter character devices occurs via standard character
device read/write operations. This allows userspace applications to
access and set counter data using native C datatypes rather than working
through string translations.
The following are some questions I have about this patchset:
1. Should the data format of the character device be configured via a
sysfs attribute?
In this patchset, the first 196095 bytes of the character device are
dedicated as a selection area to choose which Counter components or
extensions should be exposed; the subsequent bytes are the actual
data for the Counter components and extensions that were selected.
Moving this selection to a sysfs attribute and dedicating the
character device to just data transfer might be a better design. If
such a design is chosen, should the selection attribute be
human-readable or binary?
2. How much space should allotted for strings?
Each Counter component and extension has a respective size allotted
for its data (u8 data is allotted 1 byte, u64 data is allotted 8
bytes, etc.); I have arbitrarily chosen to allot 64 bytes for
strings. Is this an apt size, or should string data be allotted more
or less space?
3. Should the owning component of an extension be handled by the device
driver or Counter subsystem?
The Counter subsystem figures out the owner (enum counter_owner_type)
for each component/extension in the counter-sysfs and counter-chrdev
code. When a callback must be executed, there are various switch
statements throughout the code to check whether the respective
Device, Signal, or Count version of the callback should be executed;
similarly, the appropriate owner type must match for the struct
counter_data macros such as COUNTER_DATA_DEVICE_U64,
COUNTER_DATA_SIGNAL_U64, COUNTER_DATA_COUNT_U64, etc.
All this complexity in the Counter subsystem code can be eliminated
if a single callback type with a `void *owner` parameter is defined
for use with all three owner types (Device, Signal, and Count). The
device driver would then be responsible for casting the callback
argument to the appropriate owner type; but in theory, this should
not be much of a problem since the device driver is responsible for
assigning the callbacks to the owning component anyway.
William Breathitt Gray (4):
counter: Internalize sysfs interface code
docs: counter: Update to reflect sysfs internalization
counter: Add character device interface
docs: counter: Document character device interface
Documentation/driver-api/generic-counter.rst | 275 +++-
MAINTAINERS | 3 +-
drivers/counter/104-quad-8.c | 547 +++----
drivers/counter/Makefile | 1 +
drivers/counter/counter-chrdev.c | 656 ++++++++
drivers/counter/counter-chrdev.h | 16 +
drivers/counter/counter-core.c | 187 +++
drivers/counter/counter-sysfs.c | 881 +++++++++++
drivers/counter/counter-sysfs.h | 14 +
drivers/counter/counter.c | 1496 ------------------
drivers/counter/ftm-quaddec.c | 89 +-
drivers/counter/stm32-lptimer-cnt.c | 161 +-
drivers/counter/stm32-timer-cnt.c | 139 +-
drivers/counter/ti-eqep.c | 211 +--
include/linux/counter.h | 626 ++++----
include/linux/counter_enum.h | 45 -
include/uapi/linux/counter-types.h | 45 +
17 files changed, 2826 insertions(+), 2566 deletions(-)
create mode 100644 drivers/counter/counter-chrdev.c
create mode 100644 drivers/counter/counter-chrdev.h
create mode 100644 drivers/counter/counter-core.c
create mode 100644 drivers/counter/counter-sysfs.c
create mode 100644 drivers/counter/counter-sysfs.h
delete mode 100644 drivers/counter/counter.c
delete mode 100644 include/linux/counter_enum.h
create mode 100644 include/uapi/linux/counter-types.h
--
2.26.2
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^ permalink raw reply
* [PATCH v2 2/4] docs: counter: Update to reflect sysfs internalization
From: William Breathitt Gray @ 2020-05-16 19:20 UTC (permalink / raw)
To: jic23
Cc: kamel.bouhara, gwendal, david, linux-iio, patrick.havelange,
alexandre.belloni, linux-kernel, mcoquelin.stm32,
William Breathitt Gray, fabrice.gasnier, syednwaris, linux-stm32,
linux-arm-kernel, alexandre.torgue
In-Reply-To: <cover.1589654470.git.vilhelm.gray@gmail.com>
The Counter subsystem architecture and driver implementations have
changed in order to handle Counter sysfs interactions in a more
consistent way. This patch updates the Generic Counter interface
documentation to reflect the changes.
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
---
Documentation/driver-api/generic-counter.rst | 215 +++++++++++++------
1 file changed, 149 insertions(+), 66 deletions(-)
diff --git a/Documentation/driver-api/generic-counter.rst b/Documentation/driver-api/generic-counter.rst
index e622f8f6e56a..8f85c30dea0b 100644
--- a/Documentation/driver-api/generic-counter.rst
+++ b/Documentation/driver-api/generic-counter.rst
@@ -250,8 +250,8 @@ for defining a counter device.
.. kernel-doc:: drivers/counter/counter.c
:export:
-Implementation
-==============
+Driver Implementation
+=====================
To support a counter device, a driver must first allocate the available
Counter Signals via counter_signal structures. These Signals should
@@ -267,25 +267,58 @@ respective counter_count structure. These counter_count structures are
set to the counts array member of an allocated counter_device structure
before the Counter is registered to the system.
-Driver callbacks should be provided to the counter_device structure via
-a constant counter_ops structure in order to communicate with the
-device: to read and write various Signals and Counts, and to set and get
-the "action mode" and "function mode" for various Synapses and Counts
-respectively.
+Driver callbacks must be provided to the counter_device structure in
+order to communicate with the device: to read and write various Signals
+and Counts, and to set and get the "action mode" and "function mode" for
+various Synapses and Counts respectively.
A defined counter_device structure may be registered to the system by
passing it to the counter_register function, and unregistered by passing
it to the counter_unregister function. Similarly, the
-devm_counter_register and devm_counter_unregister functions may be used
-if device memory-managed registration is desired.
-
-Extension sysfs attributes can be created for auxiliary functionality
-and data by passing in defined counter_device_ext, counter_count_ext,
-and counter_signal_ext structures. In these cases, the
-counter_device_ext structure is used for global/miscellaneous exposure
-and configuration of the respective Counter device, while the
-counter_count_ext and counter_signal_ext structures allow for auxiliary
-exposure and configuration of a specific Count or Signal respectively.
+devm_counter_register function may be used if device memory-managed
+registration is desired.
+
+The struct counter_data structure is used to define counter extensions
+for Signals, Synapses, and Counts.
+
+The "type" member specifies the type of data (e.g. unsigned long,
+boolean, etc.) handled by this extension. The "read" and "write" members
+can then be set by the counter device driver with callbacks to handle
+that data.
+
+Convenience macros such as `COUNTER_DATA_COUNT_U64` are provided for use
+by driver authors. In particular, driver authors are expected to use
+the provided macros for standard Counter subsystem attributes in order
+to maintain a consistent interface for userspace. For example, a counter
+device driver may define several standard attributes like so::
+
+ struct counter_data count_ext[] = {
+ COUNTER_DATA_DIRECTION(count_direction_read),
+ COUNTER_DATA_ENABLE(count_enable_read, count_enable_write),
+ COUNTER_DATA_CEILING(count_ceiling_read, count_ceiling_write),
+ };
+
+This makes it intuitive to see, add, and modify the attributes that are
+supported by this driver ("direction", "enable", and "ceiling") and to
+maintain this code without getting lost in a web of struct braces.
+
+Callbacks must match the function type expected for the respective
+component or extension. These function types are defined in the struct
+counter_data structure as the "`*_read`" and "`*_write`" union members.
+
+The corresponding callback prototypes for the extensions mentioned in
+the previous example above would be::
+
+ int count_direction_read(struct counter_device *counter,
+ struct counter_count *count, u8 *direction);
+ int count_enable_read(struct counter_device *counter,
+ struct counter_count *count, u8 *enable);
+ int count_enable_write(struct counter_device *counter,
+ struct counter_count *count, u8 enable);
+ int count_ceiling_read(struct counter_device *counter,
+ struct counter_count *count, u64 *ceiling);
+ int count_ceiling_write(struct counter_device *counter,
+ struct counter_count *count, u64 ceiling);
Determining the type of extension to create is a matter of scope.
@@ -313,52 +346,102 @@ Determining the type of extension to create is a matter of scope.
chip overheated via a device extension called "error_overtemp":
/sys/bus/counter/devices/counterX/error_overtemp
-Architecture
-============
-
-When the Generic Counter interface counter module is loaded, the
-counter_init function is called which registers a bus_type named
-"counter" to the system. Subsequently, when the module is unloaded, the
-counter_exit function is called which unregisters the bus_type named
-"counter" from the system.
-
-Counter devices are registered to the system via the counter_register
-function, and later removed via the counter_unregister function. The
-counter_register function establishes a unique ID for the Counter
-device and creates a respective sysfs directory, where X is the
-mentioned unique ID:
-
- /sys/bus/counter/devices/counterX
-
-Sysfs attributes are created within the counterX directory to expose
-functionality, configurations, and data relating to the Counts, Signals,
-and Synapses of the Counter device, as well as options and information
-for the Counter device itself.
-
-Each Signal has a directory created to house its relevant sysfs
-attributes, where Y is the unique ID of the respective Signal:
-
- /sys/bus/counter/devices/counterX/signalY
-
-Similarly, each Count has a directory created to house its relevant
-sysfs attributes, where Y is the unique ID of the respective Count:
-
- /sys/bus/counter/devices/counterX/countY
-
-For a more detailed breakdown of the available Generic Counter interface
-sysfs attributes, please refer to the
-Documentation/ABI/testing/sysfs-bus-counter file.
-
-The Signals and Counts associated with the Counter device are registered
-to the system as well by the counter_register function. The
-signal_read/signal_write driver callbacks are associated with their
-respective Signal attributes, while the count_read/count_write and
-function_get/function_set driver callbacks are associated with their
-respective Count attributes; similarly, the same is true for the
-action_get/action_set driver callbacks and their respective Synapse
-attributes. If a driver callback is left undefined, then the respective
-read/write permission is left disabled for the relevant attributes.
-
-Similarly, extension sysfs attributes are created for the defined
-counter_device_ext, counter_count_ext, and counter_signal_ext
-structures that are passed in.
+Subsystem Architecture
+======================
+
+Counter drivers pass and take data natively (i.e. `u8`, `u64`, `char *`,
+etc.) and the shared counter module handles the translation between the
+sysfs interface. This gurantees a standard userspace interface for all
+counter drivers, and helps generalize the Generic Counter driver ABI in
+order to support the Generic Counter chrdev interface without
+significant changes to the existing counter drivers.
+
+A high-level view of how a count value is passed down from a counter
+driver can be exemplified by the following::
+
+ Count data request:
+ ~~~~~~~~~~~~~~~~~~~
+ ----------------------
+ / Counter device \
+ +----------------------+
+ | Count register: 0x28 |
+ +----------------------+
+ |
+ -----------------
+ / raw count data /
+ -----------------
+ |
+ V
+ +----------------------------+
+ | Counter device driver |----------+
+ +----------------------------+ |
+ | Processes data from device | -------------------
+ |----------------------------| / driver callbacks /
+ | Type: unsigned long | -------------------
+ | Value: 42 | |
+ +----------------------------+ |
+ | |
+ ---------------- |
+ / unsigned long / |
+ ---------------- |
+ | |
+ | V
+ | +----------------------+
+ | | Counter core |
+ | +----------------------+
+ | | Routes device driver |
+ | | callbacks to the |
+ | | userspace interfaces |
+ | +----------------------+
+ | |
+ | -------------------
+ | / driver callbacks /
+ | -------------------
+ | |
+ +-------+ |
+ | |
+ | +---------------+
+ | |
+ V |
+ +--------------------+ |
+ | Counter sysfs |<-+
+ +--------------------+
+ | Translates to the |
+ | standard Counter |
+ | sysfs output |
+ |--------------------|
+ | Type: const char * |
+ | Value: "42" |
+ +--------------------+
+ |
+ ---------------
+ / const char * /
+ ---------------
+ |
+ V
+ +--------------------------------------------------+
+ | `/sys/bus/counter/devices/counterX/countY/count` |
+ +--------------------------------------------------+
+ \ Count: "42" /
+ --------------------------------------------------
+
+There are three primary components involved:
+
+Counter device driver
+---------------------
+Communicates with the hardware device to read/write data; e.g. counter
+drivers for quadrature encoders, timers, etc.
+
+Counter core
+------------
+Registers the counter device driver to the system so that the respective
+callbacks are called during userspace interaction.
+
+Counter sysfs
+-------------
+Translates counter data to the standard Counter sysfs interface format
+and vice versa.
+
+Please refer to the `Documentation/ABI/testing/sysfs-bus-counter` file
+for a detailed breakdown of the available Generic Counter interface
+sysfs attributes.
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2 4/4] docs: counter: Document character device interface
From: William Breathitt Gray @ 2020-05-16 19:20 UTC (permalink / raw)
To: jic23
Cc: kamel.bouhara, gwendal, david, linux-iio, patrick.havelange,
alexandre.belloni, linux-kernel, mcoquelin.stm32,
William Breathitt Gray, fabrice.gasnier, syednwaris, linux-stm32,
linux-arm-kernel, alexandre.torgue
In-Reply-To: <cover.1589654470.git.vilhelm.gray@gmail.com>
This patch adds high-level documentation about the Counter subsystem
character device interface.
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
---
Documentation/driver-api/generic-counter.rst | 112 +++++++++++++------
1 file changed, 76 insertions(+), 36 deletions(-)
diff --git a/Documentation/driver-api/generic-counter.rst b/Documentation/driver-api/generic-counter.rst
index 8f85c30dea0b..58045b33b576 100644
--- a/Documentation/driver-api/generic-counter.rst
+++ b/Documentation/driver-api/generic-counter.rst
@@ -223,19 +223,6 @@ whether an input line is differential or single-ended) and instead focus
on the core idea of what the data and process represent (e.g. position
as interpreted from quadrature encoding data).
-Userspace Interface
-===================
-
-Several sysfs attributes are generated by the Generic Counter interface,
-and reside under the /sys/bus/counter/devices/counterX directory, where
-counterX refers to the respective counter device. Please see
-Documentation/ABI/testing/sysfs-bus-counter for detailed
-information on each Generic Counter interface sysfs attribute.
-
-Through these sysfs attributes, programs and scripts may interact with
-the Generic Counter paradigm Counts, Signals, and Synapses of respective
-counter devices.
-
Driver API
==========
@@ -377,13 +364,13 @@ driver can be exemplified by the following::
+----------------------------+ |
| Processes data from device | -------------------
|----------------------------| / driver callbacks /
- | Type: unsigned long | -------------------
+ | Type: u64 | -------------------
| Value: 42 | |
+----------------------------+ |
| |
- ---------------- |
- / unsigned long / |
- ---------------- |
+ ---------- |
+ / u64 / |
+ ---------- |
| |
| V
| +----------------------+
@@ -398,25 +385,32 @@ driver can be exemplified by the following::
| / driver callbacks /
| -------------------
| |
- +-------+ |
+ +-------+---------------+ |
+ | | |
+ | +-------|-------+
+ | | |
+ V | V
+ +--------------------+ | +---------------------+
+ | Counter sysfs |<-+->| Counter chrdev |
+ +--------------------+ +---------------------+
+ | Translates to the | | Translates to the |
+ | standard Counter | | standard Counter |
+ | sysfs output | | character device |
+ |--------------------| |---------------------+
+ | Type: const char * | | Type: u64 |
+ | Value: "42" | | Value: 42 |
+ +--------------------+ +---------------------+
| |
- | +---------------+
- | |
- V |
- +--------------------+ |
- | Counter sysfs |<-+
- +--------------------+
- | Translates to the |
- | standard Counter |
- | sysfs output |
- |--------------------|
- | Type: const char * |
- | Value: "42" |
- +--------------------+
- |
- ---------------
- / const char * /
- ---------------
+ --------------- ----------
+ / const char * / / u64 /
+ --------------- ----------
+ | |
+ | V
+ | +-----------+
+ | | read |
+ | +-----------+
+ | \ Count: 42 /
+ | -----------
|
V
+--------------------------------------------------+
@@ -425,7 +419,7 @@ driver can be exemplified by the following::
\ Count: "42" /
--------------------------------------------------
-There are three primary components involved:
+There are four primary components involved:
Counter device driver
---------------------
@@ -445,3 +439,49 @@ and vice versa.
Please refer to the `Documentation/ABI/testing/sysfs-bus-counter` file
for a detailed breakdown of the available Generic Counter interface
sysfs attributes.
+
+Counter chrdev
+--------------
+Translates counter data to the standard Counter character device; data
+is transferred via standard character device read/write calls.
+
+Sysfs Interface
+===============
+
+Several sysfs attributes are generated by the Generic Counter interface,
+and reside under the `/sys/bus/counter/devices/counterX` directory,
+where `X` is to the respective counter device id. Please see
+Documentation/ABI/testing/sysfs-bus-counter for detailed information on
+each Generic Counter interface sysfs attribute.
+
+Through these sysfs attributes, programs and scripts may interact with
+the Generic Counter paradigm Counts, Signals, and Synapses of respective
+counter devices.
+
+Counter Character Device
+========================
+
+Counter character device nodes are created under the `/dev` directory as
+`counterX`, where `X` is the respective counter device id. Defines for
+the standard Counter data types are exposed via the userspace
+`include/uapi/linux/counter-types.h` file.
+
+The first 196095 bytes of the character device serve as a control
+selection area where control exposure of desired Counter components and
+extensions may be selected. Each byte serves as a boolean selection
+indicator for a respective Counter component or extension. The format of
+this area is as follows:
+
+* For each device extension, a byte is required.
+* For each Signal, a byte is reserved for the Signal component, and a
+ byte is reserved for each Signal extension.
+* For each Count, a byte is reserved for the Count component, a byte is
+ reserved for the count function, a byte is reserved for each Synapse
+ action, and byte is reserved for each Count extension.
+
+The selected Counter components and extensions may then be interfaced
+after the first 196095 bytes via standard character device read/write
+operations. The number of bytes available for each component or
+extension is dependent on their respective data type: u8 will have 1
+byte available, u64 will have 8 bytes available, strings will have 64
+bytes available, etc.
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v2 3/4] counter: Add character device interface
From: William Breathitt Gray @ 2020-05-16 19:20 UTC (permalink / raw)
To: jic23
Cc: kamel.bouhara, gwendal, david, linux-iio, patrick.havelange,
alexandre.belloni, linux-kernel, mcoquelin.stm32,
William Breathitt Gray, fabrice.gasnier, syednwaris, linux-stm32,
linux-arm-kernel, alexandre.torgue
In-Reply-To: <cover.1589654470.git.vilhelm.gray@gmail.com>
This patch introduces a character device interface for the Counter
subsystem. Device control is exposed through standard character device
read and write operations.
The first 196095 bytes of the character device serve as a control
selection area where control exposure of desired Counter components and
extensions may be selected. Each byte serves as a boolean selection
indicator for a respective Counter component or extension. The format of
this area is as follows:
* For each device extension, a byte is required.
* For each Signal, a byte is reserved for the Signal component, and a
byte is reserved for each Signal extension.
* For each Count, a byte is reserved for the Count component, a byte is
reserved for the count function, a byte is reserved for each Synapse
action, and byte is reserved for each Count extension.
The selected Counter components and extensions may then be interfaced
after the first 196095 bytes via standard character device read/write
operations. The number of bytes available for each component or
extension is dependent on their respective data type: u8 will have 1
byte available, u64 will have 8 bytes available, strings will have 64
bytes available, etc.
A high-level view of how a count value is passed down from a counter
driver can be exemplified by the following:
----------------------
/ Counter device \
+----------------------+
| Count register: 0x28 |
+----------------------+
|
-----------------
/ raw count data /
-----------------
|
V
+----------------------------+
| Counter device driver |----------+
+----------------------------+ |
| Processes data from device | -------------------
|----------------------------| / driver callbacks /
| Type: u64 | -------------------
| Value: 42 | |
+----------------------------+ |
| |
---------- |
/ u64 / |
---------- |
| |
| V
| +----------------------+
| | Counter core |
| +----------------------+
| | Routes device driver |
| | callbacks to the |
| | userspace interfaces |
| +----------------------+
| |
| -------------------
| / driver callbacks /
| -------------------
| |
+-------+---------------+ |
| | |
| +-------|-------+
| | |
V | V
+--------------------+ | +---------------------+
| Counter sysfs |<-+->| Counter chrdev |
+--------------------+ +---------------------+
| Translates to the | | Translates to the |
| standard Counter | | standard Counter |
| sysfs output | | character device |
|--------------------| |---------------------+
| Type: const char * | | Type: u64 |
| Value: "42" | | Value: 42 |
+--------------------+ +---------------------+
| |
--------------- ----------
/ const char * / / u64 /
--------------- ----------
| |
| V
| +-----------+
| | read |
| +-----------+
| \ Count: 42 /
| -----------
|
V
+--------------------------------------------------+
| `/sys/bus/counter/devices/counterX/countY/count` |
+--------------------------------------------------+
\ Count: "42" /
--------------------------------------------------
Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
---
MAINTAINERS | 1 +
drivers/counter/Makefile | 2 +-
drivers/counter/counter-chrdev.c | 656 +++++++++++++++++++++++++++++++
drivers/counter/counter-chrdev.h | 16 +
drivers/counter/counter-core.c | 34 +-
include/linux/counter.h | 16 +
6 files changed, 722 insertions(+), 3 deletions(-)
create mode 100644 drivers/counter/counter-chrdev.c
create mode 100644 drivers/counter/counter-chrdev.h
diff --git a/MAINTAINERS b/MAINTAINERS
index ef72b5755793..150ad8a9bb87 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4365,6 +4365,7 @@ F: Documentation/ABI/testing/sysfs-bus-counter*
F: Documentation/driver-api/generic-counter.rst
F: drivers/counter/
F: include/linux/counter.h
+F: include/uapi/linux/counter.h
F: include/uapi/linux/counter-types.h
CPMAC ETHERNET DRIVER
diff --git a/drivers/counter/Makefile b/drivers/counter/Makefile
index f48e337cbd85..d219b9c058e7 100644
--- a/drivers/counter/Makefile
+++ b/drivers/counter/Makefile
@@ -4,7 +4,7 @@
#
obj-$(CONFIG_COUNTER) += counter.o
-counter-y := counter-core.o counter-sysfs.o
+counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c
new file mode 100644
index 000000000000..7fd55bf71e47
--- /dev/null
+++ b/drivers/counter/counter-chrdev.c
@@ -0,0 +1,656 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Generic Counter character device interface
+ * Copyright (C) 2020 William Breathitt Gray
+ */
+
+#include <linux/cdev.h>
+#include <linux/counter.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/fs.h>
+#include <linux/kdev_t.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/uaccess.h>
+
+enum counter_owner_type {
+ COUNTER_OWNER_TYPE_DEVICE,
+ COUNTER_OWNER_TYPE_SIGNAL,
+ COUNTER_OWNER_TYPE_COUNT,
+};
+
+struct counter_control {
+ loff_t offset;
+ size_t size;
+ struct list_head l;
+
+ struct counter_data data;
+ enum counter_owner_type type;
+ void *owner;
+};
+
+static int counter_data_u8_read(struct counter_device *const counter,
+ const struct counter_control *const control,
+ u8 __user *const buf)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ u8 val;
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_u8_read(counter, &val);
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_u8_read(counter, control->owner, &val);
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ if (data->type == COUNTER_DATA_TYPE_SYNAPSE_ACTION)
+ err = data->action_read(counter, control->owner,
+ data->priv, &val);
+ else
+ err = data->count_u8_read(counter, control->owner,
+ &val);
+ break;
+ default: return -EINVAL;
+ }
+ if (err)
+ return err;
+
+ return put_user(val, buf);
+}
+
+static int counter_data_u64_read(struct counter_device *const counter,
+ const struct counter_control *const control,
+ char __user *const buf, const size_t len,
+ const size_t offset)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ u64 val;
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_u64_read(counter, &val);
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_u64_read(counter, control->owner, &val);
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ err = data->count_u64_read(counter, control->owner, &val);
+ break;
+ default: return -EINVAL;
+ }
+ if (err)
+ return err;
+
+ return copy_to_user(buf, (const char *)&val + offset, len);
+}
+
+static int counter_data_string_read(struct counter_device *const counter,
+ const struct counter_control *const control,
+ char __user *const buf, const size_t len,
+ const size_t offset)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ char str[64] = "";
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_string_read(counter, str, sizeof(str));
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_string_read(counter, control->owner, str,
+ sizeof(str));
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ err = data->count_string_read(counter, control->owner, str,
+ sizeof(str));
+ break;
+ default: return -EINVAL;
+ }
+ if (err < 0)
+ return err;
+
+ return copy_to_user(buf, str + offset, len);
+}
+
+static int counter_control_read(struct counter_device *const counter,
+ const struct counter_control *const control,
+ char __user *const buf, const size_t len,
+ const size_t offset)
+{
+ /* Check if read operation is supported */
+ if (!control->data.device_u8_read)
+ return -EFAULT;
+
+ switch (control->data.type) {
+ case COUNTER_DATA_TYPE_U8:
+ case COUNTER_DATA_TYPE_BOOL:
+ case COUNTER_DATA_TYPE_SIGNAL:
+ case COUNTER_DATA_TYPE_COUNT_FUNCTION:
+ case COUNTER_DATA_TYPE_SYNAPSE_ACTION:
+ case COUNTER_DATA_TYPE_COUNT_DIRECTION:
+ case COUNTER_DATA_TYPE_COUNT_MODE:
+ return counter_data_u8_read(counter, control, buf);
+ case COUNTER_DATA_TYPE_U64:
+ return counter_data_u64_read(counter, control, buf, len,
+ offset);
+ case COUNTER_DATA_TYPE_STRING:
+ return counter_data_string_read(counter, control, buf, len,
+ offset);
+ }
+
+ return -EINVAL;
+}
+
+static ssize_t counter_chrdev_read(struct file *filp, char __user *buf,
+ size_t len, loff_t *f_ps)
+{
+ const loff_t start_ps = *f_ps;
+ struct counter_device *const counter = filp->private_data;
+ size_t read_size;
+ struct counter_control *control;
+ int err;
+ loff_t next_control_ps;
+
+ /* Handle Counter control selection */
+ if (*f_ps < COUNTER_SELECTION_SIZE) {
+ read_size = (*f_ps + len > COUNTER_SELECTION_SIZE) ?
+ COUNTER_SELECTION_SIZE - *f_ps : len;
+
+ if (copy_to_user(buf, counter->selection + *f_ps, read_size))
+ return -EFAULT;
+
+ *f_ps += read_size;
+ buf += read_size;
+ len -= read_size;
+ if (!len)
+ goto exit_chrdev_read;
+ }
+
+ /* Handle controls */
+ list_for_each_entry(control, &counter->control_list, l) {
+ next_control_ps = control->offset + control->size;
+
+ /* Find first control item */
+ if (*f_ps >= next_control_ps)
+ continue;
+
+ read_size = (*f_ps + len > next_control_ps) ?
+ next_control_ps - *f_ps : len;
+
+ err = counter_control_read(counter, control, buf, read_size,
+ control->offset - *f_ps);
+ if (err)
+ return err;
+
+ *f_ps += read_size;
+ buf += read_size;
+ len -= read_size;
+ if (!len)
+ goto exit_chrdev_read;
+ }
+
+exit_chrdev_read:
+ return *f_ps - start_ps;
+}
+
+static int counter_control_ext_add(const u8 *const selection,
+ const enum counter_owner_type type,
+ void *const owner, const size_t num_ext,
+ const struct counter_data *const ext,
+ struct list_head *const cntrl_list,
+ loff_t *const offset)
+{
+ struct counter_control *p = list_last_entry(cntrl_list, typeof(*p), l);
+ struct counter_control *n;
+ size_t i;
+ struct counter_control *control;
+ int err;
+
+ for (i = 0; i < num_ext; i++) {
+ /* Check if extension is selected */
+ if (!selection[i])
+ continue;
+
+ /* Generate control list item */
+ control = kzalloc(sizeof(*control), GFP_KERNEL);
+ if (!control) {
+ err = -ENOMEM;
+ goto err_control_ext_create;
+ }
+ list_add_tail(&control->l, cntrl_list);
+
+ /* Configure control list item */
+ control->data = ext[i],
+ control->type = type;
+ control->owner = owner;
+ control->offset = *offset;
+ switch (control->data.type) {
+ case COUNTER_DATA_TYPE_U8:
+ case COUNTER_DATA_TYPE_BOOL:
+ case COUNTER_DATA_TYPE_COUNT_DIRECTION:
+ case COUNTER_DATA_TYPE_COUNT_MODE:
+ control->size = sizeof(u8);
+ break;
+ case COUNTER_DATA_TYPE_U64:
+ control->size = sizeof(u64);
+ break;
+ case COUNTER_DATA_TYPE_STRING:
+ control->size = 64;
+ break;
+ default:
+ err = -EINVAL;
+ goto err_control_ext_create;
+ }
+ *offset += control->size;
+ }
+
+ return 0;
+
+err_control_ext_create:
+ list_for_each_entry_safe_continue(p, n, cntrl_list, l) {
+ list_del(&p->l);
+ kfree(p);
+ }
+ return err;
+}
+
+static void counter_control_list_free(struct list_head *const cntrl_list)
+{
+ struct counter_control *p, *n;
+
+ list_for_each_entry_safe(p, n, cntrl_list, l) {
+ list_del(&p->l);
+ kfree(p);
+ }
+}
+
+static int counter_control_list_create(struct counter_device *const counter)
+{
+ const u8 *selection = counter->selection;
+ loff_t offset = COUNTER_SELECTION_SIZE;
+ size_t i, j;
+ struct counter_signal *signal;
+ struct counter_count *count;
+ struct counter_control *control;
+ int err;
+
+ /* Clean up old list */
+ counter_control_list_free(&counter->control_list);
+
+ /* Handle device extensions */
+ err = counter_control_ext_add(selection, COUNTER_OWNER_TYPE_DEVICE,
+ NULL, counter->num_ext, counter->ext,
+ &counter->control_list, &offset);
+ if (err)
+ goto err_control_create;
+ selection += counter->num_ext;
+
+ /* Handle Signals */
+ for (i = 0; i < counter->num_signals; i++) {
+ signal = counter->signals + i;
+
+ /* Check if Signal is selected */
+ if (*selection++) {
+ /* Generate control list item */
+ control = kzalloc(sizeof(*control), GFP_KERNEL);
+ if (!control) {
+ err = -ENOMEM;
+ goto err_control_create;
+ }
+ list_add_tail(&control->l, &counter->control_list);
+
+ /* Configure control list item */
+ control->data.type = COUNTER_DATA_TYPE_SIGNAL,
+ control->data.signal_u8_read = counter->signal_read;
+ control->type = COUNTER_OWNER_TYPE_SIGNAL;
+ control->owner = signal;
+ control->offset = offset;
+ control->size = sizeof(u8);
+ offset += control->size;
+ }
+
+ /* Handle extensions */
+ err = counter_control_ext_add(selection,
+ COUNTER_OWNER_TYPE_SIGNAL, signal,
+ signal->num_ext, signal->ext,
+ &counter->control_list, &offset);
+ if (err)
+ goto err_control_create;
+ selection += signal->num_ext;
+ }
+
+ /* Handle Counts */
+ for (i = 0; i < counter->num_counts; i++) {
+ count = counter->counts + i;
+
+ /* Check if Count is selected */
+ if (*selection++) {
+ /* Generate control list item */
+ control = kzalloc(sizeof(*control), GFP_KERNEL);
+ if (!control) {
+ err = -ENOMEM;
+ goto err_control_create;
+ }
+ list_add_tail(&control->l, &counter->control_list);
+
+ /* Configure control list item */
+ control->data.type = COUNTER_DATA_TYPE_U64,
+ control->data.count_u64_read = counter->count_read;
+ control->data.count_u64_write = counter->count_write;
+ control->type = COUNTER_OWNER_TYPE_COUNT;
+ control->owner = count;
+ control->offset = offset;
+ control->size = sizeof(u64);
+ offset += control->size;
+ }
+
+ /* Handle count function */
+ if (*selection++) {
+ /* Generate control list item */
+ control = kzalloc(sizeof(*control), GFP_KERNEL);
+ if (!control) {
+ err = -ENOMEM;
+ goto err_control_create;
+ }
+ list_add_tail(&control->l, &counter->control_list);
+
+ /* Configure control list item */
+ control->data.type = COUNTER_DATA_TYPE_COUNT_FUNCTION,
+ control->data.count_u8_read = counter->function_read;
+ control->data.count_u8_write = counter->function_write;
+ control->type = COUNTER_OWNER_TYPE_COUNT;
+ control->owner = count;
+ control->offset = offset;
+ control->size = sizeof(u8);
+ offset += control->size;
+ }
+
+ /* Handle Synapses */
+ for (j = 0; j < count->num_synapses; j++) {
+ /* Check if extension is selected */
+ if (!*selection++)
+ continue;
+
+ /* Generate control list item */
+ control = kzalloc(sizeof(*control), GFP_KERNEL);
+ if (!control) {
+ err = -ENOMEM;
+ goto err_control_create;
+ }
+ list_add_tail(&control->l, &counter->control_list);
+
+ /* Configure control list item */
+ control->data.type = COUNTER_DATA_TYPE_SYNAPSE_ACTION;
+ control->data.action_read = counter->action_read;
+ control->data.action_write = counter->action_write;
+ control->data.priv = count->synapses + j;
+ control->type = COUNTER_OWNER_TYPE_COUNT;
+ control->owner = count;
+ control->offset = offset;
+ control->size = sizeof(u8);
+ offset += control->size;
+ }
+
+ /* Handle extensions */
+ err = counter_control_ext_add(selection,
+ COUNTER_OWNER_TYPE_COUNT, count,
+ count->num_ext, count->ext,
+ &counter->control_list, &offset);
+ if (err)
+ goto err_control_create;
+ selection += count->num_ext;
+ }
+
+ return 0;
+
+err_control_create:
+ counter_control_list_free(&counter->control_list);
+ return err;
+}
+
+static int counter_data_u8_write(struct counter_device *const counter,
+ const struct counter_control *const control,
+ const u8 __user *const buf)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ u8 val;
+
+ err = get_user(val, buf);
+ if (err)
+ return err;
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_u8_write(counter, val);
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_u8_write(counter, control->owner, val);
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ if (data->type == COUNTER_DATA_TYPE_SYNAPSE_ACTION)
+ err = data->action_write(counter, control->owner,
+ data->priv, val);
+ else
+ err = data->count_u8_write(counter, control->owner,
+ val);
+ break;
+ default: return -EINVAL;
+ }
+
+ return err;
+}
+
+static int counter_data_u64_write(struct counter_device *const counter,
+ const struct counter_control *const control,
+ const char __user *const buf,
+ const size_t len, const size_t offset)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ u64 val = 0;
+
+ err = copy_from_user((char *)&val + offset, buf, len);
+ if (err)
+ return err;
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_u64_write(counter, val);
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_u64_write(counter, control->owner, val);
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ err = data->count_u64_write(counter, control->owner, val);
+ break;
+ default: return -EINVAL;
+ }
+
+ return err;
+}
+
+static int counter_data_string_write(struct counter_device *const counter,
+ const struct counter_control *const control,
+ const char __user *const buf,
+ const size_t len, const size_t offset)
+{
+ const struct counter_data *const data = &control->data;
+ int err;
+ char str[64] = "";
+
+ err = copy_from_user(str + offset, buf, len);
+ if (err)
+ return err;
+
+ switch (control->type) {
+ case COUNTER_OWNER_TYPE_DEVICE:
+ err = data->device_string_write(counter, str, sizeof(str));
+ break;
+ case COUNTER_OWNER_TYPE_SIGNAL:
+ err = data->signal_string_write(counter, control->owner, str,
+ sizeof(str));
+ break;
+ case COUNTER_OWNER_TYPE_COUNT:
+ err = data->count_string_write(counter, control->owner, str,
+ sizeof(str));
+ break;
+ default: return -EINVAL;
+ }
+ if (err < 0)
+ return err;
+
+ return 0;
+}
+
+static int counter_control_write(struct counter_device *const counter,
+ const struct counter_control *const control,
+ const char __user *const buf, const size_t len,
+ const size_t offset)
+{
+ /* Check if write operation is supported */
+ if (!control->data.device_u8_write)
+ return -EFAULT;
+
+ switch (control->data.type) {
+ case COUNTER_DATA_TYPE_U8:
+ case COUNTER_DATA_TYPE_BOOL:
+ case COUNTER_DATA_TYPE_SIGNAL:
+ case COUNTER_DATA_TYPE_COUNT_FUNCTION:
+ case COUNTER_DATA_TYPE_SYNAPSE_ACTION:
+ case COUNTER_DATA_TYPE_COUNT_DIRECTION:
+ case COUNTER_DATA_TYPE_COUNT_MODE:
+ return counter_data_u8_write(counter, control, buf);
+ case COUNTER_DATA_TYPE_U64:
+ return counter_data_u64_write(counter, control, buf, len,
+ offset);
+ case COUNTER_DATA_TYPE_STRING:
+ return counter_data_string_write(counter, control, buf, len,
+ offset);
+ }
+
+ return -EINVAL;
+}
+
+static ssize_t counter_chrdev_write(struct file *filp, const char __user *buf,
+ size_t len, loff_t *f_ps)
+{
+ const loff_t start_ps = *f_ps;
+ struct counter_device *const counter = filp->private_data;
+ size_t write_size;
+ struct counter_control *control;
+ int err;
+ loff_t next_control_ps;
+
+ /* Handle Counter control selection */
+ if (*f_ps < COUNTER_SELECTION_SIZE) {
+ write_size = (*f_ps + len > COUNTER_SELECTION_SIZE) ?
+ COUNTER_SELECTION_SIZE - *f_ps : len;
+ if (copy_from_user(counter->selection + *f_ps, buf, write_size))
+ return -EFAULT;
+
+ /* Create new list based on updated selection array */
+ err = counter_control_list_create(counter);
+ if (err)
+ return err;
+
+ *f_ps += write_size;
+ buf += write_size;
+ len -= write_size;
+ if (!len)
+ goto exit_chrdev_write;
+ }
+
+ /* Handle controls */
+ list_for_each_entry(control, &counter->control_list, l) {
+ next_control_ps = control->offset + control->size;
+
+ /* Find first control item */
+ if (*f_ps >= next_control_ps)
+ continue;
+
+ write_size = (*f_ps + len > next_control_ps) ?
+ next_control_ps - *f_ps : len;
+
+ err = counter_control_write(counter, control, buf, write_size,
+ control->offset - *f_ps);
+ if (err)
+ return err;
+
+ *f_ps += write_size;
+ buf += write_size;
+ len -= write_size;
+ if (!len)
+ goto exit_chrdev_write;
+ }
+
+ return -EFAULT;
+
+exit_chrdev_write:
+ return *f_ps - start_ps;
+}
+
+static int counter_chrdev_open(struct inode *inode, struct file *filp)
+{
+ struct counter_device *const counter = container_of(inode->i_cdev,
+ typeof(*counter),
+ chrdev);
+
+ get_device(&counter->dev);
+ filp->private_data = counter;
+
+ return generic_file_open(inode, filp);
+}
+
+static int counter_chrdev_release(struct inode *inode, struct file *filp)
+{
+ struct counter_device *const counter = container_of(inode->i_cdev,
+ typeof(*counter),
+ chrdev);
+
+ put_device(&counter->dev);
+
+ return 0;
+}
+
+static const struct file_operations counter_fops = {
+ .llseek = generic_file_llseek,
+ .read = counter_chrdev_read,
+ .write = counter_chrdev_write,
+ .open = counter_chrdev_open,
+ .release = counter_chrdev_release,
+};
+
+int counter_chrdev_add(struct counter_device *const counter,
+ const dev_t counter_devt)
+{
+ struct device *const dev = &counter->dev;
+ struct cdev *const chrdev = &counter->chrdev;
+
+ /* Initialize Counter character device control selection */
+ memset(counter->selection, 0, sizeof(counter->selection));
+
+ /* Initialize Counter character device selected controls list */
+ INIT_LIST_HEAD(&counter->control_list);
+
+ /* Initialize character device */
+ cdev_init(chrdev, &counter_fops);
+ dev->devt = MKDEV(MAJOR(counter_devt), counter->id);
+ cdev_set_parent(chrdev, &dev->kobj);
+
+ return cdev_add(chrdev, dev->devt, 1);
+}
+
+void counter_chrdev_free(struct counter_device *const counter)
+{
+ cdev_del(&counter->chrdev);
+ counter_control_list_free(&counter->control_list);
+}
diff --git a/drivers/counter/counter-chrdev.h b/drivers/counter/counter-chrdev.h
new file mode 100644
index 000000000000..7ab0797d3857
--- /dev/null
+++ b/drivers/counter/counter-chrdev.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Counter character device interface
+ * Copyright (C) 2020 William Breathitt Gray
+ */
+#ifndef _COUNTER_CHRDEV_H_
+#define _COUNTER_CHRDEV_H_
+
+#include <linux/counter.h>
+#include <linux/types.h>
+
+int counter_chrdev_add(struct counter_device *const counter,
+ const dev_t counter_devt);
+void counter_chrdev_free(struct counter_device *const counter);
+
+#endif /* _COUNTER_CHRDEV_H_ */
diff --git a/drivers/counter/counter-core.c b/drivers/counter/counter-core.c
index 499664809c75..2d0886648201 100644
--- a/drivers/counter/counter-core.c
+++ b/drivers/counter/counter-core.c
@@ -6,11 +6,14 @@
#include <linux/counter.h>
#include <linux/device.h>
#include <linux/export.h>
+#include <linux/fs.h>
#include <linux/gfp.h>
#include <linux/idr.h>
#include <linux/init.h>
#include <linux/module.h>
+#include <linux/types.h>
+#include "counter-chrdev.h"
#include "counter-sysfs.h"
/* Provides a unique ID for each counter device */
@@ -33,6 +36,8 @@ static struct bus_type counter_bus_type = {
.name = "counter"
};
+static dev_t counter_devt;
+
/**
* counter_register - register Counter to the system
* @counter: pointer to Counter to register
@@ -62,10 +67,15 @@ int counter_register(struct counter_device *const counter)
device_initialize(dev);
dev_set_drvdata(dev, counter);
+ /* Add Counter character device */
+ err = counter_chrdev_add(counter, counter_devt);
+ if (err)
+ goto err_free_id;
+
/* Add Counter sysfs attributes */
err = counter_sysfs_add(counter);
if (err)
- goto err_free_id;
+ goto err_free_chrdev;
/* Add device to system */
err = device_add(dev);
@@ -76,6 +86,8 @@ int counter_register(struct counter_device *const counter)
err_free_sysfs:
counter_sysfs_free(counter);
+err_free_chrdev:
+ counter_chrdev_free(counter);
err_free_id:
ida_simple_remove(&counter_ida, counter->id);
return err;
@@ -93,6 +105,7 @@ void counter_unregister(struct counter_device *const counter)
if (counter) {
device_del(&counter->dev);
counter_sysfs_free(counter);
+ counter_chrdev_free(counter);
}
}
EXPORT_SYMBOL_GPL(counter_unregister);
@@ -139,13 +152,30 @@ int devm_counter_register(struct device *dev,
}
EXPORT_SYMBOL_GPL(devm_counter_register);
+#define COUNTER_DEV_MAX 256
+
static int __init counter_init(void)
{
- return bus_register(&counter_bus_type);
+ int err;
+
+ err = bus_register(&counter_bus_type);
+ if (err < 0)
+ return err;
+
+ err = alloc_chrdev_region(&counter_devt, 0, COUNTER_DEV_MAX, "counter");
+ if (err < 0)
+ goto err_unregister_bus;
+
+ return 0;
+
+err_unregister_bus:
+ bus_unregister(&counter_bus_type);
+ return err;
}
static void __exit counter_exit(void)
{
+ unregister_chrdev_region(counter_devt, COUNTER_DEV_MAX);
bus_unregister(&counter_bus_type);
}
diff --git a/include/linux/counter.h b/include/linux/counter.h
index e8abbaf47a4b..22e91d00a880 100644
--- a/include/linux/counter.h
+++ b/include/linux/counter.h
@@ -6,6 +6,7 @@
#ifndef _COUNTER_H_
#define _COUNTER_H_
+#include <linux/cdev.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/list.h>
@@ -170,6 +171,9 @@ struct counter_attribute_group {
* @priv: optional private data supplied by driver
* @id: unique ID used to identify the Counter
* @dev: internal device structure
+ * @chrdev: internal character device structure
+ * @selection: Counter character device control selection
+ * @control_list: Counter character device selected controls
* @dynamic_names_list: List for dynamic names
* @groups_list: attribute groups list (for Signals, Counts, and ext)
* @num_groups: number of attribute groups containers
@@ -208,6 +212,18 @@ struct counter_device {
int id;
struct device dev;
+ struct cdev chrdev;
+
+#define MAX_EXT 255
+#define MAX_SIGNALS 255
+#define MAX_SYNAPSES 255
+#define MAX_COUNTS 255
+#define SIGNALS_SELECTION_SIZE ((1 + MAX_EXT) * MAX_SIGNALS)
+#define COUNTS_SELECTION_SIZE ((1 + 1 + MAX_SYNAPSES + MAX_EXT) * MAX_COUNTS)
+#define COUNTER_SELECTION_SIZE (MAX_EXT + SIGNALS_SELECTION_SIZE + COUNTS_SELECTION_SIZE)
+ u8 selection[COUNTER_SELECTION_SIZE];
+ struct list_head control_list;
+
struct list_head dynamic_names_list;
struct counter_attribute_group *groups_list;
size_t num_groups;
--
2.26.2
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [GIT PULL] ARM: mediatek: arm 32-bit updates for v5.8
From: Matthias Brugger @ 2020-05-16 19:55 UTC (permalink / raw)
To: arm-soc, SoC Team
Cc: moderated list:ARM/Mediatek SoC support,
linux-arm-kernel@lists.infradead.org
Hi Arnd and Olof,
Please have a look at the following pull request which includes arm32 changes.
Regards,
Matthias
---
The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:
Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/
tags/v5.7-next-dts32
for you to fetch changes up to 189881af810d452b592ee958db43eb4c57df9803:
arm: dts: mt2701: Add usb2 device nodes (2020-05-16 21:03:06 +0200)
----------------------------------------------------------------
MT2701:
- add MUSB device to the SoC and the EVB
MT7623:
- add Mali-450 device node and bindings
- add phy to gmac2
----------------------------------------------------------------
Min Guo (1):
arm: dts: mt2701: Add usb2 device nodes
Ryder Lee (1):
arm: dts: mt7623: add Mali-450 device node
Sean Wang (2):
arm: dts: mt7623: add phy-mode property for gmac2
dt-bindings: gpu: mali-utgard: add mediatek, mt7623-mali compatible
.../devicetree/bindings/gpu/arm,mali-utgard.yaml | 2 ++
arch/arm/boot/dts/mt2701-evb.dts | 21 ++++++++++++++
arch/arm/boot/dts/mt2701.dtsi | 33 ++++++++++++++++++++++
arch/arm/boot/dts/mt7623.dtsi | 25 ++++++++++++++++
arch/arm/boot/dts/mt7623n-rfb-emmc.dts | 1 +
5 files changed, 82 insertions(+)
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [GIT PULL] arm64: mediatek: updates for v5.8
From: Matthias Brugger @ 2020-05-16 20:04 UTC (permalink / raw)
To: arm-soc, SoC Team
Cc: Ryder Lee, Hsin-Yi Wang, Michael Kao, Ulrich Hecht,
moderated list:ARM/Mediatek SoC support, Manivannan Sadhasivam,
Chunfeng Yun, Ikjoon Jang, linux-arm-kernel@lists.infradead.org
Hi Olof,
Hi Arnd,
Please have a look on the device tree changes for 64-bit platforms. The
highlight for me is the support for the support for the MT8173 based Chromebooks
(like the Acer R13). This has been around for quite some time, but in the end we
took up the work between several people to get it all ready for upstream.
Regards,
Matthias
---
The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:
Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/
tags/v5.7-next-dts64
for you to fetch changes up to f0e5405b9ebf084c34c41f5d38a0013bee166f4d:
arm64: dts: mt8173: Add capacity-dmips-mhz attributes (2020-05-16 18:36:40 +0200)
----------------------------------------------------------------
MT2712:
- replace deprecated compatible for the usb PHY
MT6797:
- switch to SPDX identifier
- add and enable I2C device for x20 development board
- add I2C compatible to the binding description
MT7622:
- add Wi-Fi device and enable it for the Bananpi-R64
MT8173:
- add CPU capacities based on Dhryston benchmark
- fix DT build warnings
- set throtteling range to limitless
- add Elm and Hana devices on which several chromebooks are based
- add Global Command Queue entries to the users
MT8183:
- split cpuidle states in two as the clusters have different target residencies
----------------------------------------------------------------
Chunfeng Yun (1):
arm64: dts: mt2712: use non-empty ranges for usb-phy
Hsin-Yi Wang (6):
arm64: dts: mt8173: Add gce setting in mmsys and display node
dt-bindings: arm64: dts: mediatek: Add mt8173 elm and hana
arm64: dts: mt8173: add uart aliases
arm64: dts: mt8173: fix unit name warnings
arm64: dts: mediatek: add mt8173 elm and hana board
arm64: dts: mt8173: fix mdp aliases property name
Ikjoon Jang (1):
arm64: dts: mt8183: adjust cpuidle target residency
Manivannan Sadhasivam (4):
dt-bindings: i2c: Document I2C controller binding for MT6797 SoC
arm64: dts: mediatek: Add I2C support for MT6797 SoC
arm64: dts: mediatek: Enable I2C support for 96Boards X20 Development board
arm64: dts: mediatek: Switch to SPDX license identifier for MT6797 SoC
Michael Kao (1):
arm64: dts: mt8173: fix cooling device range
Ryder Lee (1):
arm64: dts: mt7622: add built-in Wi-Fi device nodes
Ulrich Hecht (1):
arm64: dts: mt8173: Add capacity-dmips-mhz attributes
.../devicetree/bindings/arm/mediatek.yaml | 22 +
.../devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
arch/arm64/boot/dts/mediatek/Makefile | 3 +
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 42 +-
arch/arm64/boot/dts/mediatek/mt6797-x20-dev.dts | 49 +
arch/arm64/boot/dts/mediatek/mt6797.dtsi | 229 +++-
.../boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 4 +
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 4 +
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 11 +
.../boot/dts/mediatek/mt8173-elm-hana-rev7.dts | 27 +
arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts | 14 +
arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi | 70 ++
arch/arm64/boot/dts/mediatek/mt8173-elm.dts | 14 +
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1173 ++++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 78 +-
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 26 +-
16 files changed, 1705 insertions(+), 62 deletions(-)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi
create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi
_______________________________________________
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* [GIT PULL] soc: mediatek: updates for v5.8
From: Matthias Brugger @ 2020-05-16 20:14 UTC (permalink / raw)
To: arm-soc, SoC Team
Cc: Geert Uytterhoeven, Wei Yongjun, matthias.bgg@kernel.org,
Enric Balletbo i Serra, moderated list:ARM/Mediatek SoC support,
linux-arm-kernel@lists.infradead.org
Hi Arnd,
Hi Olof,
Please have a look on the following SoC driver patches.
Highlight in this pull request is, that we got the mmsys mess cleaned up. In
MediaTek "mmsys" is IP block which holds multi-media devices and their
corresponding clocks muxes. In the past the clocks and multi-media system used
the same compatible (ouch) which broke graphics quite some time ago. After
several different approaches how to fix the mess, we now got a mmsys SoC driver
which is responsible for probing the clock and multi-media parts of the IP block.
This now allows us to have graphics support on the MT8173 based Chromebooks,
which is nice and will allow others developers who don't have a servo board to
debug the device and (hopefully) help to get the missing bits upstream.
The effort is not yet finished, but I hope for v5.9 we will see also graphics
support on the Bananapi-R2.
Regards,
Matthias
---
The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136:
Linux 5.7-rc1 (2020-04-12 12:35:55 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/
tags/v5.7-next-soc
for you to fetch changes up to 154910f886762a2817ddddad7fc6fed8c23b4ad1:
ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h> (2020-05-15
17:19:41 +0200)
----------------------------------------------------------------
Refactor the mmsys to reflect that it's a clock driver and
the entry point for the DRM subsystem.
Replace clk-provider.h include with of_clk.h for mach-mediatek
----------------------------------------------------------------
Enric Balletbo i Serra (3):
dt-bindings: mediatek: Update mmsys binding to reflect it is a system
controller
soc / drm: mediatek: Move routing control to mmsys device
soc / drm: mediatek: Fix mediatek-drm device probing
Geert Uytterhoeven (2):
soc: mediatek: mmsys: Drop <linux/clk-provider.h>
ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h>
Matthias Brugger (2):
drm/mediatek: Omit warning on probe defers
clk / soc: mediatek: Move mt8173 MMSYS to platform driver
Wei Yongjun (1):
soc: mediatek: Missing platform_device_unregister() on error in
mtk_mmsys_probe()
.../bindings/arm/mediatek/mediatek,mmsys.txt | 7 +-
arch/arm/mach-mediatek/mediatek.c | 2 +-
drivers/clk/mediatek/Kconfig | 7 +
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8173-mm.c | 146 +++++++++
drivers/clk/mediatek/clk-mt8173.c | 104 -------
drivers/gpu/drm/mediatek/Kconfig | 1 +
drivers/gpu/drm/mediatek/mtk_disp_color.c | 5 +-
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 5 +-
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 5 +-
drivers/gpu/drm/mediatek/mtk_dpi.c | 12 +-
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 +-
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 259 +---------------
drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 7 -
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 45 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 +-
drivers/gpu/drm/mediatek/mtk_hdmi.c | 4 +-
drivers/soc/mediatek/Kconfig | 8 +
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/mtk-mmsys.c | 338 +++++++++++++++++++++
include/linux/soc/mediatek/mtk-mmsys.h | 20 ++
22 files changed, 594 insertions(+), 412 deletions(-)
create mode 100644 drivers/clk/mediatek/clk-mt8173-mm.c
create mode 100644 drivers/soc/mediatek/mtk-mmsys.c
create mode 100644 include/linux/soc/mediatek/mtk-mmsys.h
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* Re: [PATCH] arm64: Call debug_traps_init() from trap_init() to help early kgdb
From: Daniel Thompson @ 2020-05-16 20:29 UTC (permalink / raw)
To: Will Deacon
Cc: Mark Rutland, sumit.garg, linux-arm-kernel, Paul E. McKenney,
Greg Kroah-Hartman, Enrico Weigelt, kgdb-bugreport, jinho lim,
Jason Wessel, Douglas Anderson, linux-kernel, Alexios Zavras,
James Morse, Eric W. Biederman, Catalin Marinas, Zenghui Yu,
Thomas Gleixner, liwei391, Dave Martin, Allison Randal,
Masami Hiramatsu
In-Reply-To: <20200515162316.GB23334@willie-the-truck>
On Fri, May 15, 2020 at 05:23:17PM +0100, Will Deacon wrote:
> On Wed, May 13, 2020 at 04:06:37PM -0700, Douglas Anderson wrote:
> > A new kgdb feature will soon land (kgdb_earlycon) that lets us run
> > kgdb much earlier. In order for everything to work properly it's
> > important that the break hook is setup by the time we process
> > "kgdbwait".
> >
> > Right now the break hook is setup in debug_traps_init() and that's
> > called from arch_initcall(). That's a bit too late since
> > kgdb_earlycon really needs things to be setup by the time the system
> > calls dbg_late_init().
> >
> > We could fix this by adding call_break_hook() into early_brk64() and
> > that works fine. However, it's a little ugly. Instead, let's just
> > add a call to debug_traps_init() straight from trap_init(). There's
> > already a documented dependency between trap_init() and
> > debug_traps_init() and this makes the dependency more obvious rather
> > than just relying on a comment.
> >
> > NOTE: this solution isn't early enough to let us select the
> > "ARCH_HAS_EARLY_DEBUG" KConfig option that is introduced by the
> > kgdb_earlycon patch series. That would only be set if we could do
> > breakpoints when early params are parsed. This patch only enables
> > "late early" breakpoints, AKA breakpoints when dbg_late_init() is
> > called. It's expected that this should be fine for most people.
> >
> > It should also be noted that if you crash you can still end up in kgdb
> > earlier than debug_traps_init(). Since you don't need breakpoints to
> > debug a crash that's fine.
> >
> > Suggested-by: Will Deacon <will@kernel.org>
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > ---
> > This replaces the patch ("arm64: Add call_break_hook() to
> > early_brk64() for early kgdb") in my recent kgdb series [1]. If I end
> > up re-posting that series again I'll include this patch as a
> > replacement, but I'm sending it separately to avoid spamming a pile of
> > people another time with a 12-patch series.
> >
> > Note that, because it doesn't select the "ARCH_HAS_EARLY_DEBUG"
> > KConfig option it could be landed standalone. However, it's still
> > probably better to land together with that patch series.
> >
> > If the kgdb_earlycon patch series lands without this patch then
> > kgdbwait + kgdb_earlycon won't work well on arm64, but there would be
> > no other bad side effects.
> >
> > If this patch lands without the kgdb_earlycon patch series then there
> > will be no known problems.
> >
> > [1] https://lore.kernel.org/r/20200507130644.v4.5.I22067ad43e77ddfd4b64c2d49030628480f9e8d9@changeid
> >
> > arch/arm64/include/asm/debug-monitors.h | 2 ++
> > arch/arm64/kernel/debug-monitors.c | 4 +---
> > arch/arm64/kernel/traps.c | 2 +-
> > 3 files changed, 4 insertions(+), 4 deletions(-)
>
> [...]
>
> Acked-by: Will Deacon <will@kernel.org>
>
> I would prefer to take this via arm64, if possible, since we have quite lot
> going in for 5.8, although I don't think this conflicts at the moment.
>
> Daniel -- what do you want to do?
I'm very happy for you to take it!
On my side I hope to get the rest of the patchset into linux-next early
next week.
Daniel.
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^ permalink raw reply
* [PATCH] ARM: dts: ux500: Add touchscreen to the Skomer
From: Linus Walleij @ 2020-05-16 21:29 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Linus Walleij
This adds touchscreen support to the Ux500 Samsung
GT-S7710 "Skomer" mobile phone.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../arm/boot/dts/ste-ux500-samsung-skomer.dts | 32 ++++++++++++++++++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
index 921540d5686f..5da3e21e5388 100644
--- a/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
+++ b/arch/arm/boot/dts/ste-ux500-samsung-skomer.dts
@@ -369,7 +369,28 @@ i2c@80110000 {
pinctrl-0 = <&i2c3_c_2_default>;
pinctrl-1 = <&i2c3_c_2_sleep>;
- /* TODO: this should be used by the Cypress TMA140 touchscreen */
+ /* Cypress CY8CTMA140 touchscreen */
+ touchscreen@20 {
+ compatible = "cypress,cy8ctma140";
+ clock-frequency = <400000>;
+ reg = <0x20>;
+
+ touchscreen-size-x = <480>;
+ touchscreen-size-y = <800>;
+ touchscreen-max-pressure = <255>;
+
+ /* GPIO218 for IRQ */
+ interrupt-parent = <&gpio6>;
+ interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
+
+ /* VDD is "digital supply" nominally 1.71-3.6V */
+ vdd-supply = <&ab8500_ldo_aux2_reg>;
+ /* VCPIN is "analog supply", 2.7-3.6 V */
+ vcpin-supply = <&ab8500_ldo_aux2_reg>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tma140_skomer_default>;
+ };
};
mcde@a0350000 {
@@ -564,6 +585,15 @@ skomer_cfg1 {
};
};
};
+ /* Interrupt line for the Cypress TMA140 touchscreen */
+ touchscreen {
+ tma140_skomer_default: tma140_skomer {
+ skomer_cfg1 {
+ pins = "GPIO218_AH11";
+ ste,config = <&gpio_in_nopull>;
+ };
+ };
+ };
};
&ab8505_gpio {
--
2.26.2
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^ permalink raw reply related
* Re: [PATCH V3 07/15] arch/kunmap_atomic: Consolidate duplicate code
From: Guenter Roeck @ 2020-05-16 22:33 UTC (permalink / raw)
To: ira.weiny
Cc: Peter Zijlstra, Benjamin Herrenschmidt, Dave Hansen, dri-devel,
linux-mips, James E.J. Bottomley, Max Filippov, Paul Mackerras,
H. Peter Anvin, sparclinux, Dan Williams, Helge Deller, x86,
linux-csky, Christoph Hellwig, Ingo Molnar, linux-snps-arc,
linux-xtensa, Borislav Petkov, Al Viro, Andy Lutomirski,
Thomas Gleixner, linux-arm-kernel, Chris Zankel,
Thomas Bogendoerfer, linux-parisc, linux-kernel, Christian Koenig,
Andrew Morton, linuxppc-dev, David S. Miller
In-Reply-To: <20200507150004.1423069-8-ira.weiny@intel.com>
On Thu, May 07, 2020 at 07:59:55AM -0700, ira.weiny@intel.com wrote:
> From: Ira Weiny <ira.weiny@intel.com>
>
> Every single architecture (including !CONFIG_HIGHMEM) calls...
>
> pagefault_enable();
> preempt_enable();
>
> ... before returning from __kunmap_atomic(). Lift this code into the
> kunmap_atomic() macro.
>
> While we are at it rename __kunmap_atomic() to kunmap_atomic_high() to
> be consistent.
>
> Reviewed-by: Christoph Hellwig <hch@lst.de>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
This patch results in:
Starting init: /bin/sh exists but couldn't execute it (error -14)
when trying to boot microblazeel:petalogix-ml605 in qemu.
Bisect log attached.
Guenter
---
# bad: [bdecf38f228bcca73b31ada98b5b7ba1215eb9c9] Add linux-next specific files for 20200515
# good: [2ef96a5bb12be62ef75b5828c0aab838ebb29cb8] Linux 5.7-rc5
git bisect start 'HEAD' 'v5.7-rc5'
# good: [3674d7aa7a8e61d993886c2fb7c896c5ef85e988] Merge remote-tracking branch 'crypto/master'
git bisect good 3674d7aa7a8e61d993886c2fb7c896c5ef85e988
# good: [87f6f21783522e6d62127cf33ae5e95f50874beb] Merge remote-tracking branch 'spi/for-next'
git bisect good 87f6f21783522e6d62127cf33ae5e95f50874beb
# good: [5c428e8277d5d97c85126387d4e00aa5adde4400] Merge remote-tracking branch 'staging/staging-next'
git bisect good 5c428e8277d5d97c85126387d4e00aa5adde4400
# good: [f68de67ed934e7bdef4799fd7777c86f33f14982] Merge remote-tracking branch 'hyperv/hyperv-next'
git bisect good f68de67ed934e7bdef4799fd7777c86f33f14982
# bad: [54acd2dc52b069da59639eea0d0c92726f32fb01] mm/memblock: fix a typo in comment "implict"->"implicit"
git bisect bad 54acd2dc52b069da59639eea0d0c92726f32fb01
# good: [784a17aa58a529b84f7cc50f351ed4acf3bd11f3] mm: remove the pgprot argument to __vmalloc
git bisect good 784a17aa58a529b84f7cc50f351ed4acf3bd11f3
# good: [6cd8137ff37e9a37aee2d2a8889c8beb8eab192f] khugepaged: replace the usage of system(3) in the test
git bisect good 6cd8137ff37e9a37aee2d2a8889c8beb8eab192f
# bad: [6987da379826ed01b8a1cf046b67cc8cc10117cc] sparc: remove unnecessary includes
git bisect bad 6987da379826ed01b8a1cf046b67cc8cc10117cc
# good: [bc17b545388f64c09e83e367898e28f60277c584] mm/hugetlb: define a generic fallback for is_hugepage_only_range()
git bisect good bc17b545388f64c09e83e367898e28f60277c584
# bad: [9b5aa5b43f957f03a1f4a9aff5f7924e2ebbc011] arch-kmap_atomic-consolidate-duplicate-code-checkpatch-fixes
git bisect bad 9b5aa5b43f957f03a1f4a9aff5f7924e2ebbc011
# good: [0941a38ff0790c1004270f952067a5918a4ba32d] arch/kmap: remove redundant arch specific kmaps
git bisect good 0941a38ff0790c1004270f952067a5918a4ba32d
# good: [56e635a64c2cbfa815c851af10e0f811e809977b] arch-kunmap-remove-duplicate-kunmap-implementations-fix
git bisect good 56e635a64c2cbfa815c851af10e0f811e809977b
# bad: [60f96b2233c790d4f1c49317643051f1670bcb29] arch/kmap_atomic: consolidate duplicate code
git bisect bad 60f96b2233c790d4f1c49317643051f1670bcb29
# good: [7b3708dc3bf72a647243064fe7ddf9a76248ddfd] {x86,powerpc,microblaze}/kmap: move preempt disable
git bisect good 7b3708dc3bf72a647243064fe7ddf9a76248ddfd
# first bad commit: [60f96b2233c790d4f1c49317643051f1670bcb29] arch/kmap_atomic: consolidate duplicate code
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* RE: [PATCH v3 1/5] scsi: ufs: Remove unnecessary memset for dev_info
From: Avri Altman @ 2020-05-17 6:11 UTC (permalink / raw)
To: Stanley Chu, linux-scsi@vger.kernel.org,
martin.petersen@oracle.com, alim.akhtar@samsung.com,
jejb@linux.ibm.com, asutoshd@codeaurora.org
Cc: bvanassche@acm.org, andy.teng@mediatek.com,
chun-hung.wu@mediatek.com, kuohong.wang@mediatek.com,
linux-kernel@vger.kernel.org, cang@codeaurora.org,
linux-mediatek@lists.infradead.org, peter.wang@mediatek.com,
matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org,
beanhuo@micron.com
In-Reply-To: <20200516174615.15445-2-stanley.chu@mediatek.com>
>
> The whole UFS host instance has been zero-initialized by
> scsi_host_alloc(), thus UFS driver does not need to clear
> "dev_info" member specifically in ufshcd_device_params_init().
>
> Simply remove the unnecessary code.
>
> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
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* RE: [PATCH v3 2/5] scsi: ufs: Allow WriteBooster on UFS 2.2 devices
From: Avri Altman @ 2020-05-17 6:12 UTC (permalink / raw)
To: Stanley Chu, linux-scsi@vger.kernel.org,
martin.petersen@oracle.com, alim.akhtar@samsung.com,
jejb@linux.ibm.com, asutoshd@codeaurora.org
Cc: bvanassche@acm.org, andy.teng@mediatek.com,
chun-hung.wu@mediatek.com, kuohong.wang@mediatek.com,
linux-kernel@vger.kernel.org, cang@codeaurora.org,
linux-mediatek@lists.infradead.org, peter.wang@mediatek.com,
matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org,
beanhuo@micron.com
In-Reply-To: <20200516174615.15445-3-stanley.chu@mediatek.com>
>
> According to the UFS specification, WriteBooster is officially
> supported by UFS 2.2.
>
> Since UFS 2.2 specification has been finalized in JEDEC and
> such devices have also showed up in the market, modify the
> checking rule for ufshcd_wb_probe() to allow these devices to enable
> WriteBooster.
>
> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
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^ permalink raw reply
* RE: [PATCH v3 3/5] scsi: ufs: Fix index of attributes query for WriteBooster feature
From: Avri Altman @ 2020-05-17 6:13 UTC (permalink / raw)
To: Stanley Chu, linux-scsi@vger.kernel.org,
martin.petersen@oracle.com, alim.akhtar@samsung.com,
jejb@linux.ibm.com, asutoshd@codeaurora.org
Cc: bvanassche@acm.org, andy.teng@mediatek.com,
chun-hung.wu@mediatek.com, kuohong.wang@mediatek.com,
linux-kernel@vger.kernel.org, cang@codeaurora.org,
linux-mediatek@lists.infradead.org, peter.wang@mediatek.com,
matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org,
beanhuo@micron.com
In-Reply-To: <20200516174615.15445-4-stanley.chu@mediatek.com>
>
>
> For WriteBooster feature related attributes, the index used by
> query shall be LUN ID if LU Dedicated buffer mode is enabled.
>
> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
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^ permalink raw reply
* Re: [PATCH 1/3] arm_pmu: Add support for perf NMI interrupts registration
From: Lecopzer Chen @ 2020-05-17 6:39 UTC (permalink / raw)
To: linux-kernel
Cc: mark.rutland, Jian-Lin Chen, alexander.shishkin, catalin.marinas,
jolsa, acme, peterz, mingo, linux-mediatek, matthias.bgg,
namhyung, will, yj.chiang, linux-arm-kernel
In-Reply-To: <20200516124857.75004-2-lecopzer@gmail.com>
There was some mistakes when merging this patch.
The free nmi part is not present :(
The following part will be added in V2 next weekend.
diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
index fa37b72d19e2..aa9ed09e5303 100644
--- a/drivers/perf/arm_pmu.c
+++ b/drivers/perf/arm_pmu.c
@@ -544,6 +544,38 @@ static int armpmu_count_irq_users(const int irq)
return count;
}
+static void armpmu_teardown_percpu_nmi_other(void* info)
+{
+ /*
+ * We don't need to disable preemption since smp_call_function()
+ * did this for us.
+ */
+ teardown_percpu_nmi((uintptr_t) info);
+}
+
+static void _armpmu_free_irq(unsigned int irq, void *dev_id)
+{
+ if (armpmu_support_nmi())
+ free_nmi(irq, dev_id);
+ else
+ free_irq(irq, dev_id);
+}
+
+static void _armpmu_free_percpu_irq(unsigned int irq, void __percpu *dev_id)
+{
+ if (armpmu_support_nmi()) {
+ preempt_disable();
+ teardown_percpu_nmi(irq);
+ smp_call_function(armpmu_teardown_percpu_nmi_other,
+ (void *)(uintptr_t) irq, true);
+ preempt_enable();
+
+ free_percpu_nmi(irq, dev_id);
+ }
+ else
+ free_percpu_irq(irq, dev_id);
+}
+
void armpmu_free_irq(int irq, int cpu)
{
if (per_cpu(cpu_irq, cpu) == 0)
@@ -552,9 +584,9 @@ void armpmu_free_irq(int irq, int cpu)
return;
if (!irq_is_percpu_devid(irq))
- free_irq(irq, per_cpu_ptr(&cpu_armpmu, cpu));
+ _armpmu_free_irq(irq, per_cpu_ptr(&cpu_armpmu, cpu));
else if (armpmu_count_irq_users(irq) == 1)
- free_percpu_irq(irq, &cpu_armpmu);
+ _armpmu_free_percpu_irq(irq, &cpu_armpmu);
per_cpu(cpu_irq, cpu) = 0;
}
Thanks,
Lecopzer
Lecopzer Chen <lecopzer@gmail.com> 於 2020年5月16日 週六 下午8:50寫道：
>
> Register perf interrupts by request_nmi()/percpu_nmi() when both
> ARM64_PSEUDO_NMI and ARM64_PSEUDO_NMI_PERF are enabled and nmi
> cpufreature is active.
>
> Signed-off-by: Lecopzer Chen <lecopzer.chen@mediatek.com>
> ---
> drivers/perf/arm_pmu.c | 51 +++++++++++++++++++++++++++++++-----
> include/linux/perf/arm_pmu.h | 6 +++++
> 2 files changed, 51 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
> index df352b334ea7..fa37b72d19e2 100644
> --- a/drivers/perf/arm_pmu.c
> +++ b/drivers/perf/arm_pmu.c
> @@ -559,6 +559,48 @@ void armpmu_free_irq(int irq, int cpu)
> per_cpu(cpu_irq, cpu) = 0;
> }
>
> +static void armpmu_prepare_percpu_nmi_other(void *info)
> +{
> + /*
> + * We don't need to disable preemption since smp_call_function()
> + * did this for us.
> + */
> + prepare_percpu_nmi((uintptr_t) info);
> +}
> +
> +static int _armpmu_request_irq(unsigned int irq, irq_handler_t handler,
> + unsigned long flags, int cpu)
> +{
> + if (armpmu_support_nmi())
> + return request_nmi(irq, handler, flags, "arm-pmu",
> + per_cpu_ptr(&cpu_armpmu, cpu));
> + return request_irq(irq, handler, flags, "arm-pmu",
> + per_cpu_ptr(&cpu_armpmu, cpu));
> +}
> +
> +static int _armpmu_request_percpu_irq(unsigned int irq, irq_handler_t handler)
> +{
> + if (armpmu_support_nmi()) {
> + int err;
> +
> + err = request_percpu_nmi(irq, handler, "arm-pmu",
> + &cpu_armpmu);
> + if (err)
> + return err;
> +
> + preempt_disable();
> + err = prepare_percpu_nmi(irq);
> + if (err) {
> + return err;
> + preempt_enable();
> + }
> + smp_call_function(armpmu_prepare_percpu_nmi_other,
> + (void *)(uintptr_t) irq, true);
> + preempt_enable();
> + }
> + return request_percpu_irq(irq, handler, "arm-pmu",
> + &cpu_armpmu);
> +}
> +
> int armpmu_request_irq(int irq, int cpu)
> {
> int err = 0;
> @@ -582,12 +624,9 @@ int armpmu_request_irq(int irq, int cpu)
> IRQF_NO_THREAD;
>
> irq_set_status_flags(irq, IRQ_NOAUTOEN);
> - err = request_irq(irq, handler, irq_flags, "arm-pmu",
> - per_cpu_ptr(&cpu_armpmu, cpu));
> - } else if (armpmu_count_irq_users(irq) == 0) {
> - err = request_percpu_irq(irq, handler, "arm-pmu",
> - &cpu_armpmu);
> - }
> + err = _armpmu_request_irq(irq, handler, irq_flags, cpu);
> + } else if (armpmu_count_irq_users(irq) == 0)
> + err = _armpmu_request_percpu_irq(irq, handler);
>
> if (err)
> goto err_out;
> diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
> index 5b616dde9a4c..5b878b5a22aa 100644
> --- a/include/linux/perf/arm_pmu.h
> +++ b/include/linux/perf/arm_pmu.h
> @@ -160,6 +160,12 @@ int arm_pmu_acpi_probe(armpmu_init_fn init_fn);
> static inline int arm_pmu_acpi_probe(armpmu_init_fn init_fn) { return 0; }
> #endif
>
> +static inline bool armpmu_support_nmi(void)
> +{
> + return IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI_PERF) &&
> + system_uses_irq_prio_masking();
> +}
> +
> /* Internal functions only for core arm_pmu code */
> struct arm_pmu *armpmu_alloc(void);
> struct arm_pmu *armpmu_alloc_atomic(void);
> --
> 2.25.1
>
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