* RE: [PATCH] thermal: imx8mm: Add get_trend ops
From: Anson Huang @ 2020-05-25 15:05 UTC (permalink / raw)
To: Daniel Lezcano, rui.zhang@intel.com, amit.kucheria@verdurent.com,
shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com,
linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: dl-linux-imx
In-Reply-To: <dadf94db-8aa5-d1a7-5818-c56032a44ea4@linaro.org>
Hi, Daniel
> Subject: Re: [PATCH] thermal: imx8mm: Add get_trend ops
>
> On 25/05/2020 04:46, Anson Huang wrote:
> > Hi, Daniel
>
> [ ... ]
>
> > I tried modifying the min/max to '2' in cooling map, it works that
> > whenever cooling action is needed, the max cooling action will be
> > applied. But I also noticed some behaviors which NOT as expected:
> >
> > 1. to easy the test, I enable the " CONFIG_THERMAL_WRITABLE_TRIPS",
> > and just modify the passive trip threshold to trigger the cooling
> > action, this is much more easy then putting the board into an oven to
> > increase the SoC temperature or running many high loading test to
> > increase the temperature, but when I modify the passive trip threshold
> > to be lower than current temperature, the cooling action is NOT
> > triggered immediately, it is because the default step_wise governor
> > will NOT trigger the cooling action when the trend is
> > THERMAL_TREND_STABLE. But what expected is, when the temperature is
> > exceed the passive trip threshold, the cooling action can be triggered
> > immediately no matter the trend is stable or raising.
>
> You are right, what is expected is, when the temperature exceeds the passive
> trip threshold, a cooling action happens, the trend is raising in this case.
>
> But in your test, it is not what is happening: the trip point is changing, not the
> temperature.
>
> Probably, the cpufreq driver is at its lowest OPP, so there is no room for more
> cooling effect when changing the trip point.
>
> IMO, the test is not right as the trip point is decreased to a temperature where
> actually the SoC is not hot.
>
> If you want to test it easily, I recommend to use dhrystone, something like:
>
> dhrystone -t 6 -l 10000
>
> That will make your board to heat immediately.
Thanks, I understand. To aligned with the formal test method, I will inform our test
team to update the test case to meet the requirement.
>
> > That
> > means we have to implement our own .get_trend callback?
>
> From my POV it must disappear, because it has little meaning. The governor is
> the one which should be dealing with that and call the corresponding cooling
> index.
OK, I will use common .get_trend() implementation.
>
> > 2. No margin for releasing the cooling action, for example, if cooling
> > action is triggered, when the temperature drops below the passive trip
> > threshold, the cooling action will be cancelled immediately, if SoC
> > keeps running at full performance, the temperature will increase very
> > soon, which may cause the SoC keep triggering/cancelling the cooling
> > action around the passive trip threshold. If there is a margin, the
> > situation will be much better.
> >
> > Do you have any idea/comment about them?
>
> Yes, that is a good point. The hysteresis is supposed to do that. There is a work
> done by Andrzej Pietrasiewicz to disable / enable the thermal zones [1]. I think
> we should be able to fix that after the changes are done.
OK, then I will wait for this change. So to apply MAX cooling action immediately,
all expected changes for i.MX platforms are to assign min/max cooling index in
DT cooling map, I will summit a patch set then.
Thanks,
Anson.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: pinctrl: Add bindings for mscc, ocelot-sgpio
From: Lars Povlsen @ 2020-05-25 14:38 UTC (permalink / raw)
To: Linus Walleij
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Alexandre Belloni, linux-kernel@vger.kernel.org,
Microchip Linux Driver Support, open list:GPIO SUBSYSTEM,
SoC Team, Rob Herring, Linux ARM, Lars Povlsen
In-Reply-To: <CACRpkdYesD9sRQZXQNEaBY2Ouu3bjKKGWpRtU-Lpa4AcjyPwXw@mail.gmail.com>
Linus Walleij writes:
> On Mon, May 18, 2020 at 10:50 PM Lars Povlsen
> <lars.povlsen@microchip.com> wrote:
>> Linus Walleij writes:
>>
>> > On Wed, May 13, 2020 at 4:11 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>> >
>> >> This adds DT bindings for the Microsemi SGPIO controller, bindings
>> >> mscc,ocelot-sgpio and mscc,luton-sgpio.
>> >>
>> >> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> >> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> >
>> >> + microchip,sgpio-ports:
>> >> + description: This is a 32-bit bitmask, configuring whether a
>> >> + particular port in the controller is enabled or not. This allows
>> >> + unused ports to be removed from the bitstream and reduce latency.
>> >> + $ref: "/schemas/types.yaml#/definitions/uint32"
>> >
>> > I don't know about this.
>> >
>> > You are saying this pin controller can have up to 32 GPIO "ports"
>> > (also known as banks).
>> >
>> > Why can't you just represent each such port as a separate GPIO
>> > node:
>> >
>> > pinctrl@nnn {
>> > gpio@0 {
>> > ....
>> > };
>> > gpio@1 {
>> > ....
>> > };
>> > ....
>> > gpio@31 {
>> > ....
>> > };
>> > };
>> >
>> > Then if some of them are unused just set it to status = "disabled";
>> >
>> > This also makes your Linux driver simpler because each GPIO port
>> > just becomes a set of 32bit registers and you can use
>> > select GPIO_GENERIC and bgpio_init() and save a whole
>> > slew of standard stock code.
>> >
>>
>> Linus, thank you for your input.
>>
>> The controller handles an array of 32*n signals, where n >= 1 && n <=
>> 4.
>>
>> The problem with the above approach is that the ports are disabled
>> *port*-wise - so they remove all (upto) 4 bits. That would be across the
>> banks.
>>
>> You could of course have the "implied" semantics that a disabled port at
>> any bit position disabled all (bit positions for the same port).
>
> I don't understand this, you would have to elaborate...
>
> In any case microchip,sgpio-ports is probably not the right thing,
> use ngpios which is documented and just divide by 32 to get the
> number of ports I think? But that is just in case they get
> enabled strictly in sequence, otherwise you'd need a custom
> property.
>
Hi Linus,
Yes, the problem is they're not in sequence. F.ex. you could have ports
0,1 enabled, skip 2,3,4 and have 5,6,7 enabled.
In the data stream you would then have:
p0.0 p0.1 p0.2 p0.3
p1.0 p1.1 p1.2 p1.3
p5.0 p5.1 p5.2 p5.3
p6.0 p6.1 p6.2 p6.3
p7.0 p7.1 p7.2 p7.3
I will mull about this and try to come up with something better and more
understandable.
Luckily, this is not gating for integrating sparx5, so its possible
we'll just skip the SGPIO driver for now.
I'll provide an update as soon as possible.
---Lars
> Yours,
> Linus Walleij
--
Lars Povlsen,
Microchip
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH SECOND RESEND] MAINTAINERS: adjust entries to moving CEC platform drivers
From: Lukas Bulwahn @ 2020-05-25 14:29 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Hans Verkuil
Cc: Neil Armstrong, kernel-janitors, Ettore Chimenti, Thierry Reding,
Benjamin Gaignard, Guenter Roeck, linux-stm32, Marek Szyprowski,
linux-samsung-soc, Kevin Hilman, Krzysztof Kozlowski,
Jonathan Hunter, Kukjin Kim, Lukas Bulwahn, Alexandre Torgue,
Enric Balletbo i Serra, linux-tegra, linux-amlogic, Benson Leung,
linux-arm-kernel, linux-kernel, Maxime Coquelin, Joe Perches
Commit 4be5e8648b0c ("media: move CEC platform drivers to a separate
directory") moved various files into a new directory structure, but did
not adjust the entries in MAINTAINERS.
Since then, ./scripts/get_maintainer.pl --self-test=patterns complains:
warning: no file matches F: drivers/media/platform/s5p-cec/
warning: no file matches F: drivers/media/platform/tegra-cec/
warning: no file matches F: drivers/media/platform/cec-gpio/
warning: no file matches F: drivers/media/platform/meson/ao-cec-g12a.c
warning: no file matches F: drivers/media/platform/meson/ao-cec.c
warning: no file matches F: drivers/media/platform/seco-cec/seco-cec.c
warning: no file matches F: drivers/media/platform/seco-cec/seco-cec.h
warning: no file matches F: drivers/media/platform/sti/cec/
Update the MAINTAINERS entries to the new file locations.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
---
Mauro, please pick this non-urgent minor clean-up patch on top of the
CEC platform driver moves.
applies cleanly on next-20200417, next-20200505 and still on next-20200525
for this second resend.
v1 send here:
https://lore.kernel.org/lkml/20200418093630.6149-1-lukas.bulwahn@gmail.com/
v1 first resend here:
https://lore.kernel.org/lkml/20200506050744.4779-1-lukas.bulwahn@gmail.com/
MAINTAINERS | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7a442b48f24b..bf5cb149101b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2403,7 +2403,7 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
L: linux-media@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/media/s5p-cec.txt
-F: drivers/media/platform/s5p-cec/
+F: drivers/media/cec/platform/s5p/
ARM/SAMSUNG S5P SERIES JPEG CODEC SUPPORT
M: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com>
@@ -2548,7 +2548,7 @@ L: linux-tegra@vger.kernel.org
L: linux-media@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/media/tegra-cec.txt
-F: drivers/media/platform/tegra-cec/
+F: drivers/media/cec/platform/tegra/
ARM/TETON BGA MACHINE SUPPORT
M: "Mark F. Brown" <mark.brown314@gmail.com>
@@ -3969,7 +3969,7 @@ S: Supported
W: http://linuxtv.org
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/cec-gpio.txt
-F: drivers/media/platform/cec-gpio/
+F: drivers/media/cec/platform/cec-gpio/
CELL BROADBAND ENGINE ARCHITECTURE
M: Arnd Bergmann <arnd@arndb.de>
@@ -11146,8 +11146,7 @@ S: Supported
W: http://linux-meson.com/
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml
-F: drivers/media/platform/meson/ao-cec-g12a.c
-F: drivers/media/platform/meson/ao-cec.c
+F: drivers/media/cec/platform/meson/
MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS
M: Liang Yang <liang.yang@amlogic.com>
@@ -15212,8 +15211,7 @@ F: drivers/mmc/host/sdricoh_cs.c
SECO BOARDS CEC DRIVER
M: Ettore Chimenti <ek5.chimenti@gmail.com>
S: Maintained
-F: drivers/media/platform/seco-cec/seco-cec.c
-F: drivers/media/platform/seco-cec/seco-cec.h
+F: drivers/media/cec/platform/seco/
SECURE COMPUTING
M: Kees Cook <keescook@chromium.org>
@@ -16249,7 +16247,7 @@ STI CEC DRIVER
M: Benjamin Gaignard <benjamin.gaignard@linaro.org>
S: Maintained
F: Documentation/devicetree/bindings/media/stih-cec.txt
-F: drivers/media/platform/sti/cec/
+F: drivers/media/cec/platform/sti/
STK1160 USB VIDEO CAPTURE DRIVER
M: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 2/3] sdhci: sparx5: Add Sparx5 SoC eMMC driver
From: Lars Povlsen @ 2020-05-25 14:26 UTC (permalink / raw)
To: Adrian Hunter
Cc: devicetree, Ulf Hansson, Alexandre Belloni, linux-mmc,
linux-kernel, Microchip Linux Driver Support, SoC Team,
linux-arm-kernel, Lars Povlsen
In-Reply-To: <abbd2306-55ed-014c-4b06-a5cb3f34796f@intel.com>
Adrian Hunter writes:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 20/05/20 2:14 pm, Lars Povlsen wrote:
>>
>> Lars Povlsen writes:
>>
>>> Adrian Hunter writes:
>>>
>>>> On 13/05/20 4:31 pm, Lars Povlsen wrote:
>>>>> This adds the eMMC driver for the Sparx5 SoC. It is based upon the
>>>>> designware IP, but requires some extra initialization and quirks.
>>>>>
>>>>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>>>>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>>>>> ---
>> {Snip]
>>>>> +};
>>>>> +
>>>>> +static const struct sdhci_pltfm_data sdhci_sparx5_pdata = {
>>>>> + .quirks = 0,
>>>>> + .quirks2 = SDHCI_QUIRK2_HOST_NO_CMD23 | /* Card quirk */
>>>>
>>>> If this is a card quirk then it should be in drivers/mmc/core/quirks.h not here.
>>>
>>
>> Adrian, I had a go at changing the controller quirk to a card quirk.
>>
>> Unfortunately, SDHCI_QUIRK2_HOST_NO_CMD23 does not directly translate to
>> MMC_QUIRK_BLK_NO_CMD23, as for 'do_rel_wr' in mmc_blk_rw_rq_prep(), it
>> will *still* use MMC_SET_BLOCK_COUNT (cmd23), causing the issue.
>>
>> We are using a ISSI "IS004G" device, and so I have gone through the
>> motions of adding it to quirks.h. The comment before the list of devices
>> using MMC_QUIRK_BLK_NO_CMD23 suggest working around a performance issue,
>> which is not exactly the issue I'm seeing. I'm seeing combinations of
>> CMD_TOUT_ERR, DATA_CRC_ERR and DATA_END_BIT_ERR whenever a cmd23 is
>> issued.
>>
>> I have not been able to test the controller with another eMMC device
>> yet, but I expect its not the controller at fault.
>>
>> So, I'm a little bit in doubt of how to proceed - either keep the quirk
>> as a controller quirk - or make a *new* card quirk (with
>> SDHCI_QUIRK2_HOST_NO_CMD23 semantics)?
>>
>> Anybody else have had experience with ISSI eMMC devices?
>>
>> I have also tried to use DT sdhci-caps-mask, but MMC_CAP_CMD23 is not
>> read from the controller just (unconditionally) set in sdhci.c - so that
>> doesn't fly either.
>>
>> Any suggestions?
>
> It is up to you. In the future, you may want to distinguish devices that
> have this problem from ones that do not.
>
> If you are not sure it is the ISSI eMMC, and maybe not the host controller,
> then might it be the board? Perhaps make SDHCI_QUIRK2_HOST_NO_CMD23
> conditional on the particular compatibility string?
>
> At a minimum, change the "/* Card quirk */" comment to a fuller explanation.
>
Adrian, I'm getting a board ready with another eMMC device, and we're
also trying to contact ISSI for info.
My hope is to at least verify whether this is a controller or a card
issue one way or the other. Then, I'll choose an appropriate solution
for it.
Thank you for your advice so far.
---Lars
>>
>>> Yes, its supposedly a card quirk. I'll see to use the card quirks
>>> methods in place.
>>>
>>
--
Lars Povlsen,
Microchip
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [GIT PULL] iommu/arm-smmu: Updates for 5.8
From: Joerg Roedel @ 2020-05-25 14:23 UTC (permalink / raw)
To: Will Deacon
Cc: kernel-team, iommu, robin.murphy, linux-kernel, linux-arm-kernel
In-Reply-To: <20200521173944.GM6608@willie-the-truck>
On Thu, May 21, 2020 at 06:39:44PM +0100, Will Deacon wrote:
> Hi Joerg,
>
> Please pull these Arm SMMU updates for 5.8. The branch is based on your
> 'core' branch from a little while ago.
>
> Summary in the tag.
>
> Cheers,
>
> Will
>
> --->8
>
> The following changes since commit 1b032ec1ecbce6047af7d11c9db432e237cb17d8:
>
> iommu: Unexport iommu_group_get_for_dev() (2020-05-05 14:36:14 +0200)
>
> are available in the Git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git tags/arm-smmu-updates
>
> for you to fetch changes up to 0299a1a81ca056e79c1a7fb751f936ec0d5c7afe:
>
> iommu/arm-smmu-v3: Manage ASIDs with xarray (2020-05-21 14:54:06 +0100)
Pulled, thanks Will.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* RE: [RFC PATCH v12 10/11] arm64: add mechanism to let user choose which counter to return
From: Jianyong Wu @ 2020-05-25 14:18 UTC (permalink / raw)
To: Marc Zyngier, Richard Cochran
Cc: Mark Rutland, Justin He, Wei Chen, kvm@vger.kernel.org,
Suzuki Poulose, netdev@vger.kernel.org, Steve Capper,
linux-kernel@vger.kernel.org, sean.j.christopherson@intel.com,
Steven Price, Kaly Xin, john.stultz@linaro.org, yangbo.lu@nxp.com,
pbonzini@redhat.com, tglx@linutronix.de, nd, will@kernel.org,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <306951e4945b9e486dc98818ba24466d@kernel.org>
Hi Marc,
> -----Original Message-----
> From: Marc Zyngier <maz@kernel.org>
> Sent: Monday, May 25, 2020 5:17 PM
> To: Richard Cochran <richardcochran@gmail.com>; Jianyong Wu
> <Jianyong.Wu@arm.com>
> Cc: netdev@vger.kernel.org; yangbo.lu@nxp.com; john.stultz@linaro.org;
> tglx@linutronix.de; pbonzini@redhat.com; sean.j.christopherson@intel.com;
> Mark Rutland <Mark.Rutland@arm.com>; will@kernel.org; Suzuki Poulose
> <Suzuki.Poulose@arm.com>; Steven Price <Steven.Price@arm.com>; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> kvmarm@lists.cs.columbia.edu; kvm@vger.kernel.org; Steve Capper
> <Steve.Capper@arm.com>; Kaly Xin <Kaly.Xin@arm.com>; Justin He
> <Justin.He@arm.com>; Wei Chen <Wei.Chen@arm.com>; nd <nd@arm.com>
> Subject: Re: [RFC PATCH v12 10/11] arm64: add mechanism to let user
> choose which counter to return
>
> On 2020-05-24 03:11, Richard Cochran wrote:
> > On Fri, May 22, 2020 at 04:37:23PM +0800, Jianyong Wu wrote:
> >> In general, vm inside will use virtual counter compered with host use
> >> phyical counter. But in some special scenarios, like nested
> >> virtualization, phyical counter maybe used by vm. A interface added
> >> in ptp_kvm driver to offer a mechanism to let user choose which
> >> counter should be return from host.
> >
> > Sounds like you have two time sources, one for normal guest, and one
> > for nested. Why not simply offer the correct one to user space
> > automatically? If that cannot be done, then just offer two PHC
> > devices with descriptive names.
>
> There is no such thing as a distinction between nested or non-nested.
> Both counters are available to the guest at all times, and said guest can
> choose whichever it wants to use. So the hypervisor (KVM) has to support
> both counters as a reference.
>
It's great that we can decide which counter to return in guest kernel. So we can abandon these code, including patch 9/11 and 10/11, that expose the interface to userspace to do the decision.
> For a Linux guest, we always know which reference we're using (the virtual
> counter). So it is pointless to expose the choice to userspace at all.
>
So, we should throw these code of deciding counter type in linux driver away and just keep the hypercall service of providing both virtual counter and physical counter in linux to server non-linux guest.
Am I right?
> >
> >> diff --git a/drivers/ptp/ptp_chardev.c b/drivers/ptp/ptp_chardev.c
> >> index fef72f29f3c8..8b0a7b328bcd 100644
> >> --- a/drivers/ptp/ptp_chardev.c
> >> +++ b/drivers/ptp/ptp_chardev.c
> >> @@ -123,6 +123,9 @@ long ptp_ioctl(struct posix_clock *pc, unsigned
> >> int cmd, unsigned long arg)
> >> struct timespec64 ts;
> >> int enable, err = 0;
> >>
> >> +#ifdef CONFIG_ARM64
> >> + static long flag;
> >
> > static? This is not going to fly.
> >
> >> + * In most cases, we just need virtual counter from host and
> >> + * there is limited scenario using this to get physical counter
> >> + * in guest.
> >> + * Be careful to use this as there is no way to set it back
> >> + * unless you reinstall the module.
> >
> > How on earth is the user supposed to know this?
> >
> > From your description, this "flag" really should be a module
> > parameter.
>
> Not even that. If anything, the driver can obtain full knowledge of which
> counter is in use without any help. And the hard truth is that it is
> *always* the virtual counter as far as Linux is concerned.
Good!
Thanks
Jianyong
>
> M.
> --
> Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH] stmmac: platform: add "snps,dwmac-5.10a" IP compatible string
From: Andrew Lunn @ 2020-05-25 14:10 UTC (permalink / raw)
To: Fugang Duan
Cc: p.zabel, alexandre.torgue, netdev, linux-stm32, joabreu,
mcoquelin.stm32, kuba, peppe.cavallaro, davem, linux-arm-kernel
In-Reply-To: <1590394945-5571-1-git-send-email-fugang.duan@nxp.com>
On Mon, May 25, 2020 at 04:22:25PM +0800, Fugang Duan wrote:
> Add "snps,dwmac-5.10a" compatible string for 5.10a version that can
> avoid to define some plat data in glue layer.
Documentation/devicetree/bindings/net/snps,dwmac.yaml ?
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v5 09/13] soc: mediatek: cmdq: add write_s value function
From: Matthias Brugger @ 2020-05-25 13:59 UTC (permalink / raw)
To: Dennis-YC Hsieh
Cc: Mark Rutland, devicetree, Philipp Zabel, wsd_upstream,
David Airlie, Jassi Brar, linux-kernel, dri-devel, HS Liao,
Rob Herring, linux-mediatek, Houlong Wei, Daniel Vetter, CK Hu,
Bibby Hsieh, linux-arm-kernel
In-Reply-To: <1590403125.11988.5.camel@mtkswgap22>
On 25/05/2020 12:38, Dennis-YC Hsieh wrote:
>
> On Mon, 2020-05-25 at 10:39 +0200, Matthias Brugger wrote:
>>
>> On 25/05/2020 04:27, Dennis-YC Hsieh wrote:
>>>
>>> On Sun, 2020-05-24 at 20:13 +0200, Matthias Brugger wrote:
>>>>
>>>> On 24/05/2020 19:31, Dennis-YC Hsieh wrote:
>>>>> Hi Matthias,
>>>>>
>>>>> Thanks for your comment.
>>>>>
>>>>> On Sat, 2020-05-16 at 20:20 +0200, Matthias Brugger wrote:
>>>>>>
>>>>>> On 08/03/2020 11:52, Dennis YC Hsieh wrote:
>>>>>>> add write_s function in cmdq helper functions which
>>>>>>> writes a constant value to address with large dma
>>>>>>> access support.
>>>>>>>
>>>>>>> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
>>>>>>> Reviewed-by: CK Hu <ck.hu@mediatek.com>
>>>>>>> ---
>>>>>>> drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++
>>>>>>> include/linux/soc/mediatek/mtk-cmdq.h | 14 ++++++++++++++
>>>>>>> 2 files changed, 40 insertions(+)
>>>>>>>
>>>>>>> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> index 03c129230cd7..a9ebbabb7439 100644
>>>>>>> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> @@ -269,6 +269,32 @@ int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>>>>>> }
>>>>>>> EXPORT_SYMBOL(cmdq_pkt_write_s);
>>>>>>>
>>>>>>> +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>>>>>> + u16 addr_low, u32 value, u32 mask)
>>>>>>> +{
>>>>>>> + struct cmdq_instruction inst = { {0} };
>>>>>>> + int err;
>>>>>>> +
>>>>>>> + if (mask != U32_MAX) {
>>>>>>> + inst.op = CMDQ_CODE_MASK;
>>>>>>> + inst.mask = ~mask;
>>>>>>> + err = cmdq_pkt_append_command(pkt, inst);
>>>>>>> + if (err < 0)
>>>>>>> + return err;
>>>>>>> +
>>>>>>> + inst.op = CMDQ_CODE_WRITE_S_MASK;
>>>>>>> + } else {
>>>>>>> + inst.op = CMDQ_CODE_WRITE_S;
>>>>>>> + }
>>>>>>> +
>>>>>>> + inst.sop = high_addr_reg_idx;
>>>>>>
>>>>>> Writing u16 value in a 5 bit wide variable?
>>>>>
>>>>> We need only 5 bits in this case. I'll change high_addr_reg_idx
>>>>> parameter to u8.
>>>>>
>>>>
>>>> Ok, please make sure to mask the value, so that it's explicit in the code that
>>>> we only use the lowest 5 bits of high_addr_reg_idx.
>>>
>>> Is it necessary to mask the value?
>>> Since sop already defined as "u8 sop:5;", I thought it is explicit that
>>> only use 5 bits and compiler should do the rest jobs.
>>
>> Yes but it makes the code more explicit if we have a
>> inst.sop = high_addr_reg_idx & 0x1f;
>>
>> What do you think?
>
> The value assign to sop will restrict by hardware spec. Clients call
> this function will define constant value and use it as parameter. So I
> think we don't worry about client call this api with wrong value.
>
Ok, then let's change the parameter to u8 and don't add a mask.
Regards,
Matthias
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property
From: Andrew Lunn @ 2020-05-25 13:57 UTC (permalink / raw)
To: Pavel Machek
Cc: devicetree, Florian Fainelli, jianxin.pan, Martin Blumenstingl,
netdev, linux-kernel, robh+dt, linux-amlogic, davem,
linux-arm-kernel
In-Reply-To: <20200525090718.GB16796@amd>
> > standardizing on rx-delay-ps and tx-delay-ps would make sense since that
> > is the lowest resolution and the property would be correctly named with
> > an unit in the name.
>
> Seems like similar patch is already being reviewed from Dan Murphy (?)
> from TI.
Dan is working on the PHY side. But there is probably code which can
be shared.
One question to consider, do we want the same properties names for MAC
and PHY, or do we want to make them different, to avoid confusion?
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 0/2] Let pci_fixup_final access iommu_fwnode
From: Joerg Roedel @ 2020-05-25 13:43 UTC (permalink / raw)
To: Zhangfei Gao
Cc: jean-philippe, Lorenzo Pieralisi, Herbert Xu, Greg Kroah-Hartman,
Hanjun Guo, Rafael J. Wysocki, linux-kernel, iommu, linux-acpi,
Wangzhou, linux-crypto, Sudeep Holla, kenneth-lee-2012,
linux-arm-kernel, Len Brown
In-Reply-To: <1589256511-12446-1-git-send-email-zhangfei.gao@linaro.org>
On Tue, May 12, 2020 at 12:08:29PM +0800, Zhangfei Gao wrote:
> Some platform devices appear as PCI but are
> actually on the AMBA bus, and they need fixup in
> drivers/pci/quirks.c handling iommu_fwnode.
> So calling pci_fixup_final after iommu_fwnode is allocated.
>
> For example:
> Hisilicon platform device need fixup in
> drivers/pci/quirks.c
>
> +static void quirk_huawei_pcie_sva(struct pci_dev *pdev)
> +{
> + struct iommu_fwspec *fwspec;
> +
> + pdev->eetlp_prefix_path = 1;
> + fwspec = dev_iommu_fwspec_get(&pdev->dev);
> + if (fwspec)
> + fwspec->can_stall = 1;
> +}
> +
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
I don't think it is a great idea to hook this into PCI_FIXUP_FINAL. The
fixup list needs to be processed for every device, which will slow down
probing.
So either we introduce something like PCI_FIXUP_IOMMU, if this is
entirely PCI specific. If it needs to be generic we need some fixup
infrastructure in the IOMMU code itself.
Regards,
Joerg
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 12/21] drm/mcde: Use GEM CMA object functions
From: Thomas Zimmermann @ 2020-05-25 13:27 UTC (permalink / raw)
To: Linus Walleij
Cc: Alexandre Belloni, linux-aspeed, Neil Armstrong, Dave Airlie,
Liviu Dudau, open list:DRM PANEL DRIVERS, Paul Cercueil,
Laurent Pinchart, Mihail Atanassov, Sam Ravnborg, Marek Vasut,
Kevin Hilman, abrodkin, k00278426, Xinliang Liu,
Ludovic Desroches, Tomi Valkeinen, james.qian.wang,
NXP Linux Team, Joel Stanley, Alexandre TORGUE, Chenfeng (puck),
Sascha Hauer, Alison Wang, Jyri Sarha, Chen-Yu Tsai,
Vincent Abriou, Linux ARM, Maxime Coquelin, Boris Brezillon,
Andrew Jeffery, Philippe Cornu, Yannick Fertre, Kieran Bingham,
Sascha Hauer, Rongrong Zou, Shawn Guo
In-Reply-To: <CACRpkdZVgbqLmqzvZBAzKvEkYmT=be=d2UxyRMwRXjYDp1mx3g@mail.gmail.com>
[-- Attachment #1.1.1: Type: text/plain, Size: 1551 bytes --]
Hi
Am 25.05.20 um 15:08 schrieb Linus Walleij:
> On Mon, May 25, 2020 at 2:51 PM Thomas Zimmermann <tzimmermann@suse.de> wrote:
>> Am 25.05.20 um 13:36 schrieb Linus Walleij:
>>> On Fri, May 22, 2020 at 3:52 PM Thomas Zimmermann <tzimmermann@suse.de> wrote:
>>>
>>>> The mcde driver uses the default implementation for CMA functions. The
>>>> DRM_GEM_CMA_DRIVER_OPS macro now sets these defaults in struct drm_driver.
>>>> All remaining operations are provided by CMA GEM object functions.
>>>>
>>>> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
>>>
>>> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>>
>> Could you boot-test with the patchset applied?
>
> Yes, if you have a git branch I can just build and boot I can
> do it quickly!
Fantastic! It's the cma-objfuncs branch of
https://gitlab.freedesktop.org/tzimmermann/linux.git
Here's the gitlab page:
https://gitlab.freedesktop.org/tzimmermann/linux/-/tree/cma-objfuncs
Best regards
Thomas
>
> I have no idea what this patch set is based on so it could be
> hard to figure out the dependencies otherwise. Also many
> patches.
>
> Yours,
> Linus Walleij
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
[-- Attachment #1.2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 10/16] gpio: add a reusable generic gpio_chip using regmap
From: Andy Shevchenko @ 2020-05-25 13:25 UTC (permalink / raw)
To: Linus Walleij, Pierre-louis Bossart
Cc: linux-pwm, Thierry Reding, Lee Jones, Jason Cooper, Marc Zyngier,
Bartosz Golaszewski, Uwe Kleine-König, Guenter Roeck,
linux-devicetree, Jean Delvare, LINUXWATCHDOG, linux-gpio,
Mark Brown, Thomas Gleixner, Wim Van Sebroeck, arm-soc,
linux-hwmon, Greg Kroah-Hartman, LKML, Li Yang, Michael Walle,
Rob Herring, Shawn Guo
In-Reply-To: <CACRpkdZYEZk7o+Y2-AqnHGsY8N7KGGmPGSuSS=H7YY8VLZ3jZw@mail.gmail.com>
On Mon, May 25, 2020 at 02:59:36PM +0200, Linus Walleij wrote:
> On Mon, May 25, 2020 at 12:20 PM Michael Walle <michael@walle.cc> wrote:
>
> > If you like I could submit this patch on its own. But then there
> > wouldn't be a user for it.
>
> I'm pretty much fine with that, we do merge code that has no
> users if we anticipate they will be around the corner.
I remember we discussed with Pierre to use it for his ASoC work.
Pierre, does it sound useful for you?
--
With Best Regards,
Andy Shevchenko
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v6 3/3] ARM: dts: Add Caninos Loucos Labrador
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: devicetree, Matheus Castello, linux-actions, linux-kernel,
igor.lima, edgar.righi, linux-arm-kernel
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
Add Device Trees for Caninos Loucos Labrador CoM and base board.
Based on the work of Andreas Färber on Lemaker Guitar device tree.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/owl-s500-labrador-base-m.dts | 34 +++++++++++++++++++
arch/arm/boot/dts/owl-s500-labrador-v2.dtsi | 22 ++++++++++++
3 files changed, 57 insertions(+)
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-base-m.dts
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..0f8c1f255574 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -856,6 +856,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb \
+ owl-s500-labrador-base-m.dtb \
owl-s500-sparky.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
diff --git a/arch/arm/boot/dts/owl-s500-labrador-base-m.dts b/arch/arm/boot/dts/owl-s500-labrador-base-m.dts
new file mode 100644
index 000000000000..044568fec25e
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-labrador-base-m.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Caninos Labrador Base Board
+ *
+ * Copyright (c) 2019-2020 Matheus Castello
+ */
+
+/dts-v1/;
+
+#include "owl-s500-labrador-v2.dtsi"
+
+/ {
+ model = "Caninos Labrador Base-M v1.0a";
+ compatible = "caninos,labrador-base-m", "actions,s500";
+
+ aliases {
+ serial3 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial3:115200n8";
+ };
+
+ uart3_clk: uart3-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <921600>;
+ #clock-cells = <0>;
+ };
+};
+
+&uart3 {
+ status = "okay";
+ clocks = <&uart3_clk>;
+};
diff --git a/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi b/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
new file mode 100644
index 000000000000..883ff2f9886d
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Caninos Labrador SoM V2
+ *
+ * Copyright (c) 2019-2020 Matheus Castello
+ */
+
+#include "owl-s500.dtsi"
+
+/ {
+ model = "Caninos Labrador Core V2.1";
+ compatible = "caninos,labrador-v2", "actions,s500";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x80000000>;
+ };
+};
+
+&timer {
+ clocks = <&hosc>;
+};
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v6 2/3] dt-bindings: arm: actions: Document Caninos Loucos Labrador
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: Rob Herring, devicetree, Matheus Castello, linux-actions,
linux-kernel, igor.lima, edgar.righi, linux-arm-kernel
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
Update the documentation to add the Caninos Loucos Labrador. Labrador
project consists of a computer on module based on the Actions Semi S500
processor and the Labrador base board.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/actions.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
index ace3fdaa8396..0eac72335a05 100644
--- a/Documentation/devicetree/bindings/arm/actions.yaml
+++ b/Documentation/devicetree/bindings/arm/actions.yaml
@@ -19,6 +19,11 @@ properties:
- allo,sparky # Allo.com Sparky
- cubietech,cubieboard6 # Cubietech CubieBoard6
- const: actions,s500
+ - items:
+ - enum:
+ - caninos,labrador-base-m # Labrador Base Board M v1
+ - const: caninos,labrador-v2
+ - const: actions,s500
- items:
- enum:
- lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v6 1/3] dt-bindings: Add vendor prefix for Caninos Loucos
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: Rob Herring, devicetree, Matheus Castello, linux-actions,
linux-kernel, igor.lima, edgar.righi, linux-arm-kernel
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
The Caninos Loucos Program develops Single Board Computers with an open
structure. The Program wants to form a community of developers to use
IoT technologies and disseminate the learning of embedded systems in
Brazil.
It is an initiative of the Technological Integrated Systems Laboratory
(LSI-TEC) with the support of Polytechnic School of the University of
São Paulo (Poli-USP) and Jon "Maddog" Hall.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index d3891386d671..a20a05e3deaa 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -167,6 +167,8 @@ patternProperties:
description: CALAO Systems SAS
"^calxeda,.*":
description: Calxeda
+ "^caninos,.*":
+ description: Caninos Loucos Program
"^capella,.*":
description: Capella Microsystems, Inc
"^cascoda,.*":
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v6 0/3] Add Caninos Loucos Labrador CoM and Base Board Device Tree
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: devicetree, Matheus Castello, linux-actions, linux-kernel,
igor.lima, edgar.righi, linux-arm-kernel
Thanks Andreas, Mani and Rob for your time reviewing it.
Changes since v5:
(Suggested by Andreas Färber)
- Put caninos,labrador-v2 as const one level down
Changes since v4:
(Suggested by Rob Herring)
- Fix issues with yaml indentation
Matheus Castello (3):
dt-bindings: Add vendor prefix for Caninos Loucos
dt-bindings: arm: actions: Document Caninos Loucos Labrador
ARM: dts: Add Caninos Loucos Labrador
.../devicetree/bindings/arm/actions.yaml | 5 +++
.../devicetree/bindings/vendor-prefixes.yaml | 2 ++
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/owl-s500-labrador-base-m.dts | 34 +++++++++++++++++++
arch/arm/boot/dts/owl-s500-labrador-v2.dtsi | 22 ++++++++++++
5 files changed, 64 insertions(+)
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-base-m.dts
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
--
2.26.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v13 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver
From: Luca Ceresoli @ 2020-05-25 13:14 UTC (permalink / raw)
To: Vishal Sagar, Hyun Kwon, laurent.pinchart, mchehab, robh+dt,
mark.rutland, Michal Simek, linux-media, devicetree, hans.verkuil,
linux-arm-kernel, linux-kernel, Dinesh Kumar, Sandip Kothari,
Jacopo Mondi
Cc: Hyun Kwon
In-Reply-To: <20200512151947.120348-3-vishal.sagar@xilinx.com>
Hi Vishal,
thanks. I have only a few minor nitpicking comments.
On 12/05/20 17:19, Vishal Sagar wrote:
> The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images
> from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready
> for image processing. Please refer to PG232 for details.
>
> The CSI2 Rx controller filters out all packets except for the packets
> with data type fixed in hardware. RAW8 packets are always allowed to
> pass through.
>
> It is also used to setup and handle interrupts and enable the core. It
> logs all the events in respective counters between streaming on and off.
>
> The driver supports only the video format bridge enabled configuration.
> Some data types like YUV 422 10bpc, RAW16, RAW20 are supported when the
> CSI v2.0 feature is enabled in design. When the VCX feature is enabled,
> the maximum number of virtual channels becomes 16 from 4.
>
> Signed-off-by: Vishal Sagar <vishal.sagar@xilinx.com>
> Reviewed-by: Hyun Kwon <hyun.kwon@xilinx.com>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[...]
> +static int xcsi2rxss_start_stream(struct xcsi2rxss_state *state)
> +{
> + int ret = 0;
> +
> + /* enable core */
> + xcsi2rxss_set(state, XCSI_CCR_OFFSET, XCSI_CCR_ENABLE);
> +
> + ret = xcsi2rxss_soft_reset(state);
> + if (ret < 0) {
'if (ret)' is enough, it's a classic nonzero-on-error return value.
> +/**
> + * xcsi2rxss_irq_handler - Interrupt handler for CSI-2
> + * @irq: IRQ number
> + * @data: Pointer to device state
> + *
> + * In the interrupt handler, a list of event counters are updated for
> + * corresponding interrupts. This is useful to get status / debug.
> + *
> + * Return: IRQ_HANDLED after handling interrupts
> + */
> +static irqreturn_t xcsi2rxss_irq_handler(int irq, void *data)
> +{
> + struct xcsi2rxss_state *state = (struct xcsi2rxss_state *)data;
> + struct device *dev = state->dev;
> + u32 status;
> +
> + status = xcsi2rxss_read(state, XCSI_ISR_OFFSET) & XCSI_ISR_ALLINTR_MASK;
> + xcsi2rxss_write(state, XCSI_ISR_OFFSET, status);
> +
> + /* Received a short packet */
> + if (status & XCSI_ISR_SPFIFONE) {
> + u32 count = 0;
> +
> + /*
> + * Drain generic short packet FIFO by reading max 31
> + * (fifo depth) short packets from fifo or till fifo is empty.
> + */
> + for (count = 0; count < XCSI_SPKT_FIFO_DEPTH; ++count) {
> + u32 spfifostat, spkt;
> +
> + spkt = xcsi2rxss_read(state, XCSI_SPKTR_OFFSET);
> + dev_dbg(dev, "Short packet = 0x%08x\n", spkt);
> + spfifostat = xcsi2rxss_read(state, XCSI_ISR_OFFSET);
> + spfifostat &= XCSI_ISR_SPFIFONE;
> + if (!spfifostat)
> + break;
> + xcsi2rxss_write(state, XCSI_ISR_OFFSET, spfifostat);
> + }
> + }
> +
> + /* Short packet FIFO overflow */
> + if (status & XCSI_ISR_SPFIFOF)
> + dev_dbg_ratelimited(dev, "Short packet FIFO overflowed\n");
> +
> + /*
> + * Stream line buffer full
> + * This means there is a backpressure from downstream IP
> + */
> + if (status & XCSI_ISR_SLBF) {
> + dev_alert_ratelimited(dev, "Stream Line Buffer Full!\n");
> +
> + /* disable interrupts */
> + xcsi2rxss_clr(state, XCSI_IER_OFFSET, XCSI_IER_INTR_MASK);
> + xcsi2rxss_clr(state, XCSI_GIER_OFFSET, XCSI_GIER_GIE);
> +
> + /* disable core */
> + xcsi2rxss_clr(state, XCSI_CCR_OFFSET, XCSI_CCR_ENABLE);
> + state->streaming = false;
> +
> + /*
> + * The IP needs to be hard reset before it can be used now.
> + * This will be done in streamoff.
> + */
> +
> + /*
> + * TODO: Notify the whole pipeline with v4l2_subdev_notify() to
> + * inform userspace.
> + */
> + }
> +
> + /* Increment event counters */
> + if (status & XCSI_ISR_ALLINTR_MASK) {
> + unsigned int i;
> +
> + for (i = 0; i < XCSI_NUM_EVENTS; i++) {
> + if (!(status & xcsi2rxss_events[i].mask))
> + continue;
> + state->events[i]++;
> + dev_dbg_ratelimited(dev, "%s: %u\n",
> + xcsi2rxss_events[i].name,
> + state->events[i]);
> + }
> +
> + if (status & XCSI_ISR_VCXFE && state->en_vcx) {
> + u32 vcxstatus;
> +
> + vcxstatus = xcsi2rxss_read(state, XCSI_VCXR_OFFSET);
> + vcxstatus &= XCSI_VCXR_VCERR;
> + for (i = 0; i < XCSI_VCX_NUM_EVENTS; i++) {
> + if (!(vcxstatus & (1 << i)))
You can use BIT(i) instead of (1 << i).
> +/**
> + * xcsi2rxss_set_format - This is used to set the pad format
> + * @sd: Pointer to V4L2 Sub device structure
> + * @cfg: Pointer to sub device pad information structure
> + * @fmt: Pointer to pad level media bus format
> + *
> + * This function is used to set the pad format. Since the pad format is fixed
> + * in hardware, it can't be modified on run time. So when a format set is
> + * requested by application, all parameters except the format type is saved
> + * for the pad and the original pad format is sent back to the application.
> + *
> + * Return: 0 on success
> + */
> +static int xcsi2rxss_set_format(struct v4l2_subdev *sd,
> + struct v4l2_subdev_pad_config *cfg,
> + struct v4l2_subdev_format *fmt)
> +{
> + struct xcsi2rxss_state *xcsi2rxss = to_xcsi2rxssstate(sd);
> + struct v4l2_mbus_framefmt *__format;
> + u32 dt;
> +
> + /* only sink pad format can be updated */
This comment should be placed...
> + mutex_lock(&xcsi2rxss->lock);
> +
> + /*
> + * Only the format->code parameter matters for CSI as the
> + * CSI format cannot be changed at runtime.
> + * Ensure that format to set is copied to over to CSI pad format
> + */
> + __format = __xcsi2rxss_get_pad_format(xcsi2rxss, cfg,
> + fmt->pad, fmt->which);
> +
...here.
> + if (fmt->pad == XVIP_PAD_SOURCE) {
> + fmt->format = *__format;
> + mutex_unlock(&xcsi2rxss->lock);
> + return 0;
> + }
> +
> + /*
> + * RAW8 is supported in all datatypes. So if requested media bus format
> + * is of RAW8 type, then allow to be set. In case core is configured to
> + * other RAW, YUV422 8/10 or RGB888, set appropriate media bus format.
> + */
> + dt = xcsi2rxss_get_dt(fmt->format.code);
> + if (dt != xcsi2rxss->datatype && dt != XCSI_DT_RAW8) {
> + dev_dbg(xcsi2rxss->dev, "Unsupported media bus format");
> + /* set the default format for the data type */
> + fmt->format.code = xcsi2rxss_get_nth_mbus(xcsi2rxss->datatype,
> + 0);
> + }
> +
> + *__format = fmt->format;
> + mutex_unlock(&xcsi2rxss->lock);
> +
> + return 0;
> +}
> +
> +/*
> + * xcsi2rxss_enum_mbus_code - Handle pixel format enumeration
> + * @sd : pointer to v4l2 subdev structure
> + * @cfg: V4L2 subdev pad configuration
> + * @code : pointer to v4l2_subdev_mbus_code_enum structure
Remove space before colon here.
Looks good otherwise, and my comments are minor details so:
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
I tried to runtime test this driver as well replacing the v10 driver
that I'm using at the moment, but ran into many problems, apparently in
the media entity navigation. The diff between v10 and v13 does not
justify these problems, so I'm assuming v13 needs a more recent kernel
than the 4.19 I'm currentl stuck on.
--
Luca Ceresoli
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH] iommu: Fix group refcount in iommu_alloc_default_domain()
From: Sai Prakash Ranjan @ 2020-05-25 13:10 UTC (permalink / raw)
To: Joerg Roedel
Cc: linux-arm-msm, Joerg Roedel, linux-kernel, Evan Green,
Douglas Anderson, iommu, Will Deacon, linux-arm-kernel,
Robin Murphy
In-Reply-To: <20200525130253.GH5075@suse.de>
Hi Joerg,
On 2020-05-25 18:32, Joerg Roedel wrote:
> Hi,
>
> On Fri, May 22, 2020 at 06:31:45PM +0530, Sai Prakash Ranjan wrote:
>> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
>> index a4c2f122eb8b..05f7b77c432f 100644
>> --- a/drivers/iommu/iommu.c
>> +++ b/drivers/iommu/iommu.c
>> @@ -1491,6 +1491,7 @@ static int iommu_alloc_default_domain(struct
>> device *dev)
>> {
>> struct iommu_group *group;
>> unsigned int type;
>> + int ret;
>>
>> group = iommu_group_get(dev);
>> if (!group)
>> @@ -1501,7 +1502,11 @@ static int iommu_alloc_default_domain(struct
>> device *dev)
>>
>> type = iommu_get_def_domain_type(dev);
>>
>> - return iommu_group_alloc_default_domain(dev->bus, group, type);
>> + ret = iommu_group_alloc_default_domain(dev->bus, group, type);
>> +
>> + iommu_group_put(group);
>> +
>> + return ret;
>> }
>>
>> /**
>
> Thanks for the report and the fix. I think it is better to fix this by
> not taking a group reference in iommu_alloc_default_domain() at all and
> pass group as a parameter. Please see the patch I just sent out.
>
Thanks for the patch, it looks like the right thing to do. Testing it
out now.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member
of Code Aurora Forum, hosted by The Linux Foundation
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 12/21] drm/mcde: Use GEM CMA object functions
From: Linus Walleij @ 2020-05-25 13:08 UTC (permalink / raw)
To: Thomas Zimmermann
Cc: Alexandre Belloni, linux-aspeed, Neil Armstrong, Dave Airlie,
Liviu Dudau, Stefan Agner, Philippe Cornu, Paul Cercueil,
Laurent Pinchart, Benjamin Gaignard, Mihail Atanassov,
Sam Ravnborg, Alexandre TORGUE, Marek Vasut, Fabio Estevam,
abrodkin, Ludovic Desroches, Xinliang Liu, k00278426,
Tomi Valkeinen, james.qian.wang, Joel Stanley, NXP Linux Team,
Philipp Zabel, Chenfeng (puck), Sascha Hauer, Alison Wang,
Maarten Lankhorst, Maxime Ripard, John Stultz, Jyri Sarha,
Chen-Yu Tsai, Vincent Abriou, Sascha Hauer, Linux ARM,
Maxime Coquelin, Noralf Trønnes, Boris Brezillon,
Andrew Jeffery, open list:DRM PANEL DRIVERS, Yannick Fertre,
Kieran Bingham, Daniel Vetter, Kevin Hilman, Rongrong Zou,
Shawn Guo, Brian Starkey
In-Reply-To: <402b57b6-0827-2659-b676-dc633bf6c444@suse.de>
On Mon, May 25, 2020 at 2:51 PM Thomas Zimmermann <tzimmermann@suse.de> wrote:
> Am 25.05.20 um 13:36 schrieb Linus Walleij:
> > On Fri, May 22, 2020 at 3:52 PM Thomas Zimmermann <tzimmermann@suse.de> wrote:
> >
> >> The mcde driver uses the default implementation for CMA functions. The
> >> DRM_GEM_CMA_DRIVER_OPS macro now sets these defaults in struct drm_driver.
> >> All remaining operations are provided by CMA GEM object functions.
> >>
> >> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
> >
> > Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
>
> Could you boot-test with the patchset applied?
Yes, if you have a git branch I can just build and boot I can
do it quickly!
I have no idea what this patch set is based on so it could be
hard to figure out the dependencies otherwise. Also many
patches.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH v2 0/3] Prefer working VT console over SPCR and device-tree chosen stdout-path
From: Petr Mladek @ 2020-05-25 13:04 UTC (permalink / raw)
To: Alper Nebi Yasak
Cc: Feng Tang, Benjamin Herrenschmidt, Eric Biggers,
Greg Kroah-Hartman, Nicolas Pitre, linux-kernel, Steven Rostedt,
Daniel Vetter, Sergey Senozhatsky, Arvind Sankar, Grzegorz Halat,
linux-serial, Jiri Slaby, Lukas Wunner, Andrew Morton,
Andy Shevchenko, Sam Ravnborg, David S. Miller, linux-arm-kernel
In-Reply-To: <dd19946d-32e9-89e8-3b35-faea9941f107@gmail.com>
On Fri 2020-05-15 22:27:02, Alper Nebi Yasak wrote:
> On 13/05/2020 17:37, Petr Mladek wrote:
> > On Thu 2020-04-30 19:14:34, Alper Nebi Yasak wrote:
> I think things run roughly in the following order (from what I can
> decipher from kernel messages) and I think it matches your explanations:
>
> | ACPI SPCR | dt chosen stdout-path |
> +=================================+=================================+
> | acpi_parse_spcr() | |
> | -> add_preferred_console(uart0) | |
> | (if not on x86) | |
> +---------------------------------+---------------------------------+
> | console_setup() |
> | -> add_preferred_console(tty0) |
> | (if console=tty0) |
> +---------------------------------+---------------------------------+
> | register_console(vt) |
> +---------------------------------+---------------------------------+
> | | of_console_check() |
> | | -> add_preferred_console(uart2) |
> | | (if no console arg) |
> +---------------------------------+---------------------------------+
> | register_console(serial) |
> +---------------------------------+---------------------------------+
I was first a bit confused by the above table. The order looks fine
but I was not sure about the indentation. I think that some more
details are needed to get the picture and context.
I see the following order in start_kernel():
1. Add spcr consoles: by acpi_parse_spcr() called from setup_arch().
2. Add and register early consoles: by parse_early_param()
3. Add normal consoles from command line: by parse_args()
4. Register tty console: by vty_init() called via long chain
from fs_initcall(chr_dev_init). It seems to be init call
in 5th round, see include/linux/init.h
5. Register other (serial) consoles are most likely registered from
device_initcall() in 6th round, see include/linux/init.h.
The consoles defined by the device tree are not added directly.
Instead, the probe() callbacks checks whether such console is
selected in device tree by of_console_check() called from
uart_add_one_port().
> > My suggestion is:
> >
> > + Fix SPCR setting or device tree of your device when the defaults
> > are not as expected.
>
> Maybe I can get QEMU's SPCR use conditional on the existence a
> framebuffer, and get distributions to remove stdout-path from certain
> device-trees; but that would disable the serial console completely
> (instead of having it enabled where tty0 is still preferred).
I am afraid that this is a problem with many defaults. They might be
good enough for many people but others would want something else.
It might be acceptable to add consoles. But it might be a problem to
remove consoles or change the currently preferred one.
The only exception would be when most people are annoyed with the
current default. But this need to be discussed with people familiar
with the given architecture or device.
> > + Use command line to force your value when the defaults are not
> > as expected and you could not change them.
>
> This works; but I'd have to know the machine's serial configuration in
> advance to put it in the cmdline as "console=<serial> console=tty0", or
> lose the serial console as in the above. (A "console=dt" like that
> "console=spcr" patch you linked to would be useful here if it existed.)
The generic parameters: console=tty, console=serial, console=dt, console=spcr
looks fine to me. IMHO, the only problem might be when a particular
serial console drive is not able to guess reasonable defaults for the
baud rate, etc.
Best Regards,
Petr
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH] iommu: Fix group refcount in iommu_alloc_default_domain()
From: Joerg Roedel @ 2020-05-25 13:02 UTC (permalink / raw)
To: Sai Prakash Ranjan
Cc: Will Deacon, Joerg Roedel, linux-kernel, Evan Green,
Douglas Anderson, iommu, linux-arm-msm, Robin Murphy,
linux-arm-kernel
In-Reply-To: <20200522130145.30067-1-saiprakash.ranjan@codeaurora.org>
Hi,
On Fri, May 22, 2020 at 06:31:45PM +0530, Sai Prakash Ranjan wrote:
> diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> index a4c2f122eb8b..05f7b77c432f 100644
> --- a/drivers/iommu/iommu.c
> +++ b/drivers/iommu/iommu.c
> @@ -1491,6 +1491,7 @@ static int iommu_alloc_default_domain(struct device *dev)
> {
> struct iommu_group *group;
> unsigned int type;
> + int ret;
>
> group = iommu_group_get(dev);
> if (!group)
> @@ -1501,7 +1502,11 @@ static int iommu_alloc_default_domain(struct device *dev)
>
> type = iommu_get_def_domain_type(dev);
>
> - return iommu_group_alloc_default_domain(dev->bus, group, type);
> + ret = iommu_group_alloc_default_domain(dev->bus, group, type);
> +
> + iommu_group_put(group);
> +
> + return ret;
> }
>
> /**
Thanks for the report and the fix. I think it is better to fix this by
not taking a group reference in iommu_alloc_default_domain() at all and
pass group as a parameter. Please see the patch I just sent out.
Regards,
Joerg
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 10/16] gpio: add a reusable generic gpio_chip using regmap
From: Linus Walleij @ 2020-05-25 12:59 UTC (permalink / raw)
To: Michael Walle
Cc: linux-pwm, Thierry Reding, Lee Jones, Jason Cooper,
Wim Van Sebroeck, Marc Zyngier, Bartosz Golaszewski,
Uwe Kleine-König, Guenter Roeck, linux-devicetree,
Jean Delvare, LINUXWATCHDOG, linux-gpio, Mark Brown,
Thomas Gleixner, Andy Shevchenko, arm-soc, linux-hwmon,
Greg Kroah-Hartman, LKML, Li Yang, Rob Herring, Shawn Guo
In-Reply-To: <951244aab2ff553a463f7431ba09bf27@walle.cc>
On Mon, May 25, 2020 at 12:20 PM Michael Walle <michael@walle.cc> wrote:
> If you like I could submit this patch on its own. But then there
> wouldn't be a user for it.
I'm pretty much fine with that, we do merge code that has no
users if we anticipate they will be around the corner.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v3 6/6] arm64: tlb: Set the TTL field in flush_tlb_range
From: Zhenyu Ye @ 2020-05-25 12:53 UTC (permalink / raw)
To: catalin.marinas, peterz, mark.rutland, will, aneesh.kumar, akpm,
npiggin, arnd, rostedt, maz, suzuki.poulose, tglx, yuzhao,
Dave.Martin, steven.price, broonie, guohanjun
Cc: linux-arch, yezhenyu2, linux-kernel, xiexiangyou, zhangshaokun,
linux-mm, arm, prime.zeng, kuhn.chenqun, linux-arm-kernel
In-Reply-To: <20200525125300.794-1-yezhenyu2@huawei.com>
This patch uses the cleared_* in struct mmu_gather to set the
TTL field in flush_tlb_range().
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
---
arch/arm64/include/asm/tlb.h | 29 ++++++++++++++++++++++++++++-
arch/arm64/include/asm/tlbflush.h | 14 ++++++++------
2 files changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index b76df828e6b7..61c97d3b58c7 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -21,11 +21,37 @@ static void tlb_flush(struct mmu_gather *tlb);
#include <asm-generic/tlb.h>
+/*
+ * get the tlbi levels in arm64. Default value is 0 if more than one
+ * of cleared_* is set or neither is set.
+ * Arm64 doesn't support p4ds now.
+ */
+static inline int tlb_get_level(struct mmu_gather *tlb)
+{
+ if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
+ tlb->cleared_puds ||
+ tlb->cleared_p4ds))
+ return 3;
+
+ if (tlb->cleared_pmds && !(tlb->cleared_ptes ||
+ tlb->cleared_puds ||
+ tlb->cleared_p4ds))
+ return 2;
+
+ if (tlb->cleared_puds && !(tlb->cleared_ptes ||
+ tlb->cleared_pmds ||
+ tlb->cleared_p4ds))
+ return 1;
+
+ return 0;
+}
+
static inline void tlb_flush(struct mmu_gather *tlb)
{
struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
bool last_level = !tlb->freed_tables;
unsigned long stride = tlb_get_unmap_size(tlb);
+ int tlb_level = tlb_get_level(tlb);
/*
* If we're tearing down the address space then we only care about
@@ -38,7 +64,8 @@ static inline void tlb_flush(struct mmu_gather *tlb)
return;
}
- __flush_tlb_range(&vma, tlb->start, tlb->end, stride, last_level);
+ __flush_tlb_range(&vma, tlb->start, tlb->end, stride,
+ last_level, tlb_level);
}
static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 969dcf88e2a9..ba2f6b544cb7 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -214,7 +214,8 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
static inline void __flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end,
- unsigned long stride, bool last_level)
+ unsigned long stride, bool last_level,
+ int tlb_level)
{
unsigned long asid = ASID(vma->vm_mm);
unsigned long addr;
@@ -236,11 +237,11 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
dsb(ishst);
for (addr = start; addr < end; addr += stride) {
if (last_level) {
- __tlbi_level(vale1is, addr, 0);
- __tlbi_user_level(vale1is, addr, 0);
+ __tlbi_level(vale1is, addr, tlb_level);
+ __tlbi_user_level(vale1is, addr, tlb_level);
} else {
- __tlbi_level(vae1is, addr, 0);
- __tlbi_user_level(vae1is, addr, 0);
+ __tlbi_level(vae1is, addr, tlb_level);
+ __tlbi_user_level(vae1is, addr, tlb_level);
}
}
dsb(ish);
@@ -252,8 +253,9 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
/*
* We cannot use leaf-only invalidation here, since we may be invalidating
* table entries as part of collapsing hugepages or moving page tables.
+ * Set the tlb_level to 0 because we can not get enough information here.
*/
- __flush_tlb_range(vma, start, end, PAGE_SIZE, false);
+ __flush_tlb_range(vma, start, end, PAGE_SIZE, false, 0);
}
static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v3 3/6] arm64: Add tlbi_user_level TLB invalidation helper
From: Zhenyu Ye @ 2020-05-25 12:52 UTC (permalink / raw)
To: catalin.marinas, peterz, mark.rutland, will, aneesh.kumar, akpm,
npiggin, arnd, rostedt, maz, suzuki.poulose, tglx, yuzhao,
Dave.Martin, steven.price, broonie, guohanjun
Cc: linux-arch, yezhenyu2, linux-kernel, xiexiangyou, zhangshaokun,
linux-mm, arm, prime.zeng, kuhn.chenqun, linux-arm-kernel
In-Reply-To: <20200525125300.794-1-yezhenyu2@huawei.com>
Add a level-hinted parameter to __tlbi_user, which only gets used
if ARMv8.4-TTL gets detected.
ARMv8.4-TTL provides the TTL field in tlbi instruction to indicate
the level of translation table walk holding the leaf entry for the
address that is being invalidated.
This patch set the default level value to 0.
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
---
arch/arm64/include/asm/tlbflush.h | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 8adbd6fd8489..969dcf88e2a9 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -88,6 +88,12 @@
__tlbi(op, arg); \
} while (0)
+#define __tlbi_user_level(op, arg, level) do { \
+ if (arm64_kernel_unmapped_at_el0()) \
+ __tlbi_level(op, (arg | USER_ASID_FLAG), level); \
+} while (0)
+
+
/*
* TLB Invalidation
* ================
@@ -230,11 +236,11 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
dsb(ishst);
for (addr = start; addr < end; addr += stride) {
if (last_level) {
- __tlbi(vale1is, addr);
- __tlbi_user(vale1is, addr);
+ __tlbi_level(vale1is, addr, 0);
+ __tlbi_user_level(vale1is, addr, 0);
} else {
- __tlbi(vae1is, addr);
- __tlbi_user(vae1is, addr);
+ __tlbi_level(vae1is, addr, 0);
+ __tlbi_user_level(vae1is, addr, 0);
}
}
dsb(ish);
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v3 5/6] mm: tlb: Provide flush_*_tlb_range wrappers
From: Zhenyu Ye @ 2020-05-25 12:52 UTC (permalink / raw)
To: catalin.marinas, peterz, mark.rutland, will, aneesh.kumar, akpm,
npiggin, arnd, rostedt, maz, suzuki.poulose, tglx, yuzhao,
Dave.Martin, steven.price, broonie, guohanjun
Cc: linux-arch, yezhenyu2, linux-kernel, xiexiangyou, zhangshaokun,
linux-mm, arm, prime.zeng, kuhn.chenqun, linux-arm-kernel
In-Reply-To: <20200525125300.794-1-yezhenyu2@huawei.com>
This patch provides flush_{pte|pmd|pud|p4d}_tlb_range() in generic
code, which are expressed through the mmu_gather APIs. These
interface set tlb->cleared_* and finally call tlb_flush(), so we
can do the tlb invalidation according to the information in
struct mmu_gather.
Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
---
include/asm-generic/pgtable.h | 12 ++++++++++--
mm/pgtable-generic.c | 22 ++++++++++++++++++++++
2 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 329b8c8ca703..8c92122ded9b 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -1161,11 +1161,19 @@ static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
* invalidate the entire TLB which is not desitable.
* e.g. see arch/arc: flush_pmd_tlb_range
*/
-#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
-#define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
+extern void flush_pte_tlb_range(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long end);
+extern void flush_pmd_tlb_range(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long end);
+extern void flush_pud_tlb_range(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long end);
+extern void flush_p4d_tlb_range(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long end);
#else
+#define flush_pte_tlb_range(vma, addr, end) BUILD_BUG()
#define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
#define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
+#define flush_p4d_tlb_range(vma, addr, end) BUILD_BUG()
#endif
#endif
diff --git a/mm/pgtable-generic.c b/mm/pgtable-generic.c
index 3d7c01e76efc..3eff199d3507 100644
--- a/mm/pgtable-generic.c
+++ b/mm/pgtable-generic.c
@@ -101,6 +101,28 @@ pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address,
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
+
+#define FLUSH_Pxx_TLB_RANGE(_pxx) \
+void flush_##_pxx##_tlb_range(struct vm_area_struct *vma, \
+ unsigned long addr, unsigned long end) \
+{ \
+ struct mmu_gather tlb; \
+ \
+ tlb_gather_mmu(&tlb, vma->vm_mm, addr, end); \
+ tlb_start_vma(&tlb, vma); \
+ tlb_flush_##_pxx##_range(&tlb, addr, end - addr); \
+ tlb_end_vma(&tlb, vma); \
+ tlb_finish_mmu(&tlb, addr, end); \
+}
+
+FLUSH_Pxx_TLB_RANGE(pte)
+FLUSH_Pxx_TLB_RANGE(pmd)
+FLUSH_Pxx_TLB_RANGE(pud)
+FLUSH_Pxx_TLB_RANGE(p4d)
+
+#endif /* __HAVE_ARCH_FLUSH_PMD_TLB_RANGE */
+
#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
int pmdp_set_access_flags(struct vm_area_struct *vma,
unsigned long address, pmd_t *pmdp,
--
2.19.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox