* [PATCH V2 3/3] clk: imx8mp: add mu root clk
From: peng.fan @ 2020-06-01 3:43 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590982999-7149-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu root clk for mu mailbox usage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root", ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
--
2.16.4
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* [PATCH V2 2/3] arm64: dts: imx8m: add mu node
From: peng.fan @ 2020-06-01 3:43 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590982999-7149-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
4 files changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..fc001fb971e9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..c8290d21ccc9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..b530804f763e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad0000 {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..66ba8da704f6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,15 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
+ clock-names = "mu";
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
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* [PATCH V2 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: peng.fan @ 2020-06-01 3:43 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590982999-7149-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
index 26b7a88c2fea..906377acf2cd 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
@@ -18,7 +18,8 @@ Messaging Unit Device Node:
Required properties:
-------------------
- compatible : should be "fsl,<chip>-mu", the supported chips include
- imx6sx, imx7s, imx8qxp, imx8qm.
+ imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn,
+ imx8mp.
The "fsl,imx6sx-mu" compatible is seen as generic and should
be included together with SoC specific compatible.
There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
--
2.16.4
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* [PATCH V2 0/3] imx8m: add mu support
From: peng.fan @ 2020-06-01 3:43 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
From: Peng Fan <peng.fan@nxp.com>
V2:
Add dt-bindings
Merge dts changes into one patch, since all is to add mu node
Add mu dt bindings
Add mu node
Add i.MX8MP mu root clk
Peng Fan (3):
dt-bindings: mailbox: imx-mu: support i.MX8M
arm64: dts: imx8m: add mu node
clk: imx8mp: add mu root clk
Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++-
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
drivers/clk/imx/clk-imx8mp.c | 1 +
6 files changed, 39 insertions(+), 1 deletion(-)
--
2.16.4
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* [PATCH] misc: atmel-ssc: lock with mutex instead of spinlock
From: Michał Mirosław @ 2020-06-01 3:45 UTC (permalink / raw)
To: Nicolas Ferre, Arnd Bergmann, Greg Kroah-Hartman,
Alexandre Belloni, Ludovic Desroches
Cc: linux-kernel, linux-arm-kernel
Uninterruptible context is not needed in the driver and causes lockdep
warning because of mutex taken in of_alias_get_id(). Convert the lock to
mutex to avoid the issue.
Cc: stable@vger.kernel.org
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
---
drivers/misc/atmel-ssc.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
index 1322e29bc37a..5cc032097476 100644
--- a/drivers/misc/atmel-ssc.c
+++ b/drivers/misc/atmel-ssc.c
@@ -10,7 +10,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/io.h>
-#include <linux/spinlock.h>
+#include <linux/mutex.h>
#include <linux/atmel-ssc.h>
#include <linux/slab.h>
#include <linux/module.h>
@@ -20,7 +20,7 @@
#include "../../sound/soc/atmel/atmel_ssc_dai.h"
/* Serialize access to ssc_list and user count */
-static DEFINE_SPINLOCK(user_lock);
+static DEFINE_MUTEX(user_lock);
static LIST_HEAD(ssc_list);
struct ssc_device *ssc_request(unsigned int ssc_num)
@@ -28,7 +28,7 @@ struct ssc_device *ssc_request(unsigned int ssc_num)
int ssc_valid = 0;
struct ssc_device *ssc;
- spin_lock(&user_lock);
+ mutex_lock(&user_lock);
list_for_each_entry(ssc, &ssc_list, list) {
if (ssc->pdev->dev.of_node) {
if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc")
@@ -44,18 +44,18 @@ struct ssc_device *ssc_request(unsigned int ssc_num)
}
if (!ssc_valid) {
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
pr_err("ssc: ssc%d platform device is missing\n", ssc_num);
return ERR_PTR(-ENODEV);
}
if (ssc->user) {
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
dev_dbg(&ssc->pdev->dev, "module busy\n");
return ERR_PTR(-EBUSY);
}
ssc->user++;
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
clk_prepare(ssc->clk);
@@ -67,14 +67,14 @@ void ssc_free(struct ssc_device *ssc)
{
bool disable_clk = true;
- spin_lock(&user_lock);
+ mutex_lock(&user_lock);
if (ssc->user)
ssc->user--;
else {
disable_clk = false;
dev_dbg(&ssc->pdev->dev, "device already free\n");
}
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
if (disable_clk)
clk_unprepare(ssc->clk);
@@ -246,9 +246,9 @@ static int ssc_probe(struct platform_device *pdev)
return -ENXIO;
}
- spin_lock(&user_lock);
+ mutex_lock(&user_lock);
list_add_tail(&ssc->list, &ssc_list);
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
platform_set_drvdata(pdev, ssc);
@@ -267,9 +267,9 @@ static int ssc_remove(struct platform_device *pdev)
ssc_sound_dai_remove(ssc);
- spin_lock(&user_lock);
+ mutex_lock(&user_lock);
list_del(&ssc->list);
- spin_unlock(&user_lock);
+ mutex_unlock(&user_lock);
return 0;
}
--
2.20.1
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* Re: [PATCH RFC] KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset when S2FWB is supported
From: Zenghui Yu @ 2020-06-01 3:24 UTC (permalink / raw)
To: Alexandru Elisei, kvmarm, linux-arm-kernel, linux-kernel; +Cc: Marc Zyngier
In-Reply-To: <a1a1961a-2eae-b26c-e607-ab5c0c929f37@arm.com>
Hi Alex,
On 2020/5/30 18:46, Alexandru Elisei wrote:
> Hi,
>
> On 4/20/20 5:10 PM, Alexandru Elisei wrote:
[ For some unknown reasons, I had missed your reply one month ago.
Sorry, I'm going to fix my email settings ... ]
>> Hi,
>>
>> On 4/15/20 8:28 AM, Zenghui Yu wrote:
>>> stage2_unmap_vm() was introduced to unmap user RAM region in the stage2
>>> page table to make the caches coherent. E.g., a guest reboot with stage1
>>> MMU disabled will access memory using non-cacheable attributes. If the
>>> RAM and caches are not coherent at this stage, some evicted dirty cache
>>> line may go and corrupt guest data in RAM.
>>>
>>> Since ARMv8.4, S2FWB feature is mandatory and KVM will take advantage
>>> of it to configure the stage2 page table and the attributes of memory
>>> access. So we ensure that guests always access memory using cacheable
>>> attributes and thus, the caches always be coherent.
>>>
>>> So on CPUs that support S2FWB, we can safely reset the vcpu without a
>>> heavy stage2 unmapping.
>>>
>>> Cc: Marc Zyngier <maz@kernel.org>
>>> Cc: Christoffer Dall <christoffer.dall@arm.com>
>>> Cc: James Morse <james.morse@arm.com>
>>> Cc: Julien Thierry <julien.thierry.kdev@gmail.com>
>>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
>>> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
>>> ---
>>>
>>> If this is correct, there should be a great performance improvement on
>>> a guest reboot (or reset) on systems support S2FWB. But I'm afraid that
>>> I've missed some points here, so please comment!
>>>
>>> The commit 957db105c997 ("arm/arm64: KVM: Introduce stage2_unmap_vm")
>>> was merged about six years ago and I failed to track its histroy and
>>> intention. Instead of a whole stage2 unmapping, something like
>>> stage2_flush_vm() looks enough to me. But again, I'm unsure...
>>>
>>> Thanks for having a look!
>> I had a chat with Christoffer about stage2_unmap_vm, and as I understood it, the
>> purpose was to make sure that any changes made by userspace were seen by the guest
>> while the MMU is off. When a stage 2 fault happens, we do clean+inval on the
>> dcache, or inval on the icache if it was an exec fault. This means that whatever
>> the host userspace writes while the guest is shut down and is still in the cache,
>> the guest will be able to read/execute.
>>
>> This can be relevant if the guest relocates the kernel and overwrites the original
>> image location, and userspace copies the original kernel image back in before
>> restarting the vm.
Yes, I-cache coherency is what I had missed! So without a S2 unmapping
on reboot, if there's any stale and "valid" cache line in the I-cache,
guest may fetch the wrong instructions directly from it, and bad things
will happen... (We will otherwise get a translation fault and a
permission fault and invalidate the I-cache as needed.)
>>
>>> virt/kvm/arm/arm.c | 5 ++++-
>>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
>>> index 48d0ec44ad77..e6378162cdef 100644
>>> --- a/virt/kvm/arm/arm.c
>>> +++ b/virt/kvm/arm/arm.c
>>> @@ -983,8 +983,11 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,
>>> /*
>>> * Ensure a rebooted VM will fault in RAM pages and detect if the
>>> * guest MMU is turned off and flush the caches as needed.
>>> + *
>>> + * S2FWB enforces all memory accesses to RAM being cacheable, we
>>> + * ensure that the cache is always coherent.
>>> */
>>> - if (vcpu->arch.has_run_once)
>>> + if (vcpu->arch.has_run_once && !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
>> I think userspace does not invalidate the icache when loading a new kernel image,
>> and if the guest patched instructions, they could potentially still be in the
>> icache. Should the icache be invalidated if FWB is present?
>
> I noticed that this was included in the current pull request and I remembered that
> I wasn't sure about this part. Did some more digging and it turns out that FWB
> implies no cache maintenance needed for *data to instruction* coherence. From ARM
> DDI 0487F.b, page D5-2635:
>
> "When ARMv8.4-S2FWB is implemented, the architecture requires that
> CLIDR_EL1.{LOUU, LOIUS} are zero so that no levels of data cache need to be
> cleaned in order to manage coherency with instruction fetches".
>
> However, there's no mention that I found for instruction to data coherence,
> meaning that the icache would still need to be invalidated on each vcpu in order
> to prevent fetching of patched instructions from the icache. Am I missing something?
Thanks for the head up and Marc's fix!
Thanks both,
Zenghui
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* Re: [PATCH v6] support gce on mt6779 platform
From: Dennis-YC Hsieh @ 2020-06-01 2:41 UTC (permalink / raw)
To: Jassi Brar
Cc: Mark Rutland, Devicetree List, Philipp Zabel, wsd_upstream,
David Airlie, Linux Kernel Mailing List, dri-devel, HS Liao,
CK Hu, Rob Herring, linux-mediatek, Houlong Wei, Daniel Vetter,
Matthias Brugger, Bibby Hsieh, linux-arm-kernel
In-Reply-To: <CABb+yY16FzgafSYRo8DuVMttqUR5JVzXDsaP2rX+UnrNOD6k2A@mail.gmail.com>
Hi Jassi,
Thanks for your comment
On Sat, 2020-05-30 at 15:34 -0500, Jassi Brar wrote:
> On Thu, May 28, 2020 at 12:05 PM Dennis YC Hsieh
> <dennis-yc.hsieh@mediatek.com> wrote:
> >
> > This patch support gce on mt6779 platform.
> >
> > Change since v5:
> > - spearate address shift code in client helper and mailbox controller
> > - separate write_s/write_s_mask and write_s_value/write_s_mask_value so that
> > client can decide use mask or not
> > - fix typo in header
> >
> > Change since v4:
> > - do not clear disp event again in drm driver
> > - symbolize value 1 to jump relative
> >
> > [... snip ...]
> >
> >
> >
> > Dennis YC Hsieh (16):
> > dt-binding: gce: add gce header file for mt6779
> > mailbox: cmdq: variablize address shift in platform
> > mailbox: cmdq: support mt6779 gce platform definition
> > mailbox: mediatek: cmdq: clear task in channel before shutdown
> > soc: mediatek: cmdq: return send msg error code
> > soc: mediatek: cmdq: add address shift in jump
> > soc: mediatek: cmdq: add assign function
> > soc: mediatek: cmdq: add write_s function
> > soc: mediatek: cmdq: add write_s_mask function
> > soc: mediatek: cmdq: add read_s function
> > soc: mediatek: cmdq: add write_s value function
> > soc: mediatek: cmdq: add write_s_mask value function
> > soc: mediatek: cmdq: export finalize function
> > soc: mediatek: cmdq: add jump function
> > soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
> > soc: mediatek: cmdq: add set event function
> >
> > .../devicetree/bindings/mailbox/mtk-gce.txt | 8 +-
> > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +-
> > drivers/mailbox/mtk-cmdq-mailbox.c | 101 ++++++--
> > drivers/soc/mediatek/mtk-cmdq-helper.c | 163 ++++++++++++-
> > include/dt-bindings/gce/mt6779-gce.h | 222 ++++++++++++++++++
> > include/linux/mailbox/mtk-cmdq-mailbox.h | 10 +-
> > include/linux/soc/mediatek/mtk-cmdq.h | 125 +++++++++-
> >
> Please break the patchset into two. The lower mailbox related changes
> with soc changes on top.
Ok, I'll separate patches into two patchset, thanks.
Regards,
Dennis
>
> thanks
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* Re: [PATCH] irqchip/gic-v3-its: Don't try to move a disabled irq
From: Herrenschmidt, Benjamin @ 2020-06-01 2:40 UTC (permalink / raw)
To: maz@kernel.org, Saidi, Ali
Cc: jason@lakedaemon.net, Machulsky, Zorik,
linux-kernel@vger.kernel.org, Zilberman, Zeev,
linux-arm-kernel@lists.infradead.org, tglx@linutronix.de,
Woodhouse, David
In-Reply-To: <eed907d48de84c96e3ceb27c1ed6f622@kernel.org>
On Sun, 2020-05-31 at 12:09 +0100, Marc Zyngier wrote:
>
>
> > Not great indeed. But this is not, as far as I can tell, a GIC
> > driver problem.
> >
> > The semantic of activate/deactivate (which maps to started/shutdown
> > in the IRQ code) is that the HW resources for a given interrupt are
> > only committed when the interrupt is activated. Trying to perform
> > actions involving the HW on an interrupt that isn't active cannot be
> > guaranteed to take effect.
> >
> > I'd rather address it in the core code, by preventing set_affinity (and
> > potentially others) to take place when the interrupt is not in the
> > STARTED state. Userspace would get an error, which is perfectly
> > legitimate, and which it already has to deal with it for plenty of
> > other
> > reasons.
So I finally found time to dig a bit in there :) Code has changed a bit
since last I looked. But I have memories of the startup code messing
around with the affinity, and here it is. In irq_startup() :
switch (__irq_startup_managed(desc, aff, force)) {
case IRQ_STARTUP_NORMAL:
ret = __irq_startup(desc);
irq_setup_affinity(desc);
break;
case IRQ_STARTUP_MANAGED:
irq_do_set_affinity(d, aff, false);
ret = __irq_startup(desc);
break;
case IRQ_STARTUP_ABORT:
irqd_set_managed_shutdown(d);
return 0;
So we have two cases here. Normal and managed.
In the managed case, we set the affinity before startup. I feel like your
patch might break that or am I missing something ?
Additionally, your patch would break any userspace program that expects to
be able to change the affinity on an interrupt before it's been started.
I don't know if such a thing exsits but the fact that we hit that bug
makes me think it might.
Now most controller drivers (at least that I'm familiar with, which doesn't
include GiC at this point) can deal with that just fine.
Now there's also another possible issue:
Your patch checks irqd_is_started(). Now I always mixup irqd vs irq_state these
days so I may be wrong but irq_state_set_started() is only done in __irq_startup
which will *not* be called if the interrupt has NOAUTOEN.
Is that ok ? Do we intend for affinity setting not to work until the first
enable_irq() for such an interrupt ? We could check activated instead of
started I suppose. (again provided I didn't mixup two different things
between the irqd and the irq_state stuff).
For these reasons my gut feeling is we should just fix GIC as Ali wanted to
do initially.
The basic idea is simply to defer the HW configuration until the interrupt
has been started. I don't see why that would be an issue. Have set_affinity just
store the mask (and apply whatever other sanity checking it might want to do)
until the itnerrupt is started and when started, apply things to HW.
I might be missing a reason why it's more complicated than that :) But I do
feel a bit uncomfortable with your approach.
Cheers,
Ben.
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^ permalink raw reply
* Re: [V9, 1/2] media: dt-bindings: media: i2c: Document OV02A10 bindings
From: Dongchun Zhu @ 2020-06-01 2:33 UTC (permalink / raw)
To: Tomasz Figa
Cc: Mark Rutland, Rob Herring, Andy Shevchenko, srv_heupstream,
linux-devicetree, Linus Walleij,
Shengnan Wang (王圣男), Louis Kuo,
Bartosz Golaszewski, Sj Huang, Nicolas Boichat,
moderated list:ARM/Mediatek SoC support, dongchun.zhu,
Sakari Ailus, Matthias Brugger, Cao Bing Bu,
Mauro Carvalho Chehab,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Linux Media Mailing List
In-Reply-To: <CAAFQd5AuHDpQN8xZsWgnAt6m2reAYJbs9nBp0+mBo7_FS81LbQ@mail.gmail.com>
Hi Tomasz,
On Fri, 2020-05-29 at 15:43 +0200, Tomasz Figa wrote:
> On Thu, May 28, 2020 at 10:06 AM Dongchun Zhu <dongchun.zhu@mediatek.com> wrote:
> >
> > Hi Sakari,
> >
> > On Thu, 2020-05-28 at 10:23 +0300, Sakari Ailus wrote:
> > > Hi Dongchun,
> > >
> > > On Thu, May 28, 2020 at 11:34:42AM +0800, Dongchun Zhu wrote:
> > > > Hi Sakari, Rob,
> > > >
> > > > On Thu, 2020-05-28 at 00:16 +0300, Sakari Ailus wrote:
> > > > > Hi Rob, Dongchun,
> > > > >
> > > > > On Wed, May 27, 2020 at 09:27:22AM -0600, Rob Herring wrote:
> > > > > > > > > + properties:
> > > > > > > > > + endpoint:
> > > > > > > > > + type: object
> > > > > > > > > + additionalProperties: false
> > > > > > > > > +
> > > > > > > > > + properties:
> > > > > > >
> > > > > > > Actually I wonder whether we need to declare 'clock-lanes' here?
> > > > > >
> > > > > > Yes, if you are using it.
> > > > >
> > > > > Dongchun, can you confirm the chip has a single data and a single clock
> > > > > lane and that it does not support lane reordering?
> > > > >
> > > >
> > > > From the datasheet, 'MIPI inside the OV02A10 provides one single
> > > > uni-directional clock lane and one bi-directional data lane solution for
> > > > communication links between components inside a mobile device.
> > > > The data lane has full support for HS(uni-directional) and
> > > > LP(bi-directional) data transfer mode.'
> > > >
> > > > The sensor doesn't support lane reordering, so 'clock-lanes' property
> > > > would not be added in next release.
> > > >
> > > > > So if there's nothing to convey to the driver, also the data-lanes should
> > > > > be removed IMO.
> > > > >
> > > >
> > > > However, 'data-lanes' property may still be required.
> > > > It is known that either data-lanes or clock-lanes is an array of
> > > > physical data lane indexes. Position of an entry determines the logical
> > > > lane number, while the value of an entry indicates physical lane, e.g.,
> > > > for 1-lane MIPI CSI-2 bus we could have "data-lanes = <1>;", assuming
> > > > the clock lane is on hardware lane 0.
> > > >
> > > > As mentioned earlier, the OV02A10 sensor supports only 1C1D and does not
> > > > support lane reordering, so here we shall use 'data-lanes = <1>' as
> > > > there is only a clock lane for OV02A10.
> > > >
> > > > Reminder:
> > > > If 'data-lanes' property is not present, the driver would assume
> > > > four-lane operation. This means for one-lane or two-lane operation, this
> > > > property must be present and set to the right physical lane indexes.
> > > > If the hardware does not support lane reordering, monotonically
> > > > incremented values shall be used from 0 or 1 onwards, depending on
> > > > whether or not there is also a clock lane.
> > >
> > > How can the driver use four lanes, considering the device only supports a
> > > single lane??
> > >
> >
> > I understood your meaning.
> > If we omit the property 'data-lanes', the sensor should work still.
> > But then what's the meaning of the existence of 'data-lanes'?
> > If this property 'data-lanes' is always optional, then why dt-bindings
> > provide the interface?
> >
> > In the meantime, if omitting 'data-lanes' for one sensor(transmitter)
> > that has only one physical data lane, MIPI receiver(e.g., MIPI CSI-2)
> > shall enable four-lane configuration, which may increase consumption of
> > both power and resource in the process of IIC communication.
>
> Wouldn't the receiver still have the data-lanes property under its
> endpoint node, telling it how many lanes and in which order should be
> used?
>
The MIPI receiver(RX) shall use
v4l2_async_notifier_add_fwnode_remote_subdev() API to parse the property
"data-lanes" under sensor output port.
> Best regards,
> Tomasz
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^ permalink raw reply
* [PATCH v13 1/3] dt-bindings: Add keypad devicetree documentation
From: Fengping Yu @ 2020-06-01 2:25 UTC (permalink / raw)
To: Yingjoe Chen, Dmitry Torokhov, Andy Shevchenko, Marco Felsch
Cc: fengping.yu, linux-mediatek, linux-arm-kernel, linux-input
In-Reply-To: <20200601022548.18213-1-fengping.yu@mediatek.com>
From: "fengping.yu" <fengping.yu@mediatek.com>
Add Mediatek matrix keypad dt-bindings doc as yaml schema.
Signed-off-by: fengping.yu <fengping.yu@mediatek.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
.../devicetree/bindings/input/mtk-kpd.yaml | 95 +++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/mtk-kpd.yaml
diff --git a/Documentation/devicetree/bindings/input/mtk-kpd.yaml b/Documentation/devicetree/bindings/input/mtk-kpd.yaml
new file mode 100644
index 000000000000..586cd196dd00
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/mtk-kpd.yaml
@@ -0,0 +1,95 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+version: 1
+
+$id: http://devicetree.org/schemas/input/mtk-keypad.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek's Keypad Controller device tree bindings
+
+maintainer:
+ - Fengping Yu <fengping.yu@mediatek.com>
+
+description: |
+ Mediatek's Keypad controller is used to interface a SoC with a matrix-type
+ keypad device. The keypad controller supports multiple row and column lines.
+ A key can be placed at each intersection of a unique row and a unique column.
+ The keypad controller can sense a key-press and key-release and report the
+ event using a interrupt to the cpu.
+
+properties:
+ compatible:
+ oneOf:
+ - const: "mediatek,mt6779-keypad"
+ - const: "mediatek,mt6873-keypad"
+
+ clock-names:
+ description: Names of the clocks listed in clocks property in the same order
+ maxItems: 1
+
+ clocks:
+ description: Must contain one entry, for the module clock
+ refs: devicetree/bindings/clocks/clock-bindings.txt for details.
+
+ interrupts:
+ description: A single interrupt specifier
+ maxItems: 1
+
+ linux,keymap:
+ description: The keymap for keys as described in the binding document
+ refs: devicetree/bindings/input/matrix-keymap.txt
+ minItems: 1
+ maxItems: 16
+
+ pinctrl-0:
+ description: Specify pin control groups used for this controller
+ refs: devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+ pinctrl-names:
+ description: Names for optional pin modes
+ maxItems: 1
+
+ reg:
+ description: The base address of the Keypad register bank
+ maxItems: 1
+
+ wakeup-source:
+ description: use any event on keypad as wakeup event
+ type: boolean
+
+ keypad,num-columns:
+ description: Number of column lines connected to the keypad controller,
+ it is not equal to PCB columns number, instead you should add required value
+ for each IC
+
+ keypad,num-rows:
+ description: Number of row lines connected to the keypad controller, it is
+ not equal to PCB rows number, instead you should add required value for each IC
+
+ mediatek,debounce-us:
+ description: Debounce interval in microseconds
+ maximum: 256000
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - linux,keymap
+ - pinctrl
+ - clocks
+ - clock-names
+
+examples:
+ - |
+
+ keypad: kp@10010000 {
+ compatible = "mediatek,mt6779-keypad";
+ reg = <0 0x10010000 0 0x1000>;
+ linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN) >;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_FALLING>;
+ clocks = <&clk26m>;
+ clock-names = "kpd";
+ pinctrl-names = "default";
+ pinctrl-0 = <&kpd_gpios_def_cfg>;
+ };
--
2.18.0
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^ permalink raw reply related
* [PATCH v13 3/3] configs: defconfig: Add CONFIG_KEYBOARD_MTK_KPD=m
From: Fengping Yu @ 2020-06-01 2:25 UTC (permalink / raw)
To: Yingjoe Chen, Dmitry Torokhov, Andy Shevchenko, Marco Felsch
Cc: fengping.yu, linux-mediatek, linux-arm-kernel, linux-input
In-Reply-To: <20200601022548.18213-1-fengping.yu@mediatek.com>
From: "fengping.yu" <fengping.yu@mediatek.com>
Add Mediatek matrix keypad support in defconfig.
Signed-off-by: fengping.yu <fengping.yu@mediatek.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 24e534d85045..112ced090b21 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -349,6 +349,7 @@ CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_SNVS_PWRKEY=m
CONFIG_KEYBOARD_IMX_SC_KEY=m
CONFIG_KEYBOARD_CROS_EC=y
+CONFIG_KEYBOARD_MTK_KPD=m
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
CONFIG_INPUT_MISC=y
--
2.18.0
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^ permalink raw reply related
* [PATCH v13 2/3] drivers: input: keyboard: Add mtk keypad driver
From: Fengping Yu @ 2020-06-01 2:25 UTC (permalink / raw)
To: Yingjoe Chen, Dmitry Torokhov, Andy Shevchenko, Marco Felsch
Cc: fengping.yu, linux-mediatek, linux-arm-kernel, linux-input
In-Reply-To: <20200601022548.18213-1-fengping.yu@mediatek.com>
From: "fengping.yu" <fengping.yu@mediatek.com>
This adds matrix keypad support for Mediatek SoCs.
Signed-off-by: fengping.yu <fengping.yu@mediatek.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/input/keyboard/Kconfig | 11 ++
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/mtk-kpd.c | 209 +++++++++++++++++++++++++++++++
3 files changed, 221 insertions(+)
create mode 100644 drivers/input/keyboard/mtk-kpd.c
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 28de965a08d5..0803668bfa36 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -782,6 +782,17 @@ config KEYBOARD_BCM
To compile this driver as a module, choose M here: the
module will be called bcm-keypad.
+config KEYBOARD_MTK_KPD
+ tristate "MediaTek Keypad Support"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ select REGMAP_MMIO
+ select INPUT_MATRIXKMAP
+ help
+ Say Y here if you want to use the keypad on MediaTek SoCs.
+ If unsure, say N.
+ To compile this driver as a module, choose M here: the
+ module will be called mtk-kpd.
+
config KEYBOARD_MTK_PMIC
tristate "MediaTek PMIC keys support"
depends on MFD_MT6397
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 1d689fdd5c00..6c9d852c377e 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_KEYBOARD_MATRIX) += matrix_keypad.o
obj-$(CONFIG_KEYBOARD_MAX7359) += max7359_keypad.o
obj-$(CONFIG_KEYBOARD_MCS) += mcs_touchkey.o
obj-$(CONFIG_KEYBOARD_MPR121) += mpr121_touchkey.o
+obj-$(CONFIG_KEYBOARD_MTK_KPD) += mtk-kpd.o
obj-$(CONFIG_KEYBOARD_MTK_PMIC) += mtk-pmic-keys.o
obj-$(CONFIG_KEYBOARD_NEWTON) += newtonkbd.o
obj-$(CONFIG_KEYBOARD_NOMADIK) += nomadik-ske-keypad.o
diff --git a/drivers/input/keyboard/mtk-kpd.c b/drivers/input/keyboard/mtk-kpd.c
new file mode 100644
index 000000000000..861abe52f1a3
--- /dev/null
+++ b/drivers/input/keyboard/mtk-kpd.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ * Author Terry Chang <terry.chang@mediatek.com>
+ */
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/input/matrix_keypad.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/property.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define MTK_KPD_NAME "mtk-kpd"
+#define MTK_KPD_MEM 0x0004
+#define MTK_KPD_DEBOUNCE 0x0018
+#define MTK_KPD_DEBOUNCE_MASK GENMASK(13, 0)
+#define MTK_KPD_DEBOUNCE_MAX_US 256000
+#define MTK_KPD_NUM_MEMS 5
+#define MTK_KPD_NUM_BITS 136 /* 4*32+8 MEM5 only use 8 BITS */
+
+struct mtk_keypad {
+ struct regmap *regmap;
+ struct input_dev *input_dev;
+ struct clk *clk;
+ void __iomem *base;
+ u32 n_rows;
+ u32 n_cols;
+ DECLARE_BITMAP(keymap_state, MTK_KPD_NUM_BITS);
+};
+
+static const struct regmap_config keypad_regmap_cfg = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = sizeof(u32),
+ .max_register = 36,
+};
+
+static irqreturn_t kpd_irq_handler(int irq, void *dev_id)
+{
+ struct mtk_keypad *keypad = dev_id;
+ unsigned short *keycode = keypad->input_dev->keycode;
+ DECLARE_BITMAP(new_state, MTK_KPD_NUM_BITS);
+ DECLARE_BITMAP(change, MTK_KPD_NUM_BITS);
+ int bit_nr;
+ int pressed;
+ unsigned short code;
+
+ regmap_raw_read(keypad->regmap, MTK_KPD_MEM,
+ new_state, MTK_KPD_NUM_MEMS);
+
+ bitmap_xor(change, new_state, keypad->keymap_state, MTK_KPD_NUM_BITS);
+
+ for_each_set_bit(bit_nr, change, MTK_KPD_NUM_BITS) {
+ /* 1: not pressed, 0: pressed */
+ pressed = !test_bit(bit_nr, new_state);
+ dev_dbg(&keypad->input_dev->dev, "%s",
+ pressed ? "pressed" : "released");
+
+ /* 32bit register only use low 16bit as keypad mem register */
+ code = keycode[bit_nr - 16 * (BITS_TO_U32(bit_nr) - 1)];
+
+ input_report_key(keypad->input_dev, code, pressed);
+ input_sync(keypad->input_dev);
+
+ dev_dbg(&keypad->input_dev->dev,
+ "report Linux keycode = %d\n", code);
+ }
+
+ bitmap_copy(keypad->keymap_state, new_state, MTK_KPD_NUM_BITS);
+
+ return IRQ_HANDLED;
+}
+
+static void kpd_clk_disable(void *data)
+{
+ clk_disable_unprepare(data);
+}
+
+static int kpd_pdrv_probe(struct platform_device *pdev)
+{
+ struct mtk_keypad *keypad;
+ unsigned int irq;
+ u32 debounce;
+ bool wakeup;
+ int ret;
+
+ keypad = devm_kzalloc(&pdev->dev, sizeof(*keypad), GFP_KERNEL);
+ if (!keypad)
+ return -ENOMEM;
+
+ keypad->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(keypad->base))
+ return PTR_ERR(keypad->base);
+
+ keypad->regmap = devm_regmap_init_mmio(&pdev->dev,
+ keypad->base,
+ &keypad_regmap_cfg);
+ if (IS_ERR(keypad->regmap)) {
+ dev_err(&pdev->dev,
+ "regmap init failed:%ld\n", PTR_ERR(keypad->regmap));
+ return PTR_ERR(keypad->regmap);
+ }
+
+ bitmap_fill(keypad->keymap_state, MTK_KPD_NUM_BITS);
+
+ keypad->input_dev = devm_input_allocate_device(&pdev->dev);
+ if (!keypad->input_dev) {
+ dev_err(&pdev->dev, "Failed to allocate input dev\n");
+ return -ENOMEM;
+ }
+
+ keypad->input_dev->name = MTK_KPD_NAME;
+ keypad->input_dev->id.bustype = BUS_HOST;
+
+ ret = matrix_keypad_parse_properties(&pdev->dev, &keypad->n_rows,
+ &keypad->n_cols);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to parse keypad params\n");
+ return ret;
+ }
+
+ if (device_property_read_u32(&pdev->dev, "mediatek,debounce-us",
+ &debounce))
+ debounce = 16000;
+
+ if (debounce > MTK_KPD_DEBOUNCE_MAX_US) {
+ dev_err(&pdev->dev, "Debounce time exceeds the maximum allowed time %dus\n",
+ MTK_KPD_DEBOUNCE_MAX_US);
+ return -EINVAL;
+ }
+
+ wakeup = device_property_read_bool(&pdev->dev, "wakeup-source");
+
+ dev_dbg(&pdev->dev, "n_row=%d n_col=%d debounce=%d\n",
+ keypad->n_rows, keypad->n_cols, debounce);
+
+ ret = matrix_keypad_build_keymap(NULL, NULL,
+ keypad->n_rows,
+ keypad->n_cols,
+ NULL,
+ keypad->input_dev);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to build keymap\n");
+ return ret;
+ }
+
+ regmap_write(keypad->regmap, MTK_KPD_DEBOUNCE,
+ debounce * 32 / 1000 & MTK_KPD_DEBOUNCE_MASK);
+
+ keypad->clk = devm_clk_get(&pdev->dev, "kpd");
+ if (IS_ERR(keypad->clk))
+ return keypad->clk;
+
+ ret = clk_prepare_enable(keypad->clk);
+ if (ret) {
+ dev_err(&pdev->dev, "cannot prepare/enable keypad clock\n");
+ return ret;
+ }
+
+ ret = devm_add_action_or_reset(&pdev->dev, kpd_clk_disable, keypad->clk);
+ if (ret)
+ return ret;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = devm_request_threaded_irq(&pdev->dev, irq,
+ NULL, kpd_irq_handler, 0,
+ MTK_KPD_NAME, keypad);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to request IRQ#%d:%d\n",
+ irq, ret);
+ return ret;
+ }
+
+ ret = input_register_device(keypad->input_dev);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to register device\n");
+ return ret;
+ }
+
+ ret = device_init_wakeup(&pdev->dev, wakeup);
+ if (ret)
+ dev_warn(&pdev->dev, "device_init_wakeup fail\n");
+
+ return 0;
+}
+
+static const struct of_device_id kpd_of_match[] = {
+ { .compatible = "mediatek,mt6779-keypad" },
+ { .compatible = "mediatek,mt6873-keypad" },
+ { /* sentinel */ }
+};
+
+static struct platform_driver kpd_pdrv = {
+ .probe = kpd_pdrv_probe,
+ .driver = {
+ .name = MTK_KPD_NAME,
+ .of_match_table = kpd_of_match,
+ },
+};
+module_platform_driver(kpd_pdrv);
+
+MODULE_AUTHOR("Mediatek Corporation");
+MODULE_DESCRIPTION("MTK Keypad (KPD) Driver");
+MODULE_LICENSE("GPL");
--
2.18.0
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^ permalink raw reply related
* [PATCH v13] Add matrix keypad driver support for Mediatek SoCs
From: Fengping Yu @ 2020-06-01 2:25 UTC (permalink / raw)
To: Yingjoe Chen, Dmitry Torokhov, Andy Shevchenko, Marco Felsch
Cc: linux-mediatek, linux-arm-kernel, linux-input
Change since v12:
- modify device_init_wakeup as if failed, only give warning, instead of probe failed
fengping.yu (3):
dt-bindings: Add keypad devicetree documentation
drivers: input: keyboard: Add mtk keypad driver
configs: defconfig: Add CONFIG_KEYBOARD_MTK_KPD=m
.../devicetree/bindings/input/mtk-kpd.yaml | 95 ++++++++
arch/arm64/configs/defconfig | 1 +
drivers/input/keyboard/Kconfig | 11 +
drivers/input/keyboard/Makefile | 1 +
drivers/input/keyboard/mtk-kpd.c | 209 ++++++++++++++++++
5 files changed, 317 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/mtk-kpd.yaml
create mode 100644 drivers/input/keyboard/mtk-kpd.c
--
2.18.0
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* [PATCH 3/3] arm64: dts: imx8qxp: Add ethernet alias
From: peng.fan @ 2020-06-01 2:06 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-arm-kernel, l.stach
In-Reply-To: <1590977180-9957-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add ethernet alias, so bootloader code can use this to find the
primary ethernet device, and set the MAC address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 8ce997110cd6..ff6368af7d39 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -23,6 +23,8 @@
i2c1 = &adma_i2c1;
i2c2 = &adma_i2c2;
i2c3 = &adma_i2c3;
+ ethernet0 = &fec1;
+ ethernet1 = &fec2;
gpio0 = &lsio_gpio0;
gpio1 = &lsio_gpio1;
gpio2 = &lsio_gpio2;
--
2.16.4
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* [PATCH 2/3] arm64: dts: imx8qxp: add i2c aliases
From: peng.fan @ 2020-06-01 2:06 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-arm-kernel, l.stach
In-Reply-To: <1590977180-9957-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
The devices could be enumerated properly with aliases.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 33363c127478..8ce997110cd6 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -19,6 +19,10 @@
#size-cells = <2>;
aliases {
+ i2c0 = &adma_i2c0;
+ i2c1 = &adma_i2c1;
+ i2c2 = &adma_i2c2;
+ i2c3 = &adma_i2c3;
gpio0 = &lsio_gpio0;
gpio1 = &lsio_gpio1;
gpio2 = &lsio_gpio2;
--
2.16.4
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* [PATCH 1/3] arm64: dts: imx8qxp: add alias for lsio MU
From: peng.fan @ 2020-06-01 2:06 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-arm-kernel, l.stach
In-Reply-To: <1590977180-9957-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add lsio mu alias for all lsio MUs that could communicate with SCU,
imx_scu_enable_general_irq_channel will parse the alias to get
the mu resource id, if using other MU, not MU1, the `mu_resource_id`
is not what we expect, so add alias to fix this issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index d1c3c98e4b39..33363c127478 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -30,7 +30,11 @@
mmc0 = &usdhc1;
mmc1 = &usdhc2;
mmc2 = &usdhc3;
+ mu0 = &lsio_mu0;
mu1 = &lsio_mu1;
+ mu2 = &lsio_mu2;
+ mu3 = &lsio_mu3;
+ mu4 = &lsio_mu4;
serial0 = &adma_lpuart0;
serial1 = &adma_lpuart1;
serial2 = &adma_lpuart2;
--
2.16.4
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* [PATCH 0/3] arm64: dts: imx8qxp: dtb aliases fix/update
From: peng.fan @ 2020-06-01 2:06 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-arm-kernel, l.stach
From: Peng Fan <peng.fan@nxp.com>
Minor patchset to fix and update alias for i.MX8QXP
Peng Fan (3):
arm64: dts: imx8qxp: add alias for lsio MU
arm64: dts: imx8qxp: add i2c aliases
arm64: dts: imx8qxp: Add ethernet alias
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
--
2.16.4
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* Re: [PATCH v4 1/4] KEYS: trusted: Add generic trusted keys framework
From: Jarkko Sakkinen @ 2020-06-01 2:11 UTC (permalink / raw)
To: Sumit Garg
Cc: tee-dev, daniel.thompson, op-tee, corbet, jejb, janne.karhunen,
linux-doc, jmorris, zohar, linux-kernel, dhowells,
linux-security-module, keyrings, Markus.Wamser, casey,
linux-integrity, jens.wiklander, linux-arm-kernel, serge
In-Reply-To: <1588758017-30426-2-git-send-email-sumit.garg@linaro.org>
On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> Current trusted keys framework is tightly coupled to use TPM device as
> an underlying implementation which makes it difficult for implementations
> like Trusted Execution Environment (TEE) etc. to provide trusked keys
> support in case platform doesn't posses a TPM device.
>
> So this patch tries to add generic trusted keys framework where underlying
> implemtations like TPM, TEE etc. could be easily plugged-in.
>
> Suggested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> ---
> include/keys/trusted-type.h | 45 ++++
> include/keys/trusted_tpm.h | 15 --
> security/keys/trusted-keys/Makefile | 1 +
> security/keys/trusted-keys/trusted_common.c | 333 +++++++++++++++++++++++++++
> security/keys/trusted-keys/trusted_tpm1.c | 335 +++++-----------------------
> 5 files changed, 437 insertions(+), 292 deletions(-)
> create mode 100644 security/keys/trusted-keys/trusted_common.c
>
> diff --git a/include/keys/trusted-type.h b/include/keys/trusted-type.h
> index a94c03a..5559010 100644
> --- a/include/keys/trusted-type.h
> +++ b/include/keys/trusted-type.h
> @@ -40,6 +40,51 @@ struct trusted_key_options {
> uint32_t policyhandle;
> };
>
> +struct trusted_key_ops {
> + /*
> + * flag to indicate if trusted key implementation supports migration
> + * or not.
> + */
> + unsigned char migratable;
> +
> + /* trusted key init */
> + int (*init)(void);
> +
> + /* seal a trusted key */
> + int (*seal)(struct trusted_key_payload *p, char *datablob);
> +
> + /* unseal a trusted key */
> + int (*unseal)(struct trusted_key_payload *p, char *datablob);
> +
> + /* get random trusted key */
> + int (*get_random)(unsigned char *key, size_t key_len);
> +
> + /* trusted key cleanup */
> + void (*cleanup)(void);
> +};
> +
> extern struct key_type key_type_trusted;
> +#if defined(CONFIG_TCG_TPM)
> +extern struct trusted_key_ops tpm_trusted_key_ops;
> +#endif
> +
> +#define TRUSTED_DEBUG 0
> +
> +#if TRUSTED_DEBUG
> +static inline void dump_payload(struct trusted_key_payload *p)
> +{
> + pr_info("trusted_key: key_len %d\n", p->key_len);
> + print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> + 16, 1, p->key, p->key_len, 0);
> + pr_info("trusted_key: bloblen %d\n", p->blob_len);
> + print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> + 16, 1, p->blob, p->blob_len, 0);
> + pr_info("trusted_key: migratable %d\n", p->migratable);
> +}
> +#else
> +static inline void dump_payload(struct trusted_key_payload *p)
> +{
> +}
> +#endif
>
> #endif /* _KEYS_TRUSTED_TYPE_H */
> diff --git a/include/keys/trusted_tpm.h b/include/keys/trusted_tpm.h
> index a56d8e1..5753231 100644
> --- a/include/keys/trusted_tpm.h
> +++ b/include/keys/trusted_tpm.h
> @@ -60,17 +60,6 @@ static inline void dump_options(struct trusted_key_options *o)
> 16, 1, o->pcrinfo, o->pcrinfo_len, 0);
> }
>
> -static inline void dump_payload(struct trusted_key_payload *p)
> -{
> - pr_info("trusted_key: key_len %d\n", p->key_len);
> - print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> - 16, 1, p->key, p->key_len, 0);
> - pr_info("trusted_key: bloblen %d\n", p->blob_len);
> - print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> - 16, 1, p->blob, p->blob_len, 0);
> - pr_info("trusted_key: migratable %d\n", p->migratable);
> -}
> -
> static inline void dump_sess(struct osapsess *s)
> {
> print_hex_dump(KERN_INFO, "trusted-key: handle ", DUMP_PREFIX_NONE,
> @@ -96,10 +85,6 @@ static inline void dump_options(struct trusted_key_options *o)
> {
> }
>
> -static inline void dump_payload(struct trusted_key_payload *p)
> -{
> -}
> -
> static inline void dump_sess(struct osapsess *s)
> {
> }
> diff --git a/security/keys/trusted-keys/Makefile b/security/keys/trusted-keys/Makefile
> index 7b73ceb..2b1085b 100644
> --- a/security/keys/trusted-keys/Makefile
> +++ b/security/keys/trusted-keys/Makefile
> @@ -4,5 +4,6 @@
> #
>
> obj-$(CONFIG_TRUSTED_KEYS) += trusted.o
> +trusted-y += trusted_common.o
> trusted-y += trusted_tpm1.o
> trusted-y += trusted_tpm2.o
> diff --git a/security/keys/trusted-keys/trusted_common.c b/security/keys/trusted-keys/trusted_common.c
> new file mode 100644
> index 0000000..9bfd081
> --- /dev/null
> +++ b/security/keys/trusted-keys/trusted_common.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2010 IBM Corporation
> + * Copyright (c) 2019, Linaro Limited
> + *
> + * Author:
> + * David Safford <safford@us.ibm.com>
> + * Added generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> + *
> + * See Documentation/security/keys/trusted-encrypted.rst
> + */
> +
> +#include <keys/user-type.h>
> +#include <keys/trusted-type.h>
> +#include <linux/capability.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/key-type.h>
> +#include <linux/module.h>
> +#include <linux/parser.h>
> +#include <linux/rcupdate.h>
> +#include <linux/slab.h>
> +#include <linux/string.h>
> +#include <linux/uaccess.h>
> +
> +static struct trusted_key_ops *available_tk_ops[] = {
> +#if defined(CONFIG_TCG_TPM)
> + &tpm_trusted_key_ops,
> +#endif
> +};
This, I think is wrong. You should have a compile time flag for TPM e.g.
CONFIG_TRUSTED_TPM, not this dynamic mess.
Please make the whole choice compile time, not run-time.
> +static struct trusted_key_ops *tk_ops;
> +
> +enum {
> + Opt_err,
> + Opt_new, Opt_load, Opt_update,
> +};
> +
> +static const match_table_t key_tokens = {
> + {Opt_new, "new"},
> + {Opt_load, "load"},
> + {Opt_update, "update"},
> + {Opt_err, NULL}
> +};
> +
> +/*
> + * datablob_parse - parse the keyctl data and fill in the
> + * payload structure
> + *
> + * On success returns 0, otherwise -EINVAL.
> + */
> +static int datablob_parse(char *datablob, struct trusted_key_payload *p)
> +{
> + substring_t args[MAX_OPT_ARGS];
> + long keylen;
> + int ret = -EINVAL;
> + int key_cmd;
> + char *c;
> +
> + /* main command */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + key_cmd = match_token(c, key_tokens, args);
> + switch (key_cmd) {
> + case Opt_new:
> + /* first argument is key size */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + ret = kstrtol(c, 10, &keylen);
> + if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> + return -EINVAL;
> + p->key_len = keylen;
> + ret = Opt_new;
> + break;
> + case Opt_load:
> + /* first argument is sealed blob */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + p->blob_len = strlen(c) / 2;
> + if (p->blob_len > MAX_BLOB_SIZE)
> + return -EINVAL;
> + ret = hex2bin(p->blob, c, p->blob_len);
> + if (ret < 0)
> + return -EINVAL;
> + ret = Opt_load;
> + break;
> + case Opt_update:
> + ret = Opt_update;
> + break;
> + case Opt_err:
> + return -EINVAL;
> + }
> + return ret;
> +}
> +
> +static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> +{
> + struct trusted_key_payload *p = NULL;
> + int ret;
> +
> + ret = key_payload_reserve(key, sizeof(*p));
> + if (ret < 0)
> + return p;
> + p = kzalloc(sizeof(*p), GFP_KERNEL);
> +
> + p->migratable = tk_ops->migratable;
> +
> + return p;
> +}
> +
> +/*
> + * trusted_instantiate - create a new trusted key
> + *
> + * Unseal an existing trusted blob or, for a new key, get a
> + * random key, then seal and create a trusted key-type key,
> + * adding it to the specified keyring.
> + *
> + * On success, return 0. Otherwise return errno.
> + */
> +static int trusted_instantiate(struct key *key,
> + struct key_preparsed_payload *prep)
> +{
> + struct trusted_key_payload *payload = NULL;
> + size_t datalen = prep->datalen;
> + char *datablob;
> + int ret = 0;
> + int key_cmd;
> + size_t key_len;
> +
> + if (datalen <= 0 || datalen > 32767 || !prep->data)
> + return -EINVAL;
> +
> + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> + if (!datablob)
> + return -ENOMEM;
> + memcpy(datablob, prep->data, datalen);
> + datablob[datalen] = '\0';
> +
> + payload = trusted_payload_alloc(key);
> + if (!payload) {
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + key_cmd = datablob_parse(datablob, payload);
> + if (key_cmd < 0) {
> + ret = key_cmd;
> + goto out;
> + }
> +
> + dump_payload(payload);
> +
> + switch (key_cmd) {
> + case Opt_load:
> + ret = tk_ops->unseal(payload, datablob);
> + dump_payload(payload);
> + if (ret < 0)
> + pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> + break;
> + case Opt_new:
> + key_len = payload->key_len;
> + ret = tk_ops->get_random(payload->key, key_len);
> + if (ret != key_len) {
> + pr_info("trusted_key: key_create failed (%d)\n", ret);
> + goto out;
> + }
> +
> + ret = tk_ops->seal(payload, datablob);
> + if (ret < 0)
> + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> + break;
> + default:
> + ret = -EINVAL;
> + }
> +out:
> + kzfree(datablob);
> + if (!ret)
> + rcu_assign_keypointer(key, payload);
> + else
> + kzfree(payload);
> + return ret;
> +}
> +
> +static void trusted_rcu_free(struct rcu_head *rcu)
> +{
> + struct trusted_key_payload *p;
> +
> + p = container_of(rcu, struct trusted_key_payload, rcu);
> + kzfree(p);
> +}
> +
> +/*
> + * trusted_update - reseal an existing key with new PCR values
> + */
> +static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> +{
> + struct trusted_key_payload *p;
> + struct trusted_key_payload *new_p;
> + size_t datalen = prep->datalen;
> + char *datablob;
> + int ret = 0;
> +
> + if (key_is_negative(key))
> + return -ENOKEY;
> + p = key->payload.data[0];
> + if (!p->migratable)
> + return -EPERM;
> + if (datalen <= 0 || datalen > 32767 || !prep->data)
> + return -EINVAL;
> +
> + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> + if (!datablob)
> + return -ENOMEM;
> +
> + new_p = trusted_payload_alloc(key);
> + if (!new_p) {
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + memcpy(datablob, prep->data, datalen);
> + datablob[datalen] = '\0';
> + ret = datablob_parse(datablob, new_p);
> + if (ret != Opt_update) {
> + ret = -EINVAL;
> + kzfree(new_p);
> + goto out;
> + }
> +
> + /* copy old key values, and reseal with new pcrs */
> + new_p->migratable = p->migratable;
> + new_p->key_len = p->key_len;
> + memcpy(new_p->key, p->key, p->key_len);
> + dump_payload(p);
> + dump_payload(new_p);
> +
> + ret = tk_ops->seal(new_p, datablob);
> + if (ret < 0) {
> + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> + kzfree(new_p);
> + goto out;
> + }
> +
> + rcu_assign_keypointer(key, new_p);
> + call_rcu(&p->rcu, trusted_rcu_free);
> +out:
> + kzfree(datablob);
> + return ret;
> +}
> +
> +/*
> + * trusted_read - copy the sealed blob data to userspace in hex.
> + * On success, return to userspace the trusted key datablob size.
> + */
> +static long trusted_read(const struct key *key, char *buffer,
> + size_t buflen)
> +{
> + const struct trusted_key_payload *p;
> + char *bufp;
> + int i;
> +
> + p = dereference_key_locked(key);
> + if (!p)
> + return -EINVAL;
> +
> + if (buffer && buflen >= 2 * p->blob_len) {
> + bufp = buffer;
> + for (i = 0; i < p->blob_len; i++)
> + bufp = hex_byte_pack(bufp, p->blob[i]);
> + }
> + return 2 * p->blob_len;
> +}
> +
> +/*
> + * trusted_destroy - clear and free the key's payload
> + */
> +static void trusted_destroy(struct key *key)
> +{
> + kzfree(key->payload.data[0]);
> +}
> +
> +struct key_type key_type_trusted = {
> + .name = "trusted",
> + .instantiate = trusted_instantiate,
> + .update = trusted_update,
> + .destroy = trusted_destroy,
> + .describe = user_describe,
> + .read = trusted_read,
> +};
> +EXPORT_SYMBOL_GPL(key_type_trusted);
> +
> +static int __init init_trusted(void)
> +{
> + int i, ret = 0;
> +
> + for (i = 0; i < sizeof(available_tk_ops); i++) {
> + tk_ops = available_tk_ops[i];
> +
> + if (!(tk_ops && tk_ops->init && tk_ops->seal &&
> + tk_ops->unseal && tk_ops->get_random))
> + continue;
This check should not exist as there is no legit case for any of these
callbacks missing. Please remove it.
> +
> + ret = tk_ops->init();
> + if (ret) {
> + if (tk_ops->cleanup)
> + tk_ops->cleanup();
Why is clean up called? What is "clean up"? Init should take care clean
up its dirt if it fails. Please remove the calll to clean up from here.
/Jarkko
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^ permalink raw reply
* Re: [PATCH v4 1/4] KEYS: trusted: Add generic trusted keys framework
From: Jarkko Sakkinen @ 2020-06-01 2:00 UTC (permalink / raw)
To: Sumit Garg
Cc: tee-dev, daniel.thompson, op-tee, corbet, jejb, janne.karhunen,
linux-doc, jmorris, zohar, linux-kernel, dhowells,
linux-security-module, keyrings, Markus.Wamser, casey,
linux-integrity, jens.wiklander, linux-arm-kernel, serge
In-Reply-To: <1588758017-30426-2-git-send-email-sumit.garg@linaro.org>
On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> Current trusted keys framework is tightly coupled to use TPM device as
> an underlying implementation which makes it difficult for implementations
> like Trusted Execution Environment (TEE) etc. to provide trusked keys
> support in case platform doesn't posses a TPM device.
>
> So this patch tries to add generic trusted keys framework where underlying
> implemtations like TPM, TEE etc. could be easily plugged-in.
>
> Suggested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> ---
> include/keys/trusted-type.h | 45 ++++
> include/keys/trusted_tpm.h | 15 --
> security/keys/trusted-keys/Makefile | 1 +
> security/keys/trusted-keys/trusted_common.c | 333 +++++++++++++++++++++++++++
I think trusted_core.c would be a better name (less ambiguous).
> security/keys/trusted-keys/trusted_tpm1.c | 335 +++++-----------------------
> 5 files changed, 437 insertions(+), 292 deletions(-)
> create mode 100644 security/keys/trusted-keys/trusted_common.c
>
> diff --git a/include/keys/trusted-type.h b/include/keys/trusted-type.h
> index a94c03a..5559010 100644
> --- a/include/keys/trusted-type.h
> +++ b/include/keys/trusted-type.h
> @@ -40,6 +40,51 @@ struct trusted_key_options {
> uint32_t policyhandle;
> };
>
> +struct trusted_key_ops {
> + /*
> + * flag to indicate if trusted key implementation supports migration
> + * or not.
> + */
> + unsigned char migratable;
> +
> + /* trusted key init */
> + int (*init)(void);
/* Init a key. */
> +
> + /* seal a trusted key */
> + int (*seal)(struct trusted_key_payload *p, char *datablob);
/* Seal a key. */
> +
> + /* unseal a trusted key */
> + int (*unseal)(struct trusted_key_payload *p, char *datablob);
/* Unseal a key. */
> +
> + /* get random trusted key */
> + int (*get_random)(unsigned char *key, size_t key_len);
/* Get a randomized key. */
> +
> + /* trusted key cleanup */
> + void (*cleanup)(void);
Please remove this from this commit since it is not in use in the scope
of this commit. You should instead make a separate commit just for this
callback, which explains what it is and how it will be used in the
follow up commits.
> +};
> +
> extern struct key_type key_type_trusted;
> +#if defined(CONFIG_TCG_TPM)
> +extern struct trusted_key_ops tpm_trusted_key_ops;
> +#endif
> +
> +#define TRUSTED_DEBUG 0
> +
> +#if TRUSTED_DEBUG
> +static inline void dump_payload(struct trusted_key_payload *p)
> +{
> + pr_info("trusted_key: key_len %d\n", p->key_len);
> + print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> + 16, 1, p->key, p->key_len, 0);
> + pr_info("trusted_key: bloblen %d\n", p->blob_len);
> + print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> + 16, 1, p->blob, p->blob_len, 0);
> + pr_info("trusted_key: migratable %d\n", p->migratable);
> +}
> +#else
> +static inline void dump_payload(struct trusted_key_payload *p)
> +{
> +}
> +#endif
>
> #endif /* _KEYS_TRUSTED_TYPE_H */
> diff --git a/include/keys/trusted_tpm.h b/include/keys/trusted_tpm.h
> index a56d8e1..5753231 100644
> --- a/include/keys/trusted_tpm.h
> +++ b/include/keys/trusted_tpm.h
> @@ -60,17 +60,6 @@ static inline void dump_options(struct trusted_key_options *o)
> 16, 1, o->pcrinfo, o->pcrinfo_len, 0);
> }
>
> -static inline void dump_payload(struct trusted_key_payload *p)
> -{
> - pr_info("trusted_key: key_len %d\n", p->key_len);
> - print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> - 16, 1, p->key, p->key_len, 0);
> - pr_info("trusted_key: bloblen %d\n", p->blob_len);
> - print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> - 16, 1, p->blob, p->blob_len, 0);
> - pr_info("trusted_key: migratable %d\n", p->migratable);
> -}
> -
> static inline void dump_sess(struct osapsess *s)
> {
> print_hex_dump(KERN_INFO, "trusted-key: handle ", DUMP_PREFIX_NONE,
> @@ -96,10 +85,6 @@ static inline void dump_options(struct trusted_key_options *o)
> {
> }
>
> -static inline void dump_payload(struct trusted_key_payload *p)
> -{
> -}
> -
> static inline void dump_sess(struct osapsess *s)
> {
> }
> diff --git a/security/keys/trusted-keys/Makefile b/security/keys/trusted-keys/Makefile
> index 7b73ceb..2b1085b 100644
> --- a/security/keys/trusted-keys/Makefile
> +++ b/security/keys/trusted-keys/Makefile
> @@ -4,5 +4,6 @@
> #
>
> obj-$(CONFIG_TRUSTED_KEYS) += trusted.o
> +trusted-y += trusted_common.o
> trusted-y += trusted_tpm1.o
> trusted-y += trusted_tpm2.o
> diff --git a/security/keys/trusted-keys/trusted_common.c b/security/keys/trusted-keys/trusted_common.c
> new file mode 100644
> index 0000000..9bfd081
> --- /dev/null
> +++ b/security/keys/trusted-keys/trusted_common.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2010 IBM Corporation
> + * Copyright (c) 2019, Linaro Limited
> + *
> + * Author:
> + * David Safford <safford@us.ibm.com>
> + * Added generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> + *
> + * See Documentation/security/keys/trusted-encrypted.rst
> + */
> +
> +#include <keys/user-type.h>
> +#include <keys/trusted-type.h>
> +#include <linux/capability.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +#include <linux/key-type.h>
> +#include <linux/module.h>
> +#include <linux/parser.h>
> +#include <linux/rcupdate.h>
> +#include <linux/slab.h>
> +#include <linux/string.h>
> +#include <linux/uaccess.h>
> +
> +static struct trusted_key_ops *available_tk_ops[] = {
> +#if defined(CONFIG_TCG_TPM)
> + &tpm_trusted_key_ops,
> +#endif
> +};
> +static struct trusted_key_ops *tk_ops;
> +
> +enum {
> + Opt_err,
> + Opt_new, Opt_load, Opt_update,
> +};
> +
> +static const match_table_t key_tokens = {
> + {Opt_new, "new"},
> + {Opt_load, "load"},
> + {Opt_update, "update"},
> + {Opt_err, NULL}
> +};
> +
> +/*
> + * datablob_parse - parse the keyctl data and fill in the
> + * payload structure
> + *
> + * On success returns 0, otherwise -EINVAL.
> + */
> +static int datablob_parse(char *datablob, struct trusted_key_payload *p)
> +{
> + substring_t args[MAX_OPT_ARGS];
> + long keylen;
> + int ret = -EINVAL;
> + int key_cmd;
> + char *c;
> +
> + /* main command */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + key_cmd = match_token(c, key_tokens, args);
> + switch (key_cmd) {
> + case Opt_new:
> + /* first argument is key size */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + ret = kstrtol(c, 10, &keylen);
> + if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> + return -EINVAL;
> + p->key_len = keylen;
> + ret = Opt_new;
> + break;
> + case Opt_load:
> + /* first argument is sealed blob */
> + c = strsep(&datablob, " \t");
> + if (!c)
> + return -EINVAL;
> + p->blob_len = strlen(c) / 2;
> + if (p->blob_len > MAX_BLOB_SIZE)
> + return -EINVAL;
> + ret = hex2bin(p->blob, c, p->blob_len);
> + if (ret < 0)
> + return -EINVAL;
> + ret = Opt_load;
> + break;
> + case Opt_update:
> + ret = Opt_update;
> + break;
> + case Opt_err:
> + return -EINVAL;
> + }
> + return ret;
> +}
> +
> +static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> +{
> + struct trusted_key_payload *p = NULL;
> + int ret;
> +
> + ret = key_payload_reserve(key, sizeof(*p));
> + if (ret < 0)
> + return p;
> + p = kzalloc(sizeof(*p), GFP_KERNEL);
> +
> + p->migratable = tk_ops->migratable;
> +
> + return p;
> +}
> +
> +/*
> + * trusted_instantiate - create a new trusted key
> + *
> + * Unseal an existing trusted blob or, for a new key, get a
> + * random key, then seal and create a trusted key-type key,
> + * adding it to the specified keyring.
> + *
> + * On success, return 0. Otherwise return errno.
> + */
> +static int trusted_instantiate(struct key *key,
> + struct key_preparsed_payload *prep)
> +{
> + struct trusted_key_payload *payload = NULL;
> + size_t datalen = prep->datalen;
> + char *datablob;
> + int ret = 0;
> + int key_cmd;
> + size_t key_len;
> +
> + if (datalen <= 0 || datalen > 32767 || !prep->data)
> + return -EINVAL;
> +
> + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> + if (!datablob)
> + return -ENOMEM;
> + memcpy(datablob, prep->data, datalen);
> + datablob[datalen] = '\0';
> +
> + payload = trusted_payload_alloc(key);
> + if (!payload) {
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + key_cmd = datablob_parse(datablob, payload);
> + if (key_cmd < 0) {
> + ret = key_cmd;
> + goto out;
> + }
> +
> + dump_payload(payload);
> +
> + switch (key_cmd) {
> + case Opt_load:
> + ret = tk_ops->unseal(payload, datablob);
> + dump_payload(payload);
> + if (ret < 0)
> + pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> + break;
> + case Opt_new:
> + key_len = payload->key_len;
> + ret = tk_ops->get_random(payload->key, key_len);
> + if (ret != key_len) {
> + pr_info("trusted_key: key_create failed (%d)\n", ret);
> + goto out;
> + }
> +
> + ret = tk_ops->seal(payload, datablob);
> + if (ret < 0)
> + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> + break;
> + default:
> + ret = -EINVAL;
> + }
> +out:
> + kzfree(datablob);
> + if (!ret)
> + rcu_assign_keypointer(key, payload);
> + else
> + kzfree(payload);
> + return ret;
> +}
> +
> +static void trusted_rcu_free(struct rcu_head *rcu)
> +{
> + struct trusted_key_payload *p;
> +
> + p = container_of(rcu, struct trusted_key_payload, rcu);
> + kzfree(p);
> +}
> +
> +/*
> + * trusted_update - reseal an existing key with new PCR values
> + */
> +static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> +{
> + struct trusted_key_payload *p;
> + struct trusted_key_payload *new_p;
> + size_t datalen = prep->datalen;
> + char *datablob;
> + int ret = 0;
> +
> + if (key_is_negative(key))
> + return -ENOKEY;
> + p = key->payload.data[0];
> + if (!p->migratable)
> + return -EPERM;
> + if (datalen <= 0 || datalen > 32767 || !prep->data)
> + return -EINVAL;
> +
> + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> + if (!datablob)
> + return -ENOMEM;
> +
> + new_p = trusted_payload_alloc(key);
> + if (!new_p) {
> + ret = -ENOMEM;
> + goto out;
> + }
> +
> + memcpy(datablob, prep->data, datalen);
> + datablob[datalen] = '\0';
> + ret = datablob_parse(datablob, new_p);
> + if (ret != Opt_update) {
> + ret = -EINVAL;
> + kzfree(new_p);
> + goto out;
> + }
> +
> + /* copy old key values, and reseal with new pcrs */
> + new_p->migratable = p->migratable;
> + new_p->key_len = p->key_len;
> + memcpy(new_p->key, p->key, p->key_len);
> + dump_payload(p);
> + dump_payload(new_p);
> +
> + ret = tk_ops->seal(new_p, datablob);
> + if (ret < 0) {
> + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> + kzfree(new_p);
> + goto out;
> + }
> +
> + rcu_assign_keypointer(key, new_p);
> + call_rcu(&p->rcu, trusted_rcu_free);
> +out:
> + kzfree(datablob);
> + return ret;
> +}
> +
> +/*
> + * trusted_read - copy the sealed blob data to userspace in hex.
> + * On success, return to userspace the trusted key datablob size.
> + */
> +static long trusted_read(const struct key *key, char *buffer,
> + size_t buflen)
> +{
> + const struct trusted_key_payload *p;
> + char *bufp;
> + int i;
> +
> + p = dereference_key_locked(key);
> + if (!p)
> + return -EINVAL;
> +
> + if (buffer && buflen >= 2 * p->blob_len) {
> + bufp = buffer;
> + for (i = 0; i < p->blob_len; i++)
> + bufp = hex_byte_pack(bufp, p->blob[i]);
> + }
> + return 2 * p->blob_len;
> +}
> +
> +/*
> + * trusted_destroy - clear and free the key's payload
> + */
> +static void trusted_destroy(struct key *key)
> +{
> + kzfree(key->payload.data[0]);
> +}
> +
> +struct key_type key_type_trusted = {
> + .name = "trusted",
> + .instantiate = trusted_instantiate,
> + .update = trusted_update,
> + .destroy = trusted_destroy,
> + .describe = user_describe,
> + .read = trusted_read,
> +};
> +EXPORT_SYMBOL_GPL(key_type_trusted);
> +
> +static int __init init_trusted(void)
> +{
> + int i, ret = 0;
> +
> + for (i = 0; i < sizeof(available_tk_ops); i++) {
> + tk_ops = available_tk_ops[i];
> +
> + if (!(tk_ops && tk_ops->init && tk_ops->seal &&
> + tk_ops->unseal && tk_ops->get_random))
> + continue;
> +
> + ret = tk_ops->init();
> + if (ret) {
> + if (tk_ops->cleanup)
> + tk_ops->cleanup();
> + } else {
> + break;
> + }
> + }
> +
> + /*
> + * encrypted_keys.ko depends on successful load of this module even if
> + * trusted key implementation is not found.
> + */
> + if (ret == -ENODEV)
> + return 0;
> +
> + return ret;
> +}
> +
> +static void __exit cleanup_trusted(void)
> +{
> + if (tk_ops->cleanup)
> + tk_ops->cleanup();
> +}
> +
> +late_initcall(init_trusted);
> +module_exit(cleanup_trusted);
> +
> +MODULE_LICENSE("GPL");
> diff --git a/security/keys/trusted-keys/trusted_tpm1.c b/security/keys/trusted-keys/trusted_tpm1.c
> index 8001ab0..32fd1ea 100644
> --- a/security/keys/trusted-keys/trusted_tpm1.c
> +++ b/security/keys/trusted-keys/trusted_tpm1.c
> @@ -1,29 +1,26 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /*
> * Copyright (C) 2010 IBM Corporation
> + * Copyright (c) 2019, Linaro Limited
> *
> * Author:
> * David Safford <safford@us.ibm.com>
> + * Switch to generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> *
> * See Documentation/security/keys/trusted-encrypted.rst
> */
>
> #include <crypto/hash_info.h>
> -#include <linux/uaccess.h>
> -#include <linux/module.h>
> #include <linux/init.h>
> #include <linux/slab.h>
> #include <linux/parser.h>
> #include <linux/string.h>
> #include <linux/err.h>
> -#include <keys/user-type.h>
> #include <keys/trusted-type.h>
> #include <linux/key-type.h>
> -#include <linux/rcupdate.h>
> #include <linux/crypto.h>
> #include <crypto/hash.h>
> #include <crypto/sha.h>
> -#include <linux/capability.h>
> #include <linux/tpm.h>
> #include <linux/tpm_command.h>
>
> @@ -703,7 +700,6 @@ static int key_unseal(struct trusted_key_payload *p,
>
> enum {
> Opt_err,
> - Opt_new, Opt_load, Opt_update,
> Opt_keyhandle, Opt_keyauth, Opt_blobauth,
> Opt_pcrinfo, Opt_pcrlock, Opt_migratable,
> Opt_hash,
> @@ -712,9 +708,6 @@ enum {
> };
>
> static const match_table_t key_tokens = {
> - {Opt_new, "new"},
> - {Opt_load, "load"},
> - {Opt_update, "update"},
> {Opt_keyhandle, "keyhandle=%s"},
> {Opt_keyauth, "keyauth=%s"},
> {Opt_blobauth, "blobauth=%s"},
> @@ -841,71 +834,6 @@ static int getoptions(char *c, struct trusted_key_payload *pay,
> return 0;
> }
>
> -/*
> - * datablob_parse - parse the keyctl data and fill in the
> - * payload and options structures
> - *
> - * On success returns 0, otherwise -EINVAL.
> - */
> -static int datablob_parse(char *datablob, struct trusted_key_payload *p,
> - struct trusted_key_options *o)
> -{
> - substring_t args[MAX_OPT_ARGS];
> - long keylen;
> - int ret = -EINVAL;
> - int key_cmd;
> - char *c;
> -
> - /* main command */
> - c = strsep(&datablob, " \t");
> - if (!c)
> - return -EINVAL;
> - key_cmd = match_token(c, key_tokens, args);
> - switch (key_cmd) {
> - case Opt_new:
> - /* first argument is key size */
> - c = strsep(&datablob, " \t");
> - if (!c)
> - return -EINVAL;
> - ret = kstrtol(c, 10, &keylen);
> - if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> - return -EINVAL;
> - p->key_len = keylen;
> - ret = getoptions(datablob, p, o);
> - if (ret < 0)
> - return ret;
> - ret = Opt_new;
> - break;
> - case Opt_load:
> - /* first argument is sealed blob */
> - c = strsep(&datablob, " \t");
> - if (!c)
> - return -EINVAL;
> - p->blob_len = strlen(c) / 2;
> - if (p->blob_len > MAX_BLOB_SIZE)
> - return -EINVAL;
> - ret = hex2bin(p->blob, c, p->blob_len);
> - if (ret < 0)
> - return -EINVAL;
> - ret = getoptions(datablob, p, o);
> - if (ret < 0)
> - return ret;
> - ret = Opt_load;
> - break;
> - case Opt_update:
> - /* all arguments are options */
> - ret = getoptions(datablob, p, o);
> - if (ret < 0)
> - return ret;
> - ret = Opt_update;
> - break;
> - case Opt_err:
> - return -EINVAL;
> - break;
> - }
> - return ret;
> -}
> -
> static struct trusted_key_options *trusted_options_alloc(void)
> {
> struct trusted_key_options *options;
> @@ -926,248 +854,99 @@ static struct trusted_key_options *trusted_options_alloc(void)
> return options;
> }
>
> -static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> +static int tpm_tk_seal(struct trusted_key_payload *p, char *datablob)
> {
> - struct trusted_key_payload *p = NULL;
> - int ret;
> -
> - ret = key_payload_reserve(key, sizeof *p);
> - if (ret < 0)
> - return p;
> - p = kzalloc(sizeof *p, GFP_KERNEL);
> - if (p)
> - p->migratable = 1; /* migratable by default */
> - return p;
> -}
> -
> -/*
> - * trusted_instantiate - create a new trusted key
> - *
> - * Unseal an existing trusted blob or, for a new key, get a
> - * random key, then seal and create a trusted key-type key,
> - * adding it to the specified keyring.
> - *
> - * On success, return 0. Otherwise return errno.
> - */
> -static int trusted_instantiate(struct key *key,
> - struct key_preparsed_payload *prep)
> -{
> - struct trusted_key_payload *payload = NULL;
> struct trusted_key_options *options = NULL;
> - size_t datalen = prep->datalen;
> - char *datablob;
> int ret = 0;
> - int key_cmd;
> - size_t key_len;
> int tpm2;
>
> tpm2 = tpm_is_tpm2(chip);
> if (tpm2 < 0)
> return tpm2;
>
> - if (datalen <= 0 || datalen > 32767 || !prep->data)
> - return -EINVAL;
> -
> - datablob = kmalloc(datalen + 1, GFP_KERNEL);
> - if (!datablob)
> - return -ENOMEM;
> - memcpy(datablob, prep->data, datalen);
> - datablob[datalen] = '\0';
> -
> options = trusted_options_alloc();
> - if (!options) {
> - ret = -ENOMEM;
> - goto out;
> - }
> - payload = trusted_payload_alloc(key);
> - if (!payload) {
> - ret = -ENOMEM;
> - goto out;
> - }
> + if (!options)
> + return -ENOMEM;
>
> - key_cmd = datablob_parse(datablob, payload, options);
> - if (key_cmd < 0) {
> - ret = key_cmd;
> + ret = getoptions(datablob, p, options);
> + if (ret < 0)
> goto out;
> - }
> + dump_options(options);
>
> if (!options->keyhandle) {
> ret = -EINVAL;
> goto out;
> }
>
> - dump_payload(payload);
> - dump_options(options);
> + if (tpm2)
> + ret = tpm2_seal_trusted(chip, p, options);
> + else
> + ret = key_seal(p, options);
> + if (ret < 0) {
> + pr_info("tpm_trusted_key: key_seal failed (%d)\n", ret);
> + goto out;
> + }
>
> - switch (key_cmd) {
> - case Opt_load:
> - if (tpm2)
> - ret = tpm2_unseal_trusted(chip, payload, options);
> - else
> - ret = key_unseal(payload, options);
> - dump_payload(payload);
> - dump_options(options);
> - if (ret < 0)
> - pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> - break;
> - case Opt_new:
> - key_len = payload->key_len;
> - ret = tpm_get_random(chip, payload->key, key_len);
> - if (ret != key_len) {
> - pr_info("trusted_key: key_create failed (%d)\n", ret);
> + if (options->pcrlock) {
> + ret = pcrlock(options->pcrlock);
> + if (ret < 0) {
> + pr_info("tpm_trusted_key: pcrlock failed (%d)\n", ret);
> goto out;
> }
> - if (tpm2)
> - ret = tpm2_seal_trusted(chip, payload, options);
> - else
> - ret = key_seal(payload, options);
> - if (ret < 0)
> - pr_info("trusted_key: key_seal failed (%d)\n", ret);
> - break;
> - default:
> - ret = -EINVAL;
> - goto out;
> }
> - if (!ret && options->pcrlock)
> - ret = pcrlock(options->pcrlock);
> out:
> - kzfree(datablob);
> kzfree(options);
> - if (!ret)
> - rcu_assign_keypointer(key, payload);
> - else
> - kzfree(payload);
> return ret;
> }
>
> -static void trusted_rcu_free(struct rcu_head *rcu)
> +static int tpm_tk_unseal(struct trusted_key_payload *p, char *datablob)
> {
> - struct trusted_key_payload *p;
> -
> - p = container_of(rcu, struct trusted_key_payload, rcu);
> - kzfree(p);
> -}
> -
> -/*
> - * trusted_update - reseal an existing key with new PCR values
> - */
> -static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> -{
> - struct trusted_key_payload *p;
> - struct trusted_key_payload *new_p;
> - struct trusted_key_options *new_o;
> - size_t datalen = prep->datalen;
> - char *datablob;
> + struct trusted_key_options *options = NULL;
> int ret = 0;
> + int tpm2;
>
> - if (key_is_negative(key))
> - return -ENOKEY;
> - p = key->payload.data[0];
> - if (!p->migratable)
> - return -EPERM;
> - if (datalen <= 0 || datalen > 32767 || !prep->data)
> - return -EINVAL;
> + tpm2 = tpm_is_tpm2(chip);
> + if (tpm2 < 0)
> + return tpm2;
>
> - datablob = kmalloc(datalen + 1, GFP_KERNEL);
> - if (!datablob)
> + options = trusted_options_alloc();
> + if (!options)
> return -ENOMEM;
> - new_o = trusted_options_alloc();
> - if (!new_o) {
> - ret = -ENOMEM;
> - goto out;
> - }
> - new_p = trusted_payload_alloc(key);
> - if (!new_p) {
> - ret = -ENOMEM;
> - goto out;
> - }
>
> - memcpy(datablob, prep->data, datalen);
> - datablob[datalen] = '\0';
> - ret = datablob_parse(datablob, new_p, new_o);
> - if (ret != Opt_update) {
> - ret = -EINVAL;
> - kzfree(new_p);
> + ret = getoptions(datablob, p, options);
> + if (ret < 0)
> goto out;
> - }
> + dump_options(options);
>
> - if (!new_o->keyhandle) {
> + if (!options->keyhandle) {
> ret = -EINVAL;
> - kzfree(new_p);
> goto out;
> }
>
> - /* copy old key values, and reseal with new pcrs */
> - new_p->migratable = p->migratable;
> - new_p->key_len = p->key_len;
> - memcpy(new_p->key, p->key, p->key_len);
> - dump_payload(p);
> - dump_payload(new_p);
> + if (tpm2)
> + ret = tpm2_unseal_trusted(chip, p, options);
> + else
> + ret = key_unseal(p, options);
> + if (ret < 0)
> + pr_info("tpm_trusted_key: key_unseal failed (%d)\n", ret);
>
> - ret = key_seal(new_p, new_o);
> - if (ret < 0) {
> - pr_info("trusted_key: key_seal failed (%d)\n", ret);
> - kzfree(new_p);
> - goto out;
> - }
> - if (new_o->pcrlock) {
> - ret = pcrlock(new_o->pcrlock);
> + if (options->pcrlock) {
> + ret = pcrlock(options->pcrlock);
> if (ret < 0) {
> - pr_info("trusted_key: pcrlock failed (%d)\n", ret);
> - kzfree(new_p);
> + pr_info("tpm_trusted_key: pcrlock failed (%d)\n", ret);
> goto out;
> }
> }
> - rcu_assign_keypointer(key, new_p);
> - call_rcu(&p->rcu, trusted_rcu_free);
> out:
> - kzfree(datablob);
> - kzfree(new_o);
> + kzfree(options);
> return ret;
> }
>
> -/*
> - * trusted_read - copy the sealed blob data to userspace in hex.
> - * On success, return to userspace the trusted key datablob size.
> - */
> -static long trusted_read(const struct key *key, char *buffer,
> - size_t buflen)
> -{
> - const struct trusted_key_payload *p;
> - char *bufp;
> - int i;
> -
> - p = dereference_key_locked(key);
> - if (!p)
> - return -EINVAL;
> -
> - if (buffer && buflen >= 2 * p->blob_len) {
> - bufp = buffer;
> - for (i = 0; i < p->blob_len; i++)
> - bufp = hex_byte_pack(bufp, p->blob[i]);
> - }
> - return 2 * p->blob_len;
> -}
> -
> -/*
> - * trusted_destroy - clear and free the key's payload
> - */
> -static void trusted_destroy(struct key *key)
> +int tpm_tk_get_random(unsigned char *key, size_t key_len)
> {
> - kzfree(key->payload.data[0]);
> + return tpm_get_random(chip, key, key_len);
> }
>
> -struct key_type key_type_trusted = {
> - .name = "trusted",
> - .instantiate = trusted_instantiate,
> - .update = trusted_update,
> - .destroy = trusted_destroy,
> - .describe = user_describe,
> - .read = trusted_read,
> -};
> -
> -EXPORT_SYMBOL_GPL(key_type_trusted);
> -
> static void trusted_shash_release(void)
> {
> if (hashalg)
> @@ -1182,14 +961,14 @@ static int __init trusted_shash_alloc(void)
>
> hmacalg = crypto_alloc_shash(hmac_alg, 0, 0);
> if (IS_ERR(hmacalg)) {
> - pr_info("trusted_key: could not allocate crypto %s\n",
> + pr_info("tpm_trusted_key: could not allocate crypto %s\n",
> hmac_alg);
> return PTR_ERR(hmacalg);
> }
>
> hashalg = crypto_alloc_shash(hash_alg, 0, 0);
> if (IS_ERR(hashalg)) {
> - pr_info("trusted_key: could not allocate crypto %s\n",
> + pr_info("tpm_trusted_key: could not allocate crypto %s\n",
> hash_alg);
> ret = PTR_ERR(hashalg);
> goto hashalg_fail;
> @@ -1217,16 +996,13 @@ static int __init init_digests(void)
> return 0;
> }
>
> -static int __init init_trusted(void)
> +static int __init init_tpm_trusted(void)
> {
> int ret;
>
> - /* encrypted_keys.ko depends on successful load of this module even if
> - * TPM is not used.
> - */
> chip = tpm_default_chip();
> if (!chip)
> - return 0;
> + return -ENODEV;
>
> ret = init_digests();
> if (ret < 0)
> @@ -1247,7 +1023,7 @@ static int __init init_trusted(void)
> return ret;
> }
>
> -static void __exit cleanup_trusted(void)
> +static void __exit cleanup_tpm_trusted(void)
> {
> if (chip) {
> put_device(&chip->dev);
> @@ -1257,7 +1033,12 @@ static void __exit cleanup_trusted(void)
> }
> }
>
> -late_initcall(init_trusted);
> -module_exit(cleanup_trusted);
> -
> -MODULE_LICENSE("GPL");
> +struct trusted_key_ops tpm_trusted_key_ops = {
> + .migratable = 1, /* migratable by default */
> + .init = init_tpm_trusted,
> + .seal = tpm_tk_seal,
> + .unseal = tpm_tk_unseal,
> + .get_random = tpm_tk_get_random,
> + .cleanup = cleanup_tpm_trusted,
> +};
> +EXPORT_SYMBOL_GPL(tpm_trusted_key_ops);
Everywhere: do not use 'tk'. Use 'trusted' in those places. We do not
want a new acronym.
/Jarkko
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^ permalink raw reply
* RE: [PATCH v10 00/10] exynos-ufs: Add support for UFS HCI
From: Alim Akhtar @ 2020-06-01 1:40 UTC (permalink / raw)
To: martin.petersen, 'Kishon Vijay Abraham I'
Cc: devicetree, linux-samsung-soc, linux-scsi, robh, linux-kernel,
krzk, kwmad.kim, avri.altman, cang, stanley.chu, linux-arm-kernel
In-Reply-To: <20200528011658.71590-1-alim.akhtar@samsung.com>
> -----Original Message-----
> From: Alim Akhtar <alim.akhtar@samsung.com>
> Sent: 28 May 2020 06:47
> To: robh@kernel.org
> Cc: devicetree@vger.kernel.org; linux-scsi@vger.kernel.org; krzk@kernel.org;
> avri.altman@wdc.com; martin.petersen@oracle.com;
> kwmad.kim@samsung.com; stanley.chu@mediatek.com;
> cang@codeaurora.org; linux-samsung-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Alim Akhtar
> <alim.akhtar@samsung.com>
> Subject: [PATCH v10 00/10] exynos-ufs: Add support for UFS HCI
>
> This patch-set introduces UFS (Universal Flash Storage) host controller support
> for Samsung family SoC. Mostly, it consists of UFS PHY and host specific driver.
>
.
.
.
> Alim Akhtar (9):
> scsi: ufs: add quirk to fix mishandling utrlclr/utmrlclr
> scsi: ufs: add quirk to disallow reset of interrupt aggregation
> scsi: ufs: add quirk to enable host controller without hce
> scsi: ufs: introduce UFSHCD_QUIRK_PRDT_BYTE_GRAN quirk
> dt-bindings: phy: Document Samsung UFS PHY bindings
> phy: samsung-ufs: add UFS PHY driver for samsung SoC
> dt-bindings: ufs: Add bindings for Samsung ufs host
> scsi: ufs-exynos: add UFS host support for Exynos SoCs
> arm64: dts: Add node for ufs exynos7
>
> Kiwoong Kim (1):
> scsi: ufs: add quirk to fix abnormal ocs fatal error
>
> .../bindings/phy/samsung,ufs-phy.yaml | 75 +
> .../bindings/ufs/samsung,exynos-ufs.yaml | 89 ++
> .../boot/dts/exynos/exynos7-espresso.dts | 4 +
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 43 +-
> drivers/phy/samsung/Kconfig | 9 +
> drivers/phy/samsung/Makefile | 1 +
> drivers/phy/samsung/phy-exynos7-ufs.h | 86 ++
> drivers/phy/samsung/phy-samsung-ufs.c | 380 +++++
> drivers/phy/samsung/phy-samsung-ufs.h | 143 ++
> drivers/scsi/ufs/Kconfig | 12 +
> drivers/scsi/ufs/Makefile | 1 +
> drivers/scsi/ufs/ufs-exynos.c | 1292 +++++++++++++++++
> drivers/scsi/ufs/ufs-exynos.h | 287 ++++
> drivers/scsi/ufs/ufshcd.c | 126 +-
> drivers/scsi/ufs/ufshcd.h | 29 +
> drivers/scsi/ufs/unipro.h | 33 +
> 16 files changed, 2596 insertions(+), 14 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/samsung,ufs-
> phy.yaml
> create mode 100644 Documentation/devicetree/bindings/ufs/samsung,exynos-
> ufs.yaml
> create mode 100644 drivers/phy/samsung/phy-exynos7-ufs.h
> create mode 100644 drivers/phy/samsung/phy-samsung-ufs.c
> create mode 100644 drivers/phy/samsung/phy-samsung-ufs.h
> create mode 100644 drivers/scsi/ufs/ufs-exynos.c
> create mode 100644 drivers/scsi/ufs/ufs-exynos.h
>
Hi Martin and Kishon,
Can you please take the patches into your respective trees?
Thanks,
>
> base-commit: 0e698dfa282211e414076f9dc7e83c1c288314fd
> --
> 2.17.1
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^ permalink raw reply
* RE: [PATCH v10 10/10] arm64: dts: Add node for ufs exynos7
From: Alim Akhtar @ 2020-06-01 1:30 UTC (permalink / raw)
To: 'Krzysztof Kozlowski'
Cc: robh, linux-samsung-soc, linux-scsi, martin.petersen, devicetree,
linux-kernel, kwmad.kim, avri.altman, cang, stanley.chu,
linux-arm-kernel
In-Reply-To: <20200529080546.GB23221@kozik-lap>
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 29 May 2020 13:36
> To: Alim Akhtar <alim.akhtar@samsung.com>
> Cc: robh@kernel.org; devicetree@vger.kernel.org; linux-scsi@vger.kernel.org;
> avri.altman@wdc.com; martin.petersen@oracle.com;
> kwmad.kim@samsung.com; stanley.chu@mediatek.com;
> cang@codeaurora.org; linux-samsung-soc@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v10 10/10] arm64: dts: Add node for ufs exynos7
>
> On Thu, May 28, 2020 at 06:46:58AM +0530, Alim Akhtar wrote:
> > Adding dt node foe UFS and UFS-PHY for exynos7 SoC.
> >
> > Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
> > Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> > ---
> > .../boot/dts/exynos/exynos7-espresso.dts | 4 ++
> > arch/arm64/boot/dts/exynos/exynos7.dtsi | 43 ++++++++++++++++++-
>
> Thanks, applied to next/dt-late. It might miss this merge window and in such
> case I will keep it for v5.9 cycle.
Thanks Krzysztof.
>
> Best regards,
> Krzysztof
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^ permalink raw reply
* Re: [PATCH v5 03/14] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses
From: Kishon Vijay Abraham I @ 2020-06-01 1:16 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Lorenzo Pieralisi, Arnd Bergmann, PCI,
linux-kernel@vger.kernel.org, Tom Joseph, Greg Kroah-Hartman,
Bjorn Helgaas, linux-omap,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <457db3ae-e68a-d2fc-ba5f-5393ad464413@ti.com>
Hi Rob,
On 5/28/2020 3:36 AM, Kishon Vijay Abraham I wrote:
> Hi Rob,
>
> On 5/27/2020 10:07 PM, Rob Herring wrote:
>> On Wed, May 27, 2020 at 4:49 AM Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>>
>>> Hi Rob,
>>>
>>> On 5/26/2020 8:42 PM, Rob Herring wrote:
>>>> On Sun, May 24, 2020 at 9:30 PM Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>>>>
>>>>> Hi Rob,
>>>>>
>>>>> On 5/22/2020 9:24 PM, Rob Herring wrote:
>>>>>> On Thu, May 21, 2020 at 9:37 PM Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>>>>>>
>>>>>>> Certain platforms like TI's J721E using Cadence PCIe IP can perform only
>>>>>>> 32-bit accesses for reading or writing to Cadence registers. Convert all
>>>>>>> read and write accesses to 32-bit in Cadence PCIe driver in preparation
>>>>>>> for adding PCIe support in TI's J721E SoC.
>>>>>>
>>>>>> Looking more closely I don't think cdns_pcie_ep_assert_intx is okay
>>>>>> with this and never can be given the PCI_COMMAND and PCI_STATUS
>>>>>> registers are in the same word (IIRC, that's the main reason 32-bit
>>>>>> config space accesses are broken). So this isn't going to work at
>>>>>
>>>>> right, PCI_STATUS has write '1' to clear bits and there's a chance that it
>>>>> could be reset while raising legacy interrupt. While this cannot be avoided for
>>>>> TI's J721E, other platforms doesn't have to have this limitation.
>>>>>> least for EP accesses. And maybe you need a custom .raise_irq() hook
>>>>>> to minimize any problems (such as making the RMW atomic at least from
>>>>>> the endpoint's perspective).
>>>>>
>>>>> This is to make sure EP doesn't update in-consistent state when RC is updating
>>>>> the PCI_STATUS register? Since this involves two different systems, how do we
>>>>> make this atomic?
>>>>
>>>> You can't make it atomic WRT both systems, but is there locking around
>>>> each RMW? Specifically, are preemption and interrupts disabled to
>>>> ensure time between a read and write are minimized? You wouldn't want
>>>> interrupts disabled during the delay too though (i.e. around
>>>> .raise_irq()).
>>>
>>> Okay, I'll add spin spin_lock_irqsave() in cdns_pcie_write_sz(). As you also
>>> pointed below that delay for legacy interrupt is wrong and it has to be fixed
>>> (with a later series).
>>
>> But you don't need a lock everywhere. You need locks in the callers
>> (and only sometimes).
>
> Okay, the locks should be added only for registers where HOST can also write to
> the same register? Maybe only raise_irq then..
>
>>
>>> How do you want to handle cdns_pcie_ep_fn_writew() now? Because now we are
>>> changing the default implementation to perform only 32-bit access (used for
>>> legacy interrupt, msi-x interrupt and while writing standard headers) and it's
>>> not okay only for legacy interrupts for platforms other than TI.
>>
>> Now I'm wondering how set_msi is not racy in the current code with the
>> host setting/clearing PCI_MSI_FLAGS_ENABLE? Maybe that bit is RO from
>> the EP side?
>
> set_msi/set_msix is a one time configuration that is invoked before the host
> establishes the link with the endpoint. I don't think we have to consider this
> as racy.
Can we try to close on this discussion please?
Thanks
Kishon
>
> Thanks
> Kishon
>
>>
>> Ultimately I think you're going to have to provide your own endpoint
>> functions or you need accessors for specific registers like
>> PCI_MSI_FLAGS. Then for example, you just rely on the 2 bytes before
>> PCI_MSI_FLAGS being reserved and do a 32-bit access without a RMW.
>> Trying to abstract this at the register read/write level is going to
>> be fragile
>>
>> Rob
>>
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^ permalink raw reply
* Re: [PATCH] irqchip/gic-v3-its: Don't try to move a disabled irq
From: Saidi, Ali @ 2020-06-01 0:10 UTC (permalink / raw)
To: Marc Zyngier
Cc: Herrenschmidt, Benjamin, Jason Cooper, Machulsky, Zorik,
linux-kernel@vger.kernel.org, Zilberman, Zeev,
linux-arm-kernel@lists.infradead.org, Thomas Gleixner,
Woodhouse, David
In-Reply-To: <eed907d48de84c96e3ceb27c1ed6f622@kernel.org>
Marc,
> On May 31, 2020, at 6:10 AM, Marc Zyngier <maz@kernel.org> wrote:
>> Not great indeed. But this is not, as far as I can tell, a GIC
>> driver problem.
>>
>> The semantic of activate/deactivate (which maps to started/shutdown
>> in the IRQ code) is that the HW resources for a given interrupt are
>> only committed when the interrupt is activated. Trying to perform
>> actions involving the HW on an interrupt that isn't active cannot be
>> guaranteed to take effect.
Yes, then it absolutely makes sense to address it outside the GIC.
>>
>> I'd rather address it in the core code, by preventing set_affinity (and
>> potentially others) to take place when the interrupt is not in the
>> STARTED state. Userspace would get an error, which is perfectly
>> legitimate, and which it already has to deal with it for plenty of
>> other
>> reasons.
>
> How about this:
>
> diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
> index 453a8a0f4804..1a2ac1392c0f 100644
> --- a/kernel/irq/manage.c
> +++ b/kernel/irq/manage.c
> @@ -147,7 +147,8 @@ cpumask_var_t irq_default_affinity;
> static bool __irq_can_set_affinity(struct irq_desc *desc)
> {
> if (!desc || !irqd_can_balance(&desc->irq_data) ||
> - !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
> + !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity ||
> + !irqd_is_started(&desc->irq_data))
> return false;
> return true;
> }
Confirmed I can’t reproduce the issue with your fix.
Thanks,
Ali
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^ permalink raw reply
* [PATCH] pinctrl-single: fix pcs_parse_pinconf() return val
From: Drew Fustini @ 2020-05-31 20:41 UTC (permalink / raw)
To: Tony Lindgren, Haojian Zhuang, Linus Walleij, linux-arm-kernel,
linux-omap, linux-gpio, linux-kernel
Cc: Jason Kridner, Robert Nelson
This patch causes pcs_parse_pinconf() to return an error when no
pinctrl_map is added. The current behavior is to return 0 when
!PCS_HAS_PINCONF or !nconfs. Thus pcs_parse_one_pinctrl_entry()
incorrectly assumes that a map was added and sets num_maps = 2.
Analysis:
=========
The function pcs_parse_one_pinctrl_entry() calls pcs_parse_pinconf()
if PCS_HAS_PINCONF is enabled. The function pcs_parse_pinconf()
returns 0 to indicate there was no error and num_maps is then set to 2:
980 static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
981 struct device_node *np,
982 struct pinctrl_map **map,
983 unsigned *num_maps,
984 const char **pgnames)
985 {
<snip>
1053 (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
1054 (*map)->data.mux.group = np->name;
1055 (*map)->data.mux.function = np->name;
1056
1057 if (PCS_HAS_PINCONF && function) {
1058 res = pcs_parse_pinconf(pcs, np, function, map);
1059 if (res)
1060 goto free_pingroups;
1061 *num_maps = 2;
1062 } else {
1063 *num_maps = 1;
1064 }
However, pcs_parse_pinconf() will also return 0 if !PCS_HAS_PINCONF or
!nconfs. I believe these conditions should indicate that no map was
added by returning non-zero. Otherwise pcs_parse_one_pinctrl_entry()
will set num_maps = 2 even though no maps were successfully added, as
it does not reach "m++" on line 940:
895 static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
896 struct pcs_function *func,
897 struct pinctrl_map **map)
898
899 {
900 struct pinctrl_map *m = *map;
<snip>
917 /* If pinconf isn't supported, don't parse properties in below. */
918 if (!PCS_HAS_PINCONF)
919 return 0;
920
921 /* cacluate how much properties are supported in current node */
922 for (i = 0; i < ARRAY_SIZE(prop2); i++) {
923 if (of_find_property(np, prop2[i].name, NULL))
924 nconfs++;
925 }
926 for (i = 0; i < ARRAY_SIZE(prop4); i++) {
927 if (of_find_property(np, prop4[i].name, NULL))
928 nconfs++;
929 }
930 if (!nconfs)
919 return 0;
932
933 func->conf = devm_kcalloc(pcs->dev,
934 nconfs, sizeof(struct pcs_conf_vals),
935 GFP_KERNEL);
936 if (!func->conf)
937 return -ENOMEM;
938 func->nconfs = nconfs;
939 conf = &(func->conf[0]);
940 m++;
This situtation will cause a boot failure [0] on the BeagleBone Black
(AM3358) when am33xx_pinmux node in arch/arm/boot/dts/am33xx-l4.dtsi
has compatible = "pinconf-single" instead of "pinctrl-single".
The patch fixes this issue by returning -ENOSUPP when !PCS_HAS_PINCONF
or !nconfs, so that pcs_parse_one_pinctrl_entry() will know that no
map was added.
[0] https://lore.kernel.org/linux-omap/20200529175544.GA3766151@x1/
Signed-off-by: Drew Fustini <drew@beagleboard.org>
---
drivers/pinctrl/pinctrl-single.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 1e0614daee9b..18a02cd0c701 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -916,7 +916,7 @@ static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
/* If pinconf isn't supported, don't parse properties in below. */
if (!PCS_HAS_PINCONF)
- return 0;
+ return -ENOTSUPP; /* do not return 0 as no map added */
/* cacluate how much properties are supported in current node */
for (i = 0; i < ARRAY_SIZE(prop2); i++) {
@@ -928,7 +928,7 @@ static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
nconfs++;
}
if (!nconfs)
- return 0;
+ return -ENOTSUPP; /* do not return 0 as no map added */
func->conf = devm_kcalloc(pcs->dev,
nconfs, sizeof(struct pcs_conf_vals),
--
2.25.1
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* [PATCH 5/5] ARM: OMAP2+: Fix legacy mode dss_reset
From: Tony Lindgren @ 2020-05-31 19:39 UTC (permalink / raw)
To: linux-omap
Cc: Nishanth Menon, Tero Kristo, Grygorii Strashko, Dave Gerlach,
Keerthy, Tomi Valkeinen, linux-kernel, dri-devel,
Andrew F . Davis, Peter Ujfalusi, Faiz Abbas, Laurent Pinchart,
Greg Kroah-Hartman, Suman Anna, linux-arm-kernel, Roger Quadros
In-Reply-To: <20200531193941.13179-1-tony@atomide.com>
We must check for "dss_core" instead of "dss" to avoid also matching
also "dss_dispc". This only matters for the mixed case of data
configured in device tree but with legacy booting ti,hwmods property
still enabled.
Fixes: 8b30919a4e3c ("ARM: OMAP2+: Handle reset quirks for dynamically allocated modules")
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3489,7 +3489,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = {
};
static const struct omap_hwmod_reset omap_reset_quirks[] = {
- { .match = "dss", .len = 3, .reset = omap_dss_reset, },
+ { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
{ .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
{ .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
{ .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
--
2.26.2
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