* Re: [PATCH v2 00/91] drm/vc4: Support BCM2711 Display Pipelin
From: Jian-Hong Pan @ 2020-06-01 7:58 UTC (permalink / raw)
To: Maxime Ripard
Cc: linux-arm-kernel, devicetree, Linux Kernel, dri-devel,
Daniel Drake, Eric Anholt, bcm-kernel-feedback-list,
linux-rpi-kernel, Linux Upstreaming Team, linux-clk,
Nicolas Saenz Julienne, linux-i2c
In-Reply-To: <20200528073055.znutrhkryzu3grrl@gilmour.lan>
Maxime Ripard <maxime@cerno.tech> 於 2020年5月28日 週四 下午3:30寫道：
>
> Hi Daniel,
>
> On Wed, May 27, 2020 at 05:15:12PM +0800, Daniel Drake wrote:
> > On Wed, May 27, 2020 at 5:13 PM Maxime Ripard <maxime@cerno.tech> wrote:
> > > I'm about to send a v3 today or tomorrow, I can Cc you (and Jian-Hong) if you
> > > want.
> >
> > That would be great, although given the potentially inconsistent
> > results we've been seeing so far it would be great if you could
> > additionally push a git branch somewhere.
> > That way we can have higher confidence that we are applying exactly
> > the same patches to the same base etc.
>
> So I sent a new iteration yesterday, and of course forgot to cc you... Sorry for
> that.
>
> I've pushed my current branch here:
> https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux.git/log/?h=rpi4-kms
Thanks to Maxime!
I have tried your repository on branch rpi4-kms. The DRM VC4 is used!
But got some issues:
1. Some weird error message in dmesg. Not sure it is related, or not
[ 5.219321] [drm:vc5_hdmi_init_resources] *ERROR* Failed to get
HDMI state machine clock
https://gist.github.com/starnight/3f317dca121065a361cf08e91225e389
2. The screen flashes suddenly sometimes.
3. The higher resolutions, like 1920x1080 ... are lost after hot
re-plug HDMI cable (HDMI0)
Jian-Hong Pan
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* [PATCH 1/2] coresight: tmc: Add enable flag to indicate the status of ETR/ETF
From: Sai Prakash Ranjan @ 2020-06-01 8:02 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Mike Leach
Cc: Sai Prakash Ranjan, linux-arm-msm, coresight, linux-kernel,
Stephen Boyd, linux-arm-kernel
In-Reply-To: <cover.1590947174.git.saiprakash.ranjan@codeaurora.org>
Add a flag to check whether TMC ETR/ETF is enabled or not.
This is later used in shutdown callback to determine if
we require to disable ETR/ETF.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
drivers/hwtracing/coresight/coresight-tmc.c | 2 ++
drivers/hwtracing/coresight/coresight-tmc.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 39fba1d16e6e..5a271ebc4585 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -62,11 +62,13 @@ void tmc_flush_and_stop(struct tmc_drvdata *drvdata)
void tmc_enable_hw(struct tmc_drvdata *drvdata)
{
+ drvdata->enable = true;
writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
}
void tmc_disable_hw(struct tmc_drvdata *drvdata)
{
+ drvdata->enable = false;
writel_relaxed(0x0, drvdata->base + TMC_CTL);
}
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index 71de978575f3..d156860495c7 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -184,6 +184,7 @@ struct etr_buf {
* @idr_mutex: Access serialisation for idr.
* @sysfs_buf: SYSFS buffer for ETR.
* @perf_buf: PERF buffer for ETR.
+ * @enable: Indicates whether ETR/ETF is enabled.
*/
struct tmc_drvdata {
void __iomem *base;
@@ -207,6 +208,7 @@ struct tmc_drvdata {
struct mutex idr_mutex;
struct etr_buf *sysfs_buf;
struct etr_buf *perf_buf;
+ bool enable;
};
struct etr_buf_operations {
--
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of Code Aurora Forum, hosted by The Linux Foundation
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^ permalink raw reply related
* [PATCH 0/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF
From: Sai Prakash Ranjan @ 2020-06-01 8:02 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Mike Leach
Cc: Sai Prakash Ranjan, linux-arm-msm, coresight, linux-kernel,
Stephen Boyd, linux-arm-kernel
This series adds a shutdown callback to TMC ETR/ETF to ensure that
it is properly shutdown in reboot/shutdown path. This is required
for ETR/ETF which has SMMU address translation enabled like on SC7180
SoC and few others. If the hardware is still accessing memory after
SMMU translation is disabled as part of SMMU shutdown callback in
system reboot or shutdown path, then IOVAs(I/O virtual address)
which it was using will go on the bus as the physical addresses which
might result in unknown crashes (NoC/interconnect errors). So we make
sure from this shutdown callback that the ETR/ETF is shutdown before
SMMU translation is disabled and device_link in SMMU driver will take
care of ordering of shutdown callbacks such that SMMU shutdown callback
is not called before any of its consumer shutdown callbacks.
Sai Prakash Ranjan (2):
coresight: tmc: Add enable flag to indicate the status of ETR/ETF
coresight: tmc: Add shutdown callback for TMC ETR/ETF
.../hwtracing/coresight/coresight-tmc-etf.c | 4 +--
.../hwtracing/coresight/coresight-tmc-etr.c | 2 +-
drivers/hwtracing/coresight/coresight-tmc.c | 31 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tmc.h | 5 +++
4 files changed, 39 insertions(+), 3 deletions(-)
base-commit: 059e38815950dbec65beafe03757bce9436e89a4
--
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of Code Aurora Forum, hosted by The Linux Foundation
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^ permalink raw reply
* [PATCH 2/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF
From: Sai Prakash Ranjan @ 2020-06-01 8:02 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Mike Leach
Cc: Sai Prakash Ranjan, linux-arm-msm, coresight, linux-kernel,
Stephen Boyd, linux-arm-kernel
In-Reply-To: <cover.1590947174.git.saiprakash.ranjan@codeaurora.org>
Implement a shutdown callback to ensure ETR/ETF hardware is
properly shutdown in reboot/shutdown path. This is required
for ETR/ETF which has SMMU address translation enabled like
on SC7180 SoC and few others. If the hardware is still accessing
memory after SMMU translation is disabled as part of SMMU
shutdown callback in system reboot or shutdown path, then
IOVAs(I/O virtual address) which it was using will go on the bus
as the physical addresses which might result in unknown crashes
(NoC/interconnect errors). So we make sure from this shutdown
callback that the ETR/ETF is shutdown before SMMU translation is
disabled and device_link in SMMU driver will take care of ordering
of shutdown callbacks such that SMMU shutdown callback is not
called before any of its consumer shutdown callbacks.
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
---
.../hwtracing/coresight/coresight-tmc-etf.c | 4 +--
.../hwtracing/coresight/coresight-tmc-etr.c | 2 +-
drivers/hwtracing/coresight/coresight-tmc.c | 29 +++++++++++++++++++
drivers/hwtracing/coresight/coresight-tmc.h | 3 ++
4 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index 36cce2bfb744..cba3e7592820 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
@@ -85,7 +85,7 @@ static void __tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
CS_LOCK(drvdata->base);
}
-static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
+void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
{
__tmc_etb_disable_hw(drvdata);
coresight_disclaim_device(drvdata->base);
@@ -118,7 +118,7 @@ static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
return 0;
}
-static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
+void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
{
CS_UNLOCK(drvdata->base);
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 625882bc8b08..b29c2db94d96 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1110,7 +1110,7 @@ static void __tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
}
-static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
+void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
{
__tmc_etr_disable_hw(drvdata);
/* Disable CATU device if this ETR is connected to one */
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 5a271ebc4585..7e687a356fe0 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -540,6 +540,34 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
+static void tmc_shutdown(struct amba_device *adev)
+{
+ struct tmc_drvdata *drvdata = amba_get_drvdata(adev);
+
+ if (!drvdata->enable)
+ goto out;
+
+ /*
+ * We do not care about the active trace sessions here
+ * since the system is going down unlike remove callback,
+ * just make sure that the hardware is shutdown.
+ */
+ switch (drvdata->config_type) {
+ case TMC_CONFIG_TYPE_ETB:
+ tmc_etb_disable_hw(drvdata);
+ break;
+ case TMC_CONFIG_TYPE_ETF:
+ tmc_etf_disable_hw(drvdata);
+ break;
+ case TMC_CONFIG_TYPE_ETR:
+ tmc_etr_disable_hw(drvdata);
+ }
+
+out:
+ misc_deregister(&drvdata->miscdev);
+ coresight_unregister(drvdata->csdev);
+}
+
static const struct amba_id tmc_ids[] = {
CS_AMBA_ID(0x000bb961),
/* Coresight SoC 600 TMC-ETR/ETS */
@@ -558,6 +586,7 @@ static struct amba_driver tmc_driver = {
.suppress_bind_attrs = true,
},
.probe = tmc_probe,
+ .shutdown = tmc_shutdown,
.id_table = tmc_ids,
};
builtin_amba_driver(tmc_driver);
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index d156860495c7..f4f56c474e58 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -262,6 +262,8 @@ u32 tmc_get_memwidth_mask(struct tmc_drvdata *drvdata);
/* ETB/ETF functions */
int tmc_read_prepare_etb(struct tmc_drvdata *drvdata);
int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata);
+void tmc_etb_disable_hw(struct tmc_drvdata *drvdata);
+void tmc_etf_disable_hw(struct tmc_drvdata *drvdata);
extern const struct coresight_ops tmc_etb_cs_ops;
extern const struct coresight_ops tmc_etf_cs_ops;
@@ -270,6 +272,7 @@ ssize_t tmc_etb_get_sysfs_trace(struct tmc_drvdata *drvdata,
/* ETR functions */
int tmc_read_prepare_etr(struct tmc_drvdata *drvdata);
int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata);
+void tmc_etr_disable_hw(struct tmc_drvdata *drvdata);
extern const struct coresight_ops tmc_etr_cs_ops;
ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata,
loff_t pos, size_t len, char **bufpp);
--
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^ permalink raw reply related
* Re: [PATCH v3] drm/exynos: Remove dev_err() on platform_get_irq() failure
From: Inki Dae @ 2020-06-01 8:09 UTC (permalink / raw)
To: Tamseel Shams, jy0922.shim, sw0312.kim, kyungmin.park, airlied,
daniel
Cc: linux-samsung-soc, shaik.ameer, linux-kernel, krzk, dri-devel,
alim.akhtar, linux-arm-kernel
In-Reply-To: <20200521142210.17400-1-m.shams@samsung.com>
20. 5. 21. 오후 11:22에 Tamseel Shams 이(가) 쓴 글:
> platform_get_irq() will call dev_err() itself on failure,
> so there is no need for the driver to also do this.
> This is detected by coccinelle.
Picked it up.
Thanks,
Inki Dae
>
> Signed-off-by: Tamseel Shams <m.shams@samsung.com>
> ---
> - Changes since v2:
> * Addressed Inki Dae comments
>
> drivers/gpu/drm/exynos/exynos_drm_g2d.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> index fcee33a43aca..03be31427181 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
> @@ -1498,7 +1498,6 @@ static int g2d_probe(struct platform_device *pdev)
>
> g2d->irq = platform_get_irq(pdev, 0);
> if (g2d->irq < 0) {
> - dev_err(dev, "failed to get irq\n");
> ret = g2d->irq;
> goto err_put_clk;
> }
>
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* [PATCH] ARM: dts: imx6qdl: Remove invalid interrupt for GPC node
From: Anson Huang @ 2020-06-01 7:54 UTC (permalink / raw)
To: robh+dt, shawnguo, s.hauer, kernel, festevam, devicetree,
linux-arm-kernel, linux-kernel
Cc: Linux-imx
In latest i.MX6Q RM Rev.6, 05/2020, #90 SPI interrupt is reserved,
so remove it from GPC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index b047403..deb09df 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -871,8 +871,7 @@
reg = <0x020dc000 0x4000>;
interrupt-controller;
#interrupt-cells = <3>;
- interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
- <0 90 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>;
clocks = <&clks IMX6QDL_CLK_IPG>;
clock-names = "ipg";
--
2.7.4
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^ permalink raw reply related
* RE: [PATCH V2 2/3] arm64: dts: imx8m: add mu node
From: Peng Fan @ 2020-06-01 8:08 UTC (permalink / raw)
To: Aisheng Dong, shawnguo@kernel.org, Fabio Estevam,
kernel@pengutronix.de, robh+dt@kernel.org, sboyd@kernel.org,
linux@rempel-privat.de, jaswinder.singh@linaro.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dl-linux-imx, Leonard Crestez, Daniel Baluta,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <AM6PR04MB496620ABEA09A0571B42A9B4808A0@AM6PR04MB4966.eurprd04.prod.outlook.com>
> Subject: RE: [PATCH V2 2/3] arm64: dts: imx8m: add mu node
>
> > From: Peng Fan <peng.fan@nxp.com>
> > Sent: Monday, June 1, 2020 11:43 AM
> >
> > Add mu node to let A53 could communicate with M Core.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 9 +++++++++
> > arch/arm64/boot/dts/freescale/imx8mn.dtsi | 9 +++++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 9 +++++++++
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
> > 4 files changed, 36 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index aaf6e71101a1..fc001fb971e9 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -775,6 +775,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa0000 {
> > + compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa0000 0x10000>;
> > + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MM_CLK_MU_ROOT>;
> > + clock-names = "mu";
>
> You missed my comments about this unneeded line in the last round of
> review.
> https://lore.kernel.org/patchwork/patch/1244752/
oops, will update in v3.
Thanks,
Peng.
>
> Regards
> Aisheng
>
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b40000 {
> > compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
> > reg = <0x30b40000 0x10000>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > index 9a4b65a267d4..c8290d21ccc9 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> > @@ -675,6 +675,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa0000 {
> > + compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa0000 0x10000>;
> > + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MN_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b40000 {
> > compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
> > reg = <0x30b40000 0x10000>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 45e2c0a4e889..b530804f763e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -621,6 +621,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa0000 {
> > + compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa0000 0x10000>;
> > + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MP_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > i2c5: i2c@30ad0000 {
> > compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
> > #address-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 978f8122c0d2..66ba8da704f6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -959,6 +959,15 @@
> > status = "disabled";
> > };
> >
> > + mu: mailbox@30aa0000 {
> > + compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
> > + reg = <0x30aa0000 0x10000>;
> > + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
> > + clock-names = "mu";
> > + #mbox-cells = <2>;
> > + };
> > +
> > usdhc1: mmc@30b40000 {
> > compatible = "fsl,imx8mq-usdhc",
> > "fsl,imx7d-usdhc";
> > --
> > 2.16.4
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^ permalink raw reply
* RE: [PATCH V2 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: Anson Huang @ 2020-06-01 8:09 UTC (permalink / raw)
To: Aisheng Dong, Peng Fan, shawnguo@kernel.org, Fabio Estevam,
kernel@pengutronix.de, robh+dt@kernel.org, sboyd@kernel.org,
linux@rempel-privat.de, jaswinder.singh@linaro.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dl-linux-imx, Leonard Crestez, Daniel Baluta,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <AM6PR04MB496668011F3AB2BEEEE6D1E1808A0@AM6PR04MB4966.eurprd04.prod.outlook.com>
> Subject: RE: [PATCH V2 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
>
> > From: Peng Fan <peng.fan@nxp.com>
> > Sent: Monday, June 1, 2020 11:43 AM
> >
> > Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
>
> BTW, Anson,
> will you continue to help convert MU binding into json schemas?
Ok.
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^ permalink raw reply
* [PATCH 1/2] dt-bindings: power: Convert imx gpc to json-schema
From: Anson Huang @ 2020-06-01 8:06 UTC (permalink / raw)
To: robh+dt, shawnguo, s.hauer, kernel, festevam, ulf.hansson, sboyd,
krzk, p.zabel, andrew.smirnov, devicetree, linux-arm-kernel,
linux-kernel
Cc: Linux-imx
Convert the i.MX GPC binding to DT schema format using json-schema
From latest reference manual, there is actually ONLY 1 interrupt for
GPC, so the additional GPC interrupt is removed.
Consumer's example is also removed since it is NOT that useful.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
.../devicetree/bindings/power/fsl,imx-gpc.txt | 91 ---------------
.../devicetree/bindings/power/fsl,imx-gpc.yaml | 124 +++++++++++++++++++++
2 files changed, 124 insertions(+), 91 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/power/fsl,imx-gpc.txt
create mode 100644 Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt
deleted file mode 100644
index f0f5553..0000000
--- a/Documentation/devicetree/bindings/power/fsl,imx-gpc.txt
+++ /dev/null
@@ -1,91 +0,0 @@
-Freescale i.MX General Power Controller
-=======================================
-
-The i.MX6 General Power Control (GPC) block contains DVFS load tracking
-counters and Power Gating Control (PGC).
-
-Required properties:
-- compatible: Should be one of the following:
- - fsl,imx6q-gpc
- - fsl,imx6qp-gpc
- - fsl,imx6sl-gpc
- - fsl,imx6sx-gpc
-- reg: should be register base and length as documented in the
- datasheet
-- interrupts: Should contain one interrupt specifier for the GPC interrupt
-- clocks: Must contain an entry for each entry in clock-names.
- See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: Must include the following entries:
- - ipg
-
-The power domains are generic power domain providers as documented in
-Documentation/devicetree/bindings/power/power-domain.yaml. They are described as
-subnodes of the power gating controller 'pgc' node of the GPC and should
-contain the following:
-
-Required properties:
-- reg: Must contain the DOMAIN_INDEX of this power domain
- The following DOMAIN_INDEX values are valid for i.MX6Q:
- ARM_DOMAIN 0
- PU_DOMAIN 1
- The following additional DOMAIN_INDEX value is valid for i.MX6SL:
- DISPLAY_DOMAIN 2
- The following additional DOMAIN_INDEX value is valid for i.MX6SX:
- PCI_DOMAIN 3
-
-- #power-domain-cells: Should be 0
-
-Optional properties:
-- clocks: a number of phandles to clocks that need to be enabled during domain
- power-up sequencing to ensure reset propagation into devices located inside
- this power domain
-- power-supply: a phandle to the regulator powering this domain
-
-Example:
-
- gpc: gpc@20dc000 {
- compatible = "fsl,imx6q-gpc";
- reg = <0x020dc000 0x4000>;
- interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
- <0 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_IPG>;
- clock-names = "ipg";
-
- pgc {
- #address-cells = <1>;
- #size-cells = <0>;
-
- power-domain@0 {
- reg = <0>;
- #power-domain-cells = <0>;
- };
-
- pd_pu: power-domain@1 {
- reg = <1>;
- #power-domain-cells = <0>;
- power-supply = <®_pu>;
- clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
- <&clks IMX6QDL_CLK_GPU3D_SHADER>,
- <&clks IMX6QDL_CLK_GPU2D_CORE>,
- <&clks IMX6QDL_CLK_GPU2D_AXI>,
- <&clks IMX6QDL_CLK_OPENVG_AXI>,
- <&clks IMX6QDL_CLK_VPU_AXI>;
- };
- };
- };
-
-
-Specifying power domain for IP modules
-======================================
-
-IP cores belonging to a power domain should contain a 'power-domains' property
-that is a phandle pointing to the power domain the device belongs to.
-
-Example of a device that is part of the PU power domain:
-
- vpu: vpu@2040000 {
- reg = <0x02040000 0x3c000>;
- /* ... */
- power-domains = <&pd_pu>;
- /* ... */
- };
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml
new file mode 100644
index 0000000..a055b3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml
@@ -0,0 +1,124 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX General Power Controller
+
+maintainers:
+ - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+ The i.MX6 General Power Control (GPC) block contains DVFS load tracking
+ counters and Power Gating Control (PGC).
+
+ The power domains are generic power domain providers as documented in
+ Documentation/devicetree/bindings/power/power-domain.yaml. They are
+ described as subnodes of the power gating controller 'pgc' node of the GPC.
+
+ IP cores belonging to a power domain should contain a 'power-domains'
+ property that is a phandle pointing to the power domain the device belongs
+ to.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx6q-gpc
+ - fsl,imx6qp-gpc
+ - fsl,imx6sl-gpc
+ - fsl,imx6sx-gpc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: ipg
+
+ pgc:
+ type: object
+ description: list of power domains provided by this controller.
+
+ patternProperties:
+ "power-domain@[0-9]$":
+ type: object
+ properties:
+
+ '#power-domain-cells':
+ const: 0
+
+ reg:
+ description: |
+ The following DOMAIN_INDEX values are valid for i.MX6Q:
+ ARM_DOMAIN 0
+ PU_DOMAIN 1
+ The following additional DOMAIN_INDEX value is valid for i.MX6SL:
+ DISPLAY_DOMAIN 2
+ The following additional DOMAIN_INDEX value is valid for i.MX6SX:
+ PCI_DOMAIN 3
+ maxItems: 1
+
+ clocks:
+ description: |
+ A number of phandles to clocks that need to be enabled during domain
+ power-up sequencing to ensure reset propagation into devices located
+ inside this power domain.
+ minItems: 1
+ maxItems: 7
+
+ power-supply: true
+
+ required:
+ - '#power-domain-cells'
+ - reg
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - pgc
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx6qdl-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ gpc@20dc000 {
+ compatible = "fsl,imx6q-gpc";
+ reg = <0x020dc000 0x4000>;
+ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_IPG>;
+ clock-names = "ipg";
+
+ pgc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-domain@0 {
+ reg = <0>;
+ #power-domain-cells = <0>;
+ };
+
+ pd_pu: power-domain@1 {
+ reg = <1>;
+ #power-domain-cells = <0>;
+ power-supply = <®_pu>;
+ clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
+ <&clks IMX6QDL_CLK_GPU3D_SHADER>,
+ <&clks IMX6QDL_CLK_GPU2D_CORE>,
+ <&clks IMX6QDL_CLK_GPU2D_AXI>,
+ <&clks IMX6QDL_CLK_OPENVG_AXI>,
+ <&clks IMX6QDL_CLK_VPU_AXI>;
+ };
+ };
+ };
--
2.7.4
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^ permalink raw reply related
* [PATCH 2/2] dt-bindings: power: Convert imx gpcv2 to json-schema
From: Anson Huang @ 2020-06-01 8:06 UTC (permalink / raw)
To: robh+dt, shawnguo, s.hauer, kernel, festevam, ulf.hansson, sboyd,
krzk, p.zabel, andrew.smirnov, devicetree, linux-arm-kernel,
linux-kernel
Cc: Linux-imx
In-Reply-To: <1590998803-29191-1-git-send-email-Anson.Huang@nxp.com>
Convert the i.MX GPCv2 binding to DT schema format using json-schema
Example is updated based on latest DT file and consumer's example is
removed since it is NOT that useful.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
.../devicetree/bindings/power/fsl,imx-gpcv2.txt | 77 ---------------
.../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 108 +++++++++++++++++++++
2 files changed, 108 insertions(+), 77 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
create mode 100644 Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
deleted file mode 100644
index 6164920..0000000
--- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.txt
+++ /dev/null
@@ -1,77 +0,0 @@
-Freescale i.MX General Power Controller v2
-==========================================
-
-The i.MX7S/D General Power Control (GPC) block contains Power Gating
-Control (PGC) for various power domains.
-
-Required properties:
-
-- compatible: Should be one of:
- - "fsl,imx7d-gpc"
- - "fsl,imx8mq-gpc"
-
-- reg: should be register base and length as documented in the
- datasheet
-
-- interrupts: Should contain GPC interrupt request 1
-
-Power domains contained within GPC node are generic power domain
-providers, documented in
-Documentation/devicetree/bindings/power/power-domain.yaml, which are
-described as subnodes of the power gating controller 'pgc' node,
-which, in turn, is expected to contain the following:
-
-Required properties:
-
-- reg: Power domain index. Valid values are defined in
- include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
- include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
-
-- #power-domain-cells: Should be 0
-
-Optional properties:
-
-- power-supply: Power supply used to power the domain
-- clocks: a number of phandles to clocks that need to be enabled during
- domain power-up sequencing to ensure reset propagation into devices
- located inside this power domain
-
-Example:
-
- gpc: gpc@303a0000 {
- compatible = "fsl,imx7d-gpc";
- reg = <0x303a0000 0x1000>;
- interrupt-controller;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <3>;
- interrupt-parent = <&intc>;
-
- pgc {
- #address-cells = <1>;
- #size-cells = <0>;
-
- pgc_pcie_phy: power-domain@1 {
- #power-domain-cells = <0>;
-
- reg = <1>;
- power-supply = <®_1p0d>;
- };
- };
- };
-
-
-Specifying power domain for IP modules
-======================================
-
-IP cores belonging to a power domain should contain a 'power-domains'
-property that is a phandle for PGC node representing the domain.
-
-Example of a device that is part of the PCIE_PHY power domain:
-
- pcie: pcie@33800000 {
- reg = <0x33800000 0x4000>,
- <0x4ff00000 0x80000>;
- /* ... */
- power-domains = <&pgc_pcie_phy>;
- /* ... */
- };
diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
new file mode 100644
index 0000000..bde09a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX General Power Controller v2
+
+maintainers:
+ - Andrey Smirnov <andrew.smirnov@gmail.com>
+
+description: |
+ The i.MX7S/D General Power Control (GPC) block contains Power Gating
+ Control (PGC) for various power domains.
+
+ Power domains contained within GPC node are generic power domain
+ providers, documented in
+ Documentation/devicetree/bindings/power/power-domain.yaml, which are
+ described as subnodes of the power gating controller 'pgc' node.
+
+ IP cores belonging to a power domain should contain a 'power-domains'
+ property that is a phandle for PGC node representing the domain.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx7d-gpc
+ - fsl,imx8mq-gpc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ pgc:
+ type: object
+ description: list of power domains provided by this controller.
+
+ patternProperties:
+ "power-domain@[0-9]$":
+ type: object
+ properties:
+
+ '#power-domain-cells':
+ const: 0
+
+ reg:
+ description: |
+ Power domain index. Valid values are defined in
+ include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
+ include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
+ maxItems: 1
+
+ clocks:
+ description: |
+ A number of phandles to clocks that need to be enabled during domain
+ power-up sequencing to ensure reset propagation into devices located
+ inside this power domain.
+ minItems: 1
+ maxItems: 5
+
+ power-supply: true
+
+ required:
+ - '#power-domain-cells'
+ - reg
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - pgc
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ gpc@303a0000 {
+ compatible = "fsl,imx7d-gpc";
+ reg = <0x303a0000 0x1000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+
+ pgc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pgc_mipi_phy: power-domain@0 {
+ #power-domain-cells = <0>;
+ reg = <0>;
+ power-supply = <®_1p0d>;
+ };
+
+ pgc_pcie_phy: power-domain@1 {
+ #power-domain-cells = <0>;
+ reg = <1>;
+ power-supply = <®_1p0d>;
+ };
+
+ pgc_hsic_phy: power-domain@2 {
+ #power-domain-cells = <0>;
+ reg = <2>;
+ power-supply = <®_1p2>;
+ };
+ };
+ };
--
2.7.4
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^ permalink raw reply related
* Re: [RFC PATCH v5 0/6] Exynos: Simple QoS for exynos-bus using interconnect
From: Sylwester Nawrocki @ 2020-06-01 8:17 UTC (permalink / raw)
To: georgi.djakov, cw00.choi, krzk
Cc: devicetree, linux-samsung-soc, b.zolnierkie, sw0312.kim, a.swigon,
dri-devel, linux-kernel, inki.dae, Rob Herring, myungjoo.ham,
linux-arm-kernel, m.szyprowski
In-Reply-To: <20200529163200.18031-1-s.nawrocki@samsung.com>
Cc: Rob, devicetree ML
On 29.05.2020 18:31, Sylwester Nawrocki wrote:
> This patchset adds interconnect API support for the Exynos SoC "samsung,
> exynos-bus" compatible devices, which already have their corresponding
> exynos-bus driver in the devfreq subsystem. Complementing the devfreq driver
> with an interconnect functionality allows to ensure the QoS requirements
> of devices accessing the system memory (e.g. video processing devices)
> are fulfilled and to avoid issues like the one discussed in thread [1].
>
> This patch series depends on 3 patches from Artur for the interconnect API
> [2], which introduce following changes:
>
> - exporting of_icc_get_from_provider() to avoid hard coding every graph
> edge in the DT or driver source,
> - relaxing the requirement on #interconnect-cells, so there is no need
> to provide dummy node IDs in the DT,
> - adding new field in struct icc_provider to explicitly allow configuring
> node pairs from two different providers.
>
> This series adds implementation of interconnect provider per each "samsung,
> exynos-bus" compatible DT node, with one interconnect node per provider.
> The interconnect code which was previously added as a part of the devfreq
> driver has been converted to a separate platform driver. In the devfreq
> a corresponding virtual child platform device is registered. Integration
> of devfreq and interconnect frameworks is achieved through the PM QoS API.
>
> A sample interconnect consumer for exynos-mixer is added in patches 5/6,
> 6/6, it is currently added only for exynos4412 and allows to address the
> mixer DMA underrun error issues [1].
>
> The series has been tested on Odroid U3 board. It is based on icc-next
> branch with devfreq-next branch merged and patches [2] applied.
>
> --
> Regards,
> Sylwester
>
> --
> Changes since v3 [3] (v4 skipped to align with patchset [1]), detailed
> changes are listed at each patch:
> - conversion to a separate interconnect (platform) driver,
> - an update of the DT binding documenting new optional properties:
> #interconnect-cells, samsung,interconnect-parent in "samsung,exynos-bus"
> nodes,
> - new DT properties added to the SoC, rather than to the board specific
> files.
>
> Changes since v2 [5]:
> - Use icc_std_aggregate().
> - Implement a different modification of apply_constraints() in
> drivers/interconnect/core.c (patch 03).
> - Use 'exynos,interconnect-parent-node' in the DT instead of
> 'devfreq'/'parent', depending on the bus.
> - Rebase on DT patches that deprecate the 'devfreq' DT property.
> - Improve error handling, including freeing generated IDs on failure.
> - Remove exynos_bus_icc_connect() and add exynos_bus_icc_get_parent().
>
> Changes since v1 [4]:
> - Rebase on coupled regulators patches.
> - Use dev_pm_qos_*() API instead of overriding frequency in
> exynos_bus_target().
> - Use IDR for node ID allocation.
> - Reverse order of multiplication and division in
> mixer_set_memory_bandwidth() (patch 07) to avoid integer overflow.
>
>
> References:
> [1] https://patchwork.kernel.org/patch/10861757/ (original issue)
> [2] https://www.spinics.net/lists/linux-samsung-soc/msg70014.html
> [3] https://lore.kernel.org/linux-pm/20191220115653.6487-1-a.swigon@samsung.com
> [4] https://patchwork.kernel.org/cover/11054417/ (v1 of this RFC)
> [5] https://patchwork.kernel.org/cover/11152595/ (v2 of this RFC)
>
>
> Artur Świgoń (1):
> ARM: dts: exynos: Add interconnects to Exynos4412 mixer
>
> Marek Szyprowski (1):
> drm: exynos: mixer: Add interconnect support
>
> Sylwester Nawrocki (4):
> dt-bindings: exynos-bus: Add documentation for interconnect properties
> interconnect: Add generic interconnect driver for Exynos SoCs
> PM / devfreq: exynos-bus: Add registration of interconnect child
> device
> ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes
>
> .../devicetree/bindings/devfreq/exynos-bus.txt | 15 +-
> arch/arm/boot/dts/exynos4412.dtsi | 6 +
> drivers/devfreq/exynos-bus.c | 17 ++
> drivers/gpu/drm/exynos/exynos_mixer.c | 73 +++++++-
> drivers/interconnect/Kconfig | 1 +
> drivers/interconnect/Makefile | 1 +
> drivers/interconnect/exynos/Kconfig | 6 +
> drivers/interconnect/exynos/Makefile | 4 +
> drivers/interconnect/exynos/exynos.c | 185 +++++++++++++++++++++
> 9 files changed, 301 insertions(+), 7 deletions(-)
> create mode 100644 drivers/interconnect/exynos/Kconfig
> create mode 100644 drivers/interconnect/exynos/Makefile
> create mode 100644 drivers/interconnect/exynos/exynos.c
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^ permalink raw reply
* Re: [PATCH v8 2/3] perf auxtrace: Add four itrace options
From: Leo Yan @ 2020-06-01 8:17 UTC (permalink / raw)
To: Adrian Hunter
Cc: Mark Rutland, Ian Rogers, Andi Kleen, Al Grant, Mathieu Poirier,
Alexander Shishkin, Jiri Olsa, Tan Xiaojun, linux-kernel,
Arnaldo Carvalho de Melo, Peter Zijlstra, Jin Yao, Ingo Molnar,
James Clark, Namhyung Kim, Thomas Gleixner, Will Deacon,
linux-arm-kernel, Mike Leach
In-Reply-To: <aaacf3f6-daab-098e-d1fb-1509e1cf9c84@intel.com>
On Mon, Jun 01, 2020 at 10:24:00AM +0300, Adrian Hunter wrote:
> On 30/05/20 3:24 pm, Leo Yan wrote:
> > From: Tan Xiaojun <tanxiaojun@huawei.com>
> >
> > This patch is to add four options to synthesize events which are
> > described as below:
> >
> > 'f': synthesize first level cache events
> > 'm': synthesize last level cache events
> > 't': synthesize TLB events
> > 'a': synthesize remote access events
> >
> > This four options will be used by ARM SPE as their first consumer.
> >
> > Signed-off-by: Tan Xiaojun <tanxiaojun@huawei.com>
> > Signed-off-by: James Clark <james.clark@arm.com>
> > Signed-off-by: Leo Yan <leo.yan@linaro.org>
> > Tested-by: James Clark <james.clark@arm.com>
>
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Thanks a lot for reviewing, Adrian.
Leo
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^ permalink raw reply
* Re: [RFC PATCH v5 1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties
From: Sylwester Nawrocki @ 2020-06-01 8:19 UTC (permalink / raw)
To: georgi.djakov, cw00.choi, krzk
Cc: devicetree, linux-samsung-soc, b.zolnierkie, sw0312.kim, a.swigon,
dri-devel, linux-kernel, inki.dae, Rob Herring, myungjoo.ham,
linux-arm-kernel, m.szyprowski
In-Reply-To: <20200529163200.18031-2-s.nawrocki@samsung.com>
Cc: Rob, devicetree ML
On 29.05.2020 18:31, Sylwester Nawrocki wrote:
> Add documentation for new optional properties in the exynos bus nodes:
> samsung,interconnect-parent, #interconnect-cells.
> These properties allow to specify the SoC interconnect structure which
> then allows the interconnect consumer devices to request specific
> bandwidth requirements.
>
> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
> ---
> Changes for v5:
> - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
> ---
> Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> index e71f752..e0d2daa 100644
> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> @@ -51,6 +51,11 @@ Optional properties only for parent bus device:
> - exynos,saturation-ratio: the percentage value which is used to calibrate
> the performance count against total cycle count.
>
> +Optional properties for interconnect functionality (QoS frequency constraints):
> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
> + passive devices should point to same node as the exynos,parent-bus property.
> +- #interconnect-cells: should be 0
> +
> Detailed correlation between sub-blocks and power line according to Exynos SoC:
> - In case of Exynos3250, there are two power line as following:
> VDD_MIF |--- DMC
> @@ -185,8 +190,9 @@ Example1:
> ----------------------------------------------------------
>
> Example2 :
> - The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
> - is listed below:
> + The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
> + listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
> + is defined for demonstration purposes.
>
> bus_dmc: bus_dmc {
> compatible = "samsung,exynos-bus";
> @@ -376,12 +382,15 @@ Example2 :
> &bus_dmc {
> devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
> vdd-supply = <&buck1_reg>; /* VDD_MIF */
> + #interconnect-cells = <0>;
> status = "okay";
> };
>
> &bus_leftbus {
> devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
> vdd-supply = <&buck3_reg>;
> + samsung,interconnect-parent = <&bus_dmc>;
> + #interconnect-cells = <0>;
> status = "okay";
> };
>
> @@ -392,6 +401,8 @@ Example2 :
>
> &bus_lcd0 {
> devfreq = <&bus_leftbus>;
> + samsung,interconnect-parent = <&bus_leftbus>;
> + #interconnect-cells = <0>;
> status = "okay";
> };
>
> --
> 2.7.4
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^ permalink raw reply
* Re: [GIT PULL] KVM/arm64 updates for Linux 5.8
From: Paolo Bonzini @ 2020-06-01 8:27 UTC (permalink / raw)
To: Marc Zyngier
Cc: Mark Rutland, kvmarm, kvm, Will Deacon, Suzuki K Poulose,
Keqian Zhu, Christoffer Dall, Jiang Yi, James Morse, Andrew Scull,
Zenghui Yu, Julien Thierry, David Brazdil, Alexandru Elisei,
Ard Biesheuvel, Fuad Tabba, linux-arm-kernel
In-Reply-To: <20200529160121.899083-1-maz@kernel.org>
On 29/05/20 18:00, Marc Zyngier wrote:
> git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git tags/kvmarm-5.8
Pulled, thanks (to kvm/queue only for now).
Paolo
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^ permalink raw reply
* [PATCH V3 0/3] imx8m: add mu support
From: peng.fan @ 2020-06-01 8:19 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
From: Peng Fan <peng.fan@nxp.com>
V3:
Add R-b tag
Remove undocumented property
V2:
Add dt-bindings
Merge dts changes into one patch, since all is to add mu node
Add mu dt bindings
Add mu node
Add i.MX8MP mu root clk
Peng Fan (3):
dt-bindings: mailbox: imx-mu: support i.MX8M
arm64: dts: imx8m: add mu node
clk: imx8mp: add mu root clk
Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++-
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
drivers/clk/imx/clk-imx8mp.c | 1 +
6 files changed, 35 insertions(+), 1 deletion(-)
--
2.16.4
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* [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: peng.fan @ 2020-06-01 8:20 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590999602-29482-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
index 26b7a88c2fea..906377acf2cd 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
@@ -18,7 +18,8 @@ Messaging Unit Device Node:
Required properties:
-------------------
- compatible : should be "fsl,<chip>-mu", the supported chips include
- imx6sx, imx7s, imx8qxp, imx8qm.
+ imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn,
+ imx8mp.
The "fsl,imx6sx-mu" compatible is seen as generic and should
be included together with SoC specific compatible.
There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
--
2.16.4
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* [PATCH V3 2/3] arm64: dts: imx8m: add mu node
From: peng.fan @ 2020-06-01 8:20 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590999602-29482-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu node to let A53 could communicate with M Core.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
4 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..d9e787ea246f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..3dca1fb34ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..1bc14bb44d90 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad0000 {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..3e762919d61f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
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* [PATCH V3 3/3] clk: imx8mp: add mu root clk
From: peng.fan @ 2020-06-01 8:20 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux, jaswinder.singh
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1590999602-29482-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu root clk for mu mailbox usage.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root", ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
--
2.16.4
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* Re: [PATCH v4 1/4] KEYS: trusted: Add generic trusted keys framework
From: Sumit Garg @ 2020-06-01 8:50 UTC (permalink / raw)
To: Jarkko Sakkinen
Cc: tee-dev @ lists . linaro . org, Daniel Thompson, op-tee,
Jonathan Corbet, James Bottomley, Janne Karhunen,
Linux Doc Mailing List, James Morris, Mimi Zohar,
Linux Kernel Mailing List, dhowells, linux-security-module,
open list:ASYMMETRIC KEYS, Markus Wamser, Casey Schaufler,
linux-integrity, Jens Wiklander, linux-arm-kernel,
Serge E. Hallyn
In-Reply-To: <20200601020048.GC794847@linux.intel.com>
On Mon, 1 Jun 2020 at 07:30, Jarkko Sakkinen
<jarkko.sakkinen@linux.intel.com> wrote:
>
> On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> > Current trusted keys framework is tightly coupled to use TPM device as
> > an underlying implementation which makes it difficult for implementations
> > like Trusted Execution Environment (TEE) etc. to provide trusked keys
> > support in case platform doesn't posses a TPM device.
> >
> > So this patch tries to add generic trusted keys framework where underlying
> > implemtations like TPM, TEE etc. could be easily plugged-in.
> >
> > Suggested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> > Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> > ---
> > include/keys/trusted-type.h | 45 ++++
> > include/keys/trusted_tpm.h | 15 --
> > security/keys/trusted-keys/Makefile | 1 +
> > security/keys/trusted-keys/trusted_common.c | 333 +++++++++++++++++++++++++++
>
> I think trusted_core.c would be a better name (less ambiguous).
>
Okay.
> > security/keys/trusted-keys/trusted_tpm1.c | 335 +++++-----------------------
> > 5 files changed, 437 insertions(+), 292 deletions(-)
> > create mode 100644 security/keys/trusted-keys/trusted_common.c
> >
> > diff --git a/include/keys/trusted-type.h b/include/keys/trusted-type.h
> > index a94c03a..5559010 100644
> > --- a/include/keys/trusted-type.h
> > +++ b/include/keys/trusted-type.h
> > @@ -40,6 +40,51 @@ struct trusted_key_options {
> > uint32_t policyhandle;
> > };
> >
> > +struct trusted_key_ops {
> > + /*
> > + * flag to indicate if trusted key implementation supports migration
> > + * or not.
> > + */
> > + unsigned char migratable;
> > +
> > + /* trusted key init */
> > + int (*init)(void);
>
> /* Init a key. */
>
This API isn't initializing a key but rather the underlying interface
(see init_tpm_trusted()). So how about:
/* Initialize key interface */
> > +
> > + /* seal a trusted key */
> > + int (*seal)(struct trusted_key_payload *p, char *datablob);
>
> /* Seal a key. */
>
Ack.
> > +
> > + /* unseal a trusted key */
> > + int (*unseal)(struct trusted_key_payload *p, char *datablob);
>
> /* Unseal a key. */
>
Ack.
> > +
> > + /* get random trusted key */
> > + int (*get_random)(unsigned char *key, size_t key_len);
>
> /* Get a randomized key. */
>
Ack.
> > +
> > + /* trusted key cleanup */
> > + void (*cleanup)(void);
>
> Please remove this from this commit since it is not in use in the scope
> of this commit. You should instead make a separate commit just for this
> callback, which explains what it is and how it will be used in the
> follow up commits.
>
This API is pretty much relevant to TPM as well (see:
cleanup_tpm_trusted()) but I guess "cleanup()" terminology is bringing
up some confusion, so how about to call it "exit()" instead?
>
> > +};
> > +
> > extern struct key_type key_type_trusted;
> > +#if defined(CONFIG_TCG_TPM)
> > +extern struct trusted_key_ops tpm_trusted_key_ops;
> > +#endif
> > +
> > +#define TRUSTED_DEBUG 0
> > +
> > +#if TRUSTED_DEBUG
> > +static inline void dump_payload(struct trusted_key_payload *p)
> > +{
> > + pr_info("trusted_key: key_len %d\n", p->key_len);
> > + print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> > + 16, 1, p->key, p->key_len, 0);
> > + pr_info("trusted_key: bloblen %d\n", p->blob_len);
> > + print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> > + 16, 1, p->blob, p->blob_len, 0);
> > + pr_info("trusted_key: migratable %d\n", p->migratable);
> > +}
> > +#else
> > +static inline void dump_payload(struct trusted_key_payload *p)
> > +{
> > +}
> > +#endif
> >
> > #endif /* _KEYS_TRUSTED_TYPE_H */
> > diff --git a/include/keys/trusted_tpm.h b/include/keys/trusted_tpm.h
> > index a56d8e1..5753231 100644
> > --- a/include/keys/trusted_tpm.h
> > +++ b/include/keys/trusted_tpm.h
> > @@ -60,17 +60,6 @@ static inline void dump_options(struct trusted_key_options *o)
> > 16, 1, o->pcrinfo, o->pcrinfo_len, 0);
> > }
> >
> > -static inline void dump_payload(struct trusted_key_payload *p)
> > -{
> > - pr_info("trusted_key: key_len %d\n", p->key_len);
> > - print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> > - 16, 1, p->key, p->key_len, 0);
> > - pr_info("trusted_key: bloblen %d\n", p->blob_len);
> > - print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> > - 16, 1, p->blob, p->blob_len, 0);
> > - pr_info("trusted_key: migratable %d\n", p->migratable);
> > -}
> > -
> > static inline void dump_sess(struct osapsess *s)
> > {
> > print_hex_dump(KERN_INFO, "trusted-key: handle ", DUMP_PREFIX_NONE,
> > @@ -96,10 +85,6 @@ static inline void dump_options(struct trusted_key_options *o)
> > {
> > }
> >
> > -static inline void dump_payload(struct trusted_key_payload *p)
> > -{
> > -}
> > -
> > static inline void dump_sess(struct osapsess *s)
> > {
> > }
> > diff --git a/security/keys/trusted-keys/Makefile b/security/keys/trusted-keys/Makefile
> > index 7b73ceb..2b1085b 100644
> > --- a/security/keys/trusted-keys/Makefile
> > +++ b/security/keys/trusted-keys/Makefile
> > @@ -4,5 +4,6 @@
> > #
> >
> > obj-$(CONFIG_TRUSTED_KEYS) += trusted.o
> > +trusted-y += trusted_common.o
> > trusted-y += trusted_tpm1.o
> > trusted-y += trusted_tpm2.o
> > diff --git a/security/keys/trusted-keys/trusted_common.c b/security/keys/trusted-keys/trusted_common.c
> > new file mode 100644
> > index 0000000..9bfd081
> > --- /dev/null
> > +++ b/security/keys/trusted-keys/trusted_common.c
> > @@ -0,0 +1,333 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2010 IBM Corporation
> > + * Copyright (c) 2019, Linaro Limited
> > + *
> > + * Author:
> > + * David Safford <safford@us.ibm.com>
> > + * Added generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> > + *
> > + * See Documentation/security/keys/trusted-encrypted.rst
> > + */
> > +
> > +#include <keys/user-type.h>
> > +#include <keys/trusted-type.h>
> > +#include <linux/capability.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/key-type.h>
> > +#include <linux/module.h>
> > +#include <linux/parser.h>
> > +#include <linux/rcupdate.h>
> > +#include <linux/slab.h>
> > +#include <linux/string.h>
> > +#include <linux/uaccess.h>
> > +
> > +static struct trusted_key_ops *available_tk_ops[] = {
> > +#if defined(CONFIG_TCG_TPM)
> > + &tpm_trusted_key_ops,
> > +#endif
> > +};
> > +static struct trusted_key_ops *tk_ops;
> > +
> > +enum {
> > + Opt_err,
> > + Opt_new, Opt_load, Opt_update,
> > +};
> > +
> > +static const match_table_t key_tokens = {
> > + {Opt_new, "new"},
> > + {Opt_load, "load"},
> > + {Opt_update, "update"},
> > + {Opt_err, NULL}
> > +};
> > +
> > +/*
> > + * datablob_parse - parse the keyctl data and fill in the
> > + * payload structure
> > + *
> > + * On success returns 0, otherwise -EINVAL.
> > + */
> > +static int datablob_parse(char *datablob, struct trusted_key_payload *p)
> > +{
> > + substring_t args[MAX_OPT_ARGS];
> > + long keylen;
> > + int ret = -EINVAL;
> > + int key_cmd;
> > + char *c;
> > +
> > + /* main command */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + key_cmd = match_token(c, key_tokens, args);
> > + switch (key_cmd) {
> > + case Opt_new:
> > + /* first argument is key size */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + ret = kstrtol(c, 10, &keylen);
> > + if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> > + return -EINVAL;
> > + p->key_len = keylen;
> > + ret = Opt_new;
> > + break;
> > + case Opt_load:
> > + /* first argument is sealed blob */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + p->blob_len = strlen(c) / 2;
> > + if (p->blob_len > MAX_BLOB_SIZE)
> > + return -EINVAL;
> > + ret = hex2bin(p->blob, c, p->blob_len);
> > + if (ret < 0)
> > + return -EINVAL;
> > + ret = Opt_load;
> > + break;
> > + case Opt_update:
> > + ret = Opt_update;
> > + break;
> > + case Opt_err:
> > + return -EINVAL;
> > + }
> > + return ret;
> > +}
> > +
> > +static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> > +{
> > + struct trusted_key_payload *p = NULL;
> > + int ret;
> > +
> > + ret = key_payload_reserve(key, sizeof(*p));
> > + if (ret < 0)
> > + return p;
> > + p = kzalloc(sizeof(*p), GFP_KERNEL);
> > +
> > + p->migratable = tk_ops->migratable;
> > +
> > + return p;
> > +}
> > +
> > +/*
> > + * trusted_instantiate - create a new trusted key
> > + *
> > + * Unseal an existing trusted blob or, for a new key, get a
> > + * random key, then seal and create a trusted key-type key,
> > + * adding it to the specified keyring.
> > + *
> > + * On success, return 0. Otherwise return errno.
> > + */
> > +static int trusted_instantiate(struct key *key,
> > + struct key_preparsed_payload *prep)
> > +{
> > + struct trusted_key_payload *payload = NULL;
> > + size_t datalen = prep->datalen;
> > + char *datablob;
> > + int ret = 0;
> > + int key_cmd;
> > + size_t key_len;
> > +
> > + if (datalen <= 0 || datalen > 32767 || !prep->data)
> > + return -EINVAL;
> > +
> > + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > + if (!datablob)
> > + return -ENOMEM;
> > + memcpy(datablob, prep->data, datalen);
> > + datablob[datalen] = '\0';
> > +
> > + payload = trusted_payload_alloc(key);
> > + if (!payload) {
> > + ret = -ENOMEM;
> > + goto out;
> > + }
> > +
> > + key_cmd = datablob_parse(datablob, payload);
> > + if (key_cmd < 0) {
> > + ret = key_cmd;
> > + goto out;
> > + }
> > +
> > + dump_payload(payload);
> > +
> > + switch (key_cmd) {
> > + case Opt_load:
> > + ret = tk_ops->unseal(payload, datablob);
> > + dump_payload(payload);
> > + if (ret < 0)
> > + pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> > + break;
> > + case Opt_new:
> > + key_len = payload->key_len;
> > + ret = tk_ops->get_random(payload->key, key_len);
> > + if (ret != key_len) {
> > + pr_info("trusted_key: key_create failed (%d)\n", ret);
> > + goto out;
> > + }
> > +
> > + ret = tk_ops->seal(payload, datablob);
> > + if (ret < 0)
> > + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > + break;
> > + default:
> > + ret = -EINVAL;
> > + }
> > +out:
> > + kzfree(datablob);
> > + if (!ret)
> > + rcu_assign_keypointer(key, payload);
> > + else
> > + kzfree(payload);
> > + return ret;
> > +}
> > +
> > +static void trusted_rcu_free(struct rcu_head *rcu)
> > +{
> > + struct trusted_key_payload *p;
> > +
> > + p = container_of(rcu, struct trusted_key_payload, rcu);
> > + kzfree(p);
> > +}
> > +
> > +/*
> > + * trusted_update - reseal an existing key with new PCR values
> > + */
> > +static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> > +{
> > + struct trusted_key_payload *p;
> > + struct trusted_key_payload *new_p;
> > + size_t datalen = prep->datalen;
> > + char *datablob;
> > + int ret = 0;
> > +
> > + if (key_is_negative(key))
> > + return -ENOKEY;
> > + p = key->payload.data[0];
> > + if (!p->migratable)
> > + return -EPERM;
> > + if (datalen <= 0 || datalen > 32767 || !prep->data)
> > + return -EINVAL;
> > +
> > + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > + if (!datablob)
> > + return -ENOMEM;
> > +
> > + new_p = trusted_payload_alloc(key);
> > + if (!new_p) {
> > + ret = -ENOMEM;
> > + goto out;
> > + }
> > +
> > + memcpy(datablob, prep->data, datalen);
> > + datablob[datalen] = '\0';
> > + ret = datablob_parse(datablob, new_p);
> > + if (ret != Opt_update) {
> > + ret = -EINVAL;
> > + kzfree(new_p);
> > + goto out;
> > + }
> > +
> > + /* copy old key values, and reseal with new pcrs */
> > + new_p->migratable = p->migratable;
> > + new_p->key_len = p->key_len;
> > + memcpy(new_p->key, p->key, p->key_len);
> > + dump_payload(p);
> > + dump_payload(new_p);
> > +
> > + ret = tk_ops->seal(new_p, datablob);
> > + if (ret < 0) {
> > + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > + kzfree(new_p);
> > + goto out;
> > + }
> > +
> > + rcu_assign_keypointer(key, new_p);
> > + call_rcu(&p->rcu, trusted_rcu_free);
> > +out:
> > + kzfree(datablob);
> > + return ret;
> > +}
> > +
> > +/*
> > + * trusted_read - copy the sealed blob data to userspace in hex.
> > + * On success, return to userspace the trusted key datablob size.
> > + */
> > +static long trusted_read(const struct key *key, char *buffer,
> > + size_t buflen)
> > +{
> > + const struct trusted_key_payload *p;
> > + char *bufp;
> > + int i;
> > +
> > + p = dereference_key_locked(key);
> > + if (!p)
> > + return -EINVAL;
> > +
> > + if (buffer && buflen >= 2 * p->blob_len) {
> > + bufp = buffer;
> > + for (i = 0; i < p->blob_len; i++)
> > + bufp = hex_byte_pack(bufp, p->blob[i]);
> > + }
> > + return 2 * p->blob_len;
> > +}
> > +
> > +/*
> > + * trusted_destroy - clear and free the key's payload
> > + */
> > +static void trusted_destroy(struct key *key)
> > +{
> > + kzfree(key->payload.data[0]);
> > +}
> > +
> > +struct key_type key_type_trusted = {
> > + .name = "trusted",
> > + .instantiate = trusted_instantiate,
> > + .update = trusted_update,
> > + .destroy = trusted_destroy,
> > + .describe = user_describe,
> > + .read = trusted_read,
> > +};
> > +EXPORT_SYMBOL_GPL(key_type_trusted);
> > +
> > +static int __init init_trusted(void)
> > +{
> > + int i, ret = 0;
> > +
> > + for (i = 0; i < sizeof(available_tk_ops); i++) {
> > + tk_ops = available_tk_ops[i];
> > +
> > + if (!(tk_ops && tk_ops->init && tk_ops->seal &&
> > + tk_ops->unseal && tk_ops->get_random))
> > + continue;
> > +
> > + ret = tk_ops->init();
> > + if (ret) {
> > + if (tk_ops->cleanup)
> > + tk_ops->cleanup();
> > + } else {
> > + break;
> > + }
> > + }
> > +
> > + /*
> > + * encrypted_keys.ko depends on successful load of this module even if
> > + * trusted key implementation is not found.
> > + */
> > + if (ret == -ENODEV)
> > + return 0;
> > +
> > + return ret;
> > +}
> > +
> > +static void __exit cleanup_trusted(void)
> > +{
> > + if (tk_ops->cleanup)
> > + tk_ops->cleanup();
> > +}
> > +
> > +late_initcall(init_trusted);
> > +module_exit(cleanup_trusted);
> > +
> > +MODULE_LICENSE("GPL");
> > diff --git a/security/keys/trusted-keys/trusted_tpm1.c b/security/keys/trusted-keys/trusted_tpm1.c
> > index 8001ab0..32fd1ea 100644
> > --- a/security/keys/trusted-keys/trusted_tpm1.c
> > +++ b/security/keys/trusted-keys/trusted_tpm1.c
> > @@ -1,29 +1,26 @@
> > // SPDX-License-Identifier: GPL-2.0-only
> > /*
> > * Copyright (C) 2010 IBM Corporation
> > + * Copyright (c) 2019, Linaro Limited
> > *
> > * Author:
> > * David Safford <safford@us.ibm.com>
> > + * Switch to generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> > *
> > * See Documentation/security/keys/trusted-encrypted.rst
> > */
> >
> > #include <crypto/hash_info.h>
> > -#include <linux/uaccess.h>
> > -#include <linux/module.h>
> > #include <linux/init.h>
> > #include <linux/slab.h>
> > #include <linux/parser.h>
> > #include <linux/string.h>
> > #include <linux/err.h>
> > -#include <keys/user-type.h>
> > #include <keys/trusted-type.h>
> > #include <linux/key-type.h>
> > -#include <linux/rcupdate.h>
> > #include <linux/crypto.h>
> > #include <crypto/hash.h>
> > #include <crypto/sha.h>
> > -#include <linux/capability.h>
> > #include <linux/tpm.h>
> > #include <linux/tpm_command.h>
> >
> > @@ -703,7 +700,6 @@ static int key_unseal(struct trusted_key_payload *p,
> >
> > enum {
> > Opt_err,
> > - Opt_new, Opt_load, Opt_update,
> > Opt_keyhandle, Opt_keyauth, Opt_blobauth,
> > Opt_pcrinfo, Opt_pcrlock, Opt_migratable,
> > Opt_hash,
> > @@ -712,9 +708,6 @@ enum {
> > };
> >
> > static const match_table_t key_tokens = {
> > - {Opt_new, "new"},
> > - {Opt_load, "load"},
> > - {Opt_update, "update"},
> > {Opt_keyhandle, "keyhandle=%s"},
> > {Opt_keyauth, "keyauth=%s"},
> > {Opt_blobauth, "blobauth=%s"},
> > @@ -841,71 +834,6 @@ static int getoptions(char *c, struct trusted_key_payload *pay,
> > return 0;
> > }
> >
> > -/*
> > - * datablob_parse - parse the keyctl data and fill in the
> > - * payload and options structures
> > - *
> > - * On success returns 0, otherwise -EINVAL.
> > - */
> > -static int datablob_parse(char *datablob, struct trusted_key_payload *p,
> > - struct trusted_key_options *o)
> > -{
> > - substring_t args[MAX_OPT_ARGS];
> > - long keylen;
> > - int ret = -EINVAL;
> > - int key_cmd;
> > - char *c;
> > -
> > - /* main command */
> > - c = strsep(&datablob, " \t");
> > - if (!c)
> > - return -EINVAL;
> > - key_cmd = match_token(c, key_tokens, args);
> > - switch (key_cmd) {
> > - case Opt_new:
> > - /* first argument is key size */
> > - c = strsep(&datablob, " \t");
> > - if (!c)
> > - return -EINVAL;
> > - ret = kstrtol(c, 10, &keylen);
> > - if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> > - return -EINVAL;
> > - p->key_len = keylen;
> > - ret = getoptions(datablob, p, o);
> > - if (ret < 0)
> > - return ret;
> > - ret = Opt_new;
> > - break;
> > - case Opt_load:
> > - /* first argument is sealed blob */
> > - c = strsep(&datablob, " \t");
> > - if (!c)
> > - return -EINVAL;
> > - p->blob_len = strlen(c) / 2;
> > - if (p->blob_len > MAX_BLOB_SIZE)
> > - return -EINVAL;
> > - ret = hex2bin(p->blob, c, p->blob_len);
> > - if (ret < 0)
> > - return -EINVAL;
> > - ret = getoptions(datablob, p, o);
> > - if (ret < 0)
> > - return ret;
> > - ret = Opt_load;
> > - break;
> > - case Opt_update:
> > - /* all arguments are options */
> > - ret = getoptions(datablob, p, o);
> > - if (ret < 0)
> > - return ret;
> > - ret = Opt_update;
> > - break;
> > - case Opt_err:
> > - return -EINVAL;
> > - break;
> > - }
> > - return ret;
> > -}
> > -
> > static struct trusted_key_options *trusted_options_alloc(void)
> > {
> > struct trusted_key_options *options;
> > @@ -926,248 +854,99 @@ static struct trusted_key_options *trusted_options_alloc(void)
> > return options;
> > }
> >
> > -static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> > +static int tpm_tk_seal(struct trusted_key_payload *p, char *datablob)
> > {
> > - struct trusted_key_payload *p = NULL;
> > - int ret;
> > -
> > - ret = key_payload_reserve(key, sizeof *p);
> > - if (ret < 0)
> > - return p;
> > - p = kzalloc(sizeof *p, GFP_KERNEL);
> > - if (p)
> > - p->migratable = 1; /* migratable by default */
> > - return p;
> > -}
> > -
> > -/*
> > - * trusted_instantiate - create a new trusted key
> > - *
> > - * Unseal an existing trusted blob or, for a new key, get a
> > - * random key, then seal and create a trusted key-type key,
> > - * adding it to the specified keyring.
> > - *
> > - * On success, return 0. Otherwise return errno.
> > - */
> > -static int trusted_instantiate(struct key *key,
> > - struct key_preparsed_payload *prep)
> > -{
> > - struct trusted_key_payload *payload = NULL;
> > struct trusted_key_options *options = NULL;
> > - size_t datalen = prep->datalen;
> > - char *datablob;
> > int ret = 0;
> > - int key_cmd;
> > - size_t key_len;
> > int tpm2;
> >
> > tpm2 = tpm_is_tpm2(chip);
> > if (tpm2 < 0)
> > return tpm2;
> >
> > - if (datalen <= 0 || datalen > 32767 || !prep->data)
> > - return -EINVAL;
> > -
> > - datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > - if (!datablob)
> > - return -ENOMEM;
> > - memcpy(datablob, prep->data, datalen);
> > - datablob[datalen] = '\0';
> > -
> > options = trusted_options_alloc();
> > - if (!options) {
> > - ret = -ENOMEM;
> > - goto out;
> > - }
> > - payload = trusted_payload_alloc(key);
> > - if (!payload) {
> > - ret = -ENOMEM;
> > - goto out;
> > - }
> > + if (!options)
> > + return -ENOMEM;
> >
> > - key_cmd = datablob_parse(datablob, payload, options);
> > - if (key_cmd < 0) {
> > - ret = key_cmd;
> > + ret = getoptions(datablob, p, options);
> > + if (ret < 0)
> > goto out;
> > - }
> > + dump_options(options);
> >
> > if (!options->keyhandle) {
> > ret = -EINVAL;
> > goto out;
> > }
> >
> > - dump_payload(payload);
> > - dump_options(options);
> > + if (tpm2)
> > + ret = tpm2_seal_trusted(chip, p, options);
> > + else
> > + ret = key_seal(p, options);
> > + if (ret < 0) {
> > + pr_info("tpm_trusted_key: key_seal failed (%d)\n", ret);
> > + goto out;
> > + }
> >
> > - switch (key_cmd) {
> > - case Opt_load:
> > - if (tpm2)
> > - ret = tpm2_unseal_trusted(chip, payload, options);
> > - else
> > - ret = key_unseal(payload, options);
> > - dump_payload(payload);
> > - dump_options(options);
> > - if (ret < 0)
> > - pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> > - break;
> > - case Opt_new:
> > - key_len = payload->key_len;
> > - ret = tpm_get_random(chip, payload->key, key_len);
> > - if (ret != key_len) {
> > - pr_info("trusted_key: key_create failed (%d)\n", ret);
> > + if (options->pcrlock) {
> > + ret = pcrlock(options->pcrlock);
> > + if (ret < 0) {
> > + pr_info("tpm_trusted_key: pcrlock failed (%d)\n", ret);
> > goto out;
> > }
> > - if (tpm2)
> > - ret = tpm2_seal_trusted(chip, payload, options);
> > - else
> > - ret = key_seal(payload, options);
> > - if (ret < 0)
> > - pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > - break;
> > - default:
> > - ret = -EINVAL;
> > - goto out;
> > }
> > - if (!ret && options->pcrlock)
> > - ret = pcrlock(options->pcrlock);
> > out:
> > - kzfree(datablob);
> > kzfree(options);
> > - if (!ret)
> > - rcu_assign_keypointer(key, payload);
> > - else
> > - kzfree(payload);
> > return ret;
> > }
> >
> > -static void trusted_rcu_free(struct rcu_head *rcu)
> > +static int tpm_tk_unseal(struct trusted_key_payload *p, char *datablob)
> > {
> > - struct trusted_key_payload *p;
> > -
> > - p = container_of(rcu, struct trusted_key_payload, rcu);
> > - kzfree(p);
> > -}
> > -
> > -/*
> > - * trusted_update - reseal an existing key with new PCR values
> > - */
> > -static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> > -{
> > - struct trusted_key_payload *p;
> > - struct trusted_key_payload *new_p;
> > - struct trusted_key_options *new_o;
> > - size_t datalen = prep->datalen;
> > - char *datablob;
> > + struct trusted_key_options *options = NULL;
> > int ret = 0;
> > + int tpm2;
> >
> > - if (key_is_negative(key))
> > - return -ENOKEY;
> > - p = key->payload.data[0];
> > - if (!p->migratable)
> > - return -EPERM;
> > - if (datalen <= 0 || datalen > 32767 || !prep->data)
> > - return -EINVAL;
> > + tpm2 = tpm_is_tpm2(chip);
> > + if (tpm2 < 0)
> > + return tpm2;
> >
> > - datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > - if (!datablob)
> > + options = trusted_options_alloc();
> > + if (!options)
> > return -ENOMEM;
> > - new_o = trusted_options_alloc();
> > - if (!new_o) {
> > - ret = -ENOMEM;
> > - goto out;
> > - }
> > - new_p = trusted_payload_alloc(key);
> > - if (!new_p) {
> > - ret = -ENOMEM;
> > - goto out;
> > - }
> >
> > - memcpy(datablob, prep->data, datalen);
> > - datablob[datalen] = '\0';
> > - ret = datablob_parse(datablob, new_p, new_o);
> > - if (ret != Opt_update) {
> > - ret = -EINVAL;
> > - kzfree(new_p);
> > + ret = getoptions(datablob, p, options);
> > + if (ret < 0)
> > goto out;
> > - }
> > + dump_options(options);
> >
> > - if (!new_o->keyhandle) {
> > + if (!options->keyhandle) {
> > ret = -EINVAL;
> > - kzfree(new_p);
> > goto out;
> > }
> >
> > - /* copy old key values, and reseal with new pcrs */
> > - new_p->migratable = p->migratable;
> > - new_p->key_len = p->key_len;
> > - memcpy(new_p->key, p->key, p->key_len);
> > - dump_payload(p);
> > - dump_payload(new_p);
> > + if (tpm2)
> > + ret = tpm2_unseal_trusted(chip, p, options);
> > + else
> > + ret = key_unseal(p, options);
> > + if (ret < 0)
> > + pr_info("tpm_trusted_key: key_unseal failed (%d)\n", ret);
> >
> > - ret = key_seal(new_p, new_o);
> > - if (ret < 0) {
> > - pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > - kzfree(new_p);
> > - goto out;
> > - }
> > - if (new_o->pcrlock) {
> > - ret = pcrlock(new_o->pcrlock);
> > + if (options->pcrlock) {
> > + ret = pcrlock(options->pcrlock);
> > if (ret < 0) {
> > - pr_info("trusted_key: pcrlock failed (%d)\n", ret);
> > - kzfree(new_p);
> > + pr_info("tpm_trusted_key: pcrlock failed (%d)\n", ret);
> > goto out;
> > }
> > }
> > - rcu_assign_keypointer(key, new_p);
> > - call_rcu(&p->rcu, trusted_rcu_free);
> > out:
> > - kzfree(datablob);
> > - kzfree(new_o);
> > + kzfree(options);
> > return ret;
> > }
> >
> > -/*
> > - * trusted_read - copy the sealed blob data to userspace in hex.
> > - * On success, return to userspace the trusted key datablob size.
> > - */
> > -static long trusted_read(const struct key *key, char *buffer,
> > - size_t buflen)
> > -{
> > - const struct trusted_key_payload *p;
> > - char *bufp;
> > - int i;
> > -
> > - p = dereference_key_locked(key);
> > - if (!p)
> > - return -EINVAL;
> > -
> > - if (buffer && buflen >= 2 * p->blob_len) {
> > - bufp = buffer;
> > - for (i = 0; i < p->blob_len; i++)
> > - bufp = hex_byte_pack(bufp, p->blob[i]);
> > - }
> > - return 2 * p->blob_len;
> > -}
> > -
> > -/*
> > - * trusted_destroy - clear and free the key's payload
> > - */
> > -static void trusted_destroy(struct key *key)
> > +int tpm_tk_get_random(unsigned char *key, size_t key_len)
> > {
> > - kzfree(key->payload.data[0]);
> > + return tpm_get_random(chip, key, key_len);
> > }
> >
> > -struct key_type key_type_trusted = {
> > - .name = "trusted",
> > - .instantiate = trusted_instantiate,
> > - .update = trusted_update,
> > - .destroy = trusted_destroy,
> > - .describe = user_describe,
> > - .read = trusted_read,
> > -};
> > -
> > -EXPORT_SYMBOL_GPL(key_type_trusted);
> > -
> > static void trusted_shash_release(void)
> > {
> > if (hashalg)
> > @@ -1182,14 +961,14 @@ static int __init trusted_shash_alloc(void)
> >
> > hmacalg = crypto_alloc_shash(hmac_alg, 0, 0);
> > if (IS_ERR(hmacalg)) {
> > - pr_info("trusted_key: could not allocate crypto %s\n",
> > + pr_info("tpm_trusted_key: could not allocate crypto %s\n",
> > hmac_alg);
> > return PTR_ERR(hmacalg);
> > }
> >
> > hashalg = crypto_alloc_shash(hash_alg, 0, 0);
> > if (IS_ERR(hashalg)) {
> > - pr_info("trusted_key: could not allocate crypto %s\n",
> > + pr_info("tpm_trusted_key: could not allocate crypto %s\n",
> > hash_alg);
> > ret = PTR_ERR(hashalg);
> > goto hashalg_fail;
> > @@ -1217,16 +996,13 @@ static int __init init_digests(void)
> > return 0;
> > }
> >
> > -static int __init init_trusted(void)
> > +static int __init init_tpm_trusted(void)
> > {
> > int ret;
> >
> > - /* encrypted_keys.ko depends on successful load of this module even if
> > - * TPM is not used.
> > - */
> > chip = tpm_default_chip();
> > if (!chip)
> > - return 0;
> > + return -ENODEV;
> >
> > ret = init_digests();
> > if (ret < 0)
> > @@ -1247,7 +1023,7 @@ static int __init init_trusted(void)
> > return ret;
> > }
> >
> > -static void __exit cleanup_trusted(void)
> > +static void __exit cleanup_tpm_trusted(void)
> > {
> > if (chip) {
> > put_device(&chip->dev);
> > @@ -1257,7 +1033,12 @@ static void __exit cleanup_trusted(void)
> > }
> > }
> >
> > -late_initcall(init_trusted);
> > -module_exit(cleanup_trusted);
> > -
> > -MODULE_LICENSE("GPL");
> > +struct trusted_key_ops tpm_trusted_key_ops = {
> > + .migratable = 1, /* migratable by default */
> > + .init = init_tpm_trusted,
> > + .seal = tpm_tk_seal,
> > + .unseal = tpm_tk_unseal,
> > + .get_random = tpm_tk_get_random,
> > + .cleanup = cleanup_tpm_trusted,
> > +};
> > +EXPORT_SYMBOL_GPL(tpm_trusted_key_ops);
>
> Everywhere: do not use 'tk'. Use 'trusted' in those places. We do not
> want a new acronym.
Okay.
-Sumit
>
> /Jarkko
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^ permalink raw reply
* Re: [PATCH 0/5 v2] KASan for ARM
From: Linus Walleij @ 2020-06-01 8:55 UTC (permalink / raw)
To: Florian Fainelli
Cc: Abbott Liu, Andrey Ryabinin, Russell King, Linux ARM,
Ard Biesheuvel
In-Reply-To: <107be5e0-3acd-1bf5-d1dd-e27f796e87d9@gmail.com>
On Mon, Jun 1, 2020 at 6:00 AM Florian Fainelli <f.fainelli@gmail.com> wrote:
> Since this patch series has had many people trying to push it forward,
> how about we try to get it merged as-is (minus bugs, see below) with the
> caveat that TTRB0-less CPUs are not going to be supported for now and
> later on, this gets lifted if we find a champion who can get that working?
Oh I fixed most issues in the v9 patch set, we ironed out the actual problem
with ARMv4 and ARMv5 with some help from Ard, Catalin and then Russell
suggested how to also improve the way we get taskinfo from sp in the
assembly.
> I tested this on an ARMv8 system (Brahma-B53 CPU) and an ARMv7-A system
> (Brahma-B15 CPU) with and without ARM_LPAE enabled and neither were able
> to boot unless KASAN was turned off (outline instrumentation), I don't
> even get to the point where earlyprintk is giving me anything which is
> odd. Have not looked at the differences between this version and the one
> I had sent before and have not hooked a debugger to find out where we
> are hung.
>
> If you have a Raspberry Pi 4 you could use it as a test system for ARM_LPAE.
Did you try to use the v9 patch set on top of v5.7:
https://lore.kernel.org/linux-arm-kernel/20200515114028.135674-1-linus.walleij@linaro.org/
I need to rebase this on v5.8-rc1 once it is out but it is working on all my
targets now, there is also this git branch:
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=kasan
Yours,
Linus Walleij
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^ permalink raw reply
* Re: [PATCH v4 11/26] arm64: mte: Add PROT_MTE support to mmap() and mprotect()
From: Dave Martin @ 2020-06-01 8:55 UTC (permalink / raw)
To: Catalin Marinas
Cc: linux-arch, Vincenzo Frascino, Will Deacon, Szabolcs Nagy,
Andrey Konovalov, Kevin Brodsky, linux-mm, Linux ARM, nd,
Peter Collingbourne, Evgenii Stepanov
In-Reply-To: <20200528163412.GC2961@gaia>
On Thu, May 28, 2020 at 05:34:13PM +0100, Catalin Marinas wrote:
> On Thu, May 28, 2020 at 12:05:09PM +0100, Szabolcs Nagy wrote:
> > The 05/28/2020 10:14, Catalin Marinas wrote:
> > > On Wed, May 27, 2020 at 11:57:39AM -0700, Peter Collingbourne wrote:
[...]
Just jumping in on this point:
> > > > Should the userspace stack always be mapped as if with PROT_MTE if the
> > > > hardware supports it? Such a change would be invisible to non-MTE
> > > > aware userspace since it would already need to opt in to tag checking
> > > > via prctl. This would let userspace avoid a complex stack
> > > > initialization sequence when running with stack tagging enabled on the
> > > > main thread.
> > >
> > > I don't think the stack initialisation is that difficult. On program
> > > startup (can be the dynamic loader). Something like (untested):
> > >
> > > register unsigned long stack asm ("sp");
> > > unsigned long page_sz = sysconf(_SC_PAGESIZE);
> > >
> > > mprotect((void *)(stack & ~(page_sz - 1)), page_sz,
> > > PROT_READ | PROT_WRITE | PROT_MTE | PROT_GROWSDOWN);
> > >
> > > (the essential part it PROT_GROWSDOWN so that you don't have to specify
> > > a stack lower limit)
> >
> > does this work even if the currently mapped stack is more than page_sz?
> > determining the mapped main stack area is i think non-trivial to do in
> > userspace (requires parsing /proc/self/maps or similar).
>
> Because of PROT_GROWSDOWN, the kernel adjusts the start of the range
> down automatically. It is potentially problematic if the top of the
> stack is more than a page away and you want the whole stack coloured. I
> haven't run a test but my reading of the kernel code is that the stack
> vma would be split in this scenario, so the range beyond sp+page_sz
> won't have PROT_MTE set.
>
> My assumption is that if you do this during program start, the stack is
> smaller than a page. Alternatively, could we use argv or envp to
> determine the top of the user stack (the bottom is taken care of by the
> kernel)?
I don't think you can easily know when the stack ends, but perhaps it
doesn't matter.
From memory, the initial stack looks like:
argv/env strings
AT_NULL
auxv
NULL
env
NULL
argv
argc <--- sp
If we don't care about tagging the strings correctly, we could step to
the end of auxv and tag down from there.
If we do care about tagging the strings, there's probably no good way
to find the end of the string area, other than looking up sp in
/proc/self/maps. I'm not sure we should trust all past and future
kernels to spit out the strings in a predictable order.
Assuming that the last env string has the highest address does not
sounds like a good idea to me. It would be easy for someone to break
that assumption later without realising.
If we're concerned about this, and reading /proc/self/auxv is deemed
unacceptable (likely: some binaries need to work before /proc is
mounted) then we could perhaps add a new auxv entry to report the stack
base address to the user startup code.
I don't think it matters if all this is "hard" for userspace: only the
C library / runtime should be doing this. After libc startup, it's
generally too late to do this kind of thing safely.
[...]
Cheers
---Dave
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^ permalink raw reply
* Re: [PATCH] pinctrl: pxa: pxa2xx: Remove 'pxa2xx_pinctrl_exit()' which is unused and broken
From: Robert Jarzmik @ 2020-06-01 8:58 UTC (permalink / raw)
To: Christophe JAILLET
Cc: linus.walleij, kernel-janitors, linux-kernel, haojian.zhuang,
linux-gpio, daniel, linux-arm-kernel
In-Reply-To: <20200531073716.593343-1-christophe.jaillet@wanadoo.fr>
Christophe JAILLET <christophe.jaillet@wanadoo.fr> writes:
> Commit 6d33ee7a0534 ("pinctrl: pxa: Use devm_pinctrl_register() for pinctrl registration")
> has turned a 'pinctrl_register()' into 'devm_pinctrl_register()' in
> 'pxa2xx_pinctrl_init()'.
> However, the corresponding 'pinctrl_unregister()' call in
> 'pxa2xx_pinctrl_exit()' has not been removed.
>
> This is not an issue, because 'pxa2xx_pinctrl_exit()' is unused.
> Remove it now to avoid some wondering in the future and save a few LoC.
>
> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Would be even a better patch with a :
Fixes: 6d33ee7a0534 ("pinctrl: pxa: Use devm_pinctrl_register() for pinctrl registration")
Cheers.
--
Robert
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^ permalink raw reply
* Re: [PATCH v9 13/19] mtd: spi-nor: sfdp: do not make invalid quad enable fatal
From: Pratyush Yadav @ 2020-06-01 8:58 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: alexandre.belloni, masonccyang, vigneshr, richard, nsekhar,
boris.brezillon, michal.simek, Ludovic.Desroches, broonie,
linux-mtd, linux-arm-kernel, miquel.raynal, matthias.bgg,
linux-mediatek, linux-spi, linux-kernel
In-Reply-To: <2267830.vuSd8QnXzO@192.168.0.120>
Hi Tudor,
On 30/05/20 06:42PM, Tudor.Ambarus@microchip.com wrote:
> On Monday, May 25, 2020 12:15:38 PM EEST Pratyush Yadav wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> > The Micron MT35XU512ABA flash does not support the quad enable bit. But
> > instead of programming the Quad Enable Require field to 000b ("Device
> > does not have a QE bit"), it is programmed to 111b ("Reserved").
> >
> > While this is technically incorrect, it is not reason enough to abort
> > BFPT parsing. Instead, continue BFPT parsing assuming there is no quad
> > enable bit present.
> >
> > Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
> > ---
> > drivers/mtd/spi-nor/sfdp.c | 8 +++-----
> > 1 file changed, 3 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> > index 052cabb52df9..9fd3d8d9a127 100644
> > --- a/drivers/mtd/spi-nor/sfdp.c
> > +++ b/drivers/mtd/spi-nor/sfdp.c
> > @@ -576,10 +576,6 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> >
> > /* Quad Enable Requirements. */
> > switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
> > - case BFPT_DWORD15_QER_NONE:
> > - params->quad_enable = NULL;
> > - break;
> > -
> > case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
> > /*
> > * Writing only one byte to the Status Register has the
> > @@ -616,8 +612,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> > params->quad_enable = spi_nor_sr2_bit1_quad_enable;
> > break;
> >
> > + case BFPT_DWORD15_QER_NONE:
> > default:
> > - return -EINVAL;
> > + params->quad_enable = NULL;
> > + break;
>
> I would just add a dev_dbg message and break the switch.
> dev_dbg(nor->dev, "BFPT QER reserved value used.\n");
> break;
>
> You will then have to set params->quad_enable = NULL; in a post_bfpt hook.
Ok. Will re-roll.
BTW, are you planning to pick up the xSPI/8D support for 5.8? It has
been outstanding for quite some time now and it would be great if it can
make it through this merge window.
--
Regards,
Pratyush Yadav
Texas Instruments India
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^ permalink raw reply
* Re: [PATCH v4 1/4] KEYS: trusted: Add generic trusted keys framework
From: Sumit Garg @ 2020-06-01 9:11 UTC (permalink / raw)
To: Jarkko Sakkinen
Cc: tee-dev @ lists . linaro . org, Daniel Thompson, op-tee,
Jonathan Corbet, James Bottomley, Janne Karhunen,
Linux Doc Mailing List, James Morris, Mimi Zohar,
Linux Kernel Mailing List, dhowells, linux-security-module,
open list:ASYMMETRIC KEYS, Markus Wamser, Casey Schaufler,
linux-integrity, Jens Wiklander, linux-arm-kernel,
Serge E. Hallyn
In-Reply-To: <20200601021132.GA796225@linux.intel.com>
On Mon, 1 Jun 2020 at 07:41, Jarkko Sakkinen
<jarkko.sakkinen@linux.intel.com> wrote:
>
> On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> > Current trusted keys framework is tightly coupled to use TPM device as
> > an underlying implementation which makes it difficult for implementations
> > like Trusted Execution Environment (TEE) etc. to provide trusked keys
> > support in case platform doesn't posses a TPM device.
> >
> > So this patch tries to add generic trusted keys framework where underlying
> > implemtations like TPM, TEE etc. could be easily plugged-in.
> >
> > Suggested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
> > Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> > ---
> > include/keys/trusted-type.h | 45 ++++
> > include/keys/trusted_tpm.h | 15 --
> > security/keys/trusted-keys/Makefile | 1 +
> > security/keys/trusted-keys/trusted_common.c | 333 +++++++++++++++++++++++++++
> > security/keys/trusted-keys/trusted_tpm1.c | 335 +++++-----------------------
> > 5 files changed, 437 insertions(+), 292 deletions(-)
> > create mode 100644 security/keys/trusted-keys/trusted_common.c
> >
> > diff --git a/include/keys/trusted-type.h b/include/keys/trusted-type.h
> > index a94c03a..5559010 100644
> > --- a/include/keys/trusted-type.h
> > +++ b/include/keys/trusted-type.h
> > @@ -40,6 +40,51 @@ struct trusted_key_options {
> > uint32_t policyhandle;
> > };
> >
> > +struct trusted_key_ops {
> > + /*
> > + * flag to indicate if trusted key implementation supports migration
> > + * or not.
> > + */
> > + unsigned char migratable;
> > +
> > + /* trusted key init */
> > + int (*init)(void);
> > +
> > + /* seal a trusted key */
> > + int (*seal)(struct trusted_key_payload *p, char *datablob);
> > +
> > + /* unseal a trusted key */
> > + int (*unseal)(struct trusted_key_payload *p, char *datablob);
> > +
> > + /* get random trusted key */
> > + int (*get_random)(unsigned char *key, size_t key_len);
> > +
> > + /* trusted key cleanup */
> > + void (*cleanup)(void);
> > +};
> > +
> > extern struct key_type key_type_trusted;
> > +#if defined(CONFIG_TCG_TPM)
> > +extern struct trusted_key_ops tpm_trusted_key_ops;
> > +#endif
> > +
> > +#define TRUSTED_DEBUG 0
> > +
> > +#if TRUSTED_DEBUG
> > +static inline void dump_payload(struct trusted_key_payload *p)
> > +{
> > + pr_info("trusted_key: key_len %d\n", p->key_len);
> > + print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> > + 16, 1, p->key, p->key_len, 0);
> > + pr_info("trusted_key: bloblen %d\n", p->blob_len);
> > + print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> > + 16, 1, p->blob, p->blob_len, 0);
> > + pr_info("trusted_key: migratable %d\n", p->migratable);
> > +}
> > +#else
> > +static inline void dump_payload(struct trusted_key_payload *p)
> > +{
> > +}
> > +#endif
> >
> > #endif /* _KEYS_TRUSTED_TYPE_H */
> > diff --git a/include/keys/trusted_tpm.h b/include/keys/trusted_tpm.h
> > index a56d8e1..5753231 100644
> > --- a/include/keys/trusted_tpm.h
> > +++ b/include/keys/trusted_tpm.h
> > @@ -60,17 +60,6 @@ static inline void dump_options(struct trusted_key_options *o)
> > 16, 1, o->pcrinfo, o->pcrinfo_len, 0);
> > }
> >
> > -static inline void dump_payload(struct trusted_key_payload *p)
> > -{
> > - pr_info("trusted_key: key_len %d\n", p->key_len);
> > - print_hex_dump(KERN_INFO, "key ", DUMP_PREFIX_NONE,
> > - 16, 1, p->key, p->key_len, 0);
> > - pr_info("trusted_key: bloblen %d\n", p->blob_len);
> > - print_hex_dump(KERN_INFO, "blob ", DUMP_PREFIX_NONE,
> > - 16, 1, p->blob, p->blob_len, 0);
> > - pr_info("trusted_key: migratable %d\n", p->migratable);
> > -}
> > -
> > static inline void dump_sess(struct osapsess *s)
> > {
> > print_hex_dump(KERN_INFO, "trusted-key: handle ", DUMP_PREFIX_NONE,
> > @@ -96,10 +85,6 @@ static inline void dump_options(struct trusted_key_options *o)
> > {
> > }
> >
> > -static inline void dump_payload(struct trusted_key_payload *p)
> > -{
> > -}
> > -
> > static inline void dump_sess(struct osapsess *s)
> > {
> > }
> > diff --git a/security/keys/trusted-keys/Makefile b/security/keys/trusted-keys/Makefile
> > index 7b73ceb..2b1085b 100644
> > --- a/security/keys/trusted-keys/Makefile
> > +++ b/security/keys/trusted-keys/Makefile
> > @@ -4,5 +4,6 @@
> > #
> >
> > obj-$(CONFIG_TRUSTED_KEYS) += trusted.o
> > +trusted-y += trusted_common.o
> > trusted-y += trusted_tpm1.o
> > trusted-y += trusted_tpm2.o
> > diff --git a/security/keys/trusted-keys/trusted_common.c b/security/keys/trusted-keys/trusted_common.c
> > new file mode 100644
> > index 0000000..9bfd081
> > --- /dev/null
> > +++ b/security/keys/trusted-keys/trusted_common.c
> > @@ -0,0 +1,333 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2010 IBM Corporation
> > + * Copyright (c) 2019, Linaro Limited
> > + *
> > + * Author:
> > + * David Safford <safford@us.ibm.com>
> > + * Added generic trusted key framework: Sumit Garg <sumit.garg@linaro.org>
> > + *
> > + * See Documentation/security/keys/trusted-encrypted.rst
> > + */
> > +
> > +#include <keys/user-type.h>
> > +#include <keys/trusted-type.h>
> > +#include <linux/capability.h>
> > +#include <linux/err.h>
> > +#include <linux/init.h>
> > +#include <linux/key-type.h>
> > +#include <linux/module.h>
> > +#include <linux/parser.h>
> > +#include <linux/rcupdate.h>
> > +#include <linux/slab.h>
> > +#include <linux/string.h>
> > +#include <linux/uaccess.h>
> > +
> > +static struct trusted_key_ops *available_tk_ops[] = {
> > +#if defined(CONFIG_TCG_TPM)
> > + &tpm_trusted_key_ops,
> > +#endif
> > +};
>
> This, I think is wrong. You should have a compile time flag for TPM e.g.
> CONFIG_TRUSTED_TPM, not this dynamic mess.
>
The whole idea to have it dynamic was to have a common trusted keys
module which could support both TPM and TEE implementation depending
on hardware. I guess it may be useful in scenarios where a particular
hardware supports a TPM chip while other doesn't but both need to run
a common kernel image.
> Please make the whole choice compile time, not run-time.
>
> > +static struct trusted_key_ops *tk_ops;
> > +
> > +enum {
> > + Opt_err,
> > + Opt_new, Opt_load, Opt_update,
> > +};
> > +
> > +static const match_table_t key_tokens = {
> > + {Opt_new, "new"},
> > + {Opt_load, "load"},
> > + {Opt_update, "update"},
> > + {Opt_err, NULL}
> > +};
> > +
> > +/*
> > + * datablob_parse - parse the keyctl data and fill in the
> > + * payload structure
> > + *
> > + * On success returns 0, otherwise -EINVAL.
> > + */
> > +static int datablob_parse(char *datablob, struct trusted_key_payload *p)
> > +{
> > + substring_t args[MAX_OPT_ARGS];
> > + long keylen;
> > + int ret = -EINVAL;
> > + int key_cmd;
> > + char *c;
> > +
> > + /* main command */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + key_cmd = match_token(c, key_tokens, args);
> > + switch (key_cmd) {
> > + case Opt_new:
> > + /* first argument is key size */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + ret = kstrtol(c, 10, &keylen);
> > + if (ret < 0 || keylen < MIN_KEY_SIZE || keylen > MAX_KEY_SIZE)
> > + return -EINVAL;
> > + p->key_len = keylen;
> > + ret = Opt_new;
> > + break;
> > + case Opt_load:
> > + /* first argument is sealed blob */
> > + c = strsep(&datablob, " \t");
> > + if (!c)
> > + return -EINVAL;
> > + p->blob_len = strlen(c) / 2;
> > + if (p->blob_len > MAX_BLOB_SIZE)
> > + return -EINVAL;
> > + ret = hex2bin(p->blob, c, p->blob_len);
> > + if (ret < 0)
> > + return -EINVAL;
> > + ret = Opt_load;
> > + break;
> > + case Opt_update:
> > + ret = Opt_update;
> > + break;
> > + case Opt_err:
> > + return -EINVAL;
> > + }
> > + return ret;
> > +}
> > +
> > +static struct trusted_key_payload *trusted_payload_alloc(struct key *key)
> > +{
> > + struct trusted_key_payload *p = NULL;
> > + int ret;
> > +
> > + ret = key_payload_reserve(key, sizeof(*p));
> > + if (ret < 0)
> > + return p;
> > + p = kzalloc(sizeof(*p), GFP_KERNEL);
> > +
> > + p->migratable = tk_ops->migratable;
> > +
> > + return p;
> > +}
> > +
> > +/*
> > + * trusted_instantiate - create a new trusted key
> > + *
> > + * Unseal an existing trusted blob or, for a new key, get a
> > + * random key, then seal and create a trusted key-type key,
> > + * adding it to the specified keyring.
> > + *
> > + * On success, return 0. Otherwise return errno.
> > + */
> > +static int trusted_instantiate(struct key *key,
> > + struct key_preparsed_payload *prep)
> > +{
> > + struct trusted_key_payload *payload = NULL;
> > + size_t datalen = prep->datalen;
> > + char *datablob;
> > + int ret = 0;
> > + int key_cmd;
> > + size_t key_len;
> > +
> > + if (datalen <= 0 || datalen > 32767 || !prep->data)
> > + return -EINVAL;
> > +
> > + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > + if (!datablob)
> > + return -ENOMEM;
> > + memcpy(datablob, prep->data, datalen);
> > + datablob[datalen] = '\0';
> > +
> > + payload = trusted_payload_alloc(key);
> > + if (!payload) {
> > + ret = -ENOMEM;
> > + goto out;
> > + }
> > +
> > + key_cmd = datablob_parse(datablob, payload);
> > + if (key_cmd < 0) {
> > + ret = key_cmd;
> > + goto out;
> > + }
> > +
> > + dump_payload(payload);
> > +
> > + switch (key_cmd) {
> > + case Opt_load:
> > + ret = tk_ops->unseal(payload, datablob);
> > + dump_payload(payload);
> > + if (ret < 0)
> > + pr_info("trusted_key: key_unseal failed (%d)\n", ret);
> > + break;
> > + case Opt_new:
> > + key_len = payload->key_len;
> > + ret = tk_ops->get_random(payload->key, key_len);
> > + if (ret != key_len) {
> > + pr_info("trusted_key: key_create failed (%d)\n", ret);
> > + goto out;
> > + }
> > +
> > + ret = tk_ops->seal(payload, datablob);
> > + if (ret < 0)
> > + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > + break;
> > + default:
> > + ret = -EINVAL;
> > + }
> > +out:
> > + kzfree(datablob);
> > + if (!ret)
> > + rcu_assign_keypointer(key, payload);
> > + else
> > + kzfree(payload);
> > + return ret;
> > +}
> > +
> > +static void trusted_rcu_free(struct rcu_head *rcu)
> > +{
> > + struct trusted_key_payload *p;
> > +
> > + p = container_of(rcu, struct trusted_key_payload, rcu);
> > + kzfree(p);
> > +}
> > +
> > +/*
> > + * trusted_update - reseal an existing key with new PCR values
> > + */
> > +static int trusted_update(struct key *key, struct key_preparsed_payload *prep)
> > +{
> > + struct trusted_key_payload *p;
> > + struct trusted_key_payload *new_p;
> > + size_t datalen = prep->datalen;
> > + char *datablob;
> > + int ret = 0;
> > +
> > + if (key_is_negative(key))
> > + return -ENOKEY;
> > + p = key->payload.data[0];
> > + if (!p->migratable)
> > + return -EPERM;
> > + if (datalen <= 0 || datalen > 32767 || !prep->data)
> > + return -EINVAL;
> > +
> > + datablob = kmalloc(datalen + 1, GFP_KERNEL);
> > + if (!datablob)
> > + return -ENOMEM;
> > +
> > + new_p = trusted_payload_alloc(key);
> > + if (!new_p) {
> > + ret = -ENOMEM;
> > + goto out;
> > + }
> > +
> > + memcpy(datablob, prep->data, datalen);
> > + datablob[datalen] = '\0';
> > + ret = datablob_parse(datablob, new_p);
> > + if (ret != Opt_update) {
> > + ret = -EINVAL;
> > + kzfree(new_p);
> > + goto out;
> > + }
> > +
> > + /* copy old key values, and reseal with new pcrs */
> > + new_p->migratable = p->migratable;
> > + new_p->key_len = p->key_len;
> > + memcpy(new_p->key, p->key, p->key_len);
> > + dump_payload(p);
> > + dump_payload(new_p);
> > +
> > + ret = tk_ops->seal(new_p, datablob);
> > + if (ret < 0) {
> > + pr_info("trusted_key: key_seal failed (%d)\n", ret);
> > + kzfree(new_p);
> > + goto out;
> > + }
> > +
> > + rcu_assign_keypointer(key, new_p);
> > + call_rcu(&p->rcu, trusted_rcu_free);
> > +out:
> > + kzfree(datablob);
> > + return ret;
> > +}
> > +
> > +/*
> > + * trusted_read - copy the sealed blob data to userspace in hex.
> > + * On success, return to userspace the trusted key datablob size.
> > + */
> > +static long trusted_read(const struct key *key, char *buffer,
> > + size_t buflen)
> > +{
> > + const struct trusted_key_payload *p;
> > + char *bufp;
> > + int i;
> > +
> > + p = dereference_key_locked(key);
> > + if (!p)
> > + return -EINVAL;
> > +
> > + if (buffer && buflen >= 2 * p->blob_len) {
> > + bufp = buffer;
> > + for (i = 0; i < p->blob_len; i++)
> > + bufp = hex_byte_pack(bufp, p->blob[i]);
> > + }
> > + return 2 * p->blob_len;
> > +}
> > +
> > +/*
> > + * trusted_destroy - clear and free the key's payload
> > + */
> > +static void trusted_destroy(struct key *key)
> > +{
> > + kzfree(key->payload.data[0]);
> > +}
> > +
> > +struct key_type key_type_trusted = {
> > + .name = "trusted",
> > + .instantiate = trusted_instantiate,
> > + .update = trusted_update,
> > + .destroy = trusted_destroy,
> > + .describe = user_describe,
> > + .read = trusted_read,
> > +};
> > +EXPORT_SYMBOL_GPL(key_type_trusted);
> > +
> > +static int __init init_trusted(void)
> > +{
> > + int i, ret = 0;
> > +
> > + for (i = 0; i < sizeof(available_tk_ops); i++) {
> > + tk_ops = available_tk_ops[i];
> > +
> > + if (!(tk_ops && tk_ops->init && tk_ops->seal &&
> > + tk_ops->unseal && tk_ops->get_random))
> > + continue;
>
> This check should not exist as there is no legit case for any of these
> callbacks missing. Please remove it.
Okay.
>
> > +
> > + ret = tk_ops->init();
> > + if (ret) {
> > + if (tk_ops->cleanup)
> > + tk_ops->cleanup();
>
> Why is clean up called? What is "clean up"? Init should take care clean
> up its dirt if it fails. Please remove the calll to clean up from here.
Makes sense, will remove it.
-Sumit
>
> /Jarkko
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^ permalink raw reply
* Re: [Linux-stm32] [PATCH v8 08/10] drm: stm: dw-mipi-dsi: let the bridge handle the HW version check
From: Adrian Ratiu @ 2020-06-01 9:15 UTC (permalink / raw)
To: Philippe CORNU, Adrian Ratiu,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org, Laurent Pinchart
Cc: Jernej Skrabec, Heiko Stuebner, Adrian Pop, Jonas Karlman,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Yannick FERTRE, Andrzej Hajda, linux-imx@nxp.com,
kernel@collabora.com, linux-stm32@st-md-mailman.stormreply.com,
Arnaud Ferraris, Benjamin GAIGNARD
In-Reply-To: <4acc09e8-0610-01f6-b18d-3ffc390c45a3@st.com>
On Fri, 29 May 2020, Philippe CORNU <philippe.cornu@st.com> wrote:
> Hi Adrian, and thank you very much for the patchset. Thank you
> also for having tested it on STM32F769 and STM32MP1. Sorry for
> the late response, Yannick and I will review it as soon as
> possible and we will keep you posted. Note: Do not hesitate to
> put us in copy for the next version (philippe.cornu@st.com,
> yannick.fertre@st.com) Regards, Philippe :-)
Hi Philippe,
Thank you very much for your previous and future STM testing,
really appreciate it! I've CC'd Yannick until now but I'll also CC
you sure :)
It's been over a month since I posted v8 and I was just gearing up
to address all feedback, rebase & retest to prepare v9 but I'll
wait a little longer, no problem, it's no rush.
Have an awesome day,
Adrian
>
>
> On 4/27/20 10:19 AM, Adrian Ratiu wrote:
>> The stm mipi-dsi platform driver added a version test in
>> commit fa6251a747b7 ("drm/stm: dsi: check hardware version")
>> so that HW revisions other than v1.3x get rejected. The rockchip
>> driver had no such check and just assumed register layouts are
>> v1.3x compatible.
>>
>> Having such tests was a good idea because only v130/v131 layouts
>> were supported at the time, however since adding multiple layout
>> support in the bridge, the version is automatically checked for
>> all drivers, compatible layouts get picked and unsupported HW is
>> automatically rejected by the bridge, so there's no use keeping
>> the test in the stm driver.
>>
>> The main reason prompting this change is that the stm driver
>> test immediately disabled the peripheral clock after reading
>> the version, making the bridge read version 0x0 immediately
>> after in its own probe(), so we move the clock disabling after
>> the bridge does the version test.
>>
>> Tested on STM32F769 and STM32MP1.
>>
>> Cc: linux-stm32@st-md-mailman.stormreply.com
>> Reported-by: Adrian Pop <pop.adrian61@gmail.com>
>> Tested-by: Adrian Pop <pop.adrian61@gmail.com>
>> Tested-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
>> Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com>
>> ---
>> New in v6.
>> ---
>> drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 12 +++---------
>> 1 file changed, 3 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> index 2e1f2664495d0..7218e405d7e2b 100644
>> --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> @@ -402,15 +402,6 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
>> goto err_dsi_probe;
>> }
>>
>> - dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
>> - clk_disable_unprepare(pclk);
>> -
>> - if (dsi->hw_version != HWVER_130 && dsi->hw_version != HWVER_131) {
>> - ret = -ENODEV;
>> - DRM_ERROR("bad dsi hardware version\n");
>> - goto err_dsi_probe;
>> - }
>> -
>> dw_mipi_dsi_stm_plat_data.base = dsi->base;
>> dw_mipi_dsi_stm_plat_data.priv_data = dsi;
>>
>> @@ -423,6 +414,9 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
>> goto err_dsi_probe;
>> }
>>
>> + dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
>> + clk_disable_unprepare(pclk);
>> +
>> return 0;
>>
>> err_dsi_probe:
>>
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