* Re: [PATCH v2 0/4] Introduce the Counter character device interface
From: Jonathan Cameron @ 2020-06-01 10:31 UTC (permalink / raw)
To: William Breathitt Gray
Cc: kamel.bouhara, gwendal, david, linux-iio, patrick.havelange,
alexandre.belloni, linux-kernel, linux-arm-kernel,
mcoquelin.stm32, fabrice.gasnier, syednwaris, linux-stm32,
Jonathan Cameron, alexandre.torgue
In-Reply-To: <20200531171351.GA10597@shinobu>
On Sun, 31 May 2020 13:14:06 -0400
William Breathitt Gray <vilhelm.gray@gmail.com> wrote:
> On Sun, May 31, 2020 at 04:18:13PM +0100, Jonathan Cameron wrote:
> > On Sun, 24 May 2020 13:54:39 -0400
> > William Breathitt Gray <vilhelm.gray@gmail.com> wrote:
> > > After giving this some more thought, I believe human-readable sysfs
> > > attributes are the way to go to support configuration of the character
> > > device. I am thinking of a system like this:
> > >
> > > * Users configure the counter character device via a sysfs attribute
> > > such as /sys/bus/counter/devices/counterX/chrdev_format or similar.
> > >
> > > * Users may write to this sysfs attribute to select the components they
> > > want to interface -- the layout can be determined as well from the
> > > order. For example:
> > >
> > > # echo "C0 C3 C2" > /sys/bus/counter/devices/counter0/chrdev_format
> >
> > I guess that 'just' meets the sysfs requirement of one file => one thing.
>
> We can massage this further to make it more apt, but the main idea here
> is that configuration should be separate from our data; and that
> configuration should be performed via sysfs.
>
> > > This would select Counts 0, 3, and 2 (in that order) to be available
> > > in the /dev/counter0 node as a contiguous memory region.
> > >
> > > You can select extensions in a similar fashion:
> > >
> > > # echo "C4E2 S1E0" > /sys/bus/counter/devices/counter0/chrdev_format
> > >
> > > This would select extension 2 from Count 4, and extension 0 from
> > > Signal 1.
> >
> > I'm not totally clear why we'd want to have a chrdev access to extensions.
> > To be honest I'm not totally sure what an extension is today as it's been
> > a week ;)
>
> In the context of the Counter subsystem, an extension is data/control
> that is not one of the core components of the Counter paradigm (i.e. not
> a Counter, Signal, nor Synapse). Extensions essentially represent
> configuration options for the counter device and auxiliary
> functionality.
>
> The "Implementation" section of the Generic Counter documentation
> Documentation/driver-api/generic-counter.rst file gives some good
> examples of extensions, but I'll provide an example here for the sake of
> this new character device interface.
>
> Suppose we have a robot controlling a laser on a dual-axes positioning
> table. A counter device is used to track the position of the laser:
> Count 0 represents position on the X axis, while Count 1 represents
> position on the Y axis. Because this machine is moving across two axes
> at the same time, we want to grab both counts together via the
> character device subsystem (grabbing them separately via sysfs would be
> imprecise due to the inherent latency).
>
> The motors are physically able the robot out of the work area, which is
> not something we want to happen. A common setup in systems like this is
> to set soft boundaries on the counter device to represent the edge of
> the work area; when the boundary is passed, a flag is set high on the
> device to indicate the position is out-of-bounds.
>
> On the Counter subsystem side, this counter device would appear as
> having four sysfs attributes: count0/count, count0/boundary,
> count1/count, and count1/boundary. In terms of the character device
> interface, we could perform a setup like this:
>
> # echo "C0E0 C0 C1E1 C1" > counter0/chrdev_format
>
> Yielding the following /dev/counter0 memory layout:
>
> +------------+-----------------+------------+-------------------+
> | Byte 0 | Byte 1 - Byte 8 | Byte 9 | Byte 10 - Byte 17 |
> +------------+-----------------+------------+-------------------+
> | Boundary 0 | Count 0 | Boundary 1 | Count 1 |
> +------------+-----------------+------------+-------------------+
>
> Now a single read() operation can grab the counts together as well as
> their respective boundary flags to verify whether the current counts are
> valid. This is a scenario where using sysfs wouldn't be viable to use:
> we could check the count0/boundary sysfs attribute first, but by the
> time we read the count0/count sysfs attribute second, the robot has
> already moved to a new (possibly invalid) position.
Ok. So typically something like a condition flag. Data that indeed makes
sense to be associated with a set of counter values.
>
> > Perhaps an example? I see timestamp below. What is that attached to?
> > If we gave multiple counters, do they each have a timestamp?
>
> Some counter devices feature "timestamp" functionality. I haven't yet
> implemented this in the Counter subsystem because it's new functionality
> and I want to keep this patchset limited to the existing Counter
> subsystem functionality support.
>
> However, to briefly go into the topic (we'll need to discuss this more
> in-depth before committing to a Counter subsystem design), some counter
> devices can keep track of historic counts based on various events; we
> call these "timestamps", although they may not necessary be tied to a
> wall-clock time.
>
> For example, quadrature encoders often have an "index" signal in
> addition to the quadrature A and B lines. This index signal may be used
> to home a positioning device, or perhaps to indicate that a full
> revolution -- or some other event -- has occurred. It's common for
> quadrature counter devices to provide a FIFO buffer that logs these
> "index" events by saving the current count when that respective index
> signal goes high. Thus we have a timestamp buffer.
That doesn't sound like a timestamp buffer. You are logging counts,
not the current time. If they are going through a FIFO you might also
capture a freerunning timer though.
>
> In the context of the Counter subsystem, I believe we will end up
> implementing these timestamps as Count extensions (or Device extensions
> if it's a single buffer for the entire device). I'm not sure yet what
> the sysfs attribute will display, but I'm guessing we'll have a
> respective /sys/bus/counter/devices/counterX/countX/timestamps sysfs
> attribute or similar.
>
> The character device implementation should be more straight forward I
> would imagine. Since it's a memory buffer, I think we can provide access
> to that buffer directly in the chrdev:
>
> # echo "C0E0 C1E1" > /sys/bus/counter/devices/counter0/chrdev_format
>
> Yielding the following /dev/counter0 memory layout for 32-byte
> timestamps:
>
> +---------------------+---------------------+
> | Byte 0 - Byte 31 | Byte 32 - Byte 63 |
> +---------------------+---------------------+
> | Timestamps Buffer 0 | Timestamps Buffer 1 |
> +---------------------+---------------------+
As you say, will need more discussion. Lots of fun questions around timestamps
such as what the timebase is, how to relate it to system time etc.
>
> > > * Users may read from this chrdev_format sysfs attribute in order to see
> > > the currently configured format of the character device.
> > >
> > > * Users may perform read/write operations on the /dev/counterX node
> > > directly; the layout of the data is what they user has configured via
> > > the chrdev_format sysfs attribute. For example:
> > >
> > > # echo "C0 C1 S0 S1" > /sys/bus/counter/devices/counter0/chrdev_format
> > >
> > > Yields the following /dev/counter0 memory layout:
> > >
> > > +-----------------+------------------+----------+----------+
> > > | Byte 0 - Byte 7 | Byte 8 - Byte 15 | Byte 16 | Byte 17 |
> > > +-----------------+------------------+----------+----------+
> > > | Count 0 | Count 1 | Signal 0 | Signal 2 |
> > > +-----------------+------------------+----------+----------+
> > >
> > > * Users may perform select/poll operations on the /dev/counterX node.
> > > Users can be notified if data is available or events have occurred.
> >
> > One thing to think about early if watermarks. We bolted them on
> > late in IIO and maybe we could have done it better from the start.
> > I'd almost guarantee someone will want one fairly soon - particularly
> > as it's more than possible you'll have a counter device with a
> > hardware fifo. I have some vague recollection that ti-ecap
> > stuff could be presented as a short fifo for starters.
> >
> > >
> > > The benefit of this design is that the format is robust so users can
> > > choose the components they want to interface and in the layout they
> > > want. For example, if I am writing a userspace application to control a
> > > dual-axis positioning table, I can select the two counts I care about
> > > for the position axes. This allows me to read just those two values
> > > directly from /dev/counterX with a simple read() call, without having to
> > > fumble around seeking to an offset and parsing the layout.
> >
> > I wonder if I'm over thinking things for counters, but you may run into
> > the complexity of different counters having different sampling frequencies.
> > Here you are suggesting a scheme that I think ends up closer to IIO than
> > input. That makes this case a pain. Input takes the view that it's
> > fine to have data coming in any order and frequency because every
> > record is self describing. I'm not sure it matters here, but it is
> > a nice layer of flexibility, but you do loose the efficiency of
> > the description being external to the data flow.
>
> I think one of the downsides to using a single a single character device
> node to represent the entire counter device is that the frequency of two
> individual counts may differ from each other. For example, using the
> dual-axes positioning scenario from earlier, one axis might change more
> frequently than the other (e.g. a conveyor belt situation where X is
> always moving forward, while Y only changes when a part appears within
> the work area).
One option is to allow for either multiple opening of the chardev, or
creation of anon file handles via an IOCTL (like we do for events in IIO).
Makes the sysfs interface more complex, but would allow you to handle multiple
independent raw data streams.
>
> In these cases, I think the Input subsystem approach might be better
> because the user can just wait for events at large and handle each event
> as it comes in, rather than try to coordinate between them all in a
> shared memory space. The shortcoming with this approach is that we lose
> the ability to grab Counts together at the same time, such as we require
> in the constantly moving robot example earlier.
There are approaches like adding a sequence number to allow multiple self
describing records to be associated.
>
> Perhaps what might work is to implement Counter events (perhaps even
> timestamps) using the Input subsystem, and leave the Counter character
> device interface to simple read/write operations. But we'll need to
> investigate this further because we lack a concept of "events" right now
> in the Counter subsystem.
>
> > > Similarly, support for future extensions is simple to implement. When
> > > timestamp support is implemented, users can just select the desired
> > > timestamp extension and read it directly from the /dev/counterX node;
> > > they should also be able to perform a select()/poll() call to be
> > > notified on new timestamps.
> > >
> > > So what do you think of this sort of design? I think there is a useful
> > > robustness to the simplicity of performing a single read/write call on
> > > /dev/counterX.
> >
> > It seems like a reasonable solution to me. The only blurry
> > boundary to my mind is what level of buffering is behind this.
> > The things you can do are open, non blocking read, blocking read and select.
> >
> > If we have a counter that is sampled on demand, then
> > 1) Non blocking read - makes not sense, fair enough I guess, could make it
> > the same as a blocking read.
> > 2) Blocking read - reads from the sensor.
> > 3) Select, meaningless as all reads are done on demand - so I guess you
> > hardwire it to return immediately.
> > 4) open. Nothing special
> >
> > If you have a counter that is self clocking then data gets pushed into some
> > software structure (probably kfifo)
> > 1) Blocking read, question of semantics to resolve
> > a) Return when 'some' data is available (like a socket)
> > b) Return when 'requested amount of data is available'?
> > 2) Non blocking read. Return whatever happens to be available.
> > 3) Select. Semantics to be defined.
> > a) Some data?
> > b) Watermark based (default watermark is 0 so any data triggers it)
> > 4) Open. Starts up sampling of configured set - (typically turns on the
> > device, enables interrupt output etc.)
> >
> > So some corners to resolve but should all work.
>
> I'm not familiar with the "watermark" terminology. Would you be able to
> explain it bit more for me. Is this simply a flag that indicates if data
> has changed from the last time it was checked?
If you have a FIFO, watermark is the fill level at which you indicate you
have data. For a HW FIFO this is usually an interrupt at say 10 elements
queued up. The software is then expected to drain at least 10 elements.
For software fifo the concept is the same, but you are expecting userspace
to drain N elements on each event.
If you are going to deal with remotely high sampling rates you'll need to
support this for both software and hardware FIFOs.
>
> > > > > Moving this selection to a sysfs attribute and dedicating the
> > > > > character device to just data transfer might be a better design. If
> > > > > such a design is chosen, should the selection attribute be
> > > > > human-readable or binary?
> > > >
> > > > Sysfs basically requires things are more or less human readable.
> > > > So if you go that way I think it needs to be.
> > > >
> > > > >
> > > > > 2. How much space should allotted for strings?
> > > > >
> > > > > Each Counter component and extension has a respective size allotted
> > > > > for its data (u8 data is allotted 1 byte, u64 data is allotted 8
> > > > > bytes, etc.); I have arbitrarily chosen to allot 64 bytes for
> > > > > strings. Is this an apt size, or should string data be allotted more
> > > > > or less space?
> > > >
> > > > I'd go with that being big enough, but try to keep the expose interface
> > > > such that the size can change it it needs to the in the future.
> > >
> > > Following along with the separation of control vs data as discussed
> > > above, we could support a more variable size by exposing it through a
> > > sysfs attribute (maybe a chrdev_string_size attribute or similar).
> >
> > I'm unconvinced you'd ever want to return a string via the chardev.
> > People are using the chrdev to get efficiency. String based data flows
> > are rarely that!
>
> That's a good point. I don't think there is a situation right now where
> we need to deliver strings via the character device interface, so I
> think I'll remove that in v3.
Cool. This all seems to be heading in a sensible direction, but as you say
lots still to consider.
Jonathan
>
> William Breathitt Gray
>
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^ permalink raw reply
* Re: [PATCH v2] tty: xilinx_uartps: Fix missing id assignment to the console
From: Michal Simek @ 2020-06-01 10:23 UTC (permalink / raw)
To: Jan Kiszka, Michal Simek, linux-kernel, monstr, git, stable
Cc: Greg Kroah-Hartman, Shubhrajyoti Datta, linux-serial,
linux-arm-kernel, Jiri Slaby
In-Reply-To: <170a896f-42d3-345b-7b93-c964d33fe71c@web.de>
On 30. 05. 20 14:06, Jan Kiszka wrote:
> On 04.05.20 16:27, Michal Simek wrote:
>> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>>
>> When serial console has been assigned to ttyPS1 (which is serial1 alias)
>> console index is not updated property and pointing to index -1 (statically
>> initialized) which ends up in situation where nothing has been printed on
>> the port.
>>
>> The commit 18cc7ac8a28e ("Revert "serial: uartps: Register own uart console
>> and driver structures"") didn't contain this line which was removed by
>> accident.
>>
>> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
>> Cc: stable <stable@vger.kernel.org>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>
>> Changes in v2:
>> - Do better commit description
>> - Origin subject was "tty: xilinx_uartps: Add the id to the console"
>>
>> Greg: Would be good if you can take this patch to 5.7 and also to stable
>> trees.
>>
>> ---
>> drivers/tty/serial/xilinx_uartps.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
>> index 672cfa075e28..b9d672af8b65 100644
>> --- a/drivers/tty/serial/xilinx_uartps.c
>> +++ b/drivers/tty/serial/xilinx_uartps.c
>> @@ -1465,6 +1465,7 @@ static int cdns_uart_probe(struct platform_device *pdev)
>> cdns_uart_uart_driver.nr = CDNS_UART_NR_PORTS;
>> #ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
>> cdns_uart_uart_driver.cons = &cdns_uart_console;
>> + cdns_uart_console.index = id;
>> #endif
>>
>> rc = uart_register_driver(&cdns_uart_uart_driver);
>>
>
> This breaks the ultra96-rev1 which uses uart1 as serial0 (and
> stdout-path = "serial0:115200n8"). Reverting this commit gives
>
> [ 0.024344] Serial: AMBA PL011 UART driver
> [ 0.028010] ff000000.serial: ttyPS1 at MMIO 0xff000000 (irq = 19, base_baud = 6250000) is a xuartps
> [ 0.028172] serial serial0: tty port ttyPS1 registered
> [ 0.028579] ff010000.serial: ttyPS0 at MMIO 0xff010000 (irq = 20, base_baud = 6250000) is a xuartps
> [ 0.557477] printk: console [ttyPS0] enabled
>
> again. Affects stable as well (seen first in 5.4).
Will take a look at this. Just give me some time.
M
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^ permalink raw reply
* Re: [PATCH v4 00/11] Stop monitoring disabled devices
From: Andrzej Pietrasiewicz @ 2020-06-01 10:20 UTC (permalink / raw)
To: Peter Kästle, linux-pm, linux-acpi, netdev, linux-wireless,
platform-driver-x86, linux-arm-kernel, linux-renesas-soc,
linux-rockchip
Cc: Emmanuel Grumbach, Heiko Stuebner, Vishal Kulkarni, Luca Coelho,
Miquel Raynal, kernel, Fabio Estevam, Amit Kucheria,
Chunyan Zhang, Daniel Lezcano, Allison Randal, NXP Linux Team,
Darren Hart, Zhang Rui, Gayatri Kammela, Len Brown, Johannes Berg,
Intel Linux Wireless, Sascha Hauer, Ido Schimmel, Baolin Wang,
Jiri Pirko, Orson Zhai, Thomas Gleixner, Kalle Valo,
Support Opensource, Enrico Weigelt, Rafael J . Wysocki,
Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Pengutronix Kernel Team, Niklas Söderlund, Shawn Guo,
David S . Miller, Andy Shevchenko
In-Reply-To: <23327363eae19d051b7c960d3cbc1523@piie.net>
W dniu 01.06.2020 o 12:02, Peter Kästle pisze:
> Hi,
>
> 28. Mai 2020 21:21, "Andrzej Pietrasiewicz" <andrzej.p@collabora.com> schrieb:
>
> [...]
>
>> This v4 series addresses those concerns: it takes a more gradual
>> approach and uses explicit tzd state initialization, hence there are more
>> insertions than in v3, and the net effect is -63 lines versus -139 lines
>> in v3.
>
> I'd like to test it. Which git repo / branch do you base this series of patches on?
>
> [...]
>
>> base-commit: 351f4911a477ae01239c42f771f621d85b06ea10
>
> Can't find this hashref anywhere.
>
git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux.git, branch "testing".
base-commit: 351f4911a477ae01239c42f771f621d85b06ea10
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^ permalink raw reply
* RE: [PATCH] pinctrl: freescale: imx: Fix an error handling path in 'imx_pinctrl_probe()'
From: Aisheng Dong @ 2020-06-01 10:16 UTC (permalink / raw)
To: Christophe JAILLET, festevam@gmail.com, shawnguo@kernel.org,
stefan@agner.ch, kernel@pengutronix.de, linus.walleij@linaro.org,
s.hauer@pengutronix.de, dl-linux-imx, Gary Bisson
Cc: linux-gpio@vger.kernel.org, kernel-janitors@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <20200530204955.588962-1-christophe.jaillet@wanadoo.fr>
> From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
> Sent: Sunday, May 31, 2020 4:50 AM
>
> 'pinctrl_unregister()' should not be called to undo
> 'devm_pinctrl_register_and_init()', it is already handled by the framework.
>
> This simplifies the error handling paths of the probe function.
> The 'imx_free_resources()' can be removed as well.
>
> Fixes: a51c158bf0f7 ("pinctrl: imx: use radix trees for groups and functions")
> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Regards
Aisheng
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^ permalink raw reply
* Re: [PATCH v3 04/20] arm64: dts: arm: vexpress: Move fixed devices out of bus node
From: André Przywara @ 2020-06-01 10:14 UTC (permalink / raw)
To: Guenter Roeck, Rob Herring, Sudeep Holla
Cc: Mark Rutland, devicetree, Lorenzo Pieralisi, Liviu Dudau,
linux-arm-kernel
In-Reply-To: <48afb8bb-a22a-54df-7751-55b7b84c3c88@arm.com>
On 28/05/2020 14:30, André Przywara wrote:
Hi,
> On 28/05/2020 03:48, Guenter Roeck wrote:
>
> Hi Guenter,
>
>> On Wed, May 13, 2020 at 11:30:00AM +0100, Andre Przywara wrote:
>>> The devicetree compiler complains when DT nodes without a reg property
>>> live inside a (simple) bus node:
>>> Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/refclk32khz
>>> missing or empty reg/ranges property
>>>
>>> Move the fixed clocks, the fixed regulator, the leds and the config bus
>>> subtree to the root node, since they do not depend on any busses.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>
>> This patch results in tracebacks when booting the vexpress-a15 machine
>> with vexpress-v2p-ca15-tc1 devicetree file in qemu. Reverting it as well
>> as the subsequent patches affecting the same file (to avoid revert
>> conflicts) fixes the problem.
>
> Many thanks for the heads up! I was able to reproduce it here. On the
> first glance it looks like the UART is probed before the clocks now,
> because the traversal of the changed DT leads to a different probe
> order. I will look into how to fix this.
Turned out to be a bit more complicated:
The arm,vexpress,config-bus driver walks up the device tree to find a
arm,vexpress,site property [1]. With this patch the first parent node
with that property it finds is now the root node, with the wrong site ID
(0xf instead of 0x0). So it queries the wrong clocks (those IDs are
actually reserved there), and QEMU reports back "0", consequently [2].
Finding a clock frequency in the range of [0, 0] won't get very far.
Possible solutions are:
1) Just keep the mcc and its children at where it is in mainline right
now, so *partly* reverting this patch. This has the problem of still
producing a dtc warning, so kind of defeats the purpose of this patch.
2) Add a "arm,vexpress,site = <0>;" line to the "mcc" node itself.
Works, but looks somewhat dodgy, as the mcc node should really be a
child of the motherboard node, and we should not hack around this.
3) Dig deeper and fix the DT in a way that makes dtc happy. Might
involve (dummy?) ranges or reg properties. My gut feeling is that
arm,vexpress-sysreg,func should really have been "reg" in the first
place, but that's too late to change now, anyway.
I will post 2) as a fix if 3) turns out to be not feasible.
Cheers,
Andre
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/bus/vexpress-config.c#n46
[2]
https://git.qemu.org/?p=qemu.git;a=blob;f=hw/arm/vexpress.c;hb=HEAD#l404
>
> Cheers,
> Andre
>
>>
>> Guenter
>>
>> ---
>> [ 12.744248] ------------[ cut here ]------------
>> [ 12.744562] WARNING: CPU: 0 PID: 20 at drivers/tty/serial/serial_core.c:471 uart_get_baud_rate+0x100/0x154
>> [ 12.744607] Modules linked in:
>> [ 12.744785] CPU: 0 PID: 20 Comm: kworker/0:1 Not tainted 5.7.0-rc7-next-20200526 #1
>> [ 12.744818] Hardware name: ARM-Versatile Express
>> [ 12.745021] Workqueue: events amba_deferred_retry_func
>> [ 12.745155] [<c0312484>] (unwind_backtrace) from [<c030c490>] (show_stack+0x10/0x14)
>> [ 12.745206] [<c030c490>] (show_stack) from [<c0880f04>] (dump_stack+0xc8/0xdc)
>> [ 12.745239] [<c0880f04>] (dump_stack) from [<c0346e44>] (__warn+0xdc/0xf4)
>> [ 12.745270] [<c0346e44>] (__warn) from [<c0346f0c>] (warn_slowpath_fmt+0xb0/0xb8)
>> [ 12.745302] [<c0346f0c>] (warn_slowpath_fmt) from [<c0a6b16c>] (uart_get_baud_rate+0x100/0x154)
>> [ 12.745336] [<c0a6b16c>] (uart_get_baud_rate) from [<c0a7f5ac>] (pl011_set_termios+0x48/0x32c)
>> [ 12.745367] [<c0a7f5ac>] (pl011_set_termios) from [<c0a6bbbc>] (uart_set_options+0x124/0x164)
>> [ 12.745404] [<c0a6bbbc>] (uart_set_options) from [<c1b8c804>] (pl011_console_setup+0x214/0x230)
>> [ 12.745438] [<c1b8c804>] (pl011_console_setup) from [<c03ab0d8>] (try_enable_new_console+0x98/0x138)
>> [ 12.745469] [<c03ab0d8>] (try_enable_new_console) from [<c03acc64>] (register_console+0xe8/0x304)
>> [ 12.745499] [<c03acc64>] (register_console) from [<c0a6c88c>] (uart_add_one_port+0x4c0/0x504)
>> [ 12.745529] [<c0a6c88c>] (uart_add_one_port) from [<c0a80404>] (pl011_register_port+0x5c/0xac)
>> [ 12.745568] [<c0a80404>] (pl011_register_port) from [<c097f5a0>] (amba_probe+0x9c/0x110)
>> [ 12.745602] [<c097f5a0>] (amba_probe) from [<c0b57e84>] (really_probe+0x218/0x348)
>> [ 12.745632] [<c0b57e84>] (really_probe) from [<c0b580c0>] (driver_probe_device+0x5c/0xb4)
>> [ 12.745662] [<c0b580c0>] (driver_probe_device) from [<c0b55ff4>] (bus_for_each_drv+0x58/0xb8)
>> [ 12.745692] [<c0b55ff4>] (bus_for_each_drv) from [<c0b57bf8>] (__device_attach+0xd4/0x140)
>> [ 12.745721] [<c0b57bf8>] (__device_attach) from [<c0b56eb0>] (bus_probe_device+0x88/0x90)
>> [ 12.745751] [<c0b56eb0>] (bus_probe_device) from [<c0b53234>] (device_add+0x3d4/0x6e8)
>> [ 12.745782] [<c0b53234>] (device_add) from [<c097f664>] (amba_device_try_add+0x50/0x2d4)
>> [ 12.745812] [<c097f664>] (amba_device_try_add) from [<c097f924>] (amba_deferred_retry+0x3c/0x98)
>> [ 12.745847] [<c097f924>] (amba_deferred_retry) from [<c097f988>] (amba_deferred_retry_func+0x8/0x40)
>> [ 12.745881] [<c097f988>] (amba_deferred_retry_func) from [<c0365b6c>] (process_one_work+0x2b8/0x6e8)
>> [ 12.745912] [<c0365b6c>] (process_one_work) from [<c0365fe0>] (worker_thread+0x44/0x540)
>> [ 12.745942] [<c0365fe0>] (worker_thread) from [<c036d810>] (kthread+0x16c/0x178)
>> [ 12.745973] [<c036d810>] (kthread) from [<c03001a8>] (ret_from_fork+0x14/0x2c)
>> [ 12.746041] Exception stack(0xc73abfb0 to 0xc73abff8)
>> [ 12.746181] bfa0: 00000000 00000000 00000000 00000000
>> [ 12.746302] bfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
>> [ 12.746397] bfe0: 00000000 00000000 00000000 00000000 00000013 00000000
>> [ 12.746651] ---[ end trace 2a3f61da56bd8a49 ]---
>>
>> ---
>> # bad: [b0523c7b1c9d0edcd6c0fe6d2cb558a9ad5c60a8] Add linux-next specific files for 20200526
>> # good: [9cb1fd0efd195590b828b9b865421ad345a4a145] Linux 5.7-rc7
>> git bisect start 'next-20200526' 'v5.7-rc7'
>> # bad: [0c7351ad83670964e48cb9a098ad732c1ecbf804] Merge remote-tracking branch 'crypto/master'
>> git bisect bad 0c7351ad83670964e48cb9a098ad732c1ecbf804
>> # bad: [42e11d9b4682229fa7187d129758b8c382f8cd5d] Merge remote-tracking branch 'jc_docs/docs-next'
>> git bisect bad 42e11d9b4682229fa7187d129758b8c382f8cd5d
>> # bad: [ab6f501559e9efa687c711a781243cf6651a82d3] Merge remote-tracking branch 'm68k/for-next'
>> git bisect bad ab6f501559e9efa687c711a781243cf6651a82d3
>> # bad: [44aaa516ca63b3ab2da8ae81e9c6a58656e6acb5] Merge branch 'arm/drivers' into for-next
>> git bisect bad 44aaa516ca63b3ab2da8ae81e9c6a58656e6acb5
>> # good: [1cb00f8c3b36e6ae026fb58d1cd2ccd78b81aa9f] Merge tag 'qcom-arm64-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
>> git bisect good 1cb00f8c3b36e6ae026fb58d1cd2ccd78b81aa9f
>> # bad: [ed0c25932fbfafdfe37e9633dee21770d3c5a306] Merge branch 'arm/defconfig' into for-next
>> git bisect bad ed0c25932fbfafdfe37e9633dee21770d3c5a306
>> # bad: [9eddc06a3bc79402f50176703237ed045ae77b16] Merge branch 'mmp/fixes' into arm/dt
>> git bisect bad 9eddc06a3bc79402f50176703237ed045ae77b16
>> # bad: [87b990ab62722a8a3cb0691107971ab1bd7bddb5] Merge tag 'mvebu-dt64-5.8-1' of git://git.infradead.org/linux-mvebu into arm/dt
>> git bisect bad 87b990ab62722a8a3cb0691107971ab1bd7bddb5
>> # bad: [94cc3f1baabac5e5c4dcc6c2f070353f8315d0ee] arm64: dts: juno: Fix SCPI shared mem node name
>> git bisect bad 94cc3f1baabac5e5c4dcc6c2f070353f8315d0ee
>> # bad: [a78aee9e434932a500db36cc6d88daeff3745e9f] arm64: dts: juno: Fix GIC child nodes
>> git bisect bad a78aee9e434932a500db36cc6d88daeff3745e9f
>> # bad: [feebdc3f7950d7e44e914e821f6c04e58e292c74] arm64: dts: fvp: Move fixed clocks out of bus node
>> git bisect bad feebdc3f7950d7e44e914e821f6c04e58e292c74
>> # good: [849bfc3dfc13cde6ec04fbcf32af553ded9f7ec3] arm64: dts: fvp: Move fixed devices out of bus node
>> git bisect good 849bfc3dfc13cde6ec04fbcf32af553ded9f7ec3
>> # bad: [d9258898ad49cbb46caffe23af0d4f0b766e67a2] arm64: dts: vexpress: Move fixed devices out of bus node
>> git bisect bad d9258898ad49cbb46caffe23af0d4f0b766e67a2
>> # first bad commit: [d9258898ad49cbb46caffe23af0d4f0b766e67a2] arm64: dts: vexpress: Move fixed devices out of bus node
>>
>
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^ permalink raw reply
* Re: [RFC PATCH v5 3/6] PM / devfreq: exynos-bus: Add registration of interconnect child device
From: Sylwester Nawrocki @ 2020-06-01 10:04 UTC (permalink / raw)
To: Chanwoo Choi
Cc: devicetree, linux-samsung-soc, Rob Herring,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Artur Świgoń,
Krzysztof Kozlowski, linux-kernel, inki.dae, Chanwoo Choi,
MyungJoo Ham, dri-devel, Georgi Djakov, linux-arm-kernel,
Marek Szyprowski
In-Reply-To: <CAGTfZH1KC=jpQ5GXNtEf1cn7+WqXJdqbbVKmpxr8Snh4GEy8bA@mail.gmail.com>
Cc: Rob, devicetree ML
On 31.05.2020 01:57, Chanwoo Choi wrote:
> On Sat, May 30, 2020 at 1:33 AM Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
>>
>> This patch adds registration of a child platform device for the exynos
>> interconnect driver. It is assumed that the interconnect provider will
>> only be needed when #interconnect-cells property is present in the bus
>> DT node, hence the child device will be created only when such a property
>> is present.
>>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>>
>> Changes for v5:
>> - new patch.
>> ---
>> drivers/devfreq/exynos-bus.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
>> index 8fa8eb5..856e37d 100644
>> --- a/drivers/devfreq/exynos-bus.c
>> +++ b/drivers/devfreq/exynos-bus.c
>> @@ -24,6 +24,7 @@
>>
>> struct exynos_bus {
>> struct device *dev;
>> + struct platform_device *icc_pdev;
>>
>> struct devfreq *devfreq;
>> struct devfreq_event_dev **edev;
>> @@ -156,6 +157,8 @@ static void exynos_bus_exit(struct device *dev)
>> if (ret < 0)
>> dev_warn(dev, "failed to disable the devfreq-event devices\n");
>>
>> + platform_device_unregister(bus->icc_pdev);
>> +
>> dev_pm_opp_of_remove_table(dev);
>> clk_disable_unprepare(bus->clk);
>> if (bus->opp_table) {
>> @@ -168,6 +171,8 @@ static void exynos_bus_passive_exit(struct device *dev)
>> {
>> struct exynos_bus *bus = dev_get_drvdata(dev);
>>
>> + platform_device_unregister(bus->icc_pdev);
>> +
>> dev_pm_opp_of_remove_table(dev);
>> clk_disable_unprepare(bus->clk);
>> }
>> @@ -431,6 +436,18 @@ static int exynos_bus_probe(struct platform_device *pdev)
>> if (ret < 0)
>> goto err;
>>
>> + /* Create child platform device for the interconnect provider */
>> + if (of_get_property(dev->of_node, "#interconnect-cells", NULL)) {
>> + bus->icc_pdev = platform_device_register_data(
>> + dev, "exynos-generic-icc",
>> + PLATFORM_DEVID_AUTO, NULL, 0);
>> +
>> + if (IS_ERR(bus->icc_pdev)) {
>> + ret = PTR_ERR(bus->icc_pdev);
>> + goto err;
>> + }
>> + }
>> +
>> max_state = bus->devfreq->profile->max_state;
>> min_freq = (bus->devfreq->profile->freq_table[0] / 1000);
>> max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000);
>> --
>> 2.7.4
>>
>
> It looks like very similar like the registering the interconnect
> device of imx-bus.c
> and I already reviewed and agreed this approach.
>
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
>
> nitpick: IMHO, I think that 'exynos-icc' is proper and simple without
> 'generic' word.
> If we need to add new icc compatible int the future, we will add
> 'exynosXXXX-icc' new compatible.
> But, I'm not forcing it. just opinion. Anyway, I agree this approach.
Thanks for review. I will change the name to exynos-icc in next version,
as I commented at other patch, it is not part of any DT binding,
it is just for device/driver matching between devfreq and interconnect.
--
Thanks,
Sylwester
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^ permalink raw reply
* Re: [PATCH v4 00/11] Stop monitoring disabled devices
From: Peter Kästle @ 2020-06-01 10:02 UTC (permalink / raw)
To: Andrzej Pietrasiewicz, linux-pm, linux-acpi, netdev,
linux-wireless, platform-driver-x86, linux-arm-kernel,
linux-renesas-soc, linux-rockchip
Cc: Emmanuel Grumbach, Heiko Stuebner, Vishal Kulkarni, Luca Coelho,
Miquel Raynal, kernel, Fabio Estevam, Amit Kucheria,
Chunyan Zhang, Daniel Lezcano, Allison Randal, NXP Linux Team,
Darren Hart, Zhang Rui, Gayatri Kammela, Len Brown, Johannes Berg,
Intel Linux Wireless, Sascha Hauer, Ido Schimmel, Baolin Wang,
Jiri Pirko, Orson Zhai, Thomas Gleixner, Kalle Valo,
Support Opensource, Enrico Weigelt, Rafael J . Wysocki,
Sebastian Reichel, Bartlomiej Zolnierkiewicz,
Pengutronix Kernel Team, Niklas Söderlund, Shawn Guo,
David S . Miller, Andy Shevchenko
In-Reply-To: <20200528192051.28034-1-andrzej.p@collabora.com>
Hi,
28. Mai 2020 21:21, "Andrzej Pietrasiewicz" <andrzej.p@collabora.com> schrieb:
[...]
> This v4 series addresses those concerns: it takes a more gradual
> approach and uses explicit tzd state initialization, hence there are more
> insertions than in v3, and the net effect is -63 lines versus -139 lines
> in v3.
I'd like to test it. Which git repo / branch do you base this series of patches on?
[...]
> base-commit: 351f4911a477ae01239c42f771f621d85b06ea10
Can't find this hashref anywhere.
--
thanks
--peter;
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^ permalink raw reply
* Re: arm64: Register modification during syscall entry/exit stop
From: Dave Martin @ 2020-06-01 9:59 UTC (permalink / raw)
To: Keno Fischer
Cc: Kyle Huey, Catalin Marinas, Oleg Nesterov,
Linux Kernel Mailing List, Will Deacon, linux-arm-kernel
In-Reply-To: <CABV8kRzkLiVuqxT3+8c1o8m_OuROtXgfowQcrMVnrxu=CiGB=w@mail.gmail.com>
On Mon, Jun 01, 2020 at 05:40:28AM -0400, Keno Fischer wrote:
> On Mon, Jun 1, 2020 at 5:23 AM Dave Martin <Dave.Martin@arm.com> wrote:
> > > > Can't PTRACE_SYSEMU be emulated by using PTRACE_SYSCALL, cancelling the
> > > > syscall at the syscall enter stop, then modifying the regs at the
> > > > syscall exit stop?
> > >
> > > Yes, it can. The idea behind SYSEMU is to be able to save half the
> > > ptrace traps that would require, in theory making the ptracer
> > > a decent amount faster. That said, the x7 issue is orthogonal to
> > > SYSEMU, you'd have the same issues if you used PTRACE_SYSCALL.
> >
> > Right, I just wondered whether there was some deeper difference between
> > the two approaches.
>
> You're asking about a new regset vs trying to do it via ptrace option?
I meant SYSEMU versus SYSCALL + cancellation and emulating the syscall
at the syscall exit stop.
i.e., I was trying to understand whether SYSEMU is just a convenience,
or does some magic that can't be reproduced by other means.
> I don't think there's anything a ptrace option can do that a new regset
> that replicates the same registers (I'm gonna propose adding orig_x0,
> while we're at it and changing the x0 semantics a bit, will have
> those details with the patch) wouldn't be able to do . The reason I
> originally thought it might have to be a ptrace option is because
> the register modification currently gets applied in the syscall entry
> code to the actual regs struct, so I thought you might have to know
> to preserve those registers. However, then I realized that you could
> just change the regset accessors to emulate the old behavior, since
> we do already store all the required information (what kind of stop
> we're currently at) in order to be able to answer the ptrace
> informational queries. So doing that it probably just all around
> easier. I guess NT_PRSTATUS might also rot, but I guess strace
> doesn't really have to stop using it, since it doesn't care about
> the x7 value nor does it need to modify it.
I think NT_PRSTATUS probably doesn't need to change.
Having a duplicate regset feels like a worse outcome that having a new
ptrace option. Undocumentedly different things already happen to the
regs depending on how the tracee stopped, so adding a new special case
doesn't seem to justify creating a new regset.
Cheers
---Dave
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^ permalink raw reply
* Re: [RFC PATCH v5 2/6] interconnect: Add generic interconnect driver for Exynos SoCs
From: Sylwester Nawrocki @ 2020-06-01 9:57 UTC (permalink / raw)
To: Chanwoo Choi
Cc: devicetree, linux-samsung-soc, Rob Herring,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Artur Świgoń,
Krzysztof Kozlowski, linux-kernel, inki.dae, Chanwoo Choi,
MyungJoo Ham, dri-devel, Georgi Djakov, linux-arm-kernel,
Marek Szyprowski
In-Reply-To: <CAGTfZH3zvgOtME0U2hKjtqO49e0-Nw6MRxhw+z6Mfio-=FUwcQ@mail.gmail.com>
Cc: Rob, devicetree ML
On 31.05.2020 02:13, Chanwoo Choi wrote:
> On Sat, May 30, 2020 at 1:34 AM Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
>>
>> This patch adds a generic interconnect driver for Exynos SoCs in order
>> to provide interconnect functionality for each "samsung,exynos-bus"
>> compatible device.
>>
>> The SoC topology is a graph (or more specifically, a tree) and its
>> edges are specified using the 'samsung,interconnect-parent' in the
>> DT. Due to unspecified relative probing order, -EPROBE_DEFER may be
>> propagated to ensure that the parent is probed before its children.
>>
>> Each bus is now an interconnect provider and an interconnect node as
>> well (cf. Documentation/interconnect/interconnect.rst), i.e. every bus
>> registers itself as a node. Node IDs are not hardcoded but rather
>> assigned dynamically at runtime. This approach allows for using this
>> driver with various Exynos SoCs.
>>
>> Frequencies requested via the interconnect API for a given node are
>> propagated to devfreq using dev_pm_qos_update_request(). Please note
>> that it is not an error when CONFIG_INTERCONNECT is 'n', in which
>> case all interconnect API functions are no-op.
>>
>> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>>
>> Changes for v5:
>> - adjust to renamed exynos,interconnect-parent-node property,
>> - use automatically generated platform device id as the interconect
>> node id instead of a now unavailable devfreq->id field,
>> - add icc_ prefix to some variables to make the code more self-commenting,
>> - use icc_nodes_remove() instead of icc_node_del() + icc_node_destroy(),
>> - adjust to exynos,interconnect-parent-node property rename to
>> samsung,interconnect-parent,
>> - converted to a separate platform driver in drivers/interconnect.
>> ---
>> drivers/interconnect/Kconfig | 1 +
>> drivers/interconnect/Makefile | 1 +
>> drivers/interconnect/exynos/Kconfig | 6 ++
>> drivers/interconnect/exynos/Makefile | 4 +
>> drivers/interconnect/exynos/exynos.c | 185 +++++++++++++++++++++++++++++++++++
>> 5 files changed, 197 insertions(+)
>> create mode 100644 drivers/interconnect/exynos/Kconfig
>> create mode 100644 drivers/interconnect/exynos/Makefile
>> create mode 100644 drivers/interconnect/exynos/exynos.c
>>
>> diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig
>> index 5b7204e..eca6eda 100644
>> --- a/drivers/interconnect/Kconfig
>> +++ b/drivers/interconnect/Kconfig
>> @@ -11,6 +11,7 @@ menuconfig INTERCONNECT
>>
>> if INTERCONNECT
>>
>> +source "drivers/interconnect/exynos/Kconfig"
>> source "drivers/interconnect/imx/Kconfig"
>> source "drivers/interconnect/qcom/Kconfig"
>>
>> diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile
>> index 4825c28..2ba1de6 100644
>> --- a/drivers/interconnect/Makefile
>> +++ b/drivers/interconnect/Makefile
>> @@ -4,5 +4,6 @@ CFLAGS_core.o := -I$(src)
>> icc-core-objs := core.o
>>
>> obj-$(CONFIG_INTERCONNECT) += icc-core.o
>> +obj-$(CONFIG_INTERCONNECT_EXYNOS) += exynos/
>> obj-$(CONFIG_INTERCONNECT_IMX) += imx/
>> obj-$(CONFIG_INTERCONNECT_QCOM) += qcom/
>> diff --git a/drivers/interconnect/exynos/Kconfig b/drivers/interconnect/exynos/Kconfig
>> new file mode 100644
>> index 0000000..e51e52e
>> --- /dev/null
>> +++ b/drivers/interconnect/exynos/Kconfig
>> @@ -0,0 +1,6 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +config INTERCONNECT_EXYNOS
>> + tristate "Exynos generic interconnect driver"
>> + depends on ARCH_EXYNOS || COMPILE_TEST
>> + help
>> + Generic interconnect driver for Exynos SoCs.
>> diff --git a/drivers/interconnect/exynos/Makefile b/drivers/interconnect/exynos/Makefile
>> new file mode 100644
>> index 0000000..e19d1df
>> --- /dev/null
>> +++ b/drivers/interconnect/exynos/Makefile
>> @@ -0,0 +1,4 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +exynos-interconnect-objs := exynos.o
>> +
>> +obj-$(CONFIG_INTERCONNECT_EXYNOS) += exynos-interconnect.o
>> diff --git a/drivers/interconnect/exynos/exynos.c b/drivers/interconnect/exynos/exynos.c
>> new file mode 100644
>> index 0000000..8278194
>> --- /dev/null
>> +++ b/drivers/interconnect/exynos/exynos.c
>> @@ -0,0 +1,185 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Exynos generic interconnect provider driver
>> + *
>> + * Copyright (c) 2020 Samsung Electronics Co., Ltd.
>> + *
>> + * Authors: Artur Świgoń <a.swigon@samsung.com>
>> + * Sylwester Nawrocki <s.nawrocki@samsung.com>
>> + */
>> +#include <linux/device.h>
>> +#include <linux/interconnect-provider.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/pm_qos.h>
>> +
>> +#define kbps_to_khz(x) ((x) / 8)
>> +
>> +struct exynos_icc_priv {
>> + struct device *dev;
>> +
>> + /* One interconnect node per provider */
>> + struct icc_provider provider;
>> + struct icc_node *node;
>> +
>> + struct dev_pm_qos_request qos_req;
>> +};
>> +
>> +static struct icc_node *exynos_icc_get_parent(struct device_node *np)
>> +{
>> + struct of_phandle_args args;
>> + int num, ret;
>> +
>> + num = of_count_phandle_with_args(np, "samsung,interconnect-parent",
>> + "#interconnect-cells");
>> + if (num != 1)
>> + return NULL; /* parent nodes are optional */
>> +
>> + ret = of_parse_phandle_with_args(np, "samsung,interconnect-parent",
>> + "#interconnect-cells", 0, &args);
>> + if (ret < 0)
>> + return ERR_PTR(ret);
>> +
>> + of_node_put(args.np);
>> +
>> + return of_icc_get_from_provider(&args);
>> +}
>> +
>> +
>> +static int exynos_generic_icc_set(struct icc_node *src, struct icc_node *dst)
>> +{
>> + struct exynos_icc_priv *src_priv = src->data, *dst_priv = dst->data;
>> + s32 src_freq = kbps_to_khz(max(src->avg_bw, src->peak_bw));
>> + s32 dst_freq = kbps_to_khz(max(dst->avg_bw, dst->peak_bw));
>> + int ret;
>> +
>> + ret = dev_pm_qos_update_request(&src_priv->qos_req, src_freq);
>> + if (ret < 0) {
>> + dev_err(src_priv->dev, "failed to update PM QoS of %s\n",
>> + src->name);
>> + return ret;
>> + }
>> +
>> + ret = dev_pm_qos_update_request(&dst_priv->qos_req, dst_freq);
>> + if (ret < 0) {
>> + dev_err(dst_priv->dev, "failed to update PM QoS of %s\n",
>> + dst->name);
>> + return ret;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static struct icc_node *exynos_generic_icc_xlate(struct of_phandle_args *spec,
>> + void *data)
>> +{
>> + struct exynos_icc_priv *priv = data;
>> +
>> + if (spec->np != priv->dev->parent->of_node)
>> + return ERR_PTR(-EINVAL);
>> +
>> + return priv->node;
>> +}
>> +
>> +static int exynos_generic_icc_remove(struct platform_device *pdev)
>> +{
>> + struct exynos_icc_priv *priv = platform_get_drvdata(pdev);
>> + struct icc_node *parent_node, *node = priv->node;
>> +
>> + parent_node = exynos_icc_get_parent(priv->dev->parent->of_node);
>> + if (parent_node && !IS_ERR(parent_node))
>> + icc_link_destroy(node, parent_node);
>> +
>> + icc_nodes_remove(&priv->provider);
>> + icc_provider_del(&priv->provider);
>> +
>> + return 0;
>> +}
>> +
>> +static int exynos_generic_icc_probe(struct platform_device *pdev)
>> +{
>> + struct device *bus_dev = pdev->dev.parent;
>> + struct exynos_icc_priv *priv;
>> + struct icc_provider *provider;
>> + struct icc_node *icc_node, *icc_parent_node;
>> + int ret;
>> +
>> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>> + if (!priv)
>> + return -ENOMEM;
>> +
>> + priv->dev = &pdev->dev;
>> + platform_set_drvdata(pdev, priv);
>> +
>> + provider = &priv->provider;
>> +
>> + provider->set = exynos_generic_icc_set;
>> + provider->aggregate = icc_std_aggregate;
>> + provider->xlate = exynos_generic_icc_xlate;
>> + provider->dev = bus_dev;
>> + provider->inter_set = true;
>> + provider->data = priv;
>> +
>> + ret = icc_provider_add(provider);
>> + if (ret < 0)
>> + return ret;
>> +
>> + icc_node = icc_node_create(pdev->id);
>> + if (IS_ERR(icc_node)) {
>> + ret = PTR_ERR(icc_node);
>> + goto err_prov_del;
>> + }
>> +
>> + priv->node = icc_node;
>> + icc_node->name = bus_dev->of_node->name;
>> + icc_node->data = priv;
>> + icc_node_add(icc_node, provider);
>> +
>> + icc_parent_node = exynos_icc_get_parent(bus_dev->of_node);
>> + if (IS_ERR(icc_parent_node)) {
>> + ret = PTR_ERR(icc_parent_node);
>> + goto err_node_del;
>> + }
>> + if (icc_parent_node) {
>> + ret = icc_link_create(icc_node, icc_parent_node->id);
>> + if (ret < 0)
>> + goto err_node_del;
>> + }
>> +
>> + /*
>> + * Register a PM QoS request for the bus device for which also devfreq
>> + * functionality is registered.
>> + */
>> + ret = dev_pm_qos_add_request(bus_dev, &priv->qos_req,
>> + DEV_PM_QOS_MIN_FREQUENCY, 0);
>> + if (ret < 0)
>> + goto err_link_destroy;
>> +
>> + return 0;
>> +
>> +err_link_destroy:
>> + if (icc_parent_node)
>> + icc_link_destroy(icc_node, icc_parent_node);
>> +err_node_del:
>> + icc_nodes_remove(provider);
>> +err_prov_del:
>> + icc_provider_del(provider);
>> +
>> + return ret;
>> +}
>> +
>> +static struct platform_driver exynos_generic_icc_driver = {
>> + .driver = {
>> + .name = "exynos-generic-icc",
>> + },
>> + .probe = exynos_generic_icc_probe,
>> + .remove = exynos_generic_icc_remove,
>> +};
>> +module_platform_driver(exynos_generic_icc_driver);
>> +
>> +MODULE_DESCRIPTION("Exynos generic interconnect driver");
>> +MODULE_AUTHOR("Artur Świgoń <a.swigon@samsung.com>");
>> +MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
>> +MODULE_LICENSE("GPL v2");
>> +MODULE_ALIAS("platform:exynos-generic-icc");
>> --
>> 2.7.4
>>
>
> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
>
> As I commented, How about changing the compatible name 'exynos-icc'
> without 'generic'?
> The 'exynos-icc' doesn't have the any specific version of Exynos SoC,
> it think that it already contain the 'generic' meaning for Exynos SoC.
Sure, I can change it to "exynos-icc". However please note it is just
a name for the driver and its related virtual platform (sub)device that
is created in the devfreq driver, which matches on the "samsung,exynos-bus"
compatible. Of course we could add any specific DT compatible to this driver
in future if needed.
--
Thanks,
Sylwester
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^ permalink raw reply
* Re: arm64: Register modification during syscall entry/exit stop
From: Dave Martin @ 2020-06-01 9:52 UTC (permalink / raw)
To: Keno Fischer
Cc: Kyle Huey, Catalin Marinas, Linux Kernel Mailing List,
Oleg Nesterov, Will Deacon, linux-arm-kernel
In-Reply-To: <CABV8kRz2ineTcLS29Lh=BW_kJB_X7PoqY-MaMj_pUUziOxrYCw@mail.gmail.com>
On Mon, Jun 01, 2020 at 05:23:01AM -0400, Keno Fischer wrote:
> On Mon, Jun 1, 2020 at 5:14 AM Dave Martin <Dave.Martin@arm.com> wrote:
> > Can you explain why userspace would write a changed value for x7
> > but at the same time need that new to be thrown away?
>
> The discarding behavior is the primary reason things aren't completely
> broken at the moment. If it read the wrong x7 value and didn't know about
> the Aarch64 quirk, it's often just trying to write that same wrong
> value back during the next stop, so if that's just ignored,
> that's probably fine in 99% of cases, since the value in the
> tracee will be undisturbed.
I guess that's my question: when is x7 "disturbed".
Other than sigreturn, I can't think of a case.
I'm likely missing some aspect of what you're trying to do.
> I don't think there's a sane way to change the aarch64 NT_PRSTATUS
> semantics without just completely removing the x7 behavior, but of course
> people may be relying on that (I think somebody said upthread that strace does?)
Since rt_sigreturn emulation was always broken, can we just say
that the effect of updating any reg other than x0 is unspecified in this
case?
Even fixing the x7 issue won't magically teach your tracer how to
deal with unrecognised data in the signal frame, so new hardware or
a new kernel could cause your tracer to become subtly broken. Would you
be better off tweaking the real signal frame as desired and doing a real
rt_sigreturn for example, instead of attempting to emulate it?
I'm somewhat playing devil's advocate here...
Cheers
---Dave
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^ permalink raw reply
* [RFC PATCH 2/3] firmware: Add support for PSA FF-A transport for VM partitions
From: Sudeep Holla @ 2020-06-01 9:45 UTC (permalink / raw)
To: Will Deacon, devicetree, linux-arm-kernel
Cc: Marc Zyngier, linux-kernel, Sudeep Holla
In-Reply-To: <20200601094512.50509-1-sudeep.holla@arm.com>
Initial support for PSA FF-A interface providing APIs for non-secure VM
partitions.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
drivers/firmware/Kconfig | 1 +
drivers/firmware/Makefile | 1 +
drivers/firmware/arm_psa_ffa/Kconfig | 15 ++
drivers/firmware/arm_psa_ffa/Makefile | 2 +
drivers/firmware/arm_psa_ffa/driver.c | 250 ++++++++++++++++++++++++++
include/linux/arm_psa_ffa.h | 42 +++++
6 files changed, 311 insertions(+)
create mode 100644 drivers/firmware/arm_psa_ffa/Kconfig
create mode 100644 drivers/firmware/arm_psa_ffa/Makefile
create mode 100644 drivers/firmware/arm_psa_ffa/driver.c
create mode 100644 include/linux/arm_psa_ffa.h
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index 4843e94713a4..1ee421974cba 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -295,6 +295,7 @@ config TURRIS_MOX_RWTM
other manufacturing data and also utilize the Entropy Bit Generator
for hardware random number generation.
+source "drivers/firmware/arm_psa_ffa/Kconfig"
source "drivers/firmware/broadcom/Kconfig"
source "drivers/firmware/google/Kconfig"
source "drivers/firmware/efi/Kconfig"
diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
index 99510be9f5ed..1c0b5f130d7d 100644
--- a/drivers/firmware/Makefile
+++ b/drivers/firmware/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o
obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o
obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o
+obj-y += arm_psa_ffa/
obj-$(CONFIG_ARM_SCMI_PROTOCOL) += arm_scmi/
obj-y += broadcom/
obj-y += meson/
diff --git a/drivers/firmware/arm_psa_ffa/Kconfig b/drivers/firmware/arm_psa_ffa/Kconfig
new file mode 100644
index 000000000000..ba699ec68ec4
--- /dev/null
+++ b/drivers/firmware/arm_psa_ffa/Kconfig
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config ARM_PSA_FFA_TRANSPORT
+ tristate "Arm Platform Security Architecture Firmware Framework for Armv8-A"
+ depends on ARM64 && HAVE_ARM_SMCCC_DISCOVERY
+ help
+ This Firmware Framework(FF) of the Platform Security Architecture
+ (PSA) for Arm A-profile processors describes interfaces that
+ standardize communication between the various software images which
+ includes communication between images in the Secure world and
+ Normal world. It also leverages the virtualization extension to
+ isolate software images provided by an ecosystem of vendors from
+ each other.
+
+ This driver provides interface for all the client drivers making
+ use of the features offered by ARM PSA-FF-A.
diff --git a/drivers/firmware/arm_psa_ffa/Makefile b/drivers/firmware/arm_psa_ffa/Makefile
new file mode 100644
index 000000000000..ac0455ff71a4
--- /dev/null
+++ b/drivers/firmware/arm_psa_ffa/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_ARM_PSA_FFA_TRANSPORT) += driver.o
diff --git a/drivers/firmware/arm_psa_ffa/driver.c b/drivers/firmware/arm_psa_ffa/driver.c
new file mode 100644
index 000000000000..700bd5850746
--- /dev/null
+++ b/drivers/firmware/arm_psa_ffa/driver.c
@@ -0,0 +1,250 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Arm Platform Security Architecture(PSA) Firmware Framework for ARMv8-A(FFA)
+ * interface driver
+ *
+ * The Arm PSA FFA specification[1] describes a software architecture to
+ * leverages the virtualization extension to isolate software images
+ * provided by an ecosystem of vendors from each other and describes
+ * interfaces that standardize communication between the various software
+ * images including communication between images in the Secure world and
+ * Normal world. Any Hypervisor could use the PSA FFA interfaces to enable
+ * communication between VMs it manages.
+ *
+ * The Hypervisor a.k.a Partition managers in FFA terminology can assign
+ * system resources(Memory regions, Devices, CPU cycles) to the partitions
+ * and manage isolation amongst them.
+ *
+ * [1] https://developer.arm.com/docs/den0077/latest
+ *
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+#define pr_fmt(fmt) "ARM PSA FF-A: " fmt
+
+#include <linux/arm_psa_ffa.h>
+#include <linux/arm-smccc.h>
+#include <linux/bitfield.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/types.h>
+
+#define PSA_FFA_SMC(calling_convention, func_num) \
+ ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, (calling_convention), \
+ ARM_SMCCC_OWNER_STANDARD, (func_num))
+
+#define PSA_FFA_SMC_32(func_num) PSA_FFA_SMC(ARM_SMCCC_SMC_32, (func_num))
+#define PSA_FFA_SMC_64(func_num) PSA_FFA_SMC(ARM_SMCCC_SMC_64, (func_num))
+
+#define PSA_FFA_ERROR PSA_FFA_SMC_32(0x60)
+#define PSA_FFA_SUCCESS PSA_FFA_SMC_32(0x61)
+#define PSA_FFA_INTERRUPT PSA_FFA_SMC_32(0x62)
+#define PSA_FFA_VERSION PSA_FFA_SMC_32(0x63)
+#define PSA_FFA_FEATURES PSA_FFA_SMC_32(0x64)
+#define PSA_FFA_PARTITION_INFO_GET PSA_FFA_SMC_32(0x68)
+#define PSA_FFA_ID_GET PSA_FFA_SMC_32(0x69)
+
+/* PSA_FFA error codes. */
+#define PSA_FFA_RET_SUCCESS (0)
+#define PSA_FFA_RET_NOT_SUPPORTED (-1)
+#define PSA_FFA_RET_INVALID_PARAMETERS (-2)
+#define PSA_FFA_RET_NO_MEMORY (-3)
+#define PSA_FFA_RET_BUSY (-4)
+#define PSA_FFA_RET_INTERRUPTED (-5)
+#define PSA_FFA_RET_DENIED (-6)
+#define PSA_FFA_RET_RETRY (-7)
+#define PSA_FFA_RET_ABORTED (-8)
+
+#define MAJOR_VERSION_MASK GENMASK(30, 16)
+#define MINOR_VERSION_MASK GENMASK(15, 0)
+#define MAJOR_VERSION(x) (u16)(FIELD_GET(MAJOR_VERSION_MASK, (x)))
+#define MINOR_VERSION(x) (u16)(FIELD_GET(MINOR_VERSION_MASK, (x)))
+#define PACK_VERSION_INFO(major, minor) \
+ (FIELD_PREP(MAJOR_VERSION_MASK, (major)) | \
+ FIELD_PREP(MINOR_VERSION_MASK, (minor)))
+#define PSA_FFA_VERSION_1_0 PACK_VERSION_INFO(1, 0)
+#define PSA_FFA_MIN_VERSION PSA_FFA_VERSION_1_0
+#define PSA_FFA_DRIVER_VERSION PSA_FFA_VERSION_1_0
+
+#define SENDER_ID_MASK GENMASK(31, 16)
+#define RECEIVER_ID_MASK GENMASK(15, 0)
+#define SENDER_ID(x) (u16)(FIELD_GET(SENDER_ID_MASK, (x)))
+#define RECEIVER_ID(x) (u16)(FIELD_GET(RECEIVER_ID_MASK, (x)))
+#define PACK_TARGET_INFO(s, r) \
+ (FIELD_PREP(SENDER_ID_MASK, (s)) | FIELD_PREP(RECEIVER_ID_MASK, (r)))
+
+typedef struct arm_smccc_res
+(arm_psa_ffa_fn)(unsigned long, unsigned long, unsigned long, unsigned long,
+ unsigned long, unsigned long, unsigned long, unsigned long);
+static arm_psa_ffa_fn *invoke_arm_psa_ffa_fn;
+
+static struct device *psa_ffa_dev;
+
+static const int psa_ffa_linux_errmap[] = {
+ /* better than switch case as long as return value is continuous */
+ 0, /* PSA_FFA_RET_SUCCESS */
+ -EOPNOTSUPP, /* PSA_FFA_RET_NOT_SUPPORTED */
+ -EINVAL, /* PSA_FFA_RET_INVALID_PARAMETERS */
+ -ENOMEM, /* PSA_FFA_RET_NO_MEMORY */
+ -EBUSY, /* PSA_FFA_RET_BUSY */
+ -EINTR, /* PSA_FFA_RET_INTERRUPTED */
+ -EACCES, /* PSA_FFA_RET_DENIED */
+ -EAGAIN, /* PSA_FFA_RET_RETRY */
+ -ECANCELED, /* PSA_FFA_RET_ABORTED */
+};
+
+static inline int psa_ffa_to_linux_errno(int errno)
+{
+ if (errno < PSA_FFA_RET_SUCCESS && errno >= PSA_FFA_RET_ABORTED)
+ return psa_ffa_linux_errmap[-errno];
+ return -EINVAL;
+}
+
+struct arm_smccc_res
+__arm_psa_ffa_fn_smc(unsigned long function_id,unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5, unsigned long arg6)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6,
+ &res);
+
+ return res;
+}
+
+struct arm_smccc_res
+__arm_psa_ffa_fn_hvc(unsigned long function_id,unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5, unsigned long arg6)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_hvc(function_id, arg0, arg1, arg2, arg3, arg4, arg5, arg6,
+ &res);
+
+ return res;
+}
+
+static u16 psa_ffa_id_get(void)
+{
+ struct arm_smccc_res id;
+
+ id = invoke_arm_psa_ffa_fn(PSA_FFA_ID_GET, 0, 0, 0, 0, 0, 0, 0);
+
+ if (id.a0 == PSA_FFA_ERROR)
+ return psa_ffa_to_linux_errno((int)id.a2);
+ else
+ return id.a2 & 0xffff;
+}
+
+static int psa_ffa_partition_info_get(u32 uuid0, u32 uuid1, u32 uuid2, u32 uuid3,
+ struct psa_ffa_partition_info **buffer)
+{
+ struct arm_smccc_res partition_info;
+
+ partition_info = invoke_arm_psa_ffa_fn(PSA_FFA_PARTITION_INFO_GET,
+ uuid0, uuid1, uuid2, uuid3,
+ 0, 0, 0);
+
+ if (partition_info.a0 == PSA_FFA_ERROR)
+ return psa_ffa_to_linux_errno((int)partition_info.a2);
+
+ /* TODO: read data from RX buffers */
+ return partition_info.a2;
+}
+
+static struct arm_psa_ffa_handle drv_handle = {
+ .id_get = psa_ffa_id_get,
+ .partition_info_get = psa_ffa_partition_info_get,
+};
+
+struct arm_psa_ffa_handle *arm_psa_ffa_handle_get(struct device *dev)
+{
+ struct arm_psa_ffa_handle *handle = NULL;
+
+ if (dev->parent == psa_ffa_dev)
+ handle = &drv_handle;
+
+ return handle;
+}
+
+EXPORT_SYMBOL_GPL(arm_psa_ffa_handle_get);
+
+static int psa_ffa_version_check(void)
+{
+ struct arm_smccc_res version;
+
+ version = invoke_arm_psa_ffa_fn(PSA_FFA_VERSION, PSA_FFA_DRIVER_VERSION,
+ 0, 0, 0, 0, 0, 0);
+
+ if (version.a0 == PSA_FFA_RET_NOT_SUPPORTED) {
+ pr_info("PSA_FFA_VERSION returned not supported\n");
+ return -ENOTSUPP;
+ }
+
+ if (version.a0 < PSA_FFA_MIN_VERSION ||
+ version.a0 > PSA_FFA_DRIVER_VERSION) {
+ pr_err("Incompatible version %d.%d found\n",
+ MAJOR_VERSION(version.a0), MINOR_VERSION(version.a0));
+ return -EINVAL;
+ }
+
+ pr_info("Found version %d.%d found\n", MAJOR_VERSION(version.a0),
+ MINOR_VERSION(version.a0));
+ return 0;
+}
+
+static int psa_ffa_probe(struct platform_device *pdev)
+{
+ int ret;
+ enum arm_smccc_conduit conduit;
+
+ if (arm_smccc_get_version() < ARM_SMCCC_VERSION_1_2)
+ return 0;
+
+ conduit = arm_smccc_1_1_get_conduit();
+ if (conduit == SMCCC_CONDUIT_NONE) {
+ pr_err("%s: invalid SMCCC conduit\n", __func__);
+ return -EOPNOTSUPP;
+ }
+
+ if (conduit == SMCCC_CONDUIT_SMC)
+ invoke_arm_psa_ffa_fn = __arm_psa_ffa_fn_smc;
+ else
+ invoke_arm_psa_ffa_fn = __arm_psa_ffa_fn_hvc;
+
+ ret = psa_ffa_version_check();
+ if (ret)
+ return ret;
+
+ psa_ffa_dev = &pdev->dev;
+
+ return devm_of_platform_populate(psa_ffa_dev);
+}
+
+static const struct of_device_id psa_ffa_of_match[] = {
+ {.compatible = "arm,psa-ffa"},
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, psa_ffa_of_match);
+
+static struct platform_driver psa_ffa_driver = {
+ .driver = {
+ .name = "arm-psa-ffa",
+ .of_match_table = psa_ffa_of_match,
+ },
+ .probe = psa_ffa_probe,
+};
+
+module_platform_driver(psa_ffa_driver);
+
+MODULE_ALIAS("platform: arm-psa-ffa");
+MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
+MODULE_DESCRIPTION("Arm PSA FF-A interface driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/arm_psa_ffa.h b/include/linux/arm_psa_ffa.h
new file mode 100644
index 000000000000..03a4ff559fa3
--- /dev/null
+++ b/include/linux/arm_psa_ffa.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019, 2020 Arm Ltd.
+ */
+
+#ifndef __LINUX_ARM_PSA_FFA_H
+#define __LINUX_ARM_PSA_FFA_H
+
+#include <linux/device.h>
+#include <linux/types.h>
+
+struct psa_ffa_partition_info {
+ /* The ID of the VM the information is about */
+ uint16_t id;
+ /* The number of execution contexts implemented by the partition */
+ uint16_t execution_context;
+ /* The Partition's properties, e.g. supported messaging methods */
+ uint32_t partition_properties;
+};
+
+
+/**
+ * struct psa_ffa_ops - represents the various PSA_FFA protocol operations
+ * available for an endpoint.
+ */
+struct arm_psa_ffa_handle {
+ u16 (*id_get)(void);
+ int (*partition_info_get)(u32 uuid0, u32 uuid1, u32 uuid2, u32 uuid3,
+ struct psa_ffa_partition_info**);
+};
+
+#if IS_REACHABLE(CONFIG_ARM_PSA_FFA_TRANSPORT)
+struct arm_psa_ffa_handle *arm_psa_ffa_handle_get(struct device *dev);
+#else
+static inline
+struct arm_psa_ffa_handle * arm_psa_ffa_handle_get(struct device *dev)
+{
+ return NULL;
+}
+#endif
+
+#endif /*__LINUX_ARM_PSA_FFA_H*/
--
2.17.1
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^ permalink raw reply related
* [RFC PATCH 3/3] firmware: Add example PSA FF-A non-secure VM partition
From: Sudeep Holla @ 2020-06-01 9:45 UTC (permalink / raw)
To: Will Deacon, devicetree, linux-arm-kernel
Cc: Marc Zyngier, linux-kernel, Sudeep Holla
In-Reply-To: <20200601094512.50509-1-sudeep.holla@arm.com>
This is just an example non-secure VM partition to show how to create
the device and use the PSA FF-A interface APIs.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
drivers/firmware/arm_psa_ffa/Kconfig | 7 +++
drivers/firmware/arm_psa_ffa/Makefile | 1 +
drivers/firmware/arm_psa_ffa/partition.c | 71 ++++++++++++++++++++++++
3 files changed, 79 insertions(+)
create mode 100644 drivers/firmware/arm_psa_ffa/partition.c
diff --git a/drivers/firmware/arm_psa_ffa/Kconfig b/drivers/firmware/arm_psa_ffa/Kconfig
index ba699ec68ec4..34ad61e79234 100644
--- a/drivers/firmware/arm_psa_ffa/Kconfig
+++ b/drivers/firmware/arm_psa_ffa/Kconfig
@@ -13,3 +13,10 @@ config ARM_PSA_FFA_TRANSPORT
This driver provides interface for all the client drivers making
use of the features offered by ARM PSA-FF-A.
+
+config ARM_PSA_FFA_PARTITION
+ tristate "Arm PSA FF-A compliant partition"
+ depends on ARM_PSA_FFA_TRANSPORT
+ help
+ This driver provides example for ARM PSA-FF-A client driver
+ making use of the interfaces offered by ARM PSA-FF-A driver.
diff --git a/drivers/firmware/arm_psa_ffa/Makefile b/drivers/firmware/arm_psa_ffa/Makefile
index ac0455ff71a4..8eb03898baf7 100644
--- a/drivers/firmware/arm_psa_ffa/Makefile
+++ b/drivers/firmware/arm_psa_ffa/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_ARM_PSA_FFA_TRANSPORT) += driver.o
+obj-$(CONFIG_ARM_PSA_FFA_PARTITION) += partition.o
diff --git a/drivers/firmware/arm_psa_ffa/partition.c b/drivers/firmware/arm_psa_ffa/partition.c
new file mode 100644
index 000000000000..8549f8d61454
--- /dev/null
+++ b/drivers/firmware/arm_psa_ffa/partition.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Arm PSA FFA example partition driver
+ *
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+#include <linux/arm_psa_ffa.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/uuid.h>
+
+static int psa_ffa_partition_probe(struct platform_device *pdev)
+{
+ u16 vm_id;
+ uuid_t uuid;
+ const char *uuid_str;
+ u32 uuid0_4[4];
+ struct device *dev = &pdev->dev;
+ const struct device_node *np = dev->of_node;
+ struct arm_psa_ffa_handle *handle;
+ struct psa_ffa_partition_info **buffer;
+
+ handle = arm_psa_ffa_handle_get(dev);
+ if (!handle)
+ return -ENODEV;
+
+ if (of_property_read_string(np, "uuid", &uuid_str)) {
+ dev_err(dev, "failed to parse \"uuid\" property in '%pOF'\n", np);
+ return -ENODEV;
+ }
+
+ if (uuid_parse(uuid_str, &uuid)) {
+ dev_err(dev, "invalid \"uuid\" property (%s)\n", uuid_str);
+ return -ENODEV;
+ }
+
+ export_uuid((u8 *)uuid0_4, &uuid);
+
+ vm_id = handle->id_get();
+
+ handle->partition_info_get(uuid0_4[0], uuid0_4[1], uuid0_4[2],
+ uuid0_4[3], buffer);
+
+ return 0;
+}
+
+static const struct of_device_id psa_ffa_partition_of_match[] = {
+ {.compatible = "arm,psa-ffa-partition"},
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, psa_ffa_partition_of_match);
+
+static struct platform_driver psa_ffa_partition_driver = {
+ .driver = {
+ .name = "psa-ffa-partition",
+ .of_match_table = psa_ffa_partition_of_match,
+ },
+ .probe = psa_ffa_partition_probe,
+};
+
+module_platform_driver(psa_ffa_partition_driver);
+
+MODULE_ALIAS("platform: arm-psa-ffa");
+MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
+MODULE_DESCRIPTION("Arm PSA FF-A example partition driver");
+MODULE_LICENSE("GPL v2");
--
2.17.1
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^ permalink raw reply related
* [RFC PATCH 1/3] dt-bindings: Add ARM PSA FF binding for non-secure VM partitions
From: Sudeep Holla @ 2020-06-01 9:45 UTC (permalink / raw)
To: Will Deacon, devicetree, linux-arm-kernel
Cc: Marc Zyngier, linux-kernel, Sudeep Holla
In-Reply-To: <20200601094512.50509-1-sudeep.holla@arm.com>
Add devicetree bindings for a Arm PSA FF-A compliant non-secure partition
at virtual interface(VMs).
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
.../devicetree/bindings/arm/arm,psa-ffa.txt | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/arm,psa-ffa.txt
diff --git a/Documentation/devicetree/bindings/arm/arm,psa-ffa.txt b/Documentation/devicetree/bindings/arm/arm,psa-ffa.txt
new file mode 100644
index 000000000000..ee543fb5b397
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arm,psa-ffa.txt
@@ -0,0 +1,47 @@
+Arm Platform Security Architecture(PSA) Firmware Framework(FF) for Armv8-A
+--------------------------------------------------------------------------
+
+This binding is intended to define the interface the firmware framework
+implementing the Non-secure partitions/endpoints(mostly VMs) as described
+in ARM document ARM DEN 0077A ("Arm Platform Security Architecture
+Firmware Framework for Arm v8-A") [0]
+
+In the case of a Non-secure virtual FF-A instance, the hypervisor
+(e.g. Linux KVM) can use this binding to create and launch VM partitions.
+
+The SMCCC conduit available in the VM partition itself is used and hence
+there is no explicit binding to specify the conduit used for PSA FFA
+interface.
+
+Required properties:
+
+- compatible : Should be one of:
+ "arm,psa-ffa"
+
+- One or more child nodes, each describing an PSA FFA partition using the
+ following required properties:
+
+ - compatible: Should be one of:
+ "arm,psa-ffa-partition"
+
+ - uuid : The 128-bit UUID [2] of the service implemented by this partition,
+ represented as a string.
+
+[0] https://developer.arm.com/docs/den0077/latest
+[1] https://tools.ietf.org/html/rfc4122
+
+Example:
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ firmware {
+ psa-ffa {
+ compatible = "arm,psa-ffa";
+
+ partition0: psa_ffa_partition {
+ compatible = "arm,psa-ffa-partition";
+ uuid = "12345678-9abc-def0-1234-56789abcdef0";
+ };
+ };
+ };
--
2.17.1
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^ permalink raw reply related
* [RFC PATCH 0/3] firmware: Add support for PSA FF-A interface
From: Sudeep Holla @ 2020-06-01 9:45 UTC (permalink / raw)
To: Will Deacon, devicetree, linux-arm-kernel
Cc: Marc Zyngier, linux-kernel, Sudeep Holla
Hi All,
Sorry for posting in the middle of merge window and I must have done
this last week itself. This is not the driver I had thought about posting
last week. After I started cleaning up and looking at Will's KVM prototype[1]
for PSA FF-A (previously known as SPCI), I got more doubts on alignment
and dropped huge chunk of interface APIs in the driver in order to keep
it simple, and get aligned more with that prototype and avoid scanning
lots of code unnecessary.
Here are few things to clarify:
1. DT bindings
---------------
I was initially against adding bindings for Tx/Rx buffers for
partitions. As per the spec, an endpoint could allocate the
buffer pair and use the FFA_RXTX_MAP interface to map it with the
Hypervisor(KVM here). However looking at the prototype and also
I remember you mentioning that it is not possible to manage buffers
in that way. Please confirm if you plan to add the buffer details
fetcthing them through ioctls in KVM and adding them to VM DT nodes
in KVM userspace. I will update the bindings accordingly.
2. Driver
---------
a. Support for multiple partitions in a VM
------------------------------------------
I am not sure if there is need for supporting multiple partitions
within a VM. It should be possible to do so as I expect to create
device for each partition entry under arm-psa-ffa devicetree node.
However, I don't want to assume something that will never be a
usecase. However I don't think this will change must of the
abstraction as we need to keep the interface API implementation
separate to support different partitions on various platforms.
b. SMCCC interface
------------------
This is something I messed up completely while trying to add
support for SMCCC v1.2. It now supports x0-x17 as parameter
registers(input) and return registers(output). I started simple
with x0-x7 as both input and output as PSA FF-A needs that at
most. But extending to x0-x17 then became with messy in my
implementation. That's the reason I dropped it completely
here and thought of checking it first.
Do we need to extend the optimisations that were done to handle
ARCH_WORKAROUND_{1,2}. Or should be just use a version with x0-x7
as both input and ouput. Hyper-V guys need full x0-x17 support.
I need some guidance as what is the approach preferred ?
3. Partitions
-------------
I am not sure if we have a full define partition that we plan to
push upstream. Without one, we can have a sample/example partition
to test all the interface APIs, but is that fine with respect to
what we want upstream ? Any other thoughts that helps to test the
driver ?
Sorry for long email and too many questions, but I thought it is easier
this way to begin with than throwing huge code implementing loads of APIs
with no users(expect example partition) especially that I am posting this
during merge window.
Sudeep Holla (3):
dt-bindings: Add ARM PSA FF binding for non-secure VM partitions
firmware: Add support for PSA FF-A transport for VM partitions
firmware: Add example PSA FF-A non-secure VM partition
.../devicetree/bindings/arm/arm,psa-ffa.txt | 47 ++++
drivers/firmware/Kconfig | 1 +
drivers/firmware/Makefile | 1 +
drivers/firmware/arm_psa_ffa/Kconfig | 22 ++
drivers/firmware/arm_psa_ffa/Makefile | 3 +
drivers/firmware/arm_psa_ffa/driver.c | 250 ++++++++++++++++++
drivers/firmware/arm_psa_ffa/partition.c | 71 +++++
include/linux/arm_psa_ffa.h | 42 +++
8 files changed, 437 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/arm,psa-ffa.txt
create mode 100644 drivers/firmware/arm_psa_ffa/Kconfig
create mode 100644 drivers/firmware/arm_psa_ffa/Makefile
create mode 100644 drivers/firmware/arm_psa_ffa/driver.c
create mode 100644 drivers/firmware/arm_psa_ffa/partition.c
create mode 100644 include/linux/arm_psa_ffa.h
--
2.17.1
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^ permalink raw reply
* RE: [PATCH V3 2/3] arm64: dts: imx8m: add mu node
From: Aisheng Dong @ 2020-06-01 9:44 UTC (permalink / raw)
To: Peng Fan, shawnguo@kernel.org, Fabio Estevam,
kernel@pengutronix.de, robh+dt@kernel.org, sboyd@kernel.org,
linux@rempel-privat.de, jaswinder.singh@linaro.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dl-linux-imx, Leonard Crestez, Daniel Baluta,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <1590999602-29482-3-git-send-email-peng.fan@nxp.com>
> From: Peng Fan <peng.fan@nxp.com>
> Sent: Monday, June 1, 2020 4:20 PM
>
> Add mu node to let A53 could communicate with M Core.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Regards
Aisheng
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^ permalink raw reply
* Re: arm64: Register modification during syscall entry/exit stop
From: Keno Fischer @ 2020-06-01 9:40 UTC (permalink / raw)
To: Dave Martin
Cc: Kyle Huey, Catalin Marinas, Oleg Nesterov,
Linux Kernel Mailing List, Will Deacon, linux-arm-kernel
In-Reply-To: <20200601092329.GX5031@arm.com>
On Mon, Jun 1, 2020 at 5:23 AM Dave Martin <Dave.Martin@arm.com> wrote:
> > > Can't PTRACE_SYSEMU be emulated by using PTRACE_SYSCALL, cancelling the
> > > syscall at the syscall enter stop, then modifying the regs at the
> > > syscall exit stop?
> >
> > Yes, it can. The idea behind SYSEMU is to be able to save half the
> > ptrace traps that would require, in theory making the ptracer
> > a decent amount faster. That said, the x7 issue is orthogonal to
> > SYSEMU, you'd have the same issues if you used PTRACE_SYSCALL.
>
> Right, I just wondered whether there was some deeper difference between
> the two approaches.
You're asking about a new regset vs trying to do it via ptrace option?
I don't think there's anything a ptrace option can do that a new regset
that replicates the same registers (I'm gonna propose adding orig_x0,
while we're at it and changing the x0 semantics a bit, will have
those details with the patch) wouldn't be able to do . The reason I
originally thought it might have to be a ptrace option is because
the register modification currently gets applied in the syscall entry
code to the actual regs struct, so I thought you might have to know
to preserve those registers. However, then I realized that you could
just change the regset accessors to emulate the old behavior, since
we do already store all the required information (what kind of stop
we're currently at) in order to be able to answer the ptrace
informational queries. So doing that it probably just all around
easier. I guess NT_PRSTATUS might also rot, but I guess strace
doesn't really have to stop using it, since it doesn't care about
the x7 value nor does it need to modify it.
Keno
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^ permalink raw reply
* Re: [RFC PATCH v5 1/6] dt-bindings: exynos-bus: Add documentation for interconnect properties
From: Sylwester Nawrocki @ 2020-06-01 9:40 UTC (permalink / raw)
To: Chanwoo Choi
Cc: devicetree, linux-samsung-soc, Rob Herring,
Bartlomiej Zolnierkiewicz, Seung-Woo Kim, Artur Świgoń,
Krzysztof Kozlowski, linux-kernel, inki.dae, Chanwoo Choi,
MyungJoo Ham, dri-devel, Georgi Djakov, linux-arm-kernel,
Marek Szyprowski
In-Reply-To: <CAGTfZH1yM0KRaEF5VTs2juTm+yrK9VqQZxWjdNf_ffjGHWPLsg@mail.gmail.com>
Hi Chanwoo,
On 31.05.2020 02:01, Chanwoo Choi wrote:
> On Sat, May 30, 2020 at 1:32 AM Sylwester Nawrocki
> <s.nawrocki@samsung.com> wrote:
>>
>> Add documentation for new optional properties in the exynos bus nodes:
>> samsung,interconnect-parent, #interconnect-cells.
>> These properties allow to specify the SoC interconnect structure which
>> then allows the interconnect consumer devices to request specific
>> bandwidth requirements.
>>
>> Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
>> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
>> ---
>> Changes for v5:
>> - exynos,interconnect-parent-node renamed to samsung,interconnect-parent
>> ---
>> Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 15 +++++++++++++--
>> 1 file changed, 13 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> index e71f752..e0d2daa 100644
>> --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
>> @@ -51,6 +51,11 @@ Optional properties only for parent bus device:
>> - exynos,saturation-ratio: the percentage value which is used to calibrate
>> the performance count against total cycle count.
>>
>> +Optional properties for interconnect functionality (QoS frequency constraints):
>> +- samsung,interconnect-parent: phandle to the parent interconnect node; for
>> + passive devices should point to same node as the exynos,parent-bus property.
>> +- #interconnect-cells: should be 0
>> +
>> Detailed correlation between sub-blocks and power line according to Exynos SoC:
>> - In case of Exynos3250, there are two power line as following:
>> VDD_MIF |--- DMC
>> @@ -185,8 +190,9 @@ Example1:
>> ----------------------------------------------------------
>>
>> Example2 :
>> - The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
>> - is listed below:
>> + The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi is
>> + listed below. An interconnect path "bus_lcd0 -- bus_leftbus -- bus_dmc"
>> + is defined for demonstration purposes.
>>
>> bus_dmc: bus_dmc {
>> compatible = "samsung,exynos-bus";
>> @@ -376,12 +382,15 @@ Example2 :
>> &bus_dmc {
>> devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
>> vdd-supply = <&buck1_reg>; /* VDD_MIF */
>> + #interconnect-cells = <0>;
>> status = "okay";
>> };
>>
>> &bus_leftbus {
>> devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
>> vdd-supply = <&buck3_reg>;
>> + samsung,interconnect-parent = <&bus_dmc>;
>> + #interconnect-cells = <0>;
>> status = "okay";
>> };
>>
>> @@ -392,6 +401,8 @@ Example2 :
>>
>> &bus_lcd0 {
>> devfreq = <&bus_leftbus>;
>> + samsung,interconnect-parent = <&bus_leftbus>;
>> + #interconnect-cells = <0>;
>> status = "okay";
>> };
>>
>> --
>> 2.7.4
>>
>
> If you add the usage example like the mixer device of patch5 to this
> dt-binding document,
> I think it is very beneficial and more helpful for user of
> exynos-bus/exynos-generic-icc.
>
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Thanks for review. I will make sure the example includes a consumer
in next version. Will also mention ../interconnect/interconnect.txt
in description of the #interconnect-cells property.
--
Regards,
Sylwester
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^ permalink raw reply
* Re: [PATCH v13 1/3] dt-bindings: Add keypad devicetree documentation
From: Andy Shevchenko @ 2020-06-01 9:32 UTC (permalink / raw)
To: Fengping Yu
Cc: Dmitry Torokhov, Marco Felsch, linux-mediatek, linux-input,
Yingjoe Chen, linux-arm-kernel
In-Reply-To: <20200601022548.18213-2-fengping.yu@mediatek.com>
On Mon, Jun 01, 2020 at 10:25:47AM +0800, Fengping Yu wrote:
> From: "fengping.yu" <fengping.yu@mediatek.com>
>
> Add Mediatek matrix keypad dt-bindings doc as yaml schema.
>
> Signed-off-by: fengping.yu <fengping.yu@mediatek.com>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
I didn't review this.
> ---
> .../devicetree/bindings/input/mtk-kpd.yaml | 95 +++++++++++++++++++
> 1 file changed, 95 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/input/mtk-kpd.yaml
>
> diff --git a/Documentation/devicetree/bindings/input/mtk-kpd.yaml b/Documentation/devicetree/bindings/input/mtk-kpd.yaml
> new file mode 100644
> index 000000000000..586cd196dd00
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/input/mtk-kpd.yaml
> @@ -0,0 +1,95 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +version: 1
> +
> +$id: http://devicetree.org/schemas/input/mtk-keypad.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek's Keypad Controller device tree bindings
> +
> +maintainer:
> + - Fengping Yu <fengping.yu@mediatek.com>
> +
> +description: |
> + Mediatek's Keypad controller is used to interface a SoC with a matrix-type
> + keypad device. The keypad controller supports multiple row and column lines.
> + A key can be placed at each intersection of a unique row and a unique column.
> + The keypad controller can sense a key-press and key-release and report the
> + event using a interrupt to the cpu.
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: "mediatek,mt6779-keypad"
> + - const: "mediatek,mt6873-keypad"
> +
> + clock-names:
> + description: Names of the clocks listed in clocks property in the same order
> + maxItems: 1
> +
> + clocks:
> + description: Must contain one entry, for the module clock
> + refs: devicetree/bindings/clocks/clock-bindings.txt for details.
> +
> + interrupts:
> + description: A single interrupt specifier
> + maxItems: 1
> +
> + linux,keymap:
> + description: The keymap for keys as described in the binding document
> + refs: devicetree/bindings/input/matrix-keymap.txt
> + minItems: 1
> + maxItems: 16
> +
> + pinctrl-0:
> + description: Specify pin control groups used for this controller
> + refs: devicetree/bindings/pinctrl/pinctrl-bindings.txt
> +
> + pinctrl-names:
> + description: Names for optional pin modes
> + maxItems: 1
> +
> + reg:
> + description: The base address of the Keypad register bank
> + maxItems: 1
> +
> + wakeup-source:
> + description: use any event on keypad as wakeup event
> + type: boolean
> +
> + keypad,num-columns:
> + description: Number of column lines connected to the keypad controller,
> + it is not equal to PCB columns number, instead you should add required value
> + for each IC
> +
> + keypad,num-rows:
> + description: Number of row lines connected to the keypad controller, it is
> + not equal to PCB rows number, instead you should add required value for each IC
> +
> + mediatek,debounce-us:
> + description: Debounce interval in microseconds
> + maximum: 256000
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - linux,keymap
> + - pinctrl
> + - clocks
> + - clock-names
> +
> +examples:
> + - |
> +
> + keypad: kp@10010000 {
> + compatible = "mediatek,mt6779-keypad";
> + reg = <0 0x10010000 0 0x1000>;
> + linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN) >;
> + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_FALLING>;
> + clocks = <&clk26m>;
> + clock-names = "kpd";
> + pinctrl-names = "default";
> + pinctrl-0 = <&kpd_gpios_def_cfg>;
> + };
> --
> 2.18.0
--
With Best Regards,
Andy Shevchenko
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^ permalink raw reply
* Re: [PATCH v13 3/3] configs: defconfig: Add CONFIG_KEYBOARD_MTK_KPD=m
From: Andy Shevchenko @ 2020-06-01 9:32 UTC (permalink / raw)
To: Fengping Yu
Cc: Dmitry Torokhov, Marco Felsch, linux-mediatek, linux-input,
Yingjoe Chen, linux-arm-kernel
In-Reply-To: <20200601022548.18213-4-fengping.yu@mediatek.com>
On Mon, Jun 01, 2020 at 10:25:51AM +0800, Fengping Yu wrote:
> From: "fengping.yu" <fengping.yu@mediatek.com>
>
> Add Mediatek matrix keypad support in defconfig.
I didn't review this either, but it's fine to me.
> Signed-off-by: fengping.yu <fengping.yu@mediatek.com>
> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 24e534d85045..112ced090b21 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -349,6 +349,7 @@ CONFIG_KEYBOARD_GPIO=y
> CONFIG_KEYBOARD_SNVS_PWRKEY=m
> CONFIG_KEYBOARD_IMX_SC_KEY=m
> CONFIG_KEYBOARD_CROS_EC=y
> +CONFIG_KEYBOARD_MTK_KPD=m
> CONFIG_INPUT_TOUCHSCREEN=y
> CONFIG_TOUCHSCREEN_ATMEL_MXT=m
> CONFIG_INPUT_MISC=y
> --
> 2.18.0
--
With Best Regards,
Andy Shevchenko
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* Re: arm64: Register modification during syscall entry/exit stop
From: Keno Fischer @ 2020-06-01 9:23 UTC (permalink / raw)
To: Dave Martin
Cc: Kyle Huey, Catalin Marinas, Linux Kernel Mailing List,
Oleg Nesterov, Will Deacon, linux-arm-kernel
In-Reply-To: <20200601091441.GW5031@arm.com>
On Mon, Jun 1, 2020 at 5:14 AM Dave Martin <Dave.Martin@arm.com> wrote:
> Can you explain why userspace would write a changed value for x7
> but at the same time need that new to be thrown away?
The discarding behavior is the primary reason things aren't completely
broken at the moment. If it read the wrong x7 value and didn't know about
the Aarch64 quirk, it's often just trying to write that same wrong
value back during the next stop, so if that's just ignored,
that's probably fine in 99% of cases, since the value in the
tracee will be undisturbed.
I don't think there's a sane way to change the aarch64 NT_PRSTATUS
semantics without just completely removing the x7 behavior, but of course
people may be relying on that (I think somebody said upthread that strace does?)
Keno
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* Re: arm64: Register modification during syscall entry/exit stop
From: Dave Martin @ 2020-06-01 9:23 UTC (permalink / raw)
To: Keno Fischer
Cc: Kyle Huey, Catalin Marinas, Oleg Nesterov,
Linux Kernel Mailing List, Will Deacon, linux-arm-kernel
In-Reply-To: <CABV8kRwhsPhhqUXS46Rwh-xDEDY2q=KSd-xz1W-pu4Gy4KVp8Q@mail.gmail.com>
On Sun, May 31, 2020 at 12:20:51PM -0400, Keno Fischer wrote:
> > Can't PTRACE_SYSEMU be emulated by using PTRACE_SYSCALL, cancelling the
> > syscall at the syscall enter stop, then modifying the regs at the
> > syscall exit stop?
>
> Yes, it can. The idea behind SYSEMU is to be able to save half the
> ptrace traps that would require, in theory making the ptracer
> a decent amount faster. That said, the x7 issue is orthogonal to
> SYSEMU, you'd have the same issues if you used PTRACE_SYSCALL.
Right, I just wondered whether there was some deeper difference between
the two approaches.
Cheers
---Dave
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* Re: [PATCH RFCv2 9/9] arm64: Support async page fault
From: Paolo Bonzini @ 2020-06-01 9:21 UTC (permalink / raw)
To: Marc Zyngier
Cc: Gavin Shan, catalin.marinas, linux-kernel, shan.gavin, will,
kvmarm, linux-arm-kernel
In-Reply-To: <4337cca152df47c93d96e092189a0e36@kernel.org>
On 31/05/20 14:44, Marc Zyngier wrote:
>>
>> Is there an ARM-approved way to reuse the S2 fault syndromes to detect
>> async page faults?
>
> It would mean being able to set an ESR_EL2 register value into ESR_EL1,
> and there is nothing in the architecture that would allow that,
I understand that this is not what you want to do and I'm not proposing
it, but I want to understand this better: _in practice_ do CPUs check
closely what is written in ESR_EL1?
In any case, the only way to implement this, it seems to me, would be a
completely paravirtualized exception vector that doesn't use ESR at all.
On the other hand, for the page ready (interrupt) side assigning a PPI
seems complicated but doable.
Paolo
> with
> the exception of nested virt: a VHE guest hypervisor running at EL1
> must be able to observe S2 faults for its own S2, as synthesized by
> the host hypervisor.
> The trouble is that:
> - there is so far no commercially available CPU supporting NV
> - even if you could get hold of such a machine, there is no
> guarantee that such "EL2 syndrome at EL1" is valid outside of
> the nested context
> - this doesn't solve the issue for non-NV CPUs anyway
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* Re: [PATCH v8 3/8] PM / EM: update callback structure and add device pointer
From: Lukasz Luba @ 2020-06-01 9:20 UTC (permalink / raw)
To: Daniel Lezcano, linux-kernel, linux-pm, linux-arm-kernel,
dri-devel, linux-omap, linux-mediatek, linux-arm-msm, linux-imx
Cc: nm, juri.lelli, peterz, viresh.kumar, liviu.dudau,
bjorn.andersson, bsegall, festevam, mka, robh, amit.kucheria,
lorenzo.pieralisi, khilman, steven.price, cw00.choi, mingo,
mgorman, rui.zhang, alyssa.rosenzweig, orjan.eide, daniel,
b.zolnierkie, s.hauer, rostedt, matthias.bgg, Dietmar.Eggemann,
airlied, tomeu.vizoso, qperret, sboyd, rdunlap, rjw, agross,
kernel, sudeep.holla, patrick.bellasi, shawnguo
In-Reply-To: <666b2f9e-d7ed-6ddb-80aa-e63ab9909ee6@linaro.org>
On 5/29/20 6:43 PM, Daniel Lezcano wrote:
> On 27/05/2020 11:58, Lukasz Luba wrote:
>> The Energy Model framework is going to support devices other that CPUs. In
>> order to make this happen change the callback function and add pointer to
>> a device as an argument.
>>
>> Update the related users to use new function and new callback from the
>> Energy Model.
>>
>> Acked-by: Quentin Perret <qperret@google.com>
>> Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
>
> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
>
Thank you Daniel!
Regards,
Lukasz
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* Re: arm64: Register modification during syscall entry/exit stop
From: Dave Martin @ 2020-06-01 9:14 UTC (permalink / raw)
To: Keno Fischer
Cc: Kyle Huey, Catalin Marinas, Linux Kernel Mailing List,
Oleg Nesterov, Will Deacon, linux-arm-kernel
In-Reply-To: <CABV8kRyHo+EAWaMUzGA220z=HJRBCpH6UWiYGb84uSL3h8HQHw@mail.gmail.com>
On Sun, May 31, 2020 at 12:13:18PM -0400, Keno Fischer wrote:
> > Keno -- are you planning to send out a patch? You previously spoke about
> > implementing this using PTRACE_SETOPTIONS.
>
> Yes, I'll have a patch for you. Though I've come to the conclusion
> that introducing a new regset is probably a better way to solve it.
> We can then also expose orig_x0 at the same time and give it sane semantics
> (there's some problems with the way it works currently - I'll write it up
> together with the patch).
I'd worry that having a new ptrace option would be useless bug-
compatibility that is just going to bitrot.
Can you explain why userspace would write a changed value for x7
but at the same time need that new to be thrown away?
That sounds like a nonsensical thing for userspace to be doing.
Cheers
---Dave
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* Re: [Linux-stm32] [PATCH v8 08/10] drm: stm: dw-mipi-dsi: let the bridge handle the HW version check
From: Adrian Ratiu @ 2020-06-01 9:15 UTC (permalink / raw)
To: Philippe CORNU, Adrian Ratiu,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org, Laurent Pinchart
Cc: Jernej Skrabec, Heiko Stuebner, Adrian Pop, Jonas Karlman,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Yannick FERTRE, Andrzej Hajda, linux-imx@nxp.com,
kernel@collabora.com, linux-stm32@st-md-mailman.stormreply.com,
Arnaud Ferraris, Benjamin GAIGNARD
In-Reply-To: <4acc09e8-0610-01f6-b18d-3ffc390c45a3@st.com>
On Fri, 29 May 2020, Philippe CORNU <philippe.cornu@st.com> wrote:
> Hi Adrian, and thank you very much for the patchset. Thank you
> also for having tested it on STM32F769 and STM32MP1. Sorry for
> the late response, Yannick and I will review it as soon as
> possible and we will keep you posted. Note: Do not hesitate to
> put us in copy for the next version (philippe.cornu@st.com,
> yannick.fertre@st.com) Regards, Philippe :-)
Hi Philippe,
Thank you very much for your previous and future STM testing,
really appreciate it! I've CC'd Yannick until now but I'll also CC
you sure :)
It's been over a month since I posted v8 and I was just gearing up
to address all feedback, rebase & retest to prepare v9 but I'll
wait a little longer, no problem, it's no rush.
Have an awesome day,
Adrian
>
>
> On 4/27/20 10:19 AM, Adrian Ratiu wrote:
>> The stm mipi-dsi platform driver added a version test in
>> commit fa6251a747b7 ("drm/stm: dsi: check hardware version")
>> so that HW revisions other than v1.3x get rejected. The rockchip
>> driver had no such check and just assumed register layouts are
>> v1.3x compatible.
>>
>> Having such tests was a good idea because only v130/v131 layouts
>> were supported at the time, however since adding multiple layout
>> support in the bridge, the version is automatically checked for
>> all drivers, compatible layouts get picked and unsupported HW is
>> automatically rejected by the bridge, so there's no use keeping
>> the test in the stm driver.
>>
>> The main reason prompting this change is that the stm driver
>> test immediately disabled the peripheral clock after reading
>> the version, making the bridge read version 0x0 immediately
>> after in its own probe(), so we move the clock disabling after
>> the bridge does the version test.
>>
>> Tested on STM32F769 and STM32MP1.
>>
>> Cc: linux-stm32@st-md-mailman.stormreply.com
>> Reported-by: Adrian Pop <pop.adrian61@gmail.com>
>> Tested-by: Adrian Pop <pop.adrian61@gmail.com>
>> Tested-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
>> Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com>
>> ---
>> New in v6.
>> ---
>> drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 12 +++---------
>> 1 file changed, 3 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> index 2e1f2664495d0..7218e405d7e2b 100644
>> --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
>> @@ -402,15 +402,6 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
>> goto err_dsi_probe;
>> }
>>
>> - dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
>> - clk_disable_unprepare(pclk);
>> -
>> - if (dsi->hw_version != HWVER_130 && dsi->hw_version != HWVER_131) {
>> - ret = -ENODEV;
>> - DRM_ERROR("bad dsi hardware version\n");
>> - goto err_dsi_probe;
>> - }
>> -
>> dw_mipi_dsi_stm_plat_data.base = dsi->base;
>> dw_mipi_dsi_stm_plat_data.priv_data = dsi;
>>
>> @@ -423,6 +414,9 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev)
>> goto err_dsi_probe;
>> }
>>
>> + dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION;
>> + clk_disable_unprepare(pclk);
>> +
>> return 0;
>>
>> err_dsi_probe:
>>
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