* [PATCH 2/3] dt-bindings: i2c: Convert mxs i2c to json-schema
From: Anson Huang @ 2020-06-03 1:58 UTC (permalink / raw)
To: aisheng.dong, robh+dt, shawnguo, s.hauer, kernel, festevam, linux,
pandy.gao, wolfram, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel
Cc: Linux-imx
In-Reply-To: <1591149535-342-1-git-send-email-Anson.Huang@nxp.com>
Convert the MXS I2C binding to DT schema format using json-schema
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Documentation/devicetree/bindings/i2c/i2c-mxs.txt | 25 ----------
Documentation/devicetree/bindings/i2c/i2c-mxs.yaml | 55 ++++++++++++++++++++++
2 files changed, 55 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-mxs.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-mxs.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt b/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
deleted file mode 100644
index 4e1c8ac..0000000
--- a/Documentation/devicetree/bindings/i2c/i2c-mxs.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-* Freescale MXS Inter IC (I2C) Controller
-
-Required properties:
-- compatible: Should be "fsl,<chip>-i2c"
-- reg: Should contain registers location and length
-- interrupts: Should contain ERROR interrupt number
-- clock-frequency: Desired I2C bus clock frequency in Hz.
- Only 100000Hz and 400000Hz modes are supported.
-- dmas: DMA specifier, consisting of a phandle to DMA controller node
- and I2C DMA channel ID.
- Refer to dma.txt and fsl-mxs-dma.txt for details.
-- dma-names: Must be "rx-tx".
-
-Examples:
-
-i2c0: i2c@80058000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,imx28-i2c";
- reg = <0x80058000 2000>;
- interrupts = <111>;
- clock-frequency = <100000>;
- dmas = <&dma_apbx 6>;
- dma-names = "rx-tx";
-};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mxs.yaml b/Documentation/devicetree/bindings/i2c/i2c-mxs.yaml
new file mode 100644
index 0000000..7adcba3
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-mxs.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/i2c-mxs.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale MXS Inter IC (I2C) Controller
+
+maintainers:
+ - Shawn Guo <shawn.guo@linaro.org>
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx23-i2c
+ - fsl,imx28-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-frequency:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Desired I2C bus clock frequency in Hz, only 100000Hz and 400000Hz
+ modes are supported.
+ default: 100000
+
+ dmas:
+ maxItems: 1
+
+ dma-names:
+ const: rx-tx
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - dmas
+ - dma-names
+
+examples:
+ - |
+ i2c@80058000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx28-i2c";
+ reg = <0x80058000 2000>;
+ interrupts = <111>;
+ clock-frequency = <100000>;
+ dmas = <&dma_apbx 6>;
+ dma-names = "rx-tx";
+ };
--
2.7.4
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* [PATCH 3/3] dt-bindings: i2c: Convert imx i2c to json-schema
From: Anson Huang @ 2020-06-03 1:58 UTC (permalink / raw)
To: aisheng.dong, robh+dt, shawnguo, s.hauer, kernel, festevam, linux,
pandy.gao, wolfram, linux-i2c, devicetree, linux-arm-kernel,
linux-kernel
Cc: Linux-imx
In-Reply-To: <1591149535-342-1-git-send-email-Anson.Huang@nxp.com>
Convert the i.MX I2C binding to DT schema format using json-schema,
some improvements applied, such as update example based on latest DT
file, add more compatible for existing SoCs, and remove unnecessary
common property "pinctrl".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Documentation/devicetree/bindings/i2c/i2c-imx.txt | 49 ---------
Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 118 +++++++++++++++++++++
2 files changed, 118 insertions(+), 49 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-imx.txt
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-imx.yaml
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
deleted file mode 100644
index b967544..0000000
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
-
-Required properties:
-- compatible :
- - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
- - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
- - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
-- reg : Should contain I2C/HS-I2C registers location and length
-- interrupts : Should contain I2C/HS-I2C interrupt
-- clocks : Should contain the I2C/HS-I2C clock specifier
-
-Optional properties:
-- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
- The absence of the property indicates the default frequency 100 kHz.
-- dmas: A list of two dma specifiers, one for each entry in dma-names.
-- dma-names: should contain "tx" and "rx".
-- scl-gpios: specify the gpio related to SCL pin
-- sda-gpios: specify the gpio related to SDA pin
-- pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
- bus recovery, call it "gpio" state
-
-Examples:
-
-i2c@83fc4000 { /* I2C2 on i.MX51 */
- compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
- reg = <0x83fc4000 0x4000>;
- interrupts = <63>;
-};
-
-i2c@70038000 { /* HS-I2C on i.MX51 */
- compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
- reg = <0x70038000 0x4000>;
- interrupts = <64>;
- clock-frequency = <400000>;
-};
-
-i2c0: i2c@40066000 { /* i2c0 on vf610 */
- compatible = "fsl,vf610-i2c";
- reg = <0x40066000 0x1000>;
- interrupts =<0 71 0x04>;
- dmas = <&edma0 0 50>,
- <&edma0 0 51>;
- dma-names = "rx","tx";
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c1>;
- pinctrl-1 = <&pinctrl_i2c1_gpio>;
- scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
- sda-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
-};
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
new file mode 100644
index 0000000..0d31d1c
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
@@ -0,0 +1,118 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
+
+maintainers:
+ - Wolfram Sang <wolfram@the-dreams.de>
+
+properties:
+ compatible:
+ oneOf:
+ - const: fsl,imx1-i2c
+ - const: fsl,imx21-i2c
+ - const: fsl,vf610-i2c
+ - items:
+ - const: fsl,imx35-i2c
+ - const: fsl,imx1-i2c
+ - items:
+ - enum:
+ - fsl,imx25-i2c
+ - fsl,imx27-i2c
+ - fsl,imx31-i2c
+ - fsl,imx50-i2c
+ - fsl,imx51-i2c
+ - fsl,imx53-i2c
+ - fsl,imx6q-i2c
+ - fsl,imx6sl-i2c
+ - fsl,imx6sx-i2c
+ - fsl,imx6sll-i2c
+ - fsl,imx6ul-i2c
+ - fsl,imx7s-i2c
+ - fsl,imx8mq-i2c
+ - fsl,imx8mm-i2c
+ - fsl,imx8mn-i2c
+ - fsl,imx8mp-i2c
+ - const: fsl,imx21-i2c
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-frequency:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Constains desired I2C/HS-I2C bus clock frequency in Hz.
+ The absence of the property indicates the default frequency 100 kHz.
+ default: 100000
+
+ dmas:
+ items:
+ - description: DMA controller phandle and request line for RX
+ - description: DMA controller phandle and request line for TX
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ sda-gpios:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ gpio used for the sda signal, this should be flagged as
+ active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
+ from <dt-bindings/gpio/gpio.h> since the signal is by definition
+ open drain.
+ maxItems: 1
+
+ scl-gpios:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ gpio used for the scl signal, this should be flagged as
+ active high using open drain with (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)
+ from <dt-bindings/gpio/gpio.h> since the signal is by definition
+ open drain.
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx5-clock.h>
+ #include <dt-bindings/clock/vf610-clock.h>
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ i2c@83fc4000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
+ reg = <0x83fc4000 0x4000>;
+ interrupts = <63>;
+ clocks = <&clks IMX5_CLK_I2C2_GATE>;
+ };
+
+ i2c@40066000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,vf610-i2c";
+ reg = <0x40066000 0x1000>;
+ interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks VF610_CLK_I2C0>;
+ clock-names = "ipg";
+ dmas = <&edma0 0 50>,
+ <&edma0 0 51>;
+ dma-names = "rx","tx";
+ };
--
2.7.4
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* Re: [PATCH] scsi: ufs: Remove redundant urgent_bkop_lvl initialization
From: Martin K. Petersen @ 2020-06-03 2:31 UTC (permalink / raw)
To: avri.altman, linux-scsi, Stanley Chu, alim.akhtar, jejb
Cc: bvanassche, Martin K . Petersen, andy.teng, cc.chou, chun-hung.wu,
kuohong.wang, peter.wang, linux-kernel, cang, linux-mediatek,
chaotian.jing, matthias.bgg, asutoshd, linux-arm-kernel, beanhuo
In-Reply-To: <20200530141200.4616-1-stanley.chu@mediatek.com>
On Sat, 30 May 2020 22:12:00 +0800, Stanley Chu wrote:
> In ufshcd_probe_hba(), all BKOP SW tracking variables can be reset
> together in ufshcd_force_reset_auto_bkops(), thus urgent_bkop_lvl
> initialization in the beginning of ufshcd_probe_hba() can be merged
> into ufshcd_force_reset_auto_bkops().
Applied to 5.8/scsi-queue, thanks!
[1/1] scsi: ufs: Remove redundant urgent_bkop_lvl initialization
https://git.kernel.org/mkp/scsi/c/7b6668d8b806
--
Martin K. Petersen Oracle Linux Engineering
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^ permalink raw reply
* Re: [PATCH v10 00/10] exynos-ufs: Add support for UFS HCI
From: Martin K. Petersen @ 2020-06-03 2:31 UTC (permalink / raw)
To: robh, Alim Akhtar
Cc: devicetree, linux-samsung-soc, Martin K . Petersen, linux-scsi,
linux-kernel, krzk, kwmad.kim, avri.altman, cang, stanley.chu,
linux-arm-kernel
In-Reply-To: <20200528011658.71590-1-alim.akhtar@samsung.com>
On Thu, 28 May 2020 06:46:48 +0530, Alim Akhtar wrote:
> This patch-set introduces UFS (Universal Flash Storage) host
> controller support for Samsung family SoC. Mostly, it consists of
> UFS PHY and host specific driver.
> [...]
Applied [1,2,3,4,5,9] to 5.9/scsi-queue. The series won't show up in
my public tree until shortly after -rc1 is released.
Thanks!
--
Martin K. Petersen Oracle Linux Engineering
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* [PATCH 0/3] support per-numa CMA for ARM server
From: Barry Song @ 2020-06-03 2:42 UTC (permalink / raw)
To: hch, m.szyprowski, robin.murphy, catalin.marinas
Cc: Barry Song, john.garry, linux-kernel, linuxarm, iommu, prime.zeng,
Jonathan.Cameron, linux-arm-kernel
Right now, smmu is using dma_alloc_coherent() to get memory to save queues
and tables. Typically, on ARM64 server, there is a default CMA located at
node0, which could be far away from node2, node3 etc.
Saving queues and tables remotely will increase the latency of ARM SMMU
significantly. For example, when SMMU is at node2 and the default global
CMA is at node0, after sending a CMD_SYNC in an empty command queue, we
have to wait more than 550ns for the completion of the command CMD_SYNC.
However, if we save them locally, we only need to wait for 240ns.
with per-numa CMA, smmu will get memory from local numa node to save command
queues and page tables. that means dma_unmap latency will be shrunk much.
Meanwhile, when iommu.passthrough is on, device drivers which call dma_
alloc_coherent() will also get local memory and avoid the travel between
numa nodes.
Barry Song (3):
dma-direct: provide the ability to reserve per-numa CMA
arm64: mm: reserve hugetlb CMA after numa_init
arm64: mm: reserve per-numa CMA after numa_init
arch/arm64/mm/init.c | 12 ++++++----
include/linux/dma-contiguous.h | 4 ++++
kernel/dma/Kconfig | 10 ++++++++
kernel/dma/contiguous.c | 43 +++++++++++++++++++++++++++++++++-
4 files changed, 63 insertions(+), 6 deletions(-)
--
2.23.0
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* [PATCH 1/3] dma-direct: provide the ability to reserve per-numa CMA
From: Barry Song @ 2020-06-03 2:42 UTC (permalink / raw)
To: hch, m.szyprowski, robin.murphy, catalin.marinas
Cc: Barry Song, john.garry, linux-kernel, linuxarm, iommu, prime.zeng,
Jonathan.Cameron, Will Deacon, linux-arm-kernel
In-Reply-To: <20200603024231.61748-1-song.bao.hua@hisilicon.com>
This is useful for two scenarios:
1. ARM64 smmu will get memory from local numa node, it can save its
command queues and page tables locally. Tests show it can decrease
dma_unmap latency at lot. For example, without this patch, smmu on
node2 will get memory from node0 by calling dma_alloc_coherent(),
typically, it has to wait for more than 560ns for the completion of
CMD_SYNC in an empty command queue; with this patch, it needs 240ns
only.
2. when we set iommu passthrough, drivers will get memory from CMA,
local memory means much less latency.
Cc: Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
---
include/linux/dma-contiguous.h | 4 ++++
kernel/dma/Kconfig | 10 +++++++++
kernel/dma/contiguous.c | 41 +++++++++++++++++++++++++++++++++-
3 files changed, 54 insertions(+), 1 deletion(-)
diff --git a/include/linux/dma-contiguous.h b/include/linux/dma-contiguous.h
index 03f8e98e3bcc..278a80a40456 100644
--- a/include/linux/dma-contiguous.h
+++ b/include/linux/dma-contiguous.h
@@ -79,6 +79,8 @@ static inline void dma_contiguous_set_default(struct cma *cma)
void dma_contiguous_reserve(phys_addr_t addr_limit);
+void dma_pernuma_cma_reserve(void);
+
int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
phys_addr_t limit, struct cma **res_cma,
bool fixed);
@@ -128,6 +130,8 @@ static inline void dma_contiguous_set_default(struct cma *cma) { }
static inline void dma_contiguous_reserve(phys_addr_t limit) { }
+static inline void dma_pernuma_cma_reserve(void) { }
+
static inline int dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
phys_addr_t limit, struct cma **res_cma,
bool fixed)
diff --git a/kernel/dma/Kconfig b/kernel/dma/Kconfig
index 4c103a24e380..14f4a1fe4285 100644
--- a/kernel/dma/Kconfig
+++ b/kernel/dma/Kconfig
@@ -100,6 +100,16 @@ config DMA_CMA
if DMA_CMA
comment "Default contiguous memory area size:"
+config CMA_PERNUMA_SIZE_MBYTES
+ int "Size in Mega Bytes for per-numa CMA areas"
+ depends on NUMA
+ default 16 if ARM64
+ default 0
+ help
+ Defines the size (in MiB) of the per-numa memory area for Contiguous
+ Memory Allocator. Every numa node will get a separate CMA with this
+ size. If the size of 0 is selected, per-numa CMA is disabled.
+
config CMA_SIZE_MBYTES
int "Size in Mega Bytes"
depends on !CMA_SIZE_SEL_PERCENTAGE
diff --git a/kernel/dma/contiguous.c b/kernel/dma/contiguous.c
index 8bc6f2d670f9..4b10d0ca0456 100644
--- a/kernel/dma/contiguous.c
+++ b/kernel/dma/contiguous.c
@@ -30,7 +30,14 @@
#define CMA_SIZE_MBYTES 0
#endif
+#ifdef CONFIG_CMA_PERNUMA_SIZE_MBYTES
+#define CMA_SIZE_PERNUMA_MBYTES CONFIG_CMA_PERNUMA_SIZE_MBYTES
+#else
+#define CMA_SIZE_PERNUMA_MBYTES 0
+#endif
+
struct cma *dma_contiguous_default_area;
+struct cma *dma_contiguous_pernuma_area[MAX_NUMNODES];
/*
* Default global CMA area size can be defined in kernel's .config.
@@ -44,6 +51,8 @@ struct cma *dma_contiguous_default_area;
*/
static const phys_addr_t size_bytes __initconst =
(phys_addr_t)CMA_SIZE_MBYTES * SZ_1M;
+static const phys_addr_t pernuma_size_bytes __initconst =
+ (phys_addr_t)CMA_SIZE_PERNUMA_MBYTES * SZ_1M;
static phys_addr_t size_cmdline __initdata = -1;
static phys_addr_t base_cmdline __initdata;
static phys_addr_t limit_cmdline __initdata;
@@ -96,6 +105,31 @@ static inline __maybe_unused phys_addr_t cma_early_percent_memory(void)
#endif
+void __init dma_pernuma_cma_reserve(void)
+{
+ int nid;
+
+ if (!pernuma_size_bytes || nr_online_nodes <= 1)
+ return;
+
+ for_each_node_state(nid, N_ONLINE) {
+ int ret;
+
+ ret = cma_declare_contiguous_nid(0, pernuma_size_bytes, 0, 0,
+ 0, false, "pernuma",
+ &dma_contiguous_pernuma_area[nid],
+ nid);
+ if (ret) {
+ pr_warn("%s: reservation failed: err %d, node %d", __func__,
+ ret, nid);
+ continue;
+ }
+
+ pr_debug("%s: reserved %llu MiB on node %d\n", __func__,
+ pernuma_size_bytes / SZ_1M, nid);
+ }
+}
+
/**
* dma_contiguous_reserve() - reserve area(s) for contiguous memory handling
* @limit: End address of the reserved memory (optional, 0 for any).
@@ -223,7 +257,8 @@ bool dma_release_from_contiguous(struct device *dev, struct page *pages,
*
* This function allocates contiguous memory buffer for specified device. It
* first tries to use device specific contiguous memory area if available or
- * the default global one, then tries a fallback allocation of normal pages.
+ * the per-numa ones and default global one, then tries a fallback allocation
+ * of normal pages. per-numa memory areas don't support address limit
*
* Note that it byapss one-page size of allocations from the global area as
* the addresses within one page are always contiguous, so there is no need
@@ -234,9 +269,13 @@ struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp)
size_t count = size >> PAGE_SHIFT;
struct page *page = NULL;
struct cma *cma = NULL;
+ int nid = dev_to_node(dev);
if (dev && dev->cma_area)
cma = dev->cma_area;
+ else if ((nid != NUMA_NO_NODE) && dma_contiguous_pernuma_area[nid]
+ && !(gfp & (GFP_DMA | GFP_DMA32)))
+ cma = dma_contiguous_pernuma_area[nid];
else if (count > 1)
cma = dma_contiguous_default_area;
--
2.23.0
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* [PATCH 2/3] arm64: mm: reserve hugetlb CMA after numa_init
From: Barry Song @ 2020-06-03 2:42 UTC (permalink / raw)
To: hch, m.szyprowski, robin.murphy, catalin.marinas
Cc: Barry Song, john.garry, linux-kernel, linuxarm, iommu, prime.zeng,
Jonathan.Cameron, Roman Gushchin, linux-arm-kernel
In-Reply-To: <20200603024231.61748-1-song.bao.hua@hisilicon.com>
hugetlb_cma_reserve() is called at the wrong place. numa_init has not been
done yet. so all reserved memory will be located at node0.
Cc: Roman Gushchin <guro@fb.com>
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
---
arch/arm64/mm/init.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index e42727e3568e..8f0e70ebb49d 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -458,11 +458,6 @@ void __init arm64_memblock_init(void)
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
dma_contiguous_reserve(arm64_dma32_phys_limit);
-
-#ifdef CONFIG_ARM64_4K_PAGES
- hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
-#endif
-
}
void __init bootmem_init(void)
@@ -478,6 +473,11 @@ void __init bootmem_init(void)
min_low_pfn = min;
arm64_numa_init();
+
+#ifdef CONFIG_ARM64_4K_PAGES
+ hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
+#endif
+
/*
* Sparsemem tries to allocate bootmem in memory_present(), so must be
* done after the fixed reservations.
--
2.23.0
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* [PATCH 3/3] arm64: mm: reserve per-numa CMA after numa_init
From: Barry Song @ 2020-06-03 2:42 UTC (permalink / raw)
To: hch, m.szyprowski, robin.murphy, catalin.marinas
Cc: Barry Song, john.garry, linux-kernel, linuxarm, iommu, prime.zeng,
Jonathan.Cameron, Will Deacon, linux-arm-kernel
In-Reply-To: <20200603024231.61748-1-song.bao.hua@hisilicon.com>
Right now, smmu is using dma_alloc_coherent() to get memory to save queues
and tables. Typically, on ARM64 server, there is a default CMA located at
node0, which could be far away from node2, node3 etc.
with this patch, smmu will get memory from local numa node to save command
queues and page tables. that means dma_unmap latency will be shrunk much.
Meanwhile, when iommu.passthrough is on, device drivers which call dma_
alloc_coherent() will also get local memory and avoid the travel between
numa nodes.
Cc: Will Deacon <will@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
---
arch/arm64/mm/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 8f0e70ebb49d..204a534982b2 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -474,6 +474,8 @@ void __init bootmem_init(void)
arm64_numa_init();
+ dma_pernuma_cma_reserve();
+
#ifdef CONFIG_ARM64_4K_PAGES
hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
#endif
--
2.23.0
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^ permalink raw reply related
* Re: [PATCH] sound: usb: pcm: fix incorrect power state when playing sound after PM_AUTO suspend
From: Macpaul Lin @ 2020-06-03 3:05 UTC (permalink / raw)
To: Takashi Iwai
Cc: alsa-devel, Mediatek WSD Upstream, linux-kernel, linux-usb,
Johan Hovold, Takashi Iwai, Hui Wang, Alexander Tsoy,
linux-mediatek, Greg Kroah-Hartman, Matthias Brugger, Macpaul Lin,
Jaroslav Kysela, Szabolcs Szőke, linux-arm-kernel
In-Reply-To: <s5hpnahhbz8.wl-tiwai@suse.de>
On Tue, 2020-06-02 at 14:46 +0200, Takashi Iwai wrote:
> On Tue, 02 Jun 2020 13:53:41 +0200,
> Macpaul Lin wrote:
> >
> > This patch fix incorrect power state changed by usb_audio_suspend()
> > when CONFIG_PM is enabled.
> >
> > After receiving suspend PM message with auto flag, usb_audio_suspend()
> > change card's power state to SNDRV_CTL_POWER_D3hot. Only when the other
> > resume PM message with auto flag can change power state to
> > SNDRV_CTL_POWER_D0 in __usb_audio_resume().
> >
> > However, when system is not under auto suspend, resume PM message with
> > auto flag might not be able to receive on time which cause the power
> > state was incorrect. At this time, if a player starts to play sound,
> > will cause snd_usb_pcm_open() to access the card and setup_hw_info() will
> > resume the card.
> >
> > But even the card is back to work and all function normal, the power
> > state is still in SNDRV_CTL_POWER_D3hot.
>
> Hm, in exactly which situation does this happen? I still don't get
> it. Could you elaborate how to trigger this?
I'm not sure if this will happen on laptop or on PC.
We've found this issue on Android phone (I'm not sure if each Android
phone can reproduce this.).
After booting the android phone, insert type-c headset without charging
and play music at any duration, say, 1 second, then stop. Put phone away
to idle about 17~18 minutes. Wait auto pm happened and the power state
change to SNDRV_CTL_POWER_D3hot in sound/usb/card.c. Then wake up the
phone, play music again. Then you'll probably found the music was not
playing and the progress bar keep at the same position. It only happen
when power state is SNDRV_CTL_POWER_D3hot. If not (the power state is
SNDRV_CTL_POWER_D0), repeat the steps for several times, then it will be
produced at some time.
When it happened, sound_usb_pcm_open() will wake up the sound card by
setup_hw_info()->__usb_audio_resume(). However, the card and the
interface is function properly right now, the power state keeps remain
SNDRV_CTL_POWER_D3hot. The suggestive parameter settings from upper
sound request will be pending since later snd_power_wait() call will
still wait the card awaken. Ideally, auto PM should be recovered by
sound card itself. But once the card is awaken at this circumstance, it
looks like there are not more auto pm event. And the sound system of
this interface will stuck here forever until user plug out the headset
(reset the hardware).
The root cause is that once the card has been resumed, it should inform
auto pm change the state back into SNDRV_CTL_POWER_D0 and mark the
device is using by some one.
> > Which cause the infinite loop
> > happened in snd_power_wait() to check the power state. Thus the
> > successive setting ioctl cannot be passed to card.
> >
> > Hence we suggest to change power state to SNDRV_CTL_POWER_D0 when card
> > has been resumed successfully.
>
> This doesn't look like a right solution for the problem, sorry.
> The card PM status must be recovered to D0 when the autoresume
> succeeds. If not, something is broken there, and it must be fixed
> instead of fiddling the status flag externally.
Yes, I agreed, but after checking the code in sound drivers,
it looks like there is only chance that auto pm triggered by low-level
code in sound/usb/card.c. In kernel 4.14, auto pm suspend is triggered
by snd_pcm_suspend_all(). In later kernel, it is triggered by
snd_usb_pcm_suspend(). However, it looks like there are no any resume
trigger to recover auto pm state when the card has been waken by
sound_usb_pcm_open(). The remain resume trigger in
sound/core/pcm_native.c were all static. I've tried to use these resume
function in sound/usb/card.c but it seems cannot get better result than
changing the power state when sound card is in use.
I've replied another mail earlier includes debug patch and the other
work around to verify this issue. The issue has been found on
kernel-4.14, but check the code logic here in sound/usb/card.c and
sound/usb/pcm.c, I think the same problem still existed in 4.19, 5.4
(used by android), and in current kernel tree.
> thanks,
>
> Takashi
If the above explanation were not clear enough, I'll try my best to
explain it in more detail. Maybe the better way is to send both auto pm
resume and runtime resume when sound_usb_pcm_open() is called. But
according to the current codes in card.c, we might need to call
__usb_audio_resume() twice in setup_hw_info().
Thanks
Macpaul Lin
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^ permalink raw reply
* RE: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
From: Peng Fan @ 2020-06-03 3:10 UTC (permalink / raw)
To: Peng Fan, shawnguo@kernel.org, Fabio Estevam,
kernel@pengutronix.de, Aisheng Dong, robh+dt@kernel.org,
sboyd@kernel.org, linux@rempel-privat.de,
jaswinder.singh@linaro.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dl-linux-imx, Leonard Crestez, Daniel Baluta,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
l.stach@pengutronix.de
In-Reply-To: <1590999602-29482-2-git-send-email-peng.fan@nxp.com>
> Subject: [PATCH V3 1/3] dt-bindings: mailbox: imx-mu: support i.MX8M
I'll drop this patch for yaml update, since https://lkml.org/lkml/2020/6/1/370
includes imx8mq/mm/n/p.
Thanks,
Peng.
>
> From: Peng Fan <peng.fan@nxp.com>
>
> Add i.MX8MQ/M/N/P compatible string to support i.MX8M SoCs
>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
> Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> index 26b7a88c2fea..906377acf2cd 100644
> --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
> @@ -18,7 +18,8 @@ Messaging Unit Device Node:
> Required properties:
> -------------------
> - compatible : should be "fsl,<chip>-mu", the supported chips include
> - imx6sx, imx7s, imx8qxp, imx8qm.
> + imx6sx, imx7s, imx8qxp, imx8qm, imx8mq, imx8mm, imx8mn,
> + imx8mp.
> The "fsl,imx6sx-mu" compatible is seen as generic and should
> be included together with SoC specific compatible.
> There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu"
> --
> 2.16.4
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^ permalink raw reply
* Re: [PATCH] pwm: rockchip: simplify rockchip_pwm_get_state()
From: David Wu @ 2020-06-03 3:10 UTC (permalink / raw)
To: Thierry Reding, Rasmus Villemoes
Cc: linux-pwm, linux-kernel, Heiko Stuebner, linux-arm-kernel,
linux-rockchip
In-Reply-To: <20200602123914.GA3360525@ulmo>
This change is very good, thank you. The code continues from the
original code(get_state_v1 and get_state_v2), didn’t make any changes at
that time, and sorry I have not seen linux-rockchip@lists.infradead.org
mail recently.
在 2020/6/2 下午8:39, Thierry Reding 写道:
> On Thu, Sep 19, 2019 at 11:17:27AM +0200, Rasmus Villemoes wrote:
>> The way state->enabled is computed is rather convoluted and hard to
>> read - both branches of the if() actually do the exact same thing. So
>> remove the if(), and further simplify "<boolean condition> ? true :
>> false" to "<boolean condition>".
>>
>> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
>> ---
>> I stumbled on this while trying to understand how the pwm subsystem
>> works. This patch is a semantic no-op, but it's also possible that,
>> say, the first branch simply contains a "double negative" so either
>> the != should be == or the "false : true" should be "true : false".
>>
>> drivers/pwm/pwm-rockchip.c | 7 +------
>> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> I've applied this. Irrespective of any feedback David would have this is
> correct and a nice simplification.
>
> Thierry
>
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* Re: [PATCH 2/3] arm64: mm: reserve hugetlb CMA after numa_init
From: Roman Gushchin @ 2020-06-03 3:22 UTC (permalink / raw)
To: Barry Song
Cc: catalin.marinas, john.garry, linux-kernel, linuxarm, iommu,
prime.zeng, Jonathan.Cameron, robin.murphy, hch, linux-arm-kernel,
m.szyprowski
In-Reply-To: <20200603024231.61748-3-song.bao.hua@hisilicon.com>
On Wed, Jun 03, 2020 at 02:42:30PM +1200, Barry Song wrote:
> hugetlb_cma_reserve() is called at the wrong place. numa_init has not been
> done yet. so all reserved memory will be located at node0.
>
> Cc: Roman Gushchin <guro@fb.com>
> Signed-off-by: Barry Song <song.bao.hua@hisilicon.com>
Acked-by: Roman Gushchin <guro@fb.com>
Thanks!
> ---
> arch/arm64/mm/init.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index e42727e3568e..8f0e70ebb49d 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -458,11 +458,6 @@ void __init arm64_memblock_init(void)
> high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
>
> dma_contiguous_reserve(arm64_dma32_phys_limit);
> -
> -#ifdef CONFIG_ARM64_4K_PAGES
> - hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
> -#endif
> -
> }
>
> void __init bootmem_init(void)
> @@ -478,6 +473,11 @@ void __init bootmem_init(void)
> min_low_pfn = min;
>
> arm64_numa_init();
> +
> +#ifdef CONFIG_ARM64_4K_PAGES
> + hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
> +#endif
> +
> /*
> * Sparsemem tries to allocate bootmem in memory_present(), so must be
> * done after the fixed reservations.
> --
> 2.23.0
>
>
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^ permalink raw reply
* [PATCH] drm/connector: notify userspace on hotplug after register complete
From: Jeykumar Sankaran @ 2020-06-03 3:37 UTC (permalink / raw)
To: dri-devel, linux-kernel, linux-arm-kernel
Cc: Steve Cohen, Jeykumar Sankaran, seanpaul, robdclark
drm connector notifies userspace on hotplug event prematurely before
late_register and mode_object register completes. This leads to a race
between userspace and kernel on updating the IDR list. So, move the
notification to end of connector register.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
---
drivers/gpu/drm/drm_connector.c | 5 +++++
drivers/gpu/drm/drm_sysfs.c | 3 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index b1099e1..d877ddc 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -27,6 +27,7 @@
#include <drm/drm_print.h>
#include <drm/drm_drv.h>
#include <drm/drm_file.h>
+#include <drm/drm_sysfs.h>
#include <linux/uaccess.h>
@@ -523,6 +524,10 @@ int drm_connector_register(struct drm_connector *connector)
drm_mode_object_register(connector->dev, &connector->base);
connector->registration_state = DRM_CONNECTOR_REGISTERED;
+
+ /* Let userspace know we have a new connector */
+ drm_sysfs_hotplug_event(connector->dev);
+
goto unlock;
err_debugfs:
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 939f003..f0336c8 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -291,9 +291,6 @@ int drm_sysfs_connector_add(struct drm_connector *connector)
return PTR_ERR(connector->kdev);
}
- /* Let userspace know we have a new connector */
- drm_sysfs_hotplug_event(dev);
-
if (connector->ddc)
return sysfs_create_link(&connector->kdev->kobj,
&connector->ddc->dev.kobj, "ddc");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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^ permalink raw reply related
* [PATCH V2 0/3] firmware: imx: fix/update cm4 and add resource check
From: peng.fan @ 2020-06-03 3:32 UTC (permalink / raw)
To: shawnguo, s.hauer, aisheng.dong
Cc: Peng Fan, festevam, qiangqing.zhang, linux, linux-arm-kernel,
kernel, leonard.crestez, daniel.baluta, linux-kernel, linux-imx
From: Peng Fan <peng.fan@nxp.com>
V2:
Add R-b tag
Drop patch 3/4 from V1
Add comments and update Copyright for patch 2/3
keep code consistency in Patch 3/3
V1:
https://patchwork.kernel.org/cover/11505045/
Fix cm40 power domain, update to add more cm4 resources
Add resource owner check, to not register if not owned by Linux.
Peng Fan (3):
firmware: imx: scu-pd: fix cm40 power domain
firmware: imx: add resource management api
firmware: imx: scu-pd: add more cm4 resources
drivers/firmware/imx/Makefile | 2 +-
drivers/firmware/imx/rm.c | 45 ++++++++++++++++++++++++
drivers/firmware/imx/scu-pd.c | 14 ++++++--
include/linux/firmware/imx/sci.h | 1 +
include/linux/firmware/imx/svc/rm.h | 69 +++++++++++++++++++++++++++++++++++++
5 files changed, 128 insertions(+), 3 deletions(-)
create mode 100644 drivers/firmware/imx/rm.c
create mode 100644 include/linux/firmware/imx/svc/rm.h
--
2.16.4
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* [PATCH V2 1/3] firmware: imx: scu-pd: fix cm40 power domain
From: peng.fan @ 2020-06-03 3:32 UTC (permalink / raw)
To: shawnguo, s.hauer, aisheng.dong
Cc: Peng Fan, festevam, qiangqing.zhang, linux, linux-arm-kernel,
kernel, leonard.crestez, daniel.baluta, linux-kernel, linux-imx
In-Reply-To: <1591155143-25972-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
The postfix needs to be false. Alought compiler use 0 for postfix now,
and take start_from as 0, it is better we add explicit false to postfix.
Fixes: 705dcca91d0a("firmware: imx: scu-pd: add power domain for I2C and INTMUX in CM40 SS")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
---
drivers/firmware/imx/scu-pd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index fb5523aa16ee..d1b313fa7b96 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,8 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, 0 },
+ { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
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* [PATCH V2 2/3] firmware: imx: add resource management api
From: peng.fan @ 2020-06-03 3:32 UTC (permalink / raw)
To: shawnguo, s.hauer, aisheng.dong
Cc: Peng Fan, festevam, qiangqing.zhang, linux, linux-arm-kernel,
kernel, leonard.crestez, daniel.baluta, linux-kernel, linux-imx
In-Reply-To: <1591155143-25972-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add resource management API, when we have multiple
partition running together, resources not owned to current
partition should not be used.
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/firmware/imx/Makefile | 2 +-
drivers/firmware/imx/rm.c | 45 ++++++++++++++++++++++++
include/linux/firmware/imx/sci.h | 1 +
include/linux/firmware/imx/svc/rm.h | 69 +++++++++++++++++++++++++++++++++++++
4 files changed, 116 insertions(+), 1 deletion(-)
create mode 100644 drivers/firmware/imx/rm.c
create mode 100644 include/linux/firmware/imx/svc/rm.h
diff --git a/drivers/firmware/imx/Makefile b/drivers/firmware/imx/Makefile
index 08bc9ddfbdfb..17ea3613e142 100644
--- a/drivers/firmware/imx/Makefile
+++ b/drivers/firmware/imx/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_IMX_DSP) += imx-dsp.o
-obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o
+obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o imx-scu-irq.o rm.o
obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
diff --git a/drivers/firmware/imx/rm.c b/drivers/firmware/imx/rm.c
new file mode 100644
index 000000000000..a12db6ff323b
--- /dev/null
+++ b/drivers/firmware/imx/rm.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ *
+ * File containing client-side RPC functions for the RM service. These
+ * function are ported to clients that communicate to the SC.
+ */
+
+#include <linux/firmware/imx/svc/rm.h>
+
+struct imx_sc_msg_rm_rsrc_owned {
+ struct imx_sc_rpc_msg hdr;
+ u16 resource;
+} __packed __aligned(4);
+
+/*
+ * This function check @resource is owned by current partition or not
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] resource resource the control is associated with
+ *
+ * @return Returns 0 for not owned and 1 for owned.
+ */
+bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource)
+{
+ struct imx_sc_msg_rm_rsrc_owned msg;
+ struct imx_sc_rpc_msg *hdr = &msg.hdr;
+
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_RM;
+ hdr->func = IMX_SC_RM_FUNC_IS_RESOURCE_OWNED;
+ hdr->size = 2;
+
+ msg.resource = resource;
+
+ /*
+ * SCU firmware only returns value 0 or 1
+ * for resource owned check which means not owned or owned.
+ * So it is always successful.
+ */
+ imx_scu_call_rpc(ipc, &msg, true);
+
+ return hdr->func;
+}
+EXPORT_SYMBOL(imx_sc_rm_is_resource_owned);
diff --git a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
index 3fa418a4ca67..3c459f54a88f 100644
--- a/include/linux/firmware/imx/sci.h
+++ b/include/linux/firmware/imx/sci.h
@@ -14,6 +14,7 @@
#include <linux/firmware/imx/svc/misc.h>
#include <linux/firmware/imx/svc/pm.h>
+#include <linux/firmware/imx/svc/rm.h>
int imx_scu_enable_general_irq_channel(struct device *dev);
int imx_scu_irq_register_notifier(struct notifier_block *nb);
diff --git a/include/linux/firmware/imx/svc/rm.h b/include/linux/firmware/imx/svc/rm.h
new file mode 100644
index 000000000000..9924216f3e45
--- /dev/null
+++ b/include/linux/firmware/imx/svc/rm.h
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2020 NXP
+ *
+ * Header file containing the public API for the System Controller (SC)
+ * Power Management (PM) function. This includes functions for power state
+ * control, clock control, reset control, and wake-up event control.
+ *
+ * RM_SVC (SVC) Resource Management Service
+ *
+ * Module for the Resource Management (RM) service.
+ */
+
+#ifndef _SC_RM_API_H
+#define _SC_RM_API_H
+
+#include <linux/firmware/imx/sci.h>
+
+/*
+ * This type is used to indicate RPC RM function calls.
+ */
+enum imx_sc_rm_func {
+ IMX_SC_RM_FUNC_UNKNOWN = 0,
+ IMX_SC_RM_FUNC_PARTITION_ALLOC = 1,
+ IMX_SC_RM_FUNC_SET_CONFIDENTIAL = 31,
+ IMX_SC_RM_FUNC_PARTITION_FREE = 2,
+ IMX_SC_RM_FUNC_GET_DID = 26,
+ IMX_SC_RM_FUNC_PARTITION_STATIC = 3,
+ IMX_SC_RM_FUNC_PARTITION_LOCK = 4,
+ IMX_SC_RM_FUNC_GET_PARTITION = 5,
+ IMX_SC_RM_FUNC_SET_PARENT = 6,
+ IMX_SC_RM_FUNC_MOVE_ALL = 7,
+ IMX_SC_RM_FUNC_ASSIGN_RESOURCE = 8,
+ IMX_SC_RM_FUNC_SET_RESOURCE_MOVABLE = 9,
+ IMX_SC_RM_FUNC_SET_SUBSYS_RSRC_MOVABLE = 28,
+ IMX_SC_RM_FUNC_SET_MASTER_ATTRIBUTES = 10,
+ IMX_SC_RM_FUNC_SET_MASTER_SID = 11,
+ IMX_SC_RM_FUNC_SET_PERIPHERAL_PERMISSIONS = 12,
+ IMX_SC_RM_FUNC_IS_RESOURCE_OWNED = 13,
+ IMX_SC_RM_FUNC_GET_RESOURCE_OWNER = 33,
+ IMX_SC_RM_FUNC_IS_RESOURCE_MASTER = 14,
+ IMX_SC_RM_FUNC_IS_RESOURCE_PERIPHERAL = 15,
+ IMX_SC_RM_FUNC_GET_RESOURCE_INFO = 16,
+ IMX_SC_RM_FUNC_MEMREG_ALLOC = 17,
+ IMX_SC_RM_FUNC_MEMREG_SPLIT = 29,
+ IMX_SC_RM_FUNC_MEMREG_FRAG = 32,
+ IMX_SC_RM_FUNC_MEMREG_FREE = 18,
+ IMX_SC_RM_FUNC_FIND_MEMREG = 30,
+ IMX_SC_RM_FUNC_ASSIGN_MEMREG = 19,
+ IMX_SC_RM_FUNC_SET_MEMREG_PERMISSIONS = 20,
+ IMX_SC_RM_FUNC_IS_MEMREG_OWNED = 21,
+ IMX_SC_RM_FUNC_GET_MEMREG_INFO = 22,
+ IMX_SC_RM_FUNC_ASSIGN_PAD = 23,
+ IMX_SC_RM_FUNC_SET_PAD_MOVABLE = 24,
+ IMX_SC_RM_FUNC_IS_PAD_OWNED = 25,
+ IMX_SC_RM_FUNC_DUMP = 27,
+};
+
+#if IS_ENABLED(CONFIG_IMX_SCU)
+bool imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource);
+#else
+static inline bool
+imx_sc_rm_is_resource_owned(struct imx_sc_ipc *ipc, u16 resource)
+{
+ return true;
+}
+#endif
+#endif
--
2.16.4
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^ permalink raw reply related
* [PATCH V2 3/3] firmware: imx: scu-pd: add more cm4 resources
From: peng.fan @ 2020-06-03 3:32 UTC (permalink / raw)
To: shawnguo, s.hauer, aisheng.dong
Cc: Peng Fan, festevam, qiangqing.zhang, linux, linux-arm-kernel,
kernel, leonard.crestez, daniel.baluta, linux-kernel, linux-imx
In-Reply-To: <1591155143-25972-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add more cm4 resources, then linux could use cm4's i2c/lpuart and
could kick cm4 core.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/firmware/imx/scu-pd.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index d1b313fa7b96..af3d6d9ead28 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -167,8 +167,18 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
/* CM40 SS */
- { "cm40_i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
- { "cm40_intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
+ { "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
+ { "cm40-pid", IMX_SC_R_M4_0_PID0, 5, true, 0},
+ { "cm40-mu-a1", IMX_SC_R_M4_0_MU_1A, 1, false, 0},
+ { "cm40-lpuart", IMX_SC_R_M4_0_UART, 1, false, 0},
+
+ /* CM41 SS */
+ { "cm41-i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
+ { "cm41-intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
+ { "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0},
+ { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0},
+ { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0},
};
static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
--
2.16.4
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* [PATCH V4 0/2] imx8m: add mu support
From: peng.fan @ 2020-06-03 3:35 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
From: Peng Fan <peng.fan@nxp.com>
V4:
Drop patch 1/3, since https://lkml.org/lkml/2020/6/1/370 already
has the yaml changes
V3:
Add R-b tag
Remove undocumented property
V2:
Add dt-bindings
Merge dts changes into one patch, since all is to add mu node
Add mu dt bindings
Add mu node
Add i.MX8MP mu root clk
Peng Fan (2):
arm64: dts: imx8m: add mu node
clk: imx8mp: add mu root clk
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
drivers/clk/imx/clk-imx8mp.c | 1 +
5 files changed, 33 insertions(+)
--
2.16.4
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* [PATCH V4 1/2] arm64: dts: imx8m: add mu node
From: peng.fan @ 2020-06-03 3:35 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1591155360-26173-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu node to let A53 could communicate with M Core.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 8 ++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++++++
4 files changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index aaf6e71101a1..d9e787ea246f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -775,6 +775,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 9a4b65a267d4..3dca1fb34ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -675,6 +675,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mn-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mn-usdhc", "fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 45e2c0a4e889..1bc14bb44d90 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -621,6 +621,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mp-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
i2c5: i2c@30ad0000 {
compatible = "fsl,imx8mp-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 978f8122c0d2..3e762919d61f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -959,6 +959,14 @@
status = "disabled";
};
+ mu: mailbox@30aa0000 {
+ compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu";
+ reg = <0x30aa0000 0x10000>;
+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_MU_ROOT>;
+ #mbox-cells = <2>;
+ };
+
usdhc1: mmc@30b40000 {
compatible = "fsl,imx8mq-usdhc",
"fsl,imx7d-usdhc";
--
2.16.4
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* [PATCH V4 2/2] clk: imx8mp: add mu root clk
From: peng.fan @ 2020-06-03 3:36 UTC (permalink / raw)
To: shawnguo, fabio.estevam, kernel, aisheng.dong, robh+dt, sboyd,
linux
Cc: devicetree, Peng Fan, linux-kernel, linux-imx, leonard.crestez,
daniel.baluta, linux-clk, linux-arm-kernel, l.stach
In-Reply-To: <1591155360-26173-1-git-send-email-peng.fan@nxp.com>
From: Peng Fan <peng.fan@nxp.com>
Add mu root clk for mu mailbox usage.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
drivers/clk/imx/clk-imx8mp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..ca747712400f 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
+ hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root", ccm_base + 0x4210, 0);
hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
--
2.16.4
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* Re: [PATCH 06/12] PM / devfreq: Add cpu based scaling support to passive_governor
From: Chanwoo Choi @ 2020-06-03 4:07 UTC (permalink / raw)
To: andrew-sh.cheng
Cc: Mark Rutland, Nishanth Menon, srv_heupstream, devicetree,
Stephen Boyd, Viresh Kumar, Mark Brown, linux-pm,
Rafael J . Wysocki, Liam Girdwood, Rob Herring, linux-kernel,
Kyungmin Park, MyungJoo Ham, linux-mediatek, Sibi Sankar,
Matthias Brugger, linux-arm-kernel
In-Reply-To: <1591098190.30729.15.camel@mtksdaap41>
Hi Andrew-sh.Cheng,
Do you know that why cannot show the patches sent from you on mailing list?
Even if you sent them to linux-pm mailing list, I cannot find
your patches on linux-pm's patchwork[1] and others.
[1] https://patchwork.kernel.org/project/linux-pm/list/
Could you find you patch on mailing list?
Do you use git send-email when you send these patches?
I used the thunderbird tool and gmail for reading the patches.
When I tried to read the original source of this patch,
it looks like that the body of patch is encoded.
I cannot read the plain text of patch body.
- When gmail, use 'Show original'
- When thunderbird, use 'More -> View Source'
If I'm missing something to check this patch,
please let me know. I'll fix my environment.
It is strange situation on my case.
On 6/2/20 8:43 PM, andrew-sh.cheng wrote:
> On Thu, 2020-05-28 at 15:14 +0900, Chanwoo Choi wrote:
>> Hi Andrew-sh.Cheng,
>>
>> Thanks for your posting. I like this approach absolutely.
>> I think that it is necessary. When I developed the embedded product,
>> I needed this feature always.
>>
>> I add the comments on below.
>>
>>
>> And the following email is not valid. So, I dropped this email
>> from Cc list.
>> Saravana Kannan <skannan@codeaurora.org>
>>
>>
>> On 5/20/20 12:43 PM, Andrew-sh.Cheng wrote:
>>> From: Saravana Kannan <skannan@codeaurora.org>
>>>
>>> Many CPU architectures have caches that can scale independent of the
>>> CPUs. Frequency scaling of the caches is necessary to make sure that the
>>> cache is not a performance bottleneck that leads to poor performance and
>>> power. The same idea applies for RAM/DDR.
>>>
>>> To achieve this, this patch adds support for cpu based scaling to the
>>> passive governor. This is accomplished by taking the current frequency
>>> of each CPU frequency domain and then adjust the frequency of the cache
>>> (or any devfreq device) based on the frequency of the CPUs. It listens
>>> to CPU frequency transition notifiers to keep itself up to date on the
>>> current CPU frequency.
>>>
>>> To decide the frequency of the device, the governor does one of the
>>> following:
>>> * Derives the optimal devfreq device opp from required-opps property of
>>> the parent cpu opp_table.
>>>
>>> * Scales the device frequency in proportion to the CPU frequency. So, if
>>> the CPUs are running at their max frequency, the device runs at its
>>> max frequency. If the CPUs are running at their min frequency, the
>>> device runs at its min frequency. It is interpolated for frequencies
>>> in between.
>>>
>>> Andrew-sh.Cheng change
>>> dev_pm_opp_xlate_opp to dev_pm_opp_xlate_required_opp devfreq->max_freq
>>> to devfreq->user_min_freq_req.data.freq.qos->min_freq.target_value
>>> for kernel-5.7
>>>
>>> Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
>>> [Sibi: Integrated cpu-freqmap governor into passive_governor]
>>> Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
>>> Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com>
>>> ---
>>> drivers/devfreq/Kconfig | 2 +
>>> drivers/devfreq/governor_passive.c | 278 ++++++++++++++++++++++++++++++++++---
>>> include/linux/devfreq.h | 40 +++++-
>>> 3 files changed, 299 insertions(+), 21 deletions(-)
>>>
>>> diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
>>> index 0b1df12e0f21..d9067950af6a 100644
>>> --- a/drivers/devfreq/Kconfig
>>> +++ b/drivers/devfreq/Kconfig
>>> @@ -73,6 +73,8 @@ config DEVFREQ_GOV_PASSIVE
>>> device. This governor does not change the frequency by itself
>>> through sysfs entries. The passive governor recommends that
>>> devfreq device uses the OPP table to get the frequency/voltage.
>>> + Alternatively the governor can also be chosen to scale based on
>>> + the online CPUs current frequency.
>>>
>>> comment "DEVFREQ Drivers"
>>>
>>> diff --git a/drivers/devfreq/governor_passive.c b/drivers/devfreq/governor_passive.c
>>> index 2d67d6c12dce..7dcda02a5bb7 100644
>>> --- a/drivers/devfreq/governor_passive.c
>>> +++ b/drivers/devfreq/governor_passive.c
>>> @@ -8,11 +8,89 @@
>>> */
>>>
>>> #include <linux/module.h>
>>> +#include <linux/cpu.h>
>>> +#include <linux/cpufreq.h>
>>> +#include <linux/cpumask.h>
>>> #include <linux/device.h>
>>> #include <linux/devfreq.h>
>>> +#include <linux/slab.h>
>>> #include "governor.h"
>>>
>>> -static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
>>> +static unsigned int xlate_cpufreq_to_devfreq(struct devfreq_passive_data *data,
>>
>> Need to change 'unsigned int' to 'unsigned long'
> Get it.
If you add the blank line before/after of your reply,
it is better to catch your reply. Please add the blank line for me.
>> .
>>
>>> + unsigned int cpu)
>>> +{
>>> + unsigned int cpu_min, cpu_max, dev_min, dev_max, cpu_percent, max_state;
>>
>> Better to define them separately as following and then need to rename
>> the variable. Usually, use the 'min_freq' and 'max_freq' word for
>> the minimum/maximum frequency.
>>
>> unsigned int cpu_min_freq, cpu_max_freq, cpu_curr_freq, cpu_percent;
>> unsigned long dev_min_freq, dev_max_freq, dev_max_state,
>>
>> The devfreq used 'unsigned long'. The cpufreq used 'unsigned long'
>> and 'unsigned int'. You need to handle them properly.
> Get it.
> For cpu_freq, I separate it into "unsigned long cpu_curr_freq" and
> "unsigned int cpu_curr_freq_khz"
>>
>>
>>> + struct devfreq_cpu_state *cpu_state = data->cpu_state[cpu];
>>> + struct devfreq *devfreq = (struct devfreq *)data->this;
>>> + unsigned long *freq_table = devfreq->profile->freq_table;
>>
>> In this function, use 'cpu' work for cpufreq and use 'dev' for devfreq.
>> So, I think 'dev_freq_table' is proper name instead of 'freq_table'
>> for the readability.
>>
>> freq_table -> dev_freq_table
>>
>>> + struct dev_pm_opp *opp = NULL, *cpu_opp = NULL;
>>
>> In the get_target_freq_with_devfreq(), use 'p_opp' indicating
>> the OPP of parent device. For the consistency, I think that
>> use 'p_opp' instead of 'cpu_opp'.
>>
>>> + unsigned long cpu_freq, freq;
>>
>> Define the 'cpu_freq' on above with cpu_min_freq/cpu_max_freq definition.
>> cpu_freq -> cpu_curr_freq.
> Get it.
> Will modify them for readability.
>>
>>> +
>>> + if (!cpu_state || cpu_state->first_cpu != cpu ||
>>> + !cpu_state->opp_table || !devfreq->opp_table)
>>> + return 0;
>>> +
>>> + cpu_freq = cpu_state->freq * 1000;
>>> + cpu_opp = devfreq_recommended_opp(cpu_state->dev, &cpu_freq, 0);
>>> + if (IS_ERR(cpu_opp))
>>> + return 0;
>>> +
>>> + opp = dev_pm_opp_xlate_required_opp(cpu_state->opp_table,
>>> + devfreq->opp_table, cpu_opp);
>>> + dev_pm_opp_put(cpu_opp);
>>> +
>>> + if (!IS_ERR(opp)) {
>>> + freq = dev_pm_opp_get_freq(opp);
>>> + dev_pm_opp_put(opp);
>>
>> Better to add the 'out' goto statement.
>> If you use 'goto out', you can reduce the one indentation
>> without 'else' statement.
> Get it.
>>
>>
>>> + } else {
>>
>> As I commented, when dev_pm_opp_xlate_required_opp() return successfully
>> , use 'goto out'. We can remove 'else' and then reduce the unneeded indentation.
>>
>>
>>> + /* Use Interpolation if required opps is not available */
>>> + cpu_min = cpu_state->min_freq;
>>> + cpu_max = cpu_state->max_freq;
>>> + cpu_freq = cpu_state->freq;
>>> +
>>> + if (freq_table) {
>>> + /* Get minimum frequency according to sorting order */
>>> + max_state = freq_table[devfreq->profile->max_state - 1];
>>> + if (freq_table[0] < max_state) {
>>> + dev_min = freq_table[0];
>>> + dev_max = max_state;
>>> + } else {
>>> + dev_min = max_state;
>>> + dev_max = freq_table[0];
>>> + }
>>> + } else {
>>> + if (devfreq->user_max_freq_req.data.freq.qos->max_freq.target_value
>>> + <= devfreq->user_min_freq_req.data.freq.qos->min_freq.target_value)
>>> + return 0;
>>> + dev_min =
>>> + devfreq->user_min_freq_req.data.freq.qos->min_freq.target_value;
>>> + dev_max =
>>> + devfreq->user_max_freq_req.data.freq.qos->max_freq.target_value;
>>
>> I think it is not proper to access the variable of pm_qos structure directly.
>> Instead of direct access, you have to use the exported PM QoS function such as
>> - pm_qos_read_value(devfreq->dev.parent, DEV_PM_QOS_MIN_FREQUENCY);
>> - pm_qos_read_value(devfreq->dev.parent, DEV_PM_QOS_MAX_FREQUENCY);
> Get it.
>>
>>> + }
>>> + cpu_percent = ((cpu_freq - cpu_min) * 100) / cpu_max - cpu_min;
>>> + freq = dev_min + mult_frac(dev_max - dev_min, cpu_percent, 100);
>>> + }
>>
>>
>> I think that you better to add 'out' jump label as following:
>>
>> out:
>>
>>> +
>>> + return freq;
>>> +}
>>> +
>>> +static int get_target_freq_with_cpufreq(struct devfreq *devfreq,
>>> + unsigned long *freq)
>>> +{
>>> + struct devfreq_passive_data *p_data =
>>> + (struct devfreq_passive_data *)devfreq->data;
>>> + unsigned int cpu, target_freq = 0;
>>
>> Need to define 'target_freq' with 'unsigned long' type.
> Get it.
>>
>>> +
>>> + for_each_online_cpu(cpu)
>>> + target_freq = max(target_freq,
>>> + xlate_cpufreq_to_devfreq(p_data, cpu));
>>> +
>>> + *freq = target_freq;
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int get_target_freq_with_devfreq(struct devfreq *devfreq,
>>> unsigned long *freq)
>>> {
>>> struct devfreq_passive_data *p_data
>>> @@ -23,16 +101,6 @@ static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
>>> int i, count, ret = 0;
>>>
>>> /*
>>> - * If the devfreq device with passive governor has the specific method
>>> - * to determine the next frequency, should use the get_target_freq()
>>> - * of struct devfreq_passive_data.
>>> - */
>>> - if (p_data->get_target_freq) {
>>> - ret = p_data->get_target_freq(devfreq, freq);
>>> - goto out;
>>> - }
>>> -
>>> - /*
>>> * If the parent and passive devfreq device uses the OPP table,
>>> * get the next frequency by using the OPP table.
>>> */
>>> @@ -102,6 +170,37 @@ static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
>>> return ret;
>>> }
>>>
>>> +static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
>>> + unsigned long *freq)
>>> +{
>>> + struct devfreq_passive_data *p_data =
>>> + (struct devfreq_passive_data *)devfreq->data;
>>> + int ret;
>>> +
>>> + /*
>>> + * If the devfreq device with passive governor has the specific method
>>> + * to determine the next frequency, should use the get_target_freq()
>>> + * of struct devfreq_passive_data.
>>> + */
>>> + if (p_data->get_target_freq)
>>> + return p_data->get_target_freq(devfreq, freq);
>>> +
>>> + switch (p_data->parent_type) {
>>> + case DEVFREQ_PARENT_DEV:
>>> + ret = get_target_freq_with_devfreq(devfreq, freq);
>>> + break;
>>> + case CPUFREQ_PARENT_DEV:
>>> + ret = get_target_freq_with_cpufreq(devfreq, freq);
>>> + break;
>>> + default:
>>> + ret = -EINVAL;
>>> + dev_err(&devfreq->dev, "Invalid parent type\n");
>>> + break;
>>> + }
>>> +
>>> + return ret;
>>> +}
>>> +
>>> static int update_devfreq_passive(struct devfreq *devfreq, unsigned long freq)
>>> {
>>> int ret;
>>> @@ -156,6 +255,140 @@ static int devfreq_passive_notifier_call(struct notifier_block *nb,
>>> return NOTIFY_DONE;
>>> }
>>>
>>> +static int cpufreq_passive_notifier_call(struct notifier_block *nb,
>>> + unsigned long event, void *ptr)
>>> +{
>>> + struct devfreq_passive_data *data =
>>> + container_of(nb, struct devfreq_passive_data, nb);
>>> + struct devfreq *devfreq = (struct devfreq *)data->this;
>>> + struct devfreq_cpu_state *cpu_state;
>>> + struct cpufreq_freqs *freq = ptr;
>>
>> How about changing 'freq' to 'cpu_freqs'?
>>
>> In the drivers/cpufreq/cpufreq.c, use 'freqs' name indicating
>> the instance of 'struct cpufreq_freqs'. And in order to
>> identfy, how about adding 'cpu_' prefix for variable name?
>>
>>> + unsigned int current_freq;
>>
>> Need to define curr_freq with 'unsigned long' type
>> and better to use 'curr_freq' variable name.
> It is good to change current_freq to curr_freq, but why should it us
> 'unsigned long'?
> I think it is 'unsigned int'.
I think that 'curr_freq' is proper. Yes, it is 'unsigned int'.
When you changing the cpu frequency to device frequency,
recommend to handle them between unsigned int and unsigned long.
>>
>>> + int ret;
>>> +
>>> + if (event != CPUFREQ_POSTCHANGE || !freq ||
>>> + !data->cpu_state[freq->policy->cpu])
>>> + return 0;
>>> +
>>> + cpu_state = data->cpu_state[freq->policy->cpu];
>>> + if (cpu_state->freq == freq->new)
>>> + return 0;
>>> +
>>> + /* Backup current freq and pre-update cpu state freq*/
>>> + current_freq = cpu_state->freq;
>>> + cpu_state->freq = freq->new;
>>> +
>>> + mutex_lock(&devfreq->lock);
>>> + ret = update_devfreq(devfreq);
>>> + mutex_unlock(&devfreq->lock);
>>> + if (ret) {
>>> + cpu_state->freq = current_freq;
>>> + dev_err(&devfreq->dev, "Couldn't update the frequency.\n");
>>> + return ret;
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> +static int cpufreq_passive_register(struct devfreq_passive_data **p_data)
>>> +{
>>> + struct devfreq_passive_data *data = *p_data;
>>> + struct devfreq *devfreq = (struct devfreq *)data->this;
>>> + struct device *dev = devfreq->dev.parent;
>>> + struct opp_table *opp_table = NULL;
>>> + struct devfreq_cpu_state *state;
>>
>> For the readability, I thinkt 'cpu_state' is proper instead of 'state'.
> Get it.
>>
>>> + struct cpufreq_policy *policy;
>>> + struct device *cpu_dev;
>>> + unsigned int cpu;
>>> + int ret;
>>> +
>>> + get_online_cpus();
>>
>> Add blank line.
> Get it.
>>
>>> + data->nb.notifier_call = cpufreq_passive_notifier_call;
>>> + ret = cpufreq_register_notifier(&data->nb,
>>> + CPUFREQ_TRANSITION_NOTIFIER);
>>> + if (ret) {
>>> + dev_err(dev, "Couldn't register cpufreq notifier.\n");
>>> + data->nb.notifier_call = NULL;
>>> + goto out;
>>> + }
>>> +
>>> + /* Populate devfreq_cpu_state */
>>> + for_each_online_cpu(cpu) {
>>> + if (data->cpu_state[cpu])
>>> + continue;
>>> +
>>> + policy = cpufreq_cpu_get(cpu);
>>
>> cpufreq_cpu_get() might return 'NULL'. I think you need to handle
>> return value as following:
>>
>> if (!policy) {
>> ret = -EINVAL;
>> goto out;
>> } else if (PTR_ERR(policy) == -EPROBE_DEFER) {
>> goto out;
>> } else if (IS_ERR(policy) {
>> ret = PTR_ERR(policy);
>> dev_err(dev, "Couldn't get the cpufreq_poliy.\n");
>> goto out;
>> }
>>
>> If cpufreq_cpu_get() return successfully, to do next.
>> It reduces the one indentaion.
>>
>>
> Get it.
>>
>>> + if (policy) {
>>> + state = kzalloc(sizeof(*state), GFP_KERNEL);
>>> + if (!state) {
>>> + ret = -ENOMEM;
>>> + goto out;
>>> + }
>>> +
>>> + cpu_dev = get_cpu_device(cpu);
>>> + if (!cpu_dev) {
>>> + dev_err(dev, "Couldn't get cpu device.\n");
>>> + ret = -ENODEV;
>>> + goto out;
>>> + }
>>> +
>>> + opp_table = dev_pm_opp_get_opp_table(cpu_dev);
>>> + if (IS_ERR(devfreq->opp_table)) {
>>> + ret = PTR_ERR(opp_table);
>>> + goto out;
>>> + }
>>> +
>>> + state->dev = cpu_dev;
>>> + state->opp_table = opp_table;
>>> + state->first_cpu = cpumask_first(policy->related_cpus);
>>> + state->freq = policy->cur;
>>> + state->min_freq = policy->cpuinfo.min_freq;
>>> + state->max_freq = policy->cpuinfo.max_freq;
>>> + data->cpu_state[cpu] = state;
>>
>> Add blank line.
>>
>>> + cpufreq_cpu_put(policy);
>>> + } else {
>>> + ret = -EPROBE_DEFER;
>>> + goto out;
>>> + }
>>> + }
>>
>> Add blank line.
> Get it.
>>> +out:
>>> + put_online_cpus();
>>> + if (ret)
>>> + return ret;
>>> +
>>> + /* Update devfreq */
>>> + mutex_lock(&devfreq->lock);
>>> + ret = update_devfreq(devfreq);
>>> + mutex_unlock(&devfreq->lock);
>>> + if (ret)
>>> + dev_err(dev, "Couldn't update the frequency.\n");
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static int cpufreq_passive_unregister(struct devfreq_passive_data **p_data)
>>> +{
>>> + struct devfreq_passive_data *data = *p_data;
>>> + struct devfreq_cpu_state *cpu_state;
>>> + int cpu;
>>> +
>>> + if (data->nb.notifier_call)
>>> + cpufreq_unregister_notifier(&data->nb,
>>> + CPUFREQ_TRANSITION_NOTIFIER);
>>> +
>>> + for_each_possible_cpu(cpu) {
>>> + cpu_state = data->cpu_state[cpu];
>>> + if (cpu_state) {
>>> + if (cpu_state->opp_table)
>>> + dev_pm_opp_put_opp_table(cpu_state->opp_table);
>>> + kfree(cpu_state);
>>> + cpu_state = NULL;
>>> + }
>>> + }
>>> +
>>> + return 0;
>>> +}
>>> +
>>> static int devfreq_passive_event_handler(struct devfreq *devfreq,
>>> unsigned int event, void *data)
>>> {
>>> @@ -165,7 +398,7 @@ static int devfreq_passive_event_handler(struct devfreq *devfreq,
>>> struct notifier_block *nb = &p_data->nb;
>>> int ret = 0;
>>>
>>> - if (!parent)
>>> + if (p_data->parent_type == DEVFREQ_PARENT_DEV && !parent)
>>> return -EPROBE_DEFER;
>>
>> If you modify the devfreq_passive_event_handler() as following,
>> you can move this condition for DEVFREQ_PARENT_DEV into
>> (register|unregister)_parent_dev_notifier.
>>
>> switch (event) {
>> case DEVFREQ_GOV_START:
>> ret = register_parent_dev_notifier(p_data);
>> break;
>> case DEVFREQ_GOV_STOP:
>> ret = unregister_parent_dev_notifier(p_data);
>> break;
>> default:
>> ret = -EINVAL;
>> break;
>> }
>>
>> return ret;
>>
> Get it.
>>>
>>> switch (event) {
>>> @@ -173,13 +406,24 @@ static int devfreq_passive_event_handler(struct devfreq *devfreq,
>>> if (!p_data->this)
>>> p_data->this = devfreq;
>>>
>>> - nb->notifier_call = devfreq_passive_notifier_call;
>>> - ret = devfreq_register_notifier(parent, nb,
>>> - DEVFREQ_TRANSITION_NOTIFIER);
>>> + if (p_data->parent_type == DEVFREQ_PARENT_DEV) {
>>> + nb->notifier_call = devfreq_passive_notifier_call;
>>> + ret = devfreq_register_notifier(parent, nb,
>>> + DEVFREQ_TRANSITION_NOTIFIER);
>>> + } else if (p_data->parent_type == CPUFREQ_PARENT_DEV) {
>>> + ret = cpufreq_passive_register(&p_data);
>>
>> I think that we better to collect the code related to notifier registration
>> into one function like devfreq_pass_register_notifier() instead of
>> cpufreq_passive_register() as following: I think it is more simple and readable.
>>
>> If you have more proper function name of register_parent_dev_notifier,
>> please give your opinion.
>>
>> int register_parent_dev_notifier(struct devfreq_passive_data **p_data)
>> switch (p_data->parent_type) {
>> case DEVFREQ_PARENT_DEV:
>> nb->notifier_call = devfreq_passive_notifier_call;
>> ret = devfreq_register_notifier(parent, nb,
>> break;
>> case CPUFREQ_PARENT_DEV:
>> cpufreq_register_notifier(...)
>> ...
>> break;
>> }
> Not fully understanding.
> Do you mean expanding cpufreq_passive_register()?
Yes and rename it for both cpufreq and devfreq.
> I think leave it in function will be with clean for this code segment.
I want that one function handle the notifier register
for both cpufreq and devfreq so that we make it more simply as following:
On the step hanling the governor event, don't need to consider
the type of parent device of devfreq deivce with this style.
case DEVFREQ_GOV_START:
ret = register_notifier(...);
break;
case DEVFREQ_GOV_STOP:
ret = unregister_notifier(...);
break;
>
>>
>>
>>> + } else {
>>> + ret = -EINVAL;
>>> + }
>>> break;
>>> case DEVFREQ_GOV_STOP:
>>> - WARN_ON(devfreq_unregister_notifier(parent, nb,
>>> - DEVFREQ_TRANSITION_NOTIFIER));
>>> + if (p_data->parent_type == DEVFREQ_PARENT_DEV)
>>> + WARN_ON(devfreq_unregister_notifier(parent, nb,
>>> + DEVFREQ_TRANSITION_NOTIFIER));
>>> + else if (p_data->parent_type == CPUFREQ_PARENT_DEV)
>>> + cpufreq_passive_unregister(&p_data);
>>> + else
>>> + ret = -EINVAL;
>>
>> ditto. unregister_parent_dev_notifier(struct devfreq_passive_data **p_data)
> Get it.
ditto. As I aboved commented.
>>
>>> break;
>>> default:
>>> break;
>>> diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
>>> index a4b19d593151..04ce576fd6f1 100644
>>> --- a/include/linux/devfreq.h
>>> +++ b/include/linux/devfreq.h
>>> @@ -278,6 +278,32 @@ struct devfreq_simple_ondemand_data {
>>>
>>> #if IS_ENABLED(CONFIG_DEVFREQ_GOV_PASSIVE)
>>> /**
>>> + * struct devfreq_cpu_state - holds the per-cpu state
>>> + * @freq: the current frequency of the cpu.
>>> + * @min_freq: the min frequency of the cpu.
>>> + * @max_freq: the max frequency of the cpu.
>>> + * @first_cpu: the cpumask of the first cpu of a policy.
>>> + * @dev: reference to cpu device.
>>> + * @opp_table: reference to cpu opp table.
>>> + *
>>> + * This structure stores the required cpu_state of a cpu.
>>> + * This is auto-populated by the governor.
>>> + */
>>> +struct devfreq_cpu_state {> + unsigned int freq;
>>
>> It is better to change from 'freq' to 'curr_freq'
>> for more correct expression.
> Get it.
>>
>>> + unsigned int min_freq;
>>> + unsigned int max_freq;
>>> + unsigned int first_cpu;
>>> + struct device *dev;
>>
>> How about changing the name 'dev' to 'cpu_dev'?
> Okay.
>>
>>
>>> + struct opp_table *opp_table;
>>> +};
>>
>> devfreq_cpu_state is only handled by within driver/devfreq/governor_passive.c.
>>
>> So, you can move it into drivers/devfreq/governor_passive.c
>> and just add the definition into include/linux/devfreq.h as following:
>> It is able to prevent the access of variable of 'struct devfreq_cpu_state'
>> outside.
>>
>> struct devfreq_cpu_state;
> Get it.
>>
>>> +
>>> +enum devfreq_parent_dev_type {
>>> + DEVFREQ_PARENT_DEV,
>>> + CPUFREQ_PARENT_DEV,
>>> +};
>>> +
>>> +/**
>>> * struct devfreq_passive_data - ``void *data`` fed to struct devfreq
>>> * and devfreq_add_device
>>> * @parent: the devfreq instance of parent device.
>>> @@ -288,13 +314,15 @@ struct devfreq_simple_ondemand_data {
>>> * using governors except for passive governor.
>>> * If the devfreq device has the specific method to decide
>>> * the next frequency, should use this callback.
>>> - * @this: the devfreq instance of own device.
>>> - * @nb: the notifier block for DEVFREQ_TRANSITION_NOTIFIER list
>>> + * @parent_type parent type of the device
>>
>> Need to add ':' at the end of word. -> "parent_type:".
>>
>>> + * @this: the devfreq instance of own device.
>>> + * @nb: the notifier block for DEVFREQ_TRANSITION_NOTIFIER list
>>
>> I knew that you make them with same indentation.
>> But, actually, it is not related to this patch like clean-up code.
>> Even if it is not pretty, you better to don't touch 'this' and 'nb' indentaion.
> Get it.
>>
>>> + * @cpu_state: the state min/max/current frequency of all online cpu's
>>> *
>>> * The devfreq_passive_data have to set the devfreq instance of parent
>>> * device with governors except for the passive governor. But, don't need to
>>> - * initialize the 'this' and 'nb' field because the devfreq core will handle
>>> - * them.
>>> + * initialize the 'this', 'nb' and 'cpu_state' field because the devfreq core
>>> + * will handle them.
>>> */
>>> struct devfreq_passive_data {
>>> /* Should set the devfreq instance of parent device */
>>> @@ -303,9 +331,13 @@ struct devfreq_passive_data {
>>> /* Optional callback to decide the next frequency of passvice device */
>>> int (*get_target_freq)(struct devfreq *this, unsigned long *freq);
>>>
>>> + /* Should set the type of parent device */
>>> + enum devfreq_parent_dev_type parent_type;
>>> +
>>> /* For passive governor's internal use. Don't need to set them */
>>> struct devfreq *this;
>>> struct notifier_block nb;
>>> + struct devfreq_cpu_state *cpu_state[NR_CPUS];
>>> };
>>> #endif
>>>
>>>
>>
>>
>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 06/12] PM / devfreq: Add cpu based scaling support to passive_governor
From: Chanwoo Choi @ 2020-06-03 4:12 UTC (permalink / raw)
To: andrew-sh.cheng
Cc: Mark Rutland, Nishanth Menon, srv_heupstream, devicetree,
Stephen Boyd, Viresh Kumar, Mark Brown, linux-pm,
Rafael J . Wysocki, Liam Girdwood, Rob Herring, linux-kernel,
Kyungmin Park, MyungJoo Ham, linux-mediatek, Sibi Sankar,
Matthias Brugger, linux-arm-kernel
In-Reply-To: <1591100614.1804.1.camel@mtksdaap41>
Hi Andrew-sh.Cheng,
On 6/2/20 9:23 PM, andrew-sh.cheng wrote:
> On Thu, 2020-05-28 at 16:17 +0900, Chanwoo Choi wrote:
>> Hi Andrew-sh.Cheng,
>>
>> The exynos-bus.c used the passive governor.
>> Even if don't make the problem because DEVFREQ_PARENT_DEV is zero,
>> you need to initialize the parent_type with DEVFREQ_PARENT_DEV as following:
>>
>> diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
>> index 8fa8eb541373..1c71c47bc2ac 100644
>> --- a/drivers/devfreq/exynos-bus.c
>> +++ b/drivers/devfreq/exynos-bus.c
>> @@ -369,6 +369,7 @@ static int exynos_bus_profile_init_passive(struct exynos_bus *bus,
>> return -ENOMEM;
>>
>> passive_data->parent = parent_devfreq;
>> + passive_data->parent_type = DEVFREQ_PARENT_DEV;
>>
>> /* Add devfreq device for exynos bus with passive governor */
>> bus->devfreq = devm_devfreq_add_device(dev, profile, DEVFREQ_GOV_PASSIVE,
> Hi Chanwoo Choi,
> Do you just remind me to initialize it to DEVFREQ_PARENT_DEV whn use
> this governor?
Yes. This change was not included in this patchset.
> I will do it and thank you for reminding.
Thanks.
(snip)
And, this patchset doesn't include the dt-binding example
and any real example in devicetree. If possible, I recommend
you better to update dt-binding document with example.
--
Best Regards,
Chanwoo Choi
Samsung Electronics
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [soc:baikal/drivers-1] BUILD REGRESSION 83ca8b3e8f213f49cc68b5c1fbcf88ebb24671eb
From: kbuild test robot @ 2020-06-03 5:21 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: arm, linux-arm-kernel
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git baikal/drivers-1
branch HEAD: 83ca8b3e8f213f49cc68b5c1fbcf88ebb24671eb memory: Add Baikal-T1 L2-cache Control Block driver
Error/Warning in current branch:
drivers/bus/bt1-apb.c:330:3: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration]
Error/Warning ids grouped by kconfigs:
recent_errors
`-- sparc64-allyesconfig
`-- drivers-bus-bt1-apb.c:error:implicit-declaration-of-function-readl
elapsed time: 8168m
configs tested: 120
configs skipped: 7
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i386 randconfig-a013-20200529
i386 randconfig-a011-20200529
i386 randconfig-a012-20200529
i386 randconfig-a015-20200529
i386 randconfig-a016-20200529
i386 randconfig-a014-20200529
riscv allyesconfig
riscv allnoconfig
riscv defconfig
riscv allmodconfig
s390 allnoconfig
s390 defconfig
s390 allyesconfig
s390 allmodconfig
sparc defconfig
sparc64 defconfig
sparc64 allnoconfig
sparc64 allmodconfig
um allmodconfig
um allnoconfig
um defconfig
um allyesconfig
x86_64 rhel
x86_64 rhel-7.6
x86_64 rhel-7.6-kselftests
x86_64 rhel-7.2-clear
x86_64 lkp
x86_64 fedora-25
x86_64 kexec
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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* [soc:for-next] BUILD SUCCESS 536b63efd215900771a0269e9f457183b2c62a70
From: kbuild test robot @ 2020-06-03 5:21 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: arm, linux-arm-kernel
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
branch HEAD: 536b63efd215900771a0269e9f457183b2c62a70 soc: document merges
elapsed time: 482m
configs tested: 101
configs skipped: 11
The following configs have been built successfully.
More configs may be tested in the coming days.
arm defconfig
arm allyesconfig
arm allmodconfig
arm allnoconfig
arm64 allyesconfig
arm64 defconfig
arm64 allmodconfig
arm64 allnoconfig
sh kfr2r09-romimage_defconfig
arm prima2_defconfig
arc nsimosci_defconfig
m68k allyesconfig
arm imx_v4_v5_defconfig
h8300 edosk2674_defconfig
parisc generic-64bit_defconfig
m68k amcore_defconfig
arm corgi_defconfig
sparc allyesconfig
mips bmips_stb_defconfig
arm realview_defconfig
alpha defconfig
arm moxart_defconfig
sh j2_defconfig
sparc64 allyesconfig
arm mps2_defconfig
powerpc alldefconfig
mips maltaup_defconfig
mips jmr3927_defconfig
s390 alldefconfig
c6x evmc6472_defconfig
sh rsk7203_defconfig
arm netwinder_defconfig
arm badge4_defconfig
mips decstation_64_defconfig
i386 allnoconfig
i386 allyesconfig
i386 defconfig
i386 debian-10.3
ia64 allmodconfig
ia64 defconfig
ia64 allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k allnoconfig
m68k sun3_defconfig
m68k defconfig
nios2 defconfig
nios2 allyesconfig
openrisc defconfig
c6x allyesconfig
c6x allnoconfig
openrisc allyesconfig
nds32 defconfig
nds32 allnoconfig
csky allyesconfig
csky defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
h8300 allmodconfig
xtensa defconfig
arc defconfig
arc allyesconfig
sh allmodconfig
sh allnoconfig
microblaze allnoconfig
mips allyesconfig
mips allnoconfig
mips allmodconfig
parisc allnoconfig
parisc defconfig
parisc allyesconfig
parisc allmodconfig
powerpc allyesconfig
powerpc rhel-kconfig
powerpc allmodconfig
powerpc allnoconfig
powerpc defconfig
riscv allyesconfig
riscv allnoconfig
riscv defconfig
riscv allmodconfig
s390 allyesconfig
s390 allnoconfig
s390 allmodconfig
s390 defconfig
sparc defconfig
sparc64 defconfig
sparc64 allnoconfig
sparc64 allmodconfig
um allnoconfig
um defconfig
um allmodconfig
um allyesconfig
x86_64 rhel
x86_64 rhel-7.6
x86_64 rhel-7.6-kselftests
x86_64 rhel-7.2-clear
x86_64 lkp
x86_64 fedora-25
x86_64 kexec
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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^ permalink raw reply
* [soc:arm/soc] BUILD SUCCESS d2353bad2c1eef7a1228645fbb21e7887c633d12
From: kbuild test robot @ 2020-06-03 5:21 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: arm, linux-arm-kernel
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git arm/soc
branch HEAD: d2353bad2c1eef7a1228645fbb21e7887c633d12 ARM: omap2: fix omap5_realtime_timer_init definition
elapsed time: 482m
configs tested: 99
configs skipped: 10
The following configs have been built successfully.
More configs may be tested in the coming days.
arm defconfig
arm allyesconfig
arm allmodconfig
arm allnoconfig
arm64 allyesconfig
arm64 defconfig
arm64 allmodconfig
arm64 allnoconfig
arm imx_v4_v5_defconfig
h8300 edosk2674_defconfig
parisc generic-64bit_defconfig
m68k amcore_defconfig
arm corgi_defconfig
sparc allyesconfig
mips bmips_stb_defconfig
arm realview_defconfig
alpha defconfig
arm moxart_defconfig
sh j2_defconfig
sparc64 allyesconfig
arm mps2_defconfig
powerpc alldefconfig
mips maltaup_defconfig
mips jmr3927_defconfig
s390 alldefconfig
c6x evmc6472_defconfig
sh rsk7203_defconfig
arm netwinder_defconfig
arm badge4_defconfig
mips decstation_64_defconfig
arc nsimosci_defconfig
i386 allnoconfig
i386 allyesconfig
i386 defconfig
i386 debian-10.3
ia64 allmodconfig
ia64 defconfig
ia64 allnoconfig
ia64 allyesconfig
m68k allmodconfig
m68k allnoconfig
m68k sun3_defconfig
m68k defconfig
m68k allyesconfig
nios2 defconfig
nios2 allyesconfig
openrisc defconfig
c6x allyesconfig
c6x allnoconfig
openrisc allyesconfig
nds32 defconfig
nds32 allnoconfig
csky allyesconfig
csky defconfig
alpha allyesconfig
xtensa allyesconfig
h8300 allyesconfig
h8300 allmodconfig
xtensa defconfig
arc defconfig
arc allyesconfig
sh allmodconfig
sh allnoconfig
microblaze allnoconfig
mips allyesconfig
mips allnoconfig
mips allmodconfig
parisc allnoconfig
parisc defconfig
parisc allyesconfig
parisc allmodconfig
powerpc defconfig
powerpc allyesconfig
powerpc rhel-kconfig
powerpc allmodconfig
powerpc allnoconfig
riscv allyesconfig
riscv allnoconfig
riscv defconfig
riscv allmodconfig
s390 allyesconfig
s390 allnoconfig
s390 allmodconfig
s390 defconfig
sparc defconfig
sparc64 defconfig
sparc64 allnoconfig
sparc64 allmodconfig
um allnoconfig
um defconfig
um allmodconfig
um allyesconfig
x86_64 rhel
x86_64 rhel-7.6
x86_64 rhel-7.6-kselftests
x86_64 rhel-7.2-clear
x86_64 lkp
x86_64 fedora-25
x86_64 kexec
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
_______________________________________________
linux-arm-kernel mailing list
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^ permalink raw reply
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