* [PATCH 1/7] arm64: dts: ti: k3-am654-base-board: Add missing pinmux wkup_uart, mcu_uart and mcu_i2c
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
Many of the definitions depend on pinmux done by the bootloader. Be
explicit about the pinmux for functionality and completeness.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 34 +++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 592ab2b54cb3..7a79ef51bcc8 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -120,6 +120,15 @@ vdd_mmc1_sd: fixedregulator-sd {
};
&wkup_pmx0 {
+ wkup_uart0_pins_default: wkup-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
+ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
+ AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
+ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
+ >;
+ };
+
wkup_i2c0_pins_default: wkup-i2c0-pins-default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
@@ -156,6 +165,15 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
>;
};
+ mcu_uart0_pins_default: mcu-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
+ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
+ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
+ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
+ >;
+ };
+
mcu_cpsw_pins_default: mcu-cpsw-pins-default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
@@ -179,6 +197,13 @@ AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>;
};
+
+ mcu_i2c0_pins_default: mcu-i2c0-pins-default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */
+ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */
+ >;
+ };
};
&main_pmx0 {
@@ -269,11 +294,14 @@ AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
};
&mcu_uart0 {
status = "okay";
- /* Default pinmux */
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_uart0_pins_default>;
};
&main_uart0 {
@@ -305,7 +333,9 @@ pca9554: gpio@39 {
&mcu_i2c0 {
status = "okay";
- /* Default pinmux */
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_i2c0_pins_default>;
+ clock-frequency = <400000>;
};
&main_i2c0 {
--
2.40.0
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* [PATCH 3/7] arm64: dts: ti: k3-am654-base-board: Add VTT GPIO regulator for DDR
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
Hold the DDR vtt regulator active for functionality.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index d3dd6899ef03..83467adc017d 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -117,6 +117,20 @@ vdd_mmc1_sd: regulator-2 {
vin-supply = <&vcc3v3_io>;
gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
};
+
+ vtt_supply: regulator-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vtt";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ddr_vtt_pins_default>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc3v3_io>;
+ gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
+ };
};
&wkup_pmx0 {
@@ -129,6 +143,12 @@ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
>;
};
+ ddr_vtt_pins_default: ddr-vtt-pins-default {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
+ >;
+ };
+
wkup_i2c0_pins_default: wkup-i2c0-pins-default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
--
2.40.0
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* [PATCH 6/7] arm64: dts: ti: k3-am654-base-board: Add aliases
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
Introduce aliases compatible with the base definition, but focussed on
the interfaces that have been exposed on the platform.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index c10266077f53..628c72dcec79 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -13,6 +13,20 @@ / {
compatible = "ti,am654-evm", "ti,am654";
model = "Texas Instruments AM654 Base Board";
+ aliases {
+ serial0 = &wkup_uart0;
+ serial1 = &mcu_uart0;
+ serial2 = &main_uart0;
+ i2c0 = &wkup_i2c0;
+ i2c1 = &mcu_i2c0;
+ i2c2 = &main_i2c0;
+ i2c3 = &main_i2c1;
+ i2c4 = &main_i2c2;
+ ethernet0 = &cpsw_port1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ };
+
chosen {
stdout-path = "serial2:115200n8";
bootargs = "earlycon=ns16550a,mmio32,0x02800000";
--
2.40.0
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* [PATCH 4/7] arm64: dts: ti: k3-am654-base-board: Add missing PMIC
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
Add the missing vdd_mpu PMIC.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 83467adc017d..640910e2280f 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -337,6 +337,19 @@ &wkup_i2c0 {
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
+ vdd_mpu: regulator@60 {
+ compatible = "ti,tps62363";
+ reg = <0x60>;
+ regulator-name = "VDD_MPU";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1770000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,vsel0-state-high;
+ ti,vsel1-state-high;
+ ti,enable-vout-discharge;
+ };
+
pca9554: gpio@39 {
compatible = "nxp,pca9554";
reg = <0x39>;
--
2.40.0
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* [PATCH 7/7] arm64: dts: ti: k3-am65: Drop aliases
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
iot boards have always defined their own aliases and with the base-board
defining it's own aliases, there are no pending boards depending on
common aliases defined in SoC level.
aliases are meant to be defined appropriately based on the exposed
interfaces at a board level, drop the aliases defined at SoC level.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am65.dtsi | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi
index 3093ef6b9b23..4d7b6155a76b 100644
--- a/arch/arm64/boot/dts/ti/k3-am65.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi
@@ -19,23 +19,6 @@ / {
#address-cells = <2>;
#size-cells = <2>;
- aliases {
- serial0 = &wkup_uart0;
- serial1 = &mcu_uart0;
- serial2 = &main_uart0;
- serial3 = &main_uart1;
- serial4 = &main_uart2;
- i2c0 = &wkup_i2c0;
- i2c1 = &mcu_i2c0;
- i2c2 = &main_i2c0;
- i2c3 = &main_i2c1;
- i2c4 = &main_i2c2;
- i2c5 = &main_i2c3;
- ethernet0 = &cpsw_port1;
- mmc0 = &sdhci0;
- mmc1 = &sdhci1;
- };
-
chosen { };
firmware {
--
2.40.0
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* [PATCH 0/7] arm64: dts: ti: k3-am65: Cleanups and minor additions
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
Hi,
This is a result of looking to cleanup u-boot and realizing there are
pieces missing in kernel that need to be pushed out.
So, minor cleanups and adding a few missing pieces.
Bootlog: https://gist.github.com/nmenon/f4dc43aef616dfcb3d38701cc074ff6d
Nishanth Menon (7):
arm64: dts: ti: k3-am654-base-board: Add missing pinmux wkup_uart,
mcu_uart and mcu_i2c
arm64: dts: ti: k3-am654-base-board: Rename regulator node name
arm64: dts: ti: k3-am654-base-board: Add VTT GPIO regulator for DDR
arm64: dts: ti: k3-am654-base-board: Add missing PMIC
arm64: dts: ti: k3-am654-base-board: Add board detect eeprom
arm64: dts: ti: k3-am654-base-board: Add aliases
arm64: dts: ti: k3-am65: Drop aliases
arch/arm64/boot/dts/ti/k3-am65.dtsi | 17 ----
.../arm64/boot/dts/ti/k3-am654-base-board.dts | 93 ++++++++++++++++++-
2 files changed, 88 insertions(+), 22 deletions(-)
--
2.40.0
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* [PATCH 5/7] arm64: dts: ti: k3-am654-base-board: Add board detect eeprom
From: Nishanth Menon @ 2023-04-19 22:59 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Vignesh Raghavendra
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Jan Kiszka
In-Reply-To: <20230419225913.663448-1-nm@ti.com>
Enable AT24CM01 on the base board using the corresponding compatible.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 640910e2280f..c10266077f53 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -337,6 +337,12 @@ &wkup_i2c0 {
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
+ eeprom@50 {
+ /* AT24CM01 */
+ compatible = "atmel,24c1024";
+ reg = <0x50>;
+ };
+
vdd_mpu: regulator@60 {
compatible = "ti,tps62363";
reg = <0x60>;
--
2.40.0
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* [PATCH v8 03/10] arm64: smp: Assign and setup an IPI as NMI
From: Douglas Anderson @ 2023-04-19 22:55 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Sumit Garg, Daniel Thompson,
Marc Zyngier, Mark Rutland
Cc: ito-yuichi, kgdb-bugreport, Chen-Yu Tsai, Masayoshi Mizuma,
Peter Zijlstra, Ard Biesheuvel, Rafael J . Wysocki,
linux-arm-kernel, Stephen Boyd, Lecopzer Chen, Thomas Gleixner,
linux-perf-users, Masayoshi Mizuma, Douglas Anderson, Ben Dooks,
Pierre Gondois, linux-kernel
In-Reply-To: <20230419225604.21204-1-dianders@chromium.org>
From: Sumit Garg <sumit.garg@linaro.org>
Assign an unused IPI which can be turned as NMI using ipi_nmi framework.
Also, invoke corresponding dynamic IPI setup/teardown APIs.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v8:
- dynamic_ipi_setup() and dynamic_ipi_teardown() no longer take cpu param
arch/arm64/kernel/smp.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 4e8327264255..94ff063527c6 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -43,6 +43,7 @@
#include <asm/daifflags.h>
#include <asm/kvm_mmu.h>
#include <asm/mmu_context.h>
+#include <asm/nmi.h>
#include <asm/numa.h>
#include <asm/processor.h>
#include <asm/smp_plat.h>
@@ -938,6 +939,8 @@ static void ipi_setup(int cpu)
for (i = 0; i < nr_ipi; i++)
enable_percpu_irq(ipi_irq_base + i, 0);
+
+ dynamic_ipi_setup();
}
#ifdef CONFIG_HOTPLUG_CPU
@@ -950,6 +953,8 @@ static void ipi_teardown(int cpu)
for (i = 0; i < nr_ipi; i++)
disable_percpu_irq(ipi_irq_base + i);
+
+ dynamic_ipi_teardown();
}
#endif
@@ -971,6 +976,9 @@ void __init set_smp_ipi_range(int ipi_base, int n)
irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
}
+ if (n > nr_ipi)
+ set_smp_dynamic_ipi(ipi_base + nr_ipi);
+
ipi_irq_base = ipi_base;
/* Setup the boot CPU immediately */
--
2.40.0.634.g4ca3ef3211-goog
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* [PATCH v8 01/10] arm64: Add framework to turn IPI as NMI
From: Douglas Anderson @ 2023-04-19 22:55 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Sumit Garg, Daniel Thompson,
Marc Zyngier, Mark Rutland
Cc: ito-yuichi, kgdb-bugreport, Chen-Yu Tsai, Masayoshi Mizuma,
Peter Zijlstra, Ard Biesheuvel, Rafael J . Wysocki,
linux-arm-kernel, Stephen Boyd, Lecopzer Chen, Thomas Gleixner,
linux-perf-users, Masayoshi Mizuma, Douglas Anderson,
Andrey Konovalov, Joey Gouly, Masahiro Yamada, linux-kernel
In-Reply-To: <20230419225604.21204-1-dianders@chromium.org>
From: Sumit Garg <sumit.garg@linaro.org>
Introduce framework to turn an IPI as NMI using pseudo NMIs. The main
motivation for this feature is to have an IPI that can be leveraged to
invoke NMI functions on other CPUs.
And current prospective users are NMI backtrace and KGDB CPUs round-up
whose support is added via future patches.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v8:
- dynamic_ipi_setup() and dynamic_ipi_teardown() no longer take cpu param
arch/arm64/include/asm/nmi.h | 17 ++++++++++
arch/arm64/kernel/Makefile | 2 +-
arch/arm64/kernel/ipi_nmi.c | 65 ++++++++++++++++++++++++++++++++++++
3 files changed, 83 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/include/asm/nmi.h
create mode 100644 arch/arm64/kernel/ipi_nmi.c
diff --git a/arch/arm64/include/asm/nmi.h b/arch/arm64/include/asm/nmi.h
new file mode 100644
index 000000000000..2cc4b4d4090e
--- /dev/null
+++ b/arch/arm64/include/asm/nmi.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_NMI_H
+#define __ASM_NMI_H
+
+#ifndef __ASSEMBLER__
+
+#include <linux/cpumask.h>
+
+extern bool arm64_supports_nmi(void);
+extern void arm64_send_nmi(cpumask_t *mask);
+
+void set_smp_dynamic_ipi(int ipi);
+void dynamic_ipi_setup(void);
+void dynamic_ipi_teardown(void);
+
+#endif /* !__ASSEMBLER__ */
+#endif
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index ceba6792f5b3..d57c8f99ca69 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -34,7 +34,7 @@ obj-y := debug-monitors.o entry.o irq.o fpsimd.o \
cpufeature.o alternative.o cacheinfo.o \
smp.o smp_spin_table.o topology.o smccc-call.o \
syscall.o proton-pack.o idreg-override.o idle.o \
- patching.o
+ patching.o ipi_nmi.o
obj-$(CONFIG_COMPAT) += sys32.o signal32.o \
sys_compat.o
diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c
new file mode 100644
index 000000000000..712411eed949
--- /dev/null
+++ b/arch/arm64/kernel/ipi_nmi.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * NMI support for IPIs
+ *
+ * Copyright (C) 2020 Linaro Limited
+ * Author: Sumit Garg <sumit.garg@linaro.org>
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+
+#include <asm/nmi.h>
+
+static struct irq_desc *ipi_nmi_desc __read_mostly;
+static int ipi_nmi_id __read_mostly;
+
+bool arm64_supports_nmi(void)
+{
+ if (ipi_nmi_desc)
+ return true;
+
+ return false;
+}
+
+void arm64_send_nmi(cpumask_t *mask)
+{
+ if (WARN_ON_ONCE(!ipi_nmi_desc))
+ return;
+
+ __ipi_send_mask(ipi_nmi_desc, mask);
+}
+
+static irqreturn_t ipi_nmi_handler(int irq, void *data)
+{
+ /* nop, NMI handlers for special features can be added here. */
+
+ return IRQ_NONE;
+}
+
+void dynamic_ipi_setup(void)
+{
+ if (!ipi_nmi_desc)
+ return;
+
+ if (!prepare_percpu_nmi(ipi_nmi_id))
+ enable_percpu_nmi(ipi_nmi_id, IRQ_TYPE_NONE);
+}
+
+void dynamic_ipi_teardown(void)
+{
+ if (!ipi_nmi_desc)
+ return;
+
+ disable_percpu_nmi(ipi_nmi_id);
+ teardown_percpu_nmi(ipi_nmi_id);
+}
+
+void __init set_smp_dynamic_ipi(int ipi)
+{
+ if (!request_percpu_nmi(ipi, ipi_nmi_handler, "IPI", &cpu_number)) {
+ ipi_nmi_desc = irq_to_desc(ipi);
+ ipi_nmi_id = ipi;
+ }
+}
--
2.40.0.634.g4ca3ef3211-goog
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^ permalink raw reply related
* [PATCH v8 02/10] irqchip/gic-v3: Enable support for SGIs to act as NMIs
From: Douglas Anderson @ 2023-04-19 22:55 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Sumit Garg, Daniel Thompson,
Marc Zyngier, Mark Rutland
Cc: ito-yuichi, kgdb-bugreport, Chen-Yu Tsai, Masayoshi Mizuma,
Peter Zijlstra, Ard Biesheuvel, Rafael J . Wysocki,
linux-arm-kernel, Stephen Boyd, Lecopzer Chen, Thomas Gleixner,
linux-perf-users, Masayoshi Mizuma, Douglas Anderson,
linux-kernel
In-Reply-To: <20230419225604.21204-1-dianders@chromium.org>
From: Sumit Garg <sumit.garg@linaro.org>
Add support to handle SGIs as pseudo NMIs. As SGIs or IPIs default to a
special flow handler: handle_percpu_devid_fasteoi_ipi(), so skip NMI
handler update in case of SGIs.
Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
(no changes since v1)
drivers/irqchip/irq-gic-v3.c | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index fd134e1f481a..b402a81fea59 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -482,6 +482,7 @@ static u32 gic_get_ppi_index(struct irq_data *d)
static int gic_irq_nmi_setup(struct irq_data *d)
{
struct irq_desc *desc = irq_to_desc(d->irq);
+ u32 idx;
if (!gic_supports_nmi())
return -EINVAL;
@@ -499,16 +500,22 @@ static int gic_irq_nmi_setup(struct irq_data *d)
return -EINVAL;
/* desc lock should already be held */
- if (gic_irq_in_rdist(d)) {
- u32 idx = gic_get_ppi_index(d);
+ switch (get_intid_range(d)) {
+ case SGI_RANGE:
+ break;
+ case PPI_RANGE:
+ case EPPI_RANGE:
+ idx = gic_get_ppi_index(d);
/* Setting up PPI as NMI, only switch handler for first NMI */
if (!refcount_inc_not_zero(&ppi_nmi_refs[idx])) {
refcount_set(&ppi_nmi_refs[idx], 1);
desc->handle_irq = handle_percpu_devid_fasteoi_nmi;
}
- } else {
+ break;
+ default:
desc->handle_irq = handle_fasteoi_nmi;
+ break;
}
gic_irq_set_prio(d, GICD_INT_NMI_PRI);
@@ -519,6 +526,7 @@ static int gic_irq_nmi_setup(struct irq_data *d)
static void gic_irq_nmi_teardown(struct irq_data *d)
{
struct irq_desc *desc = irq_to_desc(d->irq);
+ u32 idx;
if (WARN_ON(!gic_supports_nmi()))
return;
@@ -536,14 +544,20 @@ static void gic_irq_nmi_teardown(struct irq_data *d)
return;
/* desc lock should already be held */
- if (gic_irq_in_rdist(d)) {
- u32 idx = gic_get_ppi_index(d);
+ switch (get_intid_range(d)) {
+ case SGI_RANGE:
+ break;
+ case PPI_RANGE:
+ case EPPI_RANGE:
+ idx = gic_get_ppi_index(d);
/* Tearing down NMI, only switch handler for last NMI */
if (refcount_dec_and_test(&ppi_nmi_refs[idx]))
desc->handle_irq = handle_percpu_devid_irq;
- } else {
+ break;
+ default:
desc->handle_irq = handle_fasteoi_irq;
+ break;
}
gic_irq_set_prio(d, GICD_INT_DEF_PRI);
@@ -1867,6 +1881,7 @@ static int __init gic_init_bases(void __iomem *dist_base,
gic_dist_init();
gic_cpu_init();
+ gic_enable_nmi_support();
gic_smp_init();
gic_cpu_pm_init();
@@ -1879,8 +1894,6 @@ static int __init gic_init_bases(void __iomem *dist_base,
gicv2m_init(handle, gic_data.domain);
}
- gic_enable_nmi_support();
-
return 0;
out_free:
--
2.40.0.634.g4ca3ef3211-goog
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^ permalink raw reply related
* [PATCH 1/4] can: m_can: Add hrtimer to generate software interrupt
From: Judith Mendez @ 2023-04-19 22:33 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger, Marc Kleine-Budde
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Schuyler Patton, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Oliver Hartkopp, Judith Mendez,
linux-arm-kernel, devicetree, linux-kernel, linux-can, netdev
In-Reply-To: <20230419223323.20384-1-jm@ti.com>
Add an hrtimer to MCAN struct. Each MCAN will have its own
hrtimer instantiated if there is no hardware interrupt found.
The hrtimer will generate a software interrupt every 1 ms. In
hrtimer callback, we check if there is a transaction pending by
reading a register, then process by calling the isr if there is.
Signed-off-by: Judith Mendez <jm@ti.com>
---
drivers/net/can/m_can/m_can.c | 30 ++++++++++++++++++++++++--
drivers/net/can/m_can/m_can.h | 3 +++
drivers/net/can/m_can/m_can_platform.c | 13 +++++++++--
3 files changed, 42 insertions(+), 4 deletions(-)
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index a5003435802b..8784bdea300a 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -23,6 +23,7 @@
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/hrtimer.h>
#include "m_can.h"
@@ -1587,6 +1588,11 @@ static int m_can_close(struct net_device *dev)
if (!cdev->is_peripheral)
napi_disable(&cdev->napi);
+ if (dev->irq < 0) {
+ dev_dbg(cdev->dev, "Disabling the hrtimer\n");
+ hrtimer_cancel(&cdev->hrtimer);
+ }
+
m_can_stop(dev);
m_can_clk_stop(cdev);
free_irq(dev->irq, dev);
@@ -1793,6 +1799,18 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,
return NETDEV_TX_OK;
}
+enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)
+{
+ struct m_can_classdev *cdev =
+ container_of(timer, struct m_can_classdev, hrtimer);
+
+ m_can_isr(0, cdev->net);
+
+ hrtimer_forward_now(timer, ms_to_ktime(1));
+
+ return HRTIMER_RESTART;
+}
+
static int m_can_open(struct net_device *dev)
{
struct m_can_classdev *cdev = netdev_priv(dev);
@@ -1827,13 +1845,21 @@ static int m_can_open(struct net_device *dev)
}
INIT_WORK(&cdev->tx_work, m_can_tx_work_queue);
-
err = request_threaded_irq(dev->irq, NULL, m_can_isr,
IRQF_ONESHOT,
dev->name, dev);
+
} else {
- err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name,
+ if (dev->irq > 0) {
+ err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name,
dev);
+ }
+
+ else {
+ dev_dbg(cdev->dev, "Enabling the hrtimer\n");
+ cdev->hrtimer.function = &hrtimer_callback;
+ hrtimer_start(&cdev->hrtimer, ns_to_ktime(0), HRTIMER_MODE_REL_PINNED);
+ }
}
if (err < 0) {
diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h
index a839dc71dc9b..ed046d77fdb9 100644
--- a/drivers/net/can/m_can/m_can.h
+++ b/drivers/net/can/m_can/m_can.h
@@ -28,6 +28,7 @@
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
+#include <linux/hrtimer.h>
/* m_can lec values */
enum m_can_lec_type {
@@ -93,6 +94,8 @@ struct m_can_classdev {
int is_peripheral;
struct mram_cfg mcfg[MRAM_CFG_NUM];
+
+ struct hrtimer hrtimer;
};
struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv);
diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c
index 9c1dcf838006..7540db74b7d0 100644
--- a/drivers/net/can/m_can/m_can_platform.c
+++ b/drivers/net/can/m_can/m_can_platform.c
@@ -7,6 +7,7 @@
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/hrtimer.h>
#include "m_can.h"
@@ -98,8 +99,16 @@ static int m_can_plat_probe(struct platform_device *pdev)
addr = devm_platform_ioremap_resource_byname(pdev, "m_can");
irq = platform_get_irq_byname(pdev, "int0");
if (IS_ERR(addr) || irq < 0) {
- ret = -EINVAL;
- goto probe_fail;
+ if (irq == -EPROBE_DEFER) {
+ ret = -EPROBE_DEFER;
+ goto probe_fail;
+ }
+ if (IS_ERR(addr)) {
+ ret = PTR_ERR(addr);
+ goto probe_fail;
+ }
+ dev_dbg(mcan_class->dev, "Failed to get irq, initialize hrtimer\n");
+ hrtimer_init(&mcan_class->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);
}
/* message ram could be shared */
--
2.17.1
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^ permalink raw reply related
* [PATCH 0/4] Enable multiple MCAN on AM62x
From: Judith Mendez @ 2023-04-19 22:33 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger, Marc Kleine-Budde
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Schuyler Patton, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Oliver Hartkopp, Judith Mendez,
linux-arm-kernel, devicetree, linux-kernel, linux-can, netdev
On AM62x there is one MCAN in MAIN domain and two in MCU domain.
The MCANs in MCU domain were not enabled since there is no
hardware interrupt routed to A53 GIC interrupt controller.
Therefore A53 Linux cannot be interrupted by MCU MCANs.
This solution instantiates a hrtimer with 1 ms polling interval
for a MCAN when there is no hardware interrupt. This hrtimer
generates a recurring software interrupt which allows to call the
isr. The isr will check if there is pending transaction by reading
a register and proceed normally if there is.
On AM62x this series enables two MCU MCAN which will use the hrtimer
implementation. MCANs with hardware interrupt routed to A53 Linux
will continue to use the hardware interrupt as expected.
Timer polling method was tested on both classic CAN and CAN-FD
at 125 KBPS, 250 KBPS, 1 MBPS and 2.5 MBPS with 4 MBPS bitrate
switching.
Letency and CPU load benchmarks were tested on 3x MCAN on AM62x.
1 MBPS timer polling interval is the better timer polling interval
since it has comparable latency to hardware interrupt with the worse
case being 1ms + CAN frame propagation time and CPU load is not
substantial. Latency can be improved further with less than 1 ms
polling intervals, howerver it is at the cost of CPU usage since CPU
load increases at 0.5 ms and lower polling periods than 1ms.
Note that in terms of power, enabling MCU MCANs with timer-polling
implementation might have negative impact since we will have to wake
up every 1 ms whether there are CAN packets pending in the RX FIFO or
not. This might prevent the CPU from entering into deeper idle states
for extended periods of time.
This patch series depends on 'Enable CAN PHY transceiver driver':
https://lore.kernel.org/lkml/775ec9ce-7668-429c-a977-6c8995968d6e@app.fastmail.com/T/
Previously sent an RFC:
https://lore.kernel.org/linux-can/52a37e51-4143-9017-42ee-8d17c67028e3@ti.com/T/#t
Judith Mendez (4):
can: m_can: Add hrtimer to generate software interrupt
dt-bindings: net: can: Make interrupt attributes optional for MCAN
arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay
arm64: dts: ti: Enable MCU MCANs for AM62x
.../bindings/net/can/bosch,m_can.yaml | 2 -
arch/arm64/boot/dts/ti/Makefile | 2 +
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++
.../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 ++++++++++++
.../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 55 +++++++++++++++++++
drivers/net/can/m_can/m_can.c | 30 +++++++++-
drivers/net/can/m_can/m_can.h | 3 +
drivers/net/can/m_can/m_can_platform.c | 13 ++++-
8 files changed, 158 insertions(+), 6 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso
create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
--
2.17.1
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^ permalink raw reply
* [PATCH 4/4] DO_NOT_MERGE arm64: dts: ti: Enable MCU MCANs for AM62x
From: Judith Mendez @ 2023-04-19 22:33 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger, Marc Kleine-Budde
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Schuyler Patton, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Oliver Hartkopp, Judith Mendez,
linux-arm-kernel, devicetree, linux-kernel, linux-can, netdev
In-Reply-To: <20230419223323.20384-1-jm@ti.com>
On AM62x there are no hardware interrupts routed to GIC interrupt
controller for MCU MCAN IP, A53 Linux cannot receive hardware
interrupts. Since an hrtimer will be used to generate software
interrupts, add MCU MCAN nodes to dtsi and default to disabled.
AM62x does not carry on-board CAN transceivers, so instead of
changing DTB permanently use an overlay to enable MCU MCANs and to
add CAN transceiver nodes.
If an hrtimer is used to generate software interrupts, the two
required interrupt attributes in the MCAN node do not have to be
included.
Signed-off-by: Judith Mendez <jm@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 2 +-
arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++
.../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 55 +++++++++++++++++++
3 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index abe15e76b614..c76be3888e4d 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -9,7 +9,7 @@
# alphabetically.
# Boards with AM62x SoC
-k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
+k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo k3-am625-sk-mcan-mcu.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
index 076601a41e84..20462f457643 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi
@@ -141,4 +141,28 @@
/* Tightly coupled to M4F */
status = "reserved";
};
+
+ mcu_mcan1: can@4e00000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e00000 0x00 0x8000>,
+ <0x00 0x4e08000 0x00 0x200>;
+ reg-names = "message_ram", "m_can";
+ power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ mcu_mcan2: can@4e10000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e10000 0x00 0x8000>,
+ <0x00 0x4e18000 0x00 0x200>;
+ reg-names = "message_ram", "m_can";
+ power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
new file mode 100644
index 000000000000..7a527fdd4981
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * DT overlay for MCAN in MCU domain on AM625 SK
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/k3.h>
+
+&{/} {
+ transceiver2: can-phy1 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+
+ transceiver3: can-phy2 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+};
+
+&mcu_pmx0 {
+ mcu_mcan1_pins_default: mcu-mcan1-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */
+ AM62X_IOPAD(0x034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */
+ >;
+ };
+
+ mcu_mcan2_pins_default: mcu-mcan2-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x040, PIN_INPUT, 0) /* (D4) MCU_MCAN1_RX */
+ AM62X_IOPAD(0x03C, PIN_OUTPUT, 0) /* (E5) MCU_MCAN1_TX */
+ >;
+ };
+};
+
+&mcu_mcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan1_pins_default>;
+ phys = <&transceiver2>;
+ status = "okay";
+};
+
+&mcu_mcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan2_pins_default>;
+ phys = <&transceiver3>;
+ status = "okay";
+};
--
2.17.1
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^ permalink raw reply related
* [PATCH 3/4] DO_NOT_MERGE arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay
From: Judith Mendez @ 2023-04-19 22:33 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger, Marc Kleine-Budde
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Schuyler Patton, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Oliver Hartkopp, Judith Mendez,
linux-arm-kernel, devicetree, linux-kernel, linux-can, netdev
In-Reply-To: <20230419223323.20384-1-jm@ti.com>
Add an overlay for main domain MCAN on AM62x SK. The AM62x
SK board does not have on-board CAN transceiver so instead
of changing the DTB permanently, add an overlay to enable
MAIN domain MCAN and support for 1 CAN transceiver.
Signed-off-by: Judith Mendez <jm@ti.com>
---
arch/arm64/boot/dts/ti/Makefile | 2 ++
.../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 +++++++++++++++++++
2 files changed, 37 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index c83c9d772b81..abe15e76b614 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -9,8 +9,10 @@
# alphabetically.
# Boards with AM62x SoC
+k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo
dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb
# Boards with AM62Ax SoC
diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso
new file mode 100644
index 000000000000..72b68fd51121
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * DT overlay for MCAN transceiver in main domain on AM625 SK
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/pinctrl/k3.h>
+
+&{/} {
+ transceiver1: can-phy0 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+};
+
+&main_pmx0 {
+ main_mcan0_pins_default: main-mcan0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */
+ AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */
+ >;
+ };
+};
+
+&main_mcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan0_pins_default>;
+ phys = <&transceiver1>;
+};
--
2.17.1
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^ permalink raw reply related
* [PATCH 2/4] dt-bindings: net: can: Make interrupt attributes optional for MCAN
From: Judith Mendez @ 2023-04-19 22:33 UTC (permalink / raw)
To: Chandrasekar Ramakrishnan, Wolfgang Grandegger, Marc Kleine-Budde
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Schuyler Patton, Nishanth Menon, Vignesh Raghavendra, Tero Kristo,
Rob Herring, Krzysztof Kozlowski, Oliver Hartkopp, Judith Mendez,
linux-arm-kernel, devicetree, linux-kernel, linux-can, netdev
In-Reply-To: <20230419223323.20384-1-jm@ti.com>
For MCAN, remove interrupt and interrupt names from the required
section.
On AM62x SoC, MCANs on MCU domain do not have hardware interrupt
routed to A53 Linux, instead they will use software interrupt
by hrtimer. Make interrupt attributes optional in MCAN node
by removing from required section.
Signed-off-by: Judith Mendez <jm@ti.com>
---
Documentation/devicetree/bindings/net/can/bosch,m_can.yaml | 2 --
1 file changed, 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
index 67879aab623b..43f1aa9addc0 100644
--- a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
+++ b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml
@@ -122,8 +122,6 @@ required:
- compatible
- reg
- reg-names
- - interrupts
- - interrupt-names
- clocks
- clock-names
- bosch,mram-cfg
--
2.17.1
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^ permalink raw reply related
* Re: [PATCH] staging: vchiq_arm: Make vchiq_platform_init() static
From: Nick Desaulniers @ 2023-04-19 21:48 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Simon Horman, Stefan Wahren, Broadcom internal kernel review list,
Nathan Chancellor, Tom Rix, Greg Kroah-Hartman, linux-rpi-kernel,
linux-arm-kernel, linux-staging, llvm, Florian Fainelli
In-Reply-To: <8d070a27-fa53-4965-95b0-e0bf8bb90609@app.fastmail.com>
On Wed, Apr 19, 2023 at 2:42 PM Arnd Bergmann <arnd@kernel.org> wrote:
>
> On Wed, Apr 19, 2023, at 23:38, Nick Desaulniers wrote:
> > On Wed, Apr 19, 2023 at 2:35 PM Arnd Bergmann <arnd@kernel.org> wrote:
> >>
> >> On Wed, Apr 19, 2023, at 23:21, Nick Desaulniers wrote:
> >> > On Wed, Apr 19, 2023 at 1:51 AM Simon Horman <horms@kernel.org> wrote:
> >>
> >> > Marking something as `depends on OF_DYNAMIC`. (Not sure whether Arnd
> >> > meant that for BCM2835_VCHIQ or BCM_VIDEOCORE).
> >> > Perhaps try that?
> >> >
> >> >>
> >> >> I'm a bit surprised as I didn't observe such a thing.
> >> >> But I also don't dispute it - clearly my testing was inadequate.
> >> >>
> >> >> I'll try and dig a bit deeper into this one.
> >> >> Perhaps starting with the report from the kernel test robot [3]
> >>
> >> I have this in my randconfig build tree, but it looks like I never
> >> sent it out.
> >
> > What else have you got hidden up in there? ;)
> > Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
>
> Actually, I have fixes for all missing-prototype warnings
> in my tree, just remembered that this one is part of my
> longer series. I have about 150 patches that are already split
> up and just need to be sent out, plus more that are currently
> sitting in a combined changeset.
All? Wanna bet we can introduce new instances of that warning faster
than you can fix all of them? Actually, no I would not take that bet.
I'm just having fun, thanks for all of that cleanup work!
--
Thanks,
~Nick Desaulniers
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^ permalink raw reply
* Re: [PATCH] staging: vchiq_arm: Make vchiq_platform_init() static
From: Arnd Bergmann @ 2023-04-19 21:41 UTC (permalink / raw)
To: Nick Desaulniers
Cc: Simon Horman, Stefan Wahren, Broadcom internal kernel review list,
Nathan Chancellor, Tom Rix, Greg Kroah-Hartman, linux-rpi-kernel,
linux-arm-kernel, linux-staging, llvm, Florian Fainelli
In-Reply-To: <CAKwvOd=kShNVxFvjODEghrHGXK7Gekwcwb3cEFUgEBhZcOHC_Q@mail.gmail.com>
On Wed, Apr 19, 2023, at 23:38, Nick Desaulniers wrote:
> On Wed, Apr 19, 2023 at 2:35 PM Arnd Bergmann <arnd@kernel.org> wrote:
>>
>> On Wed, Apr 19, 2023, at 23:21, Nick Desaulniers wrote:
>> > On Wed, Apr 19, 2023 at 1:51 AM Simon Horman <horms@kernel.org> wrote:
>>
>> > Marking something as `depends on OF_DYNAMIC`. (Not sure whether Arnd
>> > meant that for BCM2835_VCHIQ or BCM_VIDEOCORE).
>> > Perhaps try that?
>> >
>> >>
>> >> I'm a bit surprised as I didn't observe such a thing.
>> >> But I also don't dispute it - clearly my testing was inadequate.
>> >>
>> >> I'll try and dig a bit deeper into this one.
>> >> Perhaps starting with the report from the kernel test robot [3]
>>
>> I have this in my randconfig build tree, but it looks like I never
>> sent it out.
>
> What else have you got hidden up in there? ;)
> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Actually, I have fixes for all missing-prototype warnings
in my tree, just remembered that this one is part of my
longer series. I have about 150 patches that are already split
up and just need to be sent out, plus more that are currently
sitting in a combined changeset.
Arnd
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^ permalink raw reply
* Re: [PATCH] staging: vchiq_arm: Make vchiq_platform_init() static
From: Nick Desaulniers @ 2023-04-19 21:38 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Simon Horman, Stefan Wahren, Broadcom internal kernel review list,
Nathan Chancellor, Tom Rix, Greg Kroah-Hartman, linux-rpi-kernel,
linux-arm-kernel, linux-staging, llvm, Florian Fainelli
In-Reply-To: <20ac24d6-4d94-4003-9203-d852714e1a46@app.fastmail.com>
On Wed, Apr 19, 2023 at 2:35 PM Arnd Bergmann <arnd@kernel.org> wrote:
>
> On Wed, Apr 19, 2023, at 23:21, Nick Desaulniers wrote:
> > On Wed, Apr 19, 2023 at 1:51 AM Simon Horman <horms@kernel.org> wrote:
>
> > Marking something as `depends on OF_DYNAMIC`. (Not sure whether Arnd
> > meant that for BCM2835_VCHIQ or BCM_VIDEOCORE).
> > Perhaps try that?
> >
> >>
> >> I'm a bit surprised as I didn't observe such a thing.
> >> But I also don't dispute it - clearly my testing was inadequate.
> >>
> >> I'll try and dig a bit deeper into this one.
> >> Perhaps starting with the report from the kernel test robot [3]
>
> I have this in my randconfig build tree, but it looks like I never
> sent it out.
What else have you got hidden up in there? ;)
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
>
> ----
> From bb01f96d7dd66fc437302785f623a3ab323d486e Mon Sep 17 00:00:00 2001
> From: Arnd Bergmann <arnd@arndb.de>
> Date: Mon, 20 Mar 2023 11:33:52 +0100
> Subject: [PATCH] staging: vchiq_arm: mark vchiq_platform_init() static
>
> This function has no callers from other files, and the declaration
> was removed a while ago, causing a W=1 warning:
>
> drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:465:5: error: no previous prototype for 'vchiq_platform_init'
>
> Marking it static solves this problem but introduces a new warning
> since gcc determines that 'g_fragments_base' is never initialized
> in some kernel configurations:
>
> In file included from include/linux/string.h:254,
> from include/linux/bitmap.h:11,
> from include/linux/cpumask.h:12,
> from include/linux/mm_types_task.h:14,
> from include/linux/mm_types.h:5,
> from include/linux/buildid.h:5,
> from include/linux/module.h:14,
> from drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:8:
> In function 'memcpy_to_page',
> inlined from 'free_pagelist' at drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:433:4:
> include/linux/fortify-string.h:57:33: error: argument 2 null where non-null expected [-Werror=nonnull]
> include/linux/highmem.h:427:9: note: in expansion of macro 'memcpy'
> 427 | memcpy(to + offset, from, len);
> | ^~~~~~
>
> Add a NULL pointer check for this in addition to the static annotation
> to avoid both.
>
> Fixes: 89cc4218f640 ("staging: vchiq_arm: drop unnecessary declarations")
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
> index 90a3958d1f29..aa2313f3bcab 100644
> --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
> +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
> @@ -415,7 +415,7 @@ free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagel
> pagelistinfo->scatterlist_mapped = 0;
>
> /* Deal with any partial cache lines (fragments) */
> - if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS) {
> + if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS && g_fragments_base) {
> char *fragments = g_fragments_base +
> (pagelist->type - PAGELIST_READ_WITH_FRAGMENTS) *
> g_fragments_size;
> @@ -462,7 +462,7 @@ free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagel
> cleanup_pagelistinfo(instance, pagelistinfo);
> }
>
> -int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
> +static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
> {
> struct device *dev = &pdev->dev;
> struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev);
>
--
Thanks,
~Nick Desaulniers
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH] staging: vchiq_arm: Make vchiq_platform_init() static
From: Arnd Bergmann @ 2023-04-19 21:35 UTC (permalink / raw)
To: Nick Desaulniers, Simon Horman
Cc: Stefan Wahren, Broadcom internal kernel review list,
Nathan Chancellor, Tom Rix, Greg Kroah-Hartman, linux-rpi-kernel,
linux-arm-kernel, linux-staging, llvm, Florian Fainelli
In-Reply-To: <CAKwvOdkKACfOvZ4BcG9NcO1Kh97vqSx0y7ZBc+BOJnHUpq8qWw@mail.gmail.com>
On Wed, Apr 19, 2023, at 23:21, Nick Desaulniers wrote:
> On Wed, Apr 19, 2023 at 1:51 AM Simon Horman <horms@kernel.org> wrote:
> Marking something as `depends on OF_DYNAMIC`. (Not sure whether Arnd
> meant that for BCM2835_VCHIQ or BCM_VIDEOCORE).
> Perhaps try that?
>
>>
>> I'm a bit surprised as I didn't observe such a thing.
>> But I also don't dispute it - clearly my testing was inadequate.
>>
>> I'll try and dig a bit deeper into this one.
>> Perhaps starting with the report from the kernel test robot [3]
I have this in my randconfig build tree, but it looks like I never
sent it out.
----
From bb01f96d7dd66fc437302785f623a3ab323d486e Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Mon, 20 Mar 2023 11:33:52 +0100
Subject: [PATCH] staging: vchiq_arm: mark vchiq_platform_init() static
This function has no callers from other files, and the declaration
was removed a while ago, causing a W=1 warning:
drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:465:5: error: no previous prototype for 'vchiq_platform_init'
Marking it static solves this problem but introduces a new warning
since gcc determines that 'g_fragments_base' is never initialized
in some kernel configurations:
In file included from include/linux/string.h:254,
from include/linux/bitmap.h:11,
from include/linux/cpumask.h:12,
from include/linux/mm_types_task.h:14,
from include/linux/mm_types.h:5,
from include/linux/buildid.h:5,
from include/linux/module.h:14,
from drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:8:
In function 'memcpy_to_page',
inlined from 'free_pagelist' at drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:433:4:
include/linux/fortify-string.h:57:33: error: argument 2 null where non-null expected [-Werror=nonnull]
include/linux/highmem.h:427:9: note: in expansion of macro 'memcpy'
427 | memcpy(to + offset, from, len);
| ^~~~~~
Add a NULL pointer check for this in addition to the static annotation
to avoid both.
Fixes: 89cc4218f640 ("staging: vchiq_arm: drop unnecessary declarations")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
index 90a3958d1f29..aa2313f3bcab 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -415,7 +415,7 @@ free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagel
pagelistinfo->scatterlist_mapped = 0;
/* Deal with any partial cache lines (fragments) */
- if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS) {
+ if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS && g_fragments_base) {
char *fragments = g_fragments_base +
(pagelist->type - PAGELIST_READ_WITH_FRAGMENTS) *
g_fragments_size;
@@ -462,7 +462,7 @@ free_pagelist(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagel
cleanup_pagelistinfo(instance, pagelistinfo);
}
-int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
+static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
{
struct device *dev = &pdev->dev;
struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev);
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^ permalink raw reply related
* Re: [PATCH v2] perf: arm_cspmu: Separate Arm and vendor module
From: Suzuki K Poulose @ 2023-04-19 21:31 UTC (permalink / raw)
To: Besar Wicaksono, catalin.marinas@arm.com, will@kernel.org,
mark.rutland@arm.com
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
Thierry Reding, Jonathan Hunter, Vikram Sethi, Richard Wiley,
Eric Funsten
In-Reply-To: <SJ0PR12MB5676B580F6EC210C53C4A9C3A09D9@SJ0PR12MB5676.namprd12.prod.outlook.com>
On 18/04/2023 20:33, Besar Wicaksono wrote:
> Hi Suzuki,
>
>> -----Original Message-----
>> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Sent: Tuesday, April 18, 2023 6:07 AM
>> To: Besar Wicaksono <bwicaksono@nvidia.com>; catalin.marinas@arm.com;
>> will@kernel.org; mark.rutland@arm.com
>> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
>> tegra@vger.kernel.org; Thierry Reding <treding@nvidia.com>; Jonathan
>> Hunter <jonathanh@nvidia.com>; Vikram Sethi <vsethi@nvidia.com>; Richard
>> Wiley <rwiley@nvidia.com>; Eric Funsten <efunsten@nvidia.com>
>> Subject: Re: [PATCH v2] perf: arm_cspmu: Separate Arm and vendor module
>>
>> External email: Use caution opening links or attachments
>>
>>
>> On 18/04/2023 07:20, Besar Wicaksono wrote:
>>> Arm Coresight PMU driver consists of main standard code and vendor
>>> backend code. Both are currently built as a single module.
>>> This patch adds vendor registration API to separate the two to
>>> keep things modular. Vendor module shall register to the main
>>> module on loading and trigger device reprobe.
>>>
>>> Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
>>> ---
>>>
>>> Changes from v1:
>>> * Added separate Kconfig entry for nvidia backend
>>> * Added lock to protect accesses to the lists
>>> * Added support for matching subset devices from a vendor
>>> * Added state tracking to avoid reprobe when a device is in use
>>> v1: ttps://lore.kernel.org/linux-arm-kernel/20230403163905.20354-1-
>> bwicaksono@nvidia.com/T/#u
>>>
>>> ---
>>> drivers/perf/arm_cspmu/Kconfig | 9 +-
>>> drivers/perf/arm_cspmu/Makefile | 6 +-
>>> drivers/perf/arm_cspmu/arm_cspmu.c | 280
>> +++++++++++++++++++++++---
>>> drivers/perf/arm_cspmu/arm_cspmu.h | 32 ++-
>>> drivers/perf/arm_cspmu/nvidia_cspmu.c | 39 +++-
>>> drivers/perf/arm_cspmu/nvidia_cspmu.h | 17 --
>>> 6 files changed, 325 insertions(+), 58 deletions(-)
>>> delete mode 100644 drivers/perf/arm_cspmu/nvidia_cspmu.h
>>>
>>> diff --git a/drivers/perf/arm_cspmu/Kconfig
>> b/drivers/perf/arm_cspmu/Kconfig
>>> index 0b316fe69a45..8ce7b45a0075 100644
>>> --- a/drivers/perf/arm_cspmu/Kconfig
>>> +++ b/drivers/perf/arm_cspmu/Kconfig
>>> @@ -1,6 +1,6 @@
>>> # SPDX-License-Identifier: GPL-2.0
>>> #
>>> -# Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>> +# Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>>
>>> config ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU
>>> tristate "ARM Coresight Architecture PMU"
>>> @@ -11,3 +11,10 @@ config ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU
>>> based on ARM CoreSight PMU architecture. Note that this PMU
>>> architecture does not have relationship with the ARM CoreSight
>>> Self-Hosted Tracing.
>>> +
>>> +config NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU
>>> + tristate "NVIDIA Coresight Architecture PMU"
>>> + depends on ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU
>>> + help
>>> + Provides NVIDIA specific attributes for performance monitoring unit
>>> + (PMU) devices based on ARM CoreSight PMU architecture.
>>> diff --git a/drivers/perf/arm_cspmu/Makefile
>> b/drivers/perf/arm_cspmu/Makefile
>>> index fedb17df982d..f8ae22411d59 100644
>>> --- a/drivers/perf/arm_cspmu/Makefile
>>> +++ b/drivers/perf/arm_cspmu/Makefile
>>> @@ -1,6 +1,6 @@
>>> -# Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>> +# Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>> #
>>> # SPDX-License-Identifier: GPL-2.0
>>>
>>> -obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) +=
>> arm_cspmu_module.o
>>> -arm_cspmu_module-y := arm_cspmu.o nvidia_cspmu.o
>>> +obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) +=
>> arm_cspmu.o
>>> +obj-$(CONFIG_NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU) +=
>> nvidia_cspmu.o
>>> diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c
>> b/drivers/perf/arm_cspmu/arm_cspmu.c
>>> index e31302ab7e37..c55ea2b74454 100644
>>> --- a/drivers/perf/arm_cspmu/arm_cspmu.c
>>> +++ b/drivers/perf/arm_cspmu/arm_cspmu.c
>>> @@ -16,7 +16,7 @@
>>> * The user should refer to the vendor technical documentation to get
>> details
>>> * about the supported events.
>>> *
>>> - * Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>> + * Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights
>> reserved.
>>> *
>>> */
>>>
>>> @@ -25,13 +25,14 @@
>>> #include <linux/ctype.h>
>>> #include <linux/interrupt.h>
>>> #include <linux/io-64-nonatomic-lo-hi.h>
>>> +#include <linux/list.h>
>>> #include <linux/module.h>
>>> +#include <linux/mutex.h>
>>> #include <linux/perf_event.h>
>>> #include <linux/platform_device.h>
>>> #include <acpi/processor.h>
>>>
>>> #include "arm_cspmu.h"
>>> -#include "nvidia_cspmu.h"
>>>
>>> #define PMUNAME "arm_cspmu"
>>> #define DRVNAME "arm-cs-arch-pmu"
>>> @@ -117,11 +118,52 @@
>>> */
>>> #define HILOHI_MAX_POLL 1000
>>>
>>> -/* JEDEC-assigned JEP106 identification code */
>>> -#define ARM_CSPMU_IMPL_ID_NVIDIA 0x36B
>>> -
>>> static unsigned long arm_cspmu_cpuhp_state;
>>>
>>> +/* List of Coresight PMU instances in the system. */
>>> +static LIST_HEAD(arm_cspmus);
>>> +
>>> +/* List of registered vendor backends. */
>>> +static LIST_HEAD(arm_cspmu_impls);
>>> +
>>> +static DEFINE_MUTEX(arm_cspmu_lock);
>>> +
>>> +/*
>>> + * State of the generic driver.
>>> + * 0 => registering backend.
>>> + * 1 => ready to use.
>>> + * 2 or more => in use.
>>> + */
>>> +#define ARM_CSPMU_STATE_REG 0
>>> +#define ARM_CSPMU_STATE_READY 1
>>> +static atomic_t arm_cspmu_state;
>>> +
>>> +static void arm_cspmu_state_ready(void)
>>> +{
>>> + atomic_set(&arm_cspmu_state, ARM_CSPMU_STATE_READY);
>>> +}
>>> +
>>> +static bool try_arm_cspmu_state_reg(void)
>>> +{
>>> + const int old = ARM_CSPMU_STATE_READY;
>>> + const int new = ARM_CSPMU_STATE_REG;
>>> +
>>> + return atomic_cmpxchg(&arm_cspmu_state, old, new) == old;
>>> +}
>>> +
>>> +static bool try_arm_cspmu_state_get(void)
>>> +{
>>> + return atomic_inc_not_zero(&arm_cspmu_state);
>>> +}
>>> +
>>> +static void arm_cspmu_state_put(void)
>>> +{
>>> + int ret;
>>> +
>>> + ret = atomic_dec_if_positive(&arm_cspmu_state);
>>> + WARN_ON(ret < 0);
>>> +}
>>> +
>>
>> As long as the vendor module is set for the PMU instance, it won't be
>> unloaded as long as there are any perf events and thus the specific
>> driver cannot be unloaded. So, you don't need explicit refcount
>> maintenance for each pmu callbacks.
>>
>
> The arm_cspmu_state mainly protects during new backend registration when
> the device is attached to standard implementation. All devices are attached to
> standard implementation initially when arm_cspmu module is loaded, since there
> is no backend yet. On backend registration, the standard impl is replaced by
> backend impl. However, the module unloading mechanism doesn't provide
> protection because standard impl is owned by arm_cspmu module, which
> is not unloaded during registration.
>
> The refcount may not be required if the devices are not attached to standard
> Implementation by default, and the unreg doesn't fallback to it. But that makes
> the devices usable only when there is a vendor backend available.
Ok, thanks for the explanation. But I still think we :
- Don't need a single global refcount for all the PMUs. Instead this
could be per PMU instance (arm_cspmu), only when it is backed by
"generic" backend, others get module refcount. If the refcount of
"generic" PMU is positive, during the registration of a matching
backend driver, we could simply mark that as pending reprobe.
- And only do the refcount for the following call backs:
pmu:: event_init -> hold the refcount
pmu:: destroy -> drop the refcount and trigger a reprobe if one was
pending (see above)
This would allow loading (unrelated) modules even when other PMUs are
active.
>>> +static bool impl_param_match(const struct arm_cspmu_impl_param *A,
>>> + const struct arm_cspmu_impl_param *B)
>>> +{
>>> + /*
>>> + * Match criteria:
>>> + * - Implementer id should match.
>>> + * - A's device id is within B's range, or vice versa. This allows
>>> + * vendor to register backend for a range of devices.
>>> + */
>>> + if ((A->impl_id == B->impl_id) &&
>>> + (((A->pvr & A->pvr_mask) == (B->pvr & A->pvr_mask)) ||
>>> + ((A->pvr & B->pvr_mask) == (B->pvr & B->pvr_mask))))
>>> + return true;
>>> +
>>
>> nit: Please do not use CAPITAL letters for variable names. Could this
>> simply accept a pmiidr and a impl_match and match the fields with that
>> of the mask/value pair. See more below.
>>
>
> The bitfield comparison in impl_param_match can be reused for different purposes:
> 1. Test between two mask/value pairs to check if device id ranges from
> both pairs are intersecting. We use it during validation in (un)registration.
> 2. Along with to_impl_param, we can compare a pmiidr value with a
> mask/value pair to check if a device is compatible with a backend. We use
> it during reprobe and initializing impl_ops.
Ok.
Suzuki
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^ permalink raw reply
* [PATCH] pwm: meson: simplify calculation in meson_pwm_get_state
From: Heiner Kallweit @ 2023-04-19 21:30 UTC (permalink / raw)
To: Jerome Brunet, Martin Blumenstingl, Neil Armstrong, Kevin Hilman,
Uwe Kleine-König, thierry.reding@gmail.com
Cc: linux-arm-kernel@lists.infradead.org,
open list:ARM/Amlogic Meson..., linux-pwm
I don't see a reason why we should treat the case lo < hi that
different and return 0 as period and duty_cycle. Let's handle it as
normal use case and also remove the optimization for lo == 0.
I think the improved readability is worth it.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/pwm/pwm-meson.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 5732300eb..3865538dd 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -351,18 +351,8 @@ static int meson_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
channel->lo = FIELD_GET(PWM_LOW_MASK, value);
channel->hi = FIELD_GET(PWM_HIGH_MASK, value);
- if (channel->lo == 0) {
- state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
- state->duty_cycle = state->period;
- } else if (channel->lo >= channel->hi) {
- state->period = meson_pwm_cnt_to_ns(chip, pwm,
- channel->lo + channel->hi);
- state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm,
- channel->hi);
- } else {
- state->period = 0;
- state->duty_cycle = 0;
- }
+ state->period = meson_pwm_cnt_to_ns(chip, pwm, channel->lo + channel->hi);
+ state->duty_cycle = meson_pwm_cnt_to_ns(chip, pwm, channel->hi);
state->polarity = PWM_POLARITY_NORMAL;
--
2.40.0
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^ permalink raw reply related
* Re: [PATCH] staging: vchiq_arm: Make vchiq_platform_init() static
From: Nick Desaulniers @ 2023-04-19 21:21 UTC (permalink / raw)
To: Simon Horman, Arnd Bergmann
Cc: Stefan Wahren, Broadcom internal kernel review list,
Nathan Chancellor, Tom Rix, Greg Kroah-Hartman, linux-rpi-kernel,
linux-arm-kernel, linux-staging, llvm, Florian Fainelli
In-Reply-To: <ZD+rethobzN+rONr@kernel.org>
+ Arnd
On Wed, Apr 19, 2023 at 1:51 AM Simon Horman <horms@kernel.org> wrote:
>
> On Wed, Apr 19, 2023 at 08:37:58AM +0200, Stefan Wahren wrote:
> > Hi Simon,
> >
> > Am 18.04.23 um 13:23 schrieb Simon Horman:
> > > vchiq_platform_init() is only used in this file so it can be static.
> > >
> > > clang-16 with W=1 reports:
> > >
> > > drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:465:5: error: no previous prototype for function 'vchiq_platform_init' [-Werror,-Wmissing-prototypes]
> > > int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
> > > ^
> > > drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:465:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
> > >
> > > Signed-off-by: Simon Horman <horms@kernel.org>
> >
> > this is not the first attempt to fix this [1]. But maybe this has been fixed
> > in the meantime.
> >
> > [1] - https://lore.kernel.org/linux-staging/20221022043548.1671644-1-scottjcrouch@gmail.com/#t
>
> Thanks,
>
> I see in that thread that Greg notes that "this breaks the build in a very
> horrible and strange way" [2].
So Arnd had a Kconfig suggestion later in that thread:
https://lore.kernel.org/linux-staging/d64dc0b4-ba82-49f4-9a43-c50b735ad91d@app.fastmail.com/
Marking something as `depends on OF_DYNAMIC`. (Not sure whether Arnd
meant that for BCM2835_VCHIQ or BCM_VIDEOCORE).
Perhaps try that?
>
> I'm a bit surprised as I didn't observe such a thing.
> But I also don't dispute it - clearly my testing was inadequate.
>
> I'll try and dig a bit deeper into this one.
> Perhaps starting with the report from the kernel test robot [3]
>
> [2] https://lore.kernel.org/linux-staging/Y1Okpjbi2kKU2GFz@kroah.com/
> [3] https://lore.kernel.org/linux-staging/202210230127.p1Dp295m-lkp@intel.com/
--
Thanks,
~Nick Desaulniers
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^ permalink raw reply
* Re: [PATCH 4/33] mm: add utility functions for ptdesc
From: Vishal Moola @ 2023-04-19 20:29 UTC (permalink / raw)
To: Vernon Yang
Cc: Andrew Morton, Matthew Wilcox, linux-mm, linux-arch,
linux-arm-kernel, linux-csky, linux-hexagon, loongarch,
linux-m68k, linux-mips, linux-openrisc, linuxppc-dev, linux-riscv,
linux-s390, linux-sh, sparclinux, linux-um, xen-devel, kvm
In-Reply-To: <ZD/syK8RYO9FZ6ks@vernon-pc>
On Wed, Apr 19, 2023 at 6:34 AM Vernon Yang <vernon2gm@gmail.com> wrote:
>
> On Mon, Apr 17, 2023 at 01:50:19PM -0700, Vishal Moola wrote:
> > Introduce utility functions setting the foundation for ptdescs. These
> > will also assist in the splitting out of ptdesc from struct page.
> >
> > ptdesc_alloc() is defined to allocate new ptdesc pages as compound
> > pages. This is to standardize ptdescs by allowing for one allocation
> > and one free function, in contrast to 2 allocation and 2 free functions.
> >
> > Signed-off-by: Vishal Moola (Oracle) <vishal.moola@gmail.com>
> > ---
> > include/asm-generic/tlb.h | 11 ++++++++++
> > include/linux/mm.h | 44 +++++++++++++++++++++++++++++++++++++++
> > include/linux/pgtable.h | 13 ++++++++++++
> > 3 files changed, 68 insertions(+)
> >
> > diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
> > index b46617207c93..6bade9e0e799 100644
> > --- a/include/asm-generic/tlb.h
> > +++ b/include/asm-generic/tlb.h
> > @@ -481,6 +481,17 @@ static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
> > return tlb_remove_page_size(tlb, page, PAGE_SIZE);
> > }
> >
> > +static inline void tlb_remove_ptdesc(struct mmu_gather *tlb, void *pt)
> > +{
> > + tlb_remove_table(tlb, pt);
> > +}
> > +
> > +/* Like tlb_remove_ptdesc, but for page-like page directories. */
> > +static inline void tlb_remove_page_ptdesc(struct mmu_gather *tlb, struct ptdesc *pt)
> > +{
> > + tlb_remove_page(tlb, ptdesc_page(pt));
> > +}
> > +
> > static inline void tlb_change_page_size(struct mmu_gather *tlb,
> > unsigned int page_size)
> > {
> > diff --git a/include/linux/mm.h b/include/linux/mm.h
> > index b18848ae7e22..ec3cbe2fa665 100644
> > --- a/include/linux/mm.h
> > +++ b/include/linux/mm.h
> > @@ -2744,6 +2744,45 @@ static inline pmd_t *pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long a
> > }
> > #endif /* CONFIG_MMU */
> >
> > +static inline struct ptdesc *virt_to_ptdesc(const void *x)
> > +{
> > + return page_ptdesc(virt_to_head_page(x));
> > +}
> > +
> > +static inline void *ptdesc_to_virt(struct ptdesc *pt)
> > +{
> > + return page_to_virt(ptdesc_page(pt));
> > +}
> > +
> > +static inline void *ptdesc_address(struct ptdesc *pt)
> > +{
> > + return folio_address(ptdesc_folio(pt));
> > +}
> > +
> > +static inline bool ptdesc_is_reserved(struct ptdesc *pt)
> > +{
> > + return folio_test_reserved(ptdesc_folio(pt));
> > +}
> > +
> > +static inline struct ptdesc *ptdesc_alloc(gfp_t gfp, unsigned int order)
> > +{
> > + struct page *page = alloc_pages(gfp | __GFP_COMP, order);
> > +
> > + return page_ptdesc(page);
> > +}
> > +
> > +static inline void ptdesc_free(struct ptdesc *pt)
> > +{
> > + struct page *page = ptdesc_page(pt);
> > +
> > + __free_pages(page, compound_order(page));
> > +}
> > +
> > +static inline void ptdesc_clear(void *x)
> > +{
> > + clear_page(x);
> > +}
> > +
> > #if USE_SPLIT_PTE_PTLOCKS
> > #if ALLOC_SPLIT_PTLOCKS
> > void __init ptlock_cache_init(void);
> > @@ -2970,6 +3009,11 @@ static inline void mark_page_reserved(struct page *page)
> > adjust_managed_page_count(page, -1);
> > }
> >
> > +static inline void free_reserved_ptdesc(struct ptdesc *pt)
> > +{
> > + free_reserved_page(ptdesc_page(pt));
> > +}
> > +
> > /*
> > * Default method to free all the __init memory into the buddy system.
> > * The freed pages will be poisoned with pattern "poison" if it's within
> > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
> > index 7cc6ea057ee9..7cd803aa38eb 100644
> > --- a/include/linux/pgtable.h
> > +++ b/include/linux/pgtable.h
> > @@ -97,6 +97,19 @@ TABLE_MATCH(ptl, ptl);
> > #undef TABLE_MATCH
> > static_assert(sizeof(struct ptdesc) <= sizeof(struct page));
> >
> > +#define ptdesc_page(pt) (_Generic((pt), \
> > + const struct ptdesc *: (const struct page *)(pt), \
> > + struct ptdesc *: (struct page *)(pt)))
> > +
> > +#define ptdesc_folio(pt) (_Generic((pt), \
> > + const struct ptdesc *: (const struct folio *)(pt), \
> > + struct ptdesc *: (struct folio *)(pt)))
> > +
> > +static inline struct ptdesc *page_ptdesc(struct page *page)
> > +{
> > + return (struct ptdesc *)page;
> > +}
>
> Hi Vishal,
>
> I'm a little curious, why is the page_ptdesc() using inline functions instead of macro?
> If this is any magic, please tell me, thank you very much.
No magic here, I was mainly basing it off Matthew's netmem
series. I'm not too clear on when to use macros vs inlines
myself :/.
If there's a benefit to having it be a macro let me
know and I can make that change in v2.
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^ permalink raw reply
* Re: [PATCH v2 12/12] ARM: dts: exynos: Add Samsung Galaxy Tab 3 8.0 boards
From: Henrik Grimler @ 2023-04-19 20:23 UTC (permalink / raw)
To: Artur Weber
Cc: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Sylwester Nawrocki,
Tomasz Figa, Chanwoo Choi, Michael Turquette, Stephen Boyd,
Arnd Bergmann, Olof Johansson, soc, Russell King, Daniel Lezcano,
Kukjin Kim, Mauro Carvalho Chehab, Vinod Koul,
Kishon Vijay Abraham I, linux-arm-kernel, linux-samsung-soc,
devicetree, linux-kernel, linux-clk, linux-pm, linux-media,
linux-phy, ~postmarketos/upstreaming
In-Reply-To: <20230416133422.1949-13-aweber.kernel@gmail.com>
Hi Artur,
Nice to see some more Exynos arm boards!
As Krzysztof already said this does not apply on top of
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git/log/?h=next/dt,
but it seems to apply on top of v6.3-rc6. If you use the --base arg
of git format-patch it makes it easier to figure out where it applies.
Running ./script/checkpatch.pl on the patches also points out two
typos in exynos4x12.dtsi and exynos4212.dtsi, would probably be nice
to fix those while you are at it.
See some more comments/questions below.
On Sun, Apr 16, 2023 at 03:34:22PM +0200, Artur Weber wrote:
> Introduce support for the Galaxy Tab 3 8.0 series of boards:
>
> - Samsung Galaxy Tab 3 8.0 WiFi (SM-T310/lt01wifi)
> - Samsung Galaxy Tab 3 8.0 3G (SM-T311/lt013g)
> - Samsung Galaxy Tab 3 8.0 LTE (SM-T315/lt01lte)
>
> What works:
>
> - Display and backlight
> - Touchscreen (without touchkeys)
> - GPIO buttons, hall sensor
> - WiFi and Bluetooth
> - USB, fuel gauge, charging (partial)
> - Accelerometer and magnetometer
> - WiFi model only: light sensor
>
> Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
> ---
> Display panel bindings are added by a separate patchset:
> "[PATCH 0/3] Add Samsung S6D7AA0 panel controller driver"[1]
>
> [1] https://lore.kernel.org/all/20230416131632.31673-1-aweber.kernel@gmail.com/
> ---
> arch/arm/boot/dts/Makefile | 3 +
> arch/arm/boot/dts/exynos4212-tab3-3g8.dts | 30 +
> arch/arm/boot/dts/exynos4212-tab3-lte8.dts | 43 +
> arch/arm/boot/dts/exynos4212-tab3-wifi8.dts | 25 +
> arch/arm/boot/dts/exynos4212-tab3.dtsi | 1175 +++++++++++++++++++
> 5 files changed, 1276 insertions(+)
> create mode 100644 arch/arm/boot/dts/exynos4212-tab3-3g8.dts
> create mode 100644 arch/arm/boot/dts/exynos4212-tab3-lte8.dts
> create mode 100644 arch/arm/boot/dts/exynos4212-tab3-wifi8.dts
> create mode 100644 arch/arm/boot/dts/exynos4212-tab3.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index efe4152e5846..e5f63b636637 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -217,6 +217,9 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
> exynos4210-smdkv310.dtb \
> exynos4210-trats.dtb \
> exynos4210-universal_c210.dtb \
> + exynos4212-tab3-3g8.dtb \
> + exynos4212-tab3-lte8.dtb \
> + exynos4212-tab3-wifi8.dtb \
> exynos4412-i9300.dtb \
> exynos4412-i9305.dtb \
> exynos4412-itop-elite.dtb \
> diff --git a/arch/arm/boot/dts/exynos4212-tab3-3g8.dts b/arch/arm/boot/dts/exynos4212-tab3-3g8.dts
> new file mode 100644
> index 000000000000..c503a2d351dd
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos4212-tab3-3g8.dts
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree
> + * source
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + */
> +
> +/dts-v1/;
> +#include "exynos4212-tab3.dtsi"
> +
> +/ {
> + model = "Samsung Galaxy Tab 3 8.0 3G (SM-T311) based on Exynos4212";
> + compatible = "samsung,t311", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4";
> + chassis-type = "tablet";
> +};
> +
> +/* Pin control sleep state overrides */
> +
> +&sleep0 {
> + PIN_SLP(gpb-5, INPUT, UP);
> +};
> +
> +&sleep1 {
> + PIN_SLP(gpl0-0, OUT0, NONE);
> + PIN_SLP(gpl1-0, OUT0, NONE);
> + PIN_SLP(gpl2-4, OUT0, NONE);
> + PIN_SLP(gpm3-3, OUT1, NONE);
> +};
> diff --git a/arch/arm/boot/dts/exynos4212-tab3-lte8.dts b/arch/arm/boot/dts/exynos4212-tab3-lte8.dts
> new file mode 100644
> index 000000000000..158c6a2e24bf
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos4212-tab3-lte8.dts
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree
> + * source
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + */
> +
> +/dts-v1/;
> +#include "exynos4212-tab3.dtsi"
> +
> +/ {
> + model = "Samsung Galaxy Tab 3 8.0 LTE (SM-T315) based on Exynos4212";
> + compatible = "samsung,t315", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4";
> + chassis-type = "tablet";
> +};
> +
> +&sleep0 {
> + PIN_SLP(gpa0-4, INPUT, UP);
> + PIN_SLP(gpa0-5, INPUT, UP);
> +
> + PIN_SLP(gpb-5, INPUT, UP);
> +
> + PIN_SLP(gpc0-0, PREV, NONE);
> + PIN_SLP(gpc1-3, INPUT, NONE);
> +
> + PIN_SLP(gpf1-6, INPUT, NONE);
> + PIN_SLP(gpf2-2, PREV, NONE);
> +};
> +
> +&sleep1 {
> + PIN_SLP(gpl0-0, PREV, NONE);
> +
> + PIN_SLP(gpl1-0, PREV, NONE);
> +
> + PIN_SLP(gpl2-1, INPUT, DOWN);
> + PIN_SLP(gpl2-2, INPUT, DOWN);
> + PIN_SLP(gpl2-4, OUT0, NONE);
> + PIN_SLP(gpl2-5, PREV, NONE);
> +
> + PIN_SLP(gpm3-3, OUT1, NONE);
> +};
> diff --git a/arch/arm/boot/dts/exynos4212-tab3-wifi8.dts b/arch/arm/boot/dts/exynos4212-tab3-wifi8.dts
> new file mode 100644
> index 000000000000..0527a75710d8
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos4212-tab3-wifi8.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos4212 based Galaxy Tab 3 8.0 WiFi board device tree
> + * source
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + */
> +
> +/dts-v1/;
> +#include "exynos4212-tab3.dtsi"
> +
> +/ {
> + model = "Samsung Galaxy Tab 3 8.0 WiFi (SM-T310) based on Exynos4212";
> + compatible = "samsung,t310", "samsung,tab3", "samsung,exynos4212", "samsung,exynos4";
> + chassis-type = "tablet";
> +};
> +
> +&i2c_lightsensor {
> + /* Capella Micro CM3323 color light sensor */
> + colorsensor@10 {
> + compatible = "capella,cm3323";
> + reg = <0x10>;
> + };
> +};
> diff --git a/arch/arm/boot/dts/exynos4212-tab3.dtsi b/arch/arm/boot/dts/exynos4212-tab3.dtsi
> new file mode 100644
> index 000000000000..b8ad5497506c
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos4212-tab3.dtsi
> @@ -0,0 +1,1175 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's Exynos4212 based Galaxy Tab 3 board common source
> + *
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + */
> +
> +/dts-v1/;
> +#include "exynos4212.dtsi"
> +#include "exynos4412-ppmu-common.dtsi"
> +#include "exynos-mfc-reserved-memory.dtsi"
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include "exynos-pinctrl.h"
> +
> +/ {
> + compatible = "samsung,tab3", "samsung,exynos4212", "samsung,exynos4";
> +
> + memory@40000000 {
> + device_type = "memory";
> +
> + /* Technically 2GB, but last 1GB is flaky, so we ignore it for now */
> + reg = <0x40000000 0x3FC00000>;
Comment says 1GB but you are skipping 1GB+4MB. Is the entire region
flaky or perhaps just the 4MB region in the middle?
> + };
> +
> + chosen {
> + stdout-path = &serial_2;
> +
> + /* Default S-BOOT bootloader loads initramfs here */
> + linux,initrd-start = <0x42000000>;
> + linux,initrd-end = <0x42800000>;
> + };
> +
> + firmware@204f000 {
> + compatible = "samsung,secure-firmware";
> + reg = <0x0204F000 0x1000>;
> + };
> +
> + fixed-rate-clocks {
> + xxti {
> + compatible = "samsung,clock-xxti";
> + clock-frequency = <0>;
> + };
> +
> + xusbxti {
> + compatible = "samsung,clock-xusbxti";
> + clock-frequency = <24000000>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio_keys>;
> +
> + key-power {
> + gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_POWER>;
> + label = "power";
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> +
> + key-up {
> + gpios = <&gpx2 2 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + label = "volume down";
> + debounce-interval = <10>;
> + };
> +
> + key-down {
> + gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEDOWN>;
> + label = "volume up";
> + debounce-interval = <10>;
> + };
> +
> + key-home {
> + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_HOME>;
> + label = "home";
> + debounce-interval = <10>;
> + };
> +
> + switch-hall-sensor {
> + gpios = <&gpx2 4 GPIO_ACTIVE_LOW>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + linux,can-disable;
> + label = "hall effect sensor";
> + debounce-interval = <10>;
> + wakeup-source;
> + };
> + };
> +
> + vbatt_reg: voltage-regulator-1 {
> + compatible = "regulator-fixed";
> + regulator-name = "VBATT";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + regulator-always-on;
> + };
> +
> + backlight_reset_supply: voltage-regulator-2 {
> + compatible = "regulator-fixed";
> + regulator-name = "BACKLIGHT_ENVDDIO";
> + pinctrl-names = "default";
> + pinctrl-0 = <&backlight_reset>;
> + gpio = <&gpm0 1 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + lcd_enable_supply: voltage-regulator-3 {
> + compatible = "regulator-fixed";
> + regulator-name = "LCD_VDD_2.2V";
> + regulator-min-microvolt = <2200000>;
> + regulator-max-microvolt = <2200000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_en>;
> + gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>; /* LCD_EN */
> + enable-active-high;
> + };
> +
> + i2c_max77693: i2c-gpio-1 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpm2 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpm2 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + pmic@66 {
> + compatible = "maxim,max77693";
> + interrupt-parent = <&gpx1>;
> + interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&max77693_irq>;
> + reg = <0x66>;
> +
> + regulators {
> + esafeout1_reg: ESAFEOUT1 {
> + regulator-name = "ESAFEOUT1";
> + regulator-boot-on;
> + };
> +
> + esafeout2_reg: ESAFEOUT2 {
> + regulator-name = "ESAFEOUT2";
> + };
> +
> + charger_reg: CHARGER {
> + regulator-name = "CHARGER";
> + regulator-min-microamp = <60000>;
> + regulator-max-microamp = <2580000>;
> + regulator-boot-on;
> + };
> + };
> +
> + charger {
> + compatible = "maxim,max77693-charger";
> +
> + maxim,constant-microvolt = <4350000>;
> + maxim,min-system-microvolt = <3600000>;
> + maxim,thermal-regulation-celsius = <100>;
> + maxim,battery-overcurrent-microamp = <3500000>;
> + maxim,charge-input-threshold-microvolt = <4300000>;
> + };
> + };
> + };
> +
> + i2c_max77693_fuel: i2c-gpio-2 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpy0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpy0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + fuel-gauge@36 {
> + compatible = "maxim,max17050";
> + interrupt-parent = <&gpx2>;
> + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&max77693_fuel_irq>;
> + reg = <0x36>;
> +
> + maxim,over-heat-temp = <500>;
> + maxim,over-volt = <4500>;
> + };
> + };
> +
> + i2c_yas532_magnetometer: i2c-gpio-3 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpy2 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpy2 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + /* Magnetometer: Yamaha YAS532 */
> + magnetometer@2e {
> + compatible = "yamaha,yas532";
> + reg = <0x2e>;
> + iovdd-supply = <&ldo3_reg>; /* VCC_1.8V_AP */
> + mount-matrix = "-1", "0", "0",
> + "0", "1", "0",
> + "0", "0", "-1";
> + };
> + };
> +
> + i2c_lightsensor: i2c-gpio-4 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpl0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpl0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + /* WiFi model uses CM3323, 3G/LTE use CM36653 */
> + };
> +
> + i2c_bl: i2c-gpio-24 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpm4 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpm4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + backlight: backlight@2c {
> + compatible = "ti,lp8556";
> + reg = <0x2c>;
> + status = "okay";
> +
> + bl-name = "lcd-bl";
> + dev-ctrl = /bits/ 8 <0x80>;
> + init-brt = /bits/ 8 <0x78>; /* 120 */
> +
> + power-supply = <&vbatt_reg>;
> + enable-supply = <&backlight_reset_supply>;
> +
> + pwms = <&pwm 1 78770 0>;
> + pwm-names = "lp8556";
> + pwm-period = <78770>;
> +
> + rom_a3h {
> + rom-addr = /bits/ 8 <0xa3>;
> + rom-val = /bits/ 8 <0x5e>;
> + };
> +
> + rom_a5h {
> + rom-addr = /bits/ 8 <0xa5>;
> + rom-val = /bits/ 8 <0x34>;
> + };
> +
> + rom_a7h {
> + rom-addr = /bits/ 8 <0xa7>;
> + rom-val = /bits/ 8 <0xfa>;
> + };
> + };
> + };
> +
> + wlan_pwrseq: sdhci3-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + reset-gpios = <&gpm3 5 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&bus_dmc {
> + devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
> + vdd-supply = <&buck1_reg>;
> + status = "okay";
> +};
> +
> +&bus_acp {
> + devfreq = <&bus_dmc>;
> + status = "okay";
> +};
> +
> +&bus_c2c {
> + devfreq = <&bus_dmc>;
> + status = "okay";
> +};
> +
> +&bus_leftbus {
> + devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
> + vdd-supply = <&buck3_reg>;
> + status = "okay";
> +};
> +
> +&bus_rightbus {
> + devfreq = <&bus_leftbus>;
> + status = "okay";
> +};
> +
> +&bus_display {
> + devfreq = <&bus_leftbus>;
> + status = "okay";
> +};
> +
> +&bus_fsys {
> + devfreq = <&bus_leftbus>;
> + status = "okay";
> +};
> +
> +&bus_peri {
> + devfreq = <&bus_leftbus>;
> + status = "okay";
> +};
> +
> +&bus_mfc {
> + devfreq = <&bus_leftbus>;
> + status = "okay";
> +};
> +
> +&cpu0 {
> + cpu0-supply = <&buck2_reg>;
> +};
> +
> +&dsi_0 {
> + vddcore-supply = <&ldo8_reg>;
> + vddio-supply = <&ldo10_reg>;
> + samsung,burst-clock-frequency = <500000000>;
> + samsung,esc-clock-frequency = <20000000>;
> + samsung,pll-clock-frequency = <24000000>;
> + status = "okay";
> +
> + panel@0 {
> + compatible = "samsung,s6d7aa0-lsl080al02";
> + reg = <0>;
> + enable-supply = <&lcd_enable_supply>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&lcd_nrst>;
> + reset-gpios = <&gpf0 4 GPIO_ACTIVE_LOW>;
> + backlight = <&backlight>;
> + };
> +};
> +
> +&exynos_usbphy {
> + vbus-supply = <&esafeout1_reg>;
> + status = "okay";
> +};
> +
> +&fimd {
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&buck4_reg>;
> + status = "okay";
> +};
> +
> +&hsotg {
> + vusb_d-supply = <&ldo15_reg>;
> + vusb_a-supply = <&ldo12_reg>;
> + dr_mode = "peripheral";
> + status = "okay";
> +};
> +
> +/* Accelerometer: K2DH/K3DH */
> +&i2c_1 {
> + pinctrl-0 = <&i2c1_bus>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + lis3dh: accelerometer@19 {
> + /* K2DH seems to be the same as lis2dh12 in terms of registers */
> + compatible = "st,lis2dh12-accel";
> + reg = <0x19>;
> +
> + interrupt-parent = <&gpx0>;
> + interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
> +
> + vdd-supply = <&ldo17_reg>; /* VCC_2.8V_AP */
> + vddio-supply = <&ldo3_reg>; /* VCC_1.8V_AP */
> +
> + mount-matrix = "-1", "0", "0",
> + "0", "1", "0",
> + "0", "0", "-1";
> + };
> +};
> +
> +/* Touchscreen: MMS252 */
> +&i2c_3 {
> + samsung,i2c-sda-delay = <100>;
> + samsung,i2c-slave-addr = <0x10>;
> + samsung,i2c-max-bus-freq = <400000>;
> + pinctrl-0 = <&i2c3_bus>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + touchscreen@48 {
> + /* Using mms114 compatible for now */
> + compatible = "melfas,mms114";
> + reg = <0x48>;
> + interrupt-parent = <&gpb>;
> + interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
> + touchscreen-size-x = <800>;
> + touchscreen-size-y = <1280>;
> + avdd-supply = <&ldo21_reg>;
> + vdd-supply = <&ldo25_reg>;
> + };
> +};
> +
> +/* PMIC: s5m8767 */
> +&i2c_7 {
> + samsung,i2c-sda-delay = <100>;
> + samsung,i2c-slave-addr = <0x10>;
> + samsung,i2c-max-bus-freq = <100000>;
> + pinctrl-0 = <&i2c7_bus>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + s5m8767: pmic@66 {
> + compatible = "samsung,s5m8767-pmic";
> + reg = <0x66>;
> + interrupt-parent = <&gpx0>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>;
> + wakeup-source;
> +
> + s5m8767,pmic-buck2-ramp-enable;
> + s5m8767,pmic-buck3-ramp-enable;
> + s5m8767,pmic-buck4-ramp-enable;
> +
> + s5m8767,pmic-buck-ramp-delay = <25>;
> + s5m8767,pmic-buck-default-dvs-idx = <1>;
> +
> + s5m8767,pmic-buck-dvs-gpios = <&gpm3 0 GPIO_ACTIVE_HIGH>,
> + <&gpm3 1 GPIO_ACTIVE_HIGH>,
> + <&gpm3 2 GPIO_ACTIVE_HIGH>;
> +
> + s5m8767,pmic-buck-ds-gpios = <&gpf3 1 GPIO_ACTIVE_HIGH>,
> + <&gpf3 2 GPIO_ACTIVE_HIGH>,
> + <&gpf3 3 GPIO_ACTIVE_HIGH>;
> +
> + s5m8767,pmic-buck2-dvs-voltage = <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>;
> +
> + s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>;
> +
> + s5m8767,pmic-buck4-dvs-voltage = <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>,
> + <1100000>, <1100000>;
> +
> + regulators {
> + ldo1_reg: LDO1 {
> + regulator-name = "VALIVE_1.0V_AP";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <1>;
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-name = "VM1M2_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <1>;
> + };
> +
> + ldo3_reg: LDO3 {
> + regulator-name = "VCC_1.8V_AP";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + op_mode = <1>;
> + };
> +
> + ldo5_reg: LDO5 {
> + regulator-name = "VCC_3.3V_MHL";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + op_mode = <1>;
> + };
> +
> + ldo8_reg: LDO8 {
> + regulator-name = "VMIPI_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + op_mode = <3>;
> + };
> +
> + ldo9_reg: LDO9 {
> + regulator-name = "VSIL_1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + op_mode = <1>;
> + };
> +
> + ldo10_reg: LDO10 {
> + regulator-name = "VMIPI_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + op_mode = <3>;
> + };
> +
> + ldo12_reg: LDO12 {
> + regulator-name = "VUOTG_3.0V";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + op_mode = <1>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + ldo13_reg: LDO13 {
> + regulator-name = "VCC_1.8V_MHL";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + op_mode = <1>;
> + };
> +
> + ldo15_reg: LDO15 {
> + regulator-name = "VHSIC_1.0V";
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1000000>;
> + op_mode = <1>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + ldo17_reg: LDO17 {
> + regulator-name = "VCC_2.8V_AP";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + op_mode = <1>;
> + regulator-always-on;
> + };
> +
> + ldo19_reg: LDO19 {
> + regulator-name = "VLED_IC_1.9V";
> + regulator-min-microvolt = <1900000>;
> + regulator-max-microvolt = <1900000>;
> + op_mode = <1>;
> + regulator-always-on;
> + };
> +
> + ldo20_reg: LDO20 {
> + regulator-name = "VTOUCH_3.3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + op_mode = <1>;
> + };
> +
> + ldo21_reg: LDO21 {
> + regulator-name = "TSP_VDD_3.3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + op_mode = <1>;
> + };
> +
> + ldo22_reg: LDO22 {
> + regulator-name = "5M_AF_2.8V";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + op_mode = <1>;
> + };
> +
> + ldo23_reg: LDO23 {
> + regulator-name = "VTF_2.8V";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + op_mode = <3>;
> + };
> +
> + ldo24_reg: LDO24 {
> + regulator-name = "LEDA_2.8V";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + op_mode = <1>;
> + };
> +
> + ldo25_reg: LDO25 {
> + regulator-name = "TSP_VDD_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + op_mode = <1>;
> + };
> +
> + ldo26_reg: LDO26 {
> + regulator-name = "CAM_IO_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + op_mode = <1>;
> + };
> +
> + ldo27_reg: LDO27 {
> + regulator-name = "VTCAM_1.8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + op_mode = <1>;
> + };
> +
> + buck1_reg: BUCK1 {
> + regulator-name = "VDD_MIF";
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <1100000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <3>;
> + };
> +
> + buck2_reg: BUCK2 {
> + regulator-name = "VDD_ARM";
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <3>;
> + };
> +
> + buck3_reg: BUCK3 {
> + regulator-name = "VDD_INT";
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <3>;
> + };
> +
> + buck4_reg: BUCK4 {
> + regulator-name = "VDD_G3D";
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <1150000>;
> + regulator-boot-on;
> + op_mode = <3>;
> + };
> +
> + buck5_reg: BUCK5 {
> + regulator-name = "VMEM_1.2V_AP";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-always-on;
> + regulator-boot-on;
> + op_mode = <1>;
> + };
> +
> + buck6_reg: BUCK6 {
> + regulator-name = "CAM_ISP_CORE_1.2V";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + op_mode = <1>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> +
> + s5m8767_osc: clocks {
> + compatible = "samsung,s5m8767-clk";
> + #clock-cells = <1>;
> + clock-output-names = "en32khz_ap",
> + "en32khz_cp",
> + "en32khz_bt";
> + };
> + };
> +};
> +
> +&mshc_0 {
> + broken-cd;
> + non-removable;
> + card-detect-delay = <200>;
> + vmmc-supply = <&ldo22_reg>;
> + clock-frequency = <400000000>;
> + samsung,dw-mshc-ciu-div = <0>;
> + samsung,dw-mshc-sdr-timing = <2 3>;
> + samsung,dw-mshc-ddr-timing = <1 2>;
> + pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
> + pinctrl-names = "default";
> + status = "okay";
> + bus-width = <8>;
> + cap-mmc-highspeed;
Please add mmc-ddr-1_8v; here as well. It was added to the other
Exynos devices in commit 37f9514e618f ("ARM: dts: exynos: replace
mshc0 alias with mmc-ddr-1_8v property") which can be found in
Krzysztof's tree.
Best regards,
Henrik Grimler
> +};
> +
> +&pinctrl_0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sleep0>;
> +
> + s5m8767_ds: s5m8767-ds {
> + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + lcd_en: lcd-en {
> + samsung,pins = "gpc0-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + lcd_nrst: lcd-nrst {
> + samsung,pins = "gpf0-4";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + sleep0: sleep-state {
> + PIN_SLP(gpa0-0, INPUT, NONE);
> + PIN_SLP(gpa0-1, OUT0, NONE);
> + PIN_SLP(gpa0-2, INPUT, NONE);
> + PIN_SLP(gpa0-3, INPUT, UP);
> + PIN_SLP(gpa0-4, INPUT, DOWN); /* UP on LTE model */
> + PIN_SLP(gpa0-5, INPUT, DOWN); /* UP on LTE model */
> + PIN_SLP(gpa0-6, INPUT, DOWN);
> + PIN_SLP(gpa0-7, INPUT, DOWN);
> +
> + PIN_SLP(gpa1-0, INPUT, DOWN);
> + PIN_SLP(gpa1-1, INPUT, DOWN);
> + PIN_SLP(gpa1-2, INPUT, DOWN);
> + PIN_SLP(gpa1-3, INPUT, DOWN);
> + PIN_SLP(gpa1-4, INPUT, DOWN);
> + PIN_SLP(gpa1-5, INPUT, DOWN);
> +
> + PIN_SLP(gpb-0, INPUT, NONE);
> + PIN_SLP(gpb-1, INPUT, NONE);
> + PIN_SLP(gpb-2, INPUT, NONE);
> + PIN_SLP(gpb-3, INPUT, NONE);
> + PIN_SLP(gpb-4, INPUT, DOWN);
> + PIN_SLP(gpb-5, INPUT, DOWN); /* UP on all models with modem */
> + PIN_SLP(gpb-6, INPUT, DOWN);
> + PIN_SLP(gpb-7, INPUT, DOWN);
> +
> + PIN_SLP(gpc0-0, INPUT, DOWN); /* PREV, NONE on LTE model */
> + PIN_SLP(gpc0-1, INPUT, DOWN);
> + PIN_SLP(gpc0-2, INPUT, DOWN);
> + PIN_SLP(gpc0-3, INPUT, DOWN);
> + PIN_SLP(gpc0-4, INPUT, DOWN);
> +
> + PIN_SLP(gpc1-0, INPUT, DOWN);
> + PIN_SLP(gpc1-1, INPUT, DOWN);
> + PIN_SLP(gpc1-2, INPUT, DOWN);
> + PIN_SLP(gpc1-3, INPUT, DOWN); /* NONE on LTE model */
> + PIN_SLP(gpc1-4, INPUT, DOWN);
> +
> + PIN_SLP(gpd0-0, INPUT, DOWN);
> + PIN_SLP(gpd0-1, OUT0, NONE);
> + PIN_SLP(gpd0-2, INPUT, NONE);
> + PIN_SLP(gpd0-3, INPUT, NONE);
> +
> + PIN_SLP(gpd1-0, INPUT, DOWN);
> + PIN_SLP(gpd1-1, INPUT, DOWN);
> + PIN_SLP(gpd1-2, INPUT, NONE);
> + PIN_SLP(gpd1-3, INPUT, NONE);
> +
> + PIN_SLP(gpf0-0, INPUT, DOWN);
> + PIN_SLP(gpf0-1, INPUT, DOWN);
> + PIN_SLP(gpf0-2, INPUT, DOWN);
> + PIN_SLP(gpf0-3, INPUT, DOWN);
> + PIN_SLP(gpf0-4, OUT0, NONE);
> + PIN_SLP(gpf0-5, OUT0, NONE);
> + PIN_SLP(gpf0-6, INPUT, DOWN);
> + PIN_SLP(gpf0-7, INPUT, DOWN);
> +
> + PIN_SLP(gpf1-0, INPUT, DOWN);
> + PIN_SLP(gpf1-1, INPUT, DOWN);
> + PIN_SLP(gpf1-2, INPUT, DOWN);
> + PIN_SLP(gpf1-3, INPUT, DOWN);
> + PIN_SLP(gpf1-4, INPUT, DOWN);
> + PIN_SLP(gpf1-5, INPUT, DOWN);
> + PIN_SLP(gpf1-6, INPUT, DOWN); /* NONE on LTE model */
> + PIN_SLP(gpf1-7, INPUT, DOWN);
> +
> + PIN_SLP(gpf2-0, INPUT, DOWN);
> + PIN_SLP(gpf2-1, INPUT, DOWN);
> + PIN_SLP(gpf2-2, INPUT, DOWN); /* PREV, NONE on LTE model */
> + PIN_SLP(gpf2-3, INPUT, DOWN);
> + PIN_SLP(gpf2-4, INPUT, DOWN);
> + PIN_SLP(gpf2-5, INPUT, DOWN);
> + PIN_SLP(gpf2-6, INPUT, DOWN);
> + PIN_SLP(gpf2-7, INPUT, DOWN);
> +
> + PIN_SLP(gpf3-0, INPUT, DOWN);
> + PIN_SLP(gpf3-1, INPUT, DOWN);
> + PIN_SLP(gpf3-2, INPUT, DOWN);
> + PIN_SLP(gpf3-3, INPUT, DOWN);
> + PIN_SLP(gpf3-4, PREV, NONE);
> + PIN_SLP(gpf3-5, OUT0, DOWN);
> +
> + PIN_SLP(gpj0-0, INPUT, DOWN);
> + PIN_SLP(gpj0-1, INPUT, DOWN);
> + PIN_SLP(gpj0-2, INPUT, DOWN);
> + PIN_SLP(gpj0-3, OUT0, NONE);
> + PIN_SLP(gpj0-4, INPUT, DOWN);
> + PIN_SLP(gpj0-5, INPUT, DOWN);
> + PIN_SLP(gpj0-6, OUT0, NONE);
> + PIN_SLP(gpj0-7, OUT0, NONE);
> +
> + PIN_SLP(gpj1-0, OUT0, NONE);
> + PIN_SLP(gpj1-1, INPUT, DOWN);
> + PIN_SLP(gpj1-2, PREV, NONE);
> + PIN_SLP(gpj1-3, INPUT, DOWN);
> + PIN_SLP(gpj1-4, INPUT, DOWN);
> + };
> +};
> +
> +&pinctrl_1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sleep1>;
> +
> + max77693_irq: max77693-irq {
> + samsung,pins = "gpx1-5";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + max77693_fuel_irq: max77693-fuel-irq {
> + samsung,pins = "gpx2-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + s5m8767_dvs: s5m8767-dvs {
> + samsung,pins = "gpm3-0", "gpm3-1", "gpm3-2";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + s5m8767_irq: s5m8767-irq {
> + samsung,pins = "gpx0-7";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + sdhci2_cd: sdhci2-cd-irq {
> + samsung,pins = "gpx3-4";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
> + };
> +
> + bt_shutdown: bt-shutdown-pins {
> + samsung,pins = "gpl0-6";
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + bt_host_wakeup: bt-host-wakeup-pins {
> + samsung,pins = "gpx2-6";
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + bt_device_wakeup: bt-device-wakeup-pins {
> + samsung,pins = "gpx3-1";
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + backlight_reset: backlight-reset {
> + samsung,pins = "gpm0-1";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + gpio_keys: gpio-keys-pins {
> + samsung,pins = "gpx1-2", "gpx2-2", "gpx2-4", "gpx2-7", "gpx3-3";
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + };
> +
> + sleep1: sleep-state {
> + PIN_SLP(gpk0-0, PREV, NONE);
> + PIN_SLP(gpk0-1, PREV, NONE);
> + PIN_SLP(gpk0-2, PREV, NONE);
> + PIN_SLP(gpk0-3, PREV, NONE);
> + PIN_SLP(gpk0-4, PREV, NONE);
> + PIN_SLP(gpk0-5, PREV, NONE);
> + PIN_SLP(gpk0-6, PREV, NONE);
> +
> + PIN_SLP(gpk1-0, INPUT, DOWN);
> + PIN_SLP(gpk1-1, INPUT, DOWN);
> + PIN_SLP(gpk1-2, INPUT, DOWN);
> + PIN_SLP(gpk1-3, PREV, NONE);
> + PIN_SLP(gpk1-4, PREV, NONE);
> + PIN_SLP(gpk1-5, PREV, NONE);
> + PIN_SLP(gpk1-6, PREV, NONE);
> +
> + PIN_SLP(gpk2-0, INPUT, DOWN);
> + PIN_SLP(gpk2-1, INPUT, DOWN);
> + PIN_SLP(gpk2-2, INPUT, DOWN);
> + PIN_SLP(gpk2-3, INPUT, DOWN);
> + PIN_SLP(gpk2-4, INPUT, DOWN);
> + PIN_SLP(gpk2-5, INPUT, DOWN);
> + PIN_SLP(gpk2-6, INPUT, DOWN);
> +
> + PIN_SLP(gpk3-0, OUT0, NONE);
> + PIN_SLP(gpk3-1, INPUT, NONE);
> + PIN_SLP(gpk3-2, INPUT, DOWN);
> + PIN_SLP(gpk3-3, INPUT, NONE);
> + PIN_SLP(gpk3-4, INPUT, NONE);
> + PIN_SLP(gpk3-5, INPUT, NONE);
> + PIN_SLP(gpk3-6, INPUT, NONE);
> +
> + PIN_SLP(gpl0-0, INPUT, DOWN); /* OUT0 on 3G, PREV on LTE; NONE on both */
> + PIN_SLP(gpl0-1, INPUT, NONE);
> + PIN_SLP(gpl0-2, INPUT, NONE);
> + PIN_SLP(gpl0-3, INPUT, DOWN);
> + PIN_SLP(gpl0-4, INPUT, DOWN);
> + PIN_SLP(gpl0-6, PREV, NONE);
> +
> + PIN_SLP(gpl1-0, INPUT, DOWN); /* OUT0 on 3G, PREV on LTE; NONE on both */
> + PIN_SLP(gpl1-1, OUT0, NONE);
> + PIN_SLP(gpl2-0, INPUT, DOWN);
> + PIN_SLP(gpl2-1, PREV, NONE); /* INPUT, DOWN on LTE */
> + PIN_SLP(gpl2-2, PREV, NONE); /* INPUT, DOWN on LTE */
> + PIN_SLP(gpl2-3, INPUT, DOWN);
> + PIN_SLP(gpl2-4, INPUT, DOWN); /* OUT0, NONE on models with modem */
> + PIN_SLP(gpl2-5, INPUT, DOWN); /* PREV, NONE on LTE */
> + PIN_SLP(gpl2-6, INPUT, DOWN);
> + PIN_SLP(gpl2-7, INPUT, DOWN);
> +
> + PIN_SLP(gpm0-0, PREV, NONE);
> + PIN_SLP(gpm0-1, OUT0, NONE);
> + PIN_SLP(gpm0-2, INPUT, DOWN);
> + PIN_SLP(gpm0-3, INPUT, DOWN);
> + PIN_SLP(gpm0-4, INPUT, DOWN);
> + PIN_SLP(gpm0-5, INPUT, DOWN);
> + PIN_SLP(gpm0-6, INPUT, DOWN);
> + PIN_SLP(gpm0-7, INPUT, DOWN);
> +
> + PIN_SLP(gpm1-0, INPUT, DOWN);
> + PIN_SLP(gpm1-1, INPUT, DOWN);
> + PIN_SLP(gpm1-2, INPUT, NONE);
> + PIN_SLP(gpm1-3, INPUT, NONE);
> + PIN_SLP(gpm1-4, INPUT, NONE);
> + PIN_SLP(gpm1-5, INPUT, NONE);
> + PIN_SLP(gpm1-6, OUT0, NONE);
> +
> + PIN_SLP(gpm2-0, INPUT, NONE);
> + PIN_SLP(gpm2-1, INPUT, NONE);
> + PIN_SLP(gpm2-2, OUT0, NONE);
> + PIN_SLP(gpm2-3, INPUT, DOWN);
> + PIN_SLP(gpm2-4, INPUT, DOWN);
> +
> + PIN_SLP(gpm3-0, PREV, NONE);
> + PIN_SLP(gpm3-1, PREV, NONE);
> + PIN_SLP(gpm3-2, PREV, NONE);
> + PIN_SLP(gpm3-3, INPUT, DOWN); /* OUT1, NONE for 3G */
> + PIN_SLP(gpm3-4, INPUT, DOWN);
> + PIN_SLP(gpm3-5, PREV, NONE);
> + PIN_SLP(gpm3-6, INPUT, DOWN);
> + PIN_SLP(gpm3-7, OUT0, NONE);
> +
> + PIN_SLP(gpm4-0, INPUT, DOWN);
> + PIN_SLP(gpm4-1, INPUT, DOWN);
> + PIN_SLP(gpm4-2, INPUT, DOWN);
> + PIN_SLP(gpm4-3, INPUT, DOWN);
> + PIN_SLP(gpm4-4, PREV, NONE);
> + PIN_SLP(gpm4-5, INPUT, NONE);
> + PIN_SLP(gpm4-6, INPUT, DOWN);
> + PIN_SLP(gpm4-7, INPUT, DOWN);
> +
> + PIN_SLP(gpy0-0, INPUT, DOWN);
> + PIN_SLP(gpy0-1, INPUT, DOWN);
> + PIN_SLP(gpy0-2, INPUT, NONE);
> + PIN_SLP(gpy0-3, INPUT, NONE);
> + PIN_SLP(gpy0-4, INPUT, DOWN);
> + PIN_SLP(gpy0-5, INPUT, DOWN);
> +
> + PIN_SLP(gpy1-0, INPUT, DOWN);
> + PIN_SLP(gpy1-1, INPUT, DOWN);
> + PIN_SLP(gpy1-2, INPUT, DOWN);
> + PIN_SLP(gpy1-3, INPUT, DOWN);
> +
> + PIN_SLP(gpy2-0, PREV, NONE);
> + PIN_SLP(gpy2-1, INPUT, DOWN);
> + PIN_SLP(gpy2-2, INPUT, NONE);
> + PIN_SLP(gpy2-3, INPUT, NONE);
> + PIN_SLP(gpy2-4, INPUT, NONE);
> + PIN_SLP(gpy2-5, INPUT, NONE);
> +
> + PIN_SLP(gpy3-0, INPUT, DOWN);
> + PIN_SLP(gpy3-1, INPUT, DOWN);
> + PIN_SLP(gpy3-2, INPUT, DOWN);
> + PIN_SLP(gpy3-3, INPUT, DOWN);
> + PIN_SLP(gpy3-4, INPUT, DOWN);
> + PIN_SLP(gpy3-5, INPUT, DOWN);
> + PIN_SLP(gpy3-6, INPUT, DOWN);
> + PIN_SLP(gpy3-7, INPUT, DOWN);
> +
> + PIN_SLP(gpy4-0, INPUT, DOWN);
> + PIN_SLP(gpy4-1, INPUT, DOWN);
> + PIN_SLP(gpy4-2, INPUT, DOWN);
> + PIN_SLP(gpy4-3, INPUT, DOWN);
> + PIN_SLP(gpy4-4, INPUT, DOWN);
> + PIN_SLP(gpy4-5, INPUT, DOWN);
> + PIN_SLP(gpy4-6, INPUT, DOWN);
> + PIN_SLP(gpy4-7, INPUT, DOWN);
> +
> + PIN_SLP(gpy5-0, INPUT, DOWN);
> + PIN_SLP(gpy5-1, INPUT, DOWN);
> + PIN_SLP(gpy5-2, INPUT, DOWN);
> + PIN_SLP(gpy5-3, INPUT, DOWN);
> + PIN_SLP(gpy5-4, INPUT, DOWN);
> + PIN_SLP(gpy5-5, INPUT, DOWN);
> + PIN_SLP(gpy5-6, INPUT, DOWN);
> + PIN_SLP(gpy5-7, INPUT, DOWN);
> +
> + PIN_SLP(gpy6-0, INPUT, DOWN);
> + PIN_SLP(gpy6-1, INPUT, DOWN);
> + PIN_SLP(gpy6-2, INPUT, DOWN);
> + PIN_SLP(gpy6-3, INPUT, DOWN);
> + PIN_SLP(gpy6-4, INPUT, DOWN);
> + PIN_SLP(gpy6-5, INPUT, DOWN);
> + PIN_SLP(gpy6-6, INPUT, DOWN);
> + PIN_SLP(gpy6-7, INPUT, DOWN);
> + };
> +};
> +
> +&pinctrl_2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sleep2>;
> +
> + sleep2: sleep-state {
> + PIN_SLP(gpz-0, INPUT, DOWN);
> + PIN_SLP(gpz-1, INPUT, DOWN);
> + PIN_SLP(gpz-2, INPUT, DOWN);
> + PIN_SLP(gpz-3, INPUT, DOWN);
> + PIN_SLP(gpz-4, INPUT, DOWN);
> + PIN_SLP(gpz-5, INPUT, DOWN);
> + PIN_SLP(gpz-6, INPUT, DOWN);
> + };
> +};
> +
> +&pinctrl_3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sleep3>;
> +
> + sleep3: sleep-state {
> + PIN_SLP(gpv0-0, INPUT, DOWN);
> + PIN_SLP(gpv0-1, INPUT, DOWN);
> + PIN_SLP(gpv0-2, INPUT, DOWN);
> + PIN_SLP(gpv0-3, INPUT, DOWN);
> + PIN_SLP(gpv0-4, INPUT, DOWN);
> + PIN_SLP(gpv0-5, INPUT, DOWN);
> + PIN_SLP(gpv0-6, INPUT, DOWN);
> + PIN_SLP(gpv0-7, INPUT, DOWN);
> +
> + PIN_SLP(gpv1-0, INPUT, DOWN);
> + PIN_SLP(gpv1-1, INPUT, DOWN);
> + PIN_SLP(gpv1-2, INPUT, DOWN);
> + PIN_SLP(gpv1-3, INPUT, DOWN);
> + PIN_SLP(gpv1-4, INPUT, DOWN);
> + PIN_SLP(gpv1-5, INPUT, DOWN);
> + PIN_SLP(gpv1-6, INPUT, DOWN);
> + PIN_SLP(gpv1-7, INPUT, DOWN);
> +
> + PIN_SLP(gpv2-0, INPUT, DOWN);
> + PIN_SLP(gpv2-1, INPUT, DOWN);
> + PIN_SLP(gpv2-2, INPUT, DOWN);
> + PIN_SLP(gpv2-3, INPUT, DOWN);
> + PIN_SLP(gpv2-4, INPUT, DOWN);
> + PIN_SLP(gpv2-5, INPUT, DOWN);
> + PIN_SLP(gpv2-6, INPUT, DOWN);
> + PIN_SLP(gpv2-7, INPUT, DOWN);
> +
> + PIN_SLP(gpv3-0, INPUT, DOWN);
> + PIN_SLP(gpv3-1, INPUT, DOWN);
> + PIN_SLP(gpv3-2, INPUT, DOWN);
> + PIN_SLP(gpv3-3, INPUT, DOWN);
> + PIN_SLP(gpv3-4, INPUT, DOWN);
> + PIN_SLP(gpv3-5, INPUT, DOWN);
> + PIN_SLP(gpv3-6, INPUT, DOWN);
> + PIN_SLP(gpv3-7, INPUT, DOWN);
> +
> + PIN_SLP(gpv4-0, INPUT, DOWN);
> + PIN_SLP(gpv4-1, INPUT, DOWN);
> + };
> +};
> +
> +&pmu_system_controller {
> + assigned-clocks = <&pmu_system_controller 0>;
> + assigned-clock-parents = <&clock CLK_XUSBXTI>;
> +};
> +
> +&pwm {
> + pinctrl-0 = <&pwm1_out>;
> + pinctrl-names = "default";
> + samsung,pwm-outputs = <1>;
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> + clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
> + clock-names = "rtc", "rtc_src";
> +};
> +
> +&sdhci_2 {
> + bus-width = <4>;
> + cd-gpios = <&gpx3 4 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sdhci2_cd>;
> + pinctrl-names = "default";
> + vmmc-supply = <&ldo23_reg>;
> + status = "okay";
> +};
> +
> +&sdhci_3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + non-removable;
> + bus-width = <4>;
> +
> + mmc-pwrseq = <&wlan_pwrseq>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>;
> + status = "okay";
> +
> + /* BCM4334 Wi-Fi */
> + brcmf: wifi@1 {
> + compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac";
> + reg = <1>;
> +
> + interrupt-parent = <&gpx2>;
> + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "host-wake";
> + };
> +};
> +
> +&serial_0 {
> + pinctrl-0 = <&uart0_data &uart0_fctl>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + /* BCM4334B0 Bluetooth */
> + bluetooth {
> + compatible = "brcm,bcm4330-bt";
> + pinctrl-0 = <&bt_shutdown &bt_device_wakeup &bt_host_wakeup>;
> + pinctrl-names = "default";
> + max-speed = <3000000>;
> + shutdown-gpios = <&gpl0 6 GPIO_ACTIVE_HIGH>;
> + device-wakeup-gpios = <&gpx3 1 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
> + clocks = <&s5m8767_osc S2MPS11_CLK_BT>;
> + };
> +};
> +
> +&serial_1 {
> + status = "okay";
> +};
> +
> +&serial_2 {
> + status = "okay";
> +};
> +
> +&serial_3 {
> + status = "okay";
> +};
> +
> +&tmu {
> + vtmu-supply = <&ldo10_reg>;
> + status = "okay";
> +};
> --
> 2.40.0
>
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* Re: [PATCH v2 03/12] ARM: exynos: Re-introduce Exynos4212 support
From: Henrik Grimler @ 2023-04-19 20:24 UTC (permalink / raw)
To: Artur Weber
Cc: Krzysztof Kozlowski, Alim Akhtar, Rob Herring, Sylwester Nawrocki,
Tomasz Figa, Chanwoo Choi, Michael Turquette, Stephen Boyd,
Arnd Bergmann, Olof Johansson, soc, Russell King, Daniel Lezcano,
Kukjin Kim, Mauro Carvalho Chehab, Vinod Koul,
Kishon Vijay Abraham I, linux-arm-kernel, linux-samsung-soc,
devicetree, linux-kernel, linux-clk, linux-pm, linux-media,
linux-phy, ~postmarketos/upstreaming
In-Reply-To: <20230416133422.1949-4-aweber.kernel@gmail.com>
Hi Artur,
On Sun, Apr 16, 2023 at 03:34:13PM +0200, Artur Weber wrote:
> The platform was originally dropped in commit bca9085e0ae9 ("ARM:
> dts: exynos: remove Exynos4212 support (dead code)"), as there were
> no boards using it.
>
> We will be adding a device that uses it, so add it back.
>
> This effectively reverts commit 9e43eca3c874 ("ARM: EXYNOS: Remove
> Exynos4212 related dead code").
>
> Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
> ---
> arch/arm/mach-exynos/Kconfig | 5 +++++
> arch/arm/mach-exynos/common.h | 8 ++++++++
> arch/arm/mach-exynos/exynos.c | 2 ++
> arch/arm/mach-exynos/firmware.c | 8 +++++++-
> arch/arm/mach-exynos/pm.c | 2 +-
> arch/arm/mach-exynos/suspend.c | 4 ++++
> 6 files changed, 27 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index 4d3b40e4049a..b3d5df5225fe 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -78,6 +78,11 @@ config CPU_EXYNOS4210
> default y
> depends on ARCH_EXYNOS4
>
> +config SOC_EXYNOS4212
> + bool "Samsung Exynos4212"
> + default y
> + depends on ARCH_EXYNOS4
> +
> config SOC_EXYNOS4412
> bool "Samsung Exynos4412"
> default y
> diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
> index 29eb075b24a4..c9e85d33c309 100644
> --- a/arch/arm/mach-exynos/common.h
> +++ b/arch/arm/mach-exynos/common.h
> @@ -15,6 +15,7 @@
> #define EXYNOS3_SOC_MASK 0xFFFFF000
>
> #define EXYNOS4210_CPU_ID 0x43210000
> +#define EXYNOS4212_CPU_ID 0x43220000
> #define EXYNOS4412_CPU_ID 0xE4412200
> #define EXYNOS4_CPU_MASK 0xFFFE0000
>
> @@ -34,6 +35,7 @@ static inline int is_samsung_##name(void) \
>
> IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
> IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
> +IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
> IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
> IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
> IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
> @@ -52,6 +54,12 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
> # define soc_is_exynos4210() 0
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS4212)
> +# define soc_is_exynos4212() is_samsung_exynos4212()
> +#else
> +# define soc_is_exynos4212() 0
> +#endif
> +
> #if defined(CONFIG_SOC_EXYNOS4412)
> # define soc_is_exynos4412() is_samsung_exynos4412()
> #else
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 51a247ca4da8..5671621f1661 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -178,6 +178,7 @@ static void __init exynos_dt_machine_init(void)
> exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
> #endif
> if (of_machine_is_compatible("samsung,exynos4210") ||
> + of_machine_is_compatible("samsung,exynos4212") ||
> (of_machine_is_compatible("samsung,exynos4412") &&
> (of_machine_is_compatible("samsung,trats2") ||
> of_machine_is_compatible("samsung,midas") ||
> @@ -192,6 +193,7 @@ static char const *const exynos_dt_compat[] __initconst = {
> "samsung,exynos3250",
> "samsung,exynos4",
> "samsung,exynos4210",
> + "samsung,exynos4212",
> "samsung,exynos4412",
> "samsung,exynos5",
> "samsung,exynos5250",
> diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
> index 2da5b60b59e2..110c8064ee64 100644
> --- a/arch/arm/mach-exynos/firmware.c
> +++ b/arch/arm/mach-exynos/firmware.c
> @@ -63,12 +63,18 @@ static int exynos_cpu_boot(int cpu)
> *
> * On Exynos5 devices the call is ignored by trustzone firmware.
> */
> - if (!soc_is_exynos4210() && !soc_is_exynos4412())
> + if (!soc_is_exynos4210() && !soc_is_exynos4412() &&
> + !soc_is_exynos4212())
Seems more logical to have 4212 before 4412 here.
> return 0;
>
> /*
> * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
> + * But, Exynos4212 has only one secondary CPU so second parameter
> + * isn't used for informing secure firmware about CPU id.
> */
> + if (soc_is_exynos4212())
> + cpu = 0;
Is it necessary to set cpu = 0? Are there any obvious issues without
it (like second cpu not being brought up)? It seems vendor kernel
does this for both exynos4210 and exynos4212 [1], but mainline has not
done this for exynos4210 and there has been no reported issues on for
that platform as far as I know.
The assembly that handles SMC_CMD_CPU1BOOT in sboot.bin from firmware
version T310XXSBQB2 is identical to what is found in sboot.bin from
exynos4412-galaxy-s3, and it uses the cpu arg in both cases, so seems
likely that we need this and I am mostly asking out of curiosity.
[1] https://github.com/krzk/linux-vendor-backup/blob/mokee/android-3.4-samsung-galaxy-tab-s-10.5-sm-t805-exynos5420/arch/arm/mach-exynos/platsmp.c#L225-L229
Best regards,
Henrik Grimler
> exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
> return 0;
> }
> diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
> index 30f4e55bf39e..9b6db04e4e34 100644
> --- a/arch/arm/mach-exynos/pm.c
> +++ b/arch/arm/mach-exynos/pm.c
> @@ -161,7 +161,7 @@ void exynos_enter_aftr(void)
>
> exynos_pm_central_suspend();
>
> - if (soc_is_exynos4412()) {
> + if (soc_is_exynos4412() || soc_is_exynos4212()) {
> /* Setting SEQ_OPTION register */
> pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
> S5P_CENTRAL_SEQ_OPTION);
> diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
> index 3bf14ca78b62..df1e10033f90 100644
> --- a/arch/arm/mach-exynos/suspend.c
> +++ b/arch/arm/mach-exynos/suspend.c
> @@ -231,6 +231,7 @@ static int __init exynos_pmu_irq_init(struct device_node *node,
>
> EXYNOS_PMU_IRQ(exynos3250_pmu_irq, "samsung,exynos3250-pmu");
> EXYNOS_PMU_IRQ(exynos4210_pmu_irq, "samsung,exynos4210-pmu");
> +EXYNOS_PMU_IRQ(exynos4212_pmu_irq, "samsung,exynos4212-pmu");
> EXYNOS_PMU_IRQ(exynos4412_pmu_irq, "samsung,exynos4412-pmu");
> EXYNOS_PMU_IRQ(exynos5250_pmu_irq, "samsung,exynos5250-pmu");
> EXYNOS_PMU_IRQ(exynos5420_pmu_irq, "samsung,exynos5420-pmu");
> @@ -640,6 +641,9 @@ static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
> }, {
> .compatible = "samsung,exynos4210-pmu",
> .data = &exynos4_pm_data,
> + }, {
> + .compatible = "samsung,exynos4212-pmu",
> + .data = &exynos4_pm_data,
> }, {
> .compatible = "samsung,exynos4412-pmu",
> .data = &exynos4_pm_data,
> --
> 2.40.0
>
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