* [PATCH v3 07/14] drm/mediatek: Rename files "mtk_drm_crtc.c" to "mtk_crtc.c"
From: Shawn Sung @ 2024-03-20 2:42 UTC (permalink / raw)
To: Chun-Kuang Hu, AngeloGioacchino Del Regno
Cc: Philipp Zabel, David Airlie, Daniel Vetter, Matthias Brugger,
Sumit Semwal, Christian König, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, linux-media, linaro-mm-sig,
Hsiao Chien Sung
In-Reply-To: <20240320024222.14234-1-shawn.sung@mediatek.com>
From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
Rename files mtk_drm_crtc.c to mtk_crtc.c and
modify the Makefile accordingly.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
---
drivers/gpu/drm/mediatek/Makefile | 4 ++--
drivers/gpu/drm/mediatek/{mtk_drm_crtc.c => mtk_crtc.c} | 0
2 files changed, 2 insertions(+), 2 deletions(-)
rename drivers/gpu/drm/mediatek/{mtk_drm_crtc.c => mtk_crtc.c} (100%)
diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
index 5e4436403b8d2..0198b50820d4c 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
-mediatek-drm-y := mtk_disp_aal.o \
+mediatek-drm-y := mtk_crtc.o \
+ mtk_disp_aal.o \
mtk_disp_ccorr.o \
mtk_disp_color.o \
mtk_disp_gamma.o \
@@ -8,7 +9,6 @@ mediatek-drm-y := mtk_disp_aal.o \
mtk_disp_ovl.o \
mtk_disp_ovl_adaptor.o \
mtk_disp_rdma.o \
- mtk_drm_crtc.o \
mtk_drm_ddp_comp.o \
mtk_drm_drv.o \
mtk_drm_gem.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c
similarity index 100%
rename from drivers/gpu/drm/mediatek/mtk_drm_crtc.c
rename to drivers/gpu/drm/mediatek/mtk_crtc.c
--
2.18.0
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^ permalink raw reply related
* [PATCH v3 01/14] drm/mediatek: Rename "mtk_drm_crtc" to "mtk_crtc"
From: Shawn Sung @ 2024-03-20 2:42 UTC (permalink / raw)
To: Chun-Kuang Hu, AngeloGioacchino Del Regno
Cc: Philipp Zabel, David Airlie, Daniel Vetter, Matthias Brugger,
Sumit Semwal, Christian König, dri-devel, linux-mediatek,
linux-kernel, linux-arm-kernel, linux-media, linaro-mm-sig,
Hsiao Chien Sung
In-Reply-To: <20240320024222.14234-1-shawn.sung@mediatek.com>
From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
Rename all "mtk_drm_crtc" to "mtk_crtc" due to the following benefits:
- Lower the matches when searching the native drm_crtc* codes
- Reduce the code size
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 189 +++++++++++------------
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 28 ++--
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 18 +--
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_plane.c | 10 +-
drivers/gpu/drm/mediatek/mtk_dsi.c | 2 +-
6 files changed, 119 insertions(+), 130 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
index a04499c4f9ca2..8a4b68898c601 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
@@ -26,7 +26,7 @@
#include "mtk_drm_plane.h"
/*
- * struct mtk_drm_crtc - MediaTek specific crtc structure.
+ * struct mtk_crtc - MediaTek specific crtc structure.
* @base: crtc object.
* @enabled: records whether crtc_enable succeeded
* @planes: array of 4 drm_plane structures, one for each overlay plane
@@ -38,7 +38,7 @@
*
* TODO: Needs update: this header is missing a bunch of member descriptions.
*/
-struct mtk_drm_crtc {
+struct mtk_crtc {
struct drm_crtc base;
bool enabled;
@@ -80,9 +80,9 @@ struct mtk_crtc_state {
unsigned int pending_vrefresh;
};
-static inline struct mtk_drm_crtc *to_mtk_crtc(struct drm_crtc *c)
+static inline struct mtk_crtc *to_mtk_crtc(struct drm_crtc *c)
{
- return container_of(c, struct mtk_drm_crtc, base);
+ return container_of(c, struct mtk_crtc, base);
}
static inline struct mtk_crtc_state *to_mtk_crtc_state(struct drm_crtc_state *s)
@@ -90,7 +90,7 @@ static inline struct mtk_crtc_state *to_mtk_crtc_state(struct drm_crtc_state *s)
return container_of(s, struct mtk_crtc_state, base);
}
-static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
+static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc)
{
struct drm_crtc *crtc = &mtk_crtc->base;
unsigned long flags;
@@ -104,11 +104,11 @@ static void mtk_drm_crtc_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
}
}
-static void mtk_drm_finish_page_flip(struct mtk_drm_crtc *mtk_crtc)
+static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc)
{
drm_crtc_handle_vblank(&mtk_crtc->base);
if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {
- mtk_drm_crtc_finish_page_flip(mtk_crtc);
+ mtk_crtc_finish_page_flip(mtk_crtc);
mtk_crtc->pending_needs_vblank = false;
}
}
@@ -151,9 +151,9 @@ static void mtk_drm_cmdq_pkt_destroy(struct cmdq_pkt *pkt)
}
#endif
-static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)
+static void mtk_crtc_destroy(struct drm_crtc *crtc)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
int i;
mtk_mutex_put(mtk_crtc->mutex);
@@ -176,7 +176,7 @@ static void mtk_drm_crtc_destroy(struct drm_crtc *crtc)
drm_crtc_cleanup(crtc);
}
-static void mtk_drm_crtc_reset(struct drm_crtc *crtc)
+static void mtk_crtc_reset(struct drm_crtc *crtc)
{
struct mtk_crtc_state *state;
@@ -191,7 +191,7 @@ static void mtk_drm_crtc_reset(struct drm_crtc *crtc)
__drm_atomic_helper_crtc_reset(crtc, &state->base);
}
-static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc)
+static struct drm_crtc_state *mtk_crtc_duplicate_state(struct drm_crtc *crtc)
{
struct mtk_crtc_state *state;
@@ -208,18 +208,17 @@ static struct drm_crtc_state *mtk_drm_crtc_duplicate_state(struct drm_crtc *crtc
return &state->base;
}
-static void mtk_drm_crtc_destroy_state(struct drm_crtc *crtc,
- struct drm_crtc_state *state)
+static void mtk_crtc_destroy_state(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
{
__drm_atomic_helper_crtc_destroy_state(state);
kfree(to_mtk_crtc_state(state));
}
static enum drm_mode_status
-mtk_drm_crtc_mode_valid(struct drm_crtc *crtc,
- const struct drm_display_mode *mode)
+mtk_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
enum drm_mode_status status = MODE_OK;
int i;
@@ -231,15 +230,15 @@ mtk_drm_crtc_mode_valid(struct drm_crtc *crtc,
return status;
}
-static bool mtk_drm_crtc_mode_fixup(struct drm_crtc *crtc,
- const struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static bool mtk_crtc_mode_fixup(struct drm_crtc *crtc,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
{
/* Nothing to do here, but this callback is mandatory. */
return true;
}
-static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
+static void mtk_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);
@@ -250,7 +249,7 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
state->pending_config = true;
}
-static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc)
+static int mtk_crtc_ddp_clk_enable(struct mtk_crtc *mtk_crtc)
{
int ret;
int i;
@@ -270,7 +269,7 @@ static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc)
return ret;
}
-static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc)
+static void mtk_crtc_ddp_clk_disable(struct mtk_crtc *mtk_crtc)
{
int i;
@@ -283,7 +282,7 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,
struct drm_plane *plane,
unsigned int *local_layer)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp;
int i, count = 0;
unsigned int local_index = plane - mtk_crtc->planes;
@@ -306,7 +305,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
{
struct cmdq_cb_data *data = mssg;
struct cmdq_client *cmdq_cl = container_of(cl, struct cmdq_client, client);
- struct mtk_drm_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_drm_crtc, cmdq_client);
+ struct mtk_crtc *mtk_crtc = container_of(cmdq_cl, struct mtk_crtc, cmdq_client);
struct mtk_crtc_state *state;
unsigned int i;
@@ -346,7 +345,7 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
}
#endif
-static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
+static int mtk_crtc_ddp_hw_init(struct mtk_crtc *mtk_crtc)
{
struct drm_crtc *crtc = &mtk_crtc->base;
struct drm_connector *connector;
@@ -446,7 +445,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
return ret;
}
-static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)
+static void mtk_crtc_ddp_hw_fini(struct mtk_crtc *mtk_crtc)
{
struct drm_device *drm = mtk_crtc->base.dev;
struct drm_crtc *crtc = &mtk_crtc->base;
@@ -491,7 +490,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)
static void mtk_crtc_ddp_config(struct drm_crtc *crtc,
struct cmdq_pkt *cmdq_handle)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
unsigned int i;
@@ -563,8 +562,7 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc,
}
}
-static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,
- bool needs_vblank)
+static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank)
{
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;
@@ -636,7 +634,7 @@ static void mtk_drm_crtc_update_config(struct mtk_drm_crtc *mtk_crtc,
static void mtk_crtc_ddp_irq(void *data)
{
struct drm_crtc *crtc = data;
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_drm_private *priv = crtc->dev->dev_private;
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
@@ -652,9 +650,9 @@ static void mtk_crtc_ddp_irq(void *data)
mtk_drm_finish_page_flip(mtk_crtc);
}
-static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)
+static int mtk_crtc_enable_vblank(struct drm_crtc *crtc)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
mtk_ddp_comp_enable_vblank(comp);
@@ -662,22 +660,22 @@ static int mtk_drm_crtc_enable_vblank(struct drm_crtc *crtc)
return 0;
}
-static void mtk_drm_crtc_disable_vblank(struct drm_crtc *crtc)
+static void mtk_crtc_disable_vblank(struct drm_crtc *crtc)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
mtk_ddp_comp_disable_vblank(comp);
}
-static void mtk_drm_crtc_update_output(struct drm_crtc *crtc,
- struct drm_atomic_state *state)
+static void mtk_crtc_update_output(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
int crtc_index = drm_crtc_index(crtc);
int i;
struct device *dev;
struct drm_crtc_state *crtc_state = state->crtcs[crtc_index].new_state;
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_drm_private *priv;
unsigned int encoder_mask = crtc_state->encoder_mask;
@@ -707,8 +705,8 @@ static void mtk_drm_crtc_update_output(struct drm_crtc *crtc,
}
}
-int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
- struct mtk_plane_state *state)
+int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
+ struct mtk_plane_state *state)
{
unsigned int local_layer;
struct mtk_ddp_comp *comp;
@@ -719,21 +717,21 @@ int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
return 0;
}
-void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
- struct drm_atomic_state *state)
+void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
+ struct drm_atomic_state *state)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
if (!mtk_crtc->enabled)
return;
- mtk_drm_crtc_update_config(mtk_crtc, false);
+ mtk_crtc_update_config(mtk_crtc, false);
}
-static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
- struct drm_atomic_state *state)
+static void mtk_crtc_atomic_enable(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
int ret;
@@ -745,7 +743,7 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
return;
}
- mtk_drm_crtc_update_output(crtc, state);
+ mtk_crtc_update_output(crtc, state);
ret = mtk_crtc_ddp_hw_init(mtk_crtc);
if (ret) {
@@ -757,15 +755,12 @@ static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
mtk_crtc->enabled = true;
}
-static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
- struct drm_atomic_state *state)
+static void mtk_crtc_atomic_disable(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];
int i;
-
- DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);
- if (!mtk_crtc->enabled)
return;
/* Set all pending plane state to disabled */
@@ -779,7 +774,7 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
}
mtk_crtc->pending_planes = true;
- mtk_drm_crtc_update_config(mtk_crtc, false);
+ mtk_crtc_update_config(mtk_crtc, false);
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
/* Wait for planes to be disabled by cmdq */
if (mtk_crtc->cmdq_client.chan)
@@ -797,13 +792,13 @@ static void mtk_drm_crtc_atomic_disable(struct drm_crtc *crtc,
mtk_crtc->enabled = false;
}
-static void mtk_drm_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_atomic_state *state)
+static void mtk_crtc_atomic_begin(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
crtc);
struct mtk_crtc_state *mtk_crtc_state = to_mtk_crtc_state(crtc_state);
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
unsigned long flags;
if (mtk_crtc->event && mtk_crtc_state->base.event)
@@ -821,10 +816,10 @@ static void mtk_drm_crtc_atomic_begin(struct drm_crtc *crtc,
}
}
-static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_atomic_state *state)
+static void mtk_crtc_atomic_flush(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
- struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
+ struct mtk_crtc *mtk_crtc = to_mtk_crtc(crtc);
int i;
if (crtc->state->color_mgmt_changed)
@@ -832,33 +827,32 @@ static void mtk_drm_crtc_atomic_flush(struct drm_crtc *crtc,
mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);
mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);
}
- mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);
+ mtk_crtc_update_config(mtk_crtc, !!mtk_crtc->event);
}
static const struct drm_crtc_funcs mtk_crtc_funcs = {
.set_config = drm_atomic_helper_set_config,
.page_flip = drm_atomic_helper_page_flip,
- .destroy = mtk_drm_crtc_destroy,
- .reset = mtk_drm_crtc_reset,
- .atomic_duplicate_state = mtk_drm_crtc_duplicate_state,
- .atomic_destroy_state = mtk_drm_crtc_destroy_state,
- .enable_vblank = mtk_drm_crtc_enable_vblank,
- .disable_vblank = mtk_drm_crtc_disable_vblank,
+ .destroy = mtk_crtc_destroy,
+ .reset = mtk_crtc_reset,
+ .atomic_duplicate_state = mtk_crtc_duplicate_state,
+ .atomic_destroy_state = mtk_crtc_destroy_state,
+ .enable_vblank = mtk_crtc_enable_vblank,
+ .disable_vblank = mtk_crtc_disable_vblank,
};
static const struct drm_crtc_helper_funcs mtk_crtc_helper_funcs = {
- .mode_fixup = mtk_drm_crtc_mode_fixup,
- .mode_set_nofb = mtk_drm_crtc_mode_set_nofb,
- .mode_valid = mtk_drm_crtc_mode_valid,
- .atomic_begin = mtk_drm_crtc_atomic_begin,
- .atomic_flush = mtk_drm_crtc_atomic_flush,
- .atomic_enable = mtk_drm_crtc_atomic_enable,
- .atomic_disable = mtk_drm_crtc_atomic_disable,
+ .mode_fixup = mtk_crtc_mode_fixup,
+ .mode_set_nofb = mtk_crtc_mode_set_nofb,
+ .mode_valid = mtk_crtc_mode_valid,
+ .atomic_begin = mtk_crtc_atomic_begin,
+ .atomic_flush = mtk_crtc_atomic_flush,
+ .atomic_enable = mtk_crtc_atomic_enable,
+ .atomic_disable = mtk_crtc_atomic_disable,
};
-static int mtk_drm_crtc_init(struct drm_device *drm,
- struct mtk_drm_crtc *mtk_crtc,
- unsigned int pipe)
+static int mtk_crtc_init(struct drm_device *drm, struct mtk_crtc *mtk_crtc,
+ unsigned int pipe)
{
struct drm_plane *primary = NULL;
struct drm_plane *cursor = NULL;
@@ -885,8 +879,7 @@ static int mtk_drm_crtc_init(struct drm_device *drm,
return ret;
}
-static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,
- int comp_idx)
+static int mtk_crtc_num_comp_planes(struct mtk_crtc *mtk_crtc, int comp_idx)
{
struct mtk_ddp_comp *comp;
@@ -904,8 +897,8 @@ static int mtk_drm_crtc_num_comp_planes(struct mtk_drm_crtc *mtk_crtc,
}
static inline
-enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx,
- unsigned int num_planes)
+enum drm_plane_type mtk_crtc_plane_type(unsigned int plane_idx,
+ unsigned int num_planes)
{
if (plane_idx == 0)
return DRM_PLANE_TYPE_PRIMARY;
@@ -916,11 +909,11 @@ enum drm_plane_type mtk_drm_crtc_plane_type(unsigned int plane_idx,
}
-static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,
- struct mtk_drm_crtc *mtk_crtc,
- int comp_idx, int pipe)
+static int mtk_crtc_init_comp_planes(struct drm_device *drm_dev,
+ struct mtk_crtc *mtk_crtc,
+ int comp_idx, int pipe)
{
- int num_planes = mtk_drm_crtc_num_comp_planes(mtk_crtc, comp_idx);
+ int num_planes = mtk_crtc_num_comp_planes(mtk_crtc, comp_idx);
struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];
int i, ret;
@@ -928,8 +921,7 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,
ret = mtk_plane_init(drm_dev,
&mtk_crtc->planes[mtk_crtc->layer_nr],
BIT(pipe),
- mtk_drm_crtc_plane_type(mtk_crtc->layer_nr,
- num_planes),
+ mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes),
mtk_ddp_comp_supported_rotations(comp),
mtk_ddp_comp_get_formats(comp),
mtk_ddp_comp_get_num_formats(comp));
@@ -941,9 +933,9 @@ static int mtk_drm_crtc_init_comp_planes(struct drm_device *drm_dev,
return 0;
}
-struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc)
+struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc)
{
- struct mtk_drm_crtc *mtk_crtc = NULL;
+ struct mtk_crtc *mtk_crtc = NULL;
if (!crtc)
return NULL;
@@ -955,14 +947,14 @@ struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc)
return mtk_crtc->dma_dev;
}
-int mtk_drm_crtc_create(struct drm_device *drm_dev,
- const unsigned int *path, unsigned int path_len,
- int priv_data_index, const struct mtk_drm_route *conn_routes,
- unsigned int num_conn_routes)
+int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,
+ unsigned int path_len, int priv_data_index,
+ const struct mtk_drm_route *conn_routes,
+ unsigned int num_conn_routes)
{
struct mtk_drm_private *priv = drm_dev->dev_private;
struct device *dev = drm_dev->dev;
- struct mtk_drm_crtc *mtk_crtc;
+ struct mtk_crtc *mtk_crtc;
unsigned int num_comp_planes = 0;
int ret;
int i;
@@ -1047,7 +1039,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
}
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
- num_comp_planes += mtk_drm_crtc_num_comp_planes(mtk_crtc, i);
+ num_comp_planes += mtk_crtc_num_comp_planes(mtk_crtc, i);
mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,
sizeof(struct drm_plane), GFP_KERNEL);
@@ -1055,8 +1047,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
return -ENOMEM;
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
- ret = mtk_drm_crtc_init_comp_planes(drm_dev, mtk_crtc, i,
- crtc_i);
+ ret = mtk_crtc_init_comp_planes(drm_dev, mtk_crtc, i, crtc_i);
if (ret)
return ret;
}
@@ -1068,7 +1059,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
*/
mtk_crtc->dma_dev = mtk_ddp_comp_dma_dev_get(&priv->ddp_comp[path[0]]);
- ret = mtk_drm_crtc_init(drm_dev, mtk_crtc, crtc_i);
+ ret = mtk_crtc_init(drm_dev, mtk_crtc, crtc_i);
if (ret < 0)
return ret;
@@ -1138,7 +1129,7 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
mtk_crtc->num_conn_routes = num_conn_routes;
mtk_crtc->conn_routes = conn_routes;
- /* increase ddp_comp_nr at the end of mtk_drm_crtc_create */
+ /* increase ddp_comp_nr at the end of mtk_crtc_create */
mtk_crtc->ddp_comp_nr++;
}
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
index 1f988ff1bf9fd..2d9f28f436aea 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
@@ -3,8 +3,8 @@
* Copyright (c) 2015 MediaTek Inc.
*/
-#ifndef MTK_DRM_CRTC_H
-#define MTK_DRM_CRTC_H
+#ifndef MTK_CRTC_H
+#define MTK_CRTC_H
#include <drm/drm_crtc.h>
#include "mtk_drm_ddp_comp.h"
@@ -14,17 +14,15 @@
#define MTK_MAX_BPC 10
#define MTK_MIN_BPC 3
-void mtk_drm_crtc_commit(struct drm_crtc *crtc);
-int mtk_drm_crtc_create(struct drm_device *drm_dev,
- const unsigned int *path,
- unsigned int path_len,
- int priv_data_index,
- const struct mtk_drm_route *conn_routes,
- unsigned int num_conn_routes);
-int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
- struct mtk_plane_state *state);
-void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
- struct drm_atomic_state *plane_state);
-struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc);
+void mtk_crtc_commit(struct drm_crtc *crtc);
+int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,
+ unsigned int path_len, int priv_data_index,
+ const struct mtk_drm_route *conn_routes,
+ unsigned int num_conn_routes);
+int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
+ struct mtk_plane_state *state);
+void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
+ struct drm_atomic_state *plane_state);
+struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc);
-#endif /* MTK_DRM_CRTC_H */
+#endif /* MTK_CRTC_H */
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 74832c2130921..c46773569b3c9 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -494,24 +494,24 @@ static int mtk_drm_kms_init(struct drm_device *drm)
priv_n = private->all_drm_private[j];
if (i == CRTC_MAIN && priv_n->data->main_len) {
- ret = mtk_drm_crtc_create(drm, priv_n->data->main_path,
- priv_n->data->main_len, j,
- priv_n->data->conn_routes,
- priv_n->data->num_conn_routes);
+ ret = mtk_crtc_create(drm, priv_n->data->main_path,
+ priv_n->data->main_len, j,
+ priv_n->data->conn_routes,
+ priv_n->data->num_conn_routes);
if (ret)
goto err_component_unbind;
continue;
} else if (i == CRTC_EXT && priv_n->data->ext_len) {
- ret = mtk_drm_crtc_create(drm, priv_n->data->ext_path,
- priv_n->data->ext_len, j, NULL, 0);
+ ret = mtk_crtc_create(drm, priv_n->data->ext_path,
+ priv_n->data->ext_len, j, NULL, 0);
if (ret)
goto err_component_unbind;
continue;
} else if (i == CRTC_THIRD && priv_n->data->third_len) {
- ret = mtk_drm_crtc_create(drm, priv_n->data->third_path,
- priv_n->data->third_len, j, NULL, 0);
+ ret = mtk_crtc_create(drm, priv_n->data->third_path,
+ priv_n->data->third_len, j, NULL, 0);
if (ret)
goto err_component_unbind;
@@ -523,7 +523,7 @@ static int mtk_drm_kms_init(struct drm_device *drm)
/* Use OVL device for all DMA memory allocations */
crtc = drm_crtc_from_index(drm, 0);
if (crtc)
- dma_dev = mtk_drm_crtc_dma_dev_get(crtc);
+ dma_dev = mtk_crtc_dma_dev_get(crtc);
if (!dma_dev) {
ret = -ENODEV;
dev_err(drm->dev, "Need at least one OVL device\n");
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
index 33fadb08dc1c7..24c4d59085bd6 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
@@ -13,7 +13,7 @@
#define DDP_COMPONENT_DRM_OVL_ADAPTOR (DDP_COMPONENT_ID_MAX + 1)
#define DDP_COMPONENT_DRM_ID_MAX (DDP_COMPONENT_DRM_OVL_ADAPTOR + 1)
-enum mtk_drm_crtc_path {
+enum mtk_crtc_path {
CRTC_MAIN,
CRTC_EXT,
CRTC_THIRD,
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
index ddc9355b06d51..cbdb70677d305 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
@@ -117,8 +117,8 @@ static int mtk_plane_atomic_async_check(struct drm_plane *plane,
if (!plane->state->fb)
return -EINVAL;
- ret = mtk_drm_crtc_plane_check(new_plane_state->crtc, plane,
- to_mtk_plane_state(new_plane_state));
+ ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,
+ to_mtk_plane_state(new_plane_state));
if (ret)
return ret;
@@ -232,7 +232,7 @@ static void mtk_plane_atomic_async_update(struct drm_plane *plane,
swap(plane->state->fb, new_state->fb);
wmb(); /* Make sure the above parameters are set before update */
new_plane_state->pending.async_dirty = true;
- mtk_drm_crtc_async_update(new_state->crtc, plane, state);
+ mtk_crtc_async_update(new_state->crtc, plane, state);
}
static const struct drm_plane_funcs mtk_plane_funcs = {
@@ -260,8 +260,8 @@ static int mtk_plane_atomic_check(struct drm_plane *plane,
if (WARN_ON(!new_plane_state->crtc))
return 0;
- ret = mtk_drm_crtc_plane_check(new_plane_state->crtc, plane,
- to_mtk_plane_state(new_plane_state));
+ ret = mtk_crtc_plane_check(new_plane_state->crtc, plane,
+ to_mtk_plane_state(new_plane_state));
if (ret)
return ret;
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 9501f40191990..ec9d96396d7b2 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -662,7 +662,7 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi)
/*
* mtk_dsi_stop() and mtk_dsi_start() is asymmetric, since
- * mtk_dsi_stop() should be called after mtk_drm_crtc_atomic_disable(),
+ * mtk_dsi_stop() should be called after mtk_crtc_atomic_disable(),
* which needs irq for vblank, and mtk_dsi_stop() will disable irq.
* mtk_dsi_start() needs to be called in mtk_output_dsi_enable(),
* after dsi is fully set.
--
2.18.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH v2 13/14] drm/mediatek: Rename files "mtk_drm_gem.c" to "mtk_gem.c"
From: CK Hu (胡俊光) @ 2024-03-20 2:28 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-14-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_gem.c to mtk_gem.c.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Reviewed-by: AngeloGiaocchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/Makefile | 2 +-
> drivers/gpu/drm/mediatek/{mtk_drm_gem.c => mtk_gem.c} | 0
> 2 files changed, 1 insertion(+), 1 deletion(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_gem.c => mtk_gem.c} (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index a47fbec7b9ce1..32a2ed6c0cfef 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -11,10 +11,10 @@ mediatek-drm-y := mtk_crtc.o \
> mtk_disp_ovl_adaptor.o \
> mtk_disp_rdma.o \
> mtk_drm_drv.o \
> - mtk_drm_gem.o \
> mtk_dsi.o \
> mtk_dpi.o \
> mtk_ethdr.o \
> + mtk_gem.o \
> mtk_mdp_rdma.o \
> mtk_padding.o \
> mtk_plane.o
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> b/drivers/gpu/drm/mediatek/mtk_gem.c
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_gem.c
> rename to drivers/gpu/drm/mediatek/mtk_gem.c
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH v3 5/5] mm: support large folios swapin as a whole
From: Huang, Ying @ 2024-03-20 2:18 UTC (permalink / raw)
To: Ryan Roberts
Cc: Barry Song, Matthew Wilcox, akpm, linux-mm, chengming.zhou,
chrisl, david, hannes, kasong, linux-arm-kernel, linux-kernel,
mhocko, nphamcs, shy828301, steven.price, surenb, wangkefeng.wang,
xiang, yosryahmed, yuzhao, Chuanhua Han, Barry Song
In-Reply-To: <f918354d-12ee-4349-9356-fc02d2457a26@arm.com>
Ryan Roberts <ryan.roberts@arm.com> writes:
> On 19/03/2024 09:20, Huang, Ying wrote:
>> Ryan Roberts <ryan.roberts@arm.com> writes:
>>
>>>>>> I agree phones are not the only platform. But Rome wasn't built in a
>>>>>> day. I can only get
>>>>>> started on a hardware which I can easily reach and have enough hardware/test
>>>>>> resources on it. So we may take the first step which can be applied on
>>>>>> a real product
>>>>>> and improve its performance, and step by step, we broaden it and make it
>>>>>> widely useful to various areas in which I can't reach :-)
>>>>>
>>>>> We must guarantee the normal swap path runs correctly and has no
>>>>> performance regression when developing SWP_SYNCHRONOUS_IO optimization.
>>>>> So we have to put some effort on the normal path test anyway.
>>>>>
>>>>>> so probably we can have a sysfs "enable" entry with default "n" or
>>>>>> have a maximum
>>>>>> swap-in order as Ryan's suggestion [1] at the beginning,
>>>>>>
>>>>>> "
>>>>>> So in the common case, swap-in will pull in the same size of folio as was
>>>>>> swapped-out. Is that definitely the right policy for all folio sizes? Certainly
>>>>>> it makes sense for "small" large folios (e.g. up to 64K IMHO). But I'm not sure
>>>>>> it makes sense for 2M THP; As the size increases the chances of actually needing
>>>>>> all of the folio reduces so chances are we are wasting IO. There are similar
>>>>>> arguments for CoW, where we currently copy 1 page per fault - it probably makes
>>>>>> sense to copy the whole folio up to a certain size.
>>>>>> "
>>>
>>> I thought about this a bit more. No clear conclusions, but hoped this might help
>>> the discussion around policy:
>>>
>>> The decision about the size of the THP is made at first fault, with some help
>>> from user space and in future we might make decisions to split based on
>>> munmap/mremap/etc hints. In an ideal world, the fact that we have had to swap
>>> the THP out at some point in its lifetime should not impact on its size. It's
>>> just being moved around in the system and the reason for our original decision
>>> should still hold.
>>>
>>> So from that PoV, it would be good to swap-in to the same size that was
>>> swapped-out.
>>
>> Sorry, I don't agree with this. It's better to swap-in and swap-out in
>> smallest size if the page is only accessed seldom to avoid to waste
>> memory.
>
> If we want to optimize only for memory consumption, I'm sure there are many
> things we would do differently. We need to find a balance between memory and
> performance. The benefits of folios are well documented and the kernel is
> heading in the direction of managing memory in variable-sized blocks. So I don't
> think it's as simple as saying we should always swap-in the smallest possible
> amount of memory.
It's conditional, that is,
"if the page is only accessed seldom"
Then, the page swapped-in will be swapped-out soon and adjacent pages in
the same large folio will not be accessed during this period.
So, I suggest to create an algorithm to decide swap-in order based on
swap-readahead information automatically. It can detect the situation
above via reduced swap readahead window size. And, if the page is
accessed for quite long time, and the adjacent pages in the same large
folio are accessed too, swap-readahead window will increase and large
swap-in order will be used.
> You also said we should swap *out* in smallest size possible. Have I
> misunderstood you? I thought the case for swapping-out a whole folio without
> splitting was well established and non-controversial?
That is conditional too.
>>
>>> But we only kind-of keep that information around, via the swap
>>> entry contiguity and alignment. With that scheme it is possible that multiple
>>> virtually adjacent but not physically contiguous folios get swapped-out to
>>> adjacent swap slot ranges and then they would be swapped-in to a single, larger
>>> folio. This is not ideal, and I think it would be valuable to try to maintain
>>> the original folio size information with the swap slot. One way to do this would
>>> be to store the original order for which the cluster was allocated in the
>>> cluster. Then we at least know that a given swap slot is either for a folio of
>>> that order or an order-0 folio (due to cluster exhaustion/scanning). Can we
>>> steal a bit from swap_map to determine which case it is? Or are there better
>>> approaches?
>>
>> [snip]
--
Best Regards,
Huang, Ying
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^ permalink raw reply
* Re: [PATCH v2 12/14] drm/mediatek: Rename files "mtk_drm_gem.h" to "mtk_gem.h"
From: CK Hu (胡俊光) @ 2024-03-20 2:14 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-13-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_gem.h to mtk_gem.h.
After moving rest part to this patch,
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Reviewed-by: AngeloGiaocchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/mtk_crtc.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_gem.c | 2 +-
> drivers/gpu/drm/mediatek/{mtk_drm_gem.h => mtk_gem.h} | 0
> 4 files changed, 3 insertions(+), 3 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_gem.h => mtk_gem.h} (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_crtc.c
> index 1ba47e65a32da..d5974fc1a729a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
> @@ -22,7 +22,7 @@
> #include "mtk_crtc.h"
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_gem.h"
> +#include "mtk_gem.h"
> #include "mtk_plane.h"
>
> /*
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 113fdbaac5a14..b62320f648825 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -27,7 +27,7 @@
> #include "mtk_crtc.h"
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_gem.h"
> +#include "mtk_gem.h"
>
> #define DRIVER_NAME "mediatek"
> #define DRIVER_DESC "Mediatek SoC DRM"
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> index 445fd8a8b8988..166a71dc40860 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> @@ -12,7 +12,7 @@
> #include <drm/drm_prime.h>
>
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_gem.h"
> +#include "mtk_gem.h"
>
> static int mtk_gem_object_mmap(struct drm_gem_object *obj, struct
> vm_area_struct *vma);
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.h
> b/drivers/gpu/drm/mediatek/mtk_gem.h
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_gem.h
> rename to drivers/gpu/drm/mediatek/mtk_gem.h
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^ permalink raw reply
* Re: [PATCH v2 11/14] drm/mediatek: Rename files "mtk_drm_plane.c" to "mtk_plane.c"
From: CK Hu (胡俊光) @ 2024-03-20 2:04 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-12-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_plane.c to mtk_plane.c and
> modify the Makefile accordingly.
>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/Makefile | 4 ++--
> drivers/gpu/drm/mediatek/{mtk_drm_plane.c => mtk_plane.c} | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_plane.c => mtk_plane.c}
> (99%)
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index bdb71738e1f31..a47fbec7b9ce1 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -12,12 +12,12 @@ mediatek-drm-y := mtk_crtc.o \
> mtk_disp_rdma.o \
> mtk_drm_drv.o \
> mtk_drm_gem.o \
> - mtk_drm_plane.o \
> mtk_dsi.o \
> mtk_dpi.o \
> mtk_ethdr.o \
> mtk_mdp_rdma.o \
> - mtk_padding.o
> + mtk_padding.o \
> + mtk_plane.o
>
> obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> b/drivers/gpu/drm/mediatek/mtk_plane.c
> similarity index 99%
> rename from drivers/gpu/drm/mediatek/mtk_drm_plane.c
> rename to drivers/gpu/drm/mediatek/mtk_plane.c
> index 95a4328a9b0b6..4625deb21d406 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_plane.c
> @@ -16,7 +16,7 @@
> #include "mtk_crtc.h"
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_gem.h"
> +#include "mtk_gem.h"
This should be another patch. After removing this,
Reviewed-by: CK Hu <ck.hu@mediatek.com>
> #include "mtk_plane.h"
>
> static const u64 modifiers[] = {
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^ permalink raw reply
* Re: [PATCH] clk: imx: imx8mp: Add pm_runtime support for power saving
From: Shengjiu Wang @ 2024-03-20 2:11 UTC (permalink / raw)
To: Marco Felsch
Cc: Peng Fan, S.J. Wang, abelvesa@kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, dl-linux-imx,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20240319073540.2zvwq7fvft3h6mbr@pengutronix.de>
On Tue, Mar 19, 2024 at 3:35 PM Marco Felsch <m.felsch@pengutronix.de> wrote:
>
> On 24-03-18, Peng Fan wrote:
> > > Subject: [PATCH] clk: imx: imx8mp: Add pm_runtime support for power
> > > saving
> > >
> > > Add pm_runtime support for power saving. In pm runtime suspend state the
> > > registers will be reseted, so add registers save in pm runtime suspend and
> > > restore them in pm runtime resume.
>
> We had similar patches in our downstream repo but didn't upstream yet
> since there was an clk-handing issue. IIRC the issue was regarding the
> global clock-prepare lock and a circular dependency on it. Is this
> resolved now?
Seems I didn't meet the issue you mentioned.
But I found another issue with my implementation that the pm_runtime_enable
need to move before the clk registered, Otherwise the core->rpm_enabled
is not ture at clk registering.
I will update in next version.
Best regards
Shengjiu Wang
>
> Regards,
> Marco
>
> > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> >
> > Reviewed-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > > drivers/clk/imx/clk-imx8mp-audiomix.c | 99 ++++++++++++++++++++++++++-
> > > 1 file changed, 96 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-
> > > imx8mp-audiomix.c
> > > index 55ed211a5e0b..d2bf53e2aacf 100644
> > > --- a/drivers/clk/imx/clk-imx8mp-audiomix.c
> > > +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
> > > @@ -7,10 +7,12 @@
> > >
> > > #include <linux/clk-provider.h>
> > > #include <linux/device.h>
> > > +#include <linux/io.h>
> > > #include <linux/mod_devicetable.h>
> > > #include <linux/module.h>
> > > #include <linux/of.h>
> > > #include <linux/platform_device.h>
> > > +#include <linux/pm_runtime.h>
> > >
> > > #include <dt-bindings/clock/imx8mp-clock.h>
> > >
> > > @@ -18,6 +20,7 @@
> > >
> > > #define CLKEN0 0x000
> > > #define CLKEN1 0x004
> > > +#define EARC 0x200
> > > #define SAI1_MCLK_SEL 0x300
> > > #define SAI2_MCLK_SEL 0x304
> > > #define SAI3_MCLK_SEL 0x308
> > > @@ -26,6 +29,12 @@
> > > #define SAI7_MCLK_SEL 0x314
> > > #define PDM_SEL 0x318
> > > #define SAI_PLL_GNRL_CTL 0x400
> > > +#define SAI_PLL_FDIVL_CTL0 0x404
> > > +#define SAI_PLL_FDIVL_CTL1 0x408
> > > +#define SAI_PLL_SSCG_CTL 0x40C
> > > +#define SAI_PLL_MNIT_CTL 0x410
> > > +#define IPG_LP_CTRL 0x504
> > > +#define REGS_NUM 16
> > >
> > > #define SAIn_MCLK1_PARENT(n) \
> > > static const struct clk_parent_data \
> > > @@ -182,13 +191,65 @@ static struct clk_imx8mp_audiomix_sel sels[] = {
> > > CLK_SAIn(7)
> > > };
> > >
> > > +struct clk_imx8mp_audiomix_regs {
> > > + u32 regs_num;
> > > + u32 regs_off[];
> > > +};
> > > +
> > > +static const struct clk_imx8mp_audiomix_regs audiomix_regs = {
> > > + .regs_num = REGS_NUM,
> > > + .regs_off = {
> > > + CLKEN0,
> > > + CLKEN1,
> > > + EARC,
> > > + SAI1_MCLK_SEL,
> > > + SAI2_MCLK_SEL,
> > > + SAI3_MCLK_SEL,
> > > + SAI5_MCLK_SEL,
> > > + SAI6_MCLK_SEL,
> > > + SAI7_MCLK_SEL,
> > > + PDM_SEL,
> > > + SAI_PLL_GNRL_CTL,
> > > + SAI_PLL_FDIVL_CTL0,
> > > + SAI_PLL_FDIVL_CTL1,
> > > + SAI_PLL_SSCG_CTL,
> > > + SAI_PLL_MNIT_CTL,
> > > + IPG_LP_CTRL
> > > + },
> > > +};
> > > +
> > > +struct clk_imx8mp_audiomix_drvdata {
> > > + void __iomem *base;
> > > + u32 regs_save[REGS_NUM];
> > > +};
> > > +
> > > +static void clk_imx8mp_audiomix_save_restore(struct device *dev, bool
> > > +save) {
> > > + struct clk_imx8mp_audiomix_drvdata *drvdata =
> > > dev_get_drvdata(dev);
> > > + void __iomem *base = drvdata->base;
> > > + int i;
> > > +
> > > + if (save) {
> > > + for (i = 0; i < audiomix_regs.regs_num; i++)
> > > + drvdata->regs_save[i] = readl(base +
> > > audiomix_regs.regs_off[i]);
> > > + } else {
> > > + for (i = 0; i < audiomix_regs.regs_num; i++)
> > > + writel(drvdata->regs_save[i], base +
> > > audiomix_regs.regs_off[i]);
> > > + }
> > > +}
> > > +
> > > static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) {
> > > + struct clk_imx8mp_audiomix_drvdata *drvdata;
> > > struct clk_hw_onecell_data *priv;
> > > struct device *dev = &pdev->dev;
> > > void __iomem *base;
> > > struct clk_hw *hw;
> > > - int i;
> > > + int i, ret;
> > > +
> > > + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
> > > + if (!drvdata)
> > > + return -ENOMEM;
> > >
> > > priv = devm_kzalloc(dev,
> > > struct_size(priv, hws,
> > > IMX8MP_CLK_AUDIOMIX_END), @@ -202,6 +263,9 @@ static int
> > > clk_imx8mp_audiomix_probe(struct platform_device *pdev)
> > > if (IS_ERR(base))
> > > return PTR_ERR(base);
> > >
> > > + drvdata->base = base;
> > > + dev_set_drvdata(dev, drvdata);
> > > +
> > > for (i = 0; i < ARRAY_SIZE(sels); i++) {
> > > if (sels[i].num_parents == 1) {
> > > hw = devm_clk_hw_register_gate_parent_data(dev,
> > > @@ -257,10 +321,38 @@ static int clk_imx8mp_audiomix_probe(struct
> > > platform_device *pdev)
> > > if (IS_ERR(hw))
> > > return PTR_ERR(hw);
> > >
> > > - return devm_of_clk_add_hw_provider(&pdev->dev,
> > > of_clk_hw_onecell_get,
> > > - priv);
> > > + ret = devm_of_clk_add_hw_provider(&pdev->dev,
> > > of_clk_hw_onecell_get,
> > > + priv);
> > > + if (ret)
> > > + return ret;
> > > +
> > > + pm_runtime_enable(&pdev->dev);
> > > + clk_imx8mp_audiomix_save_restore(&pdev->dev, true);
> > > +
> > > + return 0;
> > > }
> > >
> > > +static int clk_imx8mp_audiomix_runtime_suspend(struct device *dev) {
> > > + clk_imx8mp_audiomix_save_restore(dev, true);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int clk_imx8mp_audiomix_runtime_resume(struct device *dev) {
> > > + clk_imx8mp_audiomix_save_restore(dev, false);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static const struct dev_pm_ops clk_imx8mp_audiomix_pm_ops = {
> > > + SET_RUNTIME_PM_OPS(clk_imx8mp_audiomix_runtime_suspend,
> > > + clk_imx8mp_audiomix_runtime_resume, NULL)
> > > + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
> > > + pm_runtime_force_resume)
> > > +};
> > > +
> > > static const struct of_device_id clk_imx8mp_audiomix_of_match[] = {
> > > { .compatible = "fsl,imx8mp-audio-blk-ctrl" },
> > > { /* sentinel */ }
> > > @@ -272,6 +364,7 @@ static struct platform_driver
> > > clk_imx8mp_audiomix_driver = {
> > > .driver = {
> > > .name = "imx8mp-audio-blk-ctrl",
> > > .of_match_table = clk_imx8mp_audiomix_of_match,
> > > + .pm = &clk_imx8mp_audiomix_pm_ops,
> > > },
> > > };
> > >
> > > --
> > > 2.34.1
> >
> >
> >
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^ permalink raw reply
* Re: [PATCH v2 10/14] drm/mediatek: Rename files "mtk_drm_plane.h" to "mtk_plane.h"
From: CK Hu (胡俊光) @ 2024-03-20 1:59 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-11-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_plane.h to mtk_plane.h.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Reviewed-by: AngeloGiaocchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/mtk_crtc.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_crtc.h | 2 +-
> drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 +-
> drivers/gpu/drm/mediatek/{mtk_drm_plane.h => mtk_plane.h} | 0
> 6 files changed, 5 insertions(+), 5 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_plane.h => mtk_plane.h}
> (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_crtc.c
> index 7710e539e3da1..1ba47e65a32da 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
> @@ -23,7 +23,7 @@
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
> -#include "mtk_drm_plane.h"
> +#include "mtk_plane.h"
>
> /*
> * struct mtk_crtc - MediaTek specific crtc structure.
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_crtc.h
> index fd6c006f0c169..388e900b6f4de 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.h
> @@ -9,7 +9,7 @@
> #include <drm/drm_crtc.h>
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_plane.h"
> +#include "mtk_plane.h"
>
> #define MTK_MAX_BPC 10
> #define MTK_MIN_BPC 3
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index ab96b1001de3e..c3441508f452f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -18,7 +18,7 @@
> #include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_plane.h"
> +#include "mtk_plane.h"
>
>
> #define DISP_REG_DITHER_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 90e64467ea8f8..082ac18fe04aa 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -9,8 +9,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
> #include <linux/soc/mediatek/mtk-mmsys.h>
> #include <linux/soc/mediatek/mtk-mutex.h>
> -#include "mtk_drm_plane.h"
> #include "mtk_mdp_rdma.h"
> +#include "mtk_plane.h"
>
> int mtk_aal_clk_enable(struct device *dev);
> void mtk_aal_clk_disable(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index 63a7a24468c13..95a4328a9b0b6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -17,7 +17,7 @@
> #include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
> -#include "mtk_drm_plane.h"
> +#include "mtk_plane.h"
>
> static const u64 modifiers[] = {
> DRM_FORMAT_MOD_LINEAR,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.h
> b/drivers/gpu/drm/mediatek/mtk_plane.h
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_plane.h
> rename to drivers/gpu/drm/mediatek/mtk_plane.h
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^ permalink raw reply
* [PATCH 3/3] power: reset: add new gs101-poweroff driver
From: Alexey Klimov @ 2024-03-20 2:05 UTC (permalink / raw)
To: sre, robh, krzysztof.kozlowski+dt, linux-pm, devicetree,
peter.griffin, robh+dt
Cc: conor+dt, linux-samsung-soc, semen.protsenko, linux-kernel,
klimov.linux, kernel-team, tudor.ambarus, andre.draszik,
saravanak, willmcvicker, alexey.klimov, alim.akhtar,
linux-arm-kernel, elder
In-Reply-To: <20240320020549.71810-1-alexey.klimov@linaro.org>
The driver allows switching off the Google gs101 SoC (Pixel6 family of
mobile phones). The syscon-poweroff cannot be used since gs101 requires
smc-based regmap i.e. a write to PMU register done from EL3 is required.
Additionally the power off write should be performed when power button
is not pressed.
When USB charging cable is connected then this leads to a reboot of
a device initiated by bootloader/firmware.
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
drivers/power/reset/Kconfig | 7 ++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/gs101-poweroff.c | 157 +++++++++++++++++++++++++++
3 files changed, 165 insertions(+)
create mode 100644 drivers/power/reset/gs101-poweroff.c
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index fece990af4a7..e7323b3b4a61 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -100,6 +100,13 @@ config POWER_RESET_GPIO_RESTART
If your board needs a GPIO high/low to restart, say Y and
create a binding in your devicetree.
+config POWER_RESET_GS101_POWEROFF
+ tristate "GS101 power-off driver"
+ depends on ARCH_EXYNOS || COMPILE_TEST
+ help
+ This driver supports turning off the Google Tensor Pixel6 GS101 phones.
+ Select this if you're building a kernel with Google Tensor SoC support.
+
config POWER_RESET_HISI
bool "Hisilicon power-off driver"
depends on ARCH_HISI
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index a95d1bd275d1..7065b7e4ce77 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
obj-$(CONFIG_POWER_RESET_GEMINI_POWEROFF) += gemini-poweroff.o
obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
+obj-$(CONFIG_POWER_RESET_GS101_POWEROFF) += gs101-poweroff.o
obj-$(CONFIG_POWER_RESET_HISI) += hisi-reboot.o
obj-$(CONFIG_POWER_RESET_LINKSTATION) += linkstation-poweroff.o
obj-$(CONFIG_POWER_RESET_MSM) += msm-poweroff.o
diff --git a/drivers/power/reset/gs101-poweroff.c b/drivers/power/reset/gs101-poweroff.c
new file mode 100644
index 000000000000..2be903de16a1
--- /dev/null
+++ b/drivers/power/reset/gs101-poweroff.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * GS101 Poweroff Driver
+ *
+ * Copyright (c) 2024, Linaro Ltd.
+ * Author: Alexey Klimov <alexey.klimov@linaro.org>
+ */
+
+#include <linux/delay.h>
+#include <linux/devm-helpers.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/keyboard.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/soc/samsung/exynos-pmu.h>
+
+#define shwork_to_poweroff(x) \
+ container_of(x, struct gs101_poweroff, shutdown_work)
+
+#define keyboard_nb_to_poweroff(x) \
+ container_of(x, struct gs101_poweroff, keyboard_nb)
+
+struct gs101_poweroff {
+ struct notifier_block keyboard_nb;
+ bool power_key_pressed;
+ struct work_struct shutdown_work;
+ struct regmap *map;
+ u32 offset;
+ u32 mask;
+};
+
+static struct gs101_poweroff *gs101_poweroff_ctx;
+
+static void gs101_shutdown_work_fn(struct work_struct *work)
+{
+ struct gs101_poweroff *gs101 = shwork_to_poweroff(work);
+
+ while (1) {
+ /* wait for power button release */
+ if (!gs101->power_key_pressed) {
+ /* Issue the poweroff */
+ regmap_update_bits(gs101->map,
+ gs101->offset,
+ gs101->mask, 0);
+ } else {
+ /*
+ * if power button is not released,
+ * wait and check TA again
+ */
+ pr_info("power key is not released.\n");
+ }
+ mdelay(1000);
+ }
+}
+
+static int gs101_keyboard_notifier_call(struct notifier_block *nb,
+ unsigned long code, void *_param)
+{
+ struct keyboard_notifier_param *param = _param;
+
+ if (param->value == KEY_POWER) {
+ struct gs101_poweroff *gs101 = keyboard_nb_to_poweroff(nb);
+
+ gs101->power_key_pressed = param->down;
+ }
+
+ return NOTIFY_OK;
+}
+
+static void gs101_poweroff(void)
+{
+ schedule_work(&gs101_poweroff_ctx->shutdown_work);
+}
+
+static int gs101_poweroff_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct gs101_poweroff *gs101;
+ int ret;
+
+ gs101 = devm_kzalloc(dev, sizeof(*gs101), GFP_KERNEL);
+ if (!gs101)
+ return -ENOMEM;
+
+ gs101->map = exynos_get_pmu_regmap_by_phandle(dev->of_node,
+ "samsung,syscon-phandle");
+ if (IS_ERR(gs101->map))
+ return PTR_ERR(gs101->map);
+
+ if (of_property_read_u32(dev->of_node, "offset", &gs101->offset)) {
+ dev_err(dev, "unable to read 'offset' from DT\n");
+ return -EINVAL;
+ }
+
+ if (of_property_read_u32(dev->of_node, "mask", &gs101->mask)) {
+ dev_err(dev, "unable to read 'mask' from DT\n");
+ return -EINVAL;
+ }
+
+ gs101->keyboard_nb.notifier_call = gs101_keyboard_notifier_call;
+ ret = register_keyboard_notifier(&gs101->keyboard_nb);
+ if (ret) {
+ dev_err(dev, "failed to register keyboard notifier: %i\n", ret);
+ return ret;
+ }
+
+ ret = devm_work_autocancel(dev, &gs101->shutdown_work,
+ gs101_shutdown_work_fn);
+ if (ret) {
+ dev_err(dev, "failed to register gs101 shutdown_work: %i\n", ret);
+ unregister_keyboard_notifier(&gs101->keyboard_nb);
+ return ret;
+ }
+
+ gs101_poweroff_ctx = gs101;
+ platform_set_drvdata(pdev, gs101);
+
+ /*
+ * At this point there is a chance that psci_sys_poweroff already
+ * registered as pm_power_off hook but unfortunately it cannot power
+ * off the gs101 SoC hence we are rewriting it here just as is.
+ */
+ pm_power_off = gs101_poweroff;
+
+ return 0;
+}
+
+static void gs101_poweroff_remove(struct platform_device *pdev)
+{
+ struct gs101_poweroff *gs101 = platform_get_drvdata(pdev);
+
+ if (pm_power_off == gs101_poweroff)
+ pm_power_off = NULL;
+
+ unregister_keyboard_notifier(&gs101->keyboard_nb);
+}
+
+static const struct of_device_id gs101_poweroff_of_match[] = {
+ { .compatible = "google,gs101-poweroff" },
+ {}
+};
+
+static struct platform_driver gs101_poweroff_driver = {
+ .probe = gs101_poweroff_probe,
+ .remove_new = gs101_poweroff_remove,
+ .driver = {
+ .name = "gs101-poweroff",
+ .of_match_table = gs101_poweroff_of_match,
+ },
+};
+
+module_platform_driver(gs101_poweroff_driver);
+MODULE_AUTHOR("Alexey Klimov <alexey.klimov@linaro.org>");
+MODULE_DESCRIPTION("Google GS101 poweroff driver");
+MODULE_LICENSE("GPL v2");
--
2.43.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 1/3] dt-bindings: power: reset: add gs101 poweroff bindings
From: Alexey Klimov @ 2024-03-20 2:05 UTC (permalink / raw)
To: sre, robh, krzysztof.kozlowski+dt, linux-pm, devicetree,
peter.griffin, robh+dt
Cc: conor+dt, linux-samsung-soc, semen.protsenko, linux-kernel,
klimov.linux, kernel-team, tudor.ambarus, andre.draszik,
saravanak, willmcvicker, alexey.klimov, alim.akhtar,
linux-arm-kernel, elder
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
.../power/reset/google,gs101-poweroff.yaml | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/reset/google,gs101-poweroff.yaml
diff --git a/Documentation/devicetree/bindings/power/reset/google,gs101-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/google,gs101-poweroff.yaml
new file mode 100644
index 000000000000..d704bf28294a
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/google,gs101-poweroff.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/reset/google,gs101-poweroff.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Google GS101 poweroff driver
+
+maintainers:
+ - Alexey Klimov <alexey.klimov@linaro.org>
+
+description: |+
+ This is a Google Tensor gs101 poweroff driver using custom regmap
+ to map the poweroff register. The poweroff itself is performed with
+ a write to the poweroff register from a privileged mode. Since generic
+ syscon does not support this, the specific one is required.
+ The write to the poweroff register is defined by the register map pointed
+ by syscon reference plus the offset with the value and mask defined
+ in the poweroff node.
+ Default will be little endian mode, 32 bit access only.
+
+properties:
+ compatible:
+ const: google,gs101-poweroff
+
+ mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Update only the register bits defined by the mask (32 bit).
+
+ offset:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Offset in the register map for the poweroff register (in bytes).
+
+ samsung,syscon-phandle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the PMU system controller node.
+
+required:
+ - compatible
+ - offset
+ - mask
+ - samsung,syscon-phandle
+
+additionalProperties: false
+
+examples:
+ - |
+ poweroff {
+ compatible = "google,gs101-poweroff";
+ samsung,syscon-phandle = <&pmu_syscon>;
+ offset = <0x10>;
+ mask = <0x42>;
+ };
--
2.43.0
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^ permalink raw reply related
* [PATCH 2/3] arm64: dts: exynos: gs101: add poweroff node
From: Alexey Klimov @ 2024-03-20 2:05 UTC (permalink / raw)
To: sre, robh, krzysztof.kozlowski+dt, linux-pm, devicetree,
peter.griffin, robh+dt
Cc: conor+dt, linux-samsung-soc, semen.protsenko, linux-kernel,
klimov.linux, kernel-team, tudor.ambarus, andre.draszik,
saravanak, willmcvicker, alexey.klimov, alim.akhtar,
linux-arm-kernel, elder
In-Reply-To: <20240320020549.71810-1-alexey.klimov@linaro.org>
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 55e6bcb3689e..9def28393274 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -509,6 +509,13 @@ sysreg_apm: syscon@174204e0 {
pmu_system_controller: system-controller@17460000 {
compatible = "google,gs101-pmu", "syscon";
reg = <0x17460000 0x10000>;
+
+ poweroff {
+ compatible = "google,gs101-poweroff";
+ samsung,syscon-phandle = <&pmu_system_controller>;
+ offset = <0x3e9c>;
+ mask = <0x100>;
+ };
};
pinctrl_gpio_alive: pinctrl@174d0000 {
--
2.43.0
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^ permalink raw reply related
* Re: [PATCH v2 09/14] drm/mediatek: Rename files "mtk_drm_ddp_comp.c" to "mtk_ddp_comp.c"
From: CK Hu (胡俊光) @ 2024-03-20 1:55 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-10-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_ddp_comp.c to mtk_ddp_comp.c and
> modify the Makefile accordingly.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/Makefile | 2
> +-
> drivers/gpu/drm/mediatek/{mtk_drm_ddp_comp.c => mtk_ddp_comp.c} | 0
> 2 files changed, 1 insertion(+), 1 deletion(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_ddp_comp.c =>
> mtk_ddp_comp.c} (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index 0198b50820d4c..bdb71738e1f31 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> mediatek-drm-y := mtk_crtc.o \
> + mtk_ddp_comp.o \
> mtk_disp_aal.o \
> mtk_disp_ccorr.o \
> mtk_disp_color.o \
> @@ -9,7 +10,6 @@ mediatek-drm-y := mtk_crtc.o \
> mtk_disp_ovl.o \
> mtk_disp_ovl_adaptor.o \
> mtk_disp_rdma.o \
> - mtk_drm_ddp_comp.o \
> mtk_drm_drv.o \
> mtk_drm_gem.o \
> mtk_drm_plane.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> rename to drivers/gpu/drm/mediatek/mtk_ddp_comp.c
_______________________________________________
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^ permalink raw reply
* Re: [PATCH v2 08/14] drm/mediatek: Rename files "mtk_drm_ddp_comp.h" to "mtk_ddp_comp.h"
From: CK Hu (胡俊光) @ 2024-03-20 1:42 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-9-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_ddp_comp.h to mtk_ddp_comp.h.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Reviewed-by: AngeloGiaocchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/mtk_crtc.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_crtc.h | 2
> +-
> drivers/gpu/drm/mediatek/{mtk_drm_ddp_comp.h => mtk_ddp_comp.h} | 0
> drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_color.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_dpi.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2
> +-
> drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_dsi.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 2
> +-
> drivers/gpu/drm/mediatek/mtk_padding.c | 2
> +-
> 19 files changed, 18 insertions(+), 18 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_ddp_comp.h =>
> mtk_ddp_comp.h} (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_crtc.c
> index 631c1ef2847ef..7710e539e3da1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
> @@ -20,8 +20,8 @@
> #include <drm/drm_vblank.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_gem.h"
> #include "mtk_drm_plane.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_crtc.h
> index 2d9f28f436aea..fd6c006f0c169 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.h
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.h
> @@ -7,7 +7,7 @@
> #define MTK_CRTC_H
>
> #include <drm/drm_crtc.h>
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_plane.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> rename to drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> index ba926e797af8a..92acdaddd648d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> @@ -12,8 +12,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_AAL_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> index 79bcd3c487563..975ee45a0f72c 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -11,8 +11,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_CCORR_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c
> b/drivers/gpu/drm/mediatek/mtk_disp_color.c
> index 4aa41b1ff2602..91e7837a32c86 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_color.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_color.c
> @@ -11,8 +11,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_COLOR_CFG_MAIN 0x0400
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index 1a1ee77127ee9..51ae4f947c714 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -12,8 +12,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_GAMMA_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> index 32a29924bd54c..3b1e04ecb9d45 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
> @@ -10,7 +10,7 @@
> #include <linux/reset.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_disp_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 7f2219c0119be..0ebeaf9830d83 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -16,8 +16,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_REG_OVL_INTEN 0x0004
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> index 542dc2a20ea90..d957f5c8ccf92 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> @@ -18,8 +18,8 @@
> #include <linux/soc/mediatek/mtk-mutex.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_ethdr.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index 04f584372214f..f06b048c12479 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -14,8 +14,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DISP_REG_RDMA_INT_ENABLE 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index beb7d9d08e971..fbf63e0441337 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -26,9 +26,9 @@
> #include <drm/drm_of.h>
> #include <drm/drm_simple_kms_helper.h>
>
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> #include "mtk_dpi_regs.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> enum mtk_dpi_out_bit_num {
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 24389c6c3561f..ab96b1001de3e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -15,10 +15,10 @@
> #include <drm/drm_print.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_plane.h"
> -#include "mtk_drm_ddp_comp.h"
>
>
> #define DISP_REG_DITHER_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 7be3b0546d3df..113fdbaac5a14 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -25,7 +25,7 @@
> #include <drm/drm_vblank.h>
>
> #include "mtk_crtc.h"
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> index 24c4d59085bd6..78d698ede1bf8 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> @@ -7,7 +7,7 @@
> #define MTK_DRM_DRV_H
>
> #include <linux/io.h>
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
>
> #define MAX_CONNECTOR 2
> #define DDP_COMPONENT_DRM_OVL_ADAPTOR (DDP_COMPONENT_ID_MAX + 1)
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index 720f6b4b08215..63a7a24468c13 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -14,7 +14,7 @@
> #include <linux/align.h>
>
> #include "mtk_crtc.h"
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
> #include "mtk_drm_plane.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index ec9d96396d7b2..e29c37fb5be09 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -28,8 +28,8 @@
> #include <drm/drm_probe_helper.h>
> #include <drm/drm_simple_kms_helper.h>
>
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> #define DSI_START 0x00
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index 41efaafe26f1a..9b0264bd5e731 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -15,7 +15,7 @@
> #include <linux/soc/mediatek/mtk-mmsys.h>
>
> #include "mtk_crtc.h"
> -#include "mtk_drm_ddp_comp.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_ethdr.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_padding.c
> b/drivers/gpu/drm/mediatek/mtk_padding.c
> index ff6a5c695128c..1f91805cd9aac 100644
> --- a/drivers/gpu/drm/mediatek/mtk_padding.c
> +++ b/drivers/gpu/drm/mediatek/mtk_padding.c
> @@ -12,8 +12,8 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #include "mtk_crtc.h"
> +#include "mtk_ddp_comp.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_ddp_comp.h"
>
> #define PADDING_CONTROL_REG 0x00
> #define PADDING_BYPASS BIT(0)
_______________________________________________
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^ permalink raw reply
* Re: [PATCH v2 07/14] drm/mediatek: Rename files "mtk_drm_crtc.c" to "mtk_crtc.c"
From: CK Hu (胡俊光) @ 2024-03-20 1:38 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-8-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_crtc.c to mtk_crtc.c and
> modify the Makefile accordingly.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/Makefile | 4 ++--
> drivers/gpu/drm/mediatek/{mtk_drm_crtc.c => mtk_crtc.c} | 0
> 2 files changed, 2 insertions(+), 2 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_crtc.c => mtk_crtc.c}
> (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile
> b/drivers/gpu/drm/mediatek/Makefile
> index 5e4436403b8d2..0198b50820d4c 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -1,6 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0
>
> -mediatek-drm-y := mtk_disp_aal.o \
> +mediatek-drm-y := mtk_crtc.o \
> + mtk_disp_aal.o \
> mtk_disp_ccorr.o \
> mtk_disp_color.o \
> mtk_disp_gamma.o \
> @@ -8,7 +9,6 @@ mediatek-drm-y := mtk_disp_aal.o \
> mtk_disp_ovl.o \
> mtk_disp_ovl_adaptor.o \
> mtk_disp_rdma.o \
> - mtk_drm_crtc.o \
> mtk_drm_ddp_comp.o \
> mtk_drm_drv.o \
> mtk_drm_gem.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_crtc.c
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> rename to drivers/gpu/drm/mediatek/mtk_crtc.c
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 06/14] drm/mediatek: Rename files "mtk_drm_crtc.h" to "mtk_crtc.h"
From: CK Hu (胡俊光) @ 2024-03-20 1:34 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <20240319070257.6443-7-shawn.sung@mediatek.com>
Hi, Shawn:
On Tue, 2024-03-19 at 15:02 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com>
>
> Rename files mtk_drm_crtc.h to mtk_crtc.h.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Reviewed-by: AngeloGiaocchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> Signed-off-by: Hsiao Chien Sung <
> shawn.sung@mediatek.corp-partner.google.com>
> ---
> drivers/gpu/drm/mediatek/{mtk_drm_crtc.h => mtk_crtc.h} | 0
> drivers/gpu/drm/mediatek/mtk_disp_aal.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_color.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_padding.c | 2 +-
> 14 files changed, 13 insertions(+), 13 deletions(-)
> rename drivers/gpu/drm/mediatek/{mtk_drm_crtc.h => mtk_crtc.h}
> (100%)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> b/drivers/gpu/drm/mediatek/mtk_crtc.h
> similarity index 100%
> rename from drivers/gpu/drm/mediatek/mtk_drm_crtc.h
> rename to drivers/gpu/drm/mediatek/mtk_crtc.h
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> index 40fe403086c3d..ba926e797af8a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
> @@ -11,8 +11,8 @@
> #include <linux/platform_device.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> index 465cddce0d324..79bcd3c487563 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
> @@ -10,8 +10,8 @@
> #include <linux/platform_device.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_color.c
> b/drivers/gpu/drm/mediatek/mtk_disp_color.c
> index 78ea99f1444fa..4aa41b1ff2602 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_color.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_color.c
> @@ -10,8 +10,8 @@
> #include <linux/platform_device.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> index c1bc8b00d9380..1a1ee77127ee9 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
> @@ -11,8 +11,8 @@
> #include <linux/platform_device.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 2bffe42454666..7f2219c0119be 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -15,8 +15,8 @@
> #include <linux/pm_runtime.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> index 034d31824d4dc..542dc2a20ea90 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> @@ -17,8 +17,8 @@
> #include <linux/soc/mediatek/mtk-mmsys.h>
> #include <linux/soc/mediatek/mtk-mutex.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_ethdr.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> index faa907f2f443e..04f584372214f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c
> @@ -13,8 +13,8 @@
> #include <linux/pm_runtime.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> index 16a6fc0bbdc9e..631c1ef2847ef 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c
> @@ -19,8 +19,8 @@
> #include <drm/drm_probe_helper.h>
> #include <drm/drm_vblank.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_drm_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_gem.h"
> #include "mtk_drm_plane.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index a515e96cfefcb..24389c6c3561f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -14,11 +14,11 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
> #include <drm/drm_print.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_plane.h"
> #include "mtk_drm_ddp_comp.h"
> -#include "mtk_drm_crtc.h"
>
>
> #define DISP_REG_DITHER_EN 0x0000
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 81e8aa65abd6d..7be3b0546d3df 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -24,7 +24,7 @@
> #include <drm/drm_probe_helper.h>
> #include <drm/drm_vblank.h>
>
> -#include "mtk_drm_crtc.h"
> +#include "mtk_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> index db63a32c407e3..720f6b4b08215 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c
> @@ -13,7 +13,7 @@
> #include <drm/drm_gem_atomic_helper.h>
> #include <linux/align.h>
>
> -#include "mtk_drm_crtc.h"
> +#include "mtk_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_drm_gem.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index 6a5d0c345aab9..41efaafe26f1a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -14,7 +14,7 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
> #include <linux/soc/mediatek/mtk-mmsys.h>
>
> -#include "mtk_drm_crtc.h"
> +#include "mtk_crtc.h"
> #include "mtk_drm_ddp_comp.h"
> #include "mtk_drm_drv.h"
> #include "mtk_ethdr.h"
> diff --git a/drivers/gpu/drm/mediatek/mtk_padding.c
> b/drivers/gpu/drm/mediatek/mtk_padding.c
> index 0d6451c149b67..ff6a5c695128c 100644
> --- a/drivers/gpu/drm/mediatek/mtk_padding.c
> +++ b/drivers/gpu/drm/mediatek/mtk_padding.c
> @@ -11,8 +11,8 @@
> #include <linux/pm_runtime.h>
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> +#include "mtk_crtc.h"
> #include "mtk_disp_drv.h"
> -#include "mtk_drm_crtc.h"
> #include "mtk_drm_ddp_comp.h"
>
> #define PADDING_CONTROL_REG 0x00
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* RE: [PATCH v2 5/8] drm: xlnx: zynqmp_dpsub: Set input live format
From: Klymenko, Anatoliy @ 2024-03-20 1:25 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Daniel Vetter, Simek, Michal, Andrzej Hajda, Neil Armstrong,
Robert Foss, Jonas Karlman, Jernej Skrabec, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Mauro Carvalho Chehab,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-media@vger.kernel.org
In-Reply-To: <20240319003523.GW13682@pendragon.ideasonboard.com>
Hi Laurent,
Thanks a lot for your review.
> -----Original Message-----
> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Sent: Monday, March 18, 2024 5:35 PM
> To: Klymenko, Anatoliy <Anatoliy.Klymenko@amd.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard
> <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David
> Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; Simek, Michal
> <michal.simek@amd.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil
> Armstrong <neil.armstrong@linaro.org>; Robert Foss <rfoss@kernel.org>; Jonas
> Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Mauro Carvalho Chehab <mchehab@kernel.org>; dri-
> devel@lists.freedesktop.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-
> media@vger.kernel.org
> Subject: Re: [PATCH v2 5/8] drm: xlnx: zynqmp_dpsub: Set input live format
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Anatoliy,
>
> Thank you for the patch.
>
> On Tue, Mar 12, 2024 at 05:55:02PM -0700, Anatoliy Klymenko wrote:
> > Program live video input format according to selected media bus format.
> >
> > In the bridge mode of operation, DPSUB is connected to FPGA CRTC which
> > almost certainly supports a single media bus format as its output.
> > Expect this to be delivered via the new bridge atomic state. Program
> > DPSUB registers accordingly.
>
> No line breaks within paragraphs. Add a blank line if you want to paragraphs,
> remove the line break otherwise.
>
Got it - will fix. Thank you.
> > Update zynqmp_disp_layer_set_format() API to fit both live and
> > non-live layer types.
> >
> > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com>
> > ---
> > drivers/gpu/drm/xlnx/zynqmp_disp.c | 93
> > +++++++++++++++++++++++++++++++-------
> > drivers/gpu/drm/xlnx/zynqmp_disp.h | 2 +-
> > drivers/gpu/drm/xlnx/zynqmp_dp.c | 13 ++++--
> > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +-
> > 4 files changed, 87 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > index dd48fa60fa9a..0cacd597f4b8 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > @@ -383,7 +383,7 @@ static const struct zynqmp_disp_format
> avbuf_live_fmts[] = {
> > ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB,
> > .sf = scaling_factors_666,
> > }, {
> > - .bus_fmt = MEDIA_BUS_FMT_UYVY8_1X24,
> > + .bus_fmt = MEDIA_BUS_FMT_RBG888_1X24,
>
> Does this belong to a previous patch ?
Yep, slipped between my fingers during the rebase. I will update this in the next version.
>
> > .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_8 |
> > ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB,
> > .sf = scaling_factors_888,
> > @@ -433,19 +433,28 @@ static void zynqmp_disp_avbuf_set_format(struct
> zynqmp_disp *disp,
> > const struct zynqmp_disp_format
> > *fmt) {
> > unsigned int i;
> > - u32 val;
> > + u32 val, reg;
> >
> > - val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_FMT);
> > - val &= zynqmp_disp_layer_is_video(layer)
> > - ? ~ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MASK
> > - : ~ZYNQMP_DISP_AV_BUF_FMT_NL_GFX_MASK;
> > - val |= fmt->buf_fmt;
> > - zynqmp_disp_avbuf_write(disp, ZYNQMP_DISP_AV_BUF_FMT, val);
> > + layer->disp_fmt = fmt;
> > + if (layer->mode == ZYNQMP_DPSUB_LAYER_NONLIVE) {
> > + reg = ZYNQMP_DISP_AV_BUF_FMT;
> > + val = zynqmp_disp_avbuf_read(disp, ZYNQMP_DISP_AV_BUF_FMT);
> > + val &= zynqmp_disp_layer_is_video(layer)
> > + ? ~ZYNQMP_DISP_AV_BUF_FMT_NL_VID_MASK
> > + : ~ZYNQMP_DISP_AV_BUF_FMT_NL_GFX_MASK;
> > + val |= fmt->buf_fmt;
> > + } else {
> > + reg = zynqmp_disp_layer_is_video(layer)
> > + ? ZYNQMP_DISP_AV_BUF_LIVE_VID_CONFIG
> > + : ZYNQMP_DISP_AV_BUF_LIVE_GFX_CONFIG;
> > + val = fmt->buf_fmt;
> > + }
> > + zynqmp_disp_avbuf_write(disp, reg, val);
> >
> > for (i = 0; i < ZYNQMP_DISP_AV_BUF_NUM_SF; i++) {
> > - unsigned int reg = zynqmp_disp_layer_is_video(layer)
> > - ? ZYNQMP_DISP_AV_BUF_VID_COMP_SF(i)
> > - : ZYNQMP_DISP_AV_BUF_GFX_COMP_SF(i);
> > + reg = zynqmp_disp_layer_is_video(layer)
> > + ? ZYNQMP_DISP_AV_BUF_VID_COMP_SF(i)
> > + : ZYNQMP_DISP_AV_BUF_GFX_COMP_SF(i);
> >
> > zynqmp_disp_avbuf_write(disp, reg, fmt->sf[i]);
> > }
> > @@ -984,23 +993,73 @@ void zynqmp_disp_layer_disable(struct
> zynqmp_disp_layer *layer)
> > zynqmp_disp_blend_layer_disable(layer->disp, layer); }
> >
> > +struct zynqmp_disp_bus_to_drm {
> > + u32 bus_fmt;
> > + u32 drm_fmt;
> > +};
> > +
> > +/**
> > + * zynqmp_disp_reference_drm_format - Get reference DRM format
> > +corresponding
> > + * to the given media bus format.
> > + * @bus_format: Media bus format
> > + *
> > + * Map media bus format to some DRM format that represents the same
> > +color space
> > + * and chroma subsampling as the @bus_format video signal. These DRM
> > +format
> > + * properties are required to program the blender.
> > + *
> > + * Return: DRM format code corresponding to @bus_format */ static
> > +u32 zynqmp_disp_reference_drm_format(u32 bus_format) {
> > + static const struct zynqmp_disp_bus_to_drm format_map[] = {
> > + {
> > + .bus_fmt = MEDIA_BUS_FMT_RGB666_1X18,
> > + .drm_fmt = DRM_FORMAT_RGB565,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_RBG888_1X24,
> > + .drm_fmt = DRM_FORMAT_RGB888,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_UYVY8_1X16,
> > + .drm_fmt = DRM_FORMAT_YUV422,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_VUY8_1X24,
> > + .drm_fmt = DRM_FORMAT_YUV444,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_UYVY10_1X20,
> > + .drm_fmt = DRM_FORMAT_P210,
> > + },
>
> Hmmmm... Looking at this, I think you should have both bus_fmt and drm_fmt in
> zynqmp_disp_format. It seems it would simplify the code flow and make things
> more readable. If you would like me to give it a try, please let me know.
>
I was trying to preserve symmetry in struct zynqmp_disp_format, having only relevant information there for both layer modes, but this ended up in this ugly lookup. Probably the proper fix would be adding blender register values to this struct, but that would be a rather big change. So, I think your proposal is a good compromise. This will require a few layer.mode checks though. Thank you.
> > + };
> > + unsigned int i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(format_map); ++i)
> > + if (format_map[i].bus_fmt == bus_format)
> > + return format_map[i].drm_fmt;
> > +
> > + return DRM_FORMAT_INVALID;
> > +}
> > +
> > /**
> > * zynqmp_disp_layer_set_format - Set the layer format
> > * @layer: The layer
> > - * @info: The format info
> > + * @drm_or_bus_format: DRM or media bus format
> > *
> > * Set the format for @layer to @info. The layer must be disabled.
> > */
> > void zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer,
> > - const struct drm_format_info *info)
> > + u32 drm_or_bus_format)
> > {
> > unsigned int i;
> >
> > - layer->disp_fmt = zynqmp_disp_layer_find_format(layer, info->format);
> > - layer->drm_fmt = info;
> > -
> > + layer->disp_fmt = zynqmp_disp_layer_find_format(layer,
> > + drm_or_bus_format);
> > zynqmp_disp_avbuf_set_format(layer->disp, layer,
> > layer->disp_fmt);
> >
> > + if (layer->mode == ZYNQMP_DPSUB_LAYER_LIVE)
> > + drm_or_bus_format =
> > + zynqmp_disp_reference_drm_format(drm_or_bus_format);
> > +
> > + layer->drm_fmt = drm_format_info(drm_or_bus_format);
> > + if (!layer->drm_fmt)
> > + return;
> > +
> > if (layer->mode == ZYNQMP_DPSUB_LAYER_LIVE)
> > return;
> >
> > @@ -1008,7 +1067,7 @@ void zynqmp_disp_layer_set_format(struct
> zynqmp_disp_layer *layer,
> > * Set pconfig for each DMA channel to indicate they're part of a
> > * video group.
> > */
> > - for (i = 0; i < info->num_planes; i++) {
> > + for (i = 0; i < layer->drm_fmt->num_planes; i++) {
> > struct zynqmp_disp_layer_dma *dma = &layer->dmas[i];
> > struct xilinx_dpdma_peripheral_config pconfig = {
> > .video_group = true, diff --git
> > a/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > b/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > index 88c285a12e23..9f9a5f50ffbc 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > @@ -55,7 +55,7 @@ u32 *zynqmp_disp_layer_formats(struct
> > zynqmp_disp_layer *layer, void zynqmp_disp_layer_enable(struct
> > zynqmp_disp_layer *layer); void zynqmp_disp_layer_disable(struct
> > zynqmp_disp_layer *layer); void zynqmp_disp_layer_set_format(struct
> zynqmp_disp_layer *layer,
> > - const struct drm_format_info *info);
> > + u32 drm_or_bus_format);
> > int zynqmp_disp_layer_update(struct zynqmp_disp_layer *layer,
> > struct drm_plane_state *state);
> >
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > b/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > index a0d169ac48c0..fc6b1d783c28 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > @@ -1281,7 +1281,8 @@ static void zynqmp_dp_disp_enable(struct
> > zynqmp_dp *dp, {
> > enum zynqmp_dpsub_layer_id layer_id;
> > struct zynqmp_disp_layer *layer;
> > - const struct drm_format_info *info;
> > + struct drm_bridge_state *bridge_state;
> > + u32 bus_fmt;
> >
> > if (dp->dpsub->connected_ports &
> BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO))
> > layer_id = ZYNQMP_DPSUB_LAYER_VID; @@ -1291,10 +1292,14
> > @@ static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp,
> > return;
> >
> > layer = dp->dpsub->layers[layer_id];
> > + bridge_state = drm_atomic_get_new_bridge_state(old_bridge_state-
> >base.state,
> > + old_bridge_state->bridge);
> > + if (WARN_ON(!bridge_state))
> > + return;
> > +
> > + bus_fmt = bridge_state->input_bus_cfg.format;
> > + zynqmp_disp_layer_set_format(layer, bus_fmt);
> >
> > - /* TODO: Make the format configurable. */
> > - info = drm_format_info(DRM_FORMAT_YUV422);
> > - zynqmp_disp_layer_set_format(layer, info);
> > zynqmp_disp_layer_enable(layer);
> >
> > if (layer_id == ZYNQMP_DPSUB_LAYER_GFX) diff --git
> > a/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > b/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > index bf9fba01df0e..d96b3f3f2e3a 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > @@ -111,7 +111,7 @@ static void zynqmp_dpsub_plane_atomic_update(struct
> drm_plane *plane,
> > if (old_state->fb)
> > zynqmp_disp_layer_disable(layer);
> >
> > - zynqmp_disp_layer_set_format(layer, new_state->fb->format);
> > + zynqmp_disp_layer_set_format(layer,
> > + new_state->fb->format->format);
> > }
> >
> > zynqmp_disp_layer_update(layer, new_state);
> >
>
> --
> Regards,
>
> Laurent Pinchart
Thank you,
Anatoliy
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^ permalink raw reply
* Re: [PATCH v2 02/14] drm/mediatek: Rename "mtk_drm_ddp_comp" to "mtk_ddp_comp"
From: Shawn Sung (宋孝謙) @ 2024-03-20 1:18 UTC (permalink / raw)
To: angelogioacchino.delregno@collabora.com, chunkuang.hu@kernel.org
Cc: sumit.semwal@linaro.org, linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
christian.koenig@amd.com, linux-media@vger.kernel.org,
daniel@ffwll.ch, p.zabel@pengutronix.de,
dri-devel@lists.freedesktop.org,
shawn.sung@mediatek.corp-partner.google.com, airlied@gmail.com,
linux-arm-kernel@lists.infradead.org, matthias.bgg@gmail.com
In-Reply-To: <4c2ffd1c-d059-4448-9b2d-142ea87d6bd8@collabora.com>
Hi Angelo,
On Tue, 2024-03-19 at 12:11 +0100, AngeloGioacchino Del Regno wrote:
> Il 19/03/24 08:02, Shawn Sung ha scritto:
> > From: Hsiao Chien Sung <shawn.sung@mediatek.corp-partner.google.com
> > >
> >
> > Rename all "mtk_drm_ddp_comp" to "mtk_ddp_comp":
> > - To align the naming rule
> > - To reduce the code size
> >
> > Reviewed-by: AngeloGiaocchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
>
> Shawn, I don't know if I typoed my own name (which is actually
> possible, since
> I write the tags by hand), or what actually happened to my Reviewed-
> by tags on
> the entire series.
>
> Can you please fix the typo in the tag?
>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
>
> Use this one, please.
>
Thank you for the reminder. Didn't notice that either.
Sinces I always use b4 tool to download the patches to prevent human
error, this could be a typo. No problem, I will fix it in the next
version.
Thanks and regards,
Shawn
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^ permalink raw reply
* RE: [PATCH v2 4/8] drm: xlnx: zynqmp_dpsub: Minimize usage of global flag
From: Klymenko, Anatoliy @ 2024-03-20 1:12 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Daniel Vetter, Simek, Michal, Andrzej Hajda, Neil Armstrong,
Robert Foss, Jonas Karlman, Jernej Skrabec, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Mauro Carvalho Chehab,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-media@vger.kernel.org
In-Reply-To: <20240319001255.GV13682@pendragon.ideasonboard.com>
Hi Laurent,
Thank you for the review.
> -----Original Message-----
> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Sent: Monday, March 18, 2024 5:13 PM
> To: Klymenko, Anatoliy <Anatoliy.Klymenko@amd.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard
> <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David
> Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; Simek, Michal
> <michal.simek@amd.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil
> Armstrong <neil.armstrong@linaro.org>; Robert Foss <rfoss@kernel.org>; Jonas
> Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Mauro Carvalho Chehab <mchehab@kernel.org>; dri-
> devel@lists.freedesktop.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-
> media@vger.kernel.org
> Subject: Re: [PATCH v2 4/8] drm: xlnx: zynqmp_dpsub: Minimize usage of global
> flag
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Anatoliy,
>
> Thank you for the patch.
>
> On Tue, Mar 12, 2024 at 05:55:01PM -0700, Anatoliy Klymenko wrote:
> > Avoid usage of global zynqmp_dpsub.dma_enabled flag in DPSUB layer
> > context. This flag signals whether the driver runs in DRM CRTC or DRM
> > bridge mode, assuming that all display layers share the same live or
> > non-live mode of operation. Using per-layer mode instead of global
> > flag will siplify future support of the hybrid scenario.
>
> s/siplify/simplify/
>
> > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com>
> > ---
> > drivers/gpu/drm/xlnx/zynqmp_disp.c | 11 ++++-------
> > 1 file changed, 4 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > index af851190f447..dd48fa60fa9a 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > @@ -975,7 +975,7 @@ void zynqmp_disp_layer_disable(struct
> > zynqmp_disp_layer *layer) {
> > unsigned int i;
> >
> > - if (layer->disp->dpsub->dma_enabled) {
> > + if (layer->mode == ZYNQMP_DPSUB_LAYER_NONLIVE) {
> > for (i = 0; i < layer->drm_fmt->num_planes; i++)
> > dmaengine_terminate_sync(layer->dmas[i].chan);
> > }
> > @@ -1001,7 +1001,7 @@ void zynqmp_disp_layer_set_format(struct
> > zynqmp_disp_layer *layer,
> >
> > zynqmp_disp_avbuf_set_format(layer->disp, layer,
> > layer->disp_fmt);
> >
> > - if (!layer->disp->dpsub->dma_enabled)
> > + if (layer->mode == ZYNQMP_DPSUB_LAYER_LIVE)
> > return;
> >
> > /*
> > @@ -1039,7 +1039,7 @@ int zynqmp_disp_layer_update(struct
> zynqmp_disp_layer *layer,
> > const struct drm_format_info *info = layer->drm_fmt;
> > unsigned int i;
> >
> > - if (!layer->disp->dpsub->dma_enabled)
> > + if (layer->mode == ZYNQMP_DPSUB_LAYER_LIVE)
> > return 0;
>
> The above changes look nice.
>
> >
> > for (i = 0; i < info->num_planes; i++) { @@ -1089,7 +1089,7 @@
> > static void zynqmp_disp_layer_release_dma(struct zynqmp_disp *disp, {
> > unsigned int i;
> >
> > - if (!layer->info || !disp->dpsub->dma_enabled)
> > + if (!layer->info)
>
> This, however, doesn't seem right, as this function is called unconditionally from
> the remove path. The change below seems weird too.
> If I'm missing something, it should at least be explained in the commit message.
>
Actually, this whole condition should be removed, as now we're setting layer.info for all types of layers. On top of that, we're setting the number of DMA channels to zero for the live layers, which in turn prevents any DMA channel initialization or release. You are right - that probably should be mentioned explicitly in the commit message. I'll update it.
> > return;
> >
> > for (i = 0; i < layer->info->num_channels; i++) { @@ -1132,9
> > +1132,6 @@ static int zynqmp_disp_layer_request_dma(struct zynqmp_disp
> *disp,
> > unsigned int i;
> > int ret;
> >
> > - if (!disp->dpsub->dma_enabled)
> > - return 0;
> > -
> > for (i = 0; i < layer->info->num_channels; i++) {
> > struct zynqmp_disp_layer_dma *dma = &layer->dmas[i];
> > char dma_channel_name[16];
> >
>
> --
> Regards,
>
> Laurent Pinchart
Thank you,
Anatoliy
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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply
* Re: [PATCH] random: Fix the issue of '_might_sleep' function running in an atomic contex
From: Jason A. Donenfeld @ 2024-03-20 1:09 UTC (permalink / raw)
To: Guoyong Wang
Cc: Theodore Ts'o, Tejun Heo, Lai Jiangshan, Matthias Brugger,
AngeloGioacchino Del Regno, linux-kernel, linux-arm-kernel,
linux-mediatek, wsd_upstream
In-Reply-To: <20240319093055.3252-1-guoyong.wang@mediatek.com>
On Tue, Mar 19, 2024 at 05:30:55PM +0800, Guoyong Wang wrote:
> On Mon, 18 Mar 2024 21:00:42 +0100, Jason A. Donenfeld wrote:
> > I'm wondering, though, rather than introducing a second function, maybe
> > execute_in_process_context() should just gain a `&& !in_atomic()`.
> > That'd make things a bit simpler.
>
> > However, I'm pretty sure in_atomic() isn't actually a reliable way of
> > determining that, depending on config. So maybe this should just call
> > the worker always (if system_wq isn't null).
>
> > Alternatively, any chance the call to add_input_randomness() could be
> > moved outside the spinlock, or does this not look possible?
>
> Hi Jason,
>
> Thanks for your suggestions.
>
> I am inclined to accept your second suggestion. My reluctance to accept
> the first is due to the concern that "&& !in_atomic()" could potentially
> alter the original meaning of the 'execute_in_process_context' interface.
> Regarding the third suggestion, modifying the logic associated with 'input'
> is not recommended.
Doesn't something like the below seem simplest? Just move the call out
of the spinlock and we're done.
diff --git a/drivers/input/input-core-private.h b/drivers/input/input-core-private.h
index 116834cf8868..717f239e28d0 100644
--- a/drivers/input/input-core-private.h
+++ b/drivers/input/input-core-private.h
@@ -10,7 +10,7 @@
struct input_dev;
void input_mt_release_slots(struct input_dev *dev);
-void input_handle_event(struct input_dev *dev,
+bool input_handle_event(struct input_dev *dev,
unsigned int type, unsigned int code, int value);
#endif /* _INPUT_CORE_PRIVATE_H */
diff --git a/drivers/input/input.c b/drivers/input/input.c
index f71ea4fb173f..2faf46218c66 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -391,20 +391,22 @@ static void input_event_dispose(struct input_dev *dev, int disposition,
}
}
-void input_handle_event(struct input_dev *dev,
+bool input_handle_event(struct input_dev *dev,
unsigned int type, unsigned int code, int value)
{
int disposition;
+ bool should_contribute_to_rng = false;
lockdep_assert_held(&dev->event_lock);
disposition = input_get_disposition(dev, type, code, &value);
if (disposition != INPUT_IGNORE_EVENT) {
if (type != EV_SYN)
- add_input_randomness(type, code, value);
+ should_contribute_to_rng = true;
input_event_dispose(dev, disposition, type, code, value);
}
+ return should_contribute_to_rng;
}
/**
@@ -428,12 +430,15 @@ void input_event(struct input_dev *dev,
unsigned int type, unsigned int code, int value)
{
unsigned long flags;
+ bool should_contribute_to_rng;
if (is_event_supported(type, dev->evbit, EV_MAX)) {
spin_lock_irqsave(&dev->event_lock, flags);
- input_handle_event(dev, type, code, value);
+ should_contribute_to_rng = input_handle_event(dev, type, code, value);
spin_unlock_irqrestore(&dev->event_lock, flags);
+ if (should_contribute_to_rng)
+ add_input_randomness(type, code, value);
}
}
EXPORT_SYMBOL(input_event);
_______________________________________________
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^ permalink raw reply related
* RE: [PATCH v2 3/8] drm: xlnx: zynqmp_dpsub: Anounce supported input formats
From: Klymenko, Anatoliy @ 2024-03-20 0:57 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Daniel Vetter, Simek, Michal, Andrzej Hajda, Neil Armstrong,
Robert Foss, Jonas Karlman, Jernej Skrabec, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Mauro Carvalho Chehab,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-media@vger.kernel.org
In-Reply-To: <20240319000500.GU13682@pendragon.ideasonboard.com>
Hi Laurent,
Thanks a lot for the review.
> -----Original Message-----
> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Sent: Monday, March 18, 2024 5:05 PM
> To: Klymenko, Anatoliy <Anatoliy.Klymenko@amd.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; Maxime Ripard
> <mripard@kernel.org>; Thomas Zimmermann <tzimmermann@suse.de>; David
> Airlie <airlied@gmail.com>; Daniel Vetter <daniel@ffwll.ch>; Simek, Michal
> <michal.simek@amd.com>; Andrzej Hajda <andrzej.hajda@intel.com>; Neil
> Armstrong <neil.armstrong@linaro.org>; Robert Foss <rfoss@kernel.org>; Jonas
> Karlman <jonas@kwiboo.se>; Jernej Skrabec <jernej.skrabec@gmail.com>; Rob
> Herring <robh+dt@kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Mauro Carvalho Chehab <mchehab@kernel.org>; dri-
> devel@lists.freedesktop.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-
> media@vger.kernel.org
> Subject: Re: [PATCH v2 3/8] drm: xlnx: zynqmp_dpsub: Anounce supported input
> formats
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Anatoliy,
>
> Thank you for the patch.
>
> On Tue, Mar 12, 2024 at 05:55:00PM -0700, Anatoliy Klymenko wrote:
> > DPSUB in bridge mode supports multiple input media bus formats.
> >
> > Announce the list of supported input media bus formats via
> > drm_bridge.atomic_get_input_bus_fmts callback.
> > Introduce a set of live input formats, supported by DPSUB.
> > Rename zynqmp_disp_layer_drm_formats() to zynqmp_disp_layer_formats()
> > to reflect semantics for both live and non-live layer format lists.
> >
> > Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com>
> > ---
> > drivers/gpu/drm/xlnx/zynqmp_disp.c | 67
> > +++++++++++++++++++++++++++++++++-----
> > drivers/gpu/drm/xlnx/zynqmp_disp.h | 4 +--
> > drivers/gpu/drm/xlnx/zynqmp_dp.c | 26 +++++++++++++++
> > drivers/gpu/drm/xlnx/zynqmp_kms.c | 2 +-
> > 4 files changed, 88 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > index e6d26ef60e89..af851190f447 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c
> > @@ -18,6 +18,7 @@
> > #include <linux/dma/xilinx_dpdma.h>
> > #include <linux/dma-mapping.h>
> > #include <linux/dmaengine.h>
> > +#include <linux/media-bus-format.h>
> > #include <linux/module.h>
> > #include <linux/of.h>
> > #include <linux/platform_device.h>
> > @@ -77,12 +78,16 @@ enum zynqmp_dpsub_layer_mode {
> > /**
> > * struct zynqmp_disp_format - Display subsystem format information
> > * @drm_fmt: DRM format (4CC)
> > + * @bus_fmt: Media bus format
> > * @buf_fmt: AV buffer format
> > * @swap: Flag to swap R & B for RGB formats, and U & V for YUV formats
> > * @sf: Scaling factors for color components
> > */
> > struct zynqmp_disp_format {
> > - u32 drm_fmt;
> > + union {
> > + u32 drm_fmt;
> > + u32 bus_fmt;
> > + };
>
> I'm not a big fan of the union, but I can live with it.
>
I'm trying to represent the duality of the layer formats - non-live described by the DRM fourcc, and live by the bus format.
> > u32 buf_fmt;
> > bool swap;
> > const u32 *sf;
> > @@ -182,6 +187,12 @@ static const u32 scaling_factors_565[] = {
> > ZYNQMP_DISP_AV_BUF_5BIT_SF,
> > };
> >
> > +static const u32 scaling_factors_666[] = {
> > + ZYNQMP_DISP_AV_BUF_6BIT_SF,
> > + ZYNQMP_DISP_AV_BUF_6BIT_SF,
> > + ZYNQMP_DISP_AV_BUF_6BIT_SF,
> > +};
> > +
> > static const u32 scaling_factors_888[] = {
> > ZYNQMP_DISP_AV_BUF_8BIT_SF,
> > ZYNQMP_DISP_AV_BUF_8BIT_SF,
> > @@ -364,6 +375,36 @@ static const struct zynqmp_disp_format
> avbuf_gfx_fmts[] = {
> > },
> > };
> >
> > +/* List of live video layer formats */ static const struct
> > +zynqmp_disp_format avbuf_live_fmts[] = {
> > + {
> > + .bus_fmt = MEDIA_BUS_FMT_RGB666_1X18,
> > + .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_6 |
> > + ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB,
> > + .sf = scaling_factors_666,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_UYVY8_1X24,
> > + .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_8 |
> > + ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB,
> > + .sf = scaling_factors_888,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_UYVY8_1X16,
> > + .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_8 |
> > + ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422,
> > + .sf = scaling_factors_888,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_VUY8_1X24,
> > + .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_8 |
> > + ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV444,
> > + .sf = scaling_factors_888,
> > + }, {
> > + .bus_fmt = MEDIA_BUS_FMT_UYVY10_1X20,
> > + .buf_fmt = ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_10 |
> > + ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422,
> > + .sf = scaling_factors_101010,
> > + },
> > +};
> > +
> > static u32 zynqmp_disp_avbuf_read(struct zynqmp_disp *disp, int reg)
> > {
> > return readl(disp->avbuf.base + reg); @@ -883,16 +924,17 @@
> > zynqmp_disp_layer_find_format(struct zynqmp_disp_layer *layer, }
> >
> > /**
> > - * zynqmp_disp_layer_drm_formats - Return the DRM formats supported
> > by the layer
> > + * zynqmp_disp_layer_formats - Return DRM or media bus formats
> > + supported by
> > + * the layer
> > * @layer: The layer
> > * @num_formats: Pointer to the returned number of formats
> > *
> > - * Return: A newly allocated u32 array that stores all the DRM
> > formats
> > + * Return: A newly allocated u32 array that stores all DRM or media
> > + bus formats
> > * supported by the layer. The number of formats in the array is returned
> > * through the num_formats argument.
> > */
> > -u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
> > - unsigned int *num_formats)
> > +u32 *zynqmp_disp_layer_formats(struct zynqmp_disp_layer *layer,
> > + unsigned int *num_formats)
> > {
> > unsigned int i;
> > u32 *formats;
> > @@ -1131,6 +1173,11 @@ static int zynqmp_disp_create_layers(struct
> zynqmp_disp *disp)
> > .num_channels = 1,
> > },
> > };
> > + static const struct zynqmp_disp_layer_info live_layer_info = {
> > + .formats = avbuf_live_fmts,
> > + .num_formats = ARRAY_SIZE(avbuf_live_fmts),
> > + .num_channels = 0,
> > + };
> >
> > unsigned int i;
> > int ret;
> > @@ -1140,12 +1187,16 @@ static int zynqmp_disp_create_layers(struct
> > zynqmp_disp *disp)
> >
> > layer->id = i;
> > layer->disp = disp;
> > - layer->info = &layer_info[i];
> > /* For now assume dpsub works in either live or non-live mode for both
> layers.
>
> While are it, could you please turn this into
>
> /*
> * For now assume dpsub works in either live or non-live mode for both
> layers.
>
> with a blank line just above it ?
>
Sure, thank you.
> > * Hybrid mode is not supported yet.
> > */
> > - layer->mode = disp->dpsub->dma_enabled ?
> ZYNQMP_DPSUB_LAYER_NONLIVE
> > - : ZYNQMP_DPSUB_LAYER_LIVE;
> > + if (disp->dpsub->dma_enabled) {
> > + layer->mode = ZYNQMP_DPSUB_LAYER_NONLIVE;
> > + layer->info = &layer_info[i];
> > + } else {
> > + layer->mode = ZYNQMP_DPSUB_LAYER_LIVE;
> > + layer->info = &live_layer_info;
> > + }
> >
> > ret = zynqmp_disp_layer_request_dma(disp, layer);
> > if (ret)
> > diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > b/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > index 9b8b202224d9..88c285a12e23 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_disp.h
> > @@ -50,8 +50,8 @@ int zynqmp_disp_setup_clock(struct zynqmp_disp
> > *disp, void zynqmp_disp_blend_set_global_alpha(struct zynqmp_disp *disp,
> > bool enable, u32 alpha);
> >
> > -u32 *zynqmp_disp_layer_drm_formats(struct zynqmp_disp_layer *layer,
> > - unsigned int *num_formats);
> > +u32 *zynqmp_disp_layer_formats(struct zynqmp_disp_layer *layer,
> > + unsigned int *num_formats);
> > void zynqmp_disp_layer_enable(struct zynqmp_disp_layer *layer); void
> > zynqmp_disp_layer_disable(struct zynqmp_disp_layer *layer); void
> > zynqmp_disp_layer_set_format(struct zynqmp_disp_layer *layer, diff
> > --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > b/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > index 04b6bcac3b07..a0d169ac48c0 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c
> > @@ -1568,6 +1568,31 @@ static const struct drm_edid
> *zynqmp_dp_bridge_edid_read(struct drm_bridge *brid
> > return drm_edid_read_ddc(connector, &dp->aux.ddc); }
> >
> > +static u32 *
> > +zynqmp_dp_bridge_get_input_bus_fmts(struct drm_bridge *bridge,
> > + struct drm_bridge_state *bridge_state,
> > + struct drm_crtc_state *crtc_state,
> > + struct drm_connector_state *conn_state,
> > + u32 output_fmt,
> > + unsigned int *num_input_fmts) {
> > + struct zynqmp_dp *dp = bridge_to_dp(bridge);
> > + struct zynqmp_disp_layer *layer;
> > + enum zynqmp_dpsub_layer_id layer_id;
> > +
> > + if (dp->dpsub->connected_ports &
> BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO))
> > + layer_id = ZYNQMP_DPSUB_LAYER_VID;
> > + else if (dp->dpsub->connected_ports &
> BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))
> > + layer_id = ZYNQMP_DPSUB_LAYER_GFX;
> > + else {
> > + *num_input_fmts = 0;
> > + return NULL;
> > + }
>
> You need curly braces around all branches if one of them has multiple statements.
>
Hmm, checkpatch gave me a CHECK hint on that. How did I miss it? Will fix. Thank you.
> Given that the above pattern is repeated twice already, a helper function that
> returns the layer pointer would be useful. Then you could simply write
>
> layer = ...(dp);
> if (!layer) {
> *num_input_fmts = 0;
> return NULL;
> }
>
Makes sense - I'll fix that.
> With these small issues addressed,
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> > + layer = dp->dpsub->layers[layer_id];
> > +
> > + return zynqmp_disp_layer_formats(layer, num_input_fmts); }
> > +
> > static const struct drm_bridge_funcs zynqmp_dp_bridge_funcs = {
> > .attach = zynqmp_dp_bridge_attach,
> > .detach = zynqmp_dp_bridge_detach, @@ -1580,6 +1605,7 @@ static
> > const struct drm_bridge_funcs zynqmp_dp_bridge_funcs = {
> > .atomic_check = zynqmp_dp_bridge_atomic_check,
> > .detect = zynqmp_dp_bridge_detect,
> > .edid_read = zynqmp_dp_bridge_edid_read,
> > + .atomic_get_input_bus_fmts =
> > + zynqmp_dp_bridge_get_input_bus_fmts,
> > };
> >
> > /*
> > ----------------------------------------------------------------------
> > ------- diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > b/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > index 43bf416b33d5..bf9fba01df0e 100644
> > --- a/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > +++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c
> > @@ -152,7 +152,7 @@ static int zynqmp_dpsub_create_planes(struct
> zynqmp_dpsub *dpsub)
> > unsigned int num_formats;
> > u32 *formats;
> >
> > - formats = zynqmp_disp_layer_drm_formats(layer, &num_formats);
> > + formats = zynqmp_disp_layer_formats(layer,
> > + &num_formats);
> > if (!formats)
> > return -ENOMEM;
> >
> >
>
> --
> Regards,
>
> Laurent Pinchart
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^ permalink raw reply
* Re: [PATCH v2] dt-bindings: nxp,pnx-i2c: Convert to dtschema
From: Animesh Agarwal @ 2024-03-20 0:53 UTC (permalink / raw)
To: Conor Dooley
Cc: Vladimir Zapolskiy, Andi Shyti, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-kernel, linux-i2c, devicetree,
linux-kernel
In-Reply-To: <20240319-oversight-viable-4550ffbc31d9@spud>
On Tue, Mar 19, 2024 at 11:27 PM Conor Dooley <conor@kernel.org> wrote:
> You're missing a space before the <, but otherwise this looks fine.
Should I send another version fixing this issue?
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Thanks for the review.
Regards,
Animesh.
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^ permalink raw reply
* Re: [PATCH] virtio_ring: Fix the stale index in available ring
From: Michael S. Tsirkin @ 2024-03-20 0:49 UTC (permalink / raw)
To: Gavin Shan
Cc: Will Deacon, virtualization, linux-kernel, jasowang, xuanzhuo,
yihyu, shan.gavin, linux-arm-kernel, Catalin Marinas, mochs
In-Reply-To: <9500adaf-0075-4ae9-92db-7e310b6598b0@redhat.com>
On Wed, Mar 20, 2024 at 09:56:58AM +1000, Gavin Shan wrote:
> On 3/20/24 04:22, Will Deacon wrote:
> > On Tue, Mar 19, 2024 at 02:59:23PM +1000, Gavin Shan wrote:
> > > On 3/19/24 02:59, Will Deacon wrote:
> > > > > drivers/virtio/virtio_ring.c | 12 +++++++++---
> > > > > 1 file changed, 9 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
> > > > > index 49299b1f9ec7..7d852811c912 100644
> > > > > --- a/drivers/virtio/virtio_ring.c
> > > > > +++ b/drivers/virtio/virtio_ring.c
> > > > > @@ -687,9 +687,15 @@ static inline int virtqueue_add_split(struct virtqueue *_vq,
> > > > > avail = vq->split.avail_idx_shadow & (vq->split.vring.num - 1);
> > > > > vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, head);
> > > > > - /* Descriptors and available array need to be set before we expose the
> > > > > - * new available array entries. */
> > > > > - virtio_wmb(vq->weak_barriers);
> > > > > + /*
> > > > > + * Descriptors and available array need to be set before we expose
> > > > > + * the new available array entries. virtio_wmb() should be enough
> > > > > + * to ensuere the order theoretically. However, a stronger barrier
> > > > > + * is needed by ARM64. Otherwise, the stale data can be observed
> > > > > + * by the host (vhost). A stronger barrier should work for other
> > > > > + * architectures, but performance loss is expected.
> > > > > + */
> > > > > + virtio_mb(false);
> > > > > vq->split.avail_idx_shadow++;
> > > > > vq->split.vring.avail->idx = cpu_to_virtio16(_vq->vdev,
> > > > > vq->split.avail_idx_shadow);
> > > >
> > > > Replacing a DMB with a DSB is _very_ unlikely to be the correct solution
> > > > here, especially when ordering accesses to coherent memory.
> > > >
> > > > In practice, either the larger timing different from the DSB or the fact
> > > > that you're going from a Store->Store barrier to a full barrier is what
> > > > makes things "work" for you. Have you tried, for example, a DMB SY
> > > > (e.g. via __smb_mb()).
> > > >
> > > > We definitely shouldn't take changes like this without a proper
> > > > explanation of what is going on.
> > > >
> > >
> > > Thanks for your comments, Will.
> > >
> > > Yes, DMB should work for us. However, it seems this instruction has issues on
> > > NVidia's grace-hopper. It's hard for me to understand how DMB and DSB works
> > > from hardware level. I agree it's not the solution to replace DMB with DSB
> > > before we fully understand the root cause.
> > >
> > > I tried the possible replacement like below. __smp_mb() can avoid the issue like
> > > __mb() does. __ndelay(10) can avoid the issue, but __ndelay(9) doesn't.
> > >
> > > static inline int virtqueue_add_split(struct virtqueue *_vq, ...)
> > > {
> > > :
> > > /* Put entry in available array (but don't update avail->idx until they
> > > * do sync). */
> > > avail = vq->split.avail_idx_shadow & (vq->split.vring.num - 1);
> > > vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, head);
> > >
> > > /* Descriptors and available array need to be set before we expose the
> > > * new available array entries. */
> > > // Broken: virtio_wmb(vq->weak_barriers);
> > > // Broken: __dma_mb();
> > > // Work: __mb();
> > > // Work: __smp_mb();
> >
> > It's pretty weird that __dma_mb() is "broken" but __smp_mb() "works". How
> > confident are you in that result?
> >
>
> Yes, __dma_mb() is even stronger than __smp_mb(). I retried the test, showing
> that both __dma_mb() and __smp_mb() work for us. I had too many tests yesterday
> and something may have been messed up.
>
> Instruction Hitting times in 10 tests
> ---------------------------------------------
> __smp_wmb() 8
> __smp_mb() 0
> __dma_wmb() 7
> __dma_mb() 0
> __mb() 0
> __wmb() 0
>
> It's strange that __smp_mb() works, but __smp_wmb() fails. It seems we need a
> read barrier here. I will try WRITE_ONCE() + __smp_wmb() as suggested by Michael
> in another reply. Will update the result soon.
>
> Thanks,
> Gavin
I think you are wasting the time with these tests. Even if it helps what
does this tell us? Try setting a flag as I suggested elsewhere.
Then check it in vhost.
Or here's another idea - possibly easier. Copy the high bits from index
into ring itself. Then vhost can check that head is synchronized with
index.
Warning: completely untested, not even compiled. But should give you
the idea. If this works btw we should consider making this official in
the spec.
static inline int vhost_get_avail_flags(struct vhost_virtqueue *vq,
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index 6f7e5010a673..79456706d0bd 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -685,7 +685,8 @@ static inline int virtqueue_add_split(struct virtqueue *_vq,
/* Put entry in available array (but don't update avail->idx until they
* do sync). */
avail = vq->split.avail_idx_shadow & (vq->split.vring.num - 1);
- vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, head);
+ u16 headwithflag = head | (q->split.avail_idx_shadow & ~(vq->split.vring.num - 1));
+ vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, headwithflag);
/* Descriptors and available array need to be set before we expose the
* new available array entries. */
diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
index 045f666b4f12..bd8f7c763caa 100644
--- a/drivers/vhost/vhost.c
+++ b/drivers/vhost/vhost.c
@@ -1299,8 +1299,15 @@ static inline int vhost_get_avail_idx(struct vhost_virtqueue *vq,
static inline int vhost_get_avail_head(struct vhost_virtqueue *vq,
__virtio16 *head, int idx)
{
- return vhost_get_avail(vq, *head,
+ unsigned i = idx;
+ unsigned flag = i & ~(vq->num - 1);
+ unsigned val = vhost_get_avail(vq, *head,
&vq->avail->ring[idx & (vq->num - 1)]);
+ unsigned valflag = val & ~(vq->num - 1);
+
+ WARN_ON(valflag != flag);
+
+ return val & (vq->num - 1);
}
--
MST
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* Re: [PATCH] virtio_ring: Fix the stale index in available ring
From: Gavin Shan @ 2024-03-19 23:56 UTC (permalink / raw)
To: Will Deacon
Cc: virtualization, linux-kernel, mst, jasowang, xuanzhuo, yihyu,
shan.gavin, linux-arm-kernel, Catalin Marinas, mochs
In-Reply-To: <20240319182251.GB3121@willie-the-truck>
On 3/20/24 04:22, Will Deacon wrote:
> On Tue, Mar 19, 2024 at 02:59:23PM +1000, Gavin Shan wrote:
>> On 3/19/24 02:59, Will Deacon wrote:
>>>> drivers/virtio/virtio_ring.c | 12 +++++++++---
>>>> 1 file changed, 9 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
>>>> index 49299b1f9ec7..7d852811c912 100644
>>>> --- a/drivers/virtio/virtio_ring.c
>>>> +++ b/drivers/virtio/virtio_ring.c
>>>> @@ -687,9 +687,15 @@ static inline int virtqueue_add_split(struct virtqueue *_vq,
>>>> avail = vq->split.avail_idx_shadow & (vq->split.vring.num - 1);
>>>> vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, head);
>>>> - /* Descriptors and available array need to be set before we expose the
>>>> - * new available array entries. */
>>>> - virtio_wmb(vq->weak_barriers);
>>>> + /*
>>>> + * Descriptors and available array need to be set before we expose
>>>> + * the new available array entries. virtio_wmb() should be enough
>>>> + * to ensuere the order theoretically. However, a stronger barrier
>>>> + * is needed by ARM64. Otherwise, the stale data can be observed
>>>> + * by the host (vhost). A stronger barrier should work for other
>>>> + * architectures, but performance loss is expected.
>>>> + */
>>>> + virtio_mb(false);
>>>> vq->split.avail_idx_shadow++;
>>>> vq->split.vring.avail->idx = cpu_to_virtio16(_vq->vdev,
>>>> vq->split.avail_idx_shadow);
>>>
>>> Replacing a DMB with a DSB is _very_ unlikely to be the correct solution
>>> here, especially when ordering accesses to coherent memory.
>>>
>>> In practice, either the larger timing different from the DSB or the fact
>>> that you're going from a Store->Store barrier to a full barrier is what
>>> makes things "work" for you. Have you tried, for example, a DMB SY
>>> (e.g. via __smb_mb()).
>>>
>>> We definitely shouldn't take changes like this without a proper
>>> explanation of what is going on.
>>>
>>
>> Thanks for your comments, Will.
>>
>> Yes, DMB should work for us. However, it seems this instruction has issues on
>> NVidia's grace-hopper. It's hard for me to understand how DMB and DSB works
>> from hardware level. I agree it's not the solution to replace DMB with DSB
>> before we fully understand the root cause.
>>
>> I tried the possible replacement like below. __smp_mb() can avoid the issue like
>> __mb() does. __ndelay(10) can avoid the issue, but __ndelay(9) doesn't.
>>
>> static inline int virtqueue_add_split(struct virtqueue *_vq, ...)
>> {
>> :
>> /* Put entry in available array (but don't update avail->idx until they
>> * do sync). */
>> avail = vq->split.avail_idx_shadow & (vq->split.vring.num - 1);
>> vq->split.vring.avail->ring[avail] = cpu_to_virtio16(_vq->vdev, head);
>>
>> /* Descriptors and available array need to be set before we expose the
>> * new available array entries. */
>> // Broken: virtio_wmb(vq->weak_barriers);
>> // Broken: __dma_mb();
>> // Work: __mb();
>> // Work: __smp_mb();
>
> It's pretty weird that __dma_mb() is "broken" but __smp_mb() "works". How
> confident are you in that result?
>
Yes, __dma_mb() is even stronger than __smp_mb(). I retried the test, showing
that both __dma_mb() and __smp_mb() work for us. I had too many tests yesterday
and something may have been messed up.
Instruction Hitting times in 10 tests
---------------------------------------------
__smp_wmb() 8
__smp_mb() 0
__dma_wmb() 7
__dma_mb() 0
__mb() 0
__wmb() 0
It's strange that __smp_mb() works, but __smp_wmb() fails. It seems we need a
read barrier here. I will try WRITE_ONCE() + __smp_wmb() as suggested by Michael
in another reply. Will update the result soon.
Thanks,
Gavin
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* Re: [PATCH v4 3/3] arm64: dts: allwinner: h616: add support for T95 tv boxes
From: Kamil Kasperski @ 2024-03-19 23:33 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maxime Ripard, devicetree,
linux-kernel, linux-arm-kernel, linux-sunxi
In-Reply-To: <20240319232236.07007592@minigeek.lan>
W dniu 20.03.2024 o 00:22, Andre Przywara pisze:
> On Tue, 19 Mar 2024 18:50:24 +0100
> Kamil Kasperski <ressetkk@gmail.com> wrote:
>
> Hi Kamil,
>
>> Add dtsi file for T95 tv boxes and add initial support for T95 5G AXP313A
>> variant with a board name H616-T95MAX-AXP313A-v3.0 Internal storage is not
>> accessible due to lack of support for H616 NAND controller.
>>
>> Signed-off-by: Kamil Kasperski <ressetkk@gmail.com>
> thanks for the changes, looks good now, although a bit minimal ;-)
>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
>
> Please can you wait till the -rc1 release on Sunday, and send a rebased
> version next week? There is a small merge conflict in the dts Makefile
> as of now.
>
> Cheers,
> Andre
Sure, no problem. Thank you very much for a review.
Once it gets merged I'll get back to u-boot patch.
Cheers,
Kamil
>
>> ---
>> arch/arm64/boot/dts/allwinner/Makefile | 1 +
>> arch/arm64/boot/dts/allwinner/sun50i-h616-t95.dtsi | 109 +++++++++++++++++++++
>> .../dts/allwinner/sun50i-h616-t95max-axp313.dts | 84 ++++++++++++++++
>> 3 files changed, 194 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
>> index 21149b346a60..294921f12b73 100644
>> --- a/arch/arm64/boot/dts/allwinner/Makefile
>> +++ b/arch/arm64/boot/dts/allwinner/Makefile
>> @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-cb1-manta.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb
>> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-t95max-axp313.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb
>> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-t95.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-t95.dtsi
>> new file mode 100644
>> index 000000000000..4c02408733bc
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-t95.dtsi
>> @@ -0,0 +1,109 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2024 Kamil Kasperski <ressetkk@gmail.com>
>> + *
>> + * Common DT nodes for H616-based T95 TV boxes
>> + * There are two versions reported with different PMIC variants.
>> + */
>> +
>> +#include "sun50i-h616.dtsi"
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +/ {
>> + aliases {
>> + ethernet1 = &sdio_wifi;
>> + serial0 = &uart0;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + };
>> +
>> + reg_vcc5v: vcc5v {
>> + /* board wide 5V supply directly from the DC input */
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc-5v";
>> + regulator-min-microvolt = <5000000>;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-always-on;
>> + };
>> +
>> + reg_vcc3v3: vcc3v3 {
>> + /* discrete 3.3V regulator */
>> + compatible = "regulator-fixed";
>> + regulator-name = "vcc-3v3";
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-always-on;
>> + };
>> +
>> + wifi_pwrseq: pwrseq {
>> + compatible = "mmc-pwrseq-simple";
>> + clocks = <&rtc CLK_OSC32K_FANOUT>;
>> + clock-names = "ext_clock";
>> + pinctrl-0 = <&x32clk_fanout_pin>;
>> + pinctrl-names = "default";
>> + reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
>> + };
>> +};
>> +
>> +&ehci0 {
>> + status = "okay";
>> +};
>> +
>> +&ehci2 {
>> + status = "okay";
>> +};
>> +
>> +&ir {
>> + status = "okay";
>> +};
>> +
>> +&mmc0 {
>> + cd-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */
>> + bus-width = <4>;
>> + status = "okay";
>> +};
>> +
>> +&mmc1 {
>> + mmc-pwrseq = <&wifi_pwrseq>;
>> + bus-width = <4>;
>> + non-removable;
>> + status = "okay";
>> +
>> + sdio_wifi: wifi@1 {
>> + reg = <1>;
>> + };
>> +};
>> +
>> +&ohci0 {
>> + status = "okay";
>> +};
>> +
>> +&ohci2 {
>> + status = "okay";
>> +};
>> +
>> +&uart0 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&uart0_ph_pins>;
>> + status = "okay";
>> +};
>> +
>> +&uart1 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
>> + uart-has-rtscts;
>> + status = "okay";
>> +};
>> +
>> +&usbotg {
>> + dr_mode = "host"; /* USB A type receptable */
>> + status = "okay";
>> +};
>> +
>> +&usbphy {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-t95max-axp313.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-t95max-axp313.dts
>> new file mode 100644
>> index 000000000000..08a6b4fcc235
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-t95max-axp313.dts
>> @@ -0,0 +1,84 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2024 Kamil Kasperski <ressetkk@gmail.com>
>> + *
>> + * Configuration for T95 TV box with board label H616-T95MAX-AXP313A-v3.0
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sun50i-h616-t95.dtsi"
>> +
>> +/ {
>> + model = "T95 5G (AXP313)";
>> + compatible = "t95,t95max-axp313", "allwinner,sun50i-h616";
>> +};
>> +
>> +&mmc0 {
>> + vmmc-supply = <®_dldo1>;
>> +};
>> +
>> +&mmc1 {
>> + vmmc-supply = <®_dldo1>;
>> + vqmmc-supply = <®_aldo1>;
>> +};
>> +
>> +&r_i2c {
>> + status = "okay";
>> +
>> + axp313: pmic@36 {
>> + compatible = "x-powers,axp313a";
>> + reg = <0x36>;
>> + #interrupt-cells = <1>;
>> + interrupt-controller;
>> +
>> + vin1-supply = <®_vcc5v>;
>> + vin2-supply = <®_vcc5v>;
>> + vin3-supply = <®_vcc5v>;
>> +
>> + regulators {
>> + reg_aldo1: aldo1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-name = "vcc1v8";
>> + };
>> +
>> + reg_dldo1: dldo1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-name = "vcc3v3";
>> + };
>> +
>> + reg_dcdc1: dcdc1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <810000>;
>> + regulator-max-microvolt = <990000>;
>> + regulator-name = "vdd-gpu-sys";
>> + };
>> +
>> + reg_dcdc2: dcdc2 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <810000>;
>> + regulator-max-microvolt = <1100000>;
>> + regulator-name = "vdd-cpu";
>> + };
>> +
>> + reg_dcdc3: dcdc3 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <1500000>;
>> + regulator-max-microvolt = <1500000>;
>> + regulator-name = "vdd-dram";
>> + };
>> + };
>> + };
>> +};
>> +
>> +&pio {
>> + vcc-pc-supply = <®_aldo1>;
>> + vcc-pf-supply = <®_dldo1>;
>> + vcc-pg-supply = <®_aldo1>;
>> + vcc-ph-supply = <®_dldo1>;
>> + vcc-pi-supply = <®_dldo1>;
>> +};
>>
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* Re: [PATCH 09/13] mm/powerpc: Redefine pXd_huge() with pXd_leaf()
From: Jason Gunthorpe @ 2024-03-19 23:26 UTC (permalink / raw)
To: Christophe Leroy
Cc: Peter Xu, linux-kernel@vger.kernel.org, linux-mm@kvack.org,
linux-arm-kernel@lists.infradead.org, Matthew Wilcox,
linuxppc-dev@lists.ozlabs.org, Andrew Morton, x86@kernel.org,
Mike Rapoport, Muchun Song, sparclinux@vger.kernel.org,
Michael Ellerman, Nicholas Piggin, Aneesh Kumar K.V,
Naveen N. Rao
In-Reply-To: <e0417c2a-2ef1-4435-b5a7-aadfe90ff8f1@csgroup.eu>
On Tue, Mar 19, 2024 at 11:07:08PM +0000, Christophe Leroy wrote:
>
>
> Le 18/03/2024 à 17:15, Jason Gunthorpe a écrit :
> > On Thu, Mar 14, 2024 at 01:11:59PM +0000, Christophe Leroy wrote:
> >>
> >>
> >> Le 14/03/2024 à 13:53, Peter Xu a écrit :
> >>> On Thu, Mar 14, 2024 at 08:45:34AM +0000, Christophe Leroy wrote:
> >>>>
> >>>>
> >>>> Le 13/03/2024 à 22:47, peterx@redhat.com a écrit :
> >>>>> From: Peter Xu <peterx@redhat.com>
> >>>>>
> >>>>> PowerPC book3s 4K mostly has the same definition on both, except pXd_huge()
> >>>>> constantly returns 0 for hash MMUs. As Michael Ellerman pointed out [1],
> >>>>> it is safe to check _PAGE_PTE on hash MMUs, as the bit will never be set so
> >>>>> it will keep returning false.
> >>>>>
> >>>>> As a reference, __p[mu]d_mkhuge() will trigger a BUG_ON trying to create
> >>>>> such huge mappings for 4K hash MMUs. Meanwhile, the major powerpc hugetlb
> >>>>> pgtable walker __find_linux_pte() already used pXd_leaf() to check hugetlb
> >>>>> mappings.
> >>>>>
> >>>>> The goal should be that we will have one API pXd_leaf() to detect all kinds
> >>>>> of huge mappings. AFAICT we need to use the pXd_leaf() impl (rather than
> >>>>> pXd_huge() ones) to make sure ie. THPs on hash MMU will also return true.
> >>>>
> >>>> All kinds of huge mappings ?
> >>>>
> >>>> pXd_leaf() will detect only leaf mappings (like pXd_huge() ). There are
> >>>> also huge mappings through hugepd. On powerpc 8xx we have 8M huge pages
> >>>> and 512k huge pages. A PGD entry covers 4M so pgd_leaf() won't report
> >>>> those huge pages.
> >>>
> >>> Ah yes, I should always mention this is in the context of leaf huge pages
> >>> only. Are the examples you provided all fall into hugepd category? If so
> >>> I can reword the commit message, as:
> >>
> >> On powerpc 8xx, only the 8M huge pages fall into the hugepd case.
> >>
> >> The 512k hugepages are at PTE level, they are handled more or less like
> >> CONT_PTE on ARM. see function set_huge_pte_at() for more context.
> >>
> >> You can also look at pte_leaf_size() and pgd_leaf_size().
> >
> > IMHO leaf should return false if the thing is pointing to a next level
> > page table, even if that next level is fully populated with contiguous
> > pages.
> >
> > This seems more aligned with the contig page direction that hugepd
> > should be moved over to..
>
> Should hugepd be moved to the contig page direction, really ?
Sure? Is there any downside for the reading side to do so?
> Would it be acceptable that a 8M hugepage requires 2048 contig entries
> in 2 page tables, when the hugepd allows a single entry ?
? I thought we agreed the only difference would be that something new
is needed to merge the two identical sibling page tables into one, ie
you pay 2x the page table memory if that isn't fixed. That is write
side only change and I imagine it could be done with a single PPC
special API.
Honestly not totally sure that is a big deal, it is already really
memory inefficient compared to every other arch's huge page by needing
the child page table in the first place.
> Would it be acceptable performancewise ?
Isn't this particular PPC sub platform ancient? Are there current real
users that are going to have hugetlbfs special code and care about
this performance detail on a 6.20 era kernel?
In today's world wouldn't it be performance better if these platforms
could support THP by aligning to the contig API instead of being
special?
Am I wrong to question why we are polluting the core code for this
special optimization?
Jason
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