* [PATCH v3] clk: imx: imx8mp: Add pm_runtime support for power saving
From: Shengjiu Wang @ 2024-03-21 8:36 UTC (permalink / raw)
To: abelvesa, peng.fan, mturquette, sboyd, shawnguo, s.hauer, kernel,
festevam, linux-imx, shengjiu.wang
Cc: linux-clk, linux-arm-kernel, linux-kernel
Add pm_runtime support for power saving. In pm runtime suspend
state the registers will be reseted, so add registers save
in pm runtime suspend and restore them in pm runtime resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
---
changes in v3:
- remove REGS_NUM, use the ARRAY_SIZE
- merge clk_imx8mp_audiomix_drvdata and clk_hw_onecell_data together.
changes in v2:
- move pm_runtime_enable before the clk register
drivers/clk/imx/clk-imx8mp-audiomix.c | 157 ++++++++++++++++++++++----
1 file changed, 136 insertions(+), 21 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c
index 55ed211a5e0b..5ae33bce8ad8 100644
--- a/drivers/clk/imx/clk-imx8mp-audiomix.c
+++ b/drivers/clk/imx/clk-imx8mp-audiomix.c
@@ -7,10 +7,12 @@
#include <linux/clk-provider.h>
#include <linux/device.h>
+#include <linux/io.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <dt-bindings/clock/imx8mp-clock.h>
@@ -18,6 +20,7 @@
#define CLKEN0 0x000
#define CLKEN1 0x004
+#define EARC 0x200
#define SAI1_MCLK_SEL 0x300
#define SAI2_MCLK_SEL 0x304
#define SAI3_MCLK_SEL 0x308
@@ -26,6 +29,11 @@
#define SAI7_MCLK_SEL 0x314
#define PDM_SEL 0x318
#define SAI_PLL_GNRL_CTL 0x400
+#define SAI_PLL_FDIVL_CTL0 0x404
+#define SAI_PLL_FDIVL_CTL1 0x408
+#define SAI_PLL_SSCG_CTL 0x40C
+#define SAI_PLL_MNIT_CTL 0x410
+#define IPG_LP_CTRL 0x504
#define SAIn_MCLK1_PARENT(n) \
static const struct clk_parent_data \
@@ -182,26 +190,82 @@ static struct clk_imx8mp_audiomix_sel sels[] = {
CLK_SAIn(7)
};
+static const u16 audiomix_regs[] = {
+ CLKEN0,
+ CLKEN1,
+ EARC,
+ SAI1_MCLK_SEL,
+ SAI2_MCLK_SEL,
+ SAI3_MCLK_SEL,
+ SAI5_MCLK_SEL,
+ SAI6_MCLK_SEL,
+ SAI7_MCLK_SEL,
+ PDM_SEL,
+ SAI_PLL_GNRL_CTL,
+ SAI_PLL_FDIVL_CTL0,
+ SAI_PLL_FDIVL_CTL1,
+ SAI_PLL_SSCG_CTL,
+ SAI_PLL_MNIT_CTL,
+ IPG_LP_CTRL,
+};
+
+struct clk_imx8mp_audiomix_priv {
+ void __iomem *base;
+ struct clk_hw_onecell_data *clk_hw_data;
+ u32 regs_save[ARRAY_SIZE(audiomix_regs)];
+};
+
+static void clk_imx8mp_audiomix_save_restore(struct device *dev, bool save)
+{
+ struct clk_imx8mp_audiomix_priv *priv = dev_get_drvdata(dev);
+ void __iomem *base = priv->base;
+ int i;
+
+ if (save) {
+ for (i = 0; i < ARRAY_SIZE(audiomix_regs); i++)
+ priv->regs_save[i] = readl(base + audiomix_regs[i]);
+ } else {
+ for (i = 0; i < ARRAY_SIZE(audiomix_regs); i++)
+ writel(priv->regs_save[i], base + audiomix_regs[i]);
+ }
+}
+
static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
{
- struct clk_hw_onecell_data *priv;
+ struct clk_imx8mp_audiomix_priv *priv;
+ struct clk_hw_onecell_data *clk_hw_data;
struct device *dev = &pdev->dev;
void __iomem *base;
struct clk_hw *hw;
- int i;
+ int i, ret;
priv = devm_kzalloc(dev,
- struct_size(priv, hws, IMX8MP_CLK_AUDIOMIX_END),
+ sizeof(*priv) + struct_size(clk_hw_data, hws, IMX8MP_CLK_AUDIOMIX_END),
GFP_KERNEL);
if (!priv)
return -ENOMEM;
- priv->num = IMX8MP_CLK_AUDIOMIX_END;
+ priv->clk_hw_data = (struct clk_hw_onecell_data *)((void *)priv + sizeof(*priv));
+
+ clk_hw_data = priv->clk_hw_data;
+ clk_hw_data->num = IMX8MP_CLK_AUDIOMIX_END;
base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(base))
return PTR_ERR(base);
+ priv->base = base;
+ dev_set_drvdata(dev, priv);
+
+ /*
+ * pm_runtime_enable needs to be called before clk register.
+ * That is to make core->rpm_enabled to be true for clock
+ * usage.
+ */
+ pm_runtime_get_noresume(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
for (i = 0; i < ARRAY_SIZE(sels); i++) {
if (sels[i].num_parents == 1) {
hw = devm_clk_hw_register_gate_parent_data(dev,
@@ -216,10 +280,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
0, NULL, NULL);
}
- if (IS_ERR(hw))
- return PTR_ERR(hw);
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_clk_register;
+ }
- priv->hws[sels[i].clkid] = hw;
+ clk_hw_data->hws[sels[i].clkid] = hw;
}
/* SAI PLL */
@@ -228,39 +294,86 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev)
ARRAY_SIZE(clk_imx8mp_audiomix_pll_parents),
CLK_SET_RATE_NO_REPARENT, base + SAI_PLL_GNRL_CTL,
0, 2, 0, NULL, NULL);
- priv->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL] = hw;
+ clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL] = hw;
hw = imx_dev_clk_hw_pll14xx(dev, "sai_pll", "sai_pll_ref_sel",
base + 0x400, &imx_1443x_pll);
- if (IS_ERR(hw))
- return PTR_ERR(hw);
- priv->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL] = hw;
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_clk_register;
+ }
+ clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL] = hw;
hw = devm_clk_hw_register_mux_parent_data_table(dev,
"sai_pll_bypass", clk_imx8mp_audiomix_pll_bypass_sels,
ARRAY_SIZE(clk_imx8mp_audiomix_pll_bypass_sels),
CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
base + SAI_PLL_GNRL_CTL, 16, 1, 0, NULL, NULL);
- if (IS_ERR(hw))
- return PTR_ERR(hw);
- priv->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_clk_register;
+ }
+
+ clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw;
hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass",
0, base + SAI_PLL_GNRL_CTL, 13,
0, NULL);
- if (IS_ERR(hw))
- return PTR_ERR(hw);
- priv->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_clk_register;
+ }
+ clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw;
hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2",
"sai_pll_out", 0, 1, 2);
- if (IS_ERR(hw))
- return PTR_ERR(hw);
+ if (IS_ERR(hw)) {
+ ret = PTR_ERR(hw);
+ goto err_clk_register;
+ }
+
+ ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,
+ clk_hw_data);
+ if (ret)
+ goto err_clk_register;
+
+ pm_runtime_put_sync(dev);
+ return 0;
+
+err_clk_register:
+ pm_runtime_put_sync(dev);
+ pm_runtime_disable(dev);
+ return ret;
+}
+
+static int clk_imx8mp_audiomix_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+static int clk_imx8mp_audiomix_runtime_suspend(struct device *dev)
+{
+ clk_imx8mp_audiomix_save_restore(dev, true);
- return devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,
- priv);
+ return 0;
}
+static int clk_imx8mp_audiomix_runtime_resume(struct device *dev)
+{
+ clk_imx8mp_audiomix_save_restore(dev, false);
+
+ return 0;
+}
+
+static const struct dev_pm_ops clk_imx8mp_audiomix_pm_ops = {
+ SET_RUNTIME_PM_OPS(clk_imx8mp_audiomix_runtime_suspend,
+ clk_imx8mp_audiomix_runtime_resume, NULL)
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+};
+
static const struct of_device_id clk_imx8mp_audiomix_of_match[] = {
{ .compatible = "fsl,imx8mp-audio-blk-ctrl" },
{ /* sentinel */ }
@@ -269,9 +382,11 @@ MODULE_DEVICE_TABLE(of, clk_imx8mp_audiomix_of_match);
static struct platform_driver clk_imx8mp_audiomix_driver = {
.probe = clk_imx8mp_audiomix_probe,
+ .remove = clk_imx8mp_audiomix_remove,
.driver = {
.name = "imx8mp-audio-blk-ctrl",
.of_match_table = clk_imx8mp_audiomix_of_match,
+ .pm = &clk_imx8mp_audiomix_pm_ops,
},
};
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 2/4] media: dt-binding: media: Document rk3588’s vepu121
From: Heiko Stübner @ 2024-03-21 8:47 UTC (permalink / raw)
To: Emmanuel Gil Peyrot, linux-kernel, Krzysztof Kozlowski
Cc: Ezequiel Garcia, Philipp Zabel, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joerg Roedel,
Will Deacon, Robin Murphy, Sebastian Reichel, Cristian Ciocaltea,
Dragan Simic, Shreeya Patel, Chris Morgan, Andy Yan,
Nicolas Frattaroli, linux-media, linux-rockchip, devicetree,
linux-arm-kernel, iommu
In-Reply-To: <4c05d3c0-aa79-4ce0-918c-7d0967ace520@linaro.org>
Am Donnerstag, 21. März 2024, 09:14:51 CET schrieb Krzysztof Kozlowski:
> On 20/03/2024 18:37, Emmanuel Gil Peyrot wrote:
> > This encoder-only device is present four times on this SoC, and should
> > support everything the rk3568 vepu supports (so JPEG, H.264 and VP8
> > encoding).
> >
> > Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> > ---
> > .../devicetree/bindings/media/rockchip,rk3568-vepu.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> > index 9d90d8d0565a..947ad699cc5e 100644
> > --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> > +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> > @@ -17,6 +17,7 @@ properties:
> > compatible:
> > enum:
> > - rockchip,rk3568-vepu
> > + - rockchip,rk3588-vepu121
>
> What is 121?
That is the strange naming of the ip block inside the soc.
I.e. the rk3588 TRM lists a number of different video encoders and decoders:
- VDPU121 is decoding h.263 and mpeg1,2,4
- VDPU381 is decoding h.265, h.264 and some more
- VDPU720 is decoding jpeg
- VDPU981 decodes AV1
- VEPU121 is the jpeg encoder above
- VEPU580 encodes h.264 and h.265
Each of those are separate IP blocks with their own io-memory, their own
interrupts and their own iommus, etc.
Heiko
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 0/2] MediaTek SCP: Urgent fixes for all MTK SoCs
From: AngeloGioacchino Del Regno @ 2024-03-21 8:46 UTC (permalink / raw)
To: mathieu.poirier
Cc: andersson, matthias.bgg, angelogioacchino.delregno, tzungbi,
tinghan.shen, linux-remoteproc, linux-kernel, linux-arm-kernel,
linux-mediatek, wenst, kernel
This series brings some missing validation for the IPI buffer size
that is read from the firmware retrieved from userspace: if the FW
declares IPI buffer offset starting at an out of range address, the
driver doesn't do any validation and naively goes on with IO R/W
operation.
That poses various risks which I believe I really don't need to
describe, leaving it to the reader's imagination :-)
Please note that the first fix is URGENT.
P.S.: Of course, this was tested OK on multiple MTK platforms.
AngeloGioacchino Del Regno (2):
remoteproc: mediatek: Make sure IPI buffer fits in L2TCM
remoteproc: mediatek: Don't parse extraneous subnodes for multi-core
drivers/remoteproc/mtk_scp.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
--
2.44.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 1/2] remoteproc: mediatek: Make sure IPI buffer fits in L2TCM
From: AngeloGioacchino Del Regno @ 2024-03-21 8:46 UTC (permalink / raw)
To: mathieu.poirier
Cc: andersson, matthias.bgg, angelogioacchino.delregno, tzungbi,
tinghan.shen, linux-remoteproc, linux-kernel, linux-arm-kernel,
linux-mediatek, wenst, kernel
In-Reply-To: <20240321084614.45253-1-angelogioacchino.delregno@collabora.com>
The IPI buffer location is read from the firmware that we load to the
System Companion Processor, and it's not granted that both the SRAM
(L2TCM) size that is defined in the devicetree node is large enough
for that, and while this is especially true for multi-core SCP, it's
still useful to check on single-core variants as well.
Failing to perform this check may make this driver perform R/W
oeprations out of the L2TCM boundary, resulting (at best) in a
kernel panic.
To fix that, check that the IPI buffer fits, otherwise return a
failure and refuse to boot the relevant SCP core (or the SCP at
all, if this is single core).
Fixes: 3efa0ea743b7 ("remoteproc/mediatek: read IPI buffer offset from FW")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/remoteproc/mtk_scp.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index a35409eda0cf..67518291a8ad 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -132,7 +132,7 @@ static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
{
int ret;
- size_t offset;
+ size_t buf_sz, offset;
/* read the ipi buf addr from FW itself first */
ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset);
@@ -144,6 +144,14 @@ static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
}
dev_info(scp->dev, "IPI buf addr %#010zx\n", offset);
+ /* Make sure IPI buffer fits in the L2TCM range assigned to this core */
+ buf_sz = sizeof(*scp->recv_buf) + sizeof(*scp->send_buf);
+
+ if (scp->sram_size < buf_sz + offset) {
+ dev_err(scp->dev, "IPI buffer does not fit in SRAM.\n");
+ return -EOVERFLOW;
+ }
+
scp->recv_buf = (struct mtk_share_obj __iomem *)
(scp->sram_base + offset);
scp->send_buf = (struct mtk_share_obj __iomem *)
--
2.44.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 2/2] remoteproc: mediatek: Don't parse extraneous subnodes for multi-core
From: AngeloGioacchino Del Regno @ 2024-03-21 8:46 UTC (permalink / raw)
To: mathieu.poirier
Cc: andersson, matthias.bgg, angelogioacchino.delregno, tzungbi,
tinghan.shen, linux-remoteproc, linux-kernel, linux-arm-kernel,
linux-mediatek, wenst, kernel
In-Reply-To: <20240321084614.45253-1-angelogioacchino.delregno@collabora.com>
When probing multi-core SCP, this driver is parsing all sub-nodes of
the scp-cluster node, but one of those could be not an actual SCP core
and that would make the entire SCP cluster to fail probing for no good
reason.
To fix that, in scp_add_multi_core() treat a subnode as a SCP Core by
parsing only available subnodes having compatible "mediatek,scp-core".
Fixes: 1fdbf0cdde98 ("remoteproc: mediatek: Probe SCP cluster on multi-core SCP")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/remoteproc/mtk_scp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 67518291a8ad..fbe1c232dae7 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -1096,6 +1096,9 @@ static int scp_add_multi_core(struct platform_device *pdev,
cluster_of_data = (const struct mtk_scp_of_data **)of_device_get_match_data(dev);
for_each_available_child_of_node(np, child) {
+ if (!of_device_is_compatible(child, "mediatek,scp-core"))
+ continue;
+
if (!cluster_of_data[core_id]) {
ret = -EINVAL;
dev_err(dev, "Not support core %d\n", core_id);
--
2.44.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Zapytanie ofertowe
From: Patryk Wysocki @ 2024-03-21 8:46 UTC (permalink / raw)
To: linux-arm-kernel
Dzień dobry,
Pozwoliłem sobie na kontakt, ponieważ jestem zainteresowany weryfikacją możliwości nawiązania współpracy.
Wspieramy firmy w pozyskiwaniu nowych klientów biznesowych.
Czy możemy porozmawiać w celu przedstawienia szczegółowych informacji?
Pozdrawiam
Patryk Wysocki
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH v3 1/5] arm64: mm: swap: support THP_SWAP on hardware with MTE
From: Barry Song @ 2024-03-21 8:42 UTC (permalink / raw)
To: Ryan Roberts
Cc: akpm, linux-mm, chengming.zhou, chrisl, david, hannes, kasong,
linux-arm-kernel, linux-kernel, mhocko, nphamcs, shy828301,
steven.price, surenb, wangkefeng.wang, willy, xiang, ying.huang,
yosryahmed, yuzhao, Barry Song, Catalin Marinas, Will Deacon,
Mark Rutland, Kemeng Shi, Anshuman Khandual, Peter Collingbourne,
Peter Xu, Lorenzo Stoakes, Mike Rapoport (IBM), Hugh Dickins,
Aneesh Kumar K.V, Rick Edgecombe
In-Reply-To: <01c61b90-df90-4819-978b-414bb717ef64@arm.com>
Hi Ryan,
Sorry for the late reply.
On Tue, Mar 12, 2024 at 5:56 AM Ryan Roberts <ryan.roberts@arm.com> wrote:
>
> On 04/03/2024 08:13, Barry Song wrote:
> > From: Barry Song <v-songbaohua@oppo.com>
> >
> > Commit d0637c505f8a1 ("arm64: enable THP_SWAP for arm64") brings up
> > THP_SWAP on ARM64, but it doesn't enable THP_SWP on hardware with
> > MTE as the MTE code works with the assumption tags save/restore is
> > always handling a folio with only one page.
> >
> > The limitation should be removed as more and more ARM64 SoCs have
> > this feature. Co-existence of MTE and THP_SWAP becomes more and
> > more important.
> >
> > This patch makes MTE tags saving support large folios, then we don't
> > need to split large folios into base pages for swapping out on ARM64
> > SoCs with MTE any more.
> >
> > arch_prepare_to_swap() should take folio rather than page as parameter
> > because we support THP swap-out as a whole. It saves tags for all
> > pages in a large folio.
> >
> > As now we are restoring tags based-on folio, in arch_swap_restore(),
> > we may increase some extra loops and early-exitings while refaulting
> > a large folio which is still in swapcache in do_swap_page(). In case
> > a large folio has nr pages, do_swap_page() will only set the PTE of
> > the particular page which is causing the page fault.
> > Thus do_swap_page() runs nr times, and each time, arch_swap_restore()
> > will loop nr times for those subpages in the folio. So right now the
> > algorithmic complexity becomes O(nr^2).
> >
> > Once we support mapping large folios in do_swap_page(), extra loops
> > and early-exitings will decrease while not being completely removed
> > as a large folio might get partially tagged in corner cases such as,
> > 1. a large folio in swapcache can be partially unmapped, thus, MTE
> > tags for the unmapped pages will be invalidated;
> > 2. users might use mprotect() to set MTEs on a part of a large folio.
> >
> > arch_thp_swp_supported() is dropped since ARM64 MTE was the only one
> > who needed it.
> >
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Ryan Roberts <ryan.roberts@arm.com>
> > Cc: Mark Rutland <mark.rutland@arm.com>
> > Cc: David Hildenbrand <david@redhat.com>
> > Cc: Kemeng Shi <shikemeng@huaweicloud.com>
> > Cc: "Matthew Wilcox (Oracle)" <willy@infradead.org>
> > Cc: Anshuman Khandual <anshuman.khandual@arm.com>
> > Cc: Peter Collingbourne <pcc@google.com>
> > Cc: Steven Price <steven.price@arm.com>
> > Cc: Yosry Ahmed <yosryahmed@google.com>
> > Cc: Peter Xu <peterx@redhat.com>
> > Cc: Lorenzo Stoakes <lstoakes@gmail.com>
> > Cc: "Mike Rapoport (IBM)" <rppt@kernel.org>
> > Cc: Hugh Dickins <hughd@google.com>
> > CC: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
> > Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
> > Signed-off-by: Barry Song <v-songbaohua@oppo.com>
> > Reviewed-by: Steven Price <steven.price@arm.com>
> > Acked-by: Chris Li <chrisl@kernel.org>
> > ---
> > arch/arm64/include/asm/pgtable.h | 19 ++------------
> > arch/arm64/mm/mteswap.c | 43 ++++++++++++++++++++++++++++++++
> > include/linux/huge_mm.h | 12 ---------
> > include/linux/pgtable.h | 2 +-
> > mm/page_io.c | 2 +-
> > mm/swap_slots.c | 2 +-
> > 6 files changed, 48 insertions(+), 32 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
> > index 401087e8a43d..7a54750770b8 100644
> > --- a/arch/arm64/include/asm/pgtable.h
> > +++ b/arch/arm64/include/asm/pgtable.h
> > @@ -45,12 +45,6 @@
> > __flush_tlb_range(vma, addr, end, PUD_SIZE, false, 1)
> > #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
> >
> > -static inline bool arch_thp_swp_supported(void)
> > -{
> > - return !system_supports_mte();
> > -}
> > -#define arch_thp_swp_supported arch_thp_swp_supported
> > -
> > /*
> > * Outside of a few very special situations (e.g. hibernation), we always
> > * use broadcast TLB invalidation instructions, therefore a spurious page
> > @@ -1095,12 +1089,7 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
> > #ifdef CONFIG_ARM64_MTE
> >
> > #define __HAVE_ARCH_PREPARE_TO_SWAP
> > -static inline int arch_prepare_to_swap(struct page *page)
> > -{
> > - if (system_supports_mte())
> > - return mte_save_tags(page);
> > - return 0;
> > -}
> > +extern int arch_prepare_to_swap(struct folio *folio);
> >
> > #define __HAVE_ARCH_SWAP_INVALIDATE
> > static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
> > @@ -1116,11 +1105,7 @@ static inline void arch_swap_invalidate_area(int type)
> > }
> >
> > #define __HAVE_ARCH_SWAP_RESTORE
> > -static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio)
> > -{
> > - if (system_supports_mte())
> > - mte_restore_tags(entry, &folio->page);
> > -}
> > +extern void arch_swap_restore(swp_entry_t entry, struct folio *folio);
> >
> > #endif /* CONFIG_ARM64_MTE */
> >
> > diff --git a/arch/arm64/mm/mteswap.c b/arch/arm64/mm/mteswap.c
> > index a31833e3ddc5..295836fef620 100644
> > --- a/arch/arm64/mm/mteswap.c
> > +++ b/arch/arm64/mm/mteswap.c
> > @@ -68,6 +68,13 @@ void mte_invalidate_tags(int type, pgoff_t offset)
> > mte_free_tag_storage(tags);
> > }
> >
> > +static inline void __mte_invalidate_tags(struct page *page)
> > +{
> > + swp_entry_t entry = page_swap_entry(page);
> > +
> > + mte_invalidate_tags(swp_type(entry), swp_offset(entry));
> > +}
> > +
> > void mte_invalidate_tags_area(int type)
> > {
> > swp_entry_t entry = swp_entry(type, 0);
> > @@ -83,3 +90,39 @@ void mte_invalidate_tags_area(int type)
> > }
> > xa_unlock(&mte_pages);
> > }
> > +
> > +int arch_prepare_to_swap(struct folio *folio)
> > +{
> > + long i, nr;
> > + int err;
> > +
> > + if (!system_supports_mte())
> > + return 0;
> > +
> > + nr = folio_nr_pages(folio);
> > +
> > + for (i = 0; i < nr; i++) {
> > + err = mte_save_tags(folio_page(folio, i));
> > + if (err)
> > + goto out;
> > + }
> > + return 0;
> > +
> > +out:
> > + while (i--)
> > + __mte_invalidate_tags(folio_page(folio, i));
> > + return err;
> > +}
> > +
> > +void arch_swap_restore(swp_entry_t entry, struct folio *folio)
>
> I'm still not a fan of the fact that entry could be anywhere within folio.
>
> > +{
> > + if (system_supports_mte()) {
>
> nit: if you do:
>
> if (!system_supports_mte())
> return;
Acked
>
> It will be consistent with arch_prepare_to_swap() and reduce the indentation of
> the main body.
>
> > + long i, nr = folio_nr_pages(folio);
> > +
> > + entry.val -= swp_offset(entry) & (nr - 1);
>
> This assumes that folios are always stored in swap with natural alignment. Is
> that definitely a safe assumption? My swap-out series is currently ensuring that
> folios are swapped-out naturally aligned, but that is an implementation detail.
>
I concur that this is an implementation detail. However, we should be
bold enough
to state that swap slots will be contiguous, considering we are
currently utilizing
folio->swap instead of subpage->swap ?
> Your cover note for swap-in says that you could technically swap in a large
> folio without it having been swapped-out large. If you chose to do that in
> future, this would break, right? I don't think it's good to couple the swap
Right. technically I agree. Given that we still have many tasks involving even
swapping in contiguous swap slots, it's unlikely that swapping in large folios
for non-contiguous entries will occur in the foreseeable future :-)
> storage layout to the folio order that you want to swap into. Perhaps that's an
> argument for passing each *page* to this function with its exact, corresponding
> swap entry?
I recall Matthew Wilcox strongly objected to using "page" as the
parameter, so I've
discarded that approach. Alternatively, it appears I can consistently pass
folio->swap to this function and ensure the function always retrieves
the first entry?
>
> > + for (i = 0; i < nr; i++) {
> > + mte_restore_tags(entry, folio_page(folio, i));
> > + entry.val++;
> > + }
> > + }
> > +}
> > diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h
> > index de0c89105076..e04b93c43965 100644
> > --- a/include/linux/huge_mm.h
> > +++ b/include/linux/huge_mm.h
> > @@ -535,16 +535,4 @@ static inline int split_folio_to_order(struct folio *folio, int new_order)
> > #define split_folio_to_list(f, l) split_folio_to_list_to_order(f, l, 0)
> > #define split_folio(f) split_folio_to_order(f, 0)
> >
> > -/*
> > - * archs that select ARCH_WANTS_THP_SWAP but don't support THP_SWP due to
> > - * limitations in the implementation like arm64 MTE can override this to
> > - * false
> > - */
> > -#ifndef arch_thp_swp_supported
> > -static inline bool arch_thp_swp_supported(void)
> > -{
> > - return true;
> > -}
> > -#endif
> > -
> > #endif /* _LINUX_HUGE_MM_H */
> > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
> > index e1b22903f709..bfcfe3386934 100644
> > --- a/include/linux/pgtable.h
> > +++ b/include/linux/pgtable.h
> > @@ -1106,7 +1106,7 @@ static inline int arch_unmap_one(struct mm_struct *mm,
> > * prototypes must be defined in the arch-specific asm/pgtable.h file.
> > */
> > #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
> > -static inline int arch_prepare_to_swap(struct page *page)
> > +static inline int arch_prepare_to_swap(struct folio *folio)
> > {
> > return 0;
> > }
> > diff --git a/mm/page_io.c b/mm/page_io.c
> > index ae2b49055e43..a9a7c236aecc 100644
> > --- a/mm/page_io.c
> > +++ b/mm/page_io.c
> > @@ -189,7 +189,7 @@ int swap_writepage(struct page *page, struct writeback_control *wbc)
> > * Arch code may have to preserve more data than just the page
> > * contents, e.g. memory tags.
> > */
> > - ret = arch_prepare_to_swap(&folio->page);
> > + ret = arch_prepare_to_swap(folio);
> > if (ret) {
> > folio_mark_dirty(folio);
> > folio_unlock(folio);
> > diff --git a/mm/swap_slots.c b/mm/swap_slots.c
> > index 90973ce7881d..53abeaf1371d 100644
> > --- a/mm/swap_slots.c
> > +++ b/mm/swap_slots.c
> > @@ -310,7 +310,7 @@ swp_entry_t folio_alloc_swap(struct folio *folio)
> > entry.val = 0;
> >
> > if (folio_test_large(folio)) {
> > - if (IS_ENABLED(CONFIG_THP_SWAP) && arch_thp_swp_supported())
> > + if (IS_ENABLED(CONFIG_THP_SWAP))
> > get_swap_pages(1, &entry, folio_nr_pages(folio));
> > goto out;
> > }
>
Thanks
Barry
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2] media: mediatek: vcodec: Handle invalid decoder vsi
From: AngeloGioacchino Del Regno @ 2024-03-21 8:35 UTC (permalink / raw)
To: Irui Wang, Hans Verkuil, Mauro Carvalho Chehab, Matthias Brugger,
Yunfei Dong, nicolas.dufresne, sebastian.fricke
Cc: Longfei Wang, Maoguang Meng, Project_Global_Chrome_Upstream_Group,
linux-media, linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <20240321014754.6540-1-irui.wang@mediatek.com>
Il 21/03/24 02:47, Irui Wang ha scritto:
> Handle invalid decoder vsi in vpu_dec_init to ensure the decoder vsi is
> valid for future use.
>
> Fixes: 590577a4e525 ("[media] vcodec: mediatek: Add Mediatek V4L2 Video Decoder Driver")
>
There shouldn't be extra lines between Fixes: and S-o-b: tags, but I guess this
can be fixed while applying the patch.
> Signed-off-by: Irui Wang <irui.wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 4/4] coresight-tpda: Add support multi-port input on TPDA
From: Tao Zhang @ 2024-03-21 8:32 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Tao Zhang, Jinlong Mao, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Trilok Soni, Song Chai, linux-arm-msm, andersson
In-Reply-To: <1711009927-17873-1-git-send-email-quic_taozha@quicinc.com>
Since the funnel supports multi-port output scenarios, there may
be more than one TPDM connected to one TPDA input port. In this
way, when reading the element size of the TPDM, TPDA driver needs
to find the correct TPDM corresponding to the input port. When
TPDA finds a TPDM on an input port, it read the device tree of
the TPDM and finds the configured TPDA input port number. If it
is the same as the input port number passed into the function,
then it is the correct TPDM that needs to be found.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
drivers/hwtracing/coresight/coresight-tpda.c | 27 +++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index 52b0201090fb..ba71e1ff18e3 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -84,6 +84,26 @@ static int tpdm_read_element_size(struct tpda_drvdata *drvdata,
return rc;
}
+/*
+ * Check if the parameter of the input port number in "tpda_get_element_size"
+ * is the same as the property of the TPDA input port number defined in the device
+ * tree.
+ * Return true if they are the same or the property is not read.
+ * Otherwise, return false.
+ */
+static bool is_tpda_inport_matched(struct coresight_device *csdev, u32 tpda_inport)
+{
+ int rc = -EINVAL;
+ u32 inport_nr;
+
+ rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent),
+ "qcom,tpda-input-port", &inport_nr);
+ if (!rc)
+ return (inport_nr == tpda_inport);
+
+ return true;
+}
+
/*
* Search and read element data size from the TPDM node in
* the devicetree. Each input port of TPDA is connected to
@@ -99,6 +119,10 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata,
int rc = 0;
int i;
struct coresight_device *in;
+ static u32 tpda_inport;
+
+ if (inport != -1)
+ tpda_inport = inport;
for (i = 0; i < csdev->pdata->nr_inconns; i++) {
in = csdev->pdata->in_conns[i]->src_dev;
@@ -110,7 +134,8 @@ static int tpda_get_element_size(struct tpda_drvdata *drvdata,
csdev->pdata->in_conns[i]->dest_port != inport)
continue;
- if (coresight_device_is_tpdm(in)) {
+ if (coresight_device_is_tpdm(in) &&
+ (is_tpda_inport_matched(in, tpda_inport))) {
if (drvdata->dsb_esize || drvdata->cmb_esize)
return -EEXIST;
rc = tpdm_read_element_size(drvdata, in);
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 3/4] dt-bindings: arm: qcom,coresight-tpdm: Mark tpda input port number
From: Tao Zhang @ 2024-03-21 8:32 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Tao Zhang, Jinlong Mao, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Trilok Soni, Song Chai, linux-arm-msm, andersson
In-Reply-To: <1711009927-17873-1-git-send-email-quic_taozha@quicinc.com>
Since the funnel supports multi-port output scenario, multiple
TPDMs may be connected to one TPDA. Add a new property
"qcom,tpda-input-port" to mark the input port number of the TPDA
in the device tree, TPDA driver can find out the right TPDM it needs
to search according to this new mark property.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
.../devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
index 8eec07d9d454..383c0f5a658b 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
@@ -77,6 +77,12 @@ properties:
minimum: 0
maximum: 32
+ qcom,tpda-input-port:
+ description:
+ Specifies the number of the input port on the corresponding TPDA.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+
clocks:
maxItems: 1
@@ -112,6 +118,7 @@ examples:
qcom,dsb-element-bits = <32>;
qcom,dsb-msrs-num = <16>;
+ qcom,tpda-input-port = <0>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
@@ -132,6 +139,7 @@ examples:
qcom,cmb-element-bits = <64>;
qcom,cmb-msrs-num = <32>;
+ qcom,tpda-input-port = <4>;
clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 2/4] coresight: Add support for multiple output ports on the funnel
From: Tao Zhang @ 2024-03-21 8:32 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Tao Zhang, Jinlong Mao, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Trilok Soni, Song Chai, linux-arm-msm, andersson
In-Reply-To: <1711009927-17873-1-git-send-email-quic_taozha@quicinc.com>
Funnel devices are now capable of supporting multiple-inputs and
multiple-outputs configuration with in built hardware filtering
for TPDM devices. Add software support to this function. Output
port is selected according to the source in the trace path.
The source of the input port on funnels will be marked in the
device tree.
e.g.
tpdm@xxxxxxx {
... ... ... ...
};
funnel_XXX: funnel@xxxxxxx {
... ... ... ...
out-ports {
... ... ... ...
port@x {
... ... ... ...
label = "xxxxxxx.tpdm"; <-- To label the source
}; corresponding to the output
... ... ... ... connection "port@x". And this
}; is a hardware static connections.
... ... ... ... Here needs to refer to hardware
}; design.
Then driver will parse the source label marked in the device tree, and
save it to the coresight path. When the function needs to know the
source label, it could obtain it from coresight path parameter. Finally,
the output port knows which source it corresponds to, and it also knows
which input port it corresponds to.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
drivers/hwtracing/coresight/coresight-core.c | 81 ++++++++++++++++---
.../hwtracing/coresight/coresight-platform.c | 5 ++
include/linux/coresight.h | 2 +
3 files changed, 75 insertions(+), 13 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 5dde597403b3..b1b5e6d9ec7a 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -113,15 +113,63 @@ struct coresight_device *coresight_get_percpu_sink(int cpu)
}
EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
+static struct coresight_device *coresight_get_source(struct list_head *path)
+{
+ struct coresight_device *csdev;
+
+ if (!path)
+ return NULL;
+
+ csdev = list_first_entry(path, struct coresight_node, link)->csdev;
+ if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
+ return NULL;
+
+ return csdev;
+}
+
+/**
+ * coresight_source_filter - checks whether the connection matches the source
+ * of path if connection is binded to specific source.
+ * @path: The list of devices
+ * @conn: The connection of one outport
+ *
+ * Return zero if the connection doesn't have a source binded or source of the
+ * path matches the source binds to connection.
+ */
+static int coresight_source_filter(struct list_head *path,
+ struct coresight_connection *conn)
+{
+ int ret = 0;
+ struct coresight_device *source = NULL;
+
+ if (conn->source_label == NULL)
+ return ret;
+
+ source = coresight_get_source(path);
+ if (source == NULL)
+ return ret;
+
+ if (strstr(kobject_get_path(&source->dev.kobj, GFP_KERNEL),
+ conn->source_label))
+ ret = 0;
+ else
+ ret = -1;
+
+ return ret;
+}
+
static struct coresight_connection *
coresight_find_out_connection(struct coresight_device *src_dev,
- struct coresight_device *dest_dev)
+ struct coresight_device *dest_dev,
+ struct list_head *path)
{
int i;
struct coresight_connection *conn;
for (i = 0; i < src_dev->pdata->nr_outconns; i++) {
conn = src_dev->pdata->out_conns[i];
+ if (coresight_source_filter(path, conn))
+ continue;
if (conn->dest_dev == dest_dev)
return conn;
}
@@ -312,7 +360,8 @@ static void coresight_disable_sink(struct coresight_device *csdev)
static int coresight_enable_link(struct coresight_device *csdev,
struct coresight_device *parent,
- struct coresight_device *child)
+ struct coresight_device *child,
+ struct list_head *path)
{
int ret = 0;
int link_subtype;
@@ -321,8 +370,8 @@ static int coresight_enable_link(struct coresight_device *csdev,
if (!parent || !child)
return -EINVAL;
- inconn = coresight_find_out_connection(parent, csdev);
- outconn = coresight_find_out_connection(csdev, child);
+ inconn = coresight_find_out_connection(parent, csdev, path);
+ outconn = coresight_find_out_connection(csdev, child, path);
link_subtype = csdev->subtype.link_subtype;
if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && IS_ERR(inconn))
@@ -341,7 +390,8 @@ static int coresight_enable_link(struct coresight_device *csdev,
static void coresight_disable_link(struct coresight_device *csdev,
struct coresight_device *parent,
- struct coresight_device *child)
+ struct coresight_device *child,
+ struct list_head *path)
{
int i;
int link_subtype;
@@ -350,8 +400,8 @@ static void coresight_disable_link(struct coresight_device *csdev,
if (!parent || !child)
return;
- inconn = coresight_find_out_connection(parent, csdev);
- outconn = coresight_find_out_connection(csdev, child);
+ inconn = coresight_find_out_connection(parent, csdev, path);
+ outconn = coresight_find_out_connection(csdev, child, path);
link_subtype = csdev->subtype.link_subtype;
if (link_ops(csdev)->disable) {
@@ -507,7 +557,7 @@ static void coresight_disable_path_from(struct list_head *path,
case CORESIGHT_DEV_TYPE_LINK:
parent = list_prev_entry(nd, link)->csdev;
child = list_next_entry(nd, link)->csdev;
- coresight_disable_link(csdev, parent, child);
+ coresight_disable_link(csdev, parent, child, path);
break;
default:
break;
@@ -588,7 +638,7 @@ int coresight_enable_path(struct list_head *path, enum cs_mode mode,
case CORESIGHT_DEV_TYPE_LINK:
parent = list_prev_entry(nd, link)->csdev;
child = list_next_entry(nd, link)->csdev;
- ret = coresight_enable_link(csdev, parent, child);
+ ret = coresight_enable_link(csdev, parent, child, path);
if (ret)
goto err;
break;
@@ -802,7 +852,8 @@ static void coresight_drop_device(struct coresight_device *csdev)
*/
static int _coresight_build_path(struct coresight_device *csdev,
struct coresight_device *sink,
- struct list_head *path)
+ struct list_head *path,
+ struct coresight_device *source)
{
int i, ret;
bool found = false;
@@ -814,7 +865,7 @@ static int _coresight_build_path(struct coresight_device *csdev,
if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
- if (_coresight_build_path(sink, sink, path) == 0) {
+ if (_coresight_build_path(sink, sink, path, source) == 0) {
found = true;
goto out;
}
@@ -825,8 +876,12 @@ static int _coresight_build_path(struct coresight_device *csdev,
struct coresight_device *child_dev;
child_dev = csdev->pdata->out_conns[i]->dest_dev;
+ if (csdev->pdata->out_conns[i]->source_label &&
+ !strstr(kobject_get_path(&source->dev.kobj, GFP_KERNEL),
+ csdev->pdata->out_conns[i]->source_label))
+ continue;
if (child_dev &&
- _coresight_build_path(child_dev, sink, path) == 0) {
+ _coresight_build_path(child_dev, sink, path, source) == 0) {
found = true;
break;
}
@@ -871,7 +926,7 @@ struct list_head *coresight_build_path(struct coresight_device *source,
INIT_LIST_HEAD(path);
- rc = _coresight_build_path(source, sink, path);
+ rc = _coresight_build_path(source, sink, path, source);
if (rc) {
kfree(path);
return ERR_PTR(rc);
diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c
index 9d550f5697fa..f553fb20966d 100644
--- a/drivers/hwtracing/coresight/coresight-platform.c
+++ b/drivers/hwtracing/coresight/coresight-platform.c
@@ -205,6 +205,7 @@ static int of_coresight_parse_endpoint(struct device *dev,
struct fwnode_handle *rdev_fwnode;
struct coresight_connection conn = {};
struct coresight_connection *new_conn;
+ const char *label;
do {
/* Parse the local port details */
@@ -243,6 +244,10 @@ static int of_coresight_parse_endpoint(struct device *dev,
conn.dest_fwnode = fwnode_handle_get(rdev_fwnode);
conn.dest_port = rendpoint.port;
+ conn.source_label = NULL;
+ if (!of_property_read_string(ep, "label", &label))
+ conn.source_label = label;
+
new_conn = coresight_add_out_conn(dev, pdata, &conn);
if (IS_ERR_VALUE(new_conn)) {
fwnode_handle_put(conn.dest_fwnode);
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index e8b6e388218c..a9c06ef9bbb2 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -167,6 +167,7 @@ struct coresight_desc {
* struct coresight_connection - representation of a single connection
* @src_port: a connection's output port number.
* @dest_port: destination's input port number @src_port is connected to.
+ * @source_label: source component's label.
* @dest_fwnode: destination component's fwnode handle.
* @dest_dev: a @coresight_device representation of the component
connected to @src_port. NULL until the device is created
@@ -195,6 +196,7 @@ struct coresight_desc {
struct coresight_connection {
int src_port;
int dest_port;
+ const char *source_label;
struct fwnode_handle *dest_fwnode;
struct coresight_device *dest_dev;
struct coresight_sysfs_link *link;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH 0/4] Add support for multi-port output on the funnel
From: Tao Zhang @ 2024-03-21 8:32 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Tao Zhang, Jinlong Mao, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Trilok Soni, Song Chai, linux-arm-msm, andersson
Funnel can support multi-port output in our hardware design. Since original
funnels only support a single output connection, the code needs to be
modified to support this new feature. The following is a typical topology
diagram of multi-port output of the funnels.
|---------| |---------| |---------| |---------| |---------|
| TPDM0 | | TPDM1 | | TPDM2 | | TPDM3 | | TPDM4 |
|---------| |---------| |---------| |---------| |---------|
| | | | |
| | | | |
| | | | |
|-----| |-----| |-----| |-----| |
| | | | |
| | | | |
[0]| |[1] [0]| |[1] |
\-------------/ \-------------/ \-------------/
\ FUNNEL0 / \ FUNNEL1 / \ FUNNEL2 /
----------- ----------- -----------
[0]| |[1] [0]| |[1] |
| |---------- | | |
| | | | |
|-------| | |------- | | |--------- |
| | | | |
| | | | |
[0]| |[1] |[2] |[3] |[4]
\ ---------------------------------------------------/
\ TPDA0 /
\ /
------------------------------------------------
For example, TPDM0 and TPDM1 are connected to the [0] and [1] input ports
of the funnel respectively, and output from the [0] and [1] output ports.
In this way, when data is output from the Funnel's output port, it needs
to know the source component corresponding to this output port. Our
solution is to add a property named "label" in the devicetree to mark the
source corresponding to the output port.
After introducing this new feature, another new problem also needs to be
solved. For example, TPDA driver will search for all the TPDMs on a input
port. In the topology diagram above, when TPDA searches for TPDM from the
input port[0], it will find TPDM0 and TPDM1. Our solution is to add a new
property named "qcom,tpda-input-port" to mark the input port number of the
TPDA in the devicetree.
Tao Zhang (4):
dt-bindings: arm: qcom,coresight-funnel: Add label for multi-ouput
coresight: Add support for multiple output ports on the funnel
dt-bindings: arm: qcom,coresight-tpdm: Mark tpda input port number
coresight-tpda: Add support multi-port input on TPDA
.../arm/arm,coresight-dynamic-funnel.yaml | 34 +++++++-
.../bindings/arm/qcom,coresight-tpdm.yaml | 8 ++
drivers/hwtracing/coresight/coresight-core.c | 81 ++++++++++++++++---
.../hwtracing/coresight/coresight-platform.c | 5 ++
drivers/hwtracing/coresight/coresight-tpda.c | 27 ++++++-
include/linux/coresight.h | 2 +
6 files changed, 139 insertions(+), 18 deletions(-)
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH 1/4] dt-bindings: arm: qcom,coresight-funnel: Add label for multi-ouput
From: Tao Zhang @ 2024-03-21 8:32 UTC (permalink / raw)
To: Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Konrad Dybcio, Mike Leach, Rob Herring, Krzysztof Kozlowski
Cc: Tao Zhang, Jinlong Mao, Leo Yan, Greg Kroah-Hartman, coresight,
linux-arm-kernel, linux-kernel, devicetree, Tingwei Zhang,
Yuanfang Zhang, Trilok Soni, Song Chai, linux-arm-msm, andersson
In-Reply-To: <1711009927-17873-1-git-send-email-quic_taozha@quicinc.com>
Add new property "label" to label the source corresponding to the
output connection. When the funnel supports multi-output, this
property needs to be introduced to mark which source component a
certain output connection corresponds to.
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
---
.../arm/arm,coresight-dynamic-funnel.yaml | 34 ++++++++++++++++---
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml
index 44a1041cb0fc..cde62c286d29 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml
@@ -66,13 +66,39 @@ properties:
$ref: /schemas/graph.yaml#/properties/port
out-ports:
- $ref: /schemas/graph.yaml#/properties/ports
- additionalProperties: false
-
+ type: object
properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
port:
+ type: object
+
+ patternProperties:
+ '^port(@[0-7])?$':
+ type: object
description: Output connection to CoreSight Trace bus
- $ref: /schemas/graph.yaml#/properties/port
+
+ patternProperties:
+ "^endpoint(@[0-9a-f]+)?$":
+ type: object
+ properties:
+ remote-endpoint:
+ description: |
+ phandle to an 'endpoint' subnode of a remote device node.
+ $ref: /schemas/types.yaml#/definitions/phandle
+ label:
+ description: Label the source corresponding to the output connection
+ $ref: /schemas/types.yaml#/definitions/string
+ oneOf:
+ - required:
+ - port
+ - required:
+ - "#address-cells"
+ - "#size-cells"
required:
- compatible
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 3/4] arm64: dts: rockchip: Add VEPU121 to rk3588
From: Krzysztof Kozlowski @ 2024-03-21 8:15 UTC (permalink / raw)
To: Emmanuel Gil Peyrot, linux-kernel
Cc: Ezequiel Garcia, Philipp Zabel, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Joerg Roedel, Will Deacon, Robin Murphy, Sebastian Reichel,
Cristian Ciocaltea, Dragan Simic, Shreeya Patel, Chris Morgan,
Andy Yan, Nicolas Frattaroli, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, iommu
In-Reply-To: <20240320173736.2720778-4-linkmauve@linkmauve.fr>
On 20/03/2024 18:37, Emmanuel Gil Peyrot wrote:
> The TRM (version 1.0 page 385) lists five VEPU121 cores, but only four
> interrupts are listed (on page 24), so I’ve only enabled four of them
> for now.
>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 80 +++++++++++++++++++++++
> 1 file changed, 80 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 2a23b4dc36e4..fe77b56ac9a0 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -2488,6 +2488,86 @@ gpio4: gpio@fec50000 {
> };
> };
>
> + jpeg_enc0: video-codec@fdba0000 {
> + compatible = "rockchip,rk3588-vepu121";
> + reg = <0x0 0xfdba0000 0x0 0x800>;
> + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&cru ACLK_JPEG_ENCODER0>, <&cru HCLK_JPEG_ENCODER0>;
> + clock-names = "aclk", "hclk";
> + iommus = <&jpeg_enc0_mmu>;
> + power-domains = <&power RK3588_PD_VDPU>;
> + };
> +
> + jpeg_enc0_mmu: iommu@fdba0800 {
> + compatible = "rockchip,rk3588-iommu";
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v10 11/11] usb: chipidea: ci_hdrc_imx: align usb wakeup clock name with dt-bindings
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
The dt-bindings is going to use "usb_wakeup" as wakup clock name. This will
align the change with dt-bindings.
Acked-by: Peter Chen <peter.chen@kernel.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v5:
- new patch
Changes in v6:
- add Acked-by tag
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
drivers/usb/chipidea/ci_hdrc_imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c
index ae9a6a17ec6e..a17b6d619305 100644
--- a/drivers/usb/chipidea/ci_hdrc_imx.c
+++ b/drivers/usb/chipidea/ci_hdrc_imx.c
@@ -212,7 +212,7 @@ static int imx_get_clks(struct device *dev)
/* Get wakeup clock. Not all of the platforms need to
* handle this clock. So make it optional.
*/
- data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup_clk");
+ data->clk_wakeup = devm_clk_get_optional(dev, "usb_wakeup");
if (IS_ERR(data->clk_wakeup))
ret = dev_err_probe(dev, PTR_ERR(data->clk_wakeup),
"Failed to get wakeup clk\n");
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 10/11] arm64: dts: imx8m* remove clock-names property from usb controller node
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
The clock-names property is not needed by usb controller node on imx8mm/n.
This will remove it.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v9:
- new patch
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 2 --
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 1 -
2 files changed, 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 8a1b42b94dce..696e96b15585 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1253,7 +1253,6 @@ usbotg1: usb@32e40000 {
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop1>;
@@ -1274,7 +1273,6 @@ usbotg2: usb@32e50000 {
reg = <0x32e50000 0x200>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop2>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 136e75c51251..f67816758b21 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -1213,7 +1213,6 @@ usbotg1: usb@32e40000 {
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>;
- clock-names = "usb1_ctrl_root_clk";
assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
phys = <&usbphynop1>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 09/11] arm64: dts: imx93-11x11-evk: enable usb and typec nodes
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v2:
- remove status property in ptn5110 nodes
- fix dt-schema warnings
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- use compatible "nxp,ptn5110", "tcpci"
Changes in v10:
- no changes
---
.../boot/dts/freescale/imx93-11x11-evk.dts | 118 ++++++++++++++++++
1 file changed, 118 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 9921ea13ab48..ecc01d872e95 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include <dt-bindings/usb/pd.h>
#include "imx93.dtsi"
/ {
@@ -104,6 +105,80 @@ &mu2 {
status = "okay";
};
+&lpi2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c3>;
+ pinctrl-1 = <&pinctrl_lpi2c3>;
+ status = "okay";
+
+ ptn5110: tcpc@50 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x50>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ typec1_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ op-sink-microwatt = <15000000>;
+ self-powered;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec1_dr_sw: endpoint {
+ remote-endpoint = <&usb1_drd_sw>;
+ };
+ };
+ };
+ };
+ };
+
+ ptn5110_2: tcpc@51 {
+ compatible = "nxp,ptn5110", "tcpci";
+ reg = <0x51>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+
+ typec2_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ op-sink-microwatt = <15000000>;
+ self-powered;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ typec2_dr_sw: endpoint {
+ remote-endpoint = <&usb2_drd_sw>;
+ };
+ };
+ };
+ };
+ };
+};
+
&eqos {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eqos>;
@@ -156,6 +231,42 @@ &lpuart5 {
status = "okay";
};
+&usbotg1 {
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+ disable-over-current;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ status = "okay";
+
+ port {
+ usb1_drd_sw: endpoint {
+ remote-endpoint = <&typec1_dr_sw>;
+ };
+ };
+};
+
+&usbotg2 {
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+ disable-over-current;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ status = "okay";
+
+ port {
+ usb2_drd_sw: endpoint {
+ remote-endpoint = <&typec2_dr_sw>;
+ };
+ };
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -222,6 +333,13 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
>;
};
+ pinctrl_lpi2c3: lpi2c3grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 08/11] arm64: dts: imx93: add usb nodes
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
There are 2 USB controllers on i.MX93. Add them.
Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # TQMa9352LA/CA
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v2:
- fix format as suggested by Alexander
- change compatible from fsl,imx8mm-usb to fsl,imx93-usb
Changes in v3:
- replace deprecated fsl,usbphy with phys as suggested by Alexander
- reorder nodes
Changes in v4:
- fix the alignment
Changes in v5:
- rename usb_wakeup_clk to usb_wakeup
Changes in v6:
- rename usb_ctrl_root_clk to usb_ctrl_root
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 58 ++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 8f2e7c42ad6e..4a7efccb4f67 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -183,6 +183,20 @@ mqs2: mqs2 {
status = "disabled";
};
+ usbphynop1: usbphynop1 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+ clock-names = "main_clk";
+ };
+
+ usbphynop2: usbphynop2 {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
+ clock-names = "main_clk";
+ };
+
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -1167,6 +1181,50 @@ media_blk_ctrl: system-controller@4ac10000 {
status = "disabled";
};
+ usbotg1: usb@4c100000 {
+ compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x4c100000 0x200>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+ <&clk IMX93_CLK_HSIO_32K_GATE>;
+ clock-names = "usb_ctrl_root", "usb_wakeup";
+ assigned-clocks = <&clk IMX93_CLK_HSIO>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+ assigned-clock-rates = <133000000>;
+ phys = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@4c100200 {
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ reg = <0x4c100200 0x200>;
+ #index-cells = <1>;
+ };
+
+ usbotg2: usb@4c200000 {
+ compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x4c200000 0x200>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
+ <&clk IMX93_CLK_HSIO_32K_GATE>;
+ clock-names = "usb_ctrl_root", "usb_wakeup";
+ assigned-clocks = <&clk IMX93_CLK_HSIO>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+ assigned-clock-rates = <133000000>;
+ phys = <&usbphynop2>;
+ fsl,usbmisc = <&usbmisc2 0>;
+ status = "disabled";
+ };
+
+ usbmisc2: usbmisc@4c200200 {
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ reg = <0x4c200200 0x200>;
+ #index-cells = <1>;
+ };
+
ddr-pmu@4e300dc0 {
compatible = "fsl,imx93-ddr-pmu";
reg = <0x4e300dc0 0x200>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 07/11] ARM: dts: imx6: remove fsl,anatop property from usb controller node
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
This property is not needed for usb controller. The usb phy needs it
instead.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v7:
- new patch
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- not remove fsl,anatop for imx6ul.dtsi since it's already removed
---
arch/arm/boot/dts/nxp/imx/imx6sll.dtsi | 1 -
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 --
2 files changed, 3 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
index 3659fd5ecfa6..ddeb5b37fb78 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sll.dtsi
@@ -683,7 +683,6 @@ usbotg1: usb@2184000 {
clocks = <&clks IMX6SLL_CLK_USBOH3>;
fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>;
- fsl,anatop = <&anatop>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
index df3a375f0a3e..b8d95957ca09 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
@@ -929,7 +929,6 @@ usbotg1: usb@2184000 {
clocks = <&clks IMX6SX_CLK_USBOH3>;
fsl,usbphy = <&usbphy1>;
fsl,usbmisc = <&usbmisc 0>;
- fsl,anatop = <&anatop>;
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
rx-burst-size-dword = <0x10>;
@@ -957,7 +956,6 @@ usbh: usb@2184400 {
fsl,usbphy = <&usbphynop1>;
fsl,usbmisc = <&usbmisc 2>;
phy_type = "hsic";
- fsl,anatop = <&anatop>;
dr_mode = "host";
ahb-burst-config = <0x0>;
tx-burst-size-dword = <0x10>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH 2/4] media: dt-binding: media: Document rk3588’s vepu121
From: Krzysztof Kozlowski @ 2024-03-21 8:14 UTC (permalink / raw)
To: Emmanuel Gil Peyrot, linux-kernel
Cc: Ezequiel Garcia, Philipp Zabel, Mauro Carvalho Chehab,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
Joerg Roedel, Will Deacon, Robin Murphy, Sebastian Reichel,
Cristian Ciocaltea, Dragan Simic, Shreeya Patel, Chris Morgan,
Andy Yan, Nicolas Frattaroli, linux-media, linux-rockchip,
devicetree, linux-arm-kernel, iommu
In-Reply-To: <20240320173736.2720778-3-linkmauve@linkmauve.fr>
On 20/03/2024 18:37, Emmanuel Gil Peyrot wrote:
> This encoder-only device is present four times on this SoC, and should
> support everything the rk3568 vepu supports (so JPEG, H.264 and VP8
> encoding).
>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> .../devicetree/bindings/media/rockchip,rk3568-vepu.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> index 9d90d8d0565a..947ad699cc5e 100644
> --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml
> @@ -17,6 +17,7 @@ properties:
> compatible:
> enum:
> - rockchip,rk3568-vepu
> + - rockchip,rk3588-vepu121
What is 121?
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v10 04/11] dt-bindings: usb: chipidea,usb2-imx: move imx parts to dedicated schema
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
As more and more NXP i.MX chips come out, it becomes harder to maintain
ci-hdrc-usb2.yaml if more stuffs like property restrictions are added to
this file. This will separate i.MX parts out of ci-hdrc-usb2.yaml and add
a new schema for NXP ChipIdea USB2 Controller, also add a common schema.
1. Copy common ci-hdrc-usb2.yaml properties to a new shared
chipidea,usb2-common.yaml schema.
2. Move fsl,* compatible devices and imx spefific properties
to dedicated binding file chipidea,usb2-imx.yaml.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v6:
- new patch
Changes in v7:
- not remove ci-hdrc-usb2.yaml and move imx parts to ci-hdrc-usb2-imx.yaml
Changes in v8:
- rename yaml name to chipidea,usb2-common.yaml and chipidea,usb2-imx.yaml
- remove common properties from ci-hdrc-usb2.yaml
- add new end line to chipidea,usb2-common.yaml
- remove fsl,anatop since it's not needed by controller
- fix pinctrl-names formats
Changes in v9:
- add Rb tag
Changes in v10:
- no changes
---
.../bindings/usb/chipidea,usb2-common.yaml | 200 ++++++++++
.../bindings/usb/chipidea,usb2-imx.yaml | 193 ++++++++++
.../devicetree/bindings/usb/ci-hdrc-usb2.yaml | 360 +-----------------
3 files changed, 396 insertions(+), 357 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
create mode 100644 Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
new file mode 100644
index 000000000000..d2a7d2ecf48a
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-common.yaml
@@ -0,0 +1,200 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: USB2 ChipIdea USB controller Common Properties
+
+maintainers:
+ - Xu Yang <xu.yang_2@nxp.com>
+
+properties:
+ reg:
+ minItems: 1
+ maxItems: 2
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+
+ dr_mode: true
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ maxItems: 1
+
+ "#reset-cells":
+ const: 1
+
+ phy_type: true
+
+ itc-setting:
+ description:
+ interrupt threshold control register control, the setting should be
+ aligned with ITC bits at register USBCMD.
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ ahb-burst-config:
+ description:
+ it is vendor dependent, the required value should be aligned with
+ AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
+ used to change AHB burst configuration, check the chipidea spec for
+ meaning of each value. If this property is not existed, it will use
+ the reset value.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x7
+
+ tx-burst-size-dword:
+ description:
+ it is vendor dependent, the tx burst size in dword (4 bytes), This
+ register represents the maximum length of a the burst in 32-bit
+ words while moving data from system memory to the USB bus, the value
+ of this property will only take effect if property "ahb-burst-config"
+ is set to 0, if this property is missing the reset default of the
+ hardware implementation will be used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x20
+
+ rx-burst-size-dword:
+ description:
+ it is vendor dependent, the rx burst size in dword (4 bytes), This
+ register represents the maximum length of a the burst in 32-bit words
+ while moving data from the USB bus to system memory, the value of
+ this property will only take effect if property "ahb-burst-config"
+ is set to 0, if this property is missing the reset default of the
+ hardware implementation will be used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x20
+
+ extcon:
+ description:
+ Phandles to external connector devices. First phandle should point
+ to external connector, which provide "USB" cable events, the second
+ should point to external connector device, which provide "USB-HOST"
+ cable events. If one of the external connector devices is not
+ required, empty <0> phandle should be specified.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ minItems: 1
+ items:
+ - description: vbus extcon
+ - description: id extcon
+
+ phy-clkgate-delay-us:
+ description:
+ The delay time (us) between putting the PHY into low power mode and
+ gating the PHY clock.
+
+ non-zero-ttctrl-ttha:
+ description:
+ After setting this property, the value of register ttctrl.ttha
+ will be 0x7f; if not, the value will be 0x0, this is the default
+ value. It needs to be very carefully for setting this property, it
+ is recommended that consult with your IC engineer before setting
+ this value. On the most of chipidea platforms, the "usage_tt" flag
+ at RTL is 0, so this property only affects siTD.
+
+ If this property is not set, the max packet size is 1023 bytes, and
+ if the total of packet size for previous transactions are more than
+ 256 bytes, it can't accept any transactions within this frame. The
+ use case is single transaction, but higher frame rate.
+
+ If this property is set, the max packet size is 188 bytes, it can
+ handle more transactions than above case, it can accept transactions
+ until it considers the left room size within frame is less than 188
+ bytes, software needs to make sure it does not send more than 90%
+ maximum_periodic_data_per_frame. The use case is multiple
+ transactions, but less frame rate.
+ type: boolean
+
+ mux-controls:
+ description:
+ The mux control for toggling host/device output of this controller.
+ It's expected that a mux state of 0 indicates device mode and a mux
+ state of 1 indicates host mode.
+ maxItems: 1
+
+ mux-control-names:
+ const: usb_switch
+
+ pinctrl-names:
+ description:
+ Names for optional pin modes in "default", "host", "device".
+ In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
+ In this case, the "idle" state needs to pull down the data and
+ strobe pin and the "active" state needs to pull up the strobe pin.
+ oneOf:
+ - items:
+ - const: idle
+ - const: active
+ - items:
+ - const: default
+ - const: host
+ - const: device
+ - items:
+ - const: default
+ - enum:
+ - host
+ - device
+ - items:
+ - const: default
+
+ pinctrl-0:
+ maxItems: 1
+
+ pinctrl-1:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: usb-phy
+
+ vbus-supply:
+ description: reference to the VBUS regulator.
+
+ usb-phy:
+ description: phandle for the PHY device. Use "phys" instead.
+ maxItems: 1
+ deprecated: true
+
+ port:
+ description:
+ Any connector to the data bus of this controller should be modelled
+ using the OF graph bindings specified, if the "usb-role-switch"
+ property is used.
+ $ref: /schemas/graph.yaml#/properties/port
+
+ reset-gpios:
+ maxItems: 1
+
+dependencies:
+ port: [ usb-role-switch ]
+ mux-controls: [ mux-control-names ]
+
+required:
+ - reg
+ - interrupts
+
+allOf:
+ - $ref: usb-hcd.yaml#
+ - $ref: usb-drd.yaml#
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
new file mode 100644
index 000000000000..cdbb224e9f68
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -0,0 +1,193 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP USB2 ChipIdea USB controller
+
+maintainers:
+ - Xu Yang <xu.yang_2@nxp.com>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx23-usb
+ - fsl,imx25-usb
+ - fsl,imx28-usb
+ - fsl,imx35-usb
+ - fsl,imx50-usb
+ - fsl,imx51-usb
+ - fsl,imx53-usb
+ - fsl,imx6q-usb
+ - fsl,imx6sl-usb
+ - fsl,imx6sx-usb
+ - fsl,imx6ul-usb
+ - fsl,imx7d-usb
+ - fsl,vf610-usb
+ - const: fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx8dxl-usb
+ - fsl,imx8ulp-usb
+ - const: fsl,imx7ulp-usb
+ - const: fsl,imx6ul-usb
+ - items:
+ - enum:
+ - fsl,imx8mm-usb
+ - fsl,imx8mn-usb
+ - const: fsl,imx7d-usb
+ - const: fsl,imx27-usb
+ - items:
+ - enum:
+ - fsl,imx6sll-usb
+ - fsl,imx7ulp-usb
+ - const: fsl,imx6ul-usb
+ - const: fsl,imx27-usb
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+
+ fsl,usbmisc:
+ description:
+ Phandler of non-core register device, with one argument that
+ indicate usb controller index
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to usbmisc node
+ - description: index of usb controller
+
+ disable-over-current:
+ type: boolean
+ description: disable over current detect
+
+ over-current-active-low:
+ type: boolean
+ description: over current signal polarity is active low
+
+ over-current-active-high:
+ type: boolean
+ description:
+ Over current signal polarity is active high. It's recommended to
+ specify the over current polarity.
+
+ power-active-high:
+ type: boolean
+ description: power signal polarity is active high
+
+ external-vbus-divider:
+ type: boolean
+ description: enables off-chip resistor divider for Vbus
+
+ samsung,picophy-pre-emp-curr-control:
+ description:
+ HS Transmitter Pre-Emphasis Current Control. This signal controls
+ the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
+ pins after a J-to-K or K-to-J transition. The range is from 0x0 to
+ 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
+ bits of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0x3
+
+ samsung,picophy-dc-vol-level-adjust:
+ description:
+ HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
+ level voltage. The range is from 0x0 to 0xf, the default value is
+ 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0x0
+ maximum: 0xf
+
+ fsl,picophy-rise-fall-time-adjust:
+ description:
+ HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
+ of the high-speed transmitter waveform. It has no unit. The rise/fall
+ time will be increased or decreased by a certain percentage relative
+ to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
+ Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 3
+ default: 1
+
+ fsl,usbphy:
+ description: phandle of usb phy that connects to the port. Use "phys" instead.
+ $ref: /schemas/types.yaml#/definitions/phandle
+ deprecated: true
+
+required:
+ - compatible
+
+allOf:
+ - $ref: chipidea,usb2-common.yaml#
+ - if:
+ properties:
+ phy_type:
+ const: hsic
+ required:
+ - phy_type
+ then:
+ properties:
+ pinctrl-names:
+ items:
+ - const: idle
+ - const: active
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/imx7d-clock.h>
+
+ usb@30b10000 {
+ compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
+ reg = <0x30b10000 0x200>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_USB_CTRL_CLK>;
+ fsl,usbphy = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ phy-clkgate-delay-us = <400>;
+ };
+
+ # Example for HSIC:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/imx6qdl-clock.h>
+
+ usb@2184400 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184400 0x200>;
+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6QDL_CLK_USBOH3>;
+ fsl,usbphy = <&usbphynop1>;
+ fsl,usbmisc = <&usbmisc 2>;
+ phy_type = "hsic";
+ dr_mode = "host";
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x10>;
+ rx-burst-size-dword = <0x10>;
+ pinctrl-names = "idle", "active";
+ pinctrl-0 = <&pinctrl_usbh2_idle>;
+ pinctrl-1 = <&pinctrl_usbh2_active>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet@1 {
+ compatible = "usb424,9730";
+ reg = <1>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
index 3b56e0edb1c6..cc5787a8cfa3 100644
--- a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
+++ b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml
@@ -15,7 +15,6 @@ properties:
oneOf:
- enum:
- chipidea,usb2
- - fsl,imx27-usb
- lsi,zevio-usb
- nuvoton,npcm750-udc
- nvidia,tegra20-ehci
@@ -31,40 +30,6 @@ properties:
- nvidia,tegra124-ehci
- nvidia,tegra210-ehci
- const: nvidia,tegra30-ehci
- - items:
- - enum:
- - fsl,imx23-usb
- - fsl,imx25-usb
- - fsl,imx28-usb
- - fsl,imx35-usb
- - fsl,imx50-usb
- - fsl,imx51-usb
- - fsl,imx53-usb
- - fsl,imx6q-usb
- - fsl,imx6sl-usb
- - fsl,imx6sx-usb
- - fsl,imx6ul-usb
- - fsl,imx7d-usb
- - fsl,vf610-usb
- - const: fsl,imx27-usb
- - items:
- - enum:
- - fsl,imx8dxl-usb
- - fsl,imx8ulp-usb
- - const: fsl,imx7ulp-usb
- - const: fsl,imx6ul-usb
- - items:
- - enum:
- - fsl,imx8mm-usb
- - fsl,imx8mn-usb
- - const: fsl,imx7d-usb
- - const: fsl,imx27-usb
- - items:
- - enum:
- - fsl,imx6sll-usb
- - fsl,imx7ulp-usb
- - const: fsl,imx6ul-usb
- - const: fsl,imx27-usb
- items:
- const: xlnx,zynq-usb-2.20a
- const: chipidea,usb2
@@ -73,163 +38,18 @@ properties:
- nuvoton,npcm845-udc
- const: nuvoton,npcm750-udc
- reg:
- minItems: 1
- maxItems: 2
-
- interrupts:
- minItems: 1
- maxItems: 2
-
clocks:
minItems: 1
- maxItems: 3
+ maxItems: 2
clock-names:
minItems: 1
- maxItems: 3
-
- dr_mode: true
-
- power-domains:
- maxItems: 1
-
- resets:
- maxItems: 1
-
- reset-names:
- maxItems: 1
-
- "#reset-cells":
- const: 1
-
- phy_type: true
-
- itc-setting:
- description:
- interrupt threshold control register control, the setting should be
- aligned with ITC bits at register USBCMD.
- $ref: /schemas/types.yaml#/definitions/uint32
-
- ahb-burst-config:
- description:
- it is vendor dependent, the required value should be aligned with
- AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is
- used to change AHB burst configuration, check the chipidea spec for
- meaning of each value. If this property is not existed, it will use
- the reset value.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x7
-
- tx-burst-size-dword:
- description:
- it is vendor dependent, the tx burst size in dword (4 bytes), This
- register represents the maximum length of a the burst in 32-bit
- words while moving data from system memory to the USB bus, the value
- of this property will only take effect if property "ahb-burst-config"
- is set to 0, if this property is missing the reset default of the
- hardware implementation will be used.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x20
-
- rx-burst-size-dword:
- description:
- it is vendor dependent, the rx burst size in dword (4 bytes), This
- register represents the maximum length of a the burst in 32-bit words
- while moving data from the USB bus to system memory, the value of
- this property will only take effect if property "ahb-burst-config"
- is set to 0, if this property is missing the reset default of the
- hardware implementation will be used.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x20
-
- extcon:
- description:
- Phandles to external connector devices. First phandle should point
- to external connector, which provide "USB" cable events, the second
- should point to external connector device, which provide "USB-HOST"
- cable events. If one of the external connector devices is not
- required, empty <0> phandle should be specified.
- $ref: /schemas/types.yaml#/definitions/phandle-array
- minItems: 1
- items:
- - description: vbus extcon
- - description: id extcon
-
- phy-clkgate-delay-us:
- description:
- The delay time (us) between putting the PHY into low power mode and
- gating the PHY clock.
-
- non-zero-ttctrl-ttha:
- description:
- After setting this property, the value of register ttctrl.ttha
- will be 0x7f; if not, the value will be 0x0, this is the default
- value. It needs to be very carefully for setting this property, it
- is recommended that consult with your IC engineer before setting
- this value. On the most of chipidea platforms, the "usage_tt" flag
- at RTL is 0, so this property only affects siTD.
-
- If this property is not set, the max packet size is 1023 bytes, and
- if the total of packet size for previous transactions are more than
- 256 bytes, it can't accept any transactions within this frame. The
- use case is single transaction, but higher frame rate.
-
- If this property is set, the max packet size is 188 bytes, it can
- handle more transactions than above case, it can accept transactions
- until it considers the left room size within frame is less than 188
- bytes, software needs to make sure it does not send more than 90%
- maximum_periodic_data_per_frame. The use case is multiple
- transactions, but less frame rate.
- type: boolean
-
- mux-controls:
- description:
- The mux control for toggling host/device output of this controller.
- It's expected that a mux state of 0 indicates device mode and a mux
- state of 1 indicates host mode.
- maxItems: 1
-
- mux-control-names:
- const: usb_switch
+ maxItems: 2
operating-points-v2:
description: A phandle to the OPP table containing the performance states.
$ref: /schemas/types.yaml#/definitions/phandle
- pinctrl-names:
- description:
- Names for optional pin modes in "default", "host", "device".
- In case of HSIC-mode, "idle" and "active" pin modes are mandatory.
- In this case, the "idle" state needs to pull down the data and
- strobe pin and the "active" state needs to pull up the strobe pin.
- oneOf:
- - items:
- - const: idle
- - const: active
- - items:
- - const: default
- - enum:
- - host
- - device
- - items:
- - const: default
-
- pinctrl-0:
- maxItems: 1
-
- pinctrl-1:
- maxItems: 1
-
- phys:
- maxItems: 1
-
- phy-names:
- const: usb-phy
-
phy-select:
description:
Phandler of TCSR node with two argument that indicate register
@@ -240,87 +60,6 @@ properties:
- description: register offset
- description: phy index
- vbus-supply:
- description: reference to the VBUS regulator.
-
- fsl,usbmisc:
- description:
- Phandler of non-core register device, with one argument that
- indicate usb controller index
- $ref: /schemas/types.yaml#/definitions/phandle-array
- items:
- - items:
- - description: phandle to usbmisc node
- - description: index of usb controller
-
- fsl,anatop:
- description: phandle for the anatop node.
- $ref: /schemas/types.yaml#/definitions/phandle
-
- disable-over-current:
- type: boolean
- description: disable over current detect
-
- over-current-active-low:
- type: boolean
- description: over current signal polarity is active low
-
- over-current-active-high:
- type: boolean
- description:
- Over current signal polarity is active high. It's recommended to
- specify the over current polarity.
-
- power-active-high:
- type: boolean
- description: power signal polarity is active high
-
- external-vbus-divider:
- type: boolean
- description: enables off-chip resistor divider for Vbus
-
- samsung,picophy-pre-emp-curr-control:
- description:
- HS Transmitter Pre-Emphasis Current Control. This signal controls
- the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN
- pins after a J-to-K or K-to-J transition. The range is from 0x0 to
- 0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0
- bits of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0x3
-
- samsung,picophy-dc-vol-level-adjust:
- description:
- HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC
- level voltage. The range is from 0x0 to 0xf, the default value is
- 0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0x0
- maximum: 0xf
-
- fsl,picophy-rise-fall-time-adjust:
- description:
- HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
- of the high-speed transmitter waveform. It has no unit. The rise/fall
- time will be increased or decreased by a certain percentage relative
- to design default time. (0:-10%; 1:design default; 2:+15%; 3:+20%)
- Details can refer to TXRISETUNE0 bit of USBNC_n_PHY_CFG1.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 3
- default: 1
-
- usb-phy:
- description: phandle for the PHY device. Use "phys" instead.
- maxItems: 1
- deprecated: true
-
- fsl,usbphy:
- description: phandle of usb phy that connects to the port. Use "phys" instead.
- $ref: /schemas/types.yaml#/definitions/phandle
- deprecated: true
-
nvidia,phy:
description: phandle of usb phy that connects to the port. Use "phys" instead.
$ref: /schemas/types.yaml#/definitions/phandle
@@ -331,16 +70,6 @@ properties:
type: boolean
deprecated: true
- port:
- description:
- Any connector to the data bus of this controller should be modelled
- using the OF graph bindings specified, if the "usb-role-switch"
- property is used.
- $ref: /schemas/graph.yaml#/properties/port
-
- reset-gpios:
- maxItems: 1
-
ulpi:
type: object
additionalProperties: false
@@ -350,67 +79,13 @@ properties:
type: object
$ref: /schemas/phy/qcom,usb-hs-phy.yaml
-dependencies:
- port: [ usb-role-switch ]
- mux-controls: [ mux-control-names ]
-
required:
- compatible
- - reg
- - interrupts
allOf:
+ - $ref: chipidea,usb2-common.yaml#
- $ref: usb-hcd.yaml#
- $ref: usb-drd.yaml#
- - if:
- properties:
- phy_type:
- const: hsic
- required:
- - phy_type
- then:
- properties:
- pinctrl-names:
- items:
- - const: idle
- - const: active
- else:
- properties:
- pinctrl-names:
- minItems: 1
- maxItems: 2
- oneOf:
- - items:
- - const: default
- - enum:
- - host
- - device
- - items:
- - const: default
- - if:
- properties:
- compatible:
- contains:
- enum:
- - chipidea,usb2
- - lsi,zevio-usb
- - nuvoton,npcm750-udc
- - nvidia,tegra20-udc
- - nvidia,tegra30-udc
- - nvidia,tegra114-udc
- - nvidia,tegra124-udc
- - qcom,ci-hdrc
- - xlnx,zynq-usb-2.20a
- then:
- properties:
- fsl,usbmisc: false
- disable-over-current: false
- over-current-active-low: false
- over-current-active-high: false
- power-active-high: false
- external-vbus-divider: false
- samsung,picophy-pre-emp-curr-control: false
- samsung,picophy-dc-vol-level-adjust: false
unevaluatedProperties: false
@@ -438,33 +113,4 @@ examples:
mux-control-names = "usb_switch";
};
- # Example for HSIC:
- - |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/imx6qdl-clock.h>
-
- usb@2184400 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184400 0x200>;
- interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_USBOH3>;
- fsl,usbphy = <&usbphynop1>;
- fsl,usbmisc = <&usbmisc 2>;
- phy_type = "hsic";
- dr_mode = "host";
- ahb-burst-config = <0x0>;
- tx-burst-size-dword = <0x10>;
- rx-burst-size-dword = <0x10>;
- pinctrl-names = "idle", "active";
- pinctrl-0 = <&pinctrl_usbh2_idle>;
- pinctrl-1 = <&pinctrl_usbh2_active>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethernet@1 {
- compatible = "usb424,9730";
- reg = <1>;
- };
- };
-
...
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 05/11] dt-bindings: usb: ci-hdrc-usb2-imx: add restrictions for reg, interrupts, clock and clock-names properties
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
Add restrictions for reg, interrupts, clock and clock-names properties
for imx Socs.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v4:
- new patch since v3's discussion
- split the reg, interrupts, clock and clock-names properties into
common part and device-specific
Changes in v5:
- keep common property unchanged
- make if-then more readable
- remove non imx part
Changes in v6:
- new patch based on ci-hdrc-usb2-imx.yaml
Changes in v7:
- no changes
Changes in v8:
- remove if:else:if:else:if:else block
Changes in v9:
- remove maxItems
- make clock-names if it's not needed
Changes in v10:
- add Rb tag
---
.../bindings/usb/chipidea,usb2-imx.yaml | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
index cdbb224e9f68..e2eb60eaf6fe 100644
--- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -49,6 +49,12 @@ properties:
- const: fsl,imx6ul-usb
- const: fsl,imx27-usb
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
clocks:
minItems: 1
maxItems: 3
@@ -144,6 +150,76 @@ allOf:
- const: idle
- const: active
+ # imx27 Soc needs three clocks
+ - if:
+ properties:
+ compatible:
+ const: fsl,imx27-usb
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: ipg
+ - const: ahb
+ - const: per
+
+ # imx25 and imx35 Soc need three clocks
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx25-usb
+ - fsl,imx35-usb
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ clock-names:
+ items:
+ - const: ipg
+ - const: ahb
+ - const: per
+
+ # imx7d Soc need one clock
+ - if:
+ properties:
+ compatible:
+ items:
+ - const: fsl,imx7d-usb
+ - const: fsl,imx27-usb
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
+ # other Soc need one clock
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx23-usb
+ - fsl,imx28-usb
+ - fsl,imx50-usb
+ - fsl,imx51-usb
+ - fsl,imx53-usb
+ - fsl,imx6q-usb
+ - fsl,imx6sl-usb
+ - fsl,imx6sx-usb
+ - fsl,imx6ul-usb
+ - fsl,imx8mm-usb
+ - fsl,imx8mn-usb
+ - fsl,vf610-usb
+ then:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
unevaluatedProperties: false
examples:
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 06/11] dt-bindings: usb: ci-hdrc-usb2-imx: add compatible and clock-names restriction for imx93
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
The i.MX93 needs a wakup clock to work properly. This will add compatible
and restriction for i.MX93 platform.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v2:
- no changes
Changes in v3:
- add clocks restriction
Changes in v4:
- use 'contains' rather 'items'
Changes in v5:
- rename clock name
Changes in v6:
- new patch based on ci-hdrc-usb2-imx.yaml
Changes in v7:
- no changes
Changes in v8:
- rewrite the restriction
Changes in v9:
- add Rb tag
Changes in v10:
- no changes
---
.../bindings/usb/chipidea,usb2-imx.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
index e2eb60eaf6fe..8f6136f5d72e 100644
--- a/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
+++ b/Documentation/devicetree/bindings/usb/chipidea,usb2-imx.yaml
@@ -40,6 +40,7 @@ properties:
- enum:
- fsl,imx8mm-usb
- fsl,imx8mn-usb
+ - fsl,imx93-usb
- const: fsl,imx7d-usb
- const: fsl,imx27-usb
- items:
@@ -183,6 +184,23 @@ allOf:
- const: ahb
- const: per
+ # imx93 Soc needs two clocks
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx93-usb
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: usb_ctrl_root
+ - const: usb_wakeup
+
# imx7d Soc need one clock
- if:
properties:
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 03/11] arm64: dts: imx8ulp-evk: enable usb nodes and add ptn5150 nodes
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v2:
- fix format as suggusted by Fabio
- add PTN5150 nodes
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- no changes
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 69dd8e31027c..bf418af31039 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -133,6 +133,64 @@ pcal6408: gpio@21 {
gpio-controller;
#gpio-cells = <2>;
};
+
+ ptn5150_1: typec@1d {
+ compatible = "nxp,ptn5150";
+ reg = <0x1d>;
+ int-gpios = <&gpiof 3 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_typec1>;
+ status = "disabled";
+ };
+
+ ptn5150_2: typec@3d {
+ compatible = "nxp,ptn5150";
+ reg = <0x3d>;
+ int-gpios = <&gpiof 5 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_typec2>;
+ status = "disabled";
+ };
+};
+
+&usbotg1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb1>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy1 {
+ fsl,tx-d-cal = <110>;
+ status = "okay";
+};
+
+&usbmisc1 {
+ status = "okay";
+};
+
+&usbotg2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb2>;
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ over-current-active-low;
+ status = "okay";
+};
+
+&usbphy2 {
+ fsl,tx-d-cal = <110>;
+ status = "okay";
+};
+
+&usbmisc2 {
+ status = "okay";
};
&usdhc0 {
@@ -224,6 +282,32 @@ MX8ULP_PAD_PTE13__LPI2C7_SDA 0x20
>;
};
+ pinctrl_typec1: typec1grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF3__PTF3 0x3
+ >;
+ };
+
+ pinctrl_typec2: typec2grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF5__PTF5 0x3
+ >;
+ };
+
+ pinctrl_usb1: usb1grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTF2__USB0_ID 0x10003
+ MX8ULP_PAD_PTF4__USB0_OC 0x10003
+ >;
+ };
+
+ pinctrl_usb2: usb2grp {
+ fsl,pins = <
+ MX8ULP_PAD_PTD23__USB1_ID 0x10003
+ MX8ULP_PAD_PTF6__USB1_OC 0x10003
+ >;
+ };
+
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v10 02/11] arm64: dts: imx8ulp: add usb nodes
From: Xu Yang @ 2024-03-21 8:14 UTC (permalink / raw)
To: gregkh, robh+dt, krzysztof.kozlowski+dt, shawnguo, conor+dt
Cc: s.hauer, kernel, festevam, linux-imx, peter.chen, xu.yang_2,
jun.li, linux-usb, devicetree, linux-arm-kernel, imx,
linux-kernel
In-Reply-To: <20240321081439.541799-1-xu.yang_2@nxp.com>
Add USB nodes on i.MX8ULP platform which has 2 USB controllers.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
---
Changes in v2:
- no changes
Changes in v3:
- no changes
Changes in v4:
- no changes
Changes in v5:
- no changes
Changes in v6:
- drop usbphy aliases
Changes in v7:
- no changes
Changes in v8:
- no changes
Changes in v9:
- no changes
Changes in v10:
- no changes
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 62 ++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index c4a0082f30d3..7da9461a5745 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -472,6 +472,68 @@ usdhc2: mmc@298f0000 {
status = "disabled";
};
+ usbotg1: usb@29900000 {
+ compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
+ reg = <0x29900000 0x200>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB0>;
+ power-domains = <&scmi_devpd IMX8ULP_PD_USB0>;
+ phys = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc1: usbmisc@29900200 {
+ compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ #index-cells = <1>;
+ reg = <0x29900200 0x200>;
+ status = "disabled";
+ };
+
+ usbphy1: usb-phy@29910000 {
+ compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
+ reg = <0x29910000 0x10000>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB0_PHY>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usbotg2: usb@29920000 {
+ compatible = "fsl,imx8ulp-usb", "fsl,imx7ulp-usb", "fsl,imx6ul-usb";
+ reg = <0x29920000 0x200>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB1>;
+ power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>;
+ phys = <&usbphy2>;
+ fsl,usbmisc = <&usbmisc2 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x8>;
+ rx-burst-size-dword = <0x8>;
+ status = "disabled";
+ };
+
+ usbmisc2: usbmisc@29920200 {
+ compatible = "fsl,imx8ulp-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
+ #index-cells = <1>;
+ reg = <0x29920200 0x200>;
+ status = "disabled";
+ };
+
+ usbphy2: usb-phy@29930000 {
+ compatible = "fsl,imx8ulp-usbphy", "fsl,imx7ulp-usbphy";
+ reg = <0x29930000 0x10000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pcc4 IMX8ULP_CLK_USB1_PHY>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
fec: ethernet@29950000 {
compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
reg = <0x29950000 0x10000>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox