* Re: [PATCH 5/5] arm64: dts: Add device tree source for the Au-Zone Maivin Starter Kit
From: Krzysztof Kozlowski @ 2024-03-26 7:12 UTC (permalink / raw)
To: Laurent Pinchart, devicetree, imx, linux-arm-kernel
Cc: Trevor Zaharichuk, Greg Lytle, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
In-Reply-To: <20240325203245.31660-6-laurent.pinchart@ideasonboard.com>
On 25/03/2024 21:32, Laurent Pinchart wrote:
> The Maivin board is an AI vision starter kit sold by Au-Zone
> Technologies, developed in collaboration with Toradex and Vision
> Components. It is based on a Toradex Verdin i.MX8MP SoM.
>
> Add a device tree that covers the base set the peripherals found on the
> board:
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.
And drop redundant parts.
arm64: dts: imx8mp-maivin: Add Au-Zone Maivin Starter Kit board
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH 4/5] dt-bindings: arm: Add Au-Zone Maivin AI Vision Starter Kit
From: Krzysztof Kozlowski @ 2024-03-26 7:11 UTC (permalink / raw)
To: Laurent Pinchart, devicetree, imx, linux-arm-kernel
Cc: Trevor Zaharichuk, Greg Lytle, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Li Yang
In-Reply-To: <20240325203245.31660-5-laurent.pinchart@ideasonboard.com>
On 25/03/2024 21:32, Laurent Pinchart wrote:
> The Maivin board is an AI vision starter kit sold by Au-Zone
> Technologies, developed in collaboration with Toradex and Vision
> Components. It is based on a Toradex Verdin i.MX8MP SoM.
>
> Add a corresponding compatible string.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index 0027201e19f8..d892c4f9fda3 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -1064,6 +1064,13 @@ properties:
> - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
> - const: fsl,imx8mp
>
> + - description: Au-Zone Technologies i.MX8MP-based boards
> + items:
> + - const: au-zone,maivin-starter-kit # Au-Zone Maivin AI Vision Starter Kit
> + - const: toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Module without Wi-Fi / BT
> + - const: toradex,verdin-imx8mp # Verdin iMX8M Plus Module
I think this should be part of existing "Toradex Boards with Verdin
iMX8M Plus Modules)", just renamed to "boards using Toradex Verdin ...".
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH 3/5] dt-bindings: vendor-prefix: Add prefix for Au-Zone Technologies
From: Krzysztof Kozlowski @ 2024-03-26 7:10 UTC (permalink / raw)
To: Laurent Pinchart, devicetree, imx, linux-arm-kernel
Cc: Trevor Zaharichuk, Greg Lytle, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
In-Reply-To: <20240325203245.31660-4-laurent.pinchart@ideasonboard.com>
On 25/03/2024 21:32, Laurent Pinchart wrote:
> Au-Zone Technologies is a company that designs and manufactures products
> for AI vision applications. Add a DT vendor prefix for it.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH 2/2] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add gpio child node
From: Krzysztof Kozlowski @ 2024-03-26 7:09 UTC (permalink / raw)
To: Laurent Pinchart, devicetree, linux-rpi-kernel, linux-arm-kernel,
linux-gpio
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Florian Fainelli,
Broadcom internal kernel review list, Ray Jui, Scott Branden,
Linus Walleij, Bartosz Golaszewski, Eric Anholt, Stefan Wahren
In-Reply-To: <20240326004902.17054-3-laurent.pinchart@ideasonboard.com>
On 26/03/2024 01:49, Laurent Pinchart wrote:
> Unlike the other child nodes of the raspberrypi,bcm2835-firmware device,
> the gpio child is documented in a legacy text-based binding in
> gpio/raspberrypi,firmware-gpio.txt. This causes DT validation failures:
> + type: object
> + additionalProperties: false
> +
> + properties:
> + compatible:
> + const: raspberrypi,firmware-gpio
> +
> + gpio-controller: true
> +
> + "#gpio-cells":
> + const: 2
> + description:
> + The first cell is the pin number, and the second cell is used to
> + specify the gpio polarity (GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW).
> +
> + gpio-line-names: true
You could provide here maxItems, if this is known, but it's fine as is
as well.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm: bcm: raspberrypi,bcm2835-firmware: Add missing properties
From: Krzysztof Kozlowski @ 2024-03-26 7:06 UTC (permalink / raw)
To: Laurent Pinchart, devicetree, linux-rpi-kernel, linux-arm-kernel,
linux-gpio
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Florian Fainelli,
Broadcom internal kernel review list, Ray Jui, Scott Branden,
Linus Walleij, Bartosz Golaszewski, Eric Anholt, Stefan Wahren
In-Reply-To: <20240326004902.17054-2-laurent.pinchart@ideasonboard.com>
On 26/03/2024 01:49, Laurent Pinchart wrote:
> The raspberrypi,bcm2835-firmware devices requires a dma-ranges property,
> and, as a result, also needs to specify #address-cells and #size-cells.
> Those properties have been added to thebcm2835-rpi.dtsi in commits
> be08d278eb09 ("ARM: dts: bcm283x: Add cells encoding format to firmware
> bus") and 55c7c0621078 ("ARM: dts: bcm283x: Fix vc4's firmware bus DMA
> limitations"), but the DT bindings haven't been updated, resulting in
> validation errors:
>
> arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dtb: firmware: '#address-cells', '#size-cells', 'dma-ranges', 'gpio' do not match any of the regexes: 'pinctrl-[0-9]+'
> from schema $id: http://devicetree.org/schemas/arm/bcm/raspberrypi,bcm2835-firmware.yaml#
>
> Fix this by adding the properties to the bindings.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Children do not perform any IO on their own, because everything is
handled by parent. It is really odd to see dma-ranges without ranges.
Referenced commits might be also wrong.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH] wifi: mt76: mt7603: add debugfs attr for disabling frames buffering
From: Rafał Miłecki @ 2024-03-26 7:01 UTC (permalink / raw)
To: Felix Fietkau, Lorenzo Bianconi, Ryder Lee, Shayne Chen,
Sean Wang
Cc: Kalle Valo, Matthias Brugger, AngeloGioacchino Del Regno,
linux-wireless, linux-kernel, linux-arm-kernel, linux-mediatek,
openwrt-devel, Rafał Miłecki
In-Reply-To: <4c6319eb-79d3-46ba-a334-c74ea13461ea@gmail.com>
On 26.03.2024 00:11, Rafał Miłecki wrote:
> I'll provide some iperf logs from my ThinkPad with 8086:3166 Intel
> Wireless-AC 3165 working as 2 GHz client of MT7603EN on Netgear R6220.
I run seven 1-hour iperf sessions overnight using ThinkPad + Xiaomi
Mi Router 4C (MT7628AN Wi-Fi SoC) with buffering DISABLED.
Session 1 (1 hour) with 51.7 Mbps avg:
All GOOD
Session 2 (1 hour) with 40.5 Mbps avg:
* 2 seconds traffic stall (STA diconnected with 34=DISASSOC_LOW_ACK)
* 718 seconds traffic stall (nothing in STA logs)
Session 3 (1 hour) with 51.6 Mbps avg:
* 5 seconds traffic stall (STA diconnected with 34=DISASSOC_LOW_ACK)
Session 4 (1 hour) with 51.8 Mbps avg:
All GOOD
Session 5 (1 hour) with 51.8 Mbps avg:
All GOOD
Session 6 (1 hour) with 51.8 Mbps avg:
All GOOD
Session 7 (1 hour) with 51.1 Mbps avg:
All GOOD
I find MT7628AN without frames buffering pretty usable.
Now, with frames buffering enabled, things look quite worse. There are
multiple traffic stalls and often TCP session dies. See below.
pon, 25 mar 2024, 23:23:51 CET
------------------------------------------------------------
Client connecting to 192.168.27.1, TCP port 5001
TCP window size: 85.0 KByte (default)
------------------------------------------------------------
[ 3] local 192.168.1.181 port 58838 connected with 192.168.27.1 port 5001
[ ID] Interval Transfer Bandwidth
[ 3] 0.0- 1.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 1.0- 2.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 2.0- 3.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 3.0- 4.0 sec 5.25 MBytes 44.0 Mbits/sec
[ 3] 4.0- 5.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 5.0- 6.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 6.0- 7.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 7.0- 8.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 8.0- 9.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 9.0-10.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 10.0-11.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 11.0-12.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 12.0-13.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 13.0-14.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 14.0-15.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 15.0-16.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 16.0-17.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 17.0-18.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 18.0-19.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 19.0-20.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 20.0-21.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 21.0-22.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 22.0-23.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 23.0-24.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 24.0-25.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 25.0-26.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 26.0-27.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 27.0-28.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 28.0-29.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 29.0-30.0 sec 1.75 MBytes 14.7 Mbits/sec
[ 3] 30.0-31.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 31.0-32.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 32.0-33.0 sec 3.50 MBytes 29.4 Mbits/sec
[ 3] 33.0-34.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 34.0-35.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 35.0-36.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 36.0-37.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 37.0-38.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 38.0-39.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 39.0-40.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 40.0-41.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 41.0-42.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 42.0-43.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 43.0-44.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 44.0-45.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 45.0-46.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 46.0-47.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 47.0-48.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 48.0-49.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 49.0-50.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 50.0-51.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 51.0-52.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 52.0-53.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 53.0-54.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 54.0-55.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 55.0-56.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 56.0-57.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 57.0-58.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 58.0-59.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 59.0-60.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 60.0-61.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 61.0-62.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 62.0-63.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 63.0-64.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 64.0-65.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 65.0-66.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 66.0-67.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 67.0-68.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 68.0-69.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 69.0-70.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 70.0-71.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 71.0-72.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 72.0-73.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 73.0-74.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 74.0-75.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 75.0-76.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 76.0-77.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 77.0-78.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 78.0-79.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 79.0-80.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 80.0-81.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 81.0-82.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 82.0-83.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 83.0-84.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 84.0-85.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 85.0-86.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 86.0-87.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 87.0-88.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 88.0-89.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 89.0-90.0 sec 7.88 MBytes 66.1 Mbits/sec
[ 3] 90.0-91.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 91.0-92.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 92.0-93.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 93.0-94.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 94.0-95.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 95.0-96.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 96.0-97.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 97.0-98.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 98.0-99.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 99.0-100.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 100.0-101.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 101.0-102.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 102.0-103.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 103.0-104.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 104.0-105.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 105.0-106.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 106.0-107.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 107.0-108.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 108.0-109.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 109.0-110.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 110.0-111.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 111.0-112.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 112.0-113.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 113.0-114.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 114.0-115.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 115.0-116.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 116.0-117.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 117.0-118.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 118.0-119.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 119.0-120.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 120.0-121.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 121.0-122.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 122.0-123.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 123.0-124.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 124.0-125.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 125.0-126.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 126.0-127.0 sec 2.50 MBytes 21.0 Mbits/sec
[ 3] 127.0-128.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 128.0-129.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 129.0-130.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 130.0-131.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 131.0-132.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 132.0-133.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 133.0-134.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 134.0-135.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 135.0-136.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 136.0-137.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 137.0-138.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 138.0-139.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 139.0-140.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 140.0-141.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 141.0-142.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 142.0-143.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 143.0-144.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 144.0-145.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 145.0-146.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 146.0-147.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 147.0-148.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 148.0-149.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 149.0-150.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 150.0-151.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 151.0-152.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 152.0-153.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 153.0-154.0 sec 7.62 MBytes 64.0 Mbits/sec
[ 3] 154.0-155.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 155.0-156.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 156.0-157.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 157.0-158.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 158.0-159.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 159.0-160.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 160.0-161.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 161.0-162.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 162.0-163.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 163.0-164.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 164.0-165.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 165.0-166.0 sec 7.75 MBytes 65.0 Mbits/sec
[ 3] 166.0-167.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 167.0-168.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 168.0-169.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 169.0-170.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 170.0-171.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 171.0-172.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 172.0-173.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 173.0-174.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 174.0-175.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 175.0-176.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 176.0-177.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 177.0-178.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 178.0-179.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 179.0-180.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 180.0-181.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 181.0-182.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 182.0-183.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 183.0-184.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 184.0-185.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 185.0-186.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 186.0-187.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 187.0-188.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 188.0-189.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 189.0-190.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 190.0-191.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 191.0-192.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 192.0-193.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 193.0-194.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 194.0-195.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 195.0-196.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 196.0-197.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 197.0-198.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 198.0-199.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 199.0-200.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 200.0-201.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 201.0-202.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 202.0-203.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 203.0-204.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 204.0-205.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 205.0-206.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 206.0-207.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 207.0-208.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 208.0-209.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 209.0-210.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 210.0-211.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 211.0-212.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 212.0-213.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 213.0-214.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 214.0-215.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 215.0-216.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 216.0-217.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 217.0-218.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 218.0-219.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 219.0-220.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 220.0-221.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 221.0-222.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 222.0-223.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 223.0-224.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 224.0-225.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 225.0-226.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 226.0-227.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 227.0-228.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 228.0-229.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 229.0-230.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 230.0-231.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 231.0-232.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 232.0-233.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 233.0-234.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 234.0-235.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 235.0-236.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 236.0-237.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 237.0-238.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 238.0-239.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 239.0-240.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 240.0-241.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 241.0-242.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 242.0-243.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 243.0-244.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 244.0-245.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 245.0-246.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 246.0-247.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 247.0-248.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 248.0-249.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 249.0-250.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 250.0-251.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 251.0-252.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 252.0-253.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 253.0-254.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 254.0-255.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 255.0-256.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 256.0-257.0 sec 5.12 MBytes 43.0 Mbits/sec
[ 3] 257.0-258.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 258.0-259.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 259.0-260.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 260.0-261.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 261.0-262.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 262.0-263.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 263.0-264.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 264.0-265.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 265.0-266.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 266.0-267.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 267.0-268.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 268.0-269.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 269.0-270.0 sec 6.12 MBytes 51.4 Mbits/sec
[ 3] 270.0-271.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 271.0-272.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 272.0-273.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 273.0-274.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 274.0-275.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 275.0-276.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 276.0-277.0 sec 4.12 MBytes 34.6 Mbits/sec
[ 3] 277.0-278.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 278.0-279.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 279.0-280.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 280.0-281.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 281.0-282.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 282.0-283.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 283.0-284.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 284.0-285.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 285.0-286.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 286.0-287.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 287.0-288.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 288.0-289.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 289.0-290.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 290.0-291.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 291.0-292.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 292.0-293.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 293.0-294.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 294.0-295.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 295.0-296.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 296.0-297.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 297.0-298.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 298.0-299.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 299.0-300.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 300.0-301.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 301.0-302.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 302.0-303.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 303.0-304.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 304.0-305.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 305.0-306.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 306.0-307.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 307.0-308.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 308.0-309.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 309.0-310.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 310.0-311.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 311.0-312.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 312.0-313.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 313.0-314.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 314.0-315.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 315.0-316.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 316.0-317.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 317.0-318.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 318.0-319.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 319.0-320.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 320.0-321.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 321.0-322.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 322.0-323.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 323.0-324.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 324.0-325.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 325.0-326.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 326.0-327.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 327.0-328.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 328.0-329.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 329.0-330.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 330.0-331.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 331.0-332.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 332.0-333.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 333.0-334.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 334.0-335.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 335.0-336.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 336.0-337.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 337.0-338.0 sec 6.12 MBytes 51.4 Mbits/sec
[ 3] 338.0-339.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 339.0-340.0 sec 5.12 MBytes 43.0 Mbits/sec
[ 3] 340.0-341.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 341.0-342.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 342.0-343.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 343.0-344.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 344.0-345.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 345.0-346.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 346.0-347.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 347.0-348.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 348.0-349.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 349.0-350.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 350.0-351.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 351.0-352.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 352.0-353.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 353.0-354.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 354.0-355.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 355.0-356.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 356.0-357.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 357.0-358.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 358.0-359.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 359.0-360.0 sec 5.25 MBytes 44.0 Mbits/sec
[ 3] 360.0-361.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 361.0-362.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 362.0-363.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 363.0-364.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 364.0-365.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 365.0-366.0 sec 1.38 MBytes 11.5 Mbits/sec
[ 3] 366.0-367.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 367.0-368.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 368.0-369.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 369.0-370.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 370.0-371.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 371.0-372.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 372.0-373.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 373.0-374.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 374.0-375.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 375.0-376.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 376.0-377.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 377.0-378.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 378.0-379.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 379.0-380.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 380.0-381.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 381.0-382.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 382.0-383.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 383.0-384.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 384.0-385.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 385.0-386.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 386.0-387.0 sec 4.12 MBytes 34.6 Mbits/sec
[ 3] 387.0-388.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 388.0-389.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 389.0-390.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 390.0-391.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 391.0-392.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 392.0-393.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 393.0-394.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 394.0-395.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 395.0-396.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 396.0-397.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 397.0-398.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 398.0-399.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 399.0-400.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 400.0-401.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 401.0-402.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 402.0-403.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 403.0-404.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 404.0-405.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 405.0-406.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 406.0-407.0 sec 5.12 MBytes 43.0 Mbits/sec
[ 3] 407.0-408.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 408.0-409.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 409.0-410.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 410.0-411.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 411.0-412.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 412.0-413.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 413.0-414.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 414.0-415.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 415.0-416.0 sec 6.12 MBytes 51.4 Mbits/sec
[ 3] 416.0-417.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 417.0-418.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 418.0-419.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 419.0-420.0 sec 2.50 MBytes 21.0 Mbits/sec
[ 3] 420.0-421.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 421.0-422.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 422.0-423.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 423.0-424.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 424.0-425.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 425.0-426.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 426.0-427.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 427.0-428.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 428.0-429.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 429.0-430.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 430.0-431.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 431.0-432.0 sec 1.88 MBytes 15.7 Mbits/sec
^C^C^C[ 3] 432.0-433.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 433.0-434.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 434.0-435.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 435.0-436.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 436.0-437.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 437.0-438.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 438.0-439.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 439.0-440.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 440.0-441.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 441.0-442.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 442.0-443.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 443.0-444.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 444.0-445.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 445.0-446.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 446.0-447.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 447.0-448.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 448.0-449.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 449.0-450.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 450.0-451.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 451.0-452.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 452.0-453.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 453.0-454.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 454.0-455.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 455.0-456.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 456.0-457.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 457.0-458.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 458.0-459.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 459.0-460.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 460.0-461.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 461.0-462.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 462.0-463.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 463.0-464.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 464.0-465.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 465.0-466.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 466.0-467.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 467.0-468.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 468.0-469.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 469.0-470.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 470.0-471.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 471.0-472.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 472.0-473.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 473.0-474.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 474.0-475.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 475.0-476.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 476.0-477.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 477.0-478.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 478.0-479.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 479.0-480.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 480.0-481.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 481.0-482.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 482.0-483.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 483.0-484.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 484.0-485.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 485.0-486.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 486.0-487.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 487.0-488.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 488.0-489.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 0.0-489.0 sec 1.94 GBytes 34.2 Mbits/sec
pon, 25 mar 2024, 23:32:13 CET
------------------------------------------------------------
Client connecting to 192.168.27.1, TCP port 5001
TCP window size: 85.0 KByte (default)
------------------------------------------------------------
[ 3] local 192.168.1.181 port 35878 connected with 192.168.27.1 port 5001
[ ID] Interval Transfer Bandwidth
[ 3] 0.0- 1.0 sec 8.38 MBytes 70.3 Mbits/sec
[ 3] 1.0- 2.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 2.0- 3.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 3.0- 4.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 4.0- 5.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 5.0- 6.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 6.0- 7.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 7.0- 8.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 8.0- 9.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 9.0-10.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 10.0-11.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 11.0-12.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 12.0-13.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 13.0-14.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 14.0-15.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 15.0-16.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 16.0-17.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 17.0-18.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 18.0-19.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 19.0-20.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 20.0-21.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 21.0-22.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 22.0-23.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 23.0-24.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 24.0-25.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 25.0-26.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 26.0-27.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 27.0-28.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 28.0-29.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 29.0-30.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 30.0-31.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 31.0-32.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 32.0-33.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 33.0-34.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 34.0-35.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 35.0-36.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 36.0-37.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 37.0-38.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 38.0-39.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 39.0-40.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 40.0-41.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 41.0-42.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 42.0-43.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 43.0-44.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 44.0-45.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 45.0-46.0 sec 1.38 MBytes 11.5 Mbits/sec
[ 3] 46.0-47.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 47.0-48.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 48.0-49.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 49.0-50.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 50.0-51.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 51.0-52.0 sec 1.38 MBytes 11.5 Mbits/sec
[ 3] 52.0-53.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 53.0-54.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 54.0-55.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 55.0-56.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 56.0-57.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 57.0-58.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 58.0-59.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 59.0-60.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 60.0-61.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 61.0-62.0 sec 5.12 MBytes 43.0 Mbits/sec
[ 3] 62.0-63.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 63.0-64.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 64.0-65.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 65.0-66.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 66.0-67.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 67.0-68.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 68.0-69.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 69.0-70.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 70.0-71.0 sec 7.50 MBytes 62.9 Mbits/sec
[ 3] 71.0-72.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 72.0-73.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 73.0-74.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 74.0-75.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 75.0-76.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 76.0-77.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 77.0-78.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 78.0-79.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 79.0-80.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 80.0-81.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 81.0-82.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 82.0-83.0 sec 5.75 MBytes 48.2 Mbits/sec
[ 3] 83.0-84.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 84.0-85.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 85.0-86.0 sec 5.88 MBytes 49.3 Mbits/sec
[ 3] 86.0-87.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 87.0-88.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 88.0-89.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 89.0-90.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 90.0-91.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 91.0-92.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 92.0-93.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 93.0-94.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 94.0-95.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 95.0-96.0 sec 6.00 MBytes 50.3 Mbits/sec
[ 3] 96.0-97.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 97.0-98.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 98.0-99.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 99.0-100.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 100.0-101.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 101.0-102.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 102.0-103.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 103.0-104.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 104.0-105.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 105.0-106.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 106.0-107.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 107.0-108.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 108.0-109.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 109.0-110.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 110.0-111.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 111.0-112.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 112.0-113.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 113.0-114.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 114.0-115.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 115.0-116.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 116.0-117.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 117.0-118.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 118.0-119.0 sec 2.50 MBytes 21.0 Mbits/sec
[ 3] 119.0-120.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 120.0-121.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 121.0-122.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 122.0-123.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 123.0-124.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 124.0-125.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 125.0-126.0 sec 3.25 MBytes 27.3 Mbits/sec
[ 3] 126.0-127.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 127.0-128.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 128.0-129.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 129.0-130.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 130.0-131.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 131.0-132.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 132.0-133.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 133.0-134.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 134.0-135.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 135.0-136.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 136.0-137.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 137.0-138.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 138.0-139.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 139.0-140.0 sec 6.75 MBytes 56.6 Mbits/sec
[ 3] 140.0-141.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 141.0-142.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 142.0-143.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 143.0-144.0 sec 6.88 MBytes 57.7 Mbits/sec
[ 3] 144.0-145.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 145.0-146.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 146.0-147.0 sec 2.38 MBytes 19.9 Mbits/sec
[ 3] 147.0-148.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 148.0-149.0 sec 3.25 MBytes 27.3 Mbits/sec
^C^C^C[ 3] 149.0-150.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 150.0-151.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 151.0-152.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 152.0-153.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 153.0-154.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 154.0-155.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 155.0-156.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 156.0-157.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 157.0-158.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 158.0-159.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 159.0-160.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 160.0-161.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 161.0-162.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 162.0-163.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 163.0-164.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 164.0-165.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 165.0-166.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 166.0-167.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 167.0-168.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 168.0-169.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 169.0-170.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 170.0-171.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 171.0-172.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 172.0-173.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 173.0-174.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 174.0-175.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 175.0-176.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 176.0-177.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 177.0-178.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 178.0-179.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 179.0-180.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 180.0-181.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 181.0-182.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 182.0-183.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 183.0-184.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 184.0-185.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 185.0-186.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 186.0-187.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 187.0-188.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 188.0-189.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 189.0-190.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 190.0-191.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 191.0-192.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 192.0-193.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 193.0-194.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 194.0-195.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 195.0-196.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 196.0-197.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 197.0-198.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 0.0-198.1 sec 712 MBytes 30.2 Mbits/sec
pon, 25 mar 2024, 23:35:43 CET
------------------------------------------------------------
Client connecting to 192.168.27.1, TCP port 5001
TCP window size: 85.0 KByte (default)
------------------------------------------------------------
[ 3] local 192.168.1.181 port 42114 connected with 192.168.27.1 port 5001
[ ID] Interval Transfer Bandwidth
[ 3] 0.0- 1.0 sec 8.38 MBytes 70.3 Mbits/sec
[ 3] 1.0- 2.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 2.0- 3.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 3.0- 4.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 4.0- 5.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 5.0- 6.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 6.0- 7.0 sec 3.75 MBytes 31.5 Mbits/sec
[ 3] 7.0- 8.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 8.0- 9.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 9.0-10.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 10.0-11.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 11.0-12.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 12.0-13.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 13.0-14.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 14.0-15.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 15.0-16.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 16.0-17.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 17.0-18.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 18.0-19.0 sec 4.38 MBytes 36.7 Mbits/sec
[ 3] 19.0-20.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 20.0-21.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 21.0-22.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 22.0-23.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 23.0-24.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 24.0-25.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 25.0-26.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 26.0-27.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 27.0-28.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 28.0-29.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 29.0-30.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 30.0-31.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 31.0-32.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 32.0-33.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 33.0-34.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 34.0-35.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 35.0-36.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 36.0-37.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 37.0-38.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 38.0-39.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 39.0-40.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 40.0-41.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 41.0-42.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 42.0-43.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 43.0-44.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 44.0-45.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 45.0-46.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 46.0-47.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 47.0-48.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 48.0-49.0 sec 4.38 MBytes 36.7 Mbits/sec
[ 3] 49.0-50.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 50.0-51.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 51.0-52.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 52.0-53.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 53.0-54.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 54.0-55.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 55.0-56.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 56.0-57.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 57.0-58.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 58.0-59.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 59.0-60.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 60.0-61.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 61.0-62.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 62.0-63.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 63.0-64.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 64.0-65.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 65.0-66.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 66.0-67.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 67.0-68.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 68.0-69.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 69.0-70.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 70.0-71.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 71.0-72.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 72.0-73.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 73.0-74.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 74.0-75.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 75.0-76.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 76.0-77.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 77.0-78.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 78.0-79.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 79.0-80.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 80.0-81.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 81.0-82.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 82.0-83.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 83.0-84.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 84.0-85.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 85.0-86.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 86.0-87.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 87.0-88.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 88.0-89.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 89.0-90.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 90.0-91.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 91.0-92.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 92.0-93.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 93.0-94.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 94.0-95.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 95.0-96.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 96.0-97.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 97.0-98.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 98.0-99.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 99.0-100.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 100.0-101.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 101.0-102.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 102.0-103.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 103.0-104.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 104.0-105.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 105.0-106.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 106.0-107.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 107.0-108.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 108.0-109.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 109.0-110.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 110.0-111.0 sec 5.62 MBytes 47.2 Mbits/sec
[ 3] 111.0-112.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 112.0-113.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 113.0-114.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 114.0-115.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 115.0-116.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 116.0-117.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 117.0-118.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 118.0-119.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 119.0-120.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 120.0-121.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 121.0-122.0 sec 5.25 MBytes 44.0 Mbits/sec
[ 3] 122.0-123.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 123.0-124.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 124.0-125.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 125.0-126.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 126.0-127.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 127.0-128.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 128.0-129.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 129.0-130.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 130.0-131.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 131.0-132.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 132.0-133.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 133.0-134.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 134.0-135.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 135.0-136.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 136.0-137.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 137.0-138.0 sec 4.38 MBytes 36.7 Mbits/sec
[ 3] 138.0-139.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 139.0-140.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 140.0-141.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 141.0-142.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 142.0-143.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 143.0-144.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 144.0-145.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 145.0-146.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 146.0-147.0 sec 4.62 MBytes 38.8 Mbits/sec
[ 3] 147.0-148.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 148.0-149.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 149.0-150.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 150.0-151.0 sec 2.12 MBytes 17.8 Mbits/sec
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[ 3] 153.0-154.0 sec 1.00 MBytes 8.39 Mbits/sec
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[ 3] 156.0-157.0 sec 2.25 MBytes 18.9 Mbits/sec
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[ 3] 164.0-165.0 sec 7.25 MBytes 60.8 Mbits/sec
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[ 3] 170.0-171.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 171.0-172.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 172.0-173.0 sec 4.62 MBytes 38.8 Mbits/sec
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[ 3] 174.0-175.0 sec 5.25 MBytes 44.0 Mbits/sec
[ 3] 175.0-176.0 sec 7.12 MBytes 59.8 Mbits/sec
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[ 3] 181.0-182.0 sec 6.62 MBytes 55.6 Mbits/sec
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[ 3] 184.0-185.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 185.0-186.0 sec 4.50 MBytes 37.7 Mbits/sec
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[ 3] 187.0-188.0 sec 7.00 MBytes 58.7 Mbits/sec
[ 3] 188.0-189.0 sec 6.62 MBytes 55.6 Mbits/sec
[ 3] 189.0-190.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 190.0-191.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 192.0-193.0 sec 7.38 MBytes 61.9 Mbits/sec
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[ 3] 194.0-195.0 sec 7.25 MBytes 60.8 Mbits/sec
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[ 3] 196.0-197.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 197.0-198.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 198.0-199.0 sec 1.88 MBytes 15.7 Mbits/sec
[ 3] 199.0-200.0 sec 2.75 MBytes 23.1 Mbits/sec
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[ 3] 201.0-202.0 sec 0.00 Bytes 0.00 bits/sec
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[ 3] 206.0-207.0 sec 4.00 MBytes 33.6 Mbits/sec
[ 3] 207.0-208.0 sec 6.12 MBytes 51.4 Mbits/sec
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[ 3] 210.0-211.0 sec 6.62 MBytes 55.6 Mbits/sec
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[ 3] 212.0-213.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 213.0-214.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 214.0-215.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 215.0-216.0 sec 4.38 MBytes 36.7 Mbits/sec
[ 3] 216.0-217.0 sec 3.00 MBytes 25.2 Mbits/sec
[ 3] 217.0-218.0 sec 2.25 MBytes 18.9 Mbits/sec
[ 3] 218.0-219.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 219.0-220.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 220.0-221.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 221.0-222.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 222.0-223.0 sec 6.50 MBytes 54.5 Mbits/sec
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[ 3] 224.0-225.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 225.0-226.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 227.0-228.0 sec 5.25 MBytes 44.0 Mbits/sec
[ 3] 228.0-229.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 229.0-230.0 sec 1.75 MBytes 14.7 Mbits/sec
[ 3] 230.0-231.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 231.0-232.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 232.0-233.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 233.0-234.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 235.0-236.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 236.0-237.0 sec 6.12 MBytes 51.4 Mbits/sec
[ 3] 237.0-238.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 238.0-239.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 239.0-240.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 240.0-241.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 241.0-242.0 sec 3.12 MBytes 26.2 Mbits/sec
[ 3] 242.0-243.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 243.0-244.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 244.0-245.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 245.0-246.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 246.0-247.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 248.0-249.0 sec 7.38 MBytes 61.9 Mbits/sec
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[ 3] 251.0-252.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 252.0-253.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 253.0-254.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 254.0-255.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 255.0-256.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 256.0-257.0 sec 2.25 MBytes 18.9 Mbits/sec
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[ 3] 258.0-259.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 259.0-260.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 260.0-261.0 sec 6.50 MBytes 54.5 Mbits/sec
[ 3] 261.0-262.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 262.0-263.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 263.0-264.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 264.0-265.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 265.0-266.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 266.0-267.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 267.0-268.0 sec 4.75 MBytes 39.8 Mbits/sec
[ 3] 268.0-269.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 269.0-270.0 sec 1.75 MBytes 14.7 Mbits/sec
[ 3] 270.0-271.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 271.0-272.0 sec 1.75 MBytes 14.7 Mbits/sec
[ 3] 272.0-273.0 sec 0.00 Bytes 0.00 bits/sec
[ 3] 273.0-274.0 sec 1.12 MBytes 9.44 Mbits/sec
[ 3] 274.0-275.0 sec 1.00 MBytes 8.39 Mbits/sec
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[ 3] 276.0-277.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 277.0-278.0 sec 1.12 MBytes 9.44 Mbits/sec
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[ 3] 283.0-284.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 284.0-285.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 285.0-286.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 286.0-287.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 287.0-288.0 sec 7.25 MBytes 60.8 Mbits/sec
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[ 3] 291.0-292.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 292.0-293.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 293.0-294.0 sec 5.00 MBytes 41.9 Mbits/sec
[ 3] 294.0-295.0 sec 4.88 MBytes 40.9 Mbits/sec
[ 3] 295.0-296.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 296.0-297.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 297.0-298.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 301.0-302.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 302.0-303.0 sec 6.12 MBytes 51.4 Mbits/sec
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[ 3] 304.0-305.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 306.0-307.0 sec 2.88 MBytes 24.1 Mbits/sec
[ 3] 307.0-308.0 sec 2.00 MBytes 16.8 Mbits/sec
[ 3] 308.0-309.0 sec 2.62 MBytes 22.0 Mbits/sec
[ 3] 309.0-310.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 310.0-311.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 312.0-313.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 313.0-314.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 314.0-315.0 sec 4.50 MBytes 37.7 Mbits/sec
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[ 3] 316.0-317.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 317.0-318.0 sec 6.50 MBytes 54.5 Mbits/sec
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[ 3] 319.0-320.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 320.0-321.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 321.0-322.0 sec 7.12 MBytes 59.8 Mbits/sec
[ 3] 322.0-323.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 324.0-325.0 sec 6.25 MBytes 52.4 Mbits/sec
[ 3] 325.0-326.0 sec 7.38 MBytes 61.9 Mbits/sec
[ 3] 326.0-327.0 sec 6.38 MBytes 53.5 Mbits/sec
[ 3] 327.0-328.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 328.0-329.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 329.0-330.0 sec 3.62 MBytes 30.4 Mbits/sec
[ 3] 330.0-331.0 sec 2.12 MBytes 17.8 Mbits/sec
[ 3] 331.0-332.0 sec 2.25 MBytes 18.9 Mbits/sec
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[ 3] 333.0-334.0 sec 1.75 MBytes 14.7 Mbits/sec
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[ 3] 335.0-336.0 sec 2.12 MBytes 17.8 Mbits/sec
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[ 3] 338.0-339.0 sec 1.88 MBytes 15.7 Mbits/sec
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[ 3] 341.0-342.0 sec 1.25 MBytes 10.5 Mbits/sec
[ 3] 342.0-343.0 sec 3.00 MBytes 25.2 Mbits/sec
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[ 3] 352.0-353.0 sec 3.88 MBytes 32.5 Mbits/sec
[ 3] 353.0-354.0 sec 5.50 MBytes 46.1 Mbits/sec
[ 3] 354.0-355.0 sec 2.75 MBytes 23.1 Mbits/sec
[ 3] 355.0-356.0 sec 3.50 MBytes 29.4 Mbits/sec
[ 3] 356.0-357.0 sec 7.12 MBytes 59.8 Mbits/sec
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[ 3] 359.0-360.0 sec 7.12 MBytes 59.8 Mbits/sec
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[ 3] 362.0-363.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 364.0-365.0 sec 5.38 MBytes 45.1 Mbits/sec
[ 3] 365.0-366.0 sec 4.62 MBytes 38.8 Mbits/sec
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[ 3] 367.0-368.0 sec 6.50 MBytes 54.5 Mbits/sec
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[ 3] 377.0-378.0 sec 4.50 MBytes 37.7 Mbits/sec
[ 3] 378.0-379.0 sec 2.88 MBytes 24.1 Mbits/sec
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[ 3] 380.0-381.0 sec 6.38 MBytes 53.5 Mbits/sec
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[ 3] 382.0-383.0 sec 6.12 MBytes 51.4 Mbits/sec
[ 3] 383.0-384.0 sec 7.50 MBytes 62.9 Mbits/sec
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[ 3] 386.0-387.0 sec 7.38 MBytes 61.9 Mbits/sec
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[ 3] 388.0-389.0 sec 7.25 MBytes 60.8 Mbits/sec
[ 3] 389.0-390.0 sec 4.38 MBytes 36.7 Mbits/sec
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[ 3] 391.0-392.0 sec 6.25 MBytes 52.4 Mbits/sec
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[ 3] 395.0-396.0 sec 7.38 MBytes 61.9 Mbits/sec
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[ 3] 408.0-409.0 sec 1.00 MBytes 8.39 Mbits/sec
[ 3] 409.0-410.0 sec 896 KBytes 7.34 Mbits/sec
[ 3] 410.0-411.0 sec 2.25 MBytes 18.9 Mbits/sec
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[ 3] 473.0-474.0 sec 896 KBytes 7.34 Mbits/sec
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[ 3] 0.0-636.7 sec 2.33 GBytes 31.4 Mbits/sec
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^ permalink raw reply
* Re: [PATCH v1 2/2] dt-bindings: clock: rockchip: Add support for clk input / output switch
From: kernel test robot @ 2024-03-26 6:53 UTC (permalink / raw)
To: Sugar Zhang, heiko
Cc: oe-kbuild-all, linux-rockchip, Sugar Zhang, Conor Dooley,
Krzysztof Kozlowski, Michael Turquette, Rob Herring, Stephen Boyd,
devicetree, linux-arm-kernel, linux-clk, linux-kernel
In-Reply-To: <1711340191-69588-2-git-send-email-sugar.zhang@rock-chips.com>
Hi Sugar,
kernel test robot noticed the following build warnings:
[auto build test WARNING on rockchip/for-next]
[also build test WARNING on linus/master v6.9-rc1 next-20240325]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Sugar-Zhang/clk-rockchip-Add-support-for-clk-input-output-switch/20240325-212211
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
patch link: https://lore.kernel.org/r/1711340191-69588-2-git-send-email-sugar.zhang%40rock-chips.com
patch subject: [PATCH v1 2/2] dt-bindings: clock: rockchip: Add support for clk input / output switch
compiler: loongarch64-linux-gcc (GCC) 13.2.0
reproduce: (https://download.01.org/0day-ci/archive/20240326/202403261442.9P6rk3Wk-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202403261442.9P6rk3Wk-lkp@intel.com/
dtcheck warnings: (new ones prefixed by >>)
>> Documentation/devicetree/bindings/clock/rockchip,clk-out.yaml: title: 'Rockchip Clock Out Control Module Binding' should not be valid under {'pattern': '([Bb]inding| [Ss]chema)'}
hint: Everything is a binding/schema, no need to say it. Describe what hardware the binding is for.
from schema $id: http://devicetree.org/meta-schemas/base.yaml#
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Krzysztof Kozlowski @ 2024-03-26 6:41 UTC (permalink / raw)
To: Josua Mayer, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <6a6e7c4d-d5fd-42ae-bc3d-a3978d65e8e4@solid-run.com>
On 25/03/2024 21:12, Josua Mayer wrote:
> Am 25.03.24 um 20:34 schrieb Krzysztof Kozlowski:
>> On 22/03/2024 11:08, Josua Mayer wrote:
>>> Am 21.03.24 um 22:47 schrieb Josua Mayer:
>>>> Add bindings for SolidRun Clearfog boards, using a new SoM based on
>>>> CN9130 SoC.
>>>> The carrier boards are identical to the older Armada 388 based Clearfog
>>>> boards. For consistency the carrier part of compatible strings are
>>>> copied, including the established "-a1" suffix.
>>>>
>>>> Signed-off-by: Josua Mayer <josua@solid-run.com>
>>>> ---
>>>> .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 12 ++++++++++++
>>>> 1 file changed, 12 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>>> index 16d2e132d3d1..36bdfd1bedd9 100644
>>>> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>>> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>>>> @@ -82,4 +82,16 @@ properties:
>>>> - const: marvell,armada-ap807-quad
>>>> - const: marvell,armada-ap807
>>>>
>>>> + - description:
>>>> + SolidRun CN9130 clearfog family single-board computers
>>>> + items:
>>>> + - enum:
>>>> + - solidrun,clearfog-base-a1
>>>> + - solidrun,clearfog-pro-a1
>>>> + - const: solidrun,clearfog-a1
>>>> + - const: solidrun,cn9130-sr-som
>>>> + - const: marvell,cn9130
>>>> + - const: marvell,armada-ap807-quad
>>>> + - const: marvell,armada-ap807
>>>> +
>>>> additionalProperties: true
>>> Before merging I would like some feedback about adding
>>> another product later, to ensure the compatibles above
>>> are adequate? In particular:
>>> - sequence of soc, cp, carrier compatibles
>>> - name of som compatible
>>>
>>> Draft for future bindings:
>>> - description:
>>> SolidRun CN9130 SoM based single-board computers
>>> with 1 external CP on the Carrier.
>>> items:
>>> - enum:
>>> - solidrun,cn9131-solidwan
>>> - const: marvell,cn9131
>>> - const: solidrun,cn9130-sr-som
>> This does not look correct. cn9131 is not compatible with your som.
> This is partially my question.
> I considered changing the som to "cn913x-sr-som".
>
> The SoM itself is always 9130, it contains the base SoC
> with 1x AP and 1x CP in a single chip.
> 9131 and 9132 <happen> on the carrier boards.
No wildcards, but if the SoM name is 9130 then use 9130.
The problem is that you use cn9130 SoC as fallback.
>
>>
>>> - const: marvell,cn9130
>> SoCs are compatible only in some cases, e.g. one is a subset of another
>> like stripped out of modem. Are you sure this is your case?
> This is more complex, CN9131 and CN9132 are not single SoCs.
> A "9132" is instantiated by connecting two southbridge chips
> via a Marvell defined bus, each providing additional IO
> such as network, i2c, gpio.
>
> Note that even the first, "9130", while a single chip, contains two dies:
> An "AP" (Application Processor I assume) with very limited IO (1xsdio, 1xi2c),
> and a "CP" (Communication Processor I assume) with lots of IO.
> This CP as far as I know today is identical to the southbridges
> mentioned above.
OK, but how does it affect compatibility between them? Which parts are
the same? Or how much is shared?
>
>>> - const: marvell,armada-ap807-quad
>>> - const: marvell,armada-ap807
>> Anyway, 6 compatibles is beyond useful amount. What are you expressing
>> here?
> I copied this part from the examples earlier in the file, such as:
> - description: Armada CN9132 SoC with two external CPs
> items:
> - const: marvell,cn9132
> - const: marvell,cn9131
> - const: marvell,cn9130
> - const: marvell,armada-ap807-quad
> - const: marvell,armada-ap807
>> Why is this even armada ap807?
> We noticed ap807 != ap806 (cn913x != 8040),
> because the thermal sensor coefficients converting
> raw values to celsius differed.
That's also not the best example. Might be correct but also looks
over-complicated. The point of board-level compatibles is to identify
machine and its common parts. It has little impact inside of kernel (at
least should be almost no users inside!), but there can be some users,
e.g. firmware or user-space.
This claims that cn9132 is compatible with ap807, so you have exactly
the same base. The same base is not CPU! It's about the S in SoC, so
"System". Could firmware use marvell,armada-ap807 compatible to properly
detect type of system and treat all these boards as ap807?
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v4 5/5] MAINTAINERS: tee: tstee: Add entry
From: Sumit Garg @ 2024-03-26 6:31 UTC (permalink / raw)
To: Balint Dobszay
Cc: op-tee, linux-doc, linux-kernel, linux-arm-kernel, jens.wiklander,
corbet, sudeep.holla, rdunlap, krzk, gyorgy.szing
In-Reply-To: <20240325151105.135667-6-balint.dobszay@arm.com>
On Mon, 25 Mar 2024 at 20:42, Balint Dobszay <balint.dobszay@arm.com> wrote:
>
> Create an entry for the newly added Trusted Services TEE driver, with
> Sudeep and myself as maintainers.
>
> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
> ---
> MAINTAINERS | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
-Sumit
> diff --git a/MAINTAINERS b/MAINTAINERS
> index fd221a7d4d1c..eaa89feabd25 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -22470,6 +22470,15 @@ F: Documentation/ABI/testing/configfs-tsm
> F: drivers/virt/coco/tsm.c
> F: include/linux/tsm.h
>
> +TRUSTED SERVICES TEE DRIVER
> +M: Balint Dobszay <balint.dobszay@arm.com>
> +M: Sudeep Holla <sudeep.holla@arm.com>
> +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> +L: trusted-services@lists.trustedfirmware.org
> +S: Maintained
> +F: Documentation/tee/ts-tee.rst
> +F: drivers/tee/tstee/
> +
> TTY LAYER AND SERIAL DRIVERS
> M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> M: Jiri Slaby <jirislaby@kernel.org>
> --
> 2.34.1
>
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^ permalink raw reply
* Re: [PATCH v6 13/14] drm/mediatek: Support CRC in OVL
From: CK Hu (胡俊光) @ 2024-03-26 6:11 UTC (permalink / raw)
To: Shawn Sung (宋孝謙), chunkuang.hu@kernel.org,
angelogioacchino.delregno@collabora.com
Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
Bibby Hsieh (謝濟遠),
jason-ch.chen@mediatek.corp-partner.google.com,
Nancy Lin (林欣螢), daniel@ffwll.ch,
p.zabel@pengutronix.de, dri-devel@lists.freedesktop.org,
airlied@gmail.com, sean@poorly.run, matthias.bgg@gmail.com,
fshao@chromium.org, linux-arm-kernel@lists.infradead.org
In-Reply-To: <20240322052829.9893-14-shawn.sung@mediatek.com>
Hi, Shawn:
On Fri, 2024-03-22 at 13:28 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> We choose OVL as the CRC generator from other hardware
> components that are also capable of calculating CRCs,
> since its frame done event triggers vblanks, it can be
> used as a signal to know when is safe to retrieve CRC of
> the frame.
>
> Please note that position of the hardware component
> that is chosen as CRC generator in the display path is
> significant. For example, while OVL is the first module
> in VDOSYS0, its CRC won't be affected by the modules
> after it, which means effects applied by PQ, Gamma,
> Dither or any other components after OVL won't be
> calculated in CRC generation.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 3 +
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 198
> ++++++++++++++++++++++--
> 3 files changed, 194 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index 17b0364112922..cb71effda9c2a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -351,6 +351,9 @@ static const struct mtk_ddp_comp_funcs ddp_ovl =
> {
> .clk_enable = mtk_ovl_clk_enable,
> .clk_disable = mtk_ovl_clk_disable,
> .config = mtk_ovl_config,
> + .crc_cnt = mtk_ovl_crc_cnt,
> + .crc_entry = mtk_ovl_crc_entry,
> + .crc_read = mtk_ovl_crc_read,
> .start = mtk_ovl_start,
> .stop = mtk_ovl_stop,
> .register_vblank_cb = mtk_ovl_register_vblank_cb,
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 082ac18fe04aa..c476056a5cbb5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -105,6 +105,9 @@ void mtk_ovl_enable_vblank(struct device *dev);
> void mtk_ovl_disable_vblank(struct device *dev);
> const u32 *mtk_ovl_get_formats(struct device *dev);
> size_t mtk_ovl_get_num_formats(struct device *dev);
> +size_t mtk_ovl_crc_cnt(struct device *dev);
> +u32 *mtk_ovl_crc_entry(struct device *dev);
> +void mtk_ovl_crc_read(struct device *dev);
>
> void mtk_ovl_adaptor_add_comp(struct device *dev, struct mtk_mutex
> *mutex);
> void mtk_ovl_adaptor_remove_comp(struct device *dev, struct
> mtk_mutex *mutex);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a936f338ab79d..279e6193e7975 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -24,12 +24,20 @@
> #define OVL_FME_CPL_INT BIT(1)
> #define DISP_REG_OVL_INTSTA 0x0008
> #define DISP_REG_OVL_EN 0x000c
> +#define OVL_EN BIT(0)
> +#define OVL_OP_8BIT_MODE BIT(4)
> +#define OVL_HG_FOVL_CK_ON BIT(8)
> +#define OVL_HF_FOVL_CK_ON BIT(10)
> +#define DISP_REG_OVL_TRIG 0x0010
> +#define OVL_CRC_EN BIT(8)
> +#define OVL_CRC_CLR BIT(9)
> #define DISP_REG_OVL_RST 0x0014
> #define DISP_REG_OVL_ROI_SIZE 0x0020
> #define DISP_REG_OVL_DATAPATH_CON 0x0024
> #define OVL_LAYER_SMI_ID_EN BIT(0)
> #define OVL_BGCLR_SEL_IN BIT(2)
> #define OVL_LAYER_AFBC_EN(n) BIT(4+n)
> +#define OVL_OUTPUT_CLAMP BIT(26)
> #define DISP_REG_OVL_ROI_BGCLR 0x0028
> #define DISP_REG_OVL_SRC_CON 0x002c
> #define DISP_REG_OVL_CON(n) (0x0030 + 0x20 * (n))
> @@ -42,7 +50,26 @@
> #define DISP_REG_OVL_RDMA_CTRL(n) (0x00c0 + 0x20 * (n))
> #define DISP_REG_OVL_RDMA_GMC(n) (0x00c8 + 0x20 * (n))
> #define DISP_REG_OVL_ADDR_MT2701 0x0040
> +#define DISP_REG_OVL_CRC 0x0270
> +#define OVL_CRC_OUT_MASK GENMASK(30, 0)
> #define DISP_REG_OVL_CLRFMT_EXT 0x02D0
> +#define DISP_REG_OVL_CLRFMT_EXT1 0x02D8
> +#define OVL_CLRFMT_EXT1_CSC_EN(n) (1 << (((n) *
> 4) + 1))
> +#define DISP_REG_OVL_Y2R_PARA_R0(n) (0x0134 + 0x28 * (n))
> +#define OVL_Y2R_PARA_C_CF_RMY (GENMAS
> K(14, 0))
> +#define DISP_REG_OVL_Y2R_PARA_G0(n) (0x013c + 0x28 * (n))
> +#define OVL_Y2R_PARA_C_CF_GMU (GENMAS
> K(30, 16))
> +#define DISP_REG_OVL_Y2R_PARA_B1(n) (0x0148 + 0x28 * (n))
> +#define OVL_Y2R_PARA_C_CF_BMV (GENMAS
> K(14, 0))
> +#define DISP_REG_OVL_Y2R_PARA_YUV_A_0(n) (0x014c + 0x28 * (n))
> +#define OVL_Y2R_PARA_C_CF_YA (GENMASK(10,
> 0))
> +#define OVL_Y2R_PARA_C_CF_UA (GENMASK(26,
> 16))
> +#define DISP_REG_OVL_Y2R_PARA_YUV_A_1(n) (0x0150 + 0x28 * (n))
> +#define OVL_Y2R_PARA_C_CF_VA (GENMASK(10,
> 0))
> +#define DISP_REG_OVL_Y2R_PRE_ADD2(n) (0x0154 + 0x28 * (n))
> +#define DISP_REG_OVL_R2R_R0(n) (0x0500 + 0x40
> * (n))
> +#define DISP_REG_OVL_R2R_G1(n) (0x0510 + 0x40
> * (n))
> +#define DISP_REG_OVL_R2R_B2(n) (0x0520 + 0x40
> * (n))
> #define DISP_REG_OVL_ADDR_MT8173 0x0f40
> #define DISP_REG_OVL_ADDR(ovl, n) ((ovl)->data->addr +
> 0x20 * (n))
> #define DISP_REG_OVL_HDR_ADDR(ovl, n) ((ovl)->data-
> >addr + 0x20 * (n) + 0x04)
> @@ -55,6 +82,8 @@
> #define OVL_CON_CLRFMT_MAN BIT(23)
> #define OVL_CON_BYTE_SWAP BIT(24)
> #define OVL_CON_RGB_SWAP BIT(25)
> +#define OVL_CON_MTX_AUTO_DIS BIT(26)
> +#define OVL_CON_MTX_EN BIT(27)
> #define OVL_CON_CLRFMT_RGB (1 << 12)
> #define OVL_CON_CLRFMT_RGBA8888 (2 << 12)
> #define OVL_CON_CLRFMT_ARGB8888 (3 << 12)
> @@ -62,6 +91,7 @@
> #define OVL_CON_CLRFMT_YUYV (5 << 12)
> #define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
> #define OVL_CON_CLRFMT_PARGB8888 (OVL_CON_CLRFMT_ARGB8888 |
> OVL_CON_CLRFMT_MAN)
> +#define OVL_CON_MTX_PROGRAMMABLE (8 << 16)
> #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ?
> \
> 0 : OVL_CON_CLRFMT_RGB)
> #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ?
> \
> @@ -131,6 +161,10 @@ static const u32 mt8195_formats[] = {
> DRM_FORMAT_YUYV,
> };
>
> +static const u32 mt8195_ovl_crc_ofs[] = {
> + DISP_REG_OVL_CRC,
> +};
> +
> struct mtk_disp_ovl_data {
> unsigned int addr;
> unsigned int gmc_bits;
> @@ -141,12 +175,15 @@ struct mtk_disp_ovl_data {
> const u32 *formats;
> size_t num_formats;
> bool supports_clrfmt_ext;
> + const u32 *crc_ofs;
> + size_t crc_cnt;
> };
>
> /*
> * struct mtk_disp_ovl - DISP_OVL driver structure
> * @crtc: associated crtc to report vblank events to
> * @data: platform data
> + * @crc: crc related information
> */
> struct mtk_disp_ovl {
> struct drm_crtc *crtc;
> @@ -156,8 +193,31 @@ struct mtk_disp_ovl {
> const struct mtk_disp_ovl_data *data;
> void (*vblank_cb)(void *data);
> void *vblank_cb_data;
> + resource_size_t regs_pa;
> + struct mtk_crtc_crc crc;
> };
>
> +size_t mtk_ovl_crc_cnt(struct device *dev)
> +{
> + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> +
> + return ovl->crc.cnt;
> +}
> +
> +u32 *mtk_ovl_crc_entry(struct device *dev)
> +{
> + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> +
> + return ovl->crc.va;
> +}
> +
> +void mtk_ovl_crc_read(struct device *dev)
> +{
> + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> +
> + mtk_crtc_read_crc(&ovl->crc, ovl->regs);
> +}
> +
> static irqreturn_t mtk_disp_ovl_irq_handler(int irq, void *dev_id)
> {
> struct mtk_disp_ovl *priv = dev_id;
> @@ -237,21 +297,40 @@ void mtk_ovl_clk_disable(struct device *dev)
> void mtk_ovl_start(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> + unsigned int reg = readl(ovl->regs +
> DISP_REG_OVL_DATAPATH_CON);
>
> - if (ovl->data->smi_id_en) {
> - unsigned int reg;
> + if (ovl->data->smi_id_en)
> + reg |= OVL_LAYER_SMI_ID_EN;
>
> - reg = readl(ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> - reg = reg | OVL_LAYER_SMI_ID_EN;
> - writel_relaxed(reg, ovl->regs +
> DISP_REG_OVL_DATAPATH_CON);
> + /*
> + * When doing Y2R conversion, it's common to get an output
> + * that is larger than 10 bits (negative numbers).
> + * Enable this bit to clamp the output to 10 bits per channel
> + * (should always be enabled)
> + */
> + reg |= OVL_OUTPUT_CLAMP;
> + writel_relaxed(reg, ovl->regs + DISP_REG_OVL_DATAPATH_CON);
> +
> + reg = OVL_EN;
> + if (ovl->data->crc_cnt) {
> + /* enable crc and its related clocks */
> + writel_relaxed(OVL_CRC_EN, ovl->regs +
> DISP_REG_OVL_TRIG);
> + reg |= OVL_OP_8BIT_MODE | OVL_HG_FOVL_CK_ON |
> OVL_HF_FOVL_CK_ON;
> }
> - writel_relaxed(0x1, ovl->regs + DISP_REG_OVL_EN);
> + writel_relaxed(reg, ovl->regs + DISP_REG_OVL_EN);
> +
> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> + mtk_crtc_start_crc_cmdq(&ovl->crc);
> +#endif
> }
>
> void mtk_ovl_stop(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
>
> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> + mtk_crtc_stop_crc_cmdq(&ovl->crc);
> +#endif
> writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_EN);
> if (ovl->data->smi_id_en) {
> unsigned int reg;
> @@ -488,6 +567,83 @@ void mtk_ovl_layer_config(struct device *dev,
> unsigned int idx,
> (state->base.fb && !state->base.fb->format->has_alpha))
> ignore_pixel_alpha = OVL_CONST_BLEND;
>
> + /*
> + * OVL only supports 8 bits data in CRC calculation, transform
> 10-bit
> + * RGB to 8-bit RGB by leveraging the ability of the Y2R (YUV-
> to-RGB)
> + * hardware to multiply coefficients, although there is nothing
> to do
> + * with the YUV format.
> + */
> + if (ovl->data->supports_clrfmt_ext) {
> + u32 y2r_coef = 0, y2r_offset = 0, r2r_coef = 0, csc_en
> = 0;
> +
> + if (is_10bit_rgb(fmt)) {
> + con |= OVL_CON_MTX_AUTO_DIS | OVL_CON_MTX_EN |
> OVL_CON_MTX_PROGRAMMABLE;
> +
> + /*
> + * Y2R coefficient setting
> + * bit 13 is 2^1, bit 12 is 2^0, bit 11 is 2^-
> 1,
> + * bit 10 is 2^-2 = 0.25
> + */
> + y2r_coef = BIT(10);
> +
> + /* -1 in 10bit */
> + y2r_offset = GENMASK(10, 0) - 1;
I don't know why do this? If an input value is 0x100, then
0x100 right shit 2 bit become 0x40.
0x40 - 1 = 0x3f.
0x3f left shift 2 bit become 0xfc.
So input 0x100 and output 0xfc. Why?
> +
> + /*
> + * R2R coefficient setting
> + * bit 19 is 2^1, bit 18 is 2^0, bit 17 is 2^-
> 1,
> + * bit 20 is 2^2 = 4
> + */
> + r2r_coef = BIT(20);
> +
> + /* CSC_EN is for R2R */
> + csc_en = OVL_CLRFMT_EXT1_CSC_EN(idx);
> +
> + /*
> + * 1. YUV input data - 1 and shift right for 2
> bits to remove it
> + * [R'] [0.25 0 0] [Y in - 1]
> + * [G'] = [ 0 0.25 0] * [U in - 1]
> + * [B'] [ 0 0 0.25] [V in - 1]
> + *
> + * 2. shift left for 2 bit letting the last 2
> bits become 0
You truncate the last two bit, so some quality lost. I think the
quality is main function and CRC is just for debug. So it's better that
in normal case we keep quality and only for debug to lost the quality.
I have another question. You just truncate the last two bit but it is
still 10 bit value, so CRC could calculate this 10 bit value? I don't
know why you say CRC just for 8 bit?
Regards,
CK
> + * [R out] [ 4 0 0] [R']
> + * [G out] = [ 0 4 0] * [G']
> + * [B out] [ 0 0 4] [B']
> + */
> + }
> +
> + mtk_ddp_write_mask(cmdq_pkt, y2r_coef,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_R0(idx),
> + OVL_Y2R_PARA_C_CF_RMY);
> + mtk_ddp_write_mask(cmdq_pkt, (y2r_coef << 16),
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_G0(idx),
> + OVL_Y2R_PARA_C_CF_GMU);
> + mtk_ddp_write_mask(cmdq_pkt, y2r_coef,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_B1(idx),
> + OVL_Y2R_PARA_C_CF_BMV);
> +
> + mtk_ddp_write_mask(cmdq_pkt, y2r_offset,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_YUV_A_0(idx),
> + OVL_Y2R_PARA_C_CF_YA);
> + mtk_ddp_write_mask(cmdq_pkt, (y2r_offset << 16),
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_YUV_A_0(idx),
> + OVL_Y2R_PARA_C_CF_UA);
> + mtk_ddp_write_mask(cmdq_pkt, y2r_offset,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_Y2R_PARA_YUV_A_1(idx),
> + OVL_Y2R_PARA_C_CF_VA);
> +
> + mtk_ddp_write_relaxed(cmdq_pkt, r2r_coef,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_R2R_R0(idx));
> + mtk_ddp_write_relaxed(cmdq_pkt, r2r_coef,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_R2R_G1(idx));
> + mtk_ddp_write_relaxed(cmdq_pkt, r2r_coef,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_R2R_B2(idx));
> +
> + mtk_ddp_write_mask(cmdq_pkt, csc_en,
> + &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_CLRFMT_EXT1,
> + OVL_CLRFMT_EXT1_CSC_EN(idx));
> + }
> +
> if (pending->rotation & DRM_MODE_REFLECT_Y) {
> con |= OVL_CON_VIRT_FLIP;
> addr += (pending->height - 1) * pending->pitch;
> @@ -594,15 +750,31 @@ static int mtk_disp_ovl_probe(struct
> platform_device *pdev)
> dev_err(dev, "failed to ioremap ovl\n");
> return PTR_ERR(priv->regs);
> }
> +
> + priv->data = of_device_get_match_data(dev);
> + platform_set_drvdata(pdev, priv);
> +
> + if (priv->data->crc_cnt) {
> + mtk_crtc_init_crc(&priv->crc,
> + priv->data->crc_ofs, priv->data-
> >crc_cnt,
> + DISP_REG_OVL_TRIG, OVL_CRC_CLR);
> + }
> +
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
> if (ret)
> dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
> -#endif
> -
> - priv->data = of_device_get_match_data(dev);
> - platform_set_drvdata(pdev, priv);
>
> + if (priv->data->crc_cnt) {
> + if (of_property_read_u32_index(dev->of_node,
> + "mediatek,gce-events",
> 0,
> + &priv->crc.cmdq_event))
> {
> + dev_warn(dev, "failed to get gce-events for
> crc\n");
> + }
> + priv->crc.cmdq_reg = &priv->cmdq_reg;
> + mtk_crtc_create_crc_cmdq(dev, &priv->crc);
> + }
> +#endif
> ret = devm_request_irq(dev, irq, mtk_disp_ovl_irq_handler,
> IRQF_TRIGGER_NONE, dev_name(dev), priv);
> if (ret < 0) {
> @@ -623,6 +795,10 @@ static int mtk_disp_ovl_probe(struct
> platform_device *pdev)
>
> static void mtk_disp_ovl_remove(struct platform_device *pdev)
> {
> + struct device *dev = &pdev->dev;
> + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> +
> + mtk_crtc_destroy_crc(&ovl->crc);
> component_del(&pdev->dev, &mtk_disp_ovl_component_ops);
> pm_runtime_disable(&pdev->dev);
> }
> @@ -693,6 +869,8 @@ static const struct mtk_disp_ovl_data
> mt8195_ovl_driver_data = {
> .formats = mt8195_formats,
> .num_formats = ARRAY_SIZE(mt8195_formats),
> .supports_clrfmt_ext = true,
> + .crc_ofs = mt8195_ovl_crc_ofs,
> + .crc_cnt = ARRAY_SIZE(mt8195_ovl_crc_ofs),
> };
>
> static const struct of_device_id mtk_disp_ovl_driver_dt_match[] = {
_______________________________________________
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^ permalink raw reply
* Re: [WIP 1/3] rust: Introduce atomic module
From: Trevor Gross @ 2024-03-26 5:56 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alice Ryhl, Boqun Feng, rust-for-linux, linux-kernel, linux-arch,
llvm, Miguel Ojeda, Alex Gaynor, Wedson Almeida Filho, Gary Guo,
Björn Roy Baron, Benno Lossin, Andreas Hindborg, Alan Stern,
Andrea Parri, Will Deacon, Peter Zijlstra, Nicholas Piggin,
David Howells, Jade Alglave, Luc Maranget, Paul E. McKenney,
Akira Yokosawa, Daniel Lustig, Joel Fernandes, Nathan Chancellor,
Nick Desaulniers, kent.overstreet, Greg Kroah-Hartman, elver,
Mark Rutland, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, x86, H. Peter Anvin, Catalin Marinas, torvalds,
linux-arm-kernel, linux-fsdevel
In-Reply-To: <497668ec-c2d5-4cb4-9c2d-8e6f7129a42e@lunn.ch>
On Sat, Mar 23, 2024 at 10:10 AM Andrew Lunn <andrew@lunn.ch> wrote:
> > > Is it possible to somehow poison rusts own atomics? I would not be
> > > too surprised if somebody with good Rust knowledge but new to the
> > > kernel tries using Rusts atomics. Either getting the compiler to fail
> > > the build, or it throws an Opps on first invocation would be good.
> >
> > We could try to get a flag added to the Rust standard library that
> > removes the core::sync::atomic module entirely, then pass that flag.
>
> Just looking down the road a bit, are there other features in the
> standard library which are not applicable to Linux kernel space?
> Ideally we want a solution not just for atomics but a generic solution
> which can disable a collection of features? Maybe one by one?
Clippy is an easy way to do this via the disallowed_* lints.
disallowed_types [1] would be applicable here to forbid
`core::atomic::Atomic*`.
I don't think KCI currently checks clippy, but we probably want that
at some point.
- Trevor
[1]: https://rust-lang.github.io/rust-clippy/master/index.html#/disallowed_types
> And i assume somebody will try to use Rust in uboot/barebox. It
> probably has similar requirements to the Linux kernel? But what about
> Zephyr? Or VxWorks? Darwin?
>
> Andrew
>
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^ permalink raw reply
* [PATCH net-next RESEND] net: axienet: Fix kernel doc warnings
From: Suraj Gupta @ 2024-03-26 5:53 UTC (permalink / raw)
To: radhey.shyam.pandey, davem, edumazet, kuba, pabeni, michal.simek,
netdev, linux-arm-kernel
Cc: linux-kernel, git, harini.katakam, suraj.gupta2
Add description of mdio enable, mdio disable and mdio wait functions.
Add description of skb pointer in axidma_bd data structure.
Remove 'phy_node' description in axienet local data structure since
it is not a valid struct member.
Correct description of struct axienet_option.
Fix below kernel-doc warnings in drivers/net/ethernet/xilinx/:
1) xilinx_axienet_mdio.c:1: warning: no structured comments found
2) xilinx_axienet.h:379: warning: Function parameter or struct member
'skb' not described in 'axidma_bd'
3) xilinx_axienet.h:538: warning: Excess struct member 'phy_node'
description in 'axienet_local'
4) xilinx_axienet.h:1002: warning: expecting prototype for struct
axiethernet_option. Prototype was for struct axienet_option instead
Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
---
Note: Earlier version didn't reached to mainline due to my email
configuration issues. So again sending out with resend tag.
drivers/net/ethernet/xilinx/xilinx_axienet.h | 4 ++--
.../net/ethernet/xilinx/xilinx_axienet_mdio.c | 23 ++++++++++++++++---
2 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index 807ead678551..d0d1ae3b4e2c 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -359,6 +359,7 @@
* @app2: MM2S/S2MM User Application Field 2.
* @app3: MM2S/S2MM User Application Field 3.
* @app4: MM2S/S2MM User Application Field 4.
+ * @skb: Pointer to SKB transferred using DMA
*/
struct axidma_bd {
u32 next; /* Physical address of next buffer descriptor */
@@ -399,7 +400,6 @@ struct skbuf_dma_descriptor {
* struct axienet_local - axienet private per device data
* @ndev: Pointer for net_device to which it will be attached.
* @dev: Pointer to device structure
- * @phy_node: Pointer to device node structure
* @phylink: Pointer to phylink instance
* @phylink_config: phylink configuration settings
* @pcs_phy: Reference to PCS/PMA PHY if used
@@ -537,7 +537,7 @@ struct axienet_local {
};
/**
- * struct axiethernet_option - Used to set axi ethernet hardware options
+ * struct axienet_option - Used to set axi ethernet hardware options
* @opt: Option to be set.
* @reg: Register offset to be written for setting the option
* @m_or: Mask to be ORed for setting the option in the register
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
index 2f07fde361aa..9ca2643c921e 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
@@ -20,7 +20,14 @@
#define DEFAULT_MDIO_FREQ 2500000 /* 2.5 MHz */
#define DEFAULT_HOST_CLOCK 150000000 /* 150 MHz */
-/* Wait till MDIO interface is ready to accept a new transaction.*/
+/**
+ * axienet_mdio_wait_until_ready - MDIO wait function
+ * @lp: Pointer to axienet local data structure.
+ *
+ * Return : 0 on success, Negative value on errors
+ *
+ * Wait till MDIO interface is ready to accept a new transaction.
+ */
static int axienet_mdio_wait_until_ready(struct axienet_local *lp)
{
u32 val;
@@ -30,14 +37,24 @@ static int axienet_mdio_wait_until_ready(struct axienet_local *lp)
1, 20000);
}
-/* Enable the MDIO MDC. Called prior to a read/write operation */
+/**
+ * axienet_mdio_mdc_enable - MDIO MDC enable function
+ * @lp: Pointer to axienet local data structure.
+ *
+ * Enable the MDIO MDC. Called prior to a read/write operation
+ */
static void axienet_mdio_mdc_enable(struct axienet_local *lp)
{
axienet_iow(lp, XAE_MDIO_MC_OFFSET,
((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK));
}
-/* Disable the MDIO MDC. Called after a read/write operation*/
+/**
+ * axienet_mdio_mdc_disable - MDIO MDC disable function
+ * @lp: Pointer to axienet local data structure.
+ *
+ * Disable the MDIO MDC. Called after a read/write operation
+ */
static void axienet_mdio_mdc_disable(struct axienet_local *lp)
{
u32 mc_reg;
--
2.43.0
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^ permalink raw reply related
* Re: [PATCH V3 2/2] cpufreq: scmi: Register for limit change notifications
From: Sibi Sankar @ 2024-03-26 5:25 UTC (permalink / raw)
To: Lukasz Luba
Cc: sudeep.holla, Cristian Marussi, linux-arm-kernel, pierre.gondois,
dietmar.eggemann, morten.rasmussen, viresh.kumar, rafael,
linux-pm, linux-kernel, quic_mdtipton, linux-arm-msm
In-Reply-To: <a576209f-ffda-4891-82e9-21f153b57a26@arm.com>
On 3/22/24 16:15, Lukasz Luba wrote:
> Hi Sibi,
>
> On 3/1/24 05:31, Sibi Sankar wrote:
>>
>>
>> On 2/29/24 19:45, Lukasz Luba wrote:
>>>
>>>
>>> On 2/29/24 12:11, Cristian Marussi wrote:
>>>> On Thu, Feb 29, 2024 at 11:45:41AM +0000, Lukasz Luba wrote:
>>>>>
>>>>>
>>>>> On 2/29/24 11:28, Cristian Marussi wrote:
>>>>>> On Thu, Feb 29, 2024 at 10:22:39AM +0000, Lukasz Luba wrote:
>>>>>>>
>>>>>>>
>>>>>>> On 2/29/24 09:59, Lukasz Luba wrote:
>>>>>>>>
>>>>>>>>
>>>>>>>> On 2/28/24 17:00, Sibi Sankar wrote:
>>>>>>>>>
>>>>>>>>>
>>>>>>>>> On 2/28/24 18:54, Lukasz Luba wrote:
>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>>> On 2/27/24 18:16, Sibi Sankar wrote:
>>>>>>>>>>> Register for limit change notifications if supported and use
>>>>>>>>>>> the throttled
>>>>>>>>>>> frequency from the notification to apply HW pressure.
>>>>>>>>>
>>>>>>>>> Lukasz,
>>>>>>>>>
>>>>>>>>> Thanks for taking time to review the series!
>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>>>>>>>>>>> ---
>>>>>>>>>>>
>>>>>>>>>>> v3:
>>>>>>>>>>> * Sanitize range_max received from the notifier. [Pierre]
>>>>>>>>>>> * Update commit message.
>>>>>>>>>>>
>>>>>>>>>>> � drivers/cpufreq/scmi-cpufreq.c | 29
>>>>>>>>>>> ++++++++++++++++++++++++++++-
>>>>>>>>>>> � 1 file changed, 28 insertions(+), 1 deletion(-)
>>>>>>>>>>>
>>>>>>>>>>> diff --git a/drivers/cpufreq/scmi-cpufreq.c
>>>>>>>>>>> b/drivers/cpufreq/scmi-cpufreq.c
>>>>>>>>>>> index 76a0ddbd9d24..78b87b72962d 100644
>>>>>>>>>>> --- a/drivers/cpufreq/scmi-cpufreq.c
>>>>>>>>>>> +++ b/drivers/cpufreq/scmi-cpufreq.c
>>>>>>>>>>> @@ -25,9 +25,13 @@ struct scmi_data {
>>>>>>>>>>> ����� int domain_id;
>>>>>>>>>>> ����� int nr_opp;
>>>>>>>>>>> ����� struct device *cpu_dev;
>>>>>>>>>>> +��� struct cpufreq_policy *policy;
>>>>>>>>>>> ����� cpumask_var_t opp_shared_cpus;
>>>>>>>>>>> +��� struct notifier_block limit_notify_nb;
>>>>>>>>>>> � };
>>>>>>>>>>> +const struct scmi_handle *handle;
>>>>>>>>
>>>>>>>> I've missed this bit here.
>>>>>>>
>>>>>>> So for this change we actually have to ask Cristian or Sudeep
>>>>>>> because I'm not sure if we have only one 'handle' instance
>>>>>>> for all cpufreq devices.
>>>>>>>
>>>>>>> If we have different 'handle' we cannot move it to the
>>>>>>> global single pointer.
>>>>>>>
>>>>>>> Sudeep, Cristian what do you think?
>>>>>>
>>>>>> I was just replying noticing this :D .... since SCMI drivers can be
>>>>>> probed multiple times IF you defined multiple scmi top nodes in
>>>>>> your DT
>>>>>> containing the same protocol nodes, they receive a distinct
>>>>>> sdev/handle/ph
>>>>>> for each probe...so any attempt to globalize these wont work...BUT...
>>>>>>
>>>>>> ...this is a bit of a weird setup BUT it is not against the spec
>>>>>> and it can
>>>>>> be used to parallelize more the SCMI accesses to disjont set of
>>>>>> resources
>>>>>> within the same protocol (a long story here...) AND this type of
>>>>>> setup is
>>>>>> something that it is already used by some other colleagues of Sibi
>>>>>> working
>>>>>> on a different line of products (AFAIK)...
>>>>>>
>>>>>> So, for these reasons, usually, all the other SCMI drivers have
>>>>>> per-instance
>>>>>> non-global references to handle/sdev/ph....
>>>>>>
>>>>>> ...having said that, thought, looking at the structure of CPUFReq
>>>>>> drivers, I am not sure that they can stand such a similar setup
>>>>>> where multiple instances of this same driver are probed
>>>>>>
>>>>>> .... indeed the existent *ph refs above is already global....so it
>>>>>> wont already
>>>>>> work anyway in case of multiple instances now...
>>>>>>
>>>>>> ...and if I look at how CPUFreq expects the signature of
>>>>>> scmi_cpufreq_get_rate()
>>>>>> to be annd how it is implemented now using the global *ph
>>>>>> reference, it is
>>>>>> clearly already not working cleanly on a multi-instance setup...
>>>>>>
>>>>>> ...now...I can imagine how to (maybe) fix the above removing the
>>>>>> globals and
>>>>>> fixing this, BUT the question, more generally, is CPUFreq supposed
>>>>>> to work at all in
>>>>>> this multi-probed mode of operation ?
>>>>>> Does it even make sense to be able to support this in CPUFREQ ?
>>>>>>
>>>>>> (as an example in cpufreq,c there is static global cpufreq_driver
>>>>>> pointing to the arch-specific configured driver BUT that also
>>>>>> holds
>>>>>> some .driver_data AND that cleraly wont be instance specific if
>>>>>> you
>>>>>> probe multiple times and register with CPUFreq multiple times...)
>>>>>>
>>>>>> More questions than answers here :D
>>>>>>
>>>>>
>>>>> Thanks Cristian for instant response. Yes, indeed now we have more
>>>>> questions :) (which is good). But that's good description of the
>>>>> situation.
>>>>>
>>>>> So lets consider a few option what we could do now:
>>>>> 1. Let Sibi add another global state the 'handle' but add
>>>>> a BUG_ON() or WARN_ON() in the probe path if the next
>>>>> 'handle' instance is different than already set in global.
>>>>> This would simply mean that we don't support (yet)
>>>>> such configuration in a platform. As you said, we
>>>>> already have the *ph global, so maybe such platforms
>>>>> with multiple instances for this particular cpufreq and
>>>>> performance protocol don't exist yet.
>>>>
>>>> Yes this is the quickst way (and a WARN_ON() is better I'd say) but
>>>> there
>>>> are similar issues of "unicity" currently already with another
>>>> vendor SCMI
>>>> drivers and custom protocol currently under review, so I was
>>>> thinking to
>>>> add a new common mechanism in SCMI to handle this ... not thought about
>>>> this really in depth and I want to chat with Sudeep about this...
>>>>
>>>>> 2. Ask Sibi to wait with this change, till we refactor the
>>>>> exiting driver such that it could support easily those
>>>>> multiple instances. Then pick up this patch set.
>>>>> Although, we would also like to have those notifications from our
>>>>> Juno SCP reference FW, so the feature is useful.
>>>>> 3. Ask Sibi to refactor his patch to somehow get the 'handle'
>>>>> in different way, using exiting code and not introduce this
>>>>> global.
>>>>>
>>>>
>>>>> IHMO we could do this in steps: 1. and then 2. When
>>>>> we create some mock platform to test this refactoring we can
>>>>> start cleaning it.
>>
>> I should be able to volunteer a platform to test against when
>> we have things ready.
>>
>>>>>
>>>>
>>>> Both of these options really beg an answer to my original previous q
>>>> question...if we somehow enable this multi-probe support in the
>>>> scmi-cpufreq.c driver by avoiding glbals refs, does this work at all in
>>>> the context of CPUFreq ?
>>>
>>> I don't know yet.
>>>
>>>>
>>>> ...or it is just that CPUFreq cannot handle such a configuration (and
>>>> maybe dont want to) and so the only solution here is just 1. at
>>>> first and
>>>> then a common refined mechanism (as mentioned above) to ensure this
>>>> "unicity"
>>>> of the probes for some drivers ?
>>>
>>> This sounds reasonable.
>>>
>>>>
>>>> I'm not familiar enough to grasp if this "multi-probed" mode of
>>>> operation is
>>>> allowed/supported by CPUFreq and, more important, if it makes any sense
>>>> at all to be a supported mode...
>>>>
>>>
>>> OK, let me check some stuff in the code and think for a while on that.
>>> Thanks Cristian!
>>>
>>> Sibi, please give me a few days. In the meantime you can continue
>>> on the 'boost' patch set probably.
>>
>> sure, thanks. I've plenty things to send out so no hurry ;)
>>
>> -Sibi
>>
>
> I've went through the cpufreq. It's quite complicated how those
> policies, cpus, drivers are setup. Although, IHMO we should be
> safe with you current proposal in this patch.
>
> As we discussed with Cristian, we can take that approach further.
>
> Therefore, you can add:
>
> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Thanks, I'll re-spin the series with a WARN_ON() in the
interim.
-Sibi
>
> Regards,
> Lukasz
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^ permalink raw reply
* [PATCH v4 1/1] dt-bindings: net: starfive,jh7110-dwmac: Add StarFive JH8100 support
From: Tan Chun Hau @ 2024-03-26 5:25 UTC (permalink / raw)
To: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Simon Horman, Bartosz Golaszewski,
Andrew Halaney, Jisheng Zhang, Uwe Kleine-König,
Russell King
Cc: Ley Foon Tan, Jee Heng Sia, netdev, devicetree, linux-kernel,
linux-stm32, linux-arm-kernel, linux-riscv
In-Reply-To: <20240326052505.197408-1-chunhau.tan@starfivetech.com>
Add StarFive JH8100 dwmac support.
The JH8100 dwmac shares the same driver code as the JH7110 dwmac
and has only one reset signal.
Please refer to below:
JH8100: reset-names = "stmmaceth";
JH7110: reset-names = "stmmaceth", "ahb";
JH7100: reset-names = "ahb";
Example usage of JH8100 in the device tree:
gmac0: ethernet@16030000 {
compatible = "starfive,jh8100-dwmac",
"starfive,jh7110-dwmac",
"snps,dwmac-5.20";
...
};
Signed-off-by: Tan Chun Hau <chunhau.tan@starfivetech.com>
---
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/starfive,jh7110-dwmac.yaml | 54 ++++++++++++++-----
2 files changed, 41 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 6b0341a8e0ea..a6d596b7dcf4 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -97,6 +97,7 @@ properties:
- snps,dwxgmac-2.10
- starfive,jh7100-dwmac
- starfive,jh7110-dwmac
+ - starfive,jh8100-dwmac
reg:
minItems: 1
diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
index 0d1962980f57..ce018e9768d2 100644
--- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
@@ -18,6 +18,7 @@ select:
enum:
- starfive,jh7100-dwmac
- starfive,jh7110-dwmac
+ - starfive,jh8100-dwmac
required:
- compatible
@@ -30,6 +31,10 @@ properties:
- items:
- const: starfive,jh7110-dwmac
- const: snps,dwmac-5.20
+ - items:
+ - const: starfive,jh8100-dwmac
+ - const: starfive,jh7110-dwmac
+ - const: snps,dwmac-5.20
reg:
maxItems: 1
@@ -107,20 +112,41 @@ allOf:
contains:
const: starfive,jh7110-dwmac
then:
- properties:
- interrupts:
- minItems: 3
- maxItems: 3
-
- interrupt-names:
- minItems: 3
- maxItems: 3
-
- resets:
- minItems: 2
-
- reset-names:
- minItems: 2
+ if:
+ properties:
+ compatible:
+ contains:
+ const: starfive,jh8100-dwmac
+ then:
+ properties:
+ interrupts:
+ minItems: 3
+ maxItems: 3
+
+ interrupt-names:
+ minItems: 3
+ maxItems: 3
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ const: stmmaceth
+ else:
+ properties:
+ interrupts:
+ minItems: 3
+ maxItems: 3
+
+ interrupt-names:
+ minItems: 3
+ maxItems: 3
+
+ resets:
+ minItems: 2
+
+ reset-names:
+ minItems: 2
unevaluatedProperties: false
--
2.25.1
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^ permalink raw reply related
* [PATCH v4 0/1] Add StarFive JH8100 dwmac support
From: Tan Chun Hau @ 2024-03-26 5:25 UTC (permalink / raw)
To: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Emil Renner Berthing, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Simon Horman, Bartosz Golaszewski,
Andrew Halaney, Jisheng Zhang, Uwe Kleine-König,
Russell King
Cc: Ley Foon Tan, Jee Heng Sia, netdev, devicetree, linux-kernel,
linux-stm32, linux-arm-kernel, linux-riscv
Add StarFive JH8100 dwmac support.
The JH8100 dwmac shares the same driver code as the JH7110 dwmac
and has only one reset signal.
Please refer to below:
JH8100: reset-names = "stmmaceth";
JH7110: reset-names = "stmmaceth", "ahb";
JH7100: reset-names = "ahb";
Example usage of JH8100 in the device tree:
gmac0: ethernet@16030000 {
compatible = "starfive,jh8100-dwmac",
"starfive,jh7110-dwmac",
"snps,dwmac-5.20";
...
};
Changes in v4:
- restructure content based on feedback received.
Tan Chun Hau (1):
dt-bindings: net: starfive,jh7110-dwmac: Add StarFive JH8100 support
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../bindings/net/starfive,jh7110-dwmac.yaml | 54 ++++++++++++++-----
2 files changed, 41 insertions(+), 14 deletions(-)
--
2.25.1
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^ permalink raw reply
* RE: [PATCH v3 1/1] dt-bindings: net: starfive,jh7110-dwmac: Add StarFive JH8100 support
From: ChunHau Tan @ 2024-03-26 5:24 UTC (permalink / raw)
To: Rob Herring
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Emil Renner Berthing, Krzysztof Kozlowski, Conor Dooley,
Maxime Coquelin, Alexandre Torgue, Simon Horman,
Bartosz Golaszewski, Andrew Halaney, Jisheng Zhang,
Uwe Kleine-König, Russell King, Leyfoon Tan, JeeHeng Sia,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org
In-Reply-To: <20240325162245.GA4167001-robh@kernel.org>
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Tuesday, 26 March, 2024 12:23 AM
> To: ChunHau Tan <chunhau.tan@starfivetech.com>
> Cc: David S . Miller <davem@davemloft.net>; Eric Dumazet
> <edumazet@google.com>; Jakub Kicinski <kuba@kernel.org>; Paolo Abeni
> <pabeni@redhat.com>; Emil Renner Berthing <kernel@esmil.dk>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley
> <conor+dt@kernel.org>; Maxime Coquelin <mcoquelin.stm32@gmail.com>;
> Alexandre Torgue <alexandre.torgue@foss.st.com>; Simon Horman
> <horms@kernel.org>; Bartosz Golaszewski <bartosz.golaszewski@linaro.org>;
> Andrew Halaney <ahalaney@redhat.com>; Jisheng Zhang <jszhang@kernel.org>;
> Uwe Kleine-König <u.kleine-koenig@pengutronix.de>; Russell King
> <rmk+kernel@armlinux.org.uk>; Leyfoon Tan <leyfoon.tan@starfivetech.com>;
> JeeHeng Sia <jeeheng.sia@starfivetech.com>; netdev@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-stm32@st-md-mailman.stormreply.com;
> linux-arm-kernel@lists.infradead.org; linux-riscv@lists.infradead.org
> Subject: Re: [PATCH v3 1/1] dt-bindings: net: starfive,jh7110-dwmac: Add
> StarFive JH8100 support
>
> On Mon, Mar 25, 2024 at 01:51:31AM -0700, Tan Chun Hau wrote:
> > Add StarFive JH8100 dwmac support.
> > The JH8100 dwmac shares the same driver code as the JH7110 dwmac and
> > has only one reset signal.
> >
> > Please refer to below:
> >
> > JH8100: reset-names = "stmmaceth";
> > JH7110: reset-names = "stmmaceth", "ahb";
>
> It's debatable whether JH8100 is compatible with JH7110 if the 2nd reset was
> not optional. I guess if the Linux driver treated it that way, we can get away with
> it. It would simplify the conditionals in the schema if the t also treated the
> 2nd entry as optional on JH7110 as well.
Yes, Linux driver and snps,dwmac.yaml treated it that way.
please refer to
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/net/snps%2Cdwmac.yaml#L143
>
> > JH7100: reset-names = "ahb";
> >
> > Example usage of JH8100 in the device tree:
> >
> > gmac0: ethernet@16030000 {
> > compatible = "starfive,jh8100-dwmac",
> > "starfive,jh7110-dwmac",
> > "snps,dwmac-5.20";
> > ...
> > };
> >
> > Signed-off-by: Tan Chun Hau <chunhau.tan@starfivetech.com>
> > ---
> > .../devicetree/bindings/net/snps,dwmac.yaml | 1 +
> > .../bindings/net/starfive,jh7110-dwmac.yaml | 82 +++++++++++++------
> > 2 files changed, 58 insertions(+), 25 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > index 6b0341a8e0ea..a6d596b7dcf4 100644
> > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > @@ -97,6 +97,7 @@ properties:
> > - snps,dwxgmac-2.10
> > - starfive,jh7100-dwmac
> > - starfive,jh7110-dwmac
> > + - starfive,jh8100-dwmac
> >
> > reg:
> > minItems: 1
> > diff --git
> > a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> > b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> > index 0d1962980f57..da3cc984fec9 100644
> > --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> > +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
> > @@ -18,6 +18,7 @@ select:
> > enum:
> > - starfive,jh7100-dwmac
> > - starfive,jh7110-dwmac
> > + - starfive,jh8100-dwmac
> > required:
> > - compatible
> >
> > @@ -30,6 +31,10 @@ properties:
> > - items:
> > - const: starfive,jh7110-dwmac
> > - const: snps,dwmac-5.20
> > + - items:
> > + - const: starfive,jh8100-dwmac
> > + - const: starfive,jh7110-dwmac
> > + - const: snps,dwmac-5.20
> >
> > reg:
> > maxItems: 1
> > @@ -83,29 +88,13 @@ allOf:
> > - if:
> > properties:
> > compatible:
> > - contains:
> > - const: starfive,jh7100-dwmac
> > - then:
> > - properties:
> > - interrupts:
> > - minItems: 2
> > - maxItems: 2
> > -
> > - interrupt-names:
> > - minItems: 2
> > - maxItems: 2
> > -
> > - resets:
> > - maxItems: 1
> > -
> > - reset-names:
> > - const: ahb
> > -
> > - - if:
> > - properties:
> > - compatible:
> > - contains:
> > - const: starfive,jh7110-dwmac
> > + allOf:
> > + - contains:
> > + enum:
> > + - starfive,jh8100-dwmac
> > + - contains:
> > + enum:
> > + - starfive,jh7110-dwmac
>
> There's no need for the 2nd entry. You just need to check
>
> I would something like this structure:
>
> - if:
> properties:
> compatible:
> contains:
> const: starfive,jh7100-dwmac
>
> then:
>
> if:
> properties:
> compatible:
> contains:
> const: starfive,jh8100-dwmac
> then:
> ...
> else:
> ...
>
Okay, thank you for the feedback.
> > then:
> > properties:
> > interrupts:
> > @@ -117,10 +106,53 @@ allOf:
> > maxItems: 3
> >
> > resets:
> > - minItems: 2
> > + maxItems: 1
> >
> > reset-names:
> > - minItems: 2
> > + const: stmmaceth
> > +
> > + else:
>
> I don't think you need the else. Just do another 'if' entry.
>
> > + if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: starfive,jh7100-dwmac
> > + then:
> > + properties:
> > + interrupts:
> > + minItems: 2
> > + maxItems: 2
> > +
> > + interrupt-names:
> > + minItems: 2
> > + maxItems: 2
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + reset-names:
> > + const: ahb
> > +
> > + if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: starfive,jh7110-dwmac
> > + then:
> > + properties:
> > + interrupts:
> > + minItems: 3
> > + maxItems: 3
> > +
> > + interrupt-names:
> > + minItems: 3
> > + maxItems: 3
> > +
> > + resets:
> > + minItems: 2
> > +
> > + reset-names:
> > + minItems: 2
> >
> > unevaluatedProperties: false
> >
> > --
> > 2.25.1
> >
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^ permalink raw reply
* Re: [PATCH v2 05/14] drm: Suppress intentional warning backtraces in scaling unit tests
From: Guenter Roeck @ 2024-03-26 5:02 UTC (permalink / raw)
To: Maíra Canal
Cc: linux-kselftest, David Airlie, Arnd Bergmann, Dan Carpenter,
Kees Cook, Daniel Diaz, David Gow, Arthur Grillo, Brendan Higgins,
Naresh Kamboju, Maarten Lankhorst, Andrew Morton, Maxime Ripard,
Ville Syrjälä, Daniel Vetter, Thomas Zimmermann,
dri-devel, kunit-dev, linux-arch, linux-arm-kernel, linux-doc,
linux-kernel, linux-parisc, linuxppc-dev, linux-riscv, linux-s390,
linux-sh, loongarch, netdev, Linux Kernel Functional Testing
In-Reply-To: <7f6a223f-f432-4e1b-a67e-3816448224a1@igalia.com>
On 3/25/24 18:09, Maíra Canal wrote:
> On 3/25/24 16:24, Guenter Roeck wrote:
>> Hi,
>>
>> On Mon, Mar 25, 2024 at 04:05:06PM -0300, Maíra Canal wrote:
>>> Hi Guenter,
>>>
>>> On 3/25/24 14:52, Guenter Roeck wrote:
>>>> The drm_test_rect_calc_hscale and drm_test_rect_calc_vscale unit tests
>>>> intentionally trigger warning backtraces by providing bad parameters to
>>>> the tested functions. What is tested is the return value, not the existence
>>>> of a warning backtrace. Suppress the backtraces to avoid clogging the
>>>> kernel log.
>>>>
>>>> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
>>>> Acked-by: Dan Carpenter <dan.carpenter@linaro.org>
>>>> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
>>>> ---
>>>> - Rebased to v6.9-rc1
>>>> - Added Tested-by:, Acked-by:, and Reviewed-by: tags
>>>>
>>>> drivers/gpu/drm/tests/drm_rect_test.c | 6 ++++++
>>>> 1 file changed, 6 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/tests/drm_rect_test.c b/drivers/gpu/drm/tests/drm_rect_test.c
>>>> index 76332cd2ead8..75614cb4deb5 100644
>>>> --- a/drivers/gpu/drm/tests/drm_rect_test.c
>>>> +++ b/drivers/gpu/drm/tests/drm_rect_test.c
>>>> @@ -406,22 +406,28 @@ KUNIT_ARRAY_PARAM(drm_rect_scale, drm_rect_scale_cases, drm_rect_scale_case_desc
>>>> static void drm_test_rect_calc_hscale(struct kunit *test)
>>>> {
>>>> + DEFINE_SUPPRESSED_WARNING(drm_calc_scale);
>>>> const struct drm_rect_scale_case *params = test->param_value;
>>>> int scaling_factor;
>>>> + START_SUPPRESSED_WARNING(drm_calc_scale);
>>>
>>> I'm not sure if it is not that obvious only to me, but it would be nice
>>> to have a comment here, remembering that we provide bad parameters in
>>> some test cases.
>>
>> Sure. Something like this ?
>>
>> /*
>> * drm_rect_calc_hscale() generates a warning backtrace whenever bad
>> * parameters are passed to it. This affects all unit tests with an
>> * error code in expected_scaling_factor.
>> */
>>
>
> Yeah, perfect. With that, feel free to add my
>
> Acked-by: Maíra Canal <mcanal@igalia.com>
>
Thanks!
Guenter
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^ permalink raw reply
* Re: [PATCH v4] PCI: keystone: Fix pci_ops for AM654x SoC
From: Siddharth Vadapalli @ 2024-03-26 4:59 UTC (permalink / raw)
To: Niklas Cassel
Cc: Siddharth Vadapalli, lpieralisi, kw, robh, bhelgaas,
manivannan.sadhasivam, fancer.lancer, u.kleine-koenig, dlemoal,
yoshihiro.shimoda.uh, linux-pci, linux-kernel, linux-arm-kernel,
srk
In-Reply-To: <ZgF_5fYsI5lOFjOv@ryzen>
On Mon, Mar 25, 2024 at 02:45:09PM +0100, Niklas Cassel wrote:
> Hello Siddharth,
>
> On Mon, Mar 25, 2024 at 05:52:28PM +0530, Siddharth Vadapalli wrote:
> > On Mon, Mar 25, 2024 at 12:23:05PM +0100, Niklas Cassel wrote:
> > > On Mon, Mar 25, 2024 at 11:07:22AM +0530, Siddharth Vadapalli wrote:
> > > > @@ -822,6 +788,23 @@ static int __init ks_pcie_host_init(struct dw_pcie_rp *pp)
> > > > if (ret < 0)
> > > > return ret;
> > > >
> > >
> > > > + if (!ks_pcie->is_am6) {
> > >
> > > Perhaps add a comment here stating WHY this is needed for v3.65a (!is_am6).
> > >
> > > From reading the old threads, it appears that v3.65a:
> > > -Has no support for iATUs. iATU-specific resource handling code is to be
> > > bypassed for v3.65 h/w. Thus v3.65a has it's own .child_ops implementation,
> > > so that pcie-designware-host.c does not configure the iATUs.
> > > -v3.65a has it's own .msi_init implementation, so that pcie-designware-host.c
> > > does not call dw_pcie_msi_host_init() to configure the MSI controller.
> > >
> > > While 4.90a:
> > > -Does have iATU support.
> > > -Does use the generic dw_pcie_msi_host_init().
> > >
> > > Considering the major differences (with v3.65a being the outlier) here,
> > > I think it would have been a much wiser idea to have two different glue
> > > drivers for these two compatibles (ti,keystone-pcie and ti,am654-pcie-rc).
> > >
> > > Right now the driver is quite hard to read, most of the functions in this
> > > driver exist because v3.65a does not have an iATU and does not use the
> > > generic DWC way to handle MSIs. Additionally, you have "if (!ks_pcie->is_am6)"
> > > spread out all over the driver, to control quite major things, like if you
> > > should overload .child_ops, or if you should set up inbound translation without
> > > an iATU. This makes is even harder to see which code is actually used for
> > > am654... like the fact that it actually uses the generic way to handle MSIs...
> > >
> > > The driver for am654 would be much nicer since many of the functions in
> > > this driver would not be needed (and the fact that you have only implemented
> > > EP support for am654 and not for v3.65a). All EP related stuff would be in
> > > the am654 file/driver.
> > > You could keep the quirky stuff for v3.65a in the existing pci-keystone.c
> > > driver.
> > >
> > > (I guess if there is a function that is identical between the twos, you could
> > > have a pci-keystone-common.{c,h} that can be used by both drivers, but from
> > > the looks of it, they seem to share very little code.
> >
> > Thank you for reviewing the patch. I agree that two drivers will be
> > better considering the !ks_pcie->is_am6 present throughout the driver.
> > However, I hope you notice the fact that commit:
> > 6ab15b5e7057 PCI: dwc: keystone: Convert .scan_bus() callback to use add_bus
> > introduced a regression in a driver which was working prior to that
> > commit for AM654. While there are flaws in the driver and it needs to be
> > split to handle v3.65a and other versions in a cleaner manner, I am
> > unable to understand why that is a precursor to fixing the regression.
> >
> > If splitting the driver is the only way to fix this regression, please
> > let me know and I will work on that instead, though it will take up more
> > time.
>
> I think you are misunderstanding me.
>
> I think this patch is fine, except for the comment that I gave:
> "Perhaps add a comment here stating WHY this is needed for v3.65a (!is_am6)."
>
> Like:
>
> /*
> * This is only needed for !am654 since it has its own msi_irq_chip
> * implementation. (am654 uses the generic msi_irq_chip implementation.)
> */
> if (!ks_pcie->is_am6) {
> ...
> }
>
>
> In fact, if you move this code to ks_pcie_msi_host_init(), instead of
> ks_pcie_host_init(), you would not need a comment (or a if (!ks_pcie->is_am6)),
> since ks_pcie_msi_host_init() is only executed by !am654.
This seems much better :)
In the current code, the execution is as follows:
ks_pcie_probe()
dw_pcie_host_init()
pci_host_probe()
ks_pcie_v3_65_add_bus()
Moving the contents of ks_pcie_v3_65_add_bus() to ks_pcie_msi_host_init()
will result in:
ks_pcie_probe()
dw_pcie_host_init()
if (pci_msi_enabled())
if (pp->ops->msi_init) {
ret = pp->ops->msi_init(pp);
ks_pcie_msi_host_init()
pci_host_probe()
I will update this patch based on your suggestion. If it's alright, may I
also add your "Suggested-by" tag for the v5 patch? Please let me know.
>
>
>
>
> My suggestion to split this driver to two different drivers is just because
> I noticed how different they are (am654 has iATUs, uses generic msi_irq_chip
> implementation and has EP-mode support. !am654 has no iATUs, its own MSI
> implementation and no EP-mode support.)
>
> So the am654 driver would look like most other DWC glue drivers.
> The non-am654 driver would look mostly like it looks today, except you would
> remove the EP-mode support.
>
> However, this suggestion can of course be implemented sometime in the future
> and should not be a blocker for the patch in $subject.
Thank you for clarifying.
Regards,
Siddharth.
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^ permalink raw reply
* [PATCH] ASoC: sunxi: sun4i-i2s: Enable 32-bit audio formats
From: John Watts @ 2024-03-26 3:50 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Jaroslav Kysela, Takashi Iwai,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland
Cc: linux-sound, linux-arm-kernel, linux-sunxi, linux-kernel,
John Watts
The I2S driver already supports and checks for 32-bit sample sizes,
so indicate this size is available for use in the DAI driver.
This change has been tested on the T113-S3, but it should work just
fine on older hardware as get_sr checks for sample size support
correctly according to each core's datasheet.
Signed-off-by: John Watts <contact@jookia.org>
---
This patch enables support for 32-bit audio in the sunxi I2S driver.
I have only tested this on the Allwinner T113 but I'm fairly
certain it will work on older boards.
---
sound/soc/sunxi/sun4i-i2s.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index a736f632bf0b..aeea852141c1 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -1103,7 +1103,8 @@ static const struct snd_soc_dai_ops sun4i_i2s_dai_ops = {
#define SUN4I_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S20_LE | \
- SNDRV_PCM_FMTBIT_S24_LE)
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
static struct snd_soc_dai_driver sun4i_i2s_dai = {
.capture = {
---
base-commit: 72fb52fb0ac44b6a1edd9bc390e44bce3acccd26
change-id: 20240326-sunxi_s32-f2ab25b8e688
Best regards,
--
John Watts <contact@jookia.org>
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^ permalink raw reply related
* Re: [WIP 0/3] Memory model and atomic API in Rust
From: Linus Torvalds @ 2024-03-26 3:49 UTC (permalink / raw)
To: Dr. David Alan Gilbert
Cc: Kent Overstreet, Philipp Stanner, Boqun Feng, rust-for-linux,
linux-kernel, linux-arch, llvm, Miguel Ojeda, Alex Gaynor,
Wedson Almeida Filho, Gary Guo, Björn Roy Baron,
Benno Lossin, Andreas Hindborg, Alice Ryhl, Alan Stern,
Andrea Parri, Will Deacon, Peter Zijlstra, Nicholas Piggin,
David Howells, Jade Alglave, Luc Maranget, Paul E. McKenney,
Akira Yokosawa, Daniel Lustig, Joel Fernandes, Nathan Chancellor,
Nick Desaulniers, kent.overstreet, Greg Kroah-Hartman, elver,
Mark Rutland, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, x86, H. Peter Anvin, Catalin Marinas,
linux-arm-kernel, linux-fsdevel
In-Reply-To: <ZgIRXL5YM2AwBD0Y@gallifrey>
On Mon, 25 Mar 2024 at 17:05, Dr. David Alan Gilbert <dave@treblig.org> wrote:
>
> Isn't one of the aims of the Rust/C++ idea that you can't forget to access
> a shared piece of data atomically?
If that is an aim, it's a really *bad* one.
Really.
It very much should never have been an aim, and I hope it wasn't. I
think, and hope, that the source of the C++ and Rust bad decisions is
cluelessness, not active malice.
Take Rust - one big point of Rust is the whole "safe" thing, but it's
very much not a straightjacket like Pascal was. There's a "safe" part
to Rust, but equally importantly, there's also the "unsafe" part to
Rust.
The safe part is the one that most programmers are supposed to use.
It's the one that allows you to not have to worry too much about
things. It's the part that makes it much harder to screw up.
But the *unsafe* part is what makes Rust powerful. It's the part that
works behind the curtain. It's the part that may be needed to make the
safe parts *work*.
And yes, an application programmer might never actually need to use
it, and in fact in many projects the rule might be that unsafe Rust is
simply never even an option - but that doesn't mean that the unsafe
parts don't exist.
Because those unsafe parts are needed to make it all work in reality.
And you should never EVER base your whole design around the "safe"
part. Then you get a language that is a straight-jacket.
So I'd very strongly argue that the core atomics should be done the
"unsafe" way - allow people to specify exactly when they want exactly
what access. Allow people to mix and match and have overlapping
partial aliases, because if you implement things like locking, you
*need* those partially aliasing accesses, and you need to make
overlapping atomics where sometimes you access only one part of the
field.
And yes, that will be unsafe, and it might even be unportable, but
it's exactly the kind of thing you need in order to avoid having to
use assembly language to do your locking.
And by all means, you should relegate that to the "unsafe corner" of
the language. And maybe don't talk about the unsafe sharp edges in the
first chapter of the book about the language.
But you should _start_ the design of your language memory model around
the unsafe "raw atomic access operations" model.
Then you can use those strictly more powerful operations, and you
create an object model *around* it.
So you create safe objects like just an atomic counter. In *that*
corner of the language, you have the "safe atomics" - they aren't the
fundamental implementation, but they are the safe wrappers *around*
the more powerful (but unsafe) core.
With that "atomic counter" you cannot forget to do atomic accesses,
because that safe corner of the world doesn't _have_ anything but the
safe atomic accesses for every time you use the object.
See? Having the capability to do powerful and maybe unsafe things does
not force people to expose and use all that power. You can - and
should - wrap the powerful model with safer and simpler interfaces.
This isn't something specific to atomics. Not even remotely. This is
quite fundamental. You often literally _cannot_ do interesting things
using only safe interfaces. You want safe memory allocations - but to
actually write the allocator itself, you want to have all those unsafe
escape methods - all those raw pointers with arbitrary arithmetic etc.
And if you don't have unsafe escapes, you end up doing what so many
languages did: the libraries are written in something more powerful
like C, because C literally can do things that other languages
*cannot* do.
Don't let people fool you with talk about Turing machines and similar
smoke-and-mirror garbage. It's a bedtime story for first-year CS
students. It's not true.
Not all languages are created equal. Not all languages can do the same
things. If your language doesn't have those unsafe escapes, your
language is inherently weaker, and inherently worse for it.
Linus
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^ permalink raw reply
* [PATCH v6 1/3] KVM: selftests: aarch64: Add helper function for the vpmu vcpu creation
From: Shaoqin Huang @ 2024-03-26 3:37 UTC (permalink / raw)
To: Oliver Upton, Marc Zyngier, kvmarm
Cc: Shaoqin Huang, Eric Auger, James Morse, Suzuki K Poulose,
Zenghui Yu, Paolo Bonzini, Shuah Khan, linux-kernel,
linux-arm-kernel, kvm, linux-kselftest
In-Reply-To: <20240326033706.117189-1-shahuang@redhat.com>
Create a vcpu with vpmu would be a common requirement for the vpmu test,
so add the helper function for the vpmu vcpu creation. And use those
helper function in the vpmu_counter_access.c test.
Use this chance to delete the meaningless ASSERT about the pmuver,
because KVM does not advertise an IMP_DEF PMU to guests.
No functional changes intended.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
.../kvm/aarch64/vpmu_counter_access.c | 33 ++++---------------
.../selftests/kvm/include/aarch64/vpmu.h | 28 ++++++++++++++++
2 files changed, 35 insertions(+), 26 deletions(-)
create mode 100644 tools/testing/selftests/kvm/include/aarch64/vpmu.h
diff --git a/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
index f2fb0e3f14bc..33358797e7ec 100644
--- a/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
+++ b/tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c
@@ -16,6 +16,7 @@
#include <processor.h>
#include <test_util.h>
#include <vgic.h>
+#include <vpmu.h>
#include <perf/arm_pmuv3.h>
#include <linux/bitfield.h>
@@ -410,18 +411,8 @@ static void guest_code(uint64_t expected_pmcr_n)
/* Create a VM that has one vCPU with PMUv3 configured. */
static void create_vpmu_vm(void *guest_code)
{
- struct kvm_vcpu_init init;
- uint8_t pmuver, ec;
- uint64_t dfr0, irq = 23;
- struct kvm_device_attr irq_attr = {
- .group = KVM_ARM_VCPU_PMU_V3_CTRL,
- .attr = KVM_ARM_VCPU_PMU_V3_IRQ,
- .addr = (uint64_t)&irq,
- };
- struct kvm_device_attr init_attr = {
- .group = KVM_ARM_VCPU_PMU_V3_CTRL,
- .attr = KVM_ARM_VCPU_PMU_V3_INIT,
- };
+ uint8_t ec;
+ uint64_t irq = 23;
/* The test creates the vpmu_vm multiple times. Ensure a clean state */
memset(&vpmu_vm, 0, sizeof(vpmu_vm));
@@ -433,27 +424,17 @@ static void create_vpmu_vm(void *guest_code)
guest_sync_handler);
}
- /* Create vCPU with PMUv3 */
- vm_ioctl(vpmu_vm.vm, KVM_ARM_PREFERRED_TARGET, &init);
- init.features[0] |= (1 << KVM_ARM_VCPU_PMU_V3);
- vpmu_vm.vcpu = aarch64_vcpu_add(vpmu_vm.vm, 0, &init, guest_code);
+ vpmu_vm.vcpu = vm_vcpu_add_with_vpmu(vpmu_vm.vm, 0, guest_code);
vcpu_init_descriptor_tables(vpmu_vm.vcpu);
+
vpmu_vm.gic_fd = vgic_v3_setup(vpmu_vm.vm, 1, 64,
GICD_BASE_GPA, GICR_BASE_GPA);
__TEST_REQUIRE(vpmu_vm.gic_fd >= 0,
"Failed to create vgic-v3, skipping");
- /* Make sure that PMUv3 support is indicated in the ID register */
- vcpu_get_reg(vpmu_vm.vcpu,
- KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &dfr0);
- pmuver = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), dfr0);
- TEST_ASSERT(pmuver != ID_AA64DFR0_EL1_PMUVer_IMP_DEF &&
- pmuver >= ID_AA64DFR0_EL1_PMUVer_IMP,
- "Unexpected PMUVER (0x%x) on the vCPU with PMUv3", pmuver);
-
/* Initialize vPMU */
- vcpu_ioctl(vpmu_vm.vcpu, KVM_SET_DEVICE_ATTR, &irq_attr);
- vcpu_ioctl(vpmu_vm.vcpu, KVM_SET_DEVICE_ATTR, &init_attr);
+ vpmu_set_irq(vpmu_vm.vcpu, irq);
+ vpmu_init(vpmu_vm.vcpu);
}
static void destroy_vpmu_vm(void)
diff --git a/tools/testing/selftests/kvm/include/aarch64/vpmu.h b/tools/testing/selftests/kvm/include/aarch64/vpmu.h
new file mode 100644
index 000000000000..5ef6cb011e41
--- /dev/null
+++ b/tools/testing/selftests/kvm/include/aarch64/vpmu.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#include <kvm_util.h>
+
+static inline struct kvm_vcpu *vm_vcpu_add_with_vpmu(struct kvm_vm *vm,
+ uint32_t vcpu_id,
+ void *guest_code)
+{
+ struct kvm_vcpu_init init;
+
+ /* Create vCPU with PMUv3 */
+ vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &init);
+ init.features[0] |= (1 << KVM_ARM_VCPU_PMU_V3);
+
+ return aarch64_vcpu_add(vm, 0, &init, guest_code);
+}
+
+static void vpmu_set_irq(struct kvm_vcpu *vcpu, int irq)
+{
+ kvm_device_attr_set(vcpu->fd, KVM_ARM_VCPU_PMU_V3_CTRL,
+ KVM_ARM_VCPU_PMU_V3_IRQ, &irq);
+}
+
+static void vpmu_init(struct kvm_vcpu *vcpu)
+{
+ kvm_device_attr_set(vcpu->fd, KVM_ARM_VCPU_PMU_V3_CTRL,
+ KVM_ARM_VCPU_PMU_V3_INIT, NULL);
+}
--
2.40.1
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^ permalink raw reply related
* [PATCH v6 3/3] KVM: selftests: aarch64: Add invalid filter test in pmu_event_filter_test
From: Shaoqin Huang @ 2024-03-26 3:37 UTC (permalink / raw)
To: Oliver Upton, Marc Zyngier, kvmarm
Cc: Shaoqin Huang, Eric Auger, James Morse, Suzuki K Poulose,
Zenghui Yu, Paolo Bonzini, Shuah Khan, linux-arm-kernel, kvm,
linux-kselftest, linux-kernel
In-Reply-To: <20240326033706.117189-1-shahuang@redhat.com>
Add the invalid filter test which sets the filter beyond the event
space and sets the invalid action to double check if the
KVM_ARM_VCPU_PMU_V3_FILTER will return the expected error.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
.../kvm/aarch64/pmu_event_filter_test.c | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
index 972384e81067..1abcd9ab325e 100644
--- a/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
+++ b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
@@ -8,6 +8,7 @@
* This test checks if the guest only see the limited pmu event that userspace
* sets, if the guest can use those events which user allow, and if the guest
* can't use those events which user deny.
+ * It also checks that setting invalid filter ranges return the expected error.
* This test runs only when KVM_CAP_ARM_PMU_V3, KVM_ARM_VCPU_PMU_V3_FILTER
* is supported on the host.
*/
@@ -273,6 +274,41 @@ static void run_tests(void)
run_test(t);
}
+static void test_invalid_filter(void)
+{
+ struct kvm_pmu_event_filter invalid;
+ int ret;
+
+ pr_info("Test: test_invalid_filter\n");
+
+ memset(&vpmu_vm, 0, sizeof(vpmu_vm));
+
+ vpmu_vm.vm = vm_create(1);
+ vpmu_vm.vcpu = vm_vcpu_add_with_vpmu(vpmu_vm.vm, 0, guest_code);
+ vpmu_vm.gic_fd = vgic_v3_setup(vpmu_vm.vm, 1, 64,
+ GICD_BASE_GPA, GICR_BASE_GPA);
+ __TEST_REQUIRE(vpmu_vm.gic_fd >= 0,
+ "Failed to create vgic-v3, skipping");
+
+ /* The max event number is (1 << 16), set a range largeer than it. */
+ invalid = __DEFINE_FILTER(BIT(15), BIT(15) + 1, 0);
+ ret = __kvm_device_attr_set(vpmu_vm.vcpu->fd, KVM_ARM_VCPU_PMU_V3_CTRL,
+ KVM_ARM_VCPU_PMU_V3_FILTER, &invalid);
+ TEST_ASSERT(ret && errno == EINVAL, "Set Invalid filter range "
+ "ret = %d, errno = %d (expected ret = -1, errno = EINVAL)",
+ ret, errno);
+
+ /* Set the Invalid action. */
+ invalid = __DEFINE_FILTER(0, 1, 3);
+ ret = __kvm_device_attr_set(vpmu_vm.vcpu->fd, KVM_ARM_VCPU_PMU_V3_CTRL,
+ KVM_ARM_VCPU_PMU_V3_FILTER, &invalid);
+ TEST_ASSERT(ret && errno == EINVAL, "Set Invalid filter action "
+ "ret = %d, errno = %d (expected ret = -1, errno = EINVAL)",
+ ret, errno);
+
+ destroy_vpmu_vm();
+}
+
static bool kvm_pmu_support_events(void)
{
create_vpmu_vm(guest_get_pmceid);
@@ -295,4 +331,6 @@ int main(void)
TEST_REQUIRE(kvm_pmu_support_events());
run_tests();
+
+ test_invalid_filter();
}
--
2.40.1
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^ permalink raw reply related
* [PATCH v6 2/3] KVM: selftests: aarch64: Introduce pmu_event_filter_test
From: Shaoqin Huang @ 2024-03-26 3:37 UTC (permalink / raw)
To: Oliver Upton, Marc Zyngier, kvmarm
Cc: Shaoqin Huang, Paolo Bonzini, Shuah Khan, James Morse,
Suzuki K Poulose, Zenghui Yu, linux-kernel, kvm, linux-kselftest,
linux-arm-kernel
In-Reply-To: <20240326033706.117189-1-shahuang@redhat.com>
Introduce pmu_event_filter_test for arm64 platforms. The test configures
PMUv3 for a vCPU, and sets different pmu event filters for the vCPU, and
check if the guest can see those events which user allow and can't use
those events which use deny.
This test refactor the create_vpmu_vm() and make it a wrapper for
__create_vpmu_vm(), which allows some extra init code before
KVM_ARM_VCPU_PMU_V3_INIT.
And this test use the KVM_ARM_VCPU_PMU_V3_FILTER attribute to set the
pmu event filter in KVM. And choose to filter two common event
branches_retired and instructions_retired, and let the guest to check if
it see the right pmceid register.
Signed-off-by: Shaoqin Huang <shahuang@redhat.com>
---
tools/testing/selftests/kvm/Makefile | 1 +
.../kvm/aarch64/pmu_event_filter_test.c | 298 ++++++++++++++++++
2 files changed, 299 insertions(+)
create mode 100644 tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile
index 741c7dc16afc..9745be534df3 100644
--- a/tools/testing/selftests/kvm/Makefile
+++ b/tools/testing/selftests/kvm/Makefile
@@ -151,6 +151,7 @@ TEST_GEN_PROGS_aarch64 += aarch64/aarch32_id_regs
TEST_GEN_PROGS_aarch64 += aarch64/debug-exceptions
TEST_GEN_PROGS_aarch64 += aarch64/hypercalls
TEST_GEN_PROGS_aarch64 += aarch64/page_fault_test
+TEST_GEN_PROGS_aarch64 += aarch64/pmu_event_filter_test
TEST_GEN_PROGS_aarch64 += aarch64/psci_test
TEST_GEN_PROGS_aarch64 += aarch64/set_id_regs
TEST_GEN_PROGS_aarch64 += aarch64/smccc_filter
diff --git a/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
new file mode 100644
index 000000000000..972384e81067
--- /dev/null
+++ b/tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
@@ -0,0 +1,298 @@
+
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * pmu_event_filter_test - Test user limit pmu event for guest.
+ *
+ * Copyright (c) 2023 Red Hat, Inc.
+ *
+ * This test checks if the guest only see the limited pmu event that userspace
+ * sets, if the guest can use those events which user allow, and if the guest
+ * can't use those events which user deny.
+ * This test runs only when KVM_CAP_ARM_PMU_V3, KVM_ARM_VCPU_PMU_V3_FILTER
+ * is supported on the host.
+ */
+#include <kvm_util.h>
+#include <processor.h>
+#include <vgic.h>
+#include <vpmu.h>
+#include <test_util.h>
+#include <perf/arm_pmuv3.h>
+
+struct pmu_common_event_ids {
+ uint64_t pmceid0;
+ uint64_t pmceid1;
+} max_pmce, expected_pmce;
+
+struct vpmu_vm {
+ struct kvm_vm *vm;
+ struct kvm_vcpu *vcpu;
+ int gic_fd;
+};
+
+static struct vpmu_vm vpmu_vm;
+
+#define FILTER_NR 10
+
+struct test_desc {
+ const char *name;
+ struct kvm_pmu_event_filter filter[FILTER_NR];
+};
+
+#define __DEFINE_FILTER(base, num, act) \
+ ((struct kvm_pmu_event_filter) { \
+ .base_event = base, \
+ .nevents = num, \
+ .action = act, \
+ })
+
+#define DEFINE_FILTER(base, act) __DEFINE_FILTER(base, 1, act)
+
+static void guest_code(void)
+{
+ uint64_t pmceid0 = read_sysreg(pmceid0_el0);
+ uint64_t pmceid1 = read_sysreg(pmceid1_el0);
+
+ GUEST_ASSERT_EQ(expected_pmce.pmceid0, pmceid0);
+ GUEST_ASSERT_EQ(expected_pmce.pmceid1, pmceid1);
+
+ GUEST_DONE();
+}
+
+static void guest_get_pmceid(void)
+{
+ max_pmce.pmceid0 = read_sysreg(pmceid0_el0);
+ max_pmce.pmceid1 = read_sysreg(pmceid1_el0);
+
+ GUEST_DONE();
+}
+
+static void run_vcpu(struct kvm_vcpu *vcpu)
+{
+ struct ucall uc;
+
+ while (1) {
+ vcpu_run(vcpu);
+ switch (get_ucall(vcpu, &uc)) {
+ case UCALL_DONE:
+ return;
+ case UCALL_ABORT:
+ REPORT_GUEST_ASSERT(uc);
+ break;
+ default:
+ TEST_FAIL("Unknown ucall %lu", uc.cmd);
+ }
+ }
+}
+
+static void set_pmce(struct pmu_common_event_ids *pmce, int action, int event)
+{
+ int base = 0;
+ uint64_t *pmceid = NULL;
+
+ if (event >= 0x4000) {
+ event -= 0x4000;
+ base = 32;
+ }
+
+ if (event >= 0 && event <= 0x1F) {
+ pmceid = &pmce->pmceid0;
+ } else if (event >= 0x20 && event <= 0x3F) {
+ event -= 0x20;
+ pmceid = &pmce->pmceid1;
+ } else {
+ return;
+ }
+
+ event += base;
+ if (action == KVM_PMU_EVENT_ALLOW)
+ *pmceid |= BIT(event);
+ else
+ *pmceid &= ~BIT(event);
+}
+
+static void prepare_expected_pmce(struct kvm_pmu_event_filter *filter)
+{
+ struct pmu_common_event_ids pmce_mask = { ~0, ~0 };
+ bool first_filter = true;
+ int i;
+
+ while (filter && filter->nevents != 0) {
+ if (first_filter) {
+ if (filter->action == KVM_PMU_EVENT_ALLOW)
+ memset(&pmce_mask, 0, sizeof(pmce_mask));
+ first_filter = false;
+ }
+
+ for (i = 0; i < filter->nevents; i++)
+ set_pmce(&pmce_mask, filter->action,
+ filter->base_event + i);
+
+ filter++;
+ }
+
+ expected_pmce.pmceid0 = max_pmce.pmceid0 & pmce_mask.pmceid0;
+ expected_pmce.pmceid1 = max_pmce.pmceid1 & pmce_mask.pmceid1;
+}
+
+static void pmu_event_filter_init(struct kvm_pmu_event_filter *filter)
+{
+ while (filter && filter->nevents != 0) {
+ kvm_device_attr_set(vpmu_vm.vcpu->fd,
+ KVM_ARM_VCPU_PMU_V3_CTRL,
+ KVM_ARM_VCPU_PMU_V3_FILTER,
+ filter);
+ filter++;
+ }
+}
+
+#define GICD_BASE_GPA 0x8000000ULL
+#define GICR_BASE_GPA 0x80A0000ULL
+
+/* Create a VM that has one vCPU with PMUv3 configured. */
+static void create_vpmu_vm_with_filter(void *guest_code,
+ struct kvm_pmu_event_filter *filter)
+{
+ uint64_t irq = 23;
+
+ /* The test creates the vpmu_vm multiple times. Ensure a clean state */
+ memset(&vpmu_vm, 0, sizeof(vpmu_vm));
+
+ vpmu_vm.vm = vm_create(1);
+ vpmu_vm.vcpu = vm_vcpu_add_with_vpmu(vpmu_vm.vm, 0, guest_code);
+ vpmu_vm.gic_fd = vgic_v3_setup(vpmu_vm.vm, 1, 64,
+ GICD_BASE_GPA, GICR_BASE_GPA);
+ __TEST_REQUIRE(vpmu_vm.gic_fd >= 0,
+ "Failed to create vgic-v3, skipping");
+
+ pmu_event_filter_init(filter);
+
+ /* Initialize vPMU */
+ vpmu_set_irq(vpmu_vm.vcpu, irq);
+ vpmu_init(vpmu_vm.vcpu);
+}
+
+static void create_vpmu_vm(void *guest_code)
+{
+ create_vpmu_vm_with_filter(guest_code, NULL);
+}
+
+static void destroy_vpmu_vm(void)
+{
+ close(vpmu_vm.gic_fd);
+ kvm_vm_free(vpmu_vm.vm);
+}
+
+static void run_test(struct test_desc *t)
+{
+ pr_info("Test: %s\n", t->name);
+
+ create_vpmu_vm_with_filter(guest_code, t->filter);
+ prepare_expected_pmce(t->filter);
+ sync_global_to_guest(vpmu_vm.vm, expected_pmce);
+
+ run_vcpu(vpmu_vm.vcpu);
+
+ destroy_vpmu_vm();
+}
+
+static struct test_desc tests[] = {
+ {
+ .name = "without_filter",
+ .filter = {
+ { 0 }
+ },
+ },
+ {
+ .name = "member_allow_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 0),
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_INST_RETIRED, 0),
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_BR_RETIRED, 0),
+ { 0 },
+ },
+ },
+ {
+ .name = "member_deny_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 1),
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_INST_RETIRED, 1),
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_BR_RETIRED, 1),
+ { 0 },
+ },
+ },
+ {
+ .name = "not_member_deny_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 1),
+ { 0 },
+ },
+ },
+ {
+ .name = "not_member_allow_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_SW_INCR, 0),
+ { 0 },
+ },
+ },
+ {
+ .name = "deny_chain_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CHAIN, 1),
+ { 0 },
+ },
+ },
+ {
+ .name = "deny_cpu_cycles_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 1),
+ { 0 },
+ },
+ },
+ {
+ .name = "cancel_filter",
+ .filter = {
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 0),
+ DEFINE_FILTER(ARMV8_PMUV3_PERFCTR_CPU_CYCLES, 1),
+ },
+ },
+ {
+ .name = "multiple_filter",
+ .filter = {
+ __DEFINE_FILTER(0x0, 0x10, 0),
+ __DEFINE_FILTER(0x6, 0x3, 1),
+ },
+ },
+ { 0 }
+};
+
+static void run_tests(void)
+{
+ struct test_desc *t;
+
+ for (t = &tests[0]; t->name; t++)
+ run_test(t);
+}
+
+static bool kvm_pmu_support_events(void)
+{
+ create_vpmu_vm(guest_get_pmceid);
+
+ memset(&max_pmce, 0, sizeof(max_pmce));
+ sync_global_to_guest(vpmu_vm.vm, max_pmce);
+ run_vcpu(vpmu_vm.vcpu);
+ sync_global_from_guest(vpmu_vm.vm, max_pmce);
+ destroy_vpmu_vm();
+
+ return max_pmce.pmceid0 &
+ (ARMV8_PMUV3_PERFCTR_BR_RETIRED |
+ ARMV8_PMUV3_PERFCTR_INST_RETIRED |
+ ARMV8_PMUV3_PERFCTR_CHAIN);
+}
+
+int main(void)
+{
+ TEST_REQUIRE(kvm_has_cap(KVM_CAP_ARM_PMU_V3));
+ TEST_REQUIRE(kvm_pmu_support_events());
+
+ run_tests();
+}
--
2.40.1
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v6 0/3] KVM: selftests: aarch64: Introduce pmu_event_filter_test
From: Shaoqin Huang @ 2024-03-26 3:36 UTC (permalink / raw)
To: Oliver Upton, Marc Zyngier, kvmarm
Cc: Shaoqin Huang, James Morse, kvm, linux-arm-kernel, linux-kernel,
linux-kselftest, Paolo Bonzini, Shuah Khan, Suzuki K Poulose,
Zenghui Yu
The test is inspired by the pmu_event_filter_test which implemented by x86. On
the arm64 platform, there is the same ability to set the pmu_event_filter
through the KVM_ARM_VCPU_PMU_V3_FILTER attribute. So add the test for arm64.
The series first create the helper function which can be used
for the vpmu related tests. Then, it implement the test.
Changelog:
----------
v5->v6:
- Rebased to v6.9-rc1.
- Collect RB.
- Add multiple filter test.
v4->v5:
- Rebased to v6.8-rc6.
- Refactor the helper function, make it fine-grained and easy to be used.
- Namimg improvements.
- Use the kvm_device_attr_set() helper.
- Make the test descriptor array readable and clean.
- Delete the patch which moves the pmu related helper to vpmu.h.
- Remove the kvm_supports_pmu_event_filter() function since nobody will run
this on a old kernel.
v3->v4:
- Rebased to the v6.8-rc2.
v2->v3:
- Check the pmceid in guest code instead of pmu event count since different
hardware may have different event count result, check pmceid makes it stable
on different platform. [Eric]
- Some typo fixed and commit message improved.
v1->v2:
- Improve the commit message. [Eric]
- Fix the bug in [enable|disable]_counter. [Raghavendra & Marc]
- Add the check if kvm has attr KVM_ARM_VCPU_PMU_V3_FILTER.
- Add if host pmu support the test event throught pmceid0.
- Split the test_invalid_filter() to another patch. [Eric]
v1: https://lore.kernel.org/all/20231123063750.2176250-1-shahuang@redhat.com/
v2: https://lore.kernel.org/all/20231129072712.2667337-1-shahuang@redhat.com/
v3: https://lore.kernel.org/all/20240116060129.55473-1-shahuang@redhat.com/
v4: https://lore.kernel.org/all/20240202025659.5065-1-shahuang@redhat.com/
v5: https://lore.kernel.org/all/20240229065625.114207-1-shahuang@redhat.com/
Shaoqin Huang (3):
KVM: selftests: aarch64: Add helper function for the vpmu vcpu
creation
KVM: selftests: aarch64: Introduce pmu_event_filter_test
KVM: selftests: aarch64: Add invalid filter test in
pmu_event_filter_test
tools/testing/selftests/kvm/Makefile | 1 +
.../kvm/aarch64/pmu_event_filter_test.c | 336 ++++++++++++++++++
.../kvm/aarch64/vpmu_counter_access.c | 33 +-
.../selftests/kvm/include/aarch64/vpmu.h | 28 ++
4 files changed, 372 insertions(+), 26 deletions(-)
create mode 100644 tools/testing/selftests/kvm/aarch64/pmu_event_filter_test.c
create mode 100644 tools/testing/selftests/kvm/include/aarch64/vpmu.h
--
2.40.1
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^ permalink raw reply
* Re: [WIP 0/3] Memory model and atomic API in Rust
From: Kent Overstreet @ 2024-03-26 3:28 UTC (permalink / raw)
To: Dr. David Alan Gilbert
Cc: Linus Torvalds, Philipp Stanner, Boqun Feng, rust-for-linux,
linux-kernel, linux-arch, llvm, Miguel Ojeda, Alex Gaynor,
Wedson Almeida Filho, Gary Guo, Björn Roy Baron,
Benno Lossin, Andreas Hindborg, Alice Ryhl, Alan Stern,
Andrea Parri, Will Deacon, Peter Zijlstra, Nicholas Piggin,
David Howells, Jade Alglave, Luc Maranget, Paul E. McKenney,
Akira Yokosawa, Daniel Lustig, Joel Fernandes, Nathan Chancellor,
Nick Desaulniers, kent.overstreet, Greg Kroah-Hartman, elver,
Mark Rutland, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, x86, H. Peter Anvin, Catalin Marinas,
linux-arm-kernel, linux-fsdevel
In-Reply-To: <ZgImcq2vRcDZtF6z@gallifrey>
On Tue, Mar 26, 2024 at 01:35:46AM +0000, Dr. David Alan Gilbert wrote:
> OK, so that's essentially the opposite worry of what I was saying; I was
> worrying about people forgetting to use an atomic access to a shared
> variable; I think you're worrying about people forgetting to mark
> a variable shared and since the accesses are the same nothing shouts?
In biological evolution, novel useful traits are generally not
accessible via a single mutation; many neutral mutations are required
first.
Evolution is able to proceed quickly because there are a great many
neutral mutations (that is, evolution quickly searches all possible
paths to find accessible positive mutations), and because negative
mutations are culled quickly - often before the first cell division.
(The most common mutation being the addition or deletion of a base pair;
but amino acids are coded for by groups of three base pairs, so that
shifts everything on the chromosone after the mutation so that it codes
for completely different amino acids. That cell won't live to divide
again).
Actual genetic diseases that significantly impair fitness are quite
rare, and if they weren't we'd have a major problem.
Programming at scale is million monkeys stuff - we're all hammering on
our keyboards at random, the good programs survive and the bad programs
are forgotten.
Similarly to biological evolution, we want most edits to a program to
result in a program that either still works, or fails immediately -
fails to compile, or is caught immediately by basic testing.
If edits can result in latent undefined behaviour or programs that
_mostly_ work, and then explode in unpredictable ways weeks/months/years
later - that's a huge problem. In the worst case, those bugs/negative
mutations accumulate faster than they can be culled.
Thank god we have source control.
Places where we're working with extremely loose synchronization - no
locking, raw memory barriers - are the worst kind of hand grenade, they
result in bugs that are impossible to cull quickly.
In kernel programming, we're always walking around with live hand
grenades.
So what do we do?
We slow down, we take every step slowly and intentionally while telling
everyone not to bump us because we're holding a live hand grenade - raw
atomics, raw unlocked variables, memory barriers, they all get special
care and extra comments.
And we all have fuck-tons of code we need to be able to understand,
review, debug and maintain, so we always try to write our code in a
style where the if it's wrong, we'll see that _locally_, without having
to go through and remember how _everything_ out of the possibly
thousands of relevant lines work.
I'm personally responsible for over 100k LOC of highly intricate code
with high consequences for failure, and regularly have to debug issues
arising somewhere in north of a million LOC - and when something goes
wrong I have to be able to fully debug it _quickly_.
What C++ does is like taking those hand grenades, with the pin already
out - and leaving one under the couch cushions, another in the
silverware drawer, another in the laundry basket - and expecting you to
remember where you put them.
Going back to the C++ example, the really fatal thing with how they do
it is how a change in one line of code can completely change the
semantics of a bunch of different code, and no human reviewer can be
expected to catch bugs that might introduce and the compiler certainly
won't.
Now imagine multiple people working on the same code, at different
times.
Now imagine patches getting mixed up, reordered, one of them getting
lost, merge conflicts - i.e. shit that happens all the time, and what
happens if you're using C++ style atomics.
Terrifying stuff.
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