* [PATCH v6 00/23] Support more Amlogic SoC families in crypto driver
From: Alexey Romanov @ 2024-03-26 15:31 UTC (permalink / raw)
To: neil.armstrong, clabbe, herbert, davem, robh+dt,
krzysztof.kozlowski+dt, conor+dt, khilman, jbrunet,
martin.blumenstingl, vadim.fedorenko
Cc: linux-crypto, linux-amlogic, linux-kernel, devicetree,
linux-arm-kernel, kernel, Alexey Romanov
Hello!
This patchset expand the funcionality of the Amlogic
crypto driver by adding support for more SoC families:
AXG, G12A, G12B, SM1, A1, S4.
Also specify and enable crypto node in device tree
for reference Amlogic devices.
Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
custom tests [1] and tcrypt module.
---
Changes V1 -> V2 [2]:
- Rebased over linux-next.
- Adjusted device tree bindings description.
- A1 and S4 dts use their own compatible, which is a G12 fallback.
Changes V2 -> V3 [3]:
- Fix errors in dt-bindings and device tree.
- Add new field in platform data, which determines
whether clock controller should be used for crypto IP.
- Place back MODULE_DEVICE_TABLE.
- Correct commit messages.
Changes V3 -> V4 [4]:
- Update dt-bindings as per Krzysztof Kozlowski comments.
- Fix bisection: get rid of compiler errors in some patches.
Changes V4 -> V5 [5]:
- Tested on GXL board:
1. Fix panic detected by Corentin Labbe [6].
2. Disable hasher backend for GXL: in its current realization
is doesn't work. And there are no examples or docs in the
vendor SDK.
- Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
inversion of the keyiv at keys setup stage.
- A1 now uses its own compatible string.
- S4 uses A1 compatible as fallback.
- Code fixes based on comments Neil Atrmstrong and Rob Herring.
- Style fixes (set correct indentations)
Changes V5 -> V6 [7]:
- Fix DMA sync warning reported by Corentin Labbe [8].
- Remove CLK input from driver. Remove clk definition
and second interrput line from crypto node inside GXL dtsi.
Links:
- [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
- [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/
- [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/
- [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/
- [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/
- [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/
- [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/
- [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/
Alexey Romanov (23):
drivers: crypto: meson: don't hardcode IRQ count
drviers: crypto: meson: add platform data
drivers: crypto: meson: remove clock input
drivers: crypto: meson: add MMIO helpers
drivers: crypto: meson: move get_engine_number()
drivers: crypto: meson: drop status field from meson_flow
drivers: crypto: meson: move algs definition and cipher API to
cipher.c
drivers: crypto: meson: cleanup defines
drivers: crypto: meson: process more than MAXDESCS descriptors
drivers: crypto: meson: avoid kzalloc in engine thread
drivers: crypto: meson: introduce hasher
drivers: crypto: meson: add support for AES-CTR
drivers: crypto: meson: use fallback for 192-bit keys
drivers: crypto: meson: add support for G12-series
drivers: crypto: meson: add support for AXG-series
drivers: crypto: meson: add support for A1-series
dt-bindings: crypto: meson: remove clk and second interrupt line for
GXL
arch: arm64: dts: meson: gxl: correct crypto node definition
dt-bindings: crypto: meson: support new SoC's
arch: arm64: dts: meson: a1: add crypto node
arch: arm64: dts: meson: s4: add crypto node
arch: arm64: dts: meson: g12: add crypto node
arch: arm64: dts: meson: axg: add crypto node
.../bindings/crypto/amlogic,gxl-crypto.yaml | 24 +-
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 +
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 +
.../boot/dts/amlogic/meson-g12-common.dtsi | 6 +
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +-
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 +
drivers/crypto/amlogic/Makefile | 2 +-
drivers/crypto/amlogic/amlogic-gxl-cipher.c | 617 ++++++++++++------
drivers/crypto/amlogic/amlogic-gxl-core.c | 292 +++++----
drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 +++++++++++++
drivers/crypto/amlogic/amlogic-gxl.h | 118 +++-
11 files changed, 1185 insertions(+), 358 deletions(-)
create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c
--
2.34.1
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^ permalink raw reply
* [PATCH v6 01/23] drivers: crypto: meson: don't hardcode IRQ count
From: Alexey Romanov @ 2024-03-26 15:31 UTC (permalink / raw)
To: neil.armstrong, clabbe, herbert, davem, robh+dt,
krzysztof.kozlowski+dt, conor+dt, khilman, jbrunet,
martin.blumenstingl, vadim.fedorenko
Cc: linux-crypto, linux-amlogic, linux-kernel, devicetree,
linux-arm-kernel, kernel, Alexey Romanov
In-Reply-To: <20240326153219.2915080-1-avromanov@salutedevices.com>
IRQ count is no longer hardcoded, and make it part of
struct meson_flow. We need this for extend driver support for
other Amlogic SoC's.
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
---
drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 +-
drivers/crypto/amlogic/amlogic-gxl-core.c | 47 ++++++++++++---------
drivers/crypto/amlogic/amlogic-gxl.h | 8 ++--
3 files changed, 31 insertions(+), 26 deletions(-)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
index 3308406612fc..8d9ca3f4e5a2 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
@@ -19,7 +19,7 @@
static int get_engine_number(struct meson_dev *mc)
{
- return atomic_inc_return(&mc->flow) % MAXFLOW;
+ return atomic_inc_return(&mc->flow) % mc->flow_cnt;
}
static bool meson_cipher_need_fallback(struct skcipher_request *areq)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index f54ab0d0b1e8..35ec64df5b3a 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -28,8 +28,8 @@ static irqreturn_t meson_irq_handler(int irq, void *data)
int flow;
u32 p;
- for (flow = 0; flow < MAXFLOW; flow++) {
- if (mc->irqs[flow] == irq) {
+ for (flow = 0; flow < mc->flow_cnt; flow++) {
+ if (mc->chanlist[flow].irq == irq) {
p = readl(mc->base + ((0x04 + flow) << 2));
if (p) {
writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2));
@@ -110,7 +110,7 @@ static int meson_debugfs_show(struct seq_file *seq, void *v)
struct meson_dev *mc __maybe_unused = seq->private;
int i;
- for (i = 0; i < MAXFLOW; i++)
+ for (i = 0; i < mc->flow_cnt; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
mc->chanlist[i].stat_req);
@@ -153,14 +153,32 @@ static void meson_free_chanlist(struct meson_dev *mc, int i)
*/
static int meson_allocate_chanlist(struct meson_dev *mc)
{
+ struct platform_device *pdev = to_platform_device(mc->dev);
int i, err;
- mc->chanlist = devm_kcalloc(mc->dev, MAXFLOW,
+ mc->flow_cnt = platform_irq_count(pdev);
+ if (mc->flow_cnt <= 0) {
+ dev_err(mc->dev, "No IRQs defined\n");
+ return -ENODEV;
+ }
+
+ mc->chanlist = devm_kcalloc(mc->dev, mc->flow_cnt,
sizeof(struct meson_flow), GFP_KERNEL);
if (!mc->chanlist)
return -ENOMEM;
- for (i = 0; i < MAXFLOW; i++) {
+ for (i = 0; i < mc->flow_cnt; i++) {
+ mc->chanlist[i].irq = platform_get_irq(pdev, i);
+ if (mc->chanlist[i].irq < 0)
+ return mc->chanlist[i].irq;
+
+ err = devm_request_irq(mc->dev, mc->chanlist[i].irq,
+ meson_irq_handler, 0, "aml-crypto", mc);
+ if (err < 0) {
+ dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
+ return err;
+ }
+
init_completion(&mc->chanlist[i].complete);
mc->chanlist[i].engine = crypto_engine_alloc_init(mc->dev, true);
@@ -230,7 +248,7 @@ static void meson_unregister_algs(struct meson_dev *mc)
static int meson_crypto_probe(struct platform_device *pdev)
{
struct meson_dev *mc;
- int err, i;
+ int err;
mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
if (!mc)
@@ -252,19 +270,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
return err;
}
- for (i = 0; i < MAXFLOW; i++) {
- mc->irqs[i] = platform_get_irq(pdev, i);
- if (mc->irqs[i] < 0)
- return mc->irqs[i];
-
- err = devm_request_irq(&pdev->dev, mc->irqs[i], meson_irq_handler, 0,
- "gxl-crypto", mc);
- if (err < 0) {
- dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
- return err;
- }
- }
-
err = clk_prepare_enable(mc->busclk);
if (err != 0) {
dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
@@ -294,7 +299,7 @@ static int meson_crypto_probe(struct platform_device *pdev)
error_alg:
meson_unregister_algs(mc);
error_flow:
- meson_free_chanlist(mc, MAXFLOW - 1);
+ meson_free_chanlist(mc, mc->flow_cnt - 1);
clk_disable_unprepare(mc->busclk);
return err;
}
@@ -309,7 +314,7 @@ static void meson_crypto_remove(struct platform_device *pdev)
meson_unregister_algs(mc);
- meson_free_chanlist(mc, MAXFLOW - 1);
+ meson_free_chanlist(mc, mc->flow_cnt - 1);
clk_disable_unprepare(mc->busclk);
}
diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h
index 1013a666c932..79177cfa8b88 100644
--- a/drivers/crypto/amlogic/amlogic-gxl.h
+++ b/drivers/crypto/amlogic/amlogic-gxl.h
@@ -22,8 +22,6 @@
#define MESON_OPMODE_ECB 0
#define MESON_OPMODE_CBC 1
-#define MAXFLOW 2
-
#define MAXDESC 64
#define DESC_LAST BIT(18)
@@ -62,6 +60,7 @@ struct meson_desc {
* @keylen: keylen for this flow operation
* @complete: completion for the current task on this flow
* @status: set to 1 by interrupt if task is done
+ * @irq: IRQ number for amlogic-crypto
* @t_phy: Physical address of task
* @tl: pointer to the current ce_task for this flow
* @stat_req: number of request done by this flow
@@ -70,6 +69,7 @@ struct meson_flow {
struct crypto_engine *engine;
struct completion complete;
int status;
+ int irq;
unsigned int keylen;
dma_addr_t t_phy;
struct meson_desc *tl;
@@ -85,7 +85,7 @@ struct meson_flow {
* @dev: the platform device
* @chanlist: array of all flow
* @flow: flow to use in next request
- * @irqs: IRQ numbers for amlogic-crypto
+ * @flow_cnt: flow count for amlogic-crypto
* @dbgfs_dir: Debugfs dentry for statistic directory
* @dbgfs_stats: Debugfs dentry for statistic counters
*/
@@ -95,7 +95,7 @@ struct meson_dev {
struct device *dev;
struct meson_flow *chanlist;
atomic_t flow;
- int irqs[MAXFLOW];
+ int flow_cnt;
#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
struct dentry *dbgfs_dir;
#endif
--
2.34.1
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^ permalink raw reply related
* Re: [PATCH v3 00/12] mm/gup: Unify hugetlb, part 2
From: Jason Gunthorpe @ 2024-03-26 14:02 UTC (permalink / raw)
To: Peter Xu
Cc: linux-mm, linux-kernel, linuxppc-dev, Michael Ellerman,
Christophe Leroy, Matthew Wilcox, Rik van Riel, Lorenzo Stoakes,
Axel Rasmussen, Yang Shi, John Hubbard, linux-arm-kernel,
Kirill A . Shutemov, Andrew Jones, Vlastimil Babka, Mike Rapoport,
Andrew Morton, Muchun Song, Christoph Hellwig, linux-riscv,
James Houghton, David Hildenbrand, Andrea Arcangeli,
Aneesh Kumar K . V, Mike Kravetz
In-Reply-To: <ZgHJaJSpoeJVEccN@x1n>
On Mon, Mar 25, 2024 at 02:58:48PM -0400, Peter Xu wrote:
> > This remark would be a little easier to understand if you refer to
> > hugetlb_walk() not huge_pte_offset() - the latter is only used to
> > implement hugetlb_walk() and isn't removed by this series, while a
> > single hugetlb_walk() was removed.
>
> Right. Here huge_pte_offset() is the arch API that I hope we can remove,
> the hugetlb_walk() is simply the wrapper.
But arguably hugetlb_walk is the thing that should go..
In the generic code we should really try to get away from the weird
hugetlb abuse of treating every level as a pte_t. That is not how the
generic page table API works and that weirdness is part of what
motivates the arch API to supply special functions for reading. Not
every arch can just cast every level to a pte_t and still work.
But that weirdness is also saving alot of code so something else needs
to be though up..
> > Regardless, I think the point is spot on, the direction should be to
> > make the page table reading generic with minimal/no interaction with
> > hugetlbfs in the generic code.
>
> Yes, and I also like your terms on calling them "pgtable readers". It's a
> better way to describe the difference in that regard between
> huge_pte_offset() v.s. huge_pte_alloc(). Exactly that's my goal, that we
> should start with the "readers".
Yeah, it makes alot of sense to tackle the readers first - we are
pretty close now to having enough done to have generic readers. I
would imagine tackling everything outside mm/huge*.c to use the normal
page table API for reading.
Then consider what to do with the reading in mm/huge*.c
> The writters might change semantics when merge, and can be more
> challenging, I'll need to look into details of each one, like page fault
> handlers. Such work may need to be analyzed case by case, and this GUP
> part is definitely the low hanging fruit comparing to the rest.
The write side is tricky, I think if the read side is sorted out then
it will be easer to reason about the write side. Today the write side
is paired with the special read side and it is extra hard to
understand if there is something weird hidden in the arch.
> measurements too when getting there. And btw, IIUC the major challenge of
> pagewalk.c is not the removal of walk_hugetlb_range() alone - that may not
> be that hard if that's the solo purpose. The better way to go is to remove
> mm_walk_ops.hugetlb_entry() altogether, which will cause a change in all
> callers; that's "the challenge".. pretty much labor works, not a major
> technical challenge it seems. Not sure if it's a good news or bad..
Ugh, that is a big pain. It is relying on that hugetlbfs trick of
passing in a pte that is not a pte to make the API generic..
The more I look at this the more I think we need to get to Matthew's
idea of having some kind of generic page table API that is not tightly
tied to level. Replacing the hugetlb trick of 'everything is a PTE'
with 5 special cases in every place seems just horrible.
struct mm_walk_ops {
int (*leaf_entry)(struct mm_walk_state *state, struct mm_walk *walk);
}
And many cases really want something like:
struct mm_walk_state state;
if (!mm_walk_seek_leaf(state, mm, address))
goto no_present
if (mm_walk_is_write(state)) ..
And detailed walking:
for_each_pt_leaf(state, mm, address) {
if (mm_walk_is_write(state)) ..
}
Replacing it with a mm_walk_state that retains the level or otherwise
to allow decoding any entry composes a lot better. Forced Loop
unrolling can get back to the current code gen in alot of places.
It also makes the power stuff a bit nicer as the mm_walk_state could
automatically retain back pointers to the higher levels in the state
struct too...
The puzzle is how to do it and still get reasonable efficient codegen,
many operations are going to end up switching on some state->level to
know how to decode the entry.
> One thing I'll soon look into is to allow huge mappings for PFNMAP; there's
> one request from VFIO side for MMIO. Dropping mm_walk_ops.hugetlb_entry()
> seems to be good for all such purposes; well, I may need to bite the bullet
> here.. for either of the purposes to move on.
That would be a nice feature!
> > If, or how much, the hugepd write side remains special is the open
> > question, I think.
>
> It seems balls are rolling in that aspect, I haven't looked in depth there
> in Christophe's series but it's great to have started!
Yes!
Jason
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^ permalink raw reply
* Re: [PATCH 1/5] dt-bindings: iio: dac: ti,dac5571: Add DAC081C081 support
From: Jonathan Cameron @ 2024-03-26 15:29 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Jonathan Cameron, devicetree, imx, linux-arm-kernel,
Trevor Zaharichuk, Greg Lytle, Lars-Peter Clausen, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sean Nyekjaer, linux-iio
In-Reply-To: <20240325205641.GD23988@pendragon.ideasonboard.com>
On Mon, 25 Mar 2024 22:56:41 +0200
Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote:
> Hi Jonathan,
>
> On Mon, Mar 25, 2024 at 08:48:57PM +0000, Jonathan Cameron wrote:
> > On Mon, 25 Mar 2024 22:32:41 +0200 Laurent Pinchart wrote:
> >
> > > The DAC081C081 is a TI DAC whose software interface is compatible with
> > > the DAC5571. It is the 8-bit version of the DAC121C081, already
> > > supported by the DAC5571 bindings. Extends the bindings to support this
> > > chip.
> > >
> > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> >
> > Hi Laurent,
> >
> > Given it's a part number where no one is going to guess it is compatible
> > with the DAC5571 and that we don't have a history of fallback compatibles
> > I'm fine with this change, but just wanted to ask is a fallback compatible
> > useful to you to run with older kernels?
> >
> > I should have noticed when Peter added the dac121c081. If we add a fallback
> > should do that one as well.
>
> I've indeed noticed that there should have been a fallback for
> dac121c081, but didn't stop to ponder why that wasn't the case, and just
> went along with the flow :-) I agree a fallback could be useful, which
> would then allow dropping patch 2/5 from this series (*). I can do so if
> you prefer.
>
> * This is not entirely true. While the DAC1081C081 is largely compatible
> with the DAC5573, they have different values for one of the power-down
> resistors (2.5kΩ instead of 1kΩ if I recall correctly). To be completely
> accurate, the driver should report that. We could still use the fallback
> compatible, reporting the wrong power-down resistor value.
>
Hmm - Would anyone really care about that value being wrong?
I think perhaps that's just about significant enough that maybe a fallback
compatible doesn't make sense here.
Jonathan
> > > ---
> > > Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > > index 79da0323c327..e59db861e2eb 100644
> > > --- a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > > +++ b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml
> > > @@ -21,6 +21,7 @@ properties:
> > > - ti,dac5573
> > > - ti,dac6573
> > > - ti,dac7573
> > > + - ti,dac081c081
> > > - ti,dac121c081
> > >
> > > reg:
>
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^ permalink raw reply
* Re: [PATCH v3 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus
From: Guenter Roeck @ 2024-03-26 15:28 UTC (permalink / raw)
To: Peter Yin, patrick, Wim Van Sebroeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240326150027.3015958-5-peteryin.openbmc@gmail.com>
On 3/26/24 08:00, Peter Yin wrote:
> Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600
>
> Regarding the AST2600 specification, the WDTn Timeout Status Register
> (WDT10) has bit 1 reserved. Bit 1 of the status register indicates
> on ast2500 if the boot was from the second boot source.
> It does not indicate that the most recent reset was triggered by
> the watchdog. The code should just be changed to set WDIOF_CARDRESET
> if bit 0 of the status register is set.
>
> Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or
> ast2500 SCU3C when bit1 is set.
>
> Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
> ---
> drivers/watchdog/aspeed_wdt.c | 53 ++++++++++++++++++++++++-----------
> 1 file changed, 37 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> index b4773a6aaf8c..52afc5240b1c 100644
> --- a/drivers/watchdog/aspeed_wdt.c
> +++ b/drivers/watchdog/aspeed_wdt.c
> @@ -11,10 +11,12 @@
> #include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/kstrtox.h>
> +#include <linux/mfd/syscon.h>
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_irq.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> #include <linux/watchdog.h>
>
> static bool nowayout = WATCHDOG_NOWAYOUT;
> @@ -65,23 +67,32 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
> #define WDT_RELOAD_VALUE 0x04
> #define WDT_RESTART 0x08
> #define WDT_CTRL 0x0C
> -#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> -#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> -#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> -#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> -#define WDT_CTRL_1MHZ_CLK BIT(4)
> -#define WDT_CTRL_WDT_EXT BIT(3)
> -#define WDT_CTRL_WDT_INTR BIT(2)
> -#define WDT_CTRL_RESET_SYSTEM BIT(1)
> -#define WDT_CTRL_ENABLE BIT(0)
> +#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> +#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> +#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> +#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> +#define WDT_CTRL_1MHZ_CLK BIT(4)
> +#define WDT_CTRL_WDT_EXT BIT(3)
> +#define WDT_CTRL_WDT_INTR BIT(2)
> +#define WDT_CTRL_RESET_SYSTEM BIT(1)
> +#define WDT_CTRL_ENABLE BIT(0)
> #define WDT_TIMEOUT_STATUS 0x10
> -#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> -#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> +#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> +#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> +#define WDT_TIMEOUT_STATUS_EVENT BIT(0)
> #define WDT_CLEAR_TIMEOUT_STATUS 0x14
> -#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> +#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> #define WDT_RESET_MASK1 0x1c
> #define WDT_RESET_MASK2 0x20
>
> +/*
> + * Ast2600 SCU74 bit1 is External reset flag
> + * Ast2500 SCU3C bit1 is External reset flag
> + */
> +#define EXTERN_RESET_FLAG BIT(1)
> +#define AST2500_SYSTEM_RESET_EVENT (0x3C)
> +#define AST2600_SYSTEM_RESET_EVENT (0x74)
() around constants does not add any value.
> +
> /*
> * WDT_RESET_WIDTH controls the characteristics of the external pulse (if
> * enabled), specifically:
> @@ -458,15 +469,25 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
> writel(duration - 1, wdt->base + WDT_RESET_WIDTH);
> }
>
> + struct regmap *scu_base = syscon_regmap_lookup_by_phandle(dev->of_node,
> + "aspeed,scu");
> status = readl(wdt->base + WDT_TIMEOUT_STATUS);
> - if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) {
> + if (status & WDT_TIMEOUT_STATUS_EVENT)
> wdt->wdd.bootstatus = WDIOF_CARDRESET;
>
> - if (of_device_is_compatible(np, "aspeed,ast2400-wdt") ||
> - of_device_is_compatible(np, "aspeed,ast2500-wdt"))
> - wdt->wdd.groups = bswitch_groups;
> + if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) {
> + regmap_read(scu_base, AST2600_SYSTEM_RESET_EVENT, &status);
scu_base as returned from syscon_regmap_lookup_by_phandle() can be an ERR_PTR.
If it is, this will crash. On top of ttat, regmap_read() can also return an
error. If it does, status will be unmodified, and WDIOF_EXTERN1 will be set randomly.
This will most definitely happen if REGMAP support is disabled (there is nothing
in Kconfig requiring that REGMAP must be enabled for this driver).
Guenter
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^ permalink raw reply
* Re: (subset) [PATCH 0/4] drm: xlnx: zynqmp: Add DP audio support
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: Lars-Peter Clausen, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
Laurent Pinchart, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Michal Simek, Tomi Valkeinen
Cc: linux-sound, linux-kernel, dri-devel, devicetree,
linux-arm-kernel, Vishal Sagar, Anatoliy Klymenko,
Péter Ujfalusi
In-Reply-To: <20240312-xilinx-dp-audio-v1-0-696c79facbb9@ideasonboard.com>
On Tue, 12 Mar 2024 11:41:01 +0200, Tomi Valkeinen wrote:
> Add DisplayPort audio support for Xilinx ZynqMP platforms.
>
> This depends on patch adding cyclic DMA mode for DPDMA driver:
>
> https://lore.kernel.org/all/20240228042124.3074044-3-vishal.sagar@amd.com/
>
> If that patch is missing, starting an audio playback will fail with an
> ASoC error.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/4] ASoC: dmaengine_pcm: Allow passing component name via config
commit: cee28113db17f0de58df0eaea4e2756c404ee01f
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: (subset) [PATCH v2 0/4] drm: xlnx: zynqmp: Add DP audio support
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: Lars-Peter Clausen, Jaroslav Kysela, Takashi Iwai, Liam Girdwood,
Laurent Pinchart, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Daniel Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Michal Simek, Tomi Valkeinen
Cc: linux-sound, linux-kernel, dri-devel, devicetree,
linux-arm-kernel, Vishal Sagar, Anatoliy Klymenko,
Péter Ujfalusi
In-Reply-To: <20240319-xilinx-dp-audio-v2-0-92d6d3a7ca7e@ideasonboard.com>
On Tue, 19 Mar 2024 10:22:35 +0200, Tomi Valkeinen wrote:
> Add DisplayPort audio support for Xilinx ZynqMP platforms.
>
> This depends on patch adding cyclic DMA mode for DPDMA driver:
>
> https://lore.kernel.org/all/20240228042124.3074044-3-vishal.sagar@amd.com/
>
> If that patch is missing, starting an audio playback will fail with an
> ASoC error.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/4] ASoC: dmaengine_pcm: Allow passing component name via config
commit: cee28113db17f0de58df0eaea4e2756c404ee01f
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: (subset) [PATCH v3 00/22] SoC: Cleanup MediaTek soundcard machine drivers
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: shraash, alsa-devel, allen-kh.cheng, kuninori.morimoto.gx,
lgirdwood, tiwai, shane.chien, krzysztof.kozlowski+dt,
claudiu.beznea, kernel, robh, nfraprado, amergnat, zhourui,
jiaxin.yu, trevor.wu, wenst, devicetree, conor+dt, ckeepax, arnd,
frank.li, maso.huang, u.kleine-koenig, eugen.hristev,
alpernebiyasak, linux-mediatek, linux-sound, matthias.bgg, perex,
linux-arm-kernel, xiazhengqiao, dianders, linux-kernel,
jarkko.nikula
In-Reply-To: <20240313110147.1267793-1-angelogioacchino.delregno@collabora.com>
On Wed, 13 Mar 2024 12:01:25 +0100, AngeloGioacchino Del Regno wrote:
> Changes in v3:
> - Added audio-routing names in enum in all yaml files
> - Added mention of disallowing old and new properties together in
> commit message of bindings patches
> - Fixed validation errors with sound-card-common.yaml inclusion
> due to missing model property in examples
> - Removed `else` enforcing headset-codec/speaker-codecs requirement
> if xxx-dai-link not present to avoid future commit noise as the
> deprecated statement will disallow deprecated properties as required
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[01/22] ASoC: mediatek: mt8192-afe-pcm: Convert to devm_pm_runtime_enable()
commit: 7aaaa22de56ce0dae15fd9f42a69a1d1a7a6e078
[02/22] ASoC: mediatek: mt8192-afe-pcm: Simplify with dev_err_probe()
commit: 324c603a4efca7d1045e0bf3477ca54970eac72c
[03/22] ASoC: mediatek: Commonize ADDA rate transform functions and enums
commit: d6c01755805d346a1382d2d81c214b2ca557487a
[04/22] ASoC: mediatek: Assign dummy when codec not specified for a DAI link
commit: 5f39231888c63f0a7708abc86b51b847476379d8
[05/22] ASoC: mediatek: Add common machine soundcard driver probe mechanism
(no commit info)
[06/22] ASoC: mediatek: common: Constify struct mtk_sof_priv
(no commit info)
[07/22] ASoC: mediatek: mt8188: Migrate to mtk_soundcard_common_probe
(no commit info)
[08/22] ASoC: mediatek: mt8195: Migrate to mtk_soundcard_common_probe
(no commit info)
[09/22] ASoC: mediatek: mt8192: Migrate to mtk_soundcard_common_probe
(no commit info)
[10/22] ASoC: mediatek: mt8186: Migrate to mtk_soundcard_common_probe
(no commit info)
[11/22] ASoC: mediatek: Add common snd_soc_ops .startup() callback
(no commit info)
[12/22] ASoC: mediatek: mt8195: Migrate to the common mtk_soundcard_startup
(no commit info)
[13/22] ASoC: mediatek: mt8192: Migrate to the common mtk_soundcard_startup
(no commit info)
[14/22] ASoC: mediatek: mt8186-rt1019: Migrate to the common mtk_soundcard_startup
(no commit info)
[15/22] ASoC: mediatek: Add common mtk_afe_component_probe callback
(no commit info)
[16/22] ASoC: mediatek: Use common mtk_afe_pcm_platform with common probe cb
(no commit info)
[17/22] ASoC: mediatek: mt8186: Unify mt8186-mt6366 machine drivers
(no commit info)
[18/22] ASoC: dt-bindings: mt8195: Document audio-routing and dai-link subnode
(no commit info)
[19/22] ASoC: dt-bindings: mt8192: Document audio-routing and dai-link subnode
(no commit info)
[20/22] ASoC: dt-bindings: mt8186: Document audio-routing and dai-link subnode
(no commit info)
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 0/7] ASoC: mediatek: AFE drivers cleanups
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: lgirdwood, AngeloGioacchino Del Regno
Cc: alsa-devel, nfraprado, kuninori.morimoto.gx, linux-kernel,
ribalda, linux-sound, tiwai, linux-mediatek, trevor.wu,
u.kleine-koenig, matthias.bgg, perex, linux-arm-kernel
In-Reply-To: <20240111105247.117766-1-angelogioacchino.delregno@collabora.com>
On Thu, 11 Jan 2024 11:52:40 +0100, AngeloGioacchino Del Regno wrote:
> This series converts MediaTek AFE drivers' probe functions to use
> dev_err_probe() and devm functions where possible and, in some
> cases, dropping the .remove_new() callback, reducing the size.
>
> Cheers!
>
> AngeloGioacchino Del Regno (7):
> ASoC: mediatek: mt8173-afe-pcm: Convert to devm_pm_runtime_enable()
> ASoC: mediatek: mt8173-afe-pcm: Use devm_snd_soc_register_component()
> ASoC: mediatek: mt8183-afe-pcm: Convert to devm_pm_runtime_enable()
> ASoC: mediatek: mt8183-afe-pcm: Simplify with dev_err_probe()
> ASoC: mediatek: mt8192-afe-pcm: Convert to devm_pm_runtime_enable()
> ASoC: mediatek: mt8192-afe-pcm: Simplify with dev_err_probe()
> ASoC: mediatek: mt8195-afe-pcm: Drop .remove_new() callback
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/7] ASoC: mediatek: mt8173-afe-pcm: Convert to devm_pm_runtime_enable()
(no commit info)
[2/7] ASoC: mediatek: mt8173-afe-pcm: Use devm_snd_soc_register_component()
(no commit info)
[3/7] ASoC: mediatek: mt8183-afe-pcm: Convert to devm_pm_runtime_enable()
(no commit info)
[4/7] ASoC: mediatek: mt8183-afe-pcm: Simplify with dev_err_probe()
(no commit info)
[5/7] ASoC: mediatek: mt8192-afe-pcm: Convert to devm_pm_runtime_enable()
commit: 7aaaa22de56ce0dae15fd9f42a69a1d1a7a6e078
[6/7] ASoC: mediatek: mt8192-afe-pcm: Simplify with dev_err_probe()
commit: 324c603a4efca7d1045e0bf3477ca54970eac72c
[7/7] ASoC: mediatek: mt8195-afe-pcm: Drop .remove_new() callback
(no commit info)
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 0/4] Add support for jack detection to codec present in A64 SoC
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: linux-kernel, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
Ondřej Jirman
Cc: Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Arnaud Ferraris,
linux-sound, linux-arm-kernel, linux-sunxi
In-Reply-To: <20240302140042.1990256-1-megi@xff.cz>
On Sat, 02 Mar 2024 15:00:34 +0100, Ondřej Jirman wrote:
> This series adds support for jack detection to this codec. I used
> and tested this on Pinephone. It works quite nicely. I tested it
> against Android headset mic button resistor specification.
>
> The patches are a rewritten and debugged version of the original
> ones from Arnaud Ferraris and Samuel Holland, improved to better
> handle headset button presses and with more robust plug-in/out
> event debouncing, and to use set_jack API instead of sniffing
> the sound card widget names, to detect the type of jack connector.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/4] ASoC: sun50i-codec-analog: Move suspend/resume to set_bias_level
commit: c0454d31e05062b1c7df7eef21855ba1f56c5158
[2/4] ASoC: sun8i-codec: Enable bus clock at STANDBY and higher bias
commit: c556814b926c3f16fdca3d18cac793ccf0d14c44
[3/4] ASoC: sun50i-codec-analog: Enable jack detection on startup
commit: d5961e43b28668088087befbf4f7a043bd0ae65c
[4/4] ASoC: sun8i-codec: Implement jack and accessory detection
commit: 21fa98f4197bb3365dda1417708b318f403c13c1
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 0/5] Add support for jack detection to codec present in A64 SoC
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: linux-kernel, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
Ondřej Jirman
Cc: Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, Arnaud Ferraris,
linux-sound, linux-arm-kernel, linux-sunxi
In-Reply-To: <20240223015219.3618111-1-megi@xff.cz>
On Fri, 23 Feb 2024 02:52:10 +0100, Ondřej Jirman wrote:
> This series adds support for jack detection to this codec. I used
> and tested this on Pinephone. It works quite nicely. I tested it
> against Android headset mic button resistor specification.
>
> The patches are improved and debugged version of the original
> ones from Arnaud Ferraris and Samuel Holland, imrpoved to better
> handle headset button presses and with more robust plug-in/out
> event debouncing.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/5] dt-bindings: sound: Add jack-type property to sun8i-a33-codec
(no commit info)
[2/5] ASoC: sun50i-codec-analog: Move suspend/resume to set_bias_level
commit: c0454d31e05062b1c7df7eef21855ba1f56c5158
[3/5] ASoC: sun8i-codec: Enable bus clock at STANDBY and higher bias
commit: c556814b926c3f16fdca3d18cac793ccf0d14c44
[4/5] ASoC: sun50i-codec-analog: Enable jack detection on startup
commit: d5961e43b28668088087befbf4f7a043bd0ae65c
[5/5] ASoC: sun8i-codec: Implement jack and accessory detection
commit: 21fa98f4197bb3365dda1417708b318f403c13c1
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v3 0/5] ASoC: fsl: Support register and unregister rpmsg sound card through remoteproc
From: Mark Brown @ 2024-03-26 15:27 UTC (permalink / raw)
To: shengjiu.wang, Xiubo.Lee, festevam, nicoleotsuka, lgirdwood,
perex, tiwai, shawnguo, s.hauer, kernel, linux-imx, alsa-devel,
linuxppc-dev, linux-sound, linux-kernel, linux-arm-kernel,
Chancel Liu
In-Reply-To: <20240311111349.723256-1-chancel.liu@nxp.com>
On Mon, 11 Mar 2024 20:13:44 +0900, Chancel Liu wrote:
> echo /lib/firmware/fw.elf > /sys/class/remoteproc/remoteproc0/firmware
> (A) echo start > /sys/class/remoteproc/remoteproc0/state
> (B) echo stop > /sys/class/remoteproc/remoteproc0/state
>
> The rpmsg sound card is registered in (A) and unregistered in (B).
> After "start", imx-audio-rpmsg registers devices for ASoC platform driver
> and machine driver. Then sound card is registered. After "stop",
> imx-audio-rpmsg unregisters devices for ASoC platform driver and machine
> driver. Then sound card is unregistered.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/5] ASoC: fsl: imx-pcm-rpmsg: Register component with rpmsg channel name
commit: 41f96cd53f2838ac4894491ac5eadb06f1e5b858
[2/5] ASoC: fsl: imx-audio-rpmsg: Register device with rpmsg channel name
commit: dacc7459745df168152b5cceba34efade9b5e063
[3/5] ASoC: fsl: Let imx-audio-rpmsg register platform device for card
commit: c73524768e9e1a7ac9eb3a4d36a1ac0d34f22644
[4/5] ASoC: fsl: fsl_rpmsg: Register CPU DAI with name of rpmsg channel
commit: 0aa7f5406afa828a93d84d75c9b9ac991cd75367
[5/5] ASoC: fsl: imx-rpmsg: Update to correct DT node
commit: c14445bdcb98feddf9afaeb05e6193cc1f8eec1a
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [RFC PATCH v2] ASoC: meson: g12a-toacodec: rework the definition of bits
From: Jerome Brunet @ 2024-03-26 15:15 UTC (permalink / raw)
To: Jan Dakinevich
Cc: Jerome Brunet, Liam Girdwood, Mark Brown, Jaroslav Kysela,
Takashi Iwai, Neil Armstrong, Kevin Hilman, Martin Blumenstingl,
alsa-devel, linux-sound, linux-arm-kernel, linux-amlogic,
linux-kernel
In-Reply-To: <20240325235311.411920-1-jan.dakinevich@salutedevices.com>
On Tue 26 Mar 2024 at 02:53, Jan Dakinevich <jan.dakinevich@salutedevices.com> wrote:
> There is a lot of defines, but almost all of them are not used. Lets
> rework them:
Thanks for noticing. Please start by removing what's unused.
>
> - keep separate the definition for different platforms to make easier
> checking that they match documentation.
>
> - use LSB/MSB sufixes for uniformity.
I'd be in favor of dropping these suffixes completely.
>
> - don't use hard-coded values for already declared defines.
>
> Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
> ---
> Links:
>
> [1] https://lore.kernel.org/lkml/20240314232201.2102178-1-jan.dakinevich@salutedevices.com/
>
> Changes v1 -> v2:
> - Detached from v1's series (patch 7).
> - Fixed my wrong understanding of SOC_SINGLE's input parameters.
>
> sound/soc/meson/g12a-toacodec.c | 79 ++++++++++++++++++++-------------
> 1 file changed, 49 insertions(+), 30 deletions(-)
>
> diff --git a/sound/soc/meson/g12a-toacodec.c b/sound/soc/meson/g12a-toacodec.c
> index 531bb8707a3e..22181f4bab72 100644
> --- a/sound/soc/meson/g12a-toacodec.c
> +++ b/sound/soc/meson/g12a-toacodec.c
> @@ -20,26 +20,37 @@
> #define G12A_TOACODEC_DRV_NAME "g12a-toacodec"
>
> #define TOACODEC_CTRL0 0x0
> -#define CTRL0_ENABLE_SHIFT 31
> -#define CTRL0_DAT_SEL_SM1_MSB 19
> -#define CTRL0_DAT_SEL_SM1_LSB 18
> -#define CTRL0_DAT_SEL_MSB 15
> -#define CTRL0_DAT_SEL_LSB 14
> -#define CTRL0_LANE_SEL_SM1 16
> -#define CTRL0_LANE_SEL 12
> -#define CTRL0_LRCLK_SEL_SM1_MSB 14
> -#define CTRL0_LRCLK_SEL_SM1_LSB 12
> -#define CTRL0_LRCLK_SEL_MSB 9
> -#define CTRL0_LRCLK_SEL_LSB 8
> -#define CTRL0_LRCLK_INV_SM1 BIT(10)
> -#define CTRL0_BLK_CAP_INV_SM1 BIT(9)
> -#define CTRL0_BLK_CAP_INV BIT(7)
> -#define CTRL0_BCLK_O_INV_SM1 BIT(8)
> -#define CTRL0_BCLK_O_INV BIT(6)
> -#define CTRL0_BCLK_SEL_SM1_MSB 6
> -#define CTRL0_BCLK_SEL_MSB 5
> -#define CTRL0_BCLK_SEL_LSB 4
> -#define CTRL0_MCLK_SEL GENMASK(2, 0)
> +
> +/* Common bits */
> +#define CTRL0_ENABLE_SHIFT 31
> +#define CTRL0_MCLK_SEL GENMASK(2, 0)
> +
> +/* G12A bits */
> +#define CTRL0_DAT_SEL_G12A_MSB 15
> +#define CTRL0_DAT_SEL_G12A_LSB 14
> +#define CTRL0_LANE_SEL_G12A_MSB 13
> +#define CTRL0_LANE_SEL_G12A_LSB 12
> +#define CTRL0_LANE_SEL_G12A_MAX 3
> +#define CTRL0_LRCLK_SEL_G12A_MSB 9
> +#define CTRL0_LRCLK_SEL_G12A_LSB 8
> +#define CTRL0_BLK_CAP_INV_G12A BIT(7)
> +#define CTRL0_BCLK_O_INV_G12A BIT(6)
> +#define CTRL0_BCLK_SEL_G12A_MSB 5
> +#define CTRL0_BCLK_SEL_G12A_LSB 4
> +
> +/* SM1 bits */
> +#define CTRL0_DAT_SEL_SM1_MSB 19
> +#define CTRL0_DAT_SEL_SM1_LSB 18
> +#define CTRL0_LANE_SEL_SM1_MSB 17
> +#define CTRL0_LANE_SEL_SM1_LSB 16
> +#define CTRL0_LANE_SEL_SM1_MAX 3
> +#define CTRL0_LRCLK_SEL_SM1_MSB 14
> +#define CTRL0_LRCLK_SEL_SM1_LSB 12
> +#define CTRL0_LRCLK_INV_SM1 BIT(10)
> +#define CTRL0_BLK_CAP_INV_SM1 BIT(9)
> +#define CTRL0_BCLK_O_INV_SM1 BIT(8)
> +#define CTRL0_BCLK_SEL_SM1_MSB 6
> +#define CTRL0_BCLK_SEL_SM1_LSB 4
>
> #define TOACODEC_OUT_CHMAX 2
>
> @@ -108,7 +119,7 @@ static int g12a_toacodec_mux_put_enum(struct snd_kcontrol *kcontrol,
> }
>
> static SOC_ENUM_SINGLE_DECL(g12a_toacodec_mux_enum, TOACODEC_CTRL0,
> - CTRL0_DAT_SEL_LSB,
> + CTRL0_DAT_SEL_G12A_LSB,
> g12a_toacodec_mux_texts);
>
> static SOC_ENUM_SINGLE_DECL(sm1_toacodec_mux_enum, TOACODEC_CTRL0,
> @@ -210,7 +221,7 @@ static int g12a_toacodec_component_probe(struct snd_soc_component *c)
> {
> /* Initialize the static clock parameters */
> return snd_soc_component_write(c, TOACODEC_CTRL0,
> - CTRL0_BLK_CAP_INV);
> + CTRL0_BLK_CAP_INV_G12A);
> }
>
> static int sm1_toacodec_component_probe(struct snd_soc_component *c)
> @@ -229,11 +240,13 @@ static const struct snd_soc_dapm_route g12a_toacodec_routes[] = {
> };
>
> static const struct snd_kcontrol_new g12a_toacodec_controls[] = {
> - SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL, 3, 0),
> + SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_G12A_LSB,
> + CTRL0_LANE_SEL_G12A_MAX, 0),
> };
>
> static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
> - SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
> + SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1_LSB,
> + CTRL0_LANE_SEL_SM1_MAX, 0),
> };
>
> static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
> @@ -266,16 +279,22 @@ static const struct regmap_config g12a_toacodec_regmap_cfg = {
>
> static const struct g12a_toacodec_match_data g12a_toacodec_match_data = {
> .component_drv = &g12a_toacodec_component_drv,
> - .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, 14, 15),
> - .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 8, 9),
> - .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 5),
> + .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_DAT_SEL_G12A_LSB,
> + CTRL0_DAT_SEL_G12A_MSB),
> + .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_LRCLK_SEL_G12A_LSB,
> + CTRL0_LRCLK_SEL_G12A_MSB),
> + .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_BCLK_SEL_G12A_LSB,
> + CTRL0_BCLK_SEL_G12A_MSB),
> };
>
> static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
> .component_drv = &sm1_toacodec_component_drv,
> - .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, 18, 19),
> - .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 12, 14),
> - .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 6),
> + .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_DAT_SEL_SM1_LSB,
> + CTRL0_DAT_SEL_SM1_MSB),
> + .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_LRCLK_SEL_SM1_LSB,
> + CTRL0_LRCLK_SEL_SM1_MSB),
> + .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, CTRL0_BCLK_SEL_SM1_LSB,
> + CTRL0_BCLK_SEL_SM1_MSB),
Those defines are already platform specific by the structure holding
them and the defines you have added are not helping readability.
I don't see the point to see.
I'd prefer to keep the field defined as they are.
> };
>
> static const struct of_device_id g12a_toacodec_of_match[] = {
--
Jerome
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^ permalink raw reply
* Re: [PATCH v7 0/4] arm64: dts: imx8qxp add asrc and sai
From: Mark Brown @ 2024-03-26 15:21 UTC (permalink / raw)
To: Frank Li
Cc: Liam Girdwood, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Shengjiu Wang, linux-sound, devicetree, imx, linux-arm-kernel,
linux-kernel, Conor Dooley
In-Reply-To: <ZgLYOYFRxVqK30Z1@lizhi-Precision-Tower-5810>
[-- Attachment #1.1: Type: text/plain, Size: 949 bytes --]
On Tue, Mar 26, 2024 at 10:14:17AM -0400, Frank Li wrote:
> @Mark Brown:
My name doesn't have any @s in it...
> Could you please pick dt-bindings part? Reviewed by dt team.
Please don't send content free pings and please allow a reasonable time
for review. People get busy, go on holiday, attend conferences and so
on so unless there is some reason for urgency (like critical bug fixes)
please allow at least a couple of weeks for review. If there have been
review comments then people may be waiting for those to be addressed.
Sending content free pings adds to the mail volume (if they are seen at
all) which is often the problem and since they can't be reviewed
directly if something has gone wrong you'll have to resend the patches
anyway, so sending again is generally a better approach though there are
some other maintainers who like them - if in doubt look at how patches
for the subsystem are normally handled.
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
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^ permalink raw reply
* Re: [PATCH v4 1/2] dt-bindings: net: add phy-supply property for stm32
From: Andrew Lunn @ 2024-03-26 15:13 UTC (permalink / raw)
To: Christophe ROULLIER
Cc: David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Maxime Coquelin,
Alexandre Torgue, Richard Cochran, Jose Abreu, Liam Girdwood,
Mark Brown, Marek Vasut, netdev, devicetree, linux-stm32,
linux-arm-kernel, linux-kernel
In-Reply-To: <a19b20ae-d12a-47c8-9d1f-482a84924e6c@foss.st.com>
On Tue, Mar 26, 2024 at 03:41:13PM +0100, Christophe ROULLIER wrote:
>
> On 3/26/24 14:58, Andrew Lunn wrote:
> > On Tue, Mar 26, 2024 at 01:58:48PM +0100, Christophe Roullier wrote:
> > > Phandle to a regulator that provides power to the PHY. This
> > > regulator will be managed during the PHY power on/off sequence.
> > >
> > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
> > > ---
> > > Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 3 +++
> > > 1 file changed, 3 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> > > index fc8c96b08d7dc..80937b28fa046 100644
> > > --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> > > +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml
> > > @@ -82,6 +82,9 @@ properties:
> > > Should be phandle/offset pair. The phandle to the syscon node which
> > > encompases the glue register, and the offset of the control register
> > > + phy-supply:
> > > + description: PHY regulator
> > ~/linux/drivers/net/ethernet/stmicro/stmmac$ grep regulator_get *
> > dwmac-rk.c: bsp_priv->regulator = devm_regulator_get(dev, "phy");
> > dwmac-sun8i.c: gmac->regulator = devm_regulator_get_optional(dev, "phy");
> > dwmac-sunxi.c: gmac->regulator = devm_regulator_get_optional(dev, "phy");
> >
> > Maybe i'm missing something, but i don't see an actual implementation
> > of this binding?
> >
> > Andrew
>
> Hi Andrew,
>
> You are right, my next step is to upstream support of Ethernet MP13 glue and
> some update like Phy regulator support
Then please make this binding patch part of the series which
implements the binding. They go together.
Andrew
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^ permalink raw reply
* [PATCH v3 1/5] arm64: dts: exynos: gs101: reorder pinctrl-* properties
From: Tudor Ambarus @ 2024-03-26 15:12 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
In-Reply-To: <20240326151301.348932-1-tudor.ambarus@linaro.org>
From: André Draszik <andre.draszik@linaro.org>
The Preferred order for these is pinctrl-0 pinctrl-names.
Update the DTSI & DTS accordingly.
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 4 ++--
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 6ccade2c8cb4..40de2b0aa086 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -29,8 +29,8 @@ chosen {
gpio-keys {
compatible = "gpio-keys";
- pinctrl-names = "default";
pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
+ pinctrl-names = "default";
button-vol-down {
label = "KEY_VOLUMEDOWN";
@@ -103,8 +103,8 @@ key_power: key-power-pins {
};
&serial_0 {
- pinctrl-names = "default";
pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 55e6bcb3689e..5868c96c771f 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -393,8 +393,8 @@ hsi2c_8: i2c@10970000 {
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-names = "default";
pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
--
2.44.0.396.g6e790dbe36-goog
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^ permalink raw reply related
* [PATCH v3 2/5] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
From: Tudor Ambarus @ 2024-03-26 15:12 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
In-Reply-To: <20240326151301.348932-1-tudor.ambarus@linaro.org>
The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
thus the pinctrl-0/names shall stay in dtsi. Move them.
Reviewed-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index 40de2b0aa086..6be15e990b65 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -103,8 +103,6 @@ key_power: key-power-pins {
};
&serial_0 {
- pinctrl-0 = <&uart0_bus>;
- pinctrl-names = "default";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 5868c96c771f..a1aff219208a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -424,6 +424,8 @@ serial_0: serial@10a00000 {
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "uart", "clk_uart_baud0";
+ pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
samsung,uart-fifosize = <256>;
status = "disabled";
};
--
2.44.0.396.g6e790dbe36-goog
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^ permalink raw reply related
* [PATCH v3 0/5] arm64: dts: exynos: gs101: define all PERIC USI nodes
From: Tudor Ambarus @ 2024-03-26 15:12 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
Hi,
The series starts with some trivial cosmetics patches, then defines all
the PERIC USI nodes.
v3:
- seems that Andre' already reordered the pinctrl properties, take his
patch (first in the series) and rebase my series on top.
- small updates on commit messages
- collect R-b tags
v2:
- reverse pinctrl-* lines, first pinctrl-0 then pinctrl-names
- move the pinctrl-* properties after clocks so that we keep alphabetic
order
- join lines close to 80 chars
- use alphabetic order for the standard/common properties:
address/size-cells, clocks, interrupts, pinctrl
- collect R-b tags
v1:
- https://lore.kernel.org/linux-samsung-soc/20240307135248.162752-1-tudor.ambarus@linaro.org/
- https://lore.kernel.org/linux-samsung-soc/20240307135912.163996-1-tudor.ambarus@linaro.org/
André Draszik (1):
arm64: dts: exynos: gs101: reorder pinctrl-* properties
Tudor Ambarus (4):
arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
arm64: dts: exynos: gs101: join lines close to 80 chars
arm64: dts: exynos: gs101: define all PERIC USI nodes
.../boot/dts/exynos/google/gs101-oriole.dts | 4 +-
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 791 +++++++++++++++++-
2 files changed, 780 insertions(+), 15 deletions(-)
--
2.44.0.396.g6e790dbe36-goog
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^ permalink raw reply
* [PATCH v3 3/5] arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
From: Tudor Ambarus @ 2024-03-26 15:12 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team,
Tudor Ambarus
In-Reply-To: <20240326151301.348932-1-tudor.ambarus@linaro.org>
Move the pinctrl-* properties after clocks so that we keep alphabetic
order and align with the other similar definitions.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index a1aff219208a..cfb3ddc7f885 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -393,11 +393,11 @@ hsi2c_8: i2c@10970000 {
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-0 = <&hsi2c8_bus>;
- pinctrl-names = "default";
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c8_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
@@ -473,11 +473,11 @@ hsi2c_12: i2c@10d50000 {
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
- pinctrl-0 = <&hsi2c12_bus>;
- pinctrl-names = "default";
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
clock-names = "hsi2c", "hsi2c_pclk";
+ pinctrl-0 = <&hsi2c12_bus>;
+ pinctrl-names = "default";
status = "disabled";
};
};
--
2.44.0.396.g6e790dbe36-goog
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^ permalink raw reply related
* Re: [PATCH v6 04/16] dt-bindings: net: wireless: qcom,ath11k: describe the ath11k on QCA6390
From: Kalle Valo @ 2024-03-26 15:12 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Marcel Holtmann, Luiz Augusto von Dentz, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio,
Liam Girdwood, Mark Brown, Catalin Marinas, Will Deacon,
Bjorn Helgaas, Saravana Kannan, Geert Uytterhoeven, Arnd Bergmann,
Neil Armstrong, Marek Szyprowski, Alex Elder, Srini Kandagatla,
Greg Kroah-Hartman, Abel Vesa, Manivannan Sadhasivam,
Lukas Wunner, Dmitry Baryshkov, linux-bluetooth, netdev,
devicetree, linux-kernel, linux-wireless, linux-arm-msm,
linux-arm-kernel, linux-pci, linux-pm, Bartosz Golaszewski,
ath11k, Johan Hovold
In-Reply-To: <CAMRc=MdCv+vTMZML-wzRQqZZavquV3DABYM4KYw-HwqS47sTyw@mail.gmail.com>
Bartosz Golaszewski <brgl@bgdev.pl> writes:
>> >> I don't know DT well enough to know what the "required:" above means,
>> >> but does this take into account that there are normal "plug&play" type
>> >> of QCA6390 boards as well which don't need any DT settings?
>> >
>> > Do they require a DT node though for some reason?
>>
>> You can attach the device to any PCI slot, connect the WLAN antenna and
>> it just works without DT nodes. I'm trying to make sure here that basic
>> setup still works.
>>
>
> Sure, definitely. I there's no DT node, then the binding doesn't apply
> and the driver (the platform part of it) will not probe.
>
>> Adding also Johan and ath11k list. For example, I don't know what's the
>> plan with Lenovo X13s, will it use this framework? I guess in theory we
>> could have devices which use qcom,ath11k-calibration-variant from DT but
>> not any of these supply properties?
>>
>
> Good point. I will receive the X13s in a month from now. I do plan on
> upstreaming correct support for WLAN and BT for it as well.
>
> I guess we can always relax the requirements once a valid use-case appears?
I think we have such cases already now:
$ git grep ath11k-calibration-variant -- arch
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts: qcom,ath11k-calibration-variant = "Fairphone_5";
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts: qcom,ath11k-calibration-variant = "LE_X13S";
But please do check that. I'm no DT expert :)
--
https://patchwork.kernel.org/project/linux-wireless/list/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
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* Re: [PATCH v8 8/8] perf vendor events arm64:: Add i.MX93 DDR Performance Monitor metrics
From: Frank Li @ 2024-03-26 14:57 UTC (permalink / raw)
To: Xu Yang
Cc: will, mark.rutland, robh+dt, krzysztof.kozlowski+dt, conor+dt,
shawnguo, s.hauer, kernel, festevam, john.g.garry, jolsa,
namhyung, irogers, mike.leach, peterz, mingo, acme,
alexander.shishkin, adrian.hunter, linux-arm-kernel, devicetree,
linux-kernel, linux-perf-users, imx
In-Reply-To: <20240322063930.749126-8-xu.yang_2@nxp.com>
On Fri, Mar 22, 2024 at 02:39:30PM +0800, Xu Yang wrote:
> Add JSON metrics for i.MX93 DDR Performance Monitor.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> ---
> Changes in v7:
> - new patch
> Changes in v8:
> - no changes
> ---
> .../arch/arm64/freescale/imx93/sys/ddrc.json | 9 +++++++
> .../arm64/freescale/imx93/sys/metrics.json | 26 +++++++++++++++++++
> 2 files changed, 35 insertions(+)
> create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/ddrc.json
> create mode 100644 tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/metrics.json
>
> diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/ddrc.json b/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/ddrc.json
> new file mode 100644
> index 000000000000..eeeae4d49fce
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/ddrc.json
> @@ -0,0 +1,9 @@
> +[
> + {
> + "BriefDescription": "ddr cycles event",
> + "EventCode": "0x00",
> + "EventName": "imx93_ddr.cycles",
> + "Unit": "imx9_ddr",
> + "Compat": "imx93"
> + }
> +]
> diff --git a/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/metrics.json b/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/metrics.json
> new file mode 100644
> index 000000000000..4d2454ca1259
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx93/sys/metrics.json
> @@ -0,0 +1,26 @@
> +[
> + {
> + "BriefDescription": "bandwidth usage for lpddr4x evk board",
> + "MetricName": "imx93_bandwidth_usage.lpddr4x",
> + "MetricExpr": "(((( imx9_ddr0@ddrc_pm_0@ ) * 2 * 8 ) + (( imx9_ddr0@ddrc_pm_3@ + imx9_ddr0@ddrc_pm_5@ + imx9_ddr0@ddrc_pm_7@ + imx9_ddr0@ddrc_pm_9@ - imx9_ddr0@ddrc_pm_2@ - imx9_ddr0@ddrc_pm_4@ - imx9_ddr0@ddrc_pm_6@ - imx9_ddr0@ddrc_pm_8@ ) * 32 )) / duration_time) / (3733 * 1000000 * 2)",
> + "ScaleUnit": "1e2%",
> + "Unit": "imx9_ddr",
> + "Compat": "imx93"
> + },
> + {
> + "BriefDescription": "bytes all masters read from ddr",
> + "MetricName": "imx93_ddr_read.all",
> + "MetricExpr": "( imx9_ddr0@ddrc_pm_0@ ) * 2 * 8",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx93"
> + },
> + {
> + "BriefDescription": "bytes all masters write to ddr",
> + "MetricName": "imx93_ddr_write.all",
> + "MetricExpr": "( imx9_ddr0@ddrc_pm_3@ + imx9_ddr0@ddrc_pm_5@ + imx9_ddr0@ddrc_pm_7@ + imx9_ddr0@ddrc_pm_9@ - imx9_ddr0@ddrc_pm_2@ - imx9_ddr0@ddrc_pm_4@ - imx9_ddr0@ddrc_pm_6@ - imx9_ddr0@ddrc_pm_8@ ) * 32",
> + "ScaleUnit": "9.765625e-4KB",
> + "Unit": "imx9_ddr",
> + "Compat": "imx93"
> + }
> +]
> --
> 2.34.1
>
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* [PATCH v3 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus
From: Peter Yin @ 2024-03-26 15:00 UTC (permalink / raw)
To: patrick, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240326150027.3015958-1-peteryin.openbmc@gmail.com>
Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600
Regarding the AST2600 specification, the WDTn Timeout Status Register
(WDT10) has bit 1 reserved. Bit 1 of the status register indicates
on ast2500 if the boot was from the second boot source.
It does not indicate that the most recent reset was triggered by
the watchdog. The code should just be changed to set WDIOF_CARDRESET
if bit 0 of the status register is set.
Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or
ast2500 SCU3C when bit1 is set.
Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
---
drivers/watchdog/aspeed_wdt.c | 53 ++++++++++++++++++++++++-----------
1 file changed, 37 insertions(+), 16 deletions(-)
diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
index b4773a6aaf8c..52afc5240b1c 100644
--- a/drivers/watchdog/aspeed_wdt.c
+++ b/drivers/watchdog/aspeed_wdt.c
@@ -11,10 +11,12 @@
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/kstrtox.h>
+#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <linux/watchdog.h>
static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -65,23 +67,32 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
#define WDT_RELOAD_VALUE 0x04
#define WDT_RESTART 0x08
#define WDT_CTRL 0x0C
-#define WDT_CTRL_BOOT_SECONDARY BIT(7)
-#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
-#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
-#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
-#define WDT_CTRL_1MHZ_CLK BIT(4)
-#define WDT_CTRL_WDT_EXT BIT(3)
-#define WDT_CTRL_WDT_INTR BIT(2)
-#define WDT_CTRL_RESET_SYSTEM BIT(1)
-#define WDT_CTRL_ENABLE BIT(0)
+#define WDT_CTRL_BOOT_SECONDARY BIT(7)
+#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
+#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
+#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
+#define WDT_CTRL_1MHZ_CLK BIT(4)
+#define WDT_CTRL_WDT_EXT BIT(3)
+#define WDT_CTRL_WDT_INTR BIT(2)
+#define WDT_CTRL_RESET_SYSTEM BIT(1)
+#define WDT_CTRL_ENABLE BIT(0)
#define WDT_TIMEOUT_STATUS 0x10
-#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
-#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
+#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
+#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
+#define WDT_TIMEOUT_STATUS_EVENT BIT(0)
#define WDT_CLEAR_TIMEOUT_STATUS 0x14
-#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
+#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
#define WDT_RESET_MASK1 0x1c
#define WDT_RESET_MASK2 0x20
+/*
+ * Ast2600 SCU74 bit1 is External reset flag
+ * Ast2500 SCU3C bit1 is External reset flag
+ */
+#define EXTERN_RESET_FLAG BIT(1)
+#define AST2500_SYSTEM_RESET_EVENT (0x3C)
+#define AST2600_SYSTEM_RESET_EVENT (0x74)
+
/*
* WDT_RESET_WIDTH controls the characteristics of the external pulse (if
* enabled), specifically:
@@ -458,15 +469,25 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
writel(duration - 1, wdt->base + WDT_RESET_WIDTH);
}
+ struct regmap *scu_base = syscon_regmap_lookup_by_phandle(dev->of_node,
+ "aspeed,scu");
status = readl(wdt->base + WDT_TIMEOUT_STATUS);
- if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) {
+ if (status & WDT_TIMEOUT_STATUS_EVENT)
wdt->wdd.bootstatus = WDIOF_CARDRESET;
- if (of_device_is_compatible(np, "aspeed,ast2400-wdt") ||
- of_device_is_compatible(np, "aspeed,ast2500-wdt"))
- wdt->wdd.groups = bswitch_groups;
+ if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) {
+ regmap_read(scu_base, AST2600_SYSTEM_RESET_EVENT, &status);
+ } else {
+ regmap_read(scu_base, AST2500_SYSTEM_RESET_EVENT, &status);
+ wdt->wdd.groups = bswitch_groups;
}
+ /*
+ * Reset cause by Extern Reset
+ */
+ if (status & EXTERN_RESET_FLAG)
+ wdt->wdd.bootstatus |= WDIOF_EXTERN1;
+
dev_set_drvdata(dev, wdt);
return devm_watchdog_register_device(dev, &wdt->wdd);
--
2.25.1
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^ permalink raw reply related
* [PATCH v3 3/4] dt-bindings: watchdog: aspeed-wdt: Add aspeed,scu
From: Peter Yin @ 2024-03-26 15:00 UTC (permalink / raw)
To: patrick, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240326150027.3015958-1-peteryin.openbmc@gmail.com>
To use the SCU register to obtain reset flags for supporting
bootstatus.
Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
---
Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
index 3208adb3e52e..80a1f58b5a2e 100644
--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
@@ -8,6 +8,8 @@ Required properties:
- reg: physical base address of the controller and length of memory mapped
region
+ - aspeed,scu: a reference to the System Control Unit node of the Aspeed
+ SOC.
Optional properties:
@@ -62,6 +64,7 @@ Examples:
reg = <0x1e785000 0x1c>;
aspeed,reset-type = "system";
aspeed,external-signal;
+ aspeed,scu = <&syscon>;
};
#include <dt-bindings/watchdog/aspeed-wdt.h>
@@ -70,4 +73,5 @@ Examples:
reg = <0x1e785040 0x40>;
aspeed,reset-mask = <AST2600_WDT_RESET1_DEFAULT
(AST2600_WDT_RESET2_DEFAULT & ~AST2600_WDT_RESET2_LPC)>;
+ aspeed,scu = <&syscon>;
};
--
2.25.1
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* [PATCH v3 2/4] ARM: dts: aspeed: Add the AST2600 WDT with SCU register
From: Peter Yin @ 2024-03-26 15:00 UTC (permalink / raw)
To: patrick, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240326150027.3015958-1-peteryin.openbmc@gmail.com>
The AST2600 Watchdog Timer (WDT) references
the System Control Unit (SCU) register for its operation.
Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
---
arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
index 5f640b7d6b6d..2f7788f2f153 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
@@ -558,23 +558,27 @@ uart5: serial@1e784000 {
wdt1: watchdog@1e785000 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785000 0x40>;
+ aspeed,scu = <&syscon>;
};
wdt2: watchdog@1e785040 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785040 0x40>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
wdt3: watchdog@1e785080 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e785080 0x40>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
wdt4: watchdog@1e7850c0 {
compatible = "aspeed,ast2600-wdt";
reg = <0x1e7850C0 0x40>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
--
2.25.1
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^ permalink raw reply related
* [PATCH v3 1/4] ARM: dts: aspeed: Add the AST2500 WDT with SCU register
From: Peter Yin @ 2024-03-26 15:00 UTC (permalink / raw)
To: patrick, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240326150027.3015958-1-peteryin.openbmc@gmail.com>
The AST2500 WDT references the System Control Unit
register for its operation.
Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
---
arch/arm/boot/dts/aspeed/aspeed-g5.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi
index 04f98d1dbb97..5fd12c057c31 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi
@@ -410,12 +410,14 @@ wdt1: watchdog@1e785000 {
compatible = "aspeed,ast2500-wdt";
reg = <0x1e785000 0x20>;
clocks = <&syscon ASPEED_CLK_APB>;
+ aspeed,scu = <&syscon>;
};
wdt2: watchdog@1e785020 {
compatible = "aspeed,ast2500-wdt";
reg = <0x1e785020 0x20>;
clocks = <&syscon ASPEED_CLK_APB>;
+ aspeed,scu = <&syscon>;
};
wdt3: watchdog@1e785040 {
@@ -423,6 +425,7 @@ wdt3: watchdog@1e785040 {
reg = <0x1e785040 0x20>;
clocks = <&syscon ASPEED_CLK_APB>;
status = "disabled";
+ aspeed,scu = <&syscon>;
};
pwm_tacho: pwm-tacho-controller@1e786000 {
--
2.25.1
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