* Re: [PATCH net v2 2/2] net: dsa: mt7530: fix disabling EEE on failure on MT7531 and MT7988
From: Russell King (Oracle) @ 2024-03-27 15:59 UTC (permalink / raw)
To: arinc.unal
Cc: Paolo Abeni, Daniel Golle, DENG Qingfang, Sean Wang, Andrew Lunn,
Florian Fainelli, Vladimir Oltean, David S. Miller, Eric Dumazet,
Jakub Kicinski, Matthias Brugger, AngeloGioacchino Del Regno,
René van Dorst, SkyLake Huang, Heiner Kallweit,
Bartel Eerdekens, mithat.guner, erkin.bozoglu, netdev,
linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <ZgRCFZBFvNSZ1a2U@shell.armlinux.org.uk>
On Wed, Mar 27, 2024 at 03:58:13PM +0000, Russell King (Oracle) wrote:
> On Wed, Mar 27, 2024 at 11:46:19AM +0300, arinc.unal@arinc9.com wrote:
> > On 26.03.2024 12:19, Arınç ÜNAL wrote:
> > > On 26.03.2024 12:02, Paolo Abeni wrote:
> > > > If I read the past discussion correctly, this is a potential issue
> > > > found by code inspection and never producing problem in practice, am I
> > > > correct?
> > > >
> > > > If so I think it will deserve a 3rd party tested-by tag or similar to
> > > > go in.
> > > >
> > > > If nobody could provide such feedback in a little time, I suggest to
> > > > drop this patch and apply only 1/2.
> > >
> > > Whether a problem would happen in practice depends on when
> > > phy_init_eee()
> > > fails, meaning it returns a negative non-zero code. I requested Russell
> > > to
> > > review this patch to shed light on when phy_init_eee() would return a
> > > negative non-zero code so we have an idea whether this patch actually
> > > fixes
> > > a problem.
> >
> > I don't suppose Russell is going to review the patch at this point. I will
> > submit this to net-next then. If someone actually reports a problem in
> > practice, I can always submit it to the stable trees.
>
> So the fact that I only saw your request this morning to look at
> phy_init_eee(), and to review this patch... because... I work for
> Oracle, and I've been looking at backporting Arm64 KVM patches to
> our kernel, been testing and debugging that effort... and the
> act that less than 24 hours had passed since you made the original
> request... yea, sorry, it's clearly my fault for not jumping on this
> the moment you sent the email.
>
> I get _so_ much email that incorrectly has me in the To: header. I
> also get _so_ much email that fails to list me in the To: header
> when the author wants me to respond. I don't have time to read every
> email as it comes in. I certainly don't have time to read every
> email in any case. I do the best I can, which varies considerably
> with my workload.
>
> I already find that being single, fitting everything in during the
> day (paid work, chores, feeding oneself) is quite a mammoth task.
> There is no one else to do the laundry. There is no one else to get
> the shopping. There is no one else to do the washing up. There is no
> one else to take the rubbish out. All this I do myself, and serially
> because there is only one of me, and it all takes time away from
> sitting here reading every damn email as it comes in.
>
> And then when I end up doing something that _you_ very well could do
> (reading the phy_init_eee() code to find out when it might return a
> negative number) and then you send an email like this... yea... that
> really gets my goat.
... and now I have a 1:1 with my manager for the next 30-60 minutes.
Is it okay by you for me to be offline for that period of time while
I have a chat with him?
--
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^ permalink raw reply
* Re: [PATCH net v2 2/2] net: dsa: mt7530: fix disabling EEE on failure on MT7531 and MT7988
From: Russell King (Oracle) @ 2024-03-27 15:58 UTC (permalink / raw)
To: arinc.unal
Cc: Paolo Abeni, Daniel Golle, DENG Qingfang, Sean Wang, Andrew Lunn,
Florian Fainelli, Vladimir Oltean, David S. Miller, Eric Dumazet,
Jakub Kicinski, Matthias Brugger, AngeloGioacchino Del Regno,
René van Dorst, SkyLake Huang, Heiner Kallweit,
Bartel Eerdekens, mithat.guner, erkin.bozoglu, netdev,
linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <530da7c1-c058-44ef-84fd-86ff58f1501b@arinc9.com>
On Wed, Mar 27, 2024 at 11:46:19AM +0300, arinc.unal@arinc9.com wrote:
> On 26.03.2024 12:19, Arınç ÜNAL wrote:
> > On 26.03.2024 12:02, Paolo Abeni wrote:
> > > If I read the past discussion correctly, this is a potential issue
> > > found by code inspection and never producing problem in practice, am I
> > > correct?
> > >
> > > If so I think it will deserve a 3rd party tested-by tag or similar to
> > > go in.
> > >
> > > If nobody could provide such feedback in a little time, I suggest to
> > > drop this patch and apply only 1/2.
> >
> > Whether a problem would happen in practice depends on when
> > phy_init_eee()
> > fails, meaning it returns a negative non-zero code. I requested Russell
> > to
> > review this patch to shed light on when phy_init_eee() would return a
> > negative non-zero code so we have an idea whether this patch actually
> > fixes
> > a problem.
>
> I don't suppose Russell is going to review the patch at this point. I will
> submit this to net-next then. If someone actually reports a problem in
> practice, I can always submit it to the stable trees.
So the fact that I only saw your request this morning to look at
phy_init_eee(), and to review this patch... because... I work for
Oracle, and I've been looking at backporting Arm64 KVM patches to
our kernel, been testing and debugging that effort... and the
act that less than 24 hours had passed since you made the original
request... yea, sorry, it's clearly my fault for not jumping on this
the moment you sent the email.
I get _so_ much email that incorrectly has me in the To: header. I
also get _so_ much email that fails to list me in the To: header
when the author wants me to respond. I don't have time to read every
email as it comes in. I certainly don't have time to read every
email in any case. I do the best I can, which varies considerably
with my workload.
I already find that being single, fitting everything in during the
day (paid work, chores, feeding oneself) is quite a mammoth task.
There is no one else to do the laundry. There is no one else to get
the shopping. There is no one else to do the washing up. There is no
one else to take the rubbish out. All this I do myself, and serially
because there is only one of me, and it all takes time away from
sitting here reading every damn email as it comes in.
And then when I end up doing something that _you_ very well could do
(reading the phy_init_eee() code to find out when it might return a
negative number) and then you send an email like this... yea... that
really gets my goat.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
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^ permalink raw reply
* Re: [PATCH v1 0/3] Speed up boot with faster linear map creation
From: Ard Biesheuvel @ 2024-03-27 15:57 UTC (permalink / raw)
To: Ryan Roberts
Cc: Catalin Marinas, Will Deacon, Mark Rutland, David Hildenbrand,
Donald Dutile, Eric Chanudet, linux-arm-kernel, linux-kernel
In-Reply-To: <7f69758c-b849-48ca-b279-569469183e91@arm.com>
On Wed, 27 Mar 2024 at 17:01, Ryan Roberts <ryan.roberts@arm.com> wrote:
>
> On 27/03/2024 13:36, Ard Biesheuvel wrote:
> > On Wed, 27 Mar 2024 at 12:43, Ryan Roberts <ryan.roberts@arm.com> wrote:
> >>
> >> On 27/03/2024 10:09, Ard Biesheuvel wrote:
...
> >
> > I think a mix of the fixmap approach with a 1:1 map could work here:
> > - use TTBR0 to create a temp 1:1 map of DRAM
> > - map page tables lazily as they are allocated but using a coarse mapping
> > - avoid all TLB maintenance except at the end when tearing down the 1:1 mapping.
>
> Yes that could work I think. So to make sure I've understood:
>
> - create a 1:1 map for all of DRAM using block and cont mappings where possible
> - use memblock_phys_alloc_*() to allocate pgtable memory
> - access via fixmap (should be minimal due to block mappings)
Yes but you'd only need the fixmap for pages that are not in the 1:1
map yet, so after an initial ramp up you wouldn't need it at all,
assuming locality of memblock allocations and the use of PMD mappings.
The only tricky thing here is ensuring that we are not mapping memory
that we shouldn't be touching.
> - install it in TTBR0
> - create all the swapper mappings as normal (no block or cont mappings)
> - use memblock_phys_alloc_*() to alloc pgtable memory
> - phys address is also virtual address due to installed 1:1 map
> - Remove 1:1 map from TTBR0
> - memblock_phys_free() all the memory associated with 1:1 map
>
Indeed.
> That sounds doable on top of the first 2 patches in this series - I'll have a
> crack. The only missing piece is depth-first 1:1 map traversal to free the
> tables. I'm guessing something already exists that I can repurpose?
>
Not that I am aware of, but that doesn't sound too complicated.
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^ permalink raw reply
* Re: [PATCH net v2 2/2] net: dsa: mt7530: fix disabling EEE on failure on MT7531 and MT7988
From: Russell King (Oracle) @ 2024-03-27 15:50 UTC (permalink / raw)
To: Arınç ÜNAL
Cc: Paolo Abeni, Daniel Golle, DENG Qingfang, Sean Wang, Andrew Lunn,
Florian Fainelli, Vladimir Oltean, David S. Miller, Eric Dumazet,
Jakub Kicinski, Matthias Brugger, AngeloGioacchino Del Regno,
René van Dorst, SkyLake Huang, Heiner Kallweit,
Bartel Eerdekens, mithat.guner, erkin.bozoglu, netdev,
linux-kernel, linux-arm-kernel, linux-mediatek
In-Reply-To: <d65f4c45-e616-4157-a769-c285cbad575c@arinc9.com>
On Tue, Mar 26, 2024 at 12:19:40PM +0300, Arınç ÜNAL wrote:
> On 26.03.2024 12:02, Paolo Abeni wrote:
> > On Thu, 2024-03-21 at 19:29 +0300, Arınç ÜNAL via B4 Relay wrote:
> > > From: Arınç ÜNAL <arinc.unal@arinc9.com>
> > >
> > > The MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 bits let the
> > > PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits determine the 1G/100 EEE
> > > abilities of the MAC. If MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 are
> > > unset, the abilities are left to be determined by PHY auto polling.
> > >
> > > The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
> > > made it so that the PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits are set on
> > > mt753x_phylink_mac_link_up(). But it did not set the MT7531_FORCE_EEE1G and
> > > MT7531_FORCE_EEE100 bits. Because of this, EEE will be enabled on the
> > > switch MACs by polling the PHY, regardless of the result of phy_init_eee().
> > >
> > > Define these bits and add them to MT7531_FORCE_MODE which is being used by
> > > the subdriver. With this, EEE will be prevented from being enabled on the
> > > switch MACs when phy_init_eee() fails.
> > >
> > > Fixes: 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
> > > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> >
> > If I read the past discussion correctly, this is a potential issue
> > found by code inspection and never producing problem in practice, am I
> > correct?
> >
> > If so I think it will deserve a 3rd party tested-by tag or similar to
> > go in.
> >
> > If nobody could provide such feedback in a little time, I suggest to
> > drop this patch and apply only 1/2.
>
> Whether a problem would happen in practice depends on when phy_init_eee()
> fails, meaning it returns a negative non-zero code. I requested Russell to
> review this patch to shed light on when phy_init_eee() would return a
> negative non-zero code so we have an idea whether this patch actually fixes
> a problem.
Urgh, so I need to read the code and report back?
Well, looking at phy_init_eee(), it could return a negative vallue when:
1. phydev->drv is NULL
2. if genphy_c45_eee_is_active() returns negative
3. if genphy_c45_eee_is_active() returns zero, it returns
-EPROTONOSUPPORT
4. if phy_set_bits_mmd() fails (e.g. communication error with the PHY)
If we then look at genphy_c45_eee_is_active(), then:
genphy_c45_read_eee_adv() and genphy_c45_read_eee_lpa() propagate their
non-zero return values, otherwise this function returns zero or positive
integer.
If we then look at genphy_c45_read_eee_adv(), then a failure of
phy_read_mmd() would cause a negative value to be returned.
Looking at genphy_c45_read_eee_lpa(), the same is true.
So, it can be summarised as:
- phydev->drv is NULL
- there is a communication error accessing the PHY
- EEE is not active
otherwise, it returns zero on success.
If one wishes to determine whether an error occurred vs EEE not being
supported through negotiation for the negotiated speed, if it returns
-EPROTONOSUPPORT in the latter case. Other error codes mean either the
driver has been unloaded or communication error.
This has been expertly determined by reading the code, which only a
phylib maintainer has the capability of doing. Thank you for using this
service.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
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^ permalink raw reply
* Re: [PATCH v4 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus
From: Guenter Roeck @ 2024-03-27 15:47 UTC (permalink / raw)
To: Peter Yin, patrick, Wim Van Sebroeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Joel Stanley, Andrew Jeffery,
linux-watchdog, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <20240327085330.3281697-5-peteryin.openbmc@gmail.com>
On 3/27/24 01:53, Peter Yin wrote:
> Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600
>
> Regarding the AST2600 specification, the WDTn Timeout Status Register
> (WDT10) has bit 1 reserved. Bit 1 of the status register indicates
> on ast2500 if the boot was from the second boot source.
> It does not indicate that the most recent reset was triggered by
> the watchdog. The code should just be changed to set WDIOF_CARDRESET
> if bit 0 of the status register is set.
>
> Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or
> ast2500 SCU3C when bit1 is set.
>
> Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
> ---
> drivers/watchdog/aspeed_wdt.c | 60 +++++++++++++++++++++++++----------
> 1 file changed, 44 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> index b4773a6aaf8c..29e9afdee619 100644
> --- a/drivers/watchdog/aspeed_wdt.c
> +++ b/drivers/watchdog/aspeed_wdt.c
> @@ -11,10 +11,12 @@
> #include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/kstrtox.h>
> +#include <linux/mfd/syscon.h>
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_irq.h>
> #include <linux/platform_device.h>
> +#include <linux/regmap.h>
> #include <linux/watchdog.h>
>
> static bool nowayout = WATCHDOG_NOWAYOUT;
> @@ -65,23 +67,32 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
> #define WDT_RELOAD_VALUE 0x04
> #define WDT_RESTART 0x08
> #define WDT_CTRL 0x0C
> -#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> -#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> -#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> -#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> -#define WDT_CTRL_1MHZ_CLK BIT(4)
> -#define WDT_CTRL_WDT_EXT BIT(3)
> -#define WDT_CTRL_WDT_INTR BIT(2)
> -#define WDT_CTRL_RESET_SYSTEM BIT(1)
> -#define WDT_CTRL_ENABLE BIT(0)
> +#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> +#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> +#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> +#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> +#define WDT_CTRL_1MHZ_CLK BIT(4)
> +#define WDT_CTRL_WDT_EXT BIT(3)
> +#define WDT_CTRL_WDT_INTR BIT(2)
> +#define WDT_CTRL_RESET_SYSTEM BIT(1)
> +#define WDT_CTRL_ENABLE BIT(0)
> #define WDT_TIMEOUT_STATUS 0x10
> -#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> -#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> +#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> +#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> +#define WDT_TIMEOUT_STATUS_EVENT BIT(0)
> #define WDT_CLEAR_TIMEOUT_STATUS 0x14
> -#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> +#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> #define WDT_RESET_MASK1 0x1c
> #define WDT_RESET_MASK2 0x20
>
The above bit value defines were indented to show what is
registers and what is register bit values. Why are you
changing that other than for personal preference ?
Guenter
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^ permalink raw reply
* Re: [PATCH RFC 0/3] mm/gup: consistently call it GUP-fast
From: David Hildenbrand @ 2024-03-27 15:47 UTC (permalink / raw)
To: Ryan Roberts, Peter Xu
Cc: linux-kernel, Andrew Morton, Mike Rapoport, Jason Gunthorpe,
John Hubbard, linux-arm-kernel, loongarch, linux-mips,
linuxppc-dev, linux-s390, linux-sh, linux-mm, linux-perf-users,
linux-fsdevel, x86, Arnd Bergmann
In-Reply-To: <8727a618-30c4-4a13-b0e9-eccc3fd67c73@arm.com>
On 27.03.24 16:46, Ryan Roberts wrote:
>>
>> Some of them look like mm-unstable issue, For example, arm64 fails with
>>
>> CC arch/arm64/mm/extable.o
>> In file included from ./include/linux/hugetlb.h:828,
>> from security/commoncap.c:19:
>> ./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of
>> 'arch_clear_hugetlb_flags'
>> 25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> ./include/linux/hugetlb.h:840:20: note: in expansion of macro
>> 'arch_clear_hugetlb_flags'
>> 840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> ./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of
>> 'arch_clear_hugetlb_flags' with t
>> ype 'void(struct folio *)'
>> 21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> In file included from ./include/linux/hugetlb.h:828,
>> from mm/filemap.c:37:
>> ./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of
>> 'arch_clear_hugetlb_flags'
>> 25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> ./include/linux/hugetlb.h:840:20: note: in expansion of macro
>> 'arch_clear_hugetlb_flags'
>> 840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> ./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of
>> 'arch_clear_hugetlb_flags' with type 'void(struct folio *)'
>> 21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
>
> see: https://lore.kernel.org/linux-mm/ZgQvNKGdlDkwhQEX@casper.infradead.org/
>
Yes, besides the other failures I see (odd targets), I was expecting
that someone else noticed that already :) thanks!
--
Cheers,
David / dhildenb
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^ permalink raw reply
* Re: [PATCH RFC 0/3] mm/gup: consistently call it GUP-fast
From: Ryan Roberts @ 2024-03-27 15:46 UTC (permalink / raw)
To: David Hildenbrand, Peter Xu
Cc: linux-kernel, Andrew Morton, Mike Rapoport, Jason Gunthorpe,
John Hubbard, linux-arm-kernel, loongarch, linux-mips,
linuxppc-dev, linux-s390, linux-sh, linux-mm, linux-perf-users,
linux-fsdevel, x86, Arnd Bergmann
In-Reply-To: <3922460a-4d01-4ecb-b8c5-7c57fd46f3fd@redhat.com>
>
> Some of them look like mm-unstable issue, For example, arm64 fails with
>
> CC arch/arm64/mm/extable.o
> In file included from ./include/linux/hugetlb.h:828,
> from security/commoncap.c:19:
> ./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of
> 'arch_clear_hugetlb_flags'
> 25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> ./include/linux/hugetlb.h:840:20: note: in expansion of macro
> 'arch_clear_hugetlb_flags'
> 840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> ./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of
> 'arch_clear_hugetlb_flags' with t
> ype 'void(struct folio *)'
> 21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> In file included from ./include/linux/hugetlb.h:828,
> from mm/filemap.c:37:
> ./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of
> 'arch_clear_hugetlb_flags'
> 25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> ./include/linux/hugetlb.h:840:20: note: in expansion of macro
> 'arch_clear_hugetlb_flags'
> 840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
> | ^~~~~~~~~~~~~~~~~~~~~~~~
> ./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of
> 'arch_clear_hugetlb_flags' with type 'void(struct folio *)'
> 21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
see: https://lore.kernel.org/linux-mm/ZgQvNKGdlDkwhQEX@casper.infradead.org/
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^ permalink raw reply
* Re: [PATCH 1/2] arm64: dts: rockchip: enable gpu on rk3588-jaguar
From: Rob Herring @ 2024-03-27 15:41 UTC (permalink / raw)
To: Heiko Stuebner
Cc: Heiko Stuebner, linux-rockchip, quentin.schulz, linux-arm-kernel
In-Reply-To: <20240327112120.1181570-1-heiko@sntech.de>
On Wed, 27 Mar 2024 12:21:19 +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
>
> Enable the mali gpu node and add the board-specific supply-regulator.
>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
> arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
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New warnings running 'make CHECK_DTBS=y rockchip/rk3588-jaguar.dtb' for 20240327112120.1181570-1-heiko@sntech.de:
Error: arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts:248.1-5 Label or path gpu not found
FATAL ERROR: Syntax error parsing input tree
make[3]: *** [scripts/Makefile.lib:427: arch/arm64/boot/dts/rockchip/rk3588-jaguar.dtb] Error 1
make[2]: *** [scripts/Makefile.build:485: arch/arm64/boot/dts/rockchip] Error 2
make[2]: Target 'arch/arm64/boot/dts/rockchip/rk3588-jaguar.dtb' not remade because of errors.
make[1]: *** [/home/rob/proj/linux-dt-testing/Makefile:1387: rockchip/rk3588-jaguar.dtb] Error 2
make: *** [Makefile:240: __sub-make] Error 2
make: Target 'rockchip/rk3588-jaguar.dtb' not remade because of errors.
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* Re: [PATCH 0/7] regulator: mcp16502: Update the names from buck regulators
From: Rob Herring @ 2024-03-27 15:41 UTC (permalink / raw)
To: Mihai Sain
Cc: conor+dt, devicetree, alexandre.belloni, lgirdwood, linux-kernel,
broonie, krzysztof.kozlowski+dt, claudiu.beznea, andrei.simion,
linux-arm-kernel
In-Reply-To: <20240327101724.2982-1-mihai.sain@microchip.com>
On Wed, 27 Mar 2024 12:17:17 +0200, Mihai Sain wrote:
> Use generic names for buck regulators to avoid any confusion.
> Update the names from buck regulators in order to match
> the datasheet block diagram for the buck regulators.
> Using BUCK1-4 as node names is consistent with the node naming rules.
>
> Link: https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP16502-Data-Sheet-DS20006275.pdf
>
> Mihai Sain (7):
> ARM: dts: microchip: sama5d27_wlsom1: Update the node names from pmic-regulators
> ARM: dts: microchip: sama5d29_curiosity: Update the node names from pmic-regulators
> ARM: dts: microchip: sama5d2_icp: Update the node names from pmic-regulators
> ARM: dts: microchip: sama7g54_curiosity: Update the node names from pmic-regulators
> ARM: dts: microchip: sama7g5ek: Update the node names from pmic-regulators
> regulator: dt-bindings: microchip,mcp16502: Update the node names from buck regulators
> regulator: mcp16502: Update the names from buck regulators
>
> .../bindings/regulator/microchip,mcp16502.yaml | 10 +++++-----
> arch/arm/boot/dts/microchip/at91-sama5d27_wlsom1.dtsi | 8 ++++----
> .../arm/boot/dts/microchip/at91-sama5d29_curiosity.dts | 8 ++++----
> arch/arm/boot/dts/microchip/at91-sama5d2_icp.dts | 8 ++++----
> .../arm/boot/dts/microchip/at91-sama7g54_curiosity.dts | 8 ++++----
> arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 8 ++++----
> drivers/regulator/mcp16502.c | 8 ++++----
> 7 files changed, 29 insertions(+), 29 deletions(-)
>
> --
> 2.44.0
>
>
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y microchip/at91-sama5d29_curiosity.dtb microchip/at91-sama5d2_icp.dtb microchip/at91-sama7g54_curiosity.dtb microchip/at91-sama7g5ek.dtb' for 20240327101724.2982-1-mihai.sain@microchip.com:
arch/arm/boot/dts/microchip/at91-sama5d29_curiosity.dtb: ahb: apb: {'compatible': ['simple-bus'], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': True, 'hlcdc@f0000000': {'compatible': ['atmel,sama5d2-hlcdc'], 'reg': [[4026531840, 8192]], 'interrupts': [[45, 4, 0]], 'clocks': [[3, 2, 45], [3, 1, 3], [16]], 'clock-names': ['periph_clk', 'sys_clk', 'slow_clk'], 'status': ['disabled'], 'phandle': [[52]], 'hlcdc-display-controller': {'compatible': ['atmel,hlcdc-display-controller'], '#address-cells': [[1]], '#size-cells': [[0]], 'port@0': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]]}}, 'hlcdc-pwm': {'compatible': ['atmel,hlcdc-pwm'], '#pwm-cells': [[3]], 'phandle': [[53]]}}, 'isc@f0008000': {'compatible': ['atmel,sama5d2-isc'], 'reg': [[4026564608, 16384]], 'interrupts': [[46, 4, 5]], 'clocks': [[3, 2, 46], [3, 1, 18], [3, 3, 46]], 'clock-names': ['hclock', 'iscck', 'gck'], '#clock-cells': [[0]], 'clock-output-names': ['isc-mck'], 'status': ['disabled'], 'phandle
': [[54]]}, 'ramc@f000c000': {'compatible': ['atmel,sama5d3-ddramc'], 'reg': [[4026580992, 512]], 'clocks': [[3, 1, 2], [3, 2, 13]], 'clock-names': ['ddrck', 'mpddr'], 'phandle': [[55]]}, 'dma-controller@f0010000': {'compatible': ['atmel,sama5d4-dma'], 'reg': [[4026597376, 4096]], 'interrupts': [[6, 4, 0]], '#dma-cells': [[1]], 'clocks': [[3, 2, 6]], 'clock-names': ['dma_clk'], 'phandle': [[19]]}, 'dma-controller@f0004000': {'compatible': ['atmel,sama5d4-dma'], 'reg': [[4026548224, 4096]], 'interrupts': [[7, 4, 0]], '#dma-cells': [[1]], 'clocks': [[3, 2, 7]], 'clock-names': ['dma_clk'], 'phandle': [[31]]}, 'clock-controller@f0014000': {'compatible': ['atmel,sama5d2-pmc', 'syscon'], 'reg': [[4026613760, 352]], 'interrupts': [[74, 4, 7]], '#clock-cells': [[2]], 'clocks': [[16], [17]], 'clock-names': ['slow_clk', 'main_xtal'], 'phandle': [[3]]}, 'spi@f0020000': {'compatible': ['atmel,sama5d2-qspi'], 'reg': [[4026662912, 256], [3489660928, 134217728]], 'reg-names': ['qspi_base', 'qspi_m
map'], 'interrupts': [[52, 4, 7]], 'clocks': [[3, 2, 52]], 'clock-names': ['pclk'], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['disabled'], 'phandle': [[56]]}, 'spi@f0024000': {'compatible': ['atmel,sama5d2-qspi'], 'reg': [[4026679296, 256], [3623878656, 134217728]], 'reg-names': ['qspi_base', 'qspi_mmap'], 'interrupts': [[53, 4, 7]], 'clocks': [[3, 2, 53]], 'clock-names': ['pclk'], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[18]], 'phandle': [[57]], 'flash@0': {'#address-cells': [[1]], '#size-cells': [[1]], 'compatible': ['jedec,spi-nor'], 'reg': [[0]], 'spi-max-frequency': [[80000000]], 'spi-tx-bus-width': [[4]], 'spi-rx-bus-width': [[4]], 'm25p,fast-read': True, 'label': ['atmel_qspi1'], 'status': ['okay'], 'at91bootstrap@0': {'label': ['at91bootstrap'], 'reg': [[0, 262144]]}, 'bootloader@40000': {'label': ['bootloader'], 'reg': [[262144, 786432]]}, 'bootloaderenvred@100000': {'label': ['bootloader
env redundant'], 'reg': [[1048576, 262144]]}, 'bootloaderenv@140000': {'label': ['bootloader env'], 'reg': [[1310720, 262144]]}, 'dtb@180000': {'label': ['device tree'], 'reg': [[1572864, 524288]]}, 'kernel@200000': {'label': ['kernel'], 'reg': [[2097152, 6291456]]}}}, 'crypto@f0028000': {'compatible': ['atmel,at91sam9g46-sha'], 'reg': [[4026695680, 256]], 'interrupts': [[12, 4, 0]], 'dmas': [[19, 503332864]], 'dma-names': ['tx'], 'clocks': [[3, 2, 12]], 'clock-names': ['sha_clk'], 'phandle': [[58]]}, 'crypto@f002c000': {'compatible': ['atmel,at91sam9g46-aes'], 'reg': [[4026712064, 256]], 'interrupts': [[9, 4, 0]], 'dmas': [[19, 436224000], [19, 453001216]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 9]], 'clock-names': ['aes_clk'], 'phandle': [[59]]}, 'spi@f8000000': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[4160749568, 256]], 'interrupts': [[33, 4, 7]], 'dmas': [[19, 100679680], [19, 117456896]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 33]], 'clock-names': ['spi_cl
k'], 'atmel,fifo-size': [[16]], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['disabled'], 'phandle': [[60]]}, 'ssc@f8004000': {'compatible': ['atmel,at91sam9g45-ssc'], 'reg': [[4160765952, 16384]], 'interrupts': [[43, 4, 4]], 'dmas': [[19, 352337920], [19, 369115136]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 43]], 'clock-names': ['pclk'], 'status': ['disabled'], 'phandle': [[61]]}, 'ethernet@f8008000': {'compatible': ['atmel,sama5d29-gem'], 'reg': [[4160782336, 4096]], 'interrupts': [[5, 4, 3], [66, 4, 3], [67, 4, 3]], 'clocks': [[3, 2, 5], [3, 2, 5]], 'clock-names': ['hclk', 'pclk'], 'status': ['disabled'], 'phandle': [[62]]}, 'timer@f800c000': {'compatible': ['atmel,sama5d2-tcb', 'simple-mfd', 'syscon'], '#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[4160798720, 256]], 'interrupts': [[35, 4, 0]], 'clocks': [[3, 2, 35], [3, 3, 35], [16]], 'clock-names': ['t0_clk', 'gclk', 'slow_clk'], 'phandle': [[63]], 'timer@0': {'compatible': ['atmel,tcb-timer'], 'reg'
: [[0]], 'phandle': [[64]]}, 'timer@1': {'compatible': ['atmel,tcb-timer'], 'reg': [[1]], 'phandle': [[65]]}}, 'timer@f8010000': {'compatible': ['atmel,sama5d2-tcb', 'simple-mfd', 'syscon'], '#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[4160815104, 256]], 'interrupts': [[36, 4, 0]], 'clocks': [[3, 2, 36], [3, 3, 36], [16]], 'clock-names': ['t0_clk', 'gclk', 'slow_clk'], 'phandle': [[66]]}, 'hsmc@f8014000': {'compatible': ['atmel,sama5d2-smc', 'syscon', 'simple-mfd'], 'reg': [[4160831488, 4096]], 'interrupts': [[17, 4, 6]], 'clocks': [[3, 2, 17]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': True, 'phandle': [[10]], 'ecc-engine@f8014070': {'compatible': ['atmel,sama5d2-pmecc'], 'reg': [[4160831600, 1168], [4160832768, 512]], 'phandle': [[13]]}}, 'pdmic@f8018000': {'compatible': ['atmel,sama5d2-pdmic'], 'reg': [[4160847872, 292]], 'interrupts': [[48, 4, 7]], 'dmas': [[19, 838877184]], 'dma-names': ['rx'], 'clocks': [[3, 2, 48], [3, 3, 48]], 'clock-names': ['pclk'
, 'gclk'], 'status': ['disabled'], 'phandle': [[67]]}, 'serial@f801c000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160864256, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[24, 4, 7]], 'dmas': [[19, 587218944], [19, 603996160]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 24]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[20]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[68]]}, 'serial@f8020000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160880640, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[25, 4, 7]], 'dmas': [[19, 620773376], [19, 637550592]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 25]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[21]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[69]]}, 'serial@f8024000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160897024, 256]], 'atmel,usart-mode': [[0]], 'int
errupts': [[26, 4, 7]], 'dmas': [[19, 654327808], [19, 671105024]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 26]], 'clock-names': ['usart'], 'status': ['disabled'], 'phandle': [[70]]}, 'i2c@f8028000': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[4160913408, 256]], 'interrupts': [[29, 4, 7]], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 29]], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pinctrl-names': ['default', 'gpio'], 'pinctrl-0': [[22]], 'pinctrl-1': [[23]], 'sda-gpios': [[7, 63, 0]], 'scl-gpios': [[7, 64, 6]], 'i2c-sda-hold-time-ns': [[350]], 'phandle': [[71]], 'mcp16502@5b': {'compatible': ['microchip,mcp16502'], 'reg': [[91]], 'status': ['okay'], 'lpm-gpios': [[24, 0, 1]], 'regulators': {'BUCK1': {'regulator-name': ['VDD_IO'], 'regulator-min-microvolt': [[3300000]], 'regulator-max-microvolt': [[3300000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': Tru
e, 'phandle': [[37]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-off-in-suspend': True, 'regulator-mode': [[4]]}}, 'BUCK2': {'regulator-name': ['VDD_DDR'], 'regulator-min-microvolt': [[1200000]], 'regulator-max-microvolt': [[1200000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'phandle': [[72]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-suspend-microvolt': [[1200000]], 'regulator-changeable-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-on-in-suspend': True, 'regulator-suspend-microvolt': [[1200000]], 'regulator-changeable-in-suspend': True, 'regulator-mode': [[4]]}}, 'BUCK3': {'regulator-name': ['VDD_CORE'], 'regulator-min-microvolt': [[1250000]], 'regulator-max-microvolt': [[1250000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'p
handle': [[73]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-off-in-suspend': True, 'regulator-mode': [[4]]}}, 'BUCK4': {'regulator-name': ['VDD_OTHER'], 'regulator-min-microvolt': [[1800000]], 'regulator-max-microvolt': [[1800000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'phandle': [[74]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-suspend-microvolt': [[1800000]], 'regulator-changeable-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-on-in-suspend': True, 'regulator-suspend-microvolt': [[1800000]], 'regulator-changeable-in-suspend': True, 'regulator-mode': [[4]]}}, 'LDO1': {'regulator-name': ['LDO1'], 'regulator-min-microvolt': [[2500000]], 'regulator-max-microvolt': [[2500000]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True}, 'regulator-state-m
em': {'regulator-off-in-suspend': True}}, 'LDO2': {'regulator-name': ['LDO2'], 'regulator-min-microvolt': [[3300000]], 'regulator-max-microvolt': [[3300000]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True}, 'regulator-state-mem': {'regulator-off-in-suspend': True}}}}}, 'pwm@f802c000': {'compatible': ['atmel,sama5d2-pwm'], 'reg': [[4160929792, 16384]], 'interrupts': [[38, 4, 7]], '#pwm-cells': [[3]], 'clocks': [[3, 2, 38]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[25, 26]], 'phandle': [[75]]}, 'sfr@f8030000': {'compatible': ['atmel,sama5d2-sfr', 'syscon'], 'reg': [[4160946176, 152]], 'phandle': [[76]]}, 'flexcom@f8034000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4160962560, 512]], 'clocks': [[3, 2, 19]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4160962560, 2048]], 'status': ['disabled'], 'phandle': [[77]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'a
tmel,usart-mode': [[0]], 'interrupts': [[19, 4, 7]], 'clocks': [[3, 2, 19]], 'clock-names': ['usart'], 'dmas': [[19, 184565760], [19, 201342976]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[78]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[19, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 19]], 'clock-names': ['spi_clk'], 'dmas': [[19, 184565760], [19, 201342976]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[79]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[19, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 19]], 'dmas': [[19, 184565760], [19, 201342976]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[80]]}}, 'flexcom@f8038000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4160978944, 512]], 'clock
s': [[3, 2, 20]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4160978944, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[1]], 'phandle': [[81]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[20, 4, 7]], 'clocks': [[3, 2, 20]], 'clock-names': ['usart'], 'dmas': [[19, 218120192], [19, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['okay'], 'pinctrl-0': [[27]], 'pinctrl-names': ['default'], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[82]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[20, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 20]], 'clock-names': ['spi_clk'], 'dmas': [[19, 218120192], [19, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[83]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[153
6, 512]], 'interrupts': [[20, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 20]], 'dmas': [[19, 218120192], [19, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[84]]}}, 'sram@f8044000': {'compatible': ['atmel,sama5d2-securam', 'mmio-sram'], 'reg': [[4161028096, 5152]], 'clocks': [[3, 2, 51]], '#address-cells': [[1]], '#size-cells': [[1]], 'no-memory-wc': True, 'ranges': [[0, 4161028096, 5152]], 'phandle': [[85]]}, 'reset-controller@f8048000': {'compatible': ['atmel,sama5d3-rstc'], 'reg': [[4161044480, 16]], 'clocks': [[16]], 'phandle': [[86]]}, 'poweroff@f8048010': {'compatible': ['atmel,sama5d2-shdwc'], 'reg': [[4161044496, 16]], 'clocks': [[16]], '#address-cells': [[1]], '#size-cells': [[0]], 'atmel,wakeup-rtc-timer': True, 'debounce-delay-us': [[976]], 'phandle': [[87]], 'input@0': {'reg': [[0]]}}, 'timer@f8048030': {'compatible': ['atmel,at91sam9260-pit'], 'reg': [[4161044528, 16]], 'interrupts':
[[3, 4, 5]], 'clocks': [[3, 0, 4]], 'phandle': [[88]]}, 'watchdog@f8048040': {'compatible': ['atmel,sama5d4-wdt'], 'reg': [[4161044544, 16]], 'interrupts': [[4, 4, 7]], 'clocks': [[16]], 'status': ['okay'], 'phandle': [[89]]}, 'clock-controller@f8048050': {'compatible': ['atmel,sama5d4-sckc'], 'reg': [[4161044560, 4]], 'clocks': [[28]], '#clock-cells': [[0]], 'phandle': [[16]]}, 'rtc@f80480b0': {'compatible': ['atmel,sama5d2-rtc'], 'reg': [[4161044656, 48]], 'interrupts': [[74, 4, 7]], 'clocks': [[16]], 'phandle': [[90]]}, 'i2s@f8050000': {'compatible': ['atmel,sama5d2-i2s'], 'reg': [[4161077248, 256]], 'interrupts': [[54, 4, 7]], 'dmas': [[19, 520110080], [19, 536887296]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 54], [3, 3, 54]], 'clock-names': ['pclk', 'gclk'], 'assigned-clocks': [[3, 0, 5]], 'assigned-clock-parents': [[3, 3, 54]], 'status': ['disabled'], 'phandle': [[91]]}, 'can@f8054000': {'compatible': ['bosch,m_can'], 'reg': [[4161093632, 16384], [2162688, 7168]], 'reg-na
mes': ['m_can', 'message_ram'], 'interrupts': [[56, 4, 7], [64, 4, 7]], 'interrupt-names': ['int0', 'int1'], 'clocks': [[3, 2, 56], [3, 3, 56]], 'clock-names': ['hclk', 'cclk'], 'assigned-clocks': [[3, 3, 56]], 'assigned-clock-parents': [[3, 0, 2]], 'assigned-clock-rates': [[40000000]], 'bosch,mram-cfg': [[0, 0, 0, 64, 0, 0, 32, 32]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[29]], 'phandle': [[92]]}, 'spi@fc000000': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[4227858432, 256]], 'interrupts': [[34, 4, 7]], 'dmas': [[19, 134234112], [19, 151011328]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 34]], 'clock-names': ['spi_clk'], 'atmel,fifo-size': [[16]], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[30]], 'phandle': [[93]]}, 'serial@fc008000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4227891200, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[27, 4, 7]], 'dmas': [[31, 68788224
0], [31, 704659456]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 27]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[32]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[94]]}, 'serial@fc00c000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4227907584, 256]], 'atmel,usart-mode': [[0]], 'dmas': [[19, 721436672], [19, 738213888]], 'dma-names': ['tx', 'rx'], 'interrupts': [[28, 4, 7]], 'clocks': [[3, 2, 28]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[33]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[95]]}, 'flexcom@fc010000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227923968, 512]], 'clocks': [[3, 2, 21]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227923968, 2048]], 'status': ['disabled'], 'phandle': [[96]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]],
'interrupts': [[21, 4, 7]], 'clocks': [[3, 2, 21]], 'clock-names': ['usart'], 'dmas': [[19, 251674624], [19, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[97]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[21, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 21]], 'clock-names': ['spi_clk'], 'dmas': [[19, 251674624], [19, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[98]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[21, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 21]], 'dmas': [[19, 251674624], [19, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[99]]}}, 'flexcom@fc014000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227940352, 512]], 'clocks': [[3, 2, 22]], '#addre
ss-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227940352, 2048]], 'status': ['disabled'], 'phandle': [[100]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[22, 4, 7]], 'clocks': [[3, 2, 22]], 'clock-names': ['usart'], 'dmas': [[19, 285229056], [19, 302006272]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[101]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[22, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 22]], 'clock-names': ['spi_clk'], 'dmas': [[19, 285229056], [19, 302006272]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[102]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[22, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 22]], 'dmas': [[19, 285229056], [19, 302006
272]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[103]]}}, 'flexcom@fc018000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227956736, 512]], 'clocks': [[3, 2, 23]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227956736, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[2]], 'phandle': [[104]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[23, 4, 7]], 'clocks': [[3, 2, 23]], 'clock-names': ['usart'], 'dmas': [[19, 318783488], [19, 335560704]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[105]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[23, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 23]], 'clock-names': ['spi_clk'], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pi
nctrl-names': ['default'], 'pinctrl-0': [[34]], 'phandle': [[106]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[23, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 23]], 'dmas': [[19, 318783488], [19, 335560704]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[107]]}}, 'trng@fc01c000': {'compatible': ['atmel,at91sam9g45-trng'], 'reg': [[4227973120, 256]], 'interrupts': [[47, 4, 0]], 'clocks': [[3, 2, 47]]}, 'interrupt-controller@fc020000': {'#interrupt-cells': [[3]], 'compatible': ['atmel,sama5d2-aic'], 'interrupt-controller': True, 'reg': [[4227989504, 512]], 'atmel,external-irqs': [[49]], 'phandle': [[1]]}, 'i2c@fc028000': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[4228022272, 256]], 'interrupts': [[30, 4, 7]], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 30]], 'atmel,fifo-size': [[16]], 'status': ['
okay'], 'pinctrl-names': ['default', 'gpio'], 'pinctrl-0': [[35]], 'pinctrl-1': [[36]], 'i2c-analog-filter': True, 'i2c-digital-filter': True, 'i2c-digital-filter-width-ns': [[35]], 'sda-gpios': [[7, 100, 0]], 'scl-gpios': [[7, 101, 6]], 'phandle': [[108]]}, 'adc@fc030000': {'compatible': ['atmel,sama5d2-adc'], 'reg': [[4228055040, 256]], 'interrupts': [[40, 4, 7]], 'clocks': [[3, 2, 40]], 'clock-names': ['adc_clk'], 'dmas': [[19, 419446784]], 'dma-names': ['rx'], 'atmel,min-sample-rate-hz': [[200000]], 'atmel,max-sample-rate-hz': [[20000000]], 'atmel,startup-time-ms': [[4]], 'atmel,trigger-edge-type': [[1]], '#io-channel-cells': [[1]], 'status': ['okay'], 'vddana-supply': [[37]], 'vref-supply': [[37]], 'pinctrl-names': ['default'], 'pinctrl-0': [[38, 39]], 'phandle': [[6]]}, 'pinctrl@fc038000': {'compatible': ['atmel,sama5d2-pinctrl'], 'reg': [[4228087808, 1536]], 'interrupts': [[18, 4, 7], [68, 4, 7], [69, 4, 7], [70, 4, 7]], 'interrupt-controller': True, '#interrupt-cells': [[2]]
, 'gpio-controller': True, '#gpio-cells': [[2]], 'clocks': [[3, 2, 18]], 'phandle': [[7]], 'adc-default': {'pinmux': [[121, 122]], 'bias-disable': True, 'phandle': [[38]]}, 'adtrg-default': {'pinmux': [[1114239]], 'bias-pull-up': True, 'phandle': [[39]]}, 'can0-default': {'pinmux': [[2424906, 2424907]], 'bias-disable': True, 'phandle': [[29]]}, 'can1-default': {'pinmux': [[1310810, 1310811]], 'bias-disable': True, 'phandle': [[40]]}, 'debug-uart': {'pinmux': [[1245242, 1245243]], 'bias-disable': True, 'phandle': [[20]]}, 'flx1-default': {'pinmux': [[1114136, 1114135, 1114137, 1114138]], 'bias-disable': True, 'phandle': [[27]]}, 'i2c0-default': {'pinmux': [[1310783, 1310784]], 'bias-disable': True, 'phandle': [[22]]}, 'i2c0-gpio-default': {'pinmux': [[63, 64]], 'bias-disable': True, 'phandle': [[23]]}, 'i2c1-default': {'pinmux': [[2162788, 2162789]], 'bias-disable': True, 'phandle': [[35]]}, 'i2c1-gpio-default': {'pinmux': [[100, 101]], 'bias-disable': True, 'phandle': [[36]]}, 'key-
gpio-default': {'pinmux': [[17]], 'bias-pull-up': True, 'phandle': [[41]]}, 'led-gpio-default': {'pinmux': [[7, 8, 9]], 'bias-pull-up': True, 'phandle': [[42]]}, 'mikrobus1-pwm': {'pinmux': [[1310751]], 'bias-disable': True, 'phandle': [[25]]}, 'mikrobus2-pwm': {'pinmux': [[1310752]], 'bias-disable': True, 'phandle': [[26]]}, 'mikrobus1-uart': {'pinmux': [[1114147, 1114148]], 'bias-disable': True, 'phandle': [[33]]}, 'mikrobus2-uart': {'pinmux': [[3342379, 3342380]], 'bias-disable': True, 'phandle': [[32]]}, 'qspi1-default': {'pinmux': [[2359333, 2359334, 2359335, 2359336, 2359337, 2359338]], 'bias-disable': True, 'phandle': [[18]]}, 'rpi-spi': {'pinmux': [[2228332, 2228333, 2228334, 2228335, 2228336]], 'bias-disable': True, 'phandle': [[34]]}, 'rpi-uart': {'pinmux': [[1114210, 1114211]], 'bias-disable': True, 'phandle': [[21]]}, 'sdmmc0-default': {'pinmux': [[1114112, 1114113, 1114114, 1114115, 1114116, 1114117, 1114123, 1114125]], 'bias-disable': True, 'phandle': [[14]]}, 'sdmmc1-
default': {'pinmux': [[1376274, 1376275, 1376276, 1376277, 1376278, 1376284, 1376286]], 'bias-disable': True, 'phandle': [[15]]}, 'spi1-default': {'pinmux': [[1310785, 1310786, 1310787, 1310788, 1310789, 1310790, 1310791]], 'bias-disable': True, 'phandle': [[30]]}, 'usb-default': {'pinmux': [[6]], 'bias-disable': True, 'phandle': [[9]]}, 'usba-vbus': {'pinmux': [[45]], 'bias-disable': True, 'phandle': [[8]]}}, 'secumod@fc040000': {'compatible': ['atmel,sama5d2-secumod', 'syscon'], 'reg': [[4228120576, 256]], 'gpio-controller': True, '#gpio-cells': [[2]], 'phandle': [[24]]}, 'crypto@fc044000': {'compatible': ['atmel,at91sam9g46-tdes'], 'reg': [[4228136960, 256]], 'interrupts': [[11, 4, 0]], 'dmas': [[19, 469778432], [19, 486555648]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 11]], 'clock-names': ['tdes_clk'], 'phandle': [[109]]}, 'classd@fc048000': {'compatible': ['atmel,sama5d2-classd'], 'reg': [[4228153344, 256]], 'interrupts': [[59, 4, 7]], 'dmas': [[19, 788545536]], 'dma-names
': ['tx'], 'clocks': [[3, 2, 59], [3, 3, 59]], 'clock-names': ['pclk', 'gclk'], 'status': ['disabled'], 'phandle': [[110]]}, 'i2s@fc04c000': {'compatible': ['atmel,sama5d2-i2s'], 'reg': [[4228169728, 256]], 'interrupts': [[55, 4, 7]], 'dmas': [[19, 553664512], [19, 570441728]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 55], [3, 3, 55]], 'clock-names': ['pclk', 'gclk'], 'assigned-clocks': [[3, 0, 6]], 'assigned-clock-parents': [[3, 3, 55]], 'status': ['disabled'], 'phandle': [[111]]}, 'can@fc050000': {'compatible': ['bosch,m_can'], 'reg': [[4228186112, 16384], [2162688, 14336]], 'reg-names': ['m_can', 'message_ram'], 'interrupts': [[57, 4, 7], [65, 4, 7]], 'interrupt-names': ['int0', 'int1'], 'clocks': [[3, 2, 57], [3, 3, 57]], 'clock-names': ['hclk', 'cclk'], 'assigned-clocks': [[3, 3, 57]], 'assigned-clock-parents': [[3, 0, 2]], 'assigned-clock-rates': [[40000000]], 'bosch,mram-cfg': [[7168, 0, 0, 64, 0, 0, 32, 32]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0':
[[40]], 'phandle': [[112]]}, 'sfr@fc05c000': {'compatible': ['atmel,sama5d2-sfrbu', 'syscon'], 'reg': [[4228235264, 32]], 'phandle': [[113]]}, 'chipid@fc069000': {'compatible': ['atmel,sama5d2-chipid'], 'reg': [[4228288512, 8]]}} should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm/boot/dts/microchip/at91-sama5d2_icp.dtb: ahb: apb: {'compatible': ['simple-bus'], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': True, 'hlcdc@f0000000': {'compatible': ['atmel,sama5d2-hlcdc'], 'reg': [[4026531840, 8192]], 'interrupts': [[45, 4, 0]], 'clocks': [[3, 2, 45], [3, 1, 3], [15]], 'clock-names': ['periph_clk', 'sys_clk', 'slow_clk'], 'status': ['disabled'], 'phandle': [[58]], 'hlcdc-display-controller': {'compatible': ['atmel,hlcdc-display-controller'], '#address-cells': [[1]], '#size-cells': [[0]], 'port@0': {'#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[0]]}}, 'hlcdc-pwm': {'compatible': ['atmel,hlcdc-pwm'], '#pwm-cells': [[3]], 'phandle': [[59]]}}, 'isc@f0008000': {'compatible': ['atmel,sama5d2-isc'], 'reg': [[4026564608, 16384]], 'interrupts': [[46, 4, 5]], 'clocks': [[3, 2, 46], [3, 1, 18], [3, 3, 46]], 'clock-names': ['hclock', 'iscck', 'gck'], '#clock-cells': [[0]], 'clock-output-names': ['isc-mck'], 'status': ['disabled'], 'phandle': [[60
]]}, 'ramc@f000c000': {'compatible': ['atmel,sama5d3-ddramc'], 'reg': [[4026580992, 512]], 'clocks': [[3, 1, 2], [3, 2, 13]], 'clock-names': ['ddrck', 'mpddr'], 'phandle': [[61]]}, 'dma-controller@f0010000': {'compatible': ['atmel,sama5d4-dma'], 'reg': [[4026597376, 4096]], 'interrupts': [[6, 4, 0]], '#dma-cells': [[1]], 'clocks': [[3, 2, 6]], 'clock-names': ['dma_clk'], 'phandle': [[18]]}, 'dma-controller@f0004000': {'compatible': ['atmel,sama5d4-dma'], 'reg': [[4026548224, 4096]], 'interrupts': [[7, 4, 0]], '#dma-cells': [[1]], 'clocks': [[3, 2, 7]], 'clock-names': ['dma_clk'], 'phandle': [[34]]}, 'clock-controller@f0014000': {'compatible': ['atmel,sama5d2-pmc', 'syscon'], 'reg': [[4026613760, 352]], 'interrupts': [[74, 4, 7]], '#clock-cells': [[2]], 'clocks': [[15], [16]], 'clock-names': ['slow_clk', 'main_xtal'], 'phandle': [[3]]}, 'spi@f0020000': {'compatible': ['atmel,sama5d2-qspi'], 'reg': [[4026662912, 256], [3489660928, 134217728]], 'reg-names': ['qspi_base', 'qspi_mmap'],
'interrupts': [[52, 4, 7]], 'clocks': [[3, 2, 52]], 'clock-names': ['pclk'], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['disabled'], 'phandle': [[62]]}, 'spi@f0024000': {'compatible': ['atmel,sama5d2-qspi'], 'reg': [[4026679296, 256], [3623878656, 134217728]], 'reg-names': ['qspi_base', 'qspi_mmap'], 'interrupts': [[53, 4, 7]], 'clocks': [[3, 2, 53]], 'clock-names': ['pclk'], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['disabled'], 'pinctrl-names': ['default'], 'pinctrl-0': [[17]], 'phandle': [[63]], 'flash@0': {'#address-cells': [[1]], '#size-cells': [[1]], 'compatible': ['jedec,spi-nor'], 'reg': [[0]], 'spi-max-frequency': [[104000000]], 'spi-cs-setup-ns': [[7]], 'spi-tx-bus-width': [[4]], 'spi-rx-bus-width': [[4]], 'm25p,fast-read': True, 'at91bootstrap@0': {'label': ['qspi: at91bootstrap'], 'reg': [[0, 262144]]}, 'bootloader@40000': {'label': ['qspi: bootloader'], 'reg': [[262144, 786432]]}, 'bootloaderenvred@100000': {'label': ['qspi: bootloader env
redundant'], 'reg': [[1048576, 262144]]}, 'bootloaderenv@140000': {'label': ['qspi: bootloader env'], 'reg': [[1310720, 262144]]}, 'dtb@180000': {'label': ['qspi: device tree'], 'reg': [[1572864, 524288]]}, 'kernel@200000': {'label': ['qspi: kernel'], 'reg': [[2097152, 6291456]]}}}, 'crypto@f0028000': {'compatible': ['atmel,at91sam9g46-sha'], 'reg': [[4026695680, 256]], 'interrupts': [[12, 4, 0]], 'dmas': [[18, 503332864]], 'dma-names': ['tx'], 'clocks': [[3, 2, 12]], 'clock-names': ['sha_clk'], 'phandle': [[64]]}, 'crypto@f002c000': {'compatible': ['atmel,at91sam9g46-aes'], 'reg': [[4026712064, 256]], 'interrupts': [[9, 4, 0]], 'dmas': [[18, 436224000], [18, 453001216]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 9]], 'clock-names': ['aes_clk'], 'phandle': [[65]]}, 'spi@f8000000': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[4160749568, 256]], 'interrupts': [[33, 4, 7]], 'dmas': [[18, 100679680], [18, 117456896]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 33]], 'clock-na
mes': ['spi_clk'], 'atmel,fifo-size': [[16]], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[19, 20]], 'phandle': [[66]]}, 'ssc@f8004000': {'compatible': ['atmel,at91sam9g45-ssc'], 'reg': [[4160765952, 16384]], 'interrupts': [[43, 4, 4]], 'dmas': [[18, 352337920], [18, 369115136]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 43]], 'clock-names': ['pclk'], 'status': ['disabled'], 'phandle': [[67]]}, 'ethernet@f8008000': {'compatible': ['atmel,sama5d2-gem'], 'reg': [[4160782336, 4096]], 'interrupts': [[5, 4, 3], [66, 4, 3], [67, 4, 3]], 'clocks': [[3, 2, 5], [3, 2, 5]], 'clock-names': ['hclk', 'pclk'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[21, 22, 23]], 'phy-mode': ['mii'], 'phandle': [[31]], 'fixed-link': {'speed': [[100]], 'full-duplex': True}}, 'timer@f800c000': {'compatible': ['atmel,sama5d2-tcb', 'simple-mfd', 'syscon'], '#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[4160798720,
256]], 'interrupts': [[35, 4, 0]], 'clocks': [[3, 2, 35], [3, 3, 35], [15]], 'clock-names': ['t0_clk', 'gclk', 'slow_clk'], 'phandle': [[68]], 'timer@0': {'compatible': ['atmel,tcb-timer'], 'reg': [[0]], 'phandle': [[69]]}, 'timer@1': {'compatible': ['atmel,tcb-timer'], 'reg': [[1]], 'phandle': [[70]]}}, 'timer@f8010000': {'compatible': ['atmel,sama5d2-tcb', 'simple-mfd', 'syscon'], '#address-cells': [[1]], '#size-cells': [[0]], 'reg': [[4160815104, 256]], 'interrupts': [[36, 4, 0]], 'clocks': [[3, 2, 36], [3, 3, 36], [15]], 'clock-names': ['t0_clk', 'gclk', 'slow_clk'], 'phandle': [[71]]}, 'hsmc@f8014000': {'compatible': ['atmel,sama5d2-smc', 'syscon', 'simple-mfd'], 'reg': [[4160831488, 4096]], 'interrupts': [[17, 4, 6]], 'clocks': [[3, 2, 17]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': True, 'phandle': [[10]], 'ecc-engine@f8014070': {'compatible': ['atmel,sama5d2-pmecc'], 'reg': [[4160831600, 1168], [4160832768, 512]], 'phandle': [[13]]}}, 'pdmic@f8018000': {'compa
tible': ['atmel,sama5d2-pdmic'], 'reg': [[4160847872, 292]], 'interrupts': [[48, 4, 7]], 'dmas': [[18, 838877184]], 'dma-names': ['rx'], 'clocks': [[3, 2, 48], [3, 3, 48]], 'clock-names': ['pclk', 'gclk'], 'status': ['disabled'], 'phandle': [[72]]}, 'serial@f801c000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160864256, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[24, 4, 7]], 'dmas': [[18, 587218944], [18, 603996160]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 24]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[24]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[73]]}, 'serial@f8020000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160880640, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[25, 4, 7]], 'dmas': [[18, 620773376], [18, 637550592]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 25]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[25]],
'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[74]]}, 'serial@f8024000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4160897024, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[26, 4, 7]], 'dmas': [[18, 654327808], [18, 671105024]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 26]], 'clock-names': ['usart'], 'status': ['disabled'], 'phandle': [[75]]}, 'i2c@f8028000': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[4160913408, 256]], 'interrupts': [[29, 4, 7]], 'dmas': [[18, 16384], [18, 16793600]], 'dma-names': ['tx', 'rx'], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 29]], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pinctrl-names': ['default', 'gpio'], 'pinctrl-0': [[26]], 'pinctrl-1': [[27]], 'sda-gpios': [[7, 117, 0]], 'scl-gpios': [[7, 118, 6]], 'i2c-digital-filter': True, 'i2c-digital-filter-width-ns': [[35]], 'phandle': [[76]]}, 'pwm@f802c000': {'compatible': ['atmel,sama5d2-pwm'], 'reg': [[4160929792, 16384]], 'interrupts'
: [[38, 4, 7]], '#pwm-cells': [[3]], 'clocks': [[3, 2, 38]], 'status': ['disabled'], 'pinctrl-names': ['default'], 'pinctrl-0': [[28]], 'phandle': [[77]]}, 'sfr@f8030000': {'compatible': ['atmel,sama5d2-sfr', 'syscon'], 'reg': [[4160946176, 152]], 'phandle': [[78]]}, 'flexcom@f8034000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4160962560, 512]], 'clocks': [[3, 2, 19]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4160962560, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[2]], 'phandle': [[79]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[19, 4, 7]], 'clocks': [[3, 2, 19]], 'clock-names': ['usart'], 'dmas': [[18, 184565760], [18, 201342976]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[80]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[19, 4, 7]], '#address-cells': [[1]], '#size-cells
': [[0]], 'clocks': [[3, 2, 19]], 'clock-names': ['spi_clk'], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'cs-gpios': [[7, 64, 1]], 'pinctrl-names': ['default'], 'pinctrl-0': [[29, 30]], 'phandle': [[81]], 'ksz8563@0': {'compatible': ['microchip,ksz8563'], 'reg': [[0]], 'reset-gpios': [[7, 100, 1]], 'spi-max-frequency': [[500000]], 'spi-cpha': True, 'spi-cpol': True, 'phandle': [[82]], 'ports': {'#address-cells': [[1]], '#size-cells': [[0]], 'port@0': {'reg': [[0]], 'label': ['lan1']}, 'port@1': {'reg': [[1]], 'label': ['lan2']}, 'port@2': {'reg': [[2]], 'label': ['cpu'], 'ethernet': [[31]], 'phy-mode': ['mii'], 'fixed-link': {'speed': [[100]], 'full-duplex': True}}}}}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[19, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 19]], 'dmas': [[18, 184565760], [18, 201342976]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]],
'status': ['disabled'], 'phandle': [[83]]}}, 'flexcom@f8038000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4160978944, 512]], 'clocks': [[3, 2, 20]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4160978944, 2048]], 'status': ['disabled'], 'phandle': [[84]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[20, 4, 7]], 'clocks': [[3, 2, 20]], 'clock-names': ['usart'], 'dmas': [[18, 218120192], [18, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[85]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[20, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 20]], 'clock-names': ['spi_clk'], 'dmas': [[18, 218120192], [18, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[86]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2
c'], 'reg': [[1536, 512]], 'interrupts': [[20, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 20]], 'dmas': [[18, 218120192], [18, 234897408]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[87]]}}, 'sram@f8044000': {'compatible': ['atmel,sama5d2-securam', 'mmio-sram'], 'reg': [[4161028096, 5152]], 'clocks': [[3, 2, 51]], '#address-cells': [[1]], '#size-cells': [[1]], 'no-memory-wc': True, 'ranges': [[0, 4161028096, 5152]], 'phandle': [[88]]}, 'reset-controller@f8048000': {'compatible': ['atmel,sama5d3-rstc'], 'reg': [[4161044480, 16]], 'clocks': [[15]], 'phandle': [[89]]}, 'poweroff@f8048010': {'compatible': ['atmel,sama5d2-shdwc'], 'reg': [[4161044496, 16]], 'clocks': [[15]], '#address-cells': [[1]], '#size-cells': [[0]], 'atmel,wakeup-rtc-timer': True, 'debounce-delay-us': [[976]], 'phandle': [[90]], 'input@0': {'reg': [[0]]}}, 'timer@f8048030': {'compatible': ['atmel,at91sam9260-pit'], 'reg': [[4161044528, 16]
], 'interrupts': [[3, 4, 5]], 'clocks': [[3, 0, 4]], 'phandle': [[91]]}, 'watchdog@f8048040': {'compatible': ['atmel,sama5d4-wdt'], 'reg': [[4161044544, 16]], 'interrupts': [[4, 4, 7]], 'clocks': [[15]], 'status': ['okay'], 'phandle': [[92]]}, 'clock-controller@f8048050': {'compatible': ['atmel,sama5d4-sckc'], 'reg': [[4161044560, 4]], 'clocks': [[32]], '#clock-cells': [[0]], 'phandle': [[15]]}, 'rtc@f80480b0': {'compatible': ['atmel,sama5d2-rtc'], 'reg': [[4161044656, 48]], 'interrupts': [[74, 4, 7]], 'clocks': [[15]], 'phandle': [[93]]}, 'i2s@f8050000': {'compatible': ['atmel,sama5d2-i2s'], 'reg': [[4161077248, 256]], 'interrupts': [[54, 4, 7]], 'dmas': [[18, 520110080], [18, 536887296]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 54], [3, 3, 54]], 'clock-names': ['pclk', 'gclk'], 'assigned-clocks': [[3, 0, 5]], 'assigned-clock-parents': [[3, 3, 54]], 'status': ['disabled'], 'phandle': [[94]]}, 'can@f8054000': {'compatible': ['bosch,m_can'], 'reg': [[4161093632, 16384], [2162688
, 7168]], 'reg-names': ['m_can', 'message_ram'], 'interrupts': [[56, 4, 7], [64, 4, 7]], 'interrupt-names': ['int0', 'int1'], 'clocks': [[3, 2, 56], [3, 3, 56]], 'clock-names': ['hclk', 'cclk'], 'assigned-clocks': [[3, 3, 56]], 'assigned-clock-parents': [[3, 0, 2]], 'assigned-clock-rates': [[40000000]], 'bosch,mram-cfg': [[0, 0, 0, 64, 0, 0, 32, 32]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[33]], 'phandle': [[95]]}, 'spi@fc000000': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[4227858432, 256]], 'interrupts': [[34, 4, 7]], 'dmas': [[18, 134234112], [18, 151011328]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 34]], 'clock-names': ['spi_clk'], 'atmel,fifo-size': [[16]], '#address-cells': [[1]], '#size-cells': [[0]], 'status': ['disabled'], 'phandle': [[96]]}, 'serial@fc008000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4227891200, 256]], 'atmel,usart-mode': [[0]], 'interrupts': [[27, 4, 7]], 'dmas': [[34, 687882240], [34, 704659456]], 'dma-nam
es': ['tx', 'rx'], 'clocks': [[3, 2, 27]], 'clock-names': ['usart'], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[35]], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[97]]}, 'serial@fc00c000': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[4227907584, 256]], 'atmel,usart-mode': [[0]], 'dmas': [[18, 721436672], [18, 738213888]], 'dma-names': ['tx', 'rx'], 'interrupts': [[28, 4, 7]], 'clocks': [[3, 2, 28]], 'clock-names': ['usart'], 'status': ['disabled'], 'phandle': [[98]]}, 'flexcom@fc010000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227923968, 512]], 'clocks': [[3, 2, 21]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227923968, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[1]], 'phandle': [[99]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[21, 4, 7]], 'clocks': [[3, 2, 21]], 'clock-names': ['usart'], 'dmas': [[18, 251674624],
[18, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['okay'], 'pinctrl-0': [[36]], 'pinctrl-names': ['default'], 'atmel,use-dma-rx': True, 'atmel,use-dma-tx': True, 'phandle': [[100]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[21, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 21]], 'clock-names': ['spi_clk'], 'dmas': [[18, 251674624], [18, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[101]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[21, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 21]], 'dmas': [[18, 251674624], [18, 268451840]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[102]]}}, 'flexcom@fc014000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227940352, 512]], 'clocks': [[3, 2, 22]], '#address
-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227940352, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[2]], 'phandle': [[103]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[22, 4, 7]], 'clocks': [[3, 2, 22]], 'clock-names': ['usart'], 'dmas': [[18, 285229056], [18, 302006272]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[104]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[22, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 22]], 'clock-names': ['spi_clk'], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[37, 38]], 'phandle': [[105]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[22, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [
[3, 2, 22]], 'dmas': [[18, 285229056], [18, 302006272]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[106]]}}, 'flexcom@fc018000': {'compatible': ['atmel,sama5d2-flexcom'], 'reg': [[4227956736, 512]], 'clocks': [[3, 2, 23]], '#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 4227956736, 2048]], 'status': ['okay'], 'atmel,flexcom-mode': [[3]], 'phandle': [[107]], 'serial@200': {'compatible': ['atmel,at91sam9260-usart'], 'reg': [[512, 512]], 'atmel,usart-mode': [[0]], 'interrupts': [[23, 4, 7]], 'clocks': [[3, 2, 23]], 'clock-names': ['usart'], 'dmas': [[18, 318783488], [18, 335560704]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[32]], 'status': ['disabled'], 'phandle': [[108]]}, 'spi@400': {'compatible': ['atmel,at91rm9200-spi'], 'reg': [[1024, 512]], 'interrupts': [[23, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 23]], 'clock-names': ['spi_clk'], 'dmas': [[18, 318783488], [18, 335560704]], 'dm
a-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['disabled'], 'phandle': [[109]]}, 'i2c@600': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[1536, 512]], 'interrupts': [[23, 4, 7]], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 23]], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[39]], 'i2c-digital-filter': True, 'i2c-digital-filter-width-ns': [[35]], 'phandle': [[110]], 'mcp16502@5b': {'compatible': ['microchip,mcp16502'], 'reg': [[91]], 'status': ['okay'], 'lpm-gpios': [[40, 7, 1]], 'regulators': {'BUCK1': {'regulator-name': ['VDD_IO'], 'regulator-min-microvolt': [[3300000]], 'regulator-max-microvolt': [[3300000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'phandle': [[43]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-off-in-s
uspend': True, 'regulator-mode': [[4]]}}, 'BUCK2': {'regulator-name': ['VDD_DDR'], 'regulator-min-microvolt': [[1350000]], 'regulator-max-microvolt': [[1350000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}}, 'BUCK3': {'regulator-name': ['VDD_CORE'], 'regulator-min-microvolt': [[1250000]], 'regulator-max-microvolt': [[1250000]], 'regulator-initial-mode': [[2]], 'regulator-allowed-modes': [[2, 4]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-off-in-suspend': True, 'regulator-mode': [[4]]}}, 'BUCK4': {'regulator-name': ['VDD_OTHER'], 'regulator-min-microvolt': [[600000]], 'regulator-max-microvolt': [[1850000]], 'regulator-initial-mode': [[2]], 'regulator-allow
ed-modes': [[2, 4]], 'regulator-state-standby': {'regulator-on-in-suspend': True, 'regulator-mode': [[4]]}, 'regulator-state-mem': {'regulator-off-in-suspend': True, 'regulator-mode': [[4]]}}, 'LDO1': {'regulator-name': ['LDO1'], 'regulator-min-microvolt': [[2500000]], 'regulator-max-microvolt': [[2500000]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True}, 'regulator-state-mem': {'regulator-off-in-suspend': True}}, 'LDO2': {'regulator-name': ['LDO2'], 'regulator-min-microvolt': [[3300000]], 'regulator-max-microvolt': [[3300000]], 'regulator-always-on': True, 'regulator-state-standby': {'regulator-on-in-suspend': True}, 'regulator-state-mem': {'regulator-off-in-suspend': True}}}}}}, 'trng@fc01c000': {'compatible': ['atmel,at91sam9g45-trng'], 'reg': [[4227973120, 256]], 'interrupts': [[47, 4, 0]], 'clocks': [[3, 2, 47]]}, 'interrupt-controller@fc020000': {'#interrupt-cells': [[3]], 'compatible': ['atmel,sama5d2-aic'], 'interrupt-controller': T
rue, 'reg': [[4227989504, 512]], 'atmel,external-irqs': [[49]], 'phandle': [[1]]}, 'i2c@fc028000': {'compatible': ['atmel,sama5d2-i2c'], 'reg': [[4228022272, 256]], 'interrupts': [[30, 4, 7]], 'dmas': [[0], [0]], 'dma-names': ['tx', 'rx'], '#address-cells': [[1]], '#size-cells': [[0]], 'clocks': [[3, 2, 30]], 'atmel,fifo-size': [[16]], 'status': ['okay'], 'pinctrl-names': ['default', 'gpio'], 'pinctrl-0': [[41]], 'pinctrl-1': [[42]], 'sda-gpios': [[7, 115, 0]], 'scl-gpios': [[7, 116, 6]], 'i2c-digital-filter': True, 'i2c-digital-filter-width-ns': [[35]], 'phandle': [[111]], 'eeprom@50': {'compatible': ['atmel,24c02'], 'reg': [[80]], 'pagesize': [[16]], 'status': ['okay']}, 'eeprom@52': {'compatible': ['atmel,24c02'], 'reg': [[82]], 'pagesize': [[16]], 'status': ['disabled']}, 'eeprom@53': {'compatible': ['atmel,24c02'], 'reg': [[83]], 'pagesize': [[16]], 'status': ['disabled']}}, 'adc@fc030000': {'compatible': ['atmel,sama5d2-adc'], 'reg': [[4228055040, 256]], 'interrupts': [[40, 4,
7]], 'clocks': [[3, 2, 40]], 'clock-names': ['adc_clk'], 'dmas': [[18, 419446784]], 'dma-names': ['rx'], 'atmel,min-sample-rate-hz': [[200000]], 'atmel,max-sample-rate-hz': [[20000000]], 'atmel,startup-time-ms': [[4]], 'atmel,trigger-edge-type': [[1]], '#io-channel-cells': [[1]], 'status': ['okay'], 'vddana-supply': [[43]], 'vref-supply': [[43]], 'pinctrl-names': ['default'], 'pinctrl-0': [[44, 45]], 'phandle': [[6]]}, 'pinctrl@fc038000': {'compatible': ['atmel,sama5d2-pinctrl'], 'reg': [[4228087808, 1536]], 'interrupts': [[18, 4, 7], [68, 4, 7], [69, 4, 7], [70, 4, 7]], 'interrupt-controller': True, '#interrupt-cells': [[2]], 'gpio-controller': True, '#gpio-cells': [[2]], 'clocks': [[3, 2, 18]], 'phandle': [[7]], 'adc_default': {'pinmux': [[120, 121, 122]], 'bias-disable': True, 'phandle': [[44]]}, 'adtrg_default': {'pinmux': [[1114239]], 'bias-pull-up': True, 'phandle': [[45]]}, 'flx4_default': {'pinmux': [[1179740, 1179741]], 'bias-disable': True, 'phandle': [[39]]}, 'can0_defau
lt': {'pinmux': [[2424906, 2424907]], 'bias-disable': True, 'phandle': [[33]]}, 'can1_default': {'pinmux': [[1310810, 1310811]], 'bias-disable': True, 'phandle': [[46]]}, 'i2c1_default': {'pinmux': [[3276915, 3276916]], 'bias-disable': True, 'phandle': [[41]]}, 'i2c1_gpio': {'pinmux': [[115, 116]], 'bias-disable': True, 'phandle': [[42]]}, 'key_gpio_default': {'pinmux': [[96]], 'bias-pull-up': True, 'phandle': [[47]]}, 'led_gpio_default': {'pinmux': [[32, 33, 31]], 'bias-pull-up': True, 'phandle': [[48]]}, 'qspi1_default': {'pinmux': [[1179654, 1179655, 1179656, 1179657, 1179658, 1179659]], 'bias-disable': True, 'phandle': [[17]]}, 'sdmmc0_default': {'phandle': [[14]], 'cmd_data': {'pinmux': [[1114113, 1114114, 1114115, 1114116, 1114117]], 'bias-disable': True}, 'ck_cd': {'pinmux': [[1114112, 1114125]], 'bias-disable': True}}, 'sdmmc1_default': {'phandle': [[112]], 'cmd_data': {'pinmux': [[1376274, 1376275, 1376276, 1376277]], 'bias-disable': True}, 'ck_cd': {'pinmux': [[1376278, 13
76284]], 'bias-disable': True}}, 'mikrobus_i2c': {'pinmux': [[4325494, 4325493]], 'bias-disable': True, 'phandle': [[26]]}, 'i2c0_gpio': {'pinmux': [[117, 118]], 'bias-disable': True, 'phandle': [[27]]}, 'mikrobus1_an': {'pinmux': [[122]], 'bias-disable': True, 'phandle': [[113]]}, 'mikrobus1_rst': {'pinmux': [[69]], 'bias-disable': True, 'phandle': [[114]]}, 'mikrobus1_spi_cs': {'pinmux': [[2424917]], 'bias-disable': True, 'phandle': [[38]]}, 'mikrobus1_spi': {'pinmux': [[2424916, 2424915, 2424914]], 'bias-disable': True, 'phandle': [[37]]}, 'mikrobus1_pwm': {'pinmux': [[1245252]], 'bias-disable': True, 'phandle': [[115]]}, 'mikrobus1_int': {'pinmux': [[67]], 'bias-disable': True, 'phandle': [[116]]}, 'mikrobus1_uart': {'pinmux': [[1245242, 1245243]], 'bias-disable': True, 'phandle': [[24]]}, 'mikrobus2_an': {'pinmux': [[121]], 'bias-disable': True, 'phandle': [[117]]}, 'mikrobus2_rst': {'pinmux': [[56]], 'bias-disable': True, 'phandle': [[118]]}, 'mikrobus2_spi_cs': {'pinmux': [[1
245247]], 'bias-disable': True, 'phandle': [[119]]}, 'mikrobus2_spi': {'pinmux': [[1245244, 1245245, 1245246]], 'bias-disable': True, 'phandle': [[29]]}, 'ksz_spi_cs': {'pinmux': [[64]], 'bias-disable': True, 'phandle': [[30]]}, 'mikrobus2_pwm': {'pinmux': [[2359351]], 'bias-disable': True, 'phandle': [[120]]}, 'mikrobus2_int': {'pinmux': [[54]], 'bias-disable': True, 'phandle': [[121]]}, 'mikrobus2_uart': {'pinmux': [[1310796, 1310797]], 'bias-disable': True, 'phandle': [[35]]}, 'mikrobus3_an': {'pinmux': [[120]], 'bias-disable': True, 'phandle': [[122]]}, 'mikrobus3_rst': {'pinmux': [[53]], 'bias-disable': True, 'phandle': [[123]]}, 'mikrobus3_spi_cs': {'pinmux': [[1114129]], 'bias-disable': True, 'phandle': [[20]]}, 'mikrobus3_spi': {'pinmux': [[1114126, 1114128, 1114127]], 'bias-disable': True, 'phandle': [[19]]}, 'mikrobus3_pwm': {'pinmux': [[2359348]], 'bias-disable': True, 'phandle': [[124]]}, 'mikrobus3_int': {'pinmux': [[50]], 'bias-disable': True, 'phandle': [[125]]}, 'mik
robus3_uart': {'pinmux': [[2424903, 2424904]], 'bias-disable': True, 'phandle': [[25]]}, 'usb_default': {'pinmux': [[81]], 'bias-disable': True, 'phandle': [[9]]}, 'usba_vbus': {'pinmux': [[119]], 'bias-disable': True, 'phandle': [[8]]}, 'pwm0_pwm2_default': {'pinmux': [[1245221, 1245222]], 'bias-pull-up': True, 'phandle': [[28]]}, 'macb0_default': {'pinmux': [[2359393, 2359394, 2359397, 2359398, 2359399, 2359400, 2359401, 2359402, 2359403, 2359404, 2359405, 2359406, 2359407, 2359408, 2359409, 2359410]], 'bias-disable': True, 'phandle': [[21]]}, 'macb0_phy_irq': {'pinmux': [[99]], 'bias-disable': True, 'phandle': [[22]]}, 'macb0_sw_rst': {'pinmux': [[100]], 'bias-disable': True, 'phandle': [[23]]}, 'flx2_default': {'pinmux': [[1376262, 1376263, 1376265, 1376266]], 'bias-disable': True, 'phandle': [[36]]}}, 'secumod@fc040000': {'compatible': ['atmel,sama5d2-secumod', 'syscon'], 'reg': [[4228120576, 256]], 'gpio-controller': True, '#gpio-cells': [[2]], 'phandle': [[40]]}, 'crypto@fc04
4000': {'compatible': ['atmel,at91sam9g46-tdes'], 'reg': [[4228136960, 256]], 'interrupts': [[11, 4, 0]], 'dmas': [[18, 469778432], [18, 486555648]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 11]], 'clock-names': ['tdes_clk'], 'phandle': [[126]]}, 'classd@fc048000': {'compatible': ['atmel,sama5d2-classd'], 'reg': [[4228153344, 256]], 'interrupts': [[59, 4, 7]], 'dmas': [[18, 788545536]], 'dma-names': ['tx'], 'clocks': [[3, 2, 59], [3, 3, 59]], 'clock-names': ['pclk', 'gclk'], 'status': ['disabled'], 'phandle': [[127]]}, 'i2s@fc04c000': {'compatible': ['atmel,sama5d2-i2s'], 'reg': [[4228169728, 256]], 'interrupts': [[55, 4, 7]], 'dmas': [[18, 553664512], [18, 570441728]], 'dma-names': ['tx', 'rx'], 'clocks': [[3, 2, 55], [3, 3, 55]], 'clock-names': ['pclk', 'gclk'], 'assigned-clocks': [[3, 0, 6]], 'assigned-clock-parents': [[3, 3, 55]], 'status': ['disabled'], 'phandle': [[128]]}, 'can@fc050000': {'compatible': ['bosch,m_can'], 'reg': [[4228186112, 16384], [2162688, 14336]], 'reg-
names': ['m_can', 'message_ram'], 'interrupts': [[57, 4, 7], [65, 4, 7]], 'interrupt-names': ['int0', 'int1'], 'clocks': [[3, 2, 57], [3, 3, 57]], 'clock-names': ['hclk', 'cclk'], 'assigned-clocks': [[3, 3, 57]], 'assigned-clock-parents': [[3, 0, 2]], 'assigned-clock-rates': [[40000000]], 'bosch,mram-cfg': [[7168, 0, 0, 64, 0, 0, 32, 32]], 'status': ['okay'], 'pinctrl-names': ['default'], 'pinctrl-0': [[46]], 'phandle': [[129]]}, 'sfr@fc05c000': {'compatible': ['atmel,sama5d2-sfrbu', 'syscon'], 'reg': [[4228235264, 32]], 'phandle': [[130]]}, 'chipid@fc069000': {'compatible': ['atmel,sama5d2-chipid'], 'reg': [[4228288512, 8]]}} should not be valid under {'type': 'object'}
from schema $id: http://devicetree.org/schemas/simple-bus.yaml#
arch/arm/boot/dts/microchip/at91-sama7g5ek.dtb: mcp16502@5b: regulators:BUCK3:regulator-state-standby: 'regulator-suspend-voltage' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
arch/arm/boot/dts/microchip/at91-sama7g5ek.dtb: mcp16502@5b: regulators:BUCK4:regulator-state-standby: 'regulator-suspend-voltage' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dtb: pmic@5b: regulators:BUCK3:regulator-state-standby: 'regulator-suspend-voltage' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dtb: pmic@5b: regulators:BUCK4:regulator-state-standby: 'regulator-suspend-voltage' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/regulator/microchip,mcp16502.yaml#
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^ permalink raw reply
* Re: [PATCH v7 6/6] docs: trusted-encrypted: add DCP as new trust source
From: Jarkko Sakkinen @ 2024-03-27 15:40 UTC (permalink / raw)
To: David Gstir, Mimi Zohar, James Bottomley, Herbert Xu,
David S. Miller
Cc: Shawn Guo, Jonathan Corbet, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Ahmad Fatoum,
sigma star Kernel Team, David Howells, Li Yang, Paul Moore,
James Morris, Serge E. Hallyn, Paul E. McKenney, Randy Dunlap,
Catalin Marinas, Rafael J. Wysocki, Tejun Heo,
Steven Rostedt (Google), linux-doc, linux-kernel, linux-integrity,
keyrings, linux-crypto, linux-arm-kernel, linuxppc-dev,
linux-security-module, Richard Weinberger, David Oberhollenzer
In-Reply-To: <20240327082454.13729-7-david@sigma-star.at>
On Wed Mar 27, 2024 at 10:24 AM EET, David Gstir wrote:
> Update the documentation for trusted and encrypted KEYS with DCP as new
> trust source:
>
> - Describe security properties of DCP trust source
> - Describe key usage
> - Document blob format
>
> Co-developed-by: Richard Weinberger <richard@nod.at>
> Signed-off-by: Richard Weinberger <richard@nod.at>
> Co-developed-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> Signed-off-by: David Gstir <david@sigma-star.at>
> ---
> .../security/keys/trusted-encrypted.rst | 85 +++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/Documentation/security/keys/trusted-encrypted.rst b/Documentation/security/keys/trusted-encrypted.rst
> index e989b9802f92..81fb3540bb20 100644
> --- a/Documentation/security/keys/trusted-encrypted.rst
> +++ b/Documentation/security/keys/trusted-encrypted.rst
> @@ -42,6 +42,14 @@ safe.
> randomly generated and fused into each SoC at manufacturing time.
> Otherwise, a common fixed test key is used instead.
>
> + (4) DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs)
> +
> + Rooted to a one-time programmable key (OTP) that is generally burnt
> + in the on-chip fuses and is accessible to the DCP encryption engine only.
> + DCP provides two keys that can be used as root of trust: the OTP key
> + and the UNIQUE key. Default is to use the UNIQUE key, but selecting
> + the OTP key can be done via a module parameter (dcp_use_otp_key).
> +
> * Execution isolation
>
> (1) TPM
> @@ -57,6 +65,12 @@ safe.
>
> Fixed set of operations running in isolated execution environment.
>
> + (4) DCP
> +
> + Fixed set of cryptographic operations running in isolated execution
> + environment. Only basic blob key encryption is executed there.
> + The actual key sealing/unsealing is done on main processor/kernel space.
> +
> * Optional binding to platform integrity state
>
> (1) TPM
> @@ -79,6 +93,11 @@ safe.
> Relies on the High Assurance Boot (HAB) mechanism of NXP SoCs
> for platform integrity.
>
> + (4) DCP
> +
> + Relies on Secure/Trusted boot process (called HAB by vendor) for
> + platform integrity.
> +
> * Interfaces and APIs
>
> (1) TPM
> @@ -94,6 +113,11 @@ safe.
>
> Interface is specific to silicon vendor.
>
> + (4) DCP
> +
> + Vendor-specific API that is implemented as part of the DCP crypto driver in
> + ``drivers/crypto/mxs-dcp.c``.
> +
> * Threat model
>
> The strength and appropriateness of a particular trust source for a given
> @@ -129,6 +153,13 @@ selected trust source:
> CAAM HWRNG, enable CRYPTO_DEV_FSL_CAAM_RNG_API and ensure the device
> is probed.
>
> + * DCP (Data Co-Processor: crypto accelerator of various i.MX SoCs)
> +
> + The DCP hardware device itself does not provide a dedicated RNG interface,
> + so the kernel default RNG is used. SoCs with DCP like the i.MX6ULL do have
> + a dedicated hardware RNG that is independent from DCP which can be enabled
> + to back the kernel RNG.
> +
> Users may override this by specifying ``trusted.rng=kernel`` on the kernel
> command-line to override the used RNG with the kernel's random number pool.
>
> @@ -231,6 +262,19 @@ Usage::
> CAAM-specific format. The key length for new keys is always in bytes.
> Trusted Keys can be 32 - 128 bytes (256 - 1024 bits).
>
> +Trusted Keys usage: DCP
> +-----------------------
> +
> +Usage::
> +
> + keyctl add trusted name "new keylen" ring
> + keyctl add trusted name "load hex_blob" ring
> + keyctl print keyid
> +
> +"keyctl print" returns an ASCII hex copy of the sealed key, which is in format
> +specific to this DCP key-blob implementation. The key length for new keys is
> +always in bytes. Trusted Keys can be 32 - 128 bytes (256 - 1024 bits).
> +
> Encrypted Keys usage
> --------------------
>
> @@ -426,3 +470,44 @@ string length.
> privkey is the binary representation of TPM2B_PUBLIC excluding the
> initial TPM2B header which can be reconstructed from the ASN.1 octed
> string length.
> +
> +DCP Blob Format
> +---------------
> +
> +The Data Co-Processor (DCP) provides hardware-bound AES keys using its
> +AES encryption engine only. It does not provide direct key sealing/unsealing.
> +To make DCP hardware encryption keys usable as trust source, we define
> +our own custom format that uses a hardware-bound key to secure the sealing
> +key stored in the key blob.
> +
> +Whenever a new trusted key using DCP is generated, we generate a random 128-bit
> +blob encryption key (BEK) and 128-bit nonce. The BEK and nonce are used to
> +encrypt the trusted key payload using AES-128-GCM.
> +
> +The BEK itself is encrypted using the hardware-bound key using the DCP's AES
> +encryption engine with AES-128-ECB. The encrypted BEK, generated nonce,
> +BEK-encrypted payload and authentication tag make up the blob format together
> +with a version number, payload length and authentication tag::
> +
> + /*
> + * struct dcp_blob_fmt - DCP BLOB format.
> + *
> + * @fmt_version: Format version, currently being %1
> + * @blob_key: Random AES 128 key which is used to encrypt @payload,
> + * @blob_key itself is encrypted with OTP or UNIQUE device key in
> + * AES-128-ECB mode by DCP.
> + * @nonce: Random nonce used for @payload encryption.
> + * @payload_len: Length of the plain text @payload.
> + * @payload: The payload itself, encrypted using AES-128-GCM and @blob_key,
> + * GCM auth tag of size AES_BLOCK_SIZE is attached at the end of it.
> + *
> + * The total size of a DCP BLOB is sizeof(struct dcp_blob_fmt) + @payload_len +
> + * AES_BLOCK_SIZE.
> + */
> + struct dcp_blob_fmt {
> + __u8 fmt_version;
> + __u8 blob_key[AES_KEYSIZE_128];
> + __u8 nonce[AES_KEYSIZE_128];
> + __le32 payload_len;
> + __u8 payload[];
> + } __packed;
I'm thinking here given that you need to replicate the same thing that
is in the source files. E.g. Documentation/gpu/i915.rst.
The rationale would so many sources so maybe it would make sense to
maintain this in the source code.
Also this documents how to generally insert documentation inline:
https://docs.kernel.org/doc-guide/kernel-doc.html
I.e. I'm feeling that this is good time to improve scalability so that
documentation will keep up to date. Also then backend specific patches
mostly go to their subdirectories and not to Documentation/ subtree
(or that would be more rare case).
So a good chance to do more than just a new backend for the benefit
of the trusted keys subsystem :-)
Also, later on if something is changed e.g. in the above struct you
don't have to do matching update to the documentation so it will save
time too (over time).
BR, Jarkko
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^ permalink raw reply
* Re: [PATCH RFC 0/3] mm/gup: consistently call it GUP-fast
From: David Hildenbrand @ 2024-03-27 15:39 UTC (permalink / raw)
To: Peter Xu
Cc: linux-kernel, Andrew Morton, Mike Rapoport, Jason Gunthorpe,
John Hubbard, linux-arm-kernel, loongarch, linux-mips,
linuxppc-dev, linux-s390, linux-sh, linux-mm, linux-perf-users,
linux-fsdevel, x86, Arnd Bergmann, Ryan Roberts
In-Reply-To: <ZgQ5hNltQ2DHQXps@x1n>
On 27.03.24 16:21, Peter Xu wrote:
> On Wed, Mar 27, 2024 at 02:05:35PM +0100, David Hildenbrand wrote:
>> Some cleanups around function names, comments and the config option of
>> "GUP-fast" -- GUP without "lock" safety belts on.
>>
>> With this cleanup it's easy to judge which functions are GUP-fast specific.
>> We now consistently call it "GUP-fast", avoiding mixing it with "fast GUP",
>> "lockless", or simply "gup" (which I always considered confusing in the
>> ode).
>>
>> So the magic now happens in functions that contain "gup_fast", whereby
>> gup_fast() is the entry point into that magic. Comments consistently
>> reference either "GUP-fast" or "gup_fast()".
>>
>> Based on mm-unstable from today. I won't CC arch maintainers, but only
>> arch mailing lists, to reduce noise.
>>
>> Tested on x86_64, cross compiled on a bunch of archs, whereby some of them
>> don't properly even compile on mm-unstable anymore in my usual setup
>> (alpha, arc, parisc64, sh) ... maybe the cross compilers are outdated,
>> but there are no new ones around. Hm.
>
> I'm not sure what config you tried there; as I am doing some build tests
> recently, I found turning off CONFIG_SAMPLES + CONFIG_GCC_PLUGINS could
> avoid a lot of issues, I think it's due to libc missing. But maybe not the
> case there.
CCin Arnd; I use some of his compiler chains, others from Fedora directly. For
example for alpha and arc, the Fedora gcc is "13.2.1".
I compile quite some targets, usually with defconfig. From my compile script:
# COMPILER NAME ARCH CROSS_COMPILE CONFIG(if different from defconfig)
compile_gcc "alpha" "alpha" "alpha-linux-gnu-"
compile_gcc "arc" "arc" "arc-linux-gnu-"
compile_gcc "arm" "arm" "arm-linux-gnu-" "axm55xx_defconfig"
compile_gcc "arm-nommu" "arm" "arm-linux-gnu-" "imxrt_defconfig"
compile_gcc "arm64" "arm64" "aarch64-linux-gnu-"
compile_gcc "csky" "csky" "../cross/gcc-13.2.0-nolibc/csky-linux/bin/csky-linux-"
compile_gcc "loongarch" "loongarch" "../cross/gcc-13.2.0-nolibc/loongarch64-linux/bin/loongarch64-linux-"
compile_gcc "m68k-nommu" "m68k" "m68k-linux-gnu-" "amcore_defconfig"
compile_gcc "m68k-sun3" "m68k" "m68k-linux-gnu-" "sun3_defconfig"
compile_gcc "m68k-coldfire" "m68k" "m68k-linux-gnu-" "m5475evb_defconfig"
compile_gcc "m68k-virt" "m68k" "m68k-linux-gnu-" "virt_defconfig"
compile_gcc "microblaze" "microblaze" "microblaze-linux-gnu-"
compile_gcc "mips64" "mips" "mips64-linux-gnu-" "bigsur_defconfig"
compile_gcc "mips32-xpa" "mips" "mips64-linux-gnu-" "maltaup_xpa_defconfig"
compile_gcc "mips32-alchemy" "mips" "mips64-linux-gnu-" "gpr_defconfig"
compile_gcc "mips32" "mips" "mips64-linux-gnu-"
compile_gcc "nios2" "nios2" "nios2-linux-gnu-" "3c120_defconfig"
compile_gcc "openrisc" "openrisc" "../cross/gcc-13.2.0-nolibc/or1k-linux/bin/or1k-linux-" "virt_defconfig"
compile_gcc "parisc32" "parisc" "hppa-linux-gnu-" "generic-32bit_defconfig"
compile_gcc "parisc64" "parisc" "hppa64-linux-gnu-" "generic-64bit_defconfig"
compile_gcc "riscv32" "riscv" "riscv64-linux-gnu-" "32-bit.config"
compile_gcc "riscv64" "riscv" "riscv64-linux-gnu-" "64-bit.config"
compile_gcc "riscv64-nommu" "riscv" "riscv64-linux-gnu-" "nommu_virt_defconfig"
compile_gcc "s390x" "s390" "s390x-linux-gnu-"
compile_gcc "sh" "sh" "../cross/gcc-13.2.0-nolibc/sh4-linux/bin/sh4-linux-"
compile_gcc "sparc32" "sparc" "../cross/gcc-13.2.0-nolibc/sparc-linux/bin/sparc-linux-" "sparc32_defconfig"
compile_gcc "sparc64" "sparc" "../cross/gcc-13.2.0-nolibc/sparc64-linux/bin/sparc64-linux-" "sparc64_defconfig"
compile_gcc "uml64" "um" "" "x86_64_defconfig"
compile_gcc "x86" "x86" "" "i386_defconfig"
compile_gcc "x86-pae" "x86" "" "i386_defconfig"
compile_gcc "x86_64" "x86" ""
compile_gcc "xtensa" "xtensa" "../cross/gcc-13.2.0-nolibc/xtensa-linux/bin/xtensa-linux-" "virt_defconfig"
compile_gcc "powernv" "powerpc" "../cross/gcc-13.2.0-nolibc/powerpc64-linux/bin/powerpc64-linux-" "powernv_defconfig"
compile_gcc "pseries" "powerpc" "../cross/gcc-13.2.0-nolibc/powerpc64-linux/bin/powerpc64-linux-" "pseries_defconfig"
Some of them look like mm-unstable issue, For example, arm64 fails with
CC arch/arm64/mm/extable.o
In file included from ./include/linux/hugetlb.h:828,
from security/commoncap.c:19:
./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of 'arch_clear_hugetlb_flags'
25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
| ^~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/hugetlb.h:840:20: note: in expansion of macro 'arch_clear_hugetlb_flags'
840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
| ^~~~~~~~~~~~~~~~~~~~~~~~
./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of 'arch_clear_hugetlb_flags' with t
ype 'void(struct folio *)'
21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
| ^~~~~~~~~~~~~~~~~~~~~~~~
In file included from ./include/linux/hugetlb.h:828,
from mm/filemap.c:37:
./arch/arm64/include/asm/hugetlb.h:25:34: error: redefinition of 'arch_clear_hugetlb_flags'
25 | #define arch_clear_hugetlb_flags arch_clear_hugetlb_flags
| ^~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/hugetlb.h:840:20: note: in expansion of macro 'arch_clear_hugetlb_flags'
840 | static inline void arch_clear_hugetlb_flags(struct folio *folio) { }
| ^~~~~~~~~~~~~~~~~~~~~~~~
./arch/arm64/include/asm/hugetlb.h:21:20: note: previous definition of 'arch_clear_hugetlb_flags' with type 'void(struct folio *)'
21 | static inline void arch_clear_hugetlb_flags(struct folio *folio)
But there is other stuff like (arc):
./arch/arc/include/asm/mmu-arcv2.h: In function 'mmu_setup_asid':
./arch/arc/include/asm/mmu-arcv2.h:82:9: error: implicit declaration of function 'write_aux_reg' [-Werro
r=implicit-function-declaration]
82 | write_aux_reg(ARC_REG_PID, asid | MMU_ENABLE);
| ^~~~~~~~~~~~~
or (alpha)
WARNING: modpost: "saved_config" [vmlinux] is COMMON symbol
ERROR: modpost: "memcpy" [fs/reiserfs/reiserfs.ko] undefined!
ERROR: modpost: "memcpy" [fs/nfs/nfs.ko] undefined!
ERROR: modpost: "memcpy" [fs/nfs/nfsv3.ko] undefined!
ERROR: modpost: "memcpy" [fs/nfsd/nfsd.ko] undefined!
ERROR: modpost: "memcpy" [fs/lockd/lockd.ko] undefined!
ERROR: modpost: "memcpy" [crypto/crypto.ko] undefined!
ERROR: modpost: "memcpy" [crypto/crypto_algapi.ko] undefined!
ERROR: modpost: "memcpy" [crypto/aead.ko] undefined!
ERROR: modpost: "memcpy" [crypto/crypto_skcipher.ko] undefined!
ERROR: modpost: "memcpy" [crypto/seqiv.ko] undefined!
>
> The series makes sense to me, the naming is confusing. Btw, thanks for
> posting this as RFC. This definitely has a conflict with the other gup
> series that I had; I'll post v4 of that shortly.
Yes, I will rebase on top of that!
--
Cheers,
David / dhildenb
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* [linux-next:master] BUILD REGRESSION 26074e1be23143b2388cacb36166766c235feb7c
From: kernel test robot @ 2024-03-27 15:32 UTC (permalink / raw)
To: Andrew Morton
Cc: Linux Memory Management List, amd-gfx, bpf, dri-devel, lima,
linux-arch, linux-arm-kernel, linux-mtd, linux-omap, linux-sound,
linux-stm32, netdev, spice-devel, virtualization
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 26074e1be23143b2388cacb36166766c235feb7c Add linux-next specific files for 20240327
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202403271905.BYbGJiPi-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202403271907.0z0uuG5I-lkp@intel.com
https://lore.kernel.org/oe-kbuild-all/202403272205.UKAQzc7v-lkp@intel.com
Error/Warning: (recently discovered and may have been fixed)
ERROR: modpost: "memcpy" [crypto/asymmetric_keys/public_key.ko] undefined!
ERROR: modpost: "memcpy" [crypto/asymmetric_keys/x509_key_parser.ko] undefined!
ERROR: modpost: "memcpy" [crypto/sha1_generic.ko] undefined!
drivers/gpu/drm/lima/lima_drv.c:387:13: error: cast to smaller integer type 'enum lima_gpu_id' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast]
drivers/gpu/drm/panthor/panthor_sched.c:2048:6: error: variable 'csg_mod_mask' set but not used [-Werror,-Wunused-but-set-variable]
drivers/gpu/drm/pl111/pl111_versatile.c:488:24: error: cast to smaller integer type 'enum versatile_clcd' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast]
drivers/gpu/drm/qxl/qxl_cmd.c:424:6: error: variable 'count' set but not used [-Werror,-Wunused-but-set-variable]
drivers/gpu/drm/qxl/qxl_ioctl.c:148:14: error: variable 'num_relocs' set but not used [-Werror,-Wunused-but-set-variable]
drivers/pwm/pwm-stm32.c:662:8: error: call to undeclared function 'devm_clk_rate_exclusive_get'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
include/asm-generic/io.h:547:31: error: performing pointer arithmetic on a null pointer has undefined behavior [-Werror,-Wnull-pointer-arithmetic]
ld: sof_board_helpers.c:(.text+0x157): undefined reference to `sof_ssp_detect_amp_type'
sof_board_helpers.c:(.text+0x149): undefined reference to `sof_ssp_detect_codec_type'
sound/soc/codecs/rk3308_codec.c:956:34: warning: 'rk3308_codec_of_match' defined but not used [-Wunused-const-variable=]
sound/soc/codecs/rk3308_codec.c:956:34: warning: unused variable 'rk3308_codec_of_match' [-Wunused-const-variable]
Unverified Error/Warning (likely false positive, please contact us if interested):
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c:400:42-43: WARNING opportunity for min()
drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c:269:42-43: WARNING opportunity for min()
drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c:43:42-43: WARNING opportunity for min()
Error/Warning ids grouped by kconfigs:
gcc_recent_errors
|-- alpha-randconfig-r001-20220112
| |-- ERROR:memcpy-crypto-asymmetric_keys-public_key.ko-undefined
| |-- ERROR:memcpy-crypto-asymmetric_keys-x509_key_parser.ko-undefined
| `-- ERROR:memcpy-crypto-sha1_generic.ko-undefined
|-- arc-randconfig-r053-20240327
| `-- drivers-firmware-arm_scmi-raw_mode.c:WARNING:scmi_dbg_raw_mode_reset_fops:write()-has-stream-semantic-safe-to-change-nonseekable_open-stream_open.
|-- arm-omap2plus_defconfig
| |-- arch-arm-mach-omap2-prm33xx.c:warning:expecting-prototype-for-am33xx_prm_global_warm_sw_reset().-Prototype-was-for-am33xx_prm_global_sw_reset()-instead
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arm64-defconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-allmodconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-allyesconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- i386-allyesconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- loongarch-allmodconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- loongarch-defconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- m68k-allmodconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- m68k-allyesconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- microblaze-allmodconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- microblaze-allyesconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- nios2-randconfig-002-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- sh-allmodconfig
| |-- drivers-pwm-pwm-stm32.c:error:implicit-declaration-of-function-devm_clk_rate_exclusive_get
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- sh-allyesconfig
| |-- drivers-pwm-pwm-stm32.c:error:implicit-declaration-of-function-devm_clk_rate_exclusive_get
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- sparc-randconfig-001-20240327
| |-- (.head.text):relocation-truncated-to-fit:R_SPARC_WDISP22-against-init.text
| |-- (.init.text):relocation-truncated-to-fit:R_SPARC_WDISP22-against-symbol-leon_smp_cpu_startup-defined-in-.text-section-in-arch-sparc-kernel-trampoline_32.o
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- sparc64-allmodconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- sparc64-allyesconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- um-allyesconfig
| |-- collect2:error:ld-returned-exit-status
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- um-i386_defconfig
| `-- collect2:error:ld-returned-exit-status
|-- x86_64-buildonly-randconfig-001-20240327
| |-- ld:sof_board_helpers.c:(.text):undefined-reference-to-sof_ssp_detect_amp_type
| |-- sof_board_helpers.c:(.text):undefined-reference-to-sof_ssp_detect_codec_type
| `-- sound-soc-codecs-rk3308_codec.c:warning:rk3308_codec_of_match-defined-but-not-used
|-- x86_64-randconfig-004-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
`-- x86_64-randconfig-102-20240326
|-- drivers-gpu-drm-amd-display-dc-dpp-dcn10-dcn10_dpp_dscl.c:WARNING-opportunity-for-min()
|-- drivers-gpu-drm-amd-display-dc-dpp-dcn20-dcn20_dpp.c:WARNING-opportunity-for-min()
`-- drivers-gpu-drm-amd-display-dc-dpp-dcn32-dcn32_dpp.c:WARNING-opportunity-for-min()
clang_recent_errors
|-- arm-defconfig
| |-- arch-arm-mach-omap2-prm33xx.c:warning:expecting-prototype-for-am33xx_prm_global_warm_sw_reset().-Prototype-was-for-am33xx_prm_global_sw_reset()-instead
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- hexagon-randconfig-001-20240326
| `-- drivers-pwm-pwm-stm32.c:error:call-to-undeclared-function-devm_clk_rate_exclusive_get-ISO-C99-and-later-do-not-support-implicit-function-declarations
|-- hexagon-randconfig-001-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- i386-buildonly-randconfig-005-20240327
| `-- sound-soc-codecs-rk3308_codec.c:warning:unused-variable-rk3308_codec_of_match
|-- i386-randconfig-005-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- i386-randconfig-012-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- mips-bmips_stb_defconfig
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- powerpc-randconfig-r061-20240327
| `-- drivers-firmware-arm_scmi-raw_mode.c:WARNING:scmi_dbg_raw_mode_reset_fops:write()-has-stream-semantic-safe-to-change-nonseekable_open-stream_open.
|-- powerpc-randconfig-r062-20240327
| `-- drivers-firmware-arm_scmi-raw_mode.c:WARNING:scmi_dbg_raw_mode_reset_fops:write()-has-stream-semantic-safe-to-change-nonseekable_open-stream_open.
|-- riscv-allmodconfig
| |-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
| `-- kernel-bpf-bpf_struct_ops.c:warning:bitwise-operation-between-different-enumeration-types-(-enum-bpf_type_flag-and-enum-bpf_reg_type-)
|-- riscv-allyesconfig
| |-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
| `-- kernel-bpf-bpf_struct_ops.c:warning:bitwise-operation-between-different-enumeration-types-(-enum-bpf_type_flag-and-enum-bpf_reg_type-)
|-- s390-allmodconfig
| |-- drivers-gpu-drm-amd-amdgpu-amdgpu_drv.c:error:bitwise-operation-between-different-enumeration-types-(-enum-amd_asic_type-and-enum-amd_chip_flags-)-Werror-Wenum-enum-conversion
| |-- drivers-gpu-drm-amd-amdgpu-amdgpu_ras.c:error:arithmetic-between-different-enumeration-types-(-enum-amdgpu_ras_block-and-enum-amdgpu_ras_mca_block-)-Werror-Wenum-enum-conversion
| |-- drivers-gpu-drm-lima-lima_drv.c:error:cast-to-smaller-integer-type-enum-lima_gpu_id-from-const-void-Werror-Wvoid-pointer-to-enum-cast
| |-- drivers-gpu-drm-panthor-panthor_sched.c:error:variable-csg_mod_mask-set-but-not-used-Werror-Wunused-but-set-variable
| |-- drivers-gpu-drm-pl111-pl111_versatile.c:error:cast-to-smaller-integer-type-enum-versatile_clcd-from-const-void-Werror-Wvoid-pointer-to-enum-cast
| |-- drivers-gpu-drm-qxl-qxl_cmd.c:error:variable-count-set-but-not-used-Werror-Wunused-but-set-variable
| |-- drivers-gpu-drm-qxl-qxl_ioctl.c:error:variable-num_relocs-set-but-not-used-Werror-Wunused-but-set-variable
| |-- drivers-gpu-drm-radeon-radeon_drv.c:error:bitwise-operation-between-different-enumeration-types-(-enum-radeon_family-and-enum-radeon_chip_flags-)-Werror-Wenum-enum-conversion
| `-- include-asm-generic-io.h:error:performing-pointer-arithmetic-on-a-null-pointer-has-undefined-behavior-Werror-Wnull-pointer-arithmetic
|-- s390-defconfig
| `-- kernel-bpf-bpf_struct_ops.c:warning:bitwise-operation-between-different-enumeration-types-(-enum-bpf_type_flag-and-enum-bpf_reg_type-)
|-- x86_64-randconfig-075-20240327
| `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
`-- x86_64-randconfig-161-20240327
`-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
elapsed time: 725m
configs tested: 189
configs skipped: 3
tested configs:
alpha allnoconfig gcc
alpha allyesconfig gcc
alpha defconfig gcc
arc allmodconfig gcc
arc allnoconfig gcc
arc allyesconfig gcc
arc defconfig gcc
arc nsimosci_defconfig gcc
arc randconfig-001-20240327 gcc
arc randconfig-002-20240327 gcc
arc vdk_hs38_defconfig gcc
arm allmodconfig gcc
arm allnoconfig clang
arm allyesconfig gcc
arm am200epdkit_defconfig gcc
arm axm55xx_defconfig clang
arm defconfig clang
arm exynos_defconfig clang
arm omap2plus_defconfig gcc
arm randconfig-001-20240327 clang
arm randconfig-002-20240327 clang
arm randconfig-003-20240327 clang
arm randconfig-004-20240327 gcc
arm64 allmodconfig clang
arm64 allnoconfig gcc
arm64 defconfig gcc
arm64 randconfig-001-20240327 clang
arm64 randconfig-002-20240327 clang
arm64 randconfig-003-20240327 gcc
arm64 randconfig-004-20240327 clang
csky allmodconfig gcc
csky allnoconfig gcc
csky allyesconfig gcc
csky defconfig gcc
csky randconfig-001-20240327 gcc
csky randconfig-002-20240327 gcc
hexagon allmodconfig clang
hexagon allnoconfig clang
hexagon allyesconfig clang
hexagon defconfig clang
hexagon randconfig-001-20240327 clang
hexagon randconfig-002-20240327 clang
i386 allmodconfig gcc
i386 allnoconfig gcc
i386 allyesconfig gcc
i386 buildonly-randconfig-001-20240327 gcc
i386 buildonly-randconfig-002-20240327 gcc
i386 buildonly-randconfig-003-20240327 clang
i386 buildonly-randconfig-004-20240327 clang
i386 buildonly-randconfig-005-20240327 clang
i386 buildonly-randconfig-006-20240327 clang
i386 defconfig clang
i386 randconfig-001-20240327 gcc
i386 randconfig-002-20240327 gcc
i386 randconfig-003-20240327 clang
i386 randconfig-004-20240327 gcc
i386 randconfig-005-20240327 clang
i386 randconfig-006-20240327 gcc
i386 randconfig-011-20240327 gcc
i386 randconfig-012-20240327 clang
i386 randconfig-013-20240327 gcc
i386 randconfig-014-20240327 clang
i386 randconfig-015-20240327 gcc
i386 randconfig-016-20240327 clang
loongarch allmodconfig gcc
loongarch allnoconfig gcc
loongarch defconfig gcc
loongarch randconfig-001-20240327 gcc
loongarch randconfig-002-20240327 gcc
m68k allmodconfig gcc
m68k allnoconfig gcc
m68k allyesconfig gcc
m68k bvme6000_defconfig gcc
m68k defconfig gcc
m68k q40_defconfig gcc
m68k stmark2_defconfig gcc
microblaze allmodconfig gcc
microblaze allnoconfig gcc
microblaze allyesconfig gcc
microblaze defconfig gcc
mips allnoconfig gcc
mips allyesconfig gcc
mips bmips_stb_defconfig clang
mips maltaup_xpa_defconfig gcc
nios2 alldefconfig gcc
nios2 allmodconfig gcc
nios2 allnoconfig gcc
nios2 allyesconfig gcc
nios2 defconfig gcc
nios2 randconfig-001-20240327 gcc
nios2 randconfig-002-20240327 gcc
openrisc allnoconfig gcc
openrisc allyesconfig gcc
openrisc defconfig gcc
parisc allmodconfig gcc
parisc allnoconfig gcc
parisc allyesconfig gcc
parisc defconfig gcc
parisc randconfig-001-20240327 gcc
parisc randconfig-002-20240327 gcc
parisc64 defconfig gcc
powerpc allmodconfig gcc
powerpc allnoconfig gcc
powerpc allyesconfig clang
powerpc ebony_defconfig clang
powerpc katmai_defconfig clang
powerpc mpc8315_rdb_defconfig clang
powerpc mpc83xx_defconfig clang
powerpc rainier_defconfig gcc
powerpc randconfig-001-20240327 clang
powerpc randconfig-002-20240327 gcc
powerpc randconfig-003-20240327 clang
powerpc tqm8xx_defconfig clang
powerpc64 randconfig-001-20240327 clang
powerpc64 randconfig-002-20240327 gcc
powerpc64 randconfig-003-20240327 gcc
riscv allmodconfig clang
riscv allnoconfig gcc
riscv allyesconfig clang
riscv defconfig clang
riscv randconfig-001-20240327 clang
riscv randconfig-002-20240327 gcc
s390 allmodconfig clang
s390 allnoconfig clang
s390 allyesconfig gcc
s390 defconfig clang
s390 randconfig-001-20240327 clang
s390 randconfig-002-20240327 gcc
sh allmodconfig gcc
sh allnoconfig gcc
sh allyesconfig gcc
sh defconfig gcc
sh ecovec24_defconfig gcc
sh espt_defconfig gcc
sh polaris_defconfig gcc
sh randconfig-001-20240327 gcc
sh randconfig-002-20240327 gcc
sh rsk7201_defconfig gcc
sh sdk7786_defconfig gcc
sh se7343_defconfig gcc
sh se7619_defconfig gcc
sh se7751_defconfig gcc
sh sh7770_generic_defconfig gcc
sparc allmodconfig gcc
sparc allnoconfig gcc
sparc defconfig gcc
sparc64 allmodconfig gcc
sparc64 allyesconfig gcc
sparc64 defconfig gcc
sparc64 randconfig-001-20240327 gcc
sparc64 randconfig-002-20240327 gcc
um allmodconfig clang
um allnoconfig clang
um allyesconfig gcc
um defconfig clang
um i386_defconfig gcc
um randconfig-001-20240327 clang
um randconfig-002-20240327 clang
um x86_64_defconfig clang
x86_64 allnoconfig clang
x86_64 allyesconfig clang
x86_64 buildonly-randconfig-001-20240327 gcc
x86_64 buildonly-randconfig-002-20240327 gcc
x86_64 buildonly-randconfig-003-20240327 gcc
x86_64 buildonly-randconfig-004-20240327 clang
x86_64 buildonly-randconfig-005-20240327 gcc
x86_64 buildonly-randconfig-006-20240327 gcc
x86_64 defconfig gcc
x86_64 randconfig-001-20240327 clang
x86_64 randconfig-002-20240327 gcc
x86_64 randconfig-003-20240327 gcc
x86_64 randconfig-004-20240327 gcc
x86_64 randconfig-005-20240327 clang
x86_64 randconfig-006-20240327 clang
x86_64 randconfig-011-20240327 gcc
x86_64 randconfig-012-20240327 clang
x86_64 randconfig-013-20240327 clang
x86_64 randconfig-014-20240327 clang
x86_64 randconfig-015-20240327 clang
x86_64 randconfig-016-20240327 clang
x86_64 randconfig-071-20240327 gcc
x86_64 randconfig-072-20240327 clang
x86_64 randconfig-073-20240327 clang
x86_64 randconfig-074-20240327 clang
x86_64 randconfig-075-20240327 clang
x86_64 randconfig-076-20240327 clang
x86_64 rhel-8.3-rust clang
xtensa allnoconfig gcc
xtensa randconfig-001-20240327 gcc
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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^ permalink raw reply
* Re: [PATCH v7 5/6] docs: document DCP-backed trusted keys kernel params
From: Jarkko Sakkinen @ 2024-03-27 15:32 UTC (permalink / raw)
To: David Gstir, Mimi Zohar, James Bottomley, Herbert Xu,
David S. Miller
Cc: Shawn Guo, Jonathan Corbet, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Ahmad Fatoum,
sigma star Kernel Team, David Howells, Li Yang, Paul Moore,
James Morris, Serge E. Hallyn, Paul E. McKenney, Randy Dunlap,
Catalin Marinas, Rafael J. Wysocki, Tejun Heo,
Steven Rostedt (Google), linux-doc, linux-kernel, linux-integrity,
keyrings, linux-crypto, linux-arm-kernel, linuxppc-dev,
linux-security-module, Richard Weinberger, David Oberhollenzer
In-Reply-To: <20240327082454.13729-6-david@sigma-star.at>
On Wed Mar 27, 2024 at 10:24 AM EET, David Gstir wrote:
> Document the kernel parameters trusted.dcp_use_otp_key
> and trusted.dcp_skip_zk_test for DCP-backed trusted keys.
>
> Co-developed-by: Richard Weinberger <richard@nod.at>
> Signed-off-by: Richard Weinberger <richard@nod.at>
> Co-developed-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> Signed-off-by: David Oberhollenzer <david.oberhollenzer@sigma-star.at>
> Signed-off-by: David Gstir <david@sigma-star.at>
> ---
> Documentation/admin-guide/kernel-parameters.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 24c02c704049..b6944e57768a 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -6698,6 +6698,7 @@
> - "tpm"
> - "tee"
> - "caam"
> + - "dcp"
> If not specified then it defaults to iterating through
> the trust source list starting with TPM and assigns the
> first trust source as a backend which is initialized
> @@ -6713,6 +6714,18 @@
> If not specified, "default" is used. In this case,
> the RNG's choice is left to each individual trust source.
>
> + trusted.dcp_use_otp_key
> + This is intended to be used in combination with
> + trusted.source=dcp and will select the DCP OTP key
> + instead of the DCP UNIQUE key blob encryption.
> +
> + trusted.dcp_skip_zk_test
> + This is intended to be used in combination with
> + trusted.source=dcp and will disable the check if all
> + the blob key is zero'ed. This is helpful for situations where
> + having this key zero'ed is acceptable. E.g. in testing
> + scenarios.
> +
> tsc= Disable clocksource stability checks for TSC.
> Format: <string>
> [x86] reliable: mark tsc clocksource as reliable, this
Nicely documented, i.e. even I can understand what is said here :-)
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
BR, Jarkko
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^ permalink raw reply
* Re: [PATCH v7 2/6] KEYS: trusted: improve scalability of trust source config
From: Jarkko Sakkinen @ 2024-03-27 15:30 UTC (permalink / raw)
To: David Gstir, Mimi Zohar, James Bottomley, Herbert Xu,
David S. Miller
Cc: Shawn Guo, Jonathan Corbet, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, NXP Linux Team, Ahmad Fatoum,
sigma star Kernel Team, David Howells, Li Yang, Paul Moore,
James Morris, Serge E. Hallyn, Paul E. McKenney, Randy Dunlap,
Catalin Marinas, Rafael J. Wysocki, Tejun Heo,
Steven Rostedt (Google), linux-doc, linux-kernel, linux-integrity,
keyrings, linux-crypto, linux-arm-kernel, linuxppc-dev,
linux-security-module
In-Reply-To: <20240327082454.13729-3-david@sigma-star.at>
On Wed Mar 27, 2024 at 10:24 AM EET, David Gstir wrote:
> Enabling trusted keys requires at least one trust source implementation
> (currently TPM, TEE or CAAM) to be enabled. Currently, this is
> done by checking each trust source's config option individually.
> This does not scale when more trust sources like the one for DCP
> are added, because the condition will get long and hard to read.
>
> Add config HAVE_TRUSTED_KEYS which is set to true by each trust source
> once its enabled and adapt the check for having at least one active trust
> source to use this option. Whenever a new trust source is added, it now
> needs to select HAVE_TRUSTED_KEYS.
>
> Signed-off-by: David Gstir <david@sigma-star.at>
> ---
> security/keys/trusted-keys/Kconfig | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/security/keys/trusted-keys/Kconfig b/security/keys/trusted-keys/Kconfig
> index dbfdd8536468..553dc117f385 100644
> --- a/security/keys/trusted-keys/Kconfig
> +++ b/security/keys/trusted-keys/Kconfig
> @@ -1,3 +1,6 @@
> +config HAVE_TRUSTED_KEYS
> + bool
> +
> config TRUSTED_KEYS_TPM
> bool "TPM-based trusted keys"
> depends on TCG_TPM >= TRUSTED_KEYS
> @@ -9,6 +12,7 @@ config TRUSTED_KEYS_TPM
> select ASN1_ENCODER
> select OID_REGISTRY
> select ASN1
> + select HAVE_TRUSTED_KEYS
> help
> Enable use of the Trusted Platform Module (TPM) as trusted key
> backend. Trusted keys are random number symmetric keys,
> @@ -20,6 +24,7 @@ config TRUSTED_KEYS_TEE
> bool "TEE-based trusted keys"
> depends on TEE >= TRUSTED_KEYS
> default y
> + select HAVE_TRUSTED_KEYS
> help
> Enable use of the Trusted Execution Environment (TEE) as trusted
> key backend.
> @@ -29,10 +34,11 @@ config TRUSTED_KEYS_CAAM
> depends on CRYPTO_DEV_FSL_CAAM_JR >= TRUSTED_KEYS
> select CRYPTO_DEV_FSL_CAAM_BLOB_GEN
> default y
> + select HAVE_TRUSTED_KEYS
> help
> Enable use of NXP's Cryptographic Accelerator and Assurance Module
> (CAAM) as trusted key backend.
>
> -if !TRUSTED_KEYS_TPM && !TRUSTED_KEYS_TEE && !TRUSTED_KEYS_CAAM
> -comment "No trust source selected!"
> +if !HAVE_TRUSTED_KEYS
> + comment "No trust source selected!"
> endif
Tested-by: Jarkko Sakkinen <jarkko@kernel.org> # for TRUSTED_KEYS_TPM
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
BR, Jarkko
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^ permalink raw reply
* [PATCH] PCI: dw-rockchip: Fix GPIO initialization flag
From: Niklas Cassel @ 2024-03-27 15:25 UTC (permalink / raw)
To: Lorenzo Pieralisi, Krzysztof Wilczyński, Rob Herring,
Bjorn Helgaas, Heiko Stuebner
Cc: Damien Le Moal, Niklas Cassel, linux-pci, linux-arm-kernel,
linux-rockchip
PERST is active low according to the PCIe specification.
However, the existing pcie-dw-rockchip.c driver does:
gpiod_set_value(..., 0); msleep(100); gpiod_set_value(..., 1);
When asserting + deasserting PERST.
This is of course wrong, but because all the device trees for this
compatible string have also incorrectly marked this GPIO as ACTIVE_HIGH:
$ git grep -B 10 reset-gpios arch/arm64/boot/dts/rockchip/rk3568*
$ git grep -B 10 reset-gpios arch/arm64/boot/dts/rockchip/rk3588*
The actual toggling of PERST is correct.
(And we cannot change it anyway, since that would break device tree
compatibility.)
However, this driver does request the GPIO to be initialized as
GPIOD_OUT_HIGH, which does cause a silly sequence where PERST gets
toggled back and forth for no good reason.
Fix this by requesting the GPIO to be initialized as GPIOD_OUT_LOW
(which for this driver means PERST asserted).
This will avoid an unnecessary signal change where PERST gets deasserted
(by devm_gpiod_get_optional()) and then gets asserted
(by rockchip_pcie_start_link()) just a few instructions later.
Before patch, debug prints on EP side, when booting RC:
[ 845.606810] pci: PERST asserted by host!
[ 852.483985] pci: PERST de-asserted by host!
[ 852.503041] pci: PERST asserted by host!
[ 852.610318] pci: PERST de-asserted by host!
After patch, debug prints on EP side, when booting RC:
[ 125.107921] pci: PERST asserted by host!
[ 132.111429] pci: PERST de-asserted by host!
Without this change, there is no guarantee that PERST will be asserted
while the core is performing a fundamental reset.
(E.g. if the bootloader would leave PERST deasserted.)
Signed-off-by: Niklas Cassel <cassel@kernel.org>
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index d6842141d384..a909e42b4273 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -240,7 +240,7 @@ static int rockchip_pcie_resource_get(struct platform_device *pdev,
return PTR_ERR(rockchip->apb_base);
rockchip->rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
- GPIOD_OUT_HIGH);
+ GPIOD_OUT_LOW);
if (IS_ERR(rockchip->rst_gpio))
return PTR_ERR(rockchip->rst_gpio);
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 13/13] mm/gup: Handle hugetlb in the generic follow_page_mask code
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Now follow_page() is ready to handle hugetlb pages in whatever form, and
over all architectures. Switch to the generic code path.
Time to retire hugetlb_follow_page_mask(), following the previous
retirement of follow_hugetlb_page() in 4849807114b8.
There may be a slight difference of how the loops run when processing slow
GUP over a large hugetlb range on cont_pte/cont_pmd supported archs: each
loop of __get_user_pages() will resolve one pgtable entry with the patch
applied, rather than relying on the size of hugetlb hstate, the latter may
cover multiple entries in one loop.
A quick performance test on an aarch64 VM on M1 chip shows 15% degrade over
a tight loop of slow gup after the path switched. That shouldn't be a
problem because slow-gup should not be a hot path for GUP in general: when
page is commonly present, fast-gup will already succeed, while when the
page is indeed missing and require a follow up page fault, the slow gup
degrade will probably buried in the fault paths anyway. It also explains
why slow gup for THP used to be very slow before 57edfcfd3419 ("mm/gup:
accelerate thp gup even for "pages != NULL"") lands, the latter not part of
a performance analysis but a side benefit. If the performance will be a
concern, we can consider handle CONT_PTE in follow_page().
Before that is justified to be necessary, keep everything clean and simple.
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
include/linux/hugetlb.h | 7 ----
mm/gup.c | 15 +++------
mm/hugetlb.c | 71 -----------------------------------------
3 files changed, 5 insertions(+), 88 deletions(-)
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 294c78b3549f..a546140f89cd 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -328,13 +328,6 @@ static inline void hugetlb_zap_end(
{
}
-static inline struct page *hugetlb_follow_page_mask(
- struct vm_area_struct *vma, unsigned long address, unsigned int flags,
- unsigned int *page_mask)
-{
- BUILD_BUG(); /* should never be compiled in if !CONFIG_HUGETLB_PAGE*/
-}
-
static inline int copy_hugetlb_page_range(struct mm_struct *dst,
struct mm_struct *src,
struct vm_area_struct *dst_vma,
diff --git a/mm/gup.c b/mm/gup.c
index a02463c9420e..c803d0b0f358 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -1135,18 +1135,11 @@ static struct page *follow_page_mask(struct vm_area_struct *vma,
{
pgd_t *pgd;
struct mm_struct *mm = vma->vm_mm;
+ struct page *page;
- ctx->page_mask = 0;
-
- /*
- * Call hugetlb_follow_page_mask for hugetlb vmas as it will use
- * special hugetlb page table walking code. This eliminates the
- * need to check for hugetlb entries in the general walking code.
- */
- if (is_vm_hugetlb_page(vma))
- return hugetlb_follow_page_mask(vma, address, flags,
- &ctx->page_mask);
+ vma_pgtable_walk_begin(vma);
+ ctx->page_mask = 0;
pgd = pgd_offset(mm, address);
if (unlikely(is_hugepd(__hugepd(pgd_val(*pgd)))))
@@ -1157,6 +1150,8 @@ static struct page *follow_page_mask(struct vm_area_struct *vma,
else
page = follow_p4d_mask(vma, address, pgd, flags, ctx);
+ vma_pgtable_walk_end(vma);
+
return page;
}
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 65b9c9a48fd2..cc79891a3597 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -6870,77 +6870,6 @@ int hugetlb_mfill_atomic_pte(pte_t *dst_pte,
}
#endif /* CONFIG_USERFAULTFD */
-struct page *hugetlb_follow_page_mask(struct vm_area_struct *vma,
- unsigned long address, unsigned int flags,
- unsigned int *page_mask)
-{
- struct hstate *h = hstate_vma(vma);
- struct mm_struct *mm = vma->vm_mm;
- unsigned long haddr = address & huge_page_mask(h);
- struct page *page = NULL;
- spinlock_t *ptl;
- pte_t *pte, entry;
- int ret;
-
- hugetlb_vma_lock_read(vma);
- pte = hugetlb_walk(vma, haddr, huge_page_size(h));
- if (!pte)
- goto out_unlock;
-
- ptl = huge_pte_lock(h, mm, pte);
- entry = huge_ptep_get(pte);
- if (pte_present(entry)) {
- page = pte_page(entry);
-
- if (!huge_pte_write(entry)) {
- if (flags & FOLL_WRITE) {
- page = NULL;
- goto out;
- }
-
- if (gup_must_unshare(vma, flags, page)) {
- /* Tell the caller to do unsharing */
- page = ERR_PTR(-EMLINK);
- goto out;
- }
- }
-
- page = nth_page(page, ((address & ~huge_page_mask(h)) >> PAGE_SHIFT));
-
- /*
- * Note that page may be a sub-page, and with vmemmap
- * optimizations the page struct may be read only.
- * try_grab_page() will increase the ref count on the
- * head page, so this will be OK.
- *
- * try_grab_page() should always be able to get the page here,
- * because we hold the ptl lock and have verified pte_present().
- */
- ret = try_grab_page(page, flags);
-
- if (WARN_ON_ONCE(ret)) {
- page = ERR_PTR(ret);
- goto out;
- }
-
- *page_mask = (1U << huge_page_order(h)) - 1;
- }
-out:
- spin_unlock(ptl);
-out_unlock:
- hugetlb_vma_unlock_read(vma);
-
- /*
- * Fixup retval for dump requests: if pagecache doesn't exist,
- * don't try to allocate a new page but just skip it.
- */
- if (!page && (flags & FOLL_DUMP) &&
- !hugetlbfs_pagecache_present(h, vma, address))
- page = ERR_PTR(-EFAULT);
-
- return page;
-}
-
long hugetlb_change_protection(struct vm_area_struct *vma,
unsigned long address, unsigned long end,
pgprot_t newprot, unsigned long cp_flags)
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 04/13] mm: Introduce vma_pgtable_walk_{begin|end}()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Introduce per-vma begin()/end() helpers for pgtable walks. This is a
preparation work to merge hugetlb pgtable walkers with generic mm.
The helpers need to be called before and after a pgtable walk, will start
to be needed if the pgtable walker code supports hugetlb pages. It's a
hook point for any type of VMA, but for now only hugetlb uses it to
stablize the pgtable pages from getting away (due to possible pmd
unsharing).
Reviewed-by: Christoph Hellwig <hch@infradead.org>
Reviewed-by: Muchun Song <muchun.song@linux.dev>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
include/linux/mm.h | 3 +++
mm/memory.c | 12 ++++++++++++
2 files changed, 15 insertions(+)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index afe27ff3fa94..d8f78017d271 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -4233,4 +4233,7 @@ static inline bool pfn_is_unaccepted_memory(unsigned long pfn)
return range_contains_unaccepted_memory(paddr, paddr + PAGE_SIZE);
}
+void vma_pgtable_walk_begin(struct vm_area_struct *vma);
+void vma_pgtable_walk_end(struct vm_area_struct *vma);
+
#endif /* _LINUX_MM_H */
diff --git a/mm/memory.c b/mm/memory.c
index 3d0c0cc33c57..27d173f9a521 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -6438,3 +6438,15 @@ void ptlock_free(struct ptdesc *ptdesc)
kmem_cache_free(page_ptl_cachep, ptdesc->ptl);
}
#endif
+
+void vma_pgtable_walk_begin(struct vm_area_struct *vma)
+{
+ if (is_vm_hugetlb_page(vma))
+ hugetlb_vma_lock_read(vma);
+}
+
+void vma_pgtable_walk_end(struct vm_area_struct *vma)
+{
+ if (is_vm_hugetlb_page(vma))
+ hugetlb_vma_unlock_read(vma);
+}
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 11/13] mm/gup: Handle huge pmd for follow_pmd_mask()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Replace pmd_trans_huge() with pmd_leaf() to also cover pmd_huge() as long
as enabled.
FOLL_TOUCH and FOLL_SPLIT_PMD only apply to THP, not yet huge.
Since now follow_trans_huge_pmd() can process hugetlb pages, renaming it
into follow_huge_pmd() to match what it does. Move it into gup.c so not
depend on CONFIG_THP.
When at it, move the ctx->page_mask setup into follow_huge_pmd(), only set
it when the page is valid. It was not a bug to set it before even if GUP
failed (page==NULL), because follow_page_mask() callers always ignores
page_mask if so. But doing so makes the code cleaner.
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 107 ++++++++++++++++++++++++++++++++++++++++++++---
mm/huge_memory.c | 86 +------------------------------------
mm/internal.h | 5 +--
3 files changed, 105 insertions(+), 93 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index 1e5d42211bb4..a81184b01276 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -580,6 +580,93 @@ static struct page *follow_huge_pud(struct vm_area_struct *vma,
return page;
}
+
+/* FOLL_FORCE can write to even unwritable PMDs in COW mappings. */
+static inline bool can_follow_write_pmd(pmd_t pmd, struct page *page,
+ struct vm_area_struct *vma,
+ unsigned int flags)
+{
+ /* If the pmd is writable, we can write to the page. */
+ if (pmd_write(pmd))
+ return true;
+
+ /* Maybe FOLL_FORCE is set to override it? */
+ if (!(flags & FOLL_FORCE))
+ return false;
+
+ /* But FOLL_FORCE has no effect on shared mappings */
+ if (vma->vm_flags & (VM_MAYSHARE | VM_SHARED))
+ return false;
+
+ /* ... or read-only private ones */
+ if (!(vma->vm_flags & VM_MAYWRITE))
+ return false;
+
+ /* ... or already writable ones that just need to take a write fault */
+ if (vma->vm_flags & VM_WRITE)
+ return false;
+
+ /*
+ * See can_change_pte_writable(): we broke COW and could map the page
+ * writable if we have an exclusive anonymous page ...
+ */
+ if (!page || !PageAnon(page) || !PageAnonExclusive(page))
+ return false;
+
+ /* ... and a write-fault isn't required for other reasons. */
+ if (vma_soft_dirty_enabled(vma) && !pmd_soft_dirty(pmd))
+ return false;
+ return !userfaultfd_huge_pmd_wp(vma, pmd);
+}
+
+static struct page *follow_huge_pmd(struct vm_area_struct *vma,
+ unsigned long addr, pmd_t *pmd,
+ unsigned int flags,
+ struct follow_page_context *ctx)
+{
+ struct mm_struct *mm = vma->vm_mm;
+ pmd_t pmdval = *pmd;
+ struct page *page;
+ int ret;
+
+ assert_spin_locked(pmd_lockptr(mm, pmd));
+
+ page = pmd_page(pmdval);
+ VM_BUG_ON_PAGE(!PageHead(page) && !is_zone_device_page(page), page);
+
+ if ((flags & FOLL_WRITE) &&
+ !can_follow_write_pmd(pmdval, page, vma, flags))
+ return NULL;
+
+ /* Avoid dumping huge zero page */
+ if ((flags & FOLL_DUMP) && is_huge_zero_pmd(pmdval))
+ return ERR_PTR(-EFAULT);
+
+ if (pmd_protnone(*pmd) && !gup_can_follow_protnone(vma, flags))
+ return NULL;
+
+ if (!pmd_write(pmdval) && gup_must_unshare(vma, flags, page))
+ return ERR_PTR(-EMLINK);
+
+ VM_BUG_ON_PAGE((flags & FOLL_PIN) && PageAnon(page) &&
+ !PageAnonExclusive(page), page);
+
+ ret = try_grab_page(page, flags);
+ if (ret)
+ return ERR_PTR(ret);
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+ if (pmd_trans_huge(pmdval) && (flags & FOLL_TOUCH))
+ touch_pmd(vma, addr, pmd, flags & FOLL_WRITE);
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
+ page += (addr & ~HPAGE_PMD_MASK) >> PAGE_SHIFT;
+ ctx->page_mask = HPAGE_PMD_NR - 1;
+ VM_BUG_ON_PAGE(!PageCompound(page) && !is_zone_device_page(page), page);
+
+ return page;
+}
+
#else /* CONFIG_PGTABLE_HAS_HUGE_LEAVES */
static struct page *follow_huge_pud(struct vm_area_struct *vma,
unsigned long addr, pud_t *pudp,
@@ -587,6 +674,14 @@ static struct page *follow_huge_pud(struct vm_area_struct *vma,
{
return NULL;
}
+
+static struct page *follow_huge_pmd(struct vm_area_struct *vma,
+ unsigned long addr, pmd_t *pmd,
+ unsigned int flags,
+ struct follow_page_context *ctx)
+{
+ return NULL;
+}
#endif /* CONFIG_PGTABLE_HAS_HUGE_LEAVES */
static int follow_pfn_pte(struct vm_area_struct *vma, unsigned long address,
@@ -784,31 +879,31 @@ static struct page *follow_pmd_mask(struct vm_area_struct *vma,
return page;
return no_page_table(vma, flags, address);
}
- if (likely(!pmd_trans_huge(pmdval)))
+ if (likely(!pmd_leaf(pmdval)))
return follow_page_pte(vma, address, pmd, flags, &ctx->pgmap);
if (pmd_protnone(pmdval) && !gup_can_follow_protnone(vma, flags))
return no_page_table(vma, flags, address);
ptl = pmd_lock(mm, pmd);
- if (unlikely(!pmd_present(*pmd))) {
+ pmdval = *pmd;
+ if (unlikely(!pmd_present(pmdval))) {
spin_unlock(ptl);
return no_page_table(vma, flags, address);
}
- if (unlikely(!pmd_trans_huge(*pmd))) {
+ if (unlikely(!pmd_leaf(pmdval))) {
spin_unlock(ptl);
return follow_page_pte(vma, address, pmd, flags, &ctx->pgmap);
}
- if (flags & FOLL_SPLIT_PMD) {
+ if (pmd_trans_huge(pmdval) && (flags & FOLL_SPLIT_PMD)) {
spin_unlock(ptl);
split_huge_pmd(vma, pmd, address);
/* If pmd was left empty, stuff a page table in there quickly */
return pte_alloc(mm, pmd) ? ERR_PTR(-ENOMEM) :
follow_page_pte(vma, address, pmd, flags, &ctx->pgmap);
}
- page = follow_trans_huge_pmd(vma, address, pmd, flags);
+ page = follow_huge_pmd(vma, address, pmd, flags, ctx);
spin_unlock(ptl);
- ctx->page_mask = HPAGE_PMD_NR - 1;
return page;
}
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 2979198d7b71..ed0d82c4b829 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1220,8 +1220,8 @@ vm_fault_t vmf_insert_pfn_pud(struct vm_fault *vmf, pfn_t pfn, bool write)
EXPORT_SYMBOL_GPL(vmf_insert_pfn_pud);
#endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
-static void touch_pmd(struct vm_area_struct *vma, unsigned long addr,
- pmd_t *pmd, bool write)
+void touch_pmd(struct vm_area_struct *vma, unsigned long addr,
+ pmd_t *pmd, bool write)
{
pmd_t _pmd;
@@ -1576,88 +1576,6 @@ static inline bool can_change_pmd_writable(struct vm_area_struct *vma,
return pmd_dirty(pmd);
}
-/* FOLL_FORCE can write to even unwritable PMDs in COW mappings. */
-static inline bool can_follow_write_pmd(pmd_t pmd, struct page *page,
- struct vm_area_struct *vma,
- unsigned int flags)
-{
- /* If the pmd is writable, we can write to the page. */
- if (pmd_write(pmd))
- return true;
-
- /* Maybe FOLL_FORCE is set to override it? */
- if (!(flags & FOLL_FORCE))
- return false;
-
- /* But FOLL_FORCE has no effect on shared mappings */
- if (vma->vm_flags & (VM_MAYSHARE | VM_SHARED))
- return false;
-
- /* ... or read-only private ones */
- if (!(vma->vm_flags & VM_MAYWRITE))
- return false;
-
- /* ... or already writable ones that just need to take a write fault */
- if (vma->vm_flags & VM_WRITE)
- return false;
-
- /*
- * See can_change_pte_writable(): we broke COW and could map the page
- * writable if we have an exclusive anonymous page ...
- */
- if (!page || !PageAnon(page) || !PageAnonExclusive(page))
- return false;
-
- /* ... and a write-fault isn't required for other reasons. */
- if (vma_soft_dirty_enabled(vma) && !pmd_soft_dirty(pmd))
- return false;
- return !userfaultfd_huge_pmd_wp(vma, pmd);
-}
-
-struct page *follow_trans_huge_pmd(struct vm_area_struct *vma,
- unsigned long addr,
- pmd_t *pmd,
- unsigned int flags)
-{
- struct mm_struct *mm = vma->vm_mm;
- struct page *page;
- int ret;
-
- assert_spin_locked(pmd_lockptr(mm, pmd));
-
- page = pmd_page(*pmd);
- VM_BUG_ON_PAGE(!PageHead(page) && !is_zone_device_page(page), page);
-
- if ((flags & FOLL_WRITE) &&
- !can_follow_write_pmd(*pmd, page, vma, flags))
- return NULL;
-
- /* Avoid dumping huge zero page */
- if ((flags & FOLL_DUMP) && is_huge_zero_pmd(*pmd))
- return ERR_PTR(-EFAULT);
-
- if (pmd_protnone(*pmd) && !gup_can_follow_protnone(vma, flags))
- return NULL;
-
- if (!pmd_write(*pmd) && gup_must_unshare(vma, flags, page))
- return ERR_PTR(-EMLINK);
-
- VM_BUG_ON_PAGE((flags & FOLL_PIN) && PageAnon(page) &&
- !PageAnonExclusive(page), page);
-
- ret = try_grab_page(page, flags);
- if (ret)
- return ERR_PTR(ret);
-
- if (flags & FOLL_TOUCH)
- touch_pmd(vma, addr, pmd, flags & FOLL_WRITE);
-
- page += (addr & ~HPAGE_PMD_MASK) >> PAGE_SHIFT;
- VM_BUG_ON_PAGE(!PageCompound(page) && !is_zone_device_page(page), page);
-
- return page;
-}
-
/* NUMA hinting page fault entry point for trans huge pmds */
vm_fault_t do_huge_pmd_numa_page(struct vm_fault *vmf)
{
diff --git a/mm/internal.h b/mm/internal.h
index eee8c82740b5..e10ecc6594f1 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -1113,9 +1113,8 @@ int __must_check try_grab_page(struct page *page, unsigned int flags);
*/
void touch_pud(struct vm_area_struct *vma, unsigned long addr,
pud_t *pud, bool write);
-struct page *follow_trans_huge_pmd(struct vm_area_struct *vma,
- unsigned long addr, pmd_t *pmd,
- unsigned int flags);
+void touch_pmd(struct vm_area_struct *vma, unsigned long addr,
+ pmd_t *pmd, bool write);
/*
* mm/mmap.c
--
2.44.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v4 12/13] mm/gup: Handle hugepd for follow_page()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Hugepd is only used in PowerPC so far on 4K page size kernels where hash
mmu is used. follow_page_mask() used to leverage hugetlb APIs to access
hugepd entries. Teach follow_page_mask() itself on hugepd.
With previous refactors on fast-gup gup_huge_pd(), most of the code can be
leveraged. There's something not needed for follow page, for example,
gup_hugepte() tries to detect pgtable entry change which will never happen
with slow gup (which has the pgtable lock held), but that's not a problem
to check.
Since follow_page() always only fetch one page, set the end to "address +
PAGE_SIZE" should suffice. We will still do the pgtable walk once for each
hugetlb page by setting ctx->page_mask properly.
One thing worth mentioning is that some level of pgtable's _bad() helper
will report is_hugepd() entries as TRUE on Power8 hash MMUs. I think it at
least applies to PUD on Power8 with 4K pgsize. It means feeding a hugepd
entry to pud_bad() will report a false positive. Let's leave that for now
because it can be arch-specific where I am a bit declined to touch. In
this patch it's not a problem as long as hugepd is detected before any bad
pgtable entries.
To allow slow gup like follow_*_page() to access hugepd helpers, hugepd
codes are moved to the top. Besides that, the helper record_subpages()
will be used by either hugepd or fast-gup now. To avoid "unused function"
warnings we must provide a "#ifdef" for it, unfortunately.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 269 +++++++++++++++++++++++++++++++++----------------------
1 file changed, 163 insertions(+), 106 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index a81184b01276..a02463c9420e 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -500,6 +500,149 @@ static inline void mm_set_has_pinned_flag(unsigned long *mm_flags)
}
#ifdef CONFIG_MMU
+
+#if defined(CONFIG_ARCH_HAS_HUGEPD) || defined(CONFIG_HAVE_FAST_GUP)
+static int record_subpages(struct page *page, unsigned long sz,
+ unsigned long addr, unsigned long end,
+ struct page **pages)
+{
+ struct page *start_page;
+ int nr;
+
+ start_page = nth_page(page, (addr & (sz - 1)) >> PAGE_SHIFT);
+ for (nr = 0; addr != end; nr++, addr += PAGE_SIZE)
+ pages[nr] = nth_page(start_page, nr);
+
+ return nr;
+}
+#endif /* CONFIG_ARCH_HAS_HUGEPD || CONFIG_HAVE_FAST_GUP */
+
+#ifdef CONFIG_ARCH_HAS_HUGEPD
+static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
+ unsigned long sz)
+{
+ unsigned long __boundary = (addr + sz) & ~(sz-1);
+ return (__boundary - 1 < end - 1) ? __boundary : end;
+}
+
+static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
+ unsigned long end, unsigned int flags,
+ struct page **pages, int *nr)
+{
+ unsigned long pte_end;
+ struct page *page;
+ struct folio *folio;
+ pte_t pte;
+ int refs;
+
+ pte_end = (addr + sz) & ~(sz-1);
+ if (pte_end < end)
+ end = pte_end;
+
+ pte = huge_ptep_get(ptep);
+
+ if (!pte_access_permitted(pte, flags & FOLL_WRITE))
+ return 0;
+
+ /* hugepages are never "special" */
+ VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
+
+ page = pte_page(pte);
+ refs = record_subpages(page, sz, addr, end, pages + *nr);
+
+ folio = try_grab_folio(page, refs, flags);
+ if (!folio)
+ return 0;
+
+ if (unlikely(pte_val(pte) != pte_val(ptep_get(ptep)))) {
+ gup_put_folio(folio, refs, flags);
+ return 0;
+ }
+
+ if (!pte_write(pte) && gup_must_unshare(NULL, flags, &folio->page)) {
+ gup_put_folio(folio, refs, flags);
+ return 0;
+ }
+
+ *nr += refs;
+ folio_set_referenced(folio);
+ return 1;
+}
+
+/*
+ * NOTE: currently GUP for a hugepd is only possible on hugetlbfs file
+ * systems on Power, which does not have issue with folio writeback against
+ * GUP updates. When hugepd will be extended to support non-hugetlbfs or
+ * even anonymous memory, we need to do extra check as what we do with most
+ * of the other folios. See writable_file_mapping_allowed() and
+ * folio_fast_pin_allowed() for more information.
+ */
+static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
+ unsigned int pdshift, unsigned long end, unsigned int flags,
+ struct page **pages, int *nr)
+{
+ pte_t *ptep;
+ unsigned long sz = 1UL << hugepd_shift(hugepd);
+ unsigned long next;
+
+ ptep = hugepte_offset(hugepd, addr, pdshift);
+ do {
+ next = hugepte_addr_end(addr, end, sz);
+ if (!gup_hugepte(ptep, sz, addr, end, flags, pages, nr))
+ return 0;
+ } while (ptep++, addr = next, addr != end);
+
+ return 1;
+}
+
+static struct page *follow_hugepd(struct vm_area_struct *vma, hugepd_t hugepd,
+ unsigned long addr, unsigned int pdshift,
+ unsigned int flags,
+ struct follow_page_context *ctx)
+{
+ struct page *page;
+ struct hstate *h;
+ spinlock_t *ptl;
+ int nr = 0, ret;
+ pte_t *ptep;
+
+ /* Only hugetlb supports hugepd */
+ if (WARN_ON_ONCE(!is_vm_hugetlb_page(vma)))
+ return ERR_PTR(-EFAULT);
+
+ h = hstate_vma(vma);
+ ptep = hugepte_offset(hugepd, addr, pdshift);
+ ptl = huge_pte_lock(h, vma->vm_mm, ptep);
+ ret = gup_huge_pd(hugepd, addr, pdshift, addr + PAGE_SIZE,
+ flags, &page, &nr);
+ spin_unlock(ptl);
+
+ if (ret) {
+ WARN_ON_ONCE(nr != 1);
+ ctx->page_mask = (1U << huge_page_order(h)) - 1;
+ return page;
+ }
+
+ return NULL;
+}
+#else /* CONFIG_ARCH_HAS_HUGEPD */
+static inline int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
+ unsigned int pdshift, unsigned long end, unsigned int flags,
+ struct page **pages, int *nr)
+{
+ return 0;
+}
+
+static struct page *follow_hugepd(struct vm_area_struct *vma, hugepd_t hugepd,
+ unsigned long addr, unsigned int pdshift,
+ unsigned int flags,
+ struct follow_page_context *ctx)
+{
+ return NULL;
+}
+#endif /* CONFIG_ARCH_HAS_HUGEPD */
+
+
static struct page *no_page_table(struct vm_area_struct *vma,
unsigned int flags, unsigned long address)
{
@@ -871,6 +1014,9 @@ static struct page *follow_pmd_mask(struct vm_area_struct *vma,
return no_page_table(vma, flags, address);
if (!pmd_present(pmdval))
return no_page_table(vma, flags, address);
+ if (unlikely(is_hugepd(__hugepd(pmd_val(pmdval)))))
+ return follow_hugepd(vma, __hugepd(pmd_val(pmdval)),
+ address, PMD_SHIFT, flags, ctx);
if (pmd_devmap(pmdval)) {
ptl = pmd_lock(mm, pmd);
page = follow_devmap_pmd(vma, address, pmd, flags, &ctx->pgmap);
@@ -921,6 +1067,9 @@ static struct page *follow_pud_mask(struct vm_area_struct *vma,
pud = READ_ONCE(*pudp);
if (!pud_present(pud))
return no_page_table(vma, flags, address);
+ if (unlikely(is_hugepd(__hugepd(pud_val(pud)))))
+ return follow_hugepd(vma, __hugepd(pud_val(pud)),
+ address, PUD_SHIFT, flags, ctx);
if (pud_leaf(pud)) {
ptl = pud_lock(mm, pudp);
page = follow_huge_pud(vma, address, pudp, flags, ctx);
@@ -944,10 +1093,13 @@ static struct page *follow_p4d_mask(struct vm_area_struct *vma,
p4dp = p4d_offset(pgdp, address);
p4d = READ_ONCE(*p4dp);
- if (!p4d_present(p4d))
- return no_page_table(vma, flags, address);
BUILD_BUG_ON(p4d_leaf(p4d));
- if (unlikely(p4d_bad(p4d)))
+
+ if (unlikely(is_hugepd(__hugepd(p4d_val(p4d)))))
+ return follow_hugepd(vma, __hugepd(p4d_val(p4d)),
+ address, P4D_SHIFT, flags, ctx);
+
+ if (!p4d_present(p4d) || p4d_bad(p4d))
return no_page_table(vma, flags, address);
return follow_pud_mask(vma, address, p4dp, flags, ctx);
@@ -997,10 +1149,15 @@ static struct page *follow_page_mask(struct vm_area_struct *vma,
pgd = pgd_offset(mm, address);
- if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
- return no_page_table(vma, flags, address);
+ if (unlikely(is_hugepd(__hugepd(pgd_val(*pgd)))))
+ page = follow_hugepd(vma, __hugepd(pgd_val(*pgd)),
+ address, PGDIR_SHIFT, flags, ctx);
+ else if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
+ page = no_page_table(vma, flags, address);
+ else
+ page = follow_p4d_mask(vma, address, pgd, flags, ctx);
- return follow_p4d_mask(vma, address, pgd, flags, ctx);
+ return page;
}
struct page *follow_page(struct vm_area_struct *vma, unsigned long address,
@@ -2947,106 +3104,6 @@ static int __gup_device_huge_pud(pud_t pud, pud_t *pudp, unsigned long addr,
}
#endif
-static int record_subpages(struct page *page, unsigned long sz,
- unsigned long addr, unsigned long end,
- struct page **pages)
-{
- struct page *start_page;
- int nr;
-
- start_page = nth_page(page, (addr & (sz - 1)) >> PAGE_SHIFT);
- for (nr = 0; addr != end; nr++, addr += PAGE_SIZE)
- pages[nr] = nth_page(start_page, nr);
-
- return nr;
-}
-
-#ifdef CONFIG_ARCH_HAS_HUGEPD
-static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
- unsigned long sz)
-{
- unsigned long __boundary = (addr + sz) & ~(sz-1);
- return (__boundary - 1 < end - 1) ? __boundary : end;
-}
-
-static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
-{
- unsigned long pte_end;
- struct page *page;
- struct folio *folio;
- pte_t pte;
- int refs;
-
- pte_end = (addr + sz) & ~(sz-1);
- if (pte_end < end)
- end = pte_end;
-
- pte = huge_ptep_get(ptep);
-
- if (!pte_access_permitted(pte, flags & FOLL_WRITE))
- return 0;
-
- /* hugepages are never "special" */
- VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
-
- page = pte_page(pte);
- refs = record_subpages(page, sz, addr, end, pages + *nr);
-
- folio = try_grab_folio(page, refs, flags);
- if (!folio)
- return 0;
-
- if (unlikely(pte_val(pte) != pte_val(ptep_get(ptep)))) {
- gup_put_folio(folio, refs, flags);
- return 0;
- }
-
- if (!pte_write(pte) && gup_must_unshare(NULL, flags, &folio->page)) {
- gup_put_folio(folio, refs, flags);
- return 0;
- }
-
- *nr += refs;
- folio_set_referenced(folio);
- return 1;
-}
-
-/*
- * NOTE: currently GUP for a hugepd is only possible on hugetlbfs file
- * systems on Power, which does not have issue with folio writeback against
- * GUP updates. When hugepd will be extended to support non-hugetlbfs or
- * even anonymous memory, we need to do extra check as what we do with most
- * of the other folios. See writable_file_mapping_allowed() and
- * folio_fast_pin_allowed() for more information.
- */
-static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
- unsigned int pdshift, unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
-{
- pte_t *ptep;
- unsigned long sz = 1UL << hugepd_shift(hugepd);
- unsigned long next;
-
- ptep = hugepte_offset(hugepd, addr, pdshift);
- do {
- next = hugepte_addr_end(addr, end, sz);
- if (!gup_hugepte(ptep, sz, addr, end, flags, pages, nr))
- return 0;
- } while (ptep++, addr = next, addr != end);
-
- return 1;
-}
-#else
-static inline int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
- unsigned int pdshift, unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
-{
- return 0;
-}
-#endif /* CONFIG_ARCH_HAS_HUGEPD */
-
static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
unsigned long end, unsigned int flags,
struct page **pages, int *nr)
--
2.44.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v4 10/13] mm/gup: Handle huge pud for follow_pud_mask()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Teach follow_pud_mask() to be able to handle normal PUD pages like hugetlb.
Rename follow_devmap_pud() to follow_huge_pud() so that it can process
either huge devmap or hugetlb. Move it out of TRANSPARENT_HUGEPAGE_PUD and
and huge_memory.c (which relies on CONFIG_THP). Switch to pud_leaf() to
detect both cases in the slow gup.
In the new follow_huge_pud(), taking care of possible CoR for hugetlb if
necessary. touch_pud() needs to be moved out of huge_memory.c to be
accessable from gup.c even if !THP.
Since at it, optimize the non-present check by adding a pud_present() early
check before taking the pgtable lock, failing the follow_page() early if
PUD is not present: that is required by both devmap or hugetlb. Use
pud_huge() to also cover the pud_devmap() case.
One more trivial thing to mention is, introduce "pud_t pud" in the code
paths along the way, so the code doesn't dereference *pudp multiple time.
Not only because that looks less straightforward, but also because if the
dereference really happened, it's not clear whether there can be race to
see different *pudp values when it's being modified at the same time.
Setting ctx->page_mask properly for a PUD entry. As a side effect, this
patch should also be able to optimize devmap GUP on PUD to be able to jump
over the whole PUD range, but not yet verified. Hugetlb already can do so
prior to this patch.
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
include/linux/huge_mm.h | 8 -----
mm/gup.c | 70 +++++++++++++++++++++++++++++++++++++++--
mm/huge_memory.c | 47 ++-------------------------
mm/internal.h | 2 ++
4 files changed, 71 insertions(+), 56 deletions(-)
diff --git a/include/linux/huge_mm.h b/include/linux/huge_mm.h
index d3bb25c39482..3f36511bdc02 100644
--- a/include/linux/huge_mm.h
+++ b/include/linux/huge_mm.h
@@ -351,8 +351,6 @@ static inline bool folio_test_pmd_mappable(struct folio *folio)
struct page *follow_devmap_pmd(struct vm_area_struct *vma, unsigned long addr,
pmd_t *pmd, int flags, struct dev_pagemap **pgmap);
-struct page *follow_devmap_pud(struct vm_area_struct *vma, unsigned long addr,
- pud_t *pud, int flags, struct dev_pagemap **pgmap);
vm_fault_t do_huge_pmd_numa_page(struct vm_fault *vmf);
@@ -507,12 +505,6 @@ static inline struct page *follow_devmap_pmd(struct vm_area_struct *vma,
return NULL;
}
-static inline struct page *follow_devmap_pud(struct vm_area_struct *vma,
- unsigned long addr, pud_t *pud, int flags, struct dev_pagemap **pgmap)
-{
- return NULL;
-}
-
static inline bool thp_migration_supported(void)
{
return false;
diff --git a/mm/gup.c b/mm/gup.c
index 26b8cca24077..1e5d42211bb4 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -525,6 +525,70 @@ static struct page *no_page_table(struct vm_area_struct *vma,
return NULL;
}
+#ifdef CONFIG_PGTABLE_HAS_HUGE_LEAVES
+static struct page *follow_huge_pud(struct vm_area_struct *vma,
+ unsigned long addr, pud_t *pudp,
+ int flags, struct follow_page_context *ctx)
+{
+ struct mm_struct *mm = vma->vm_mm;
+ struct page *page;
+ pud_t pud = *pudp;
+ unsigned long pfn = pud_pfn(pud);
+ int ret;
+
+ assert_spin_locked(pud_lockptr(mm, pudp));
+
+ if ((flags & FOLL_WRITE) && !pud_write(pud))
+ return NULL;
+
+ if (!pud_present(pud))
+ return NULL;
+
+ pfn += (addr & ~PUD_MASK) >> PAGE_SHIFT;
+
+ if (IS_ENABLED(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD) &&
+ pud_devmap(pud)) {
+ /*
+ * device mapped pages can only be returned if the caller
+ * will manage the page reference count.
+ *
+ * At least one of FOLL_GET | FOLL_PIN must be set, so
+ * assert that here:
+ */
+ if (!(flags & (FOLL_GET | FOLL_PIN)))
+ return ERR_PTR(-EEXIST);
+
+ if (flags & FOLL_TOUCH)
+ touch_pud(vma, addr, pudp, flags & FOLL_WRITE);
+
+ ctx->pgmap = get_dev_pagemap(pfn, ctx->pgmap);
+ if (!ctx->pgmap)
+ return ERR_PTR(-EFAULT);
+ }
+
+ page = pfn_to_page(pfn);
+
+ if (!pud_devmap(pud) && !pud_write(pud) &&
+ gup_must_unshare(vma, flags, page))
+ return ERR_PTR(-EMLINK);
+
+ ret = try_grab_page(page, flags);
+ if (ret)
+ page = ERR_PTR(ret);
+ else
+ ctx->page_mask = HPAGE_PUD_NR - 1;
+
+ return page;
+}
+#else /* CONFIG_PGTABLE_HAS_HUGE_LEAVES */
+static struct page *follow_huge_pud(struct vm_area_struct *vma,
+ unsigned long addr, pud_t *pudp,
+ int flags, struct follow_page_context *ctx)
+{
+ return NULL;
+}
+#endif /* CONFIG_PGTABLE_HAS_HUGE_LEAVES */
+
static int follow_pfn_pte(struct vm_area_struct *vma, unsigned long address,
pte_t *pte, unsigned int flags)
{
@@ -760,11 +824,11 @@ static struct page *follow_pud_mask(struct vm_area_struct *vma,
pudp = pud_offset(p4dp, address);
pud = READ_ONCE(*pudp);
- if (pud_none(pud))
+ if (!pud_present(pud))
return no_page_table(vma, flags, address);
- if (pud_devmap(pud)) {
+ if (pud_leaf(pud)) {
ptl = pud_lock(mm, pudp);
- page = follow_devmap_pud(vma, address, pudp, flags, &ctx->pgmap);
+ page = follow_huge_pud(vma, address, pudp, flags, ctx);
spin_unlock(ptl);
if (page)
return page;
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index bc6fa82d9815..2979198d7b71 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1377,8 +1377,8 @@ int copy_huge_pmd(struct mm_struct *dst_mm, struct mm_struct *src_mm,
}
#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
-static void touch_pud(struct vm_area_struct *vma, unsigned long addr,
- pud_t *pud, bool write)
+void touch_pud(struct vm_area_struct *vma, unsigned long addr,
+ pud_t *pud, bool write)
{
pud_t _pud;
@@ -1390,49 +1390,6 @@ static void touch_pud(struct vm_area_struct *vma, unsigned long addr,
update_mmu_cache_pud(vma, addr, pud);
}
-struct page *follow_devmap_pud(struct vm_area_struct *vma, unsigned long addr,
- pud_t *pud, int flags, struct dev_pagemap **pgmap)
-{
- unsigned long pfn = pud_pfn(*pud);
- struct mm_struct *mm = vma->vm_mm;
- struct page *page;
- int ret;
-
- assert_spin_locked(pud_lockptr(mm, pud));
-
- if (flags & FOLL_WRITE && !pud_write(*pud))
- return NULL;
-
- if (pud_present(*pud) && pud_devmap(*pud))
- /* pass */;
- else
- return NULL;
-
- if (flags & FOLL_TOUCH)
- touch_pud(vma, addr, pud, flags & FOLL_WRITE);
-
- /*
- * device mapped pages can only be returned if the
- * caller will manage the page reference count.
- *
- * At least one of FOLL_GET | FOLL_PIN must be set, so assert that here:
- */
- if (!(flags & (FOLL_GET | FOLL_PIN)))
- return ERR_PTR(-EEXIST);
-
- pfn += (addr & ~PUD_MASK) >> PAGE_SHIFT;
- *pgmap = get_dev_pagemap(pfn, *pgmap);
- if (!*pgmap)
- return ERR_PTR(-EFAULT);
- page = pfn_to_page(pfn);
-
- ret = try_grab_page(page, flags);
- if (ret)
- page = ERR_PTR(ret);
-
- return page;
-}
-
int copy_huge_pud(struct mm_struct *dst_mm, struct mm_struct *src_mm,
pud_t *dst_pud, pud_t *src_pud, unsigned long addr,
struct vm_area_struct *vma)
diff --git a/mm/internal.h b/mm/internal.h
index 6c8d3844b6a3..eee8c82740b5 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -1111,6 +1111,8 @@ int __must_check try_grab_page(struct page *page, unsigned int flags);
/*
* mm/huge_memory.c
*/
+void touch_pud(struct vm_area_struct *vma, unsigned long addr,
+ pud_t *pud, bool write);
struct page *follow_trans_huge_pmd(struct vm_area_struct *vma,
unsigned long addr, pmd_t *pmd,
unsigned int flags);
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 09/13] mm/gup: Cache *pudp in follow_pud_mask()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Introduce "pud_t pud" in the function, so the code won't dereference *pudp
multiple time. Not only because that looks less straightforward, but also
because if the dereference really happened, it's not clear whether there
can be race to see different *pudp values if it's being modified at the
same time.
Acked-by: James Houghton <jthoughton@google.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index ef46a7053e16..26b8cca24077 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -753,26 +753,27 @@ static struct page *follow_pud_mask(struct vm_area_struct *vma,
unsigned int flags,
struct follow_page_context *ctx)
{
- pud_t *pud;
+ pud_t *pudp, pud;
spinlock_t *ptl;
struct page *page;
struct mm_struct *mm = vma->vm_mm;
- pud = pud_offset(p4dp, address);
- if (pud_none(*pud))
+ pudp = pud_offset(p4dp, address);
+ pud = READ_ONCE(*pudp);
+ if (pud_none(pud))
return no_page_table(vma, flags, address);
- if (pud_devmap(*pud)) {
- ptl = pud_lock(mm, pud);
- page = follow_devmap_pud(vma, address, pud, flags, &ctx->pgmap);
+ if (pud_devmap(pud)) {
+ ptl = pud_lock(mm, pudp);
+ page = follow_devmap_pud(vma, address, pudp, flags, &ctx->pgmap);
spin_unlock(ptl);
if (page)
return page;
return no_page_table(vma, flags, address);
}
- if (unlikely(pud_bad(*pud)))
+ if (unlikely(pud_bad(pud)))
return no_page_table(vma, flags, address);
- return follow_pmd_mask(vma, address, pud, flags, ctx);
+ return follow_pmd_mask(vma, address, pudp, flags, ctx);
}
static struct page *follow_p4d_mask(struct vm_area_struct *vma,
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 08/13] mm/gup: Handle hugetlb for no_page_table()
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
no_page_table() is not yet used for hugetlb code paths. Make it prepared.
The major difference here is hugetlb will return -EFAULT as long as page
cache does not exist, even if VM_SHARED. See hugetlb_follow_page_mask().
Pass "address" into no_page_table() too, as hugetlb will need it.
Reviewed-by: Christoph Hellwig <hch@infradead.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 44 ++++++++++++++++++++++++++------------------
1 file changed, 26 insertions(+), 18 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index c2881772216b..ef46a7053e16 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -501,19 +501,27 @@ static inline void mm_set_has_pinned_flag(unsigned long *mm_flags)
#ifdef CONFIG_MMU
static struct page *no_page_table(struct vm_area_struct *vma,
- unsigned int flags)
+ unsigned int flags, unsigned long address)
{
+ if (!(flags & FOLL_DUMP))
+ return NULL;
+
/*
- * When core dumping an enormous anonymous area that nobody
- * has touched so far, we don't want to allocate unnecessary pages or
+ * When core dumping, we don't want to allocate unnecessary pages or
* page tables. Return error instead of NULL to skip handle_mm_fault,
* then get_dump_page() will return NULL to leave a hole in the dump.
* But we can only make this optimization where a hole would surely
* be zero-filled if handle_mm_fault() actually did handle it.
*/
- if ((flags & FOLL_DUMP) &&
- (vma_is_anonymous(vma) || !vma->vm_ops->fault))
+ if (is_vm_hugetlb_page(vma)) {
+ struct hstate *h = hstate_vma(vma);
+
+ if (!hugetlbfs_pagecache_present(h, vma, address))
+ return ERR_PTR(-EFAULT);
+ } else if ((vma_is_anonymous(vma) || !vma->vm_ops->fault)) {
return ERR_PTR(-EFAULT);
+ }
+
return NULL;
}
@@ -593,7 +601,7 @@ static struct page *follow_page_pte(struct vm_area_struct *vma,
ptep = pte_offset_map_lock(mm, pmd, address, &ptl);
if (!ptep)
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
pte = ptep_get(ptep);
if (!pte_present(pte))
goto no_page;
@@ -685,7 +693,7 @@ static struct page *follow_page_pte(struct vm_area_struct *vma,
pte_unmap_unlock(ptep, ptl);
if (!pte_none(pte))
return NULL;
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
}
static struct page *follow_pmd_mask(struct vm_area_struct *vma,
@@ -701,27 +709,27 @@ static struct page *follow_pmd_mask(struct vm_area_struct *vma,
pmd = pmd_offset(pudp, address);
pmdval = pmdp_get_lockless(pmd);
if (pmd_none(pmdval))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
if (!pmd_present(pmdval))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
if (pmd_devmap(pmdval)) {
ptl = pmd_lock(mm, pmd);
page = follow_devmap_pmd(vma, address, pmd, flags, &ctx->pgmap);
spin_unlock(ptl);
if (page)
return page;
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
}
if (likely(!pmd_trans_huge(pmdval)))
return follow_page_pte(vma, address, pmd, flags, &ctx->pgmap);
if (pmd_protnone(pmdval) && !gup_can_follow_protnone(vma, flags))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
ptl = pmd_lock(mm, pmd);
if (unlikely(!pmd_present(*pmd))) {
spin_unlock(ptl);
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
}
if (unlikely(!pmd_trans_huge(*pmd))) {
spin_unlock(ptl);
@@ -752,17 +760,17 @@ static struct page *follow_pud_mask(struct vm_area_struct *vma,
pud = pud_offset(p4dp, address);
if (pud_none(*pud))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
if (pud_devmap(*pud)) {
ptl = pud_lock(mm, pud);
page = follow_devmap_pud(vma, address, pud, flags, &ctx->pgmap);
spin_unlock(ptl);
if (page)
return page;
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
}
if (unlikely(pud_bad(*pud)))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
return follow_pmd_mask(vma, address, pud, flags, ctx);
}
@@ -777,10 +785,10 @@ static struct page *follow_p4d_mask(struct vm_area_struct *vma,
p4dp = p4d_offset(pgdp, address);
p4d = READ_ONCE(*p4dp);
if (!p4d_present(p4d))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
BUILD_BUG_ON(p4d_leaf(p4d));
if (unlikely(p4d_bad(p4d)))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
return follow_pud_mask(vma, address, p4dp, flags, ctx);
}
@@ -830,7 +838,7 @@ static struct page *follow_page_mask(struct vm_area_struct *vma,
pgd = pgd_offset(mm, address);
if (pgd_none(*pgd) || unlikely(pgd_bad(*pgd)))
- return no_page_table(vma, flags);
+ return no_page_table(vma, flags, address);
return follow_p4d_mask(vma, address, pgd, flags, ctx);
}
--
2.44.0
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v4 06/13] mm/gup: Drop folio_fast_pin_allowed() in hugepd processing
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
Hugepd format for GUP is only used in PowerPC with hugetlbfs. There are
some kernel usage of hugepd (can refer to hugepd_populate_kernel() for
PPC_8XX), however those pages are not candidates for GUP.
Commit a6e79df92e4a ("mm/gup: disallow FOLL_LONGTERM GUP-fast writing to
file-backed mappings") added a check to fail gup-fast if there's potential
risk of violating GUP over writeback file systems. That should never apply
to hugepd. Considering that hugepd is an old format (and even
software-only), there's no plan to extend hugepd into other file typed
memories that is prone to the same issue.
Drop that check, not only because it'll never be true for hugepd per any
known plan, but also it paves way for reusing the function outside
fast-gup.
To make sure we'll still remember this issue just in case hugepd will be
extended to support non-hugetlbfs memories, add a rich comment above
gup_huge_pd(), explaining the issue with proper references.
Cc: Christoph Hellwig <hch@infradead.org>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index e7510b6ce765..db35b056fc9a 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2832,11 +2832,6 @@ static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
return 0;
}
- if (!folio_fast_pin_allowed(folio, flags)) {
- gup_put_folio(folio, refs, flags);
- return 0;
- }
-
if (!pte_write(pte) && gup_must_unshare(NULL, flags, &folio->page)) {
gup_put_folio(folio, refs, flags);
return 0;
@@ -2847,6 +2842,14 @@ static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
return 1;
}
+/*
+ * NOTE: currently GUP for a hugepd is only possible on hugetlbfs file
+ * systems on Power, which does not have issue with folio writeback against
+ * GUP updates. When hugepd will be extended to support non-hugetlbfs or
+ * even anonymous memory, we need to do extra check as what we do with most
+ * of the other folios. See writable_file_mapping_allowed() and
+ * folio_fast_pin_allowed() for more information.
+ */
static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
unsigned int pdshift, unsigned long end, unsigned int flags,
struct page **pages, int *nr)
--
2.44.0
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH v4 05/13] mm/arch: Provide pud_pfn() fallback
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
The comment in the code explains the reasons. We took a different approach
comparing to pmd_pfn() by providing a fallback function.
Another option is to provide some lower level config options (compare to
HUGETLB_PAGE or THP) to identify which layer an arch can support for such
huge mappings. However that can be an overkill.
Cc: Mike Rapoport (IBM) <rppt@kernel.org>
Cc: Matthew Wilcox <willy@infradead.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
arch/riscv/include/asm/pgtable.h | 1 +
arch/s390/include/asm/pgtable.h | 1 +
arch/sparc/include/asm/pgtable_64.h | 1 +
arch/x86/include/asm/pgtable.h | 1 +
include/linux/pgtable.h | 10 ++++++++++
5 files changed, 14 insertions(+)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 20242402fc11..0ca28cc8e3fa 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -646,6 +646,7 @@ static inline unsigned long pmd_pfn(pmd_t pmd)
#define __pud_to_phys(pud) (__page_val_to_pfn(pud_val(pud)) << PAGE_SHIFT)
+#define pud_pfn pud_pfn
static inline unsigned long pud_pfn(pud_t pud)
{
return ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT);
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 1a71cb19c089..6cbbe473f680 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -1414,6 +1414,7 @@ static inline unsigned long pud_deref(pud_t pud)
return (unsigned long)__va(pud_val(pud) & origin_mask);
}
+#define pud_pfn pud_pfn
static inline unsigned long pud_pfn(pud_t pud)
{
return __pa(pud_deref(pud)) >> PAGE_SHIFT;
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 4d1bafaba942..26efc9bb644a 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -875,6 +875,7 @@ static inline bool pud_leaf(pud_t pud)
return pte_val(pte) & _PAGE_PMD_HUGE;
}
+#define pud_pfn pud_pfn
static inline unsigned long pud_pfn(pud_t pud)
{
pte_t pte = __pte(pud_val(pud));
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index cefc7a84f7a4..273f7557218c 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -234,6 +234,7 @@ static inline unsigned long pmd_pfn(pmd_t pmd)
return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
}
+#define pud_pfn pud_pfn
static inline unsigned long pud_pfn(pud_t pud)
{
phys_addr_t pfn = pud_val(pud);
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index 600e17d03659..75fe309a4e10 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -1817,6 +1817,16 @@ typedef unsigned int pgtbl_mod_mask;
#define pte_leaf_size(x) PAGE_SIZE
#endif
+/*
+ * We always define pmd_pfn for all archs as it's used in lots of generic
+ * code. Now it happens too for pud_pfn (and can happen for larger
+ * mappings too in the future; we're not there yet). Instead of defining
+ * it for all archs (like pmd_pfn), provide a fallback.
+ */
+#ifndef pud_pfn
+#define pud_pfn(x) ({ BUILD_BUG(); 0; })
+#endif
+
/*
* Some architectures have MMUs that are configurable or selectable at boot
* time. These lead to variable PTRS_PER_x. For statically allocated arrays it
--
2.44.0
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^ permalink raw reply related
* [PATCH v4 07/13] mm/gup: Refactor record_subpages() to find 1st small page
From: peterx @ 2024-03-27 15:23 UTC (permalink / raw)
To: linux-mm, linux-kernel
Cc: Yang Shi, Kirill A . Shutemov, Mike Kravetz, John Hubbard,
Michael Ellerman, peterx, Andrew Jones, Muchun Song, linux-riscv,
linuxppc-dev, Christophe Leroy, Andrew Morton, Christoph Hellwig,
Lorenzo Stoakes, Matthew Wilcox, Rik van Riel, linux-arm-kernel,
Andrea Arcangeli, David Hildenbrand, Aneesh Kumar K . V,
Vlastimil Babka, James Houghton, Jason Gunthorpe, Mike Rapoport,
Axel Rasmussen
In-Reply-To: <20240327152332.950956-1-peterx@redhat.com>
From: Peter Xu <peterx@redhat.com>
All the fast-gup functions take a tail page to operate, always need to do
page mask calculations before feeding that into record_subpages().
Merge that logic into record_subpages(), so that it will do the nth_page()
calculation.
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Peter Xu <peterx@redhat.com>
---
mm/gup.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index db35b056fc9a..c2881772216b 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2779,13 +2779,16 @@ static int __gup_device_huge_pud(pud_t pud, pud_t *pudp, unsigned long addr,
}
#endif
-static int record_subpages(struct page *page, unsigned long addr,
- unsigned long end, struct page **pages)
+static int record_subpages(struct page *page, unsigned long sz,
+ unsigned long addr, unsigned long end,
+ struct page **pages)
{
+ struct page *start_page;
int nr;
+ start_page = nth_page(page, (addr & (sz - 1)) >> PAGE_SHIFT);
for (nr = 0; addr != end; nr++, addr += PAGE_SIZE)
- pages[nr] = nth_page(page, nr);
+ pages[nr] = nth_page(start_page, nr);
return nr;
}
@@ -2820,8 +2823,8 @@ static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
/* hugepages are never "special" */
VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
- page = nth_page(pte_page(pte), (addr & (sz - 1)) >> PAGE_SHIFT);
- refs = record_subpages(page, addr, end, pages + *nr);
+ page = pte_page(pte);
+ refs = record_subpages(page, sz, addr, end, pages + *nr);
folio = try_grab_folio(page, refs, flags);
if (!folio)
@@ -2894,8 +2897,8 @@ static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
pages, nr);
}
- page = nth_page(pmd_page(orig), (addr & ~PMD_MASK) >> PAGE_SHIFT);
- refs = record_subpages(page, addr, end, pages + *nr);
+ page = pmd_page(orig);
+ refs = record_subpages(page, PMD_SIZE, addr, end, pages + *nr);
folio = try_grab_folio(page, refs, flags);
if (!folio)
@@ -2938,8 +2941,8 @@ static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
pages, nr);
}
- page = nth_page(pud_page(orig), (addr & ~PUD_MASK) >> PAGE_SHIFT);
- refs = record_subpages(page, addr, end, pages + *nr);
+ page = pud_page(orig);
+ refs = record_subpages(page, PUD_SIZE, addr, end, pages + *nr);
folio = try_grab_folio(page, refs, flags);
if (!folio)
@@ -2978,8 +2981,8 @@ static int gup_huge_pgd(pgd_t orig, pgd_t *pgdp, unsigned long addr,
BUILD_BUG_ON(pgd_devmap(orig));
- page = nth_page(pgd_page(orig), (addr & ~PGDIR_MASK) >> PAGE_SHIFT);
- refs = record_subpages(page, addr, end, pages + *nr);
+ page = pgd_page(orig);
+ refs = record_subpages(page, PGDIR_SIZE, addr, end, pages + *nr);
folio = try_grab_folio(page, refs, flags);
if (!folio)
--
2.44.0
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