* Re: [RFC PATCH v2 3/5] dt-bindings: clock: meson: document A1 SoC audio clock controller driver
From: Krzysztof Kozlowski @ 2024-03-28 9:02 UTC (permalink / raw)
To: Jan Dakinevich, Neil Armstrong, Jerome Brunet, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Kevin Hilman, Martin Blumenstingl, Philipp Zabel, linux-amlogic,
linux-clk, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <cff5e036-7f7c-4270-be0c-f49b196a502b@linaro.org>
On 28/03/2024 10:01, Krzysztof Kozlowski wrote:
>> diff --git a/include/dt-bindings/clock/amlogic,a1-audio-clkc.h b/include/dt-bindings/clock/amlogic,a1-audio-clkc.h
>> new file mode 100644
>> index 000000000000..b30df3b1ae08
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/amlogic,a1-audio-clkc.h
>> @@ -0,0 +1,122 @@
>> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
>> +/*
>> + * Copyright (c) 2024, SaluteDevices. All Rights Reserved.
>> + *
>> + * Author: Jan Dakinevich <jan.dakinevich@salutedevices.com>
>> + */
>> +
>> +#ifndef __A1_AUDIO_CLKC_BINDINGS_H
>> +#define __A1_AUDIO_CLKC_BINDINGS_H
>> +
>> +#define AUD_CLKID_DDR_ARB 1
>> +#define AUD_CLKID_TDMIN_A 2
>> +#define AUD_CLKID_TDMIN_B 3
>> +#define AUD_CLKID_TDMIN_LB 4
>
> Why both clock controllers have the same clocks? This is confusing. It
> seems you split same block into two!
Ah, no, I missed there are IDs for second clock controller. It's fine.
Best regards,
Krzysztof
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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply
* Re: [PATCH RESEND v6 5/5] spmi: pmic-arb: Add multi bus support
From: Neil Armstrong @ 2024-03-28 9:05 UTC (permalink / raw)
To: Abel Vesa, Stephen Boyd, Matthias Brugger, Bjorn Andersson,
Konrad Dybcio, Dmitry Baryshkov, AngeloGioacchino Del Regno,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Srini Kandagatla, Johan Hovold, linux-kernel, linux-arm-kernel,
linux-arm-msm, linux-mediatek, devicetree
In-Reply-To: <20240326-spmi-multi-master-support-v6-5-1c87d8306c5b@linaro.org>
Hi Abel,
On 26/03/2024 17:28, Abel Vesa wrote:
> Starting with HW version 7, there are actually two separate buses
> (with two separate sets of wires). So in order to support both
> buses, we need to register a separate spmi controller for each one.
> Add a separate compatible for v7 only, but allow the legacy platforms
> that have v7 to still work with the old one, for DT backwards
> compatibility.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> drivers/spmi/spmi-pmic-arb.c | 726 +++++++++++++++++++++++++------------------
> 1 file changed, 429 insertions(+), 297 deletions(-)
>
> diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
> index 188252bfb95f..ca0f42952445 100644
> --- a/drivers/spmi/spmi-pmic-arb.c
> +++ b/drivers/spmi/spmi-pmic-arb.c
> @@ -13,6 +13,8 @@
> #include <linux/kernel.h>
> #include <linux/module.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> #include <linux/platform_device.h>
> #include <linux/slab.h>
> #include <linux/spmi.h>
> @@ -94,6 +96,8 @@ enum pmic_arb_channel {
> PMIC_ARB_CHANNEL_OBS,
> };
>
> +#define PMIC_ARB_MAX_BUSES 2
> +
> /* Maximum number of support PMIC peripherals */
> #define PMIC_ARB_MAX_PERIPHS 512
> #define PMIC_ARB_MAX_PERIPHS_V7 1024
> @@ -125,58 +129,68 @@ struct apid_data {
> u8 irq_ee;
> };
>
> +struct spmi_pmic_arb;
> +
> /**
> - * struct spmi_pmic_arb - SPMI PMIC Arbiter object
> + * struct spmi_pmic_arb_bus - SPMI PMIC Arbiter Bus object
> *
> - * @rd_base: on v1 "core", on v2 "observer" register base off DT.
> - * @wr_base: on v1 "core", on v2 "chnls" register base off DT.
> * @intr: address of the SPMI interrupt control registers.
> * @cnfg: address of the PMIC Arbiter configuration registers.
> - * @lock: lock to synchronize accesses.
> - * @channel: execution environment channel to use for accesses.
> - * @irq: PMIC ARB interrupt.
> - * @ee: the current Execution Environment
> - * @bus_instance: on v7: 0 = primary SPMI bus, 1 = secondary SPMI bus
> - * @min_apid: minimum APID (used for bounding IRQ search)
> - * @max_apid: maximum APID
> + * @domain: irq domain object for PMIC IRQ domain
> * @base_apid: on v7: minimum APID associated with the particular SPMI
> * bus instance
> * @apid_count: on v5 and v7: number of APIDs associated with the
> * particular SPMI bus instance
> * @mapping_table: in-memory copy of PPID -> APID mapping table.
> - * @domain: irq domain object for PMIC IRQ domain
> - * @spmic: SPMI controller object
> - * @ver_ops: version dependent operations.
> * @ppid_to_apid: in-memory copy of PPID -> APID mapping table.
> - * @last_apid: Highest value APID in use
> * @apid_data: Table of data for all APIDs
> + * @last_apid: Highest value APID in use
> + * @irq: PMIC ARB interrupt.
Those are moved for no reason, and it doesn't match anymore with the actual fields in spmi_pmic_arb_bus,
please fix.
> + */
> +struct spmi_pmic_arb_bus {
> + struct spmi_pmic_arb *pmic_arb;
> + struct irq_domain *domain;
> + void __iomem *intr;
> + void __iomem *cnfg;
> + struct spmi_controller *spmic;
> + u16 base_apid;
> + int apid_count;
> + u32 *mapping_table;
> + DECLARE_BITMAP(mapping_table_valid, PMIC_ARB_MAX_PERIPHS);
> + u16 *ppid_to_apid;
> + u16 last_apid;
> + struct apid_data *apid_data;
> + u16 min_apid;
> + u16 max_apid;
> + int irq;
> + u8 id;
> +};
> +
> +/**
> + * struct spmi_pmic_arb - SPMI PMIC Arbiter object
> + *
> + * @rd_base: on v1 "core", on v2 "observer" register base off DT.
> + * @wr_base: on v1 "core", on v2 "chnls" register base off DT.
> + * @lock: lock to synchronize accesses.
> + * @channel: execution environment channel to use for accesses.
> + * @ee: the current Execution Environment
> + * @min_apid: minimum APID (used for bounding IRQ search)
> + * @max_apid: maximum APID
> + * @ver_ops: version dependent operations.
> * @max_periphs: Number of elements in apid_data[]
> */
> struct spmi_pmic_arb {
> void __iomem *rd_base;
> void __iomem *wr_base;
> - void __iomem *intr;
> - void __iomem *cnfg;
> void __iomem *core;
> resource_size_t core_size;
> raw_spinlock_t lock;
> u8 channel;
> - int irq;
> u8 ee;
> - u32 bus_instance;
> - u16 min_apid;
> - u16 max_apid;
> - u16 base_apid;
> - int apid_count;
> - u32 *mapping_table;
> - DECLARE_BITMAP(mapping_table_valid, PMIC_ARB_MAX_PERIPHS);
> - struct irq_domain *domain;
> - struct spmi_controller *spmic;
> const struct pmic_arb_ver_ops *ver_ops;
> - u16 *ppid_to_apid;
> - u16 last_apid;
> - struct apid_data *apid_data;
> int max_periphs;
> + struct spmi_pmic_arb_bus buses[PMIC_ARB_MAX_BUSES];
> + int buses_available;
> };
Same here, please refresh/resync the struct documentation
I get the following:
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'pmic_arb' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'spmic' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'mapping_table_valid' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'min_apid' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'max_apid' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:167: warning: Function parameter or struct member 'id' not described in 'spmi_pmic_arb_bus'
drivers/spmi/spmi-pmic-arb.c:194: warning: Function parameter or struct member 'core' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:194: warning: Function parameter or struct member 'core_size' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:194: warning: Function parameter or struct member 'buses' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:194: warning: Function parameter or struct member 'buses_available' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:194: warning: Excess struct member 'min_apid' description in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:194: warning: Excess struct member 'max_apid' description in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:236: warning: Function parameter or struct member 'get_core_resources' not described in 'pmic_arb_ver_ops'
drivers/spmi/spmi-pmic-arb.c:258: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_read_data'
drivers/spmi/spmi-pmic-arb.c:272: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_write_data'
>
> /**
> @@ -204,21 +218,21 @@ struct spmi_pmic_arb {
> struct pmic_arb_ver_ops {
> const char *ver_str;
> int (*get_core_resources)(struct platform_device *pdev, void __iomem *core);
> - int (*init_apid)(struct spmi_pmic_arb *pmic_arb, int index);
> - int (*ppid_to_apid)(struct spmi_pmic_arb *pmic_arb, u16 ppid);
> + int (*init_apid)(struct spmi_pmic_arb_bus *bus, int index);
> + int (*ppid_to_apid)(struct spmi_pmic_arb_bus *bus, u16 ppid);
> /* spmi commands (read_cmd, write_cmd, cmd) functionality */
> - int (*offset)(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> - enum pmic_arb_channel ch_type);
> + int (*offset)(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> + enum pmic_arb_channel ch_type);
> u32 (*fmt_cmd)(u8 opc, u8 sid, u16 addr, u8 bc);
> int (*non_data_cmd)(struct spmi_controller *ctrl, u8 opc, u8 sid);
> /* Interrupts controller functionality (offset of PIC registers) */
> - void __iomem *(*owner_acc_status)(struct spmi_pmic_arb *pmic_arb, u8 m,
> + void __iomem *(*owner_acc_status)(struct spmi_pmic_arb_bus *bus, u8 m,
> u16 n);
> - void __iomem *(*acc_enable)(struct spmi_pmic_arb *pmic_arb, u16 n);
> - void __iomem *(*irq_status)(struct spmi_pmic_arb *pmic_arb, u16 n);
> - void __iomem *(*irq_clear)(struct spmi_pmic_arb *pmic_arb, u16 n);
> + void __iomem *(*acc_enable)(struct spmi_pmic_arb_bus *bus, u16 n);
> + void __iomem *(*irq_status)(struct spmi_pmic_arb_bus *bus, u16 n);
> + void __iomem *(*irq_clear)(struct spmi_pmic_arb_bus *bus, u16 n);
> u32 (*apid_map_offset)(u16 n);
> - void __iomem *(*apid_owner)(struct spmi_pmic_arb *pmic_arb, u16 n);
> + void __iomem *(*apid_owner)(struct spmi_pmic_arb_bus *bus, u16 n);
> };
>
> static inline void pmic_arb_base_write(struct spmi_pmic_arb *pmic_arb,
> @@ -266,13 +280,14 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> void __iomem *base, u8 sid, u16 addr,
> enum pmic_arb_channel ch_type)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u32 status = 0;
> u32 timeout = PMIC_ARB_TIMEOUT_US;
> u32 offset;
> int rc;
>
> - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr, ch_type);
> + rc = pmic_arb->ver_ops->offset(bus, sid, addr, ch_type);
> if (rc < 0)
> return rc;
>
> @@ -284,21 +299,21 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
>
> if (status & PMIC_ARB_STATUS_DONE) {
> if (status & PMIC_ARB_STATUS_DENIED) {
> - dev_err(&ctrl->dev, "%s: %#x %#x: transaction denied (%#x)\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: transaction denied (%#x)\n",
> + __func__, bus->id, sid, addr, status);
Won't "dev_err(&ctrl->dev" already print the bus id ?
> return -EPERM;
> }
>
> if (status & PMIC_ARB_STATUS_FAILURE) {
> - dev_err(&ctrl->dev, "%s: %#x %#x: transaction failed (%#x)\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: transaction failed (%#x) reg: 0x%x\n",
> + __func__, bus->id, sid, addr, status, offset);
> WARN_ON(1);
> return -EIO;
> }
>
> if (status & PMIC_ARB_STATUS_DROPPED) {
> - dev_err(&ctrl->dev, "%s: %#x %#x: transaction dropped (%#x)\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: transaction dropped (%#x)\n",
> + __func__, bus->id, sid, addr, status);
> return -EIO;
> }
>
> @@ -307,8 +322,8 @@ static int pmic_arb_wait_for_done(struct spmi_controller *ctrl,
> udelay(1);
> }
>
> - dev_err(&ctrl->dev, "%s: %#x %#x: timeout, status %#x\n",
> - __func__, sid, addr, status);
> + dev_err(&ctrl->dev, "%s: %#x %#x %#x: timeout, status %#x\n",
> + __func__, bus->id, sid, addr, status);
> return -ETIMEDOUT;
> }
>
> @@ -316,12 +331,13 @@ static int
> pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid)
> {
> struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = &pmic_arb->buses[0];
> unsigned long flags;
> u32 cmd;
> int rc;
> u32 offset;
>
> - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, 0, PMIC_ARB_CHANNEL_RW);
> + rc = pmic_arb->ver_ops->offset(bus, sid, 0, PMIC_ARB_CHANNEL_RW);
> if (rc < 0)
> return rc;
>
> @@ -357,20 +373,21 @@ static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid)
> return pmic_arb->ver_ops->non_data_cmd(ctrl, opc, sid);
> }
>
> -static int pmic_arb_fmt_read_cmd(struct spmi_pmic_arb *pmic_arb, u8 opc, u8 sid,
> +static int pmic_arb_fmt_read_cmd(struct spmi_pmic_arb_bus *bus, u8 opc, u8 sid,
> u16 addr, size_t len, u32 *cmd, u32 *offset)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u8 bc = len - 1;
> int rc;
>
> - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr,
> + rc = pmic_arb->ver_ops->offset(bus, sid, addr,
> PMIC_ARB_CHANNEL_OBS);
> if (rc < 0)
> return rc;
>
> *offset = rc;
> if (bc >= PMIC_ARB_MAX_TRANS_BYTES) {
> - dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested",
> + dev_err(&bus->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested",
> PMIC_ARB_MAX_TRANS_BYTES, len);
> return -EINVAL;
> }
> @@ -394,7 +411,8 @@ static int pmic_arb_read_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd,
> u32 offset, u8 sid, u16 addr, u8 *buf,
> size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u8 bc = len - 1;
> int rc;
>
> @@ -416,12 +434,13 @@ static int pmic_arb_read_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd,
> static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
> u16 addr, u8 *buf, size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> unsigned long flags;
> u32 cmd, offset;
> int rc;
>
> - rc = pmic_arb_fmt_read_cmd(pmic_arb, opc, sid, addr, len, &cmd,
> + rc = pmic_arb_fmt_read_cmd(bus, opc, sid, addr, len, &cmd,
> &offset);
> if (rc)
> return rc;
> @@ -433,21 +452,22 @@ static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
> return rc;
> }
>
> -static int pmic_arb_fmt_write_cmd(struct spmi_pmic_arb *pmic_arb, u8 opc,
> +static int pmic_arb_fmt_write_cmd(struct spmi_pmic_arb_bus *bus, u8 opc,
> u8 sid, u16 addr, size_t len, u32 *cmd,
> u32 *offset)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u8 bc = len - 1;
> int rc;
>
> - rc = pmic_arb->ver_ops->offset(pmic_arb, sid, addr,
> + rc = pmic_arb->ver_ops->offset(bus, sid, addr,
> PMIC_ARB_CHANNEL_RW);
> if (rc < 0)
> return rc;
>
> *offset = rc;
> if (bc >= PMIC_ARB_MAX_TRANS_BYTES) {
> - dev_err(&pmic_arb->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested",
> + dev_err(&bus->spmic->dev, "pmic-arb supports 1..%d bytes per trans, but:%zu requested",
> PMIC_ARB_MAX_TRANS_BYTES, len);
> return -EINVAL;
> }
> @@ -473,7 +493,8 @@ static int pmic_arb_write_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd,
> u32 offset, u8 sid, u16 addr,
> const u8 *buf, size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u8 bc = len - 1;
>
> /* Write data to FIFOs */
> @@ -492,12 +513,13 @@ static int pmic_arb_write_cmd_unlocked(struct spmi_controller *ctrl, u32 cmd,
> static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
> u16 addr, const u8 *buf, size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> unsigned long flags;
> u32 cmd, offset;
> int rc;
>
> - rc = pmic_arb_fmt_write_cmd(pmic_arb, opc, sid, addr, len, &cmd,
> + rc = pmic_arb_fmt_write_cmd(bus, opc, sid, addr, len, &cmd,
> &offset);
> if (rc)
> return rc;
> @@ -513,18 +535,19 @@ static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid,
> static int pmic_arb_masked_write(struct spmi_controller *ctrl, u8 sid, u16 addr,
> const u8 *buf, const u8 *mask, size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb_bus *bus = spmi_controller_get_drvdata(ctrl);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u32 read_cmd, read_offset, write_cmd, write_offset;
> u8 temp[PMIC_ARB_MAX_TRANS_BYTES];
> unsigned long flags;
> int rc, i;
>
> - rc = pmic_arb_fmt_read_cmd(pmic_arb, SPMI_CMD_EXT_READL, sid, addr, len,
> + rc = pmic_arb_fmt_read_cmd(bus, SPMI_CMD_EXT_READL, sid, addr, len,
> &read_cmd, &read_offset);
> if (rc)
> return rc;
>
> - rc = pmic_arb_fmt_write_cmd(pmic_arb, SPMI_CMD_EXT_WRITEL, sid, addr,
> + rc = pmic_arb_fmt_write_cmd(bus, SPMI_CMD_EXT_WRITEL, sid, addr,
> len, &write_cmd, &write_offset);
> if (rc)
> return rc;
> @@ -567,25 +590,25 @@ struct spmi_pmic_arb_qpnpint_type {
> static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf,
> size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> u8 sid = hwirq_to_sid(d->hwirq);
> u8 per = hwirq_to_per(d->hwirq);
>
> - if (pmic_arb_write_cmd(pmic_arb->spmic, SPMI_CMD_EXT_WRITEL, sid,
> + if (pmic_arb_write_cmd(bus->spmic, SPMI_CMD_EXT_WRITEL, sid,
> (per << 8) + reg, buf, len))
> - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n",
> + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x\n",
> d->irq);
> }
>
> static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> u8 sid = hwirq_to_sid(d->hwirq);
> u8 per = hwirq_to_per(d->hwirq);
>
> - if (pmic_arb_read_cmd(pmic_arb->spmic, SPMI_CMD_EXT_READL, sid,
> + if (pmic_arb_read_cmd(bus->spmic, SPMI_CMD_EXT_READL, sid,
> (per << 8) + reg, buf, len))
> - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x\n",
> + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x\n",
> d->irq);
> }
>
> @@ -593,47 +616,49 @@ static int qpnpint_spmi_masked_write(struct irq_data *d, u8 reg,
> const void *buf, const void *mask,
> size_t len)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> u8 sid = hwirq_to_sid(d->hwirq);
> u8 per = hwirq_to_per(d->hwirq);
> int rc;
>
> - rc = pmic_arb_masked_write(pmic_arb->spmic, sid, (per << 8) + reg, buf,
> + rc = pmic_arb_masked_write(bus->spmic, sid, (per << 8) + reg, buf,
> mask, len);
> if (rc)
> - dev_err_ratelimited(&pmic_arb->spmic->dev, "failed irqchip transaction on %x rc=%d\n",
> + dev_err_ratelimited(&bus->spmic->dev, "failed irqchip transaction on %x rc=%d\n",
> d->irq, rc);
> return rc;
> }
>
> -static void cleanup_irq(struct spmi_pmic_arb *pmic_arb, u16 apid, int id)
> +static void cleanup_irq(struct spmi_pmic_arb_bus *bus, u16 apid, int id)
> {
> - u16 ppid = pmic_arb->apid_data[apid].ppid;
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> + u16 ppid = bus->apid_data[apid].ppid;
> u8 sid = ppid >> 8;
> u8 per = ppid & 0xFF;
> u8 irq_mask = BIT(id);
>
> - dev_err_ratelimited(&pmic_arb->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n",
> - __func__, apid, sid, per, id);
> - writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
> + dev_err_ratelimited(&bus->spmic->dev, "%s apid=%d sid=0x%x per=0x%x irq=%d\n",
> + __func__, apid, sid, per, id);
> + writel_relaxed(irq_mask, pmic_arb->ver_ops->irq_clear(bus, apid));
> }
>
> -static int periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid)
> +static int periph_interrupt(struct spmi_pmic_arb_bus *bus, u16 apid)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> unsigned int irq;
> u32 status, id;
> int handled = 0;
> - u8 sid = (pmic_arb->apid_data[apid].ppid >> 8) & 0xF;
> - u8 per = pmic_arb->apid_data[apid].ppid & 0xFF;
> + u8 sid = (bus->apid_data[apid].ppid >> 8) & 0xF;
> + u8 per = bus->apid_data[apid].ppid & 0xFF;
>
> - status = readl_relaxed(pmic_arb->ver_ops->irq_status(pmic_arb, apid));
> + status = readl_relaxed(pmic_arb->ver_ops->irq_status(bus, apid));
> while (status) {
> id = ffs(status) - 1;
> status &= ~BIT(id);
> - irq = irq_find_mapping(pmic_arb->domain,
> - spec_to_hwirq(sid, per, id, apid));
> + irq = irq_find_mapping(bus->domain,
> + spec_to_hwirq(sid, per, id, apid));
> if (irq == 0) {
> - cleanup_irq(pmic_arb, apid, id);
> + cleanup_irq(bus, apid, id);
> continue;
> }
> generic_handle_irq(irq);
> @@ -645,16 +670,17 @@ static int periph_interrupt(struct spmi_pmic_arb *pmic_arb, u16 apid)
>
> static void pmic_arb_chained_irq(struct irq_desc *desc)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_desc_get_handler_data(desc);
> + struct spmi_pmic_arb_bus *bus = irq_desc_get_handler_data(desc);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops;
> struct irq_chip *chip = irq_desc_get_chip(desc);
> - int first = pmic_arb->min_apid;
> - int last = pmic_arb->max_apid;
> + int first = bus->min_apid;
> + int last = bus->max_apid;
> /*
> * acc_offset will be non-zero for the secondary SPMI bus instance on
> * v7 controllers.
> */
> - int acc_offset = pmic_arb->base_apid >> 5;
> + int acc_offset = bus->base_apid >> 5;
> u8 ee = pmic_arb->ee;
> u32 status, enable, handled = 0;
> int i, id, apid;
> @@ -665,7 +691,7 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
> chained_irq_enter(chip, desc);
>
> for (i = first >> 5; i <= last >> 5; ++i) {
> - status = readl_relaxed(ver_ops->owner_acc_status(pmic_arb, ee, i - acc_offset));
> + status = readl_relaxed(ver_ops->owner_acc_status(bus, ee, i - acc_offset));
> if (status)
> acc_valid = true;
>
> @@ -679,9 +705,9 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
> continue;
> }
> enable = readl_relaxed(
> - ver_ops->acc_enable(pmic_arb, apid));
> + ver_ops->acc_enable(bus, apid));
> if (enable & SPMI_PIC_ACC_ENABLE_BIT)
> - if (periph_interrupt(pmic_arb, apid) != 0)
> + if (periph_interrupt(bus, apid) != 0)
> handled++;
> }
> }
> @@ -690,19 +716,19 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
> if (!acc_valid) {
> for (i = first; i <= last; i++) {
> /* skip if APPS is not irq owner */
> - if (pmic_arb->apid_data[i].irq_ee != pmic_arb->ee)
> + if (bus->apid_data[i].irq_ee != pmic_arb->ee)
> continue;
>
> irq_status = readl_relaxed(
> - ver_ops->irq_status(pmic_arb, i));
> + ver_ops->irq_status(bus, i));
> if (irq_status) {
> enable = readl_relaxed(
> - ver_ops->acc_enable(pmic_arb, i));
> + ver_ops->acc_enable(bus, i));
> if (enable & SPMI_PIC_ACC_ENABLE_BIT) {
> - dev_dbg(&pmic_arb->spmic->dev,
> + dev_dbg(&bus->spmic->dev,
> "Dispatching IRQ for apid=%d status=%x\n",
> i, irq_status);
> - if (periph_interrupt(pmic_arb, i) != 0)
> + if (periph_interrupt(bus, i) != 0)
> handled++;
> }
> }
> @@ -717,12 +743,13 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
>
> static void qpnpint_irq_ack(struct irq_data *d)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u8 irq = hwirq_to_irq(d->hwirq);
> u16 apid = hwirq_to_apid(d->hwirq);
> u8 data;
>
> - writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(pmic_arb, apid));
> + writel_relaxed(BIT(irq), pmic_arb->ver_ops->irq_clear(bus, apid));
>
> data = BIT(irq);
> qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &data, 1);
> @@ -738,14 +765,15 @@ static void qpnpint_irq_mask(struct irq_data *d)
>
> static void qpnpint_irq_unmask(struct irq_data *d)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> const struct pmic_arb_ver_ops *ver_ops = pmic_arb->ver_ops;
> u8 irq = hwirq_to_irq(d->hwirq);
> u16 apid = hwirq_to_apid(d->hwirq);
> u8 buf[2];
>
> writel_relaxed(SPMI_PIC_ACC_ENABLE_BIT,
> - ver_ops->acc_enable(pmic_arb, apid));
> + ver_ops->acc_enable(bus, apid));
>
> qpnpint_spmi_read(d, QPNPINT_REG_EN_SET, &buf[0], 1);
> if (!(buf[0] & BIT(irq))) {
> @@ -802,9 +830,9 @@ static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type)
>
> static int qpnpint_irq_set_wake(struct irq_data *d, unsigned int on)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
>
> - return irq_set_irq_wake(pmic_arb->irq, on);
> + return irq_set_irq_wake(bus->irq, on);
> }
>
> static int qpnpint_get_irqchip_state(struct irq_data *d,
> @@ -826,17 +854,18 @@ static int qpnpint_get_irqchip_state(struct irq_data *d,
> static int qpnpint_irq_domain_activate(struct irq_domain *domain,
> struct irq_data *d, bool reserve)
> {
> - struct spmi_pmic_arb *pmic_arb = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb_bus *bus = irq_data_get_irq_chip_data(d);
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u16 periph = hwirq_to_per(d->hwirq);
> u16 apid = hwirq_to_apid(d->hwirq);
> u16 sid = hwirq_to_sid(d->hwirq);
> u16 irq = hwirq_to_irq(d->hwirq);
> u8 buf;
>
> - if (pmic_arb->apid_data[apid].irq_ee != pmic_arb->ee) {
> - dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n",
> + if (bus->apid_data[apid].irq_ee != pmic_arb->ee) {
> + dev_err(&bus->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u: ee=%u but owner=%u\n",
> sid, periph, irq, pmic_arb->ee,
> - pmic_arb->apid_data[apid].irq_ee);
> + bus->apid_data[apid].irq_ee);
> return -ENODEV;
> }
>
> @@ -863,15 +892,16 @@ static int qpnpint_irq_domain_translate(struct irq_domain *d,
> unsigned long *out_hwirq,
> unsigned int *out_type)
> {
> - struct spmi_pmic_arb *pmic_arb = d->host_data;
> + struct spmi_pmic_arb_bus *bus = d->host_data;
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u32 *intspec = fwspec->param;
> u16 apid, ppid;
> int rc;
>
> - dev_dbg(&pmic_arb->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n",
> + dev_dbg(&bus->spmic->dev, "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n",
> intspec[0], intspec[1], intspec[2]);
>
> - if (irq_domain_get_of_node(d) != pmic_arb->spmic->dev.of_node)
> + if (irq_domain_get_of_node(d) != bus->spmic->dev.of_node)
> return -EINVAL;
> if (fwspec->param_count != 4)
> return -EINVAL;
> @@ -879,37 +909,38 @@ static int qpnpint_irq_domain_translate(struct irq_domain *d,
> return -EINVAL;
>
> ppid = intspec[0] << 8 | intspec[1];
> - rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid);
> + rc = pmic_arb->ver_ops->ppid_to_apid(bus, ppid);
> if (rc < 0) {
> - dev_err(&pmic_arb->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n",
> - intspec[0], intspec[1], intspec[2], rc);
> + dev_err(&bus->spmic->dev, "failed to xlate sid = %#x, periph = %#x, irq = %u rc = %d\n",
> + intspec[0], intspec[1], intspec[2], rc);
> return rc;
> }
>
> apid = rc;
> /* Keep track of {max,min}_apid for bounding search during interrupt */
> - if (apid > pmic_arb->max_apid)
> - pmic_arb->max_apid = apid;
> - if (apid < pmic_arb->min_apid)
> - pmic_arb->min_apid = apid;
> + if (apid > bus->max_apid)
> + bus->max_apid = apid;
> + if (apid < bus->min_apid)
> + bus->min_apid = apid;
>
> *out_hwirq = spec_to_hwirq(intspec[0], intspec[1], intspec[2], apid);
> *out_type = intspec[3] & IRQ_TYPE_SENSE_MASK;
>
> - dev_dbg(&pmic_arb->spmic->dev, "out_hwirq = %lu\n", *out_hwirq);
> + dev_dbg(&bus->spmic->dev, "out_hwirq = %lu\n", *out_hwirq);
>
> return 0;
> }
>
> static struct lock_class_key qpnpint_irq_lock_class, qpnpint_irq_request_class;
>
> -static void qpnpint_irq_domain_map(struct spmi_pmic_arb *pmic_arb,
> +static void qpnpint_irq_domain_map(struct spmi_pmic_arb_bus *bus,
> struct irq_domain *domain, unsigned int virq,
> irq_hw_number_t hwirq, unsigned int type)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> irq_flow_handler_t handler;
>
> - dev_dbg(&pmic_arb->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n",
> + dev_dbg(&bus->spmic->dev, "virq = %u, hwirq = %lu, type = %u\n",
> virq, hwirq, type);
>
> if (type & IRQ_TYPE_EDGE_BOTH)
> @@ -928,7 +959,7 @@ static int qpnpint_irq_domain_alloc(struct irq_domain *domain,
> unsigned int virq, unsigned int nr_irqs,
> void *data)
> {
> - struct spmi_pmic_arb *pmic_arb = domain->host_data;
> + struct spmi_pmic_arb_bus *bus = domain->host_data;
> struct irq_fwspec *fwspec = data;
> irq_hw_number_t hwirq;
> unsigned int type;
> @@ -939,20 +970,22 @@ static int qpnpint_irq_domain_alloc(struct irq_domain *domain,
> return ret;
>
> for (i = 0; i < nr_irqs; i++)
> - qpnpint_irq_domain_map(pmic_arb, domain, virq + i, hwirq + i,
> + qpnpint_irq_domain_map(bus, domain, virq + i, hwirq + i,
> type);
>
> return 0;
> }
>
> -static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb *pmic_arb)
> +static int pmic_arb_init_apid_min_max(struct spmi_pmic_arb_bus *bus)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> +
> /*
> * Initialize max_apid/min_apid to the opposite bounds, during
> * the irq domain translation, we are sure to update these
> */
> - pmic_arb->max_apid = 0;
> - pmic_arb->min_apid = pmic_arb->max_periphs - 1;
> + bus->max_apid = 0;
> + bus->min_apid = pmic_arb->max_periphs - 1;
>
> return 0;
> }
> @@ -970,43 +1003,44 @@ static int pmic_arb_get_core_resources_v1(struct platform_device *pdev,
> return 0;
> }
>
> -static int pmic_arb_init_apid_v1(struct spmi_pmic_arb *pmic_arb, int index)
> +static int pmic_arb_init_apid_v1(struct spmi_pmic_arb_bus *bus, int index)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u32 *mapping_table;
>
> if (index) {
> - dev_err(&pmic_arb->spmic->dev, "Unsupported buses count %d detected\n",
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> index);
> return -EINVAL;
> }
>
> - mapping_table = devm_kcalloc(&pmic_arb->spmic->dev, pmic_arb->max_periphs,
> + mapping_table = devm_kcalloc(&bus->spmic->dev, pmic_arb->max_periphs,
> sizeof(*mapping_table), GFP_KERNEL);
> if (!mapping_table)
> return -ENOMEM;
>
> - pmic_arb->mapping_table = mapping_table;
> + bus->mapping_table = mapping_table;
>
> - return pmic_arb_init_apid_min_max(pmic_arb);
> + return pmic_arb_init_apid_min_max(bus);
> }
>
> -static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> +static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb_bus *bus, u16 ppid)
> {
> - u32 *mapping_table = pmic_arb->mapping_table;
> + u32 *mapping_table = bus->mapping_table;
> int index = 0, i;
> u16 apid_valid;
> u16 apid;
> u32 data;
>
> - apid_valid = pmic_arb->ppid_to_apid[ppid];
> + apid_valid = bus->ppid_to_apid[ppid];
> if (apid_valid & PMIC_ARB_APID_VALID) {
> apid = apid_valid & ~PMIC_ARB_APID_VALID;
> return apid;
> }
>
> for (i = 0; i < SPMI_MAPPING_TABLE_TREE_DEPTH; ++i) {
> - if (!test_and_set_bit(index, pmic_arb->mapping_table_valid))
> - mapping_table[index] = readl_relaxed(pmic_arb->cnfg +
> + if (!test_and_set_bit(index, bus->mapping_table_valid))
> + mapping_table[index] = readl_relaxed(bus->cnfg +
> SPMI_MAPPING_TABLE_REG(index));
>
> data = mapping_table[index];
> @@ -1016,9 +1050,9 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> index = SPMI_MAPPING_BIT_IS_1_RESULT(data);
> } else {
> apid = SPMI_MAPPING_BIT_IS_1_RESULT(data);
> - pmic_arb->ppid_to_apid[ppid]
> + bus->ppid_to_apid[ppid]
> = apid | PMIC_ARB_APID_VALID;
> - pmic_arb->apid_data[apid].ppid = ppid;
> + bus->apid_data[apid].ppid = ppid;
> return apid;
> }
> } else {
> @@ -1026,9 +1060,9 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> index = SPMI_MAPPING_BIT_IS_0_RESULT(data);
> } else {
> apid = SPMI_MAPPING_BIT_IS_0_RESULT(data);
> - pmic_arb->ppid_to_apid[ppid]
> + bus->ppid_to_apid[ppid]
> = apid | PMIC_ARB_APID_VALID;
> - pmic_arb->apid_data[apid].ppid = ppid;
> + bus->apid_data[apid].ppid = ppid;
> return apid;
> }
> }
> @@ -1038,24 +1072,26 @@ static int pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> }
>
> /* v1 offset per ee */
> -static int pmic_arb_offset_v1(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> - enum pmic_arb_channel ch_type)
> +static int pmic_arb_offset_v1(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> + enum pmic_arb_channel ch_type)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return 0x800 + 0x80 * pmic_arb->channel;
> }
>
> -static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> +static u16 pmic_arb_find_apid(struct spmi_pmic_arb_bus *bus, u16 ppid)
> {
> - struct apid_data *apidd = &pmic_arb->apid_data[pmic_arb->last_apid];
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> + struct apid_data *apidd = &bus->apid_data[bus->last_apid];
> u32 regval, offset;
> u16 id, apid;
>
> - for (apid = pmic_arb->last_apid; ; apid++, apidd++) {
> + for (apid = bus->last_apid; ; apid++, apidd++) {
> offset = pmic_arb->ver_ops->apid_map_offset(apid);
> if (offset >= pmic_arb->core_size)
> break;
>
> - regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(pmic_arb,
> + regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus,
> apid));
> apidd->irq_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval);
> apidd->write_ee = apidd->irq_ee;
> @@ -1065,14 +1101,14 @@ static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> continue;
>
> id = (regval >> 8) & PMIC_ARB_PPID_MASK;
> - pmic_arb->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID;
> + bus->ppid_to_apid[id] = apid | PMIC_ARB_APID_VALID;
> apidd->ppid = id;
> if (id == ppid) {
> apid |= PMIC_ARB_APID_VALID;
> break;
> }
> }
> - pmic_arb->last_apid = apid & ~PMIC_ARB_APID_VALID;
> + bus->last_apid = apid & ~PMIC_ARB_APID_VALID;
>
> return apid;
> }
> @@ -1104,21 +1140,22 @@ static int pmic_arb_get_core_resources_v2(struct platform_device *pdev,
> return pmic_arb_get_obsrvr_chnls_v2(pdev);
> }
>
> -static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> +static int pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb_bus *bus, u16 ppid)
> {
> u16 apid_valid;
>
> - apid_valid = pmic_arb->ppid_to_apid[ppid];
> + apid_valid = bus->ppid_to_apid[ppid];
> if (!(apid_valid & PMIC_ARB_APID_VALID))
> - apid_valid = pmic_arb_find_apid(pmic_arb, ppid);
> + apid_valid = pmic_arb_find_apid(bus, ppid);
> if (!(apid_valid & PMIC_ARB_APID_VALID))
> return -ENODEV;
>
> return apid_valid & ~PMIC_ARB_APID_VALID;
> }
>
> -static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
> +static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb_bus *bus)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> struct apid_data *apidd;
> struct apid_data *prev_apidd;
> u16 i, apid, ppid, apid_max;
> @@ -1140,9 +1177,9 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
> * where N = number of APIDs supported by the primary bus and
> * M = number of APIDs supported by the secondary bus
> */
> - apidd = &pmic_arb->apid_data[pmic_arb->base_apid];
> - apid_max = pmic_arb->base_apid + pmic_arb->apid_count;
> - for (i = pmic_arb->base_apid; i < apid_max; i++, apidd++) {
> + apidd = &bus->apid_data[bus->base_apid];
> + apid_max = bus->base_apid + bus->apid_count;
> + for (i = bus->base_apid; i < apid_max; i++, apidd++) {
> offset = pmic_arb->ver_ops->apid_map_offset(i);
> if (offset >= pmic_arb->core_size)
> break;
> @@ -1153,19 +1190,18 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
> ppid = (regval >> 8) & PMIC_ARB_PPID_MASK;
> is_irq_ee = PMIC_ARB_CHAN_IS_IRQ_OWNER(regval);
>
> - regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(pmic_arb,
> - i));
> + regval = readl_relaxed(pmic_arb->ver_ops->apid_owner(bus, i));
> apidd->write_ee = SPMI_OWNERSHIP_PERIPH2OWNER(regval);
>
> apidd->irq_ee = is_irq_ee ? apidd->write_ee : INVALID_EE;
>
> - valid = pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID;
> - apid = pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
> - prev_apidd = &pmic_arb->apid_data[apid];
> + valid = bus->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID;
> + apid = bus->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
> + prev_apidd = &bus->apid_data[apid];
>
> if (!valid || apidd->write_ee == pmic_arb->ee) {
> /* First PPID mapping or one for this EE */
> - pmic_arb->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
> + bus->ppid_to_apid[ppid] = i | PMIC_ARB_APID_VALID;
> } else if (valid && is_irq_ee &&
> prev_apidd->write_ee == pmic_arb->ee) {
> /*
> @@ -1176,42 +1212,43 @@ static int pmic_arb_read_apid_map_v5(struct spmi_pmic_arb *pmic_arb)
> }
>
> apidd->ppid = ppid;
> - pmic_arb->last_apid = i;
> + bus->last_apid = i;
> }
>
> /* Dump the mapping table for debug purposes. */
> - dev_dbg(&pmic_arb->spmic->dev, "PPID APID Write-EE IRQ-EE\n");
> + dev_dbg(&bus->spmic->dev, "PPID APID Write-EE IRQ-EE\n");
> for (ppid = 0; ppid < PMIC_ARB_MAX_PPID; ppid++) {
> - apid = pmic_arb->ppid_to_apid[ppid];
> + apid = bus->ppid_to_apid[ppid];
> if (apid & PMIC_ARB_APID_VALID) {
> apid &= ~PMIC_ARB_APID_VALID;
> - apidd = &pmic_arb->apid_data[apid];
> - dev_dbg(&pmic_arb->spmic->dev, "%#03X %3u %2u %2u\n",
> - ppid, apid, apidd->write_ee, apidd->irq_ee);
> + apidd = &bus->apid_data[apid];
> + dev_dbg(&bus->spmic->dev, "%#03X %3u %2u %2u\n",
> + ppid, apid, apidd->write_ee, apidd->irq_ee);
> }
> }
>
> return 0;
> }
>
> -static int pmic_arb_ppid_to_apid_v5(struct spmi_pmic_arb *pmic_arb, u16 ppid)
> +static int pmic_arb_ppid_to_apid_v5(struct spmi_pmic_arb_bus *bus, u16 ppid)
> {
> - if (!(pmic_arb->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID))
> + if (!(bus->ppid_to_apid[ppid] & PMIC_ARB_APID_VALID))
> return -ENODEV;
>
> - return pmic_arb->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
> + return bus->ppid_to_apid[ppid] & ~PMIC_ARB_APID_VALID;
> }
>
> /* v2 offset per ppid and per ee */
> -static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> - enum pmic_arb_channel ch_type)
> +static int pmic_arb_offset_v2(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> + enum pmic_arb_channel ch_type)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u16 apid;
> u16 ppid;
> int rc;
>
> ppid = sid << 8 | ((addr >> 8) & 0xFF);
> - rc = pmic_arb_ppid_to_apid_v2(pmic_arb, ppid);
> + rc = pmic_arb_ppid_to_apid_v2(bus, ppid);
> if (rc < 0)
> return rc;
>
> @@ -1219,33 +1256,34 @@ static int pmic_arb_offset_v2(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> return 0x1000 * pmic_arb->ee + 0x8000 * apid;
> }
>
> -static int pmic_arb_init_apid_v5(struct spmi_pmic_arb *pmic_arb, int index)
> +static int pmic_arb_init_apid_v5(struct spmi_pmic_arb_bus *bus, int index)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> int ret;
>
> if (index) {
> - dev_err(&pmic_arb->spmic->dev, "Unsupported buses count %d detected\n",
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> index);
> return -EINVAL;
> }
>
> - pmic_arb->base_apid = 0;
> - pmic_arb->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> + bus->base_apid = 0;
> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> PMIC_ARB_FEATURES_PERIPH_MASK;
>
> - if (pmic_arb->base_apid + pmic_arb->apid_count > pmic_arb->max_periphs) {
> - dev_err(&pmic_arb->spmic->dev, "Unsupported APID count %d detected\n",
> - pmic_arb->base_apid + pmic_arb->apid_count);
> + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) {
> + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n",
> + bus->base_apid + bus->apid_count);
> return -EINVAL;
> }
>
> - ret = pmic_arb_init_apid_min_max(pmic_arb);
> + ret = pmic_arb_init_apid_min_max(bus);
> if (ret)
> return ret;
>
> - ret = pmic_arb_read_apid_map_v5(pmic_arb);
> + ret = pmic_arb_read_apid_map_v5(bus);
> if (ret) {
> - dev_err(&pmic_arb->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> ret);
> return ret;
> }
> @@ -1257,15 +1295,16 @@ static int pmic_arb_init_apid_v5(struct spmi_pmic_arb *pmic_arb, int index)
> * v5 offset per ee and per apid for observer channels and per apid for
> * read/write channels.
> */
> -static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> - enum pmic_arb_channel ch_type)
> +static int pmic_arb_offset_v5(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> + enum pmic_arb_channel ch_type)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u16 apid;
> int rc;
> u32 offset = 0;
> u16 ppid = (sid << 8) | (addr >> 8);
>
> - rc = pmic_arb_ppid_to_apid_v5(pmic_arb, ppid);
> + rc = pmic_arb_ppid_to_apid_v5(bus, ppid);
> if (rc < 0)
> return rc;
>
> @@ -1275,8 +1314,8 @@ static int pmic_arb_offset_v5(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> offset = 0x10000 * pmic_arb->ee + 0x80 * apid;
> break;
> case PMIC_ARB_CHANNEL_RW:
> - if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) {
> - dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n",
> + if (bus->apid_data[apid].write_ee != pmic_arb->ee) {
> + dev_err(&bus->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n",
> sid, addr);
> return -EPERM;
> }
> @@ -1303,38 +1342,39 @@ static int pmic_arb_get_core_resources_v7(struct platform_device *pdev,
> * Only v7 supports 2 buses. Each bus will get a different apid count, read
> * from different registers.
> */
> -static int pmic_arb_init_apid_v7(struct spmi_pmic_arb *pmic_arb, int index)
> +static int pmic_arb_init_apid_v7(struct spmi_pmic_arb_bus *bus, int index)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> int ret;
>
> if (index == 0) {
> - pmic_arb->base_apid = 0;
> - pmic_arb->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> + bus->base_apid = 0;
> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> PMIC_ARB_FEATURES_PERIPH_MASK;
> } else if (index == 1) {
> - pmic_arb->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> + bus->base_apid = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES) &
> PMIC_ARB_FEATURES_PERIPH_MASK;
> - pmic_arb->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) &
> + bus->apid_count = readl_relaxed(pmic_arb->core + PMIC_ARB_FEATURES1) &
> PMIC_ARB_FEATURES_PERIPH_MASK;
> } else {
> - dev_err(&pmic_arb->spmic->dev, "Unsupported buses count %d detected\n",
> - index);
> + dev_err(&bus->spmic->dev, "Unsupported buses count %d detected\n",
> + bus->id);
> return -EINVAL;
> }
>
> - if (pmic_arb->base_apid + pmic_arb->apid_count > pmic_arb->max_periphs) {
> - dev_err(&pmic_arb->spmic->dev, "Unsupported APID count %d detected\n",
> - pmic_arb->base_apid + pmic_arb->apid_count);
> + if (bus->base_apid + bus->apid_count > pmic_arb->max_periphs) {
> + dev_err(&bus->spmic->dev, "Unsupported APID count %d detected\n",
> + bus->base_apid + bus->apid_count);
> return -EINVAL;
> }
>
> - ret = pmic_arb_init_apid_min_max(pmic_arb);
> + ret = pmic_arb_init_apid_min_max(bus);
> if (ret)
> return ret;
>
> - ret = pmic_arb_read_apid_map_v5(pmic_arb);
> + ret = pmic_arb_read_apid_map_v5(bus);
> if (ret) {
> - dev_err(&pmic_arb->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> + dev_err(&bus->spmic->dev, "could not read APID->PPID mapping table, rc= %d\n",
> ret);
> return ret;
> }
> @@ -1346,15 +1386,16 @@ static int pmic_arb_init_apid_v7(struct spmi_pmic_arb *pmic_arb, int index)
> * v7 offset per ee and per apid for observer channels and per apid for
> * read/write channels.
> */
> -static int pmic_arb_offset_v7(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> - enum pmic_arb_channel ch_type)
> +static int pmic_arb_offset_v7(struct spmi_pmic_arb_bus *bus, u8 sid, u16 addr,
> + enum pmic_arb_channel ch_type)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> u16 apid;
> int rc;
> u32 offset = 0;
> u16 ppid = (sid << 8) | (addr >> 8);
>
> - rc = pmic_arb->ver_ops->ppid_to_apid(pmic_arb, ppid);
> + rc = pmic_arb->ver_ops->ppid_to_apid(bus, ppid);
> if (rc < 0)
> return rc;
>
> @@ -1364,8 +1405,8 @@ static int pmic_arb_offset_v7(struct spmi_pmic_arb *pmic_arb, u8 sid, u16 addr,
> offset = 0x8000 * pmic_arb->ee + 0x20 * apid;
> break;
> case PMIC_ARB_CHANNEL_RW:
> - if (pmic_arb->apid_data[apid].write_ee != pmic_arb->ee) {
> - dev_err(&pmic_arb->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n",
> + if (bus->apid_data[apid].write_ee != pmic_arb->ee) {
> + dev_err(&bus->spmic->dev, "disallowed SPMI write to sid=%u, addr=0x%04X\n",
> sid, addr);
> return -EPERM;
> }
> @@ -1387,104 +1428,110 @@ static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 sid, u16 addr, u8 bc)
> }
>
> static void __iomem *
> -pmic_arb_owner_acc_status_v1(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
> +pmic_arb_owner_acc_status_v1(struct spmi_pmic_arb_bus *bus, u8 m, u16 n)
> {
> - return pmic_arb->intr + 0x20 * m + 0x4 * n;
> + return bus->intr + 0x20 * m + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_owner_acc_status_v2(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
> +pmic_arb_owner_acc_status_v2(struct spmi_pmic_arb_bus *bus, u8 m, u16 n)
> {
> - return pmic_arb->intr + 0x100000 + 0x1000 * m + 0x4 * n;
> + return bus->intr + 0x100000 + 0x1000 * m + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_owner_acc_status_v3(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
> +pmic_arb_owner_acc_status_v3(struct spmi_pmic_arb_bus *bus, u8 m, u16 n)
> {
> - return pmic_arb->intr + 0x200000 + 0x1000 * m + 0x4 * n;
> + return bus->intr + 0x200000 + 0x1000 * m + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_owner_acc_status_v5(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
> +pmic_arb_owner_acc_status_v5(struct spmi_pmic_arb_bus *bus, u8 m, u16 n)
> {
> - return pmic_arb->intr + 0x10000 * m + 0x4 * n;
> + return bus->intr + 0x10000 * m + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_owner_acc_status_v7(struct spmi_pmic_arb *pmic_arb, u8 m, u16 n)
> +pmic_arb_owner_acc_status_v7(struct spmi_pmic_arb_bus *bus, u8 m, u16 n)
> {
> - return pmic_arb->intr + 0x1000 * m + 0x4 * n;
> + return bus->intr + 0x1000 * m + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_acc_enable_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_acc_enable_v1(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0x200 + 0x4 * n;
> + return bus->intr + 0x200 + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_acc_enable_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_acc_enable_v2(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0x1000 * n;
> + return bus->intr + 0x1000 * n;
> }
>
> static void __iomem *
> -pmic_arb_acc_enable_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_acc_enable_v5(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x100 + 0x10000 * n;
> }
>
> static void __iomem *
> -pmic_arb_acc_enable_v7(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_acc_enable_v7(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x100 + 0x1000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_status_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_status_v1(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0x600 + 0x4 * n;
> + return bus->intr + 0x600 + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_status_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_status_v2(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0x4 + 0x1000 * n;
> + return bus->intr + 0x4 + 0x1000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_status_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_status_v5(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x104 + 0x10000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_status_v7(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_status_v7(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x104 + 0x1000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_clear_v1(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_clear_v1(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0xA00 + 0x4 * n;
> + return bus->intr + 0xA00 + 0x4 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_clear_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_clear_v2(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->intr + 0x8 + 0x1000 * n;
> + return bus->intr + 0x8 + 0x1000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_clear_v5(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_clear_v5(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x108 + 0x10000 * n;
> }
>
> static void __iomem *
> -pmic_arb_irq_clear_v7(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_irq_clear_v7(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> + struct spmi_pmic_arb *pmic_arb = bus->pmic_arb;
> return pmic_arb->wr_base + 0x108 + 0x1000 * n;
> }
>
> @@ -1504,9 +1551,9 @@ static u32 pmic_arb_apid_map_offset_v7(u16 n)
> }
>
> static void __iomem *
> -pmic_arb_apid_owner_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_apid_owner_v2(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->cnfg + 0x700 + 0x4 * n;
> + return bus->cnfg + 0x700 + 0x4 * n;
> }
>
> /*
> @@ -1515,9 +1562,9 @@ pmic_arb_apid_owner_v2(struct spmi_pmic_arb *pmic_arb, u16 n)
> * 0.
> */
> static void __iomem *
> -pmic_arb_apid_owner_v7(struct spmi_pmic_arb *pmic_arb, u16 n)
> +pmic_arb_apid_owner_v7(struct spmi_pmic_arb_bus *bus, u16 n)
> {
> - return pmic_arb->cnfg + 0x4 * (n - pmic_arb->base_apid);
> + return bus->cnfg + 0x4 * (n - bus->base_apid);
> }
>
> static const struct pmic_arb_ver_ops pmic_arb_v1 = {
> @@ -1607,29 +1654,159 @@ static const struct irq_domain_ops pmic_arb_irq_domain_ops = {
> .translate = qpnpint_irq_domain_translate,
> };
>
> +static int spmi_pmic_arb_bus_init(struct platform_device *pdev,
> + struct device_node *node,
> + struct spmi_pmic_arb *pmic_arb)
> +{
> + int bus_index = pmic_arb->buses_available;
> + struct spmi_pmic_arb_bus *bus = &pmic_arb->buses[bus_index];
> + struct device *dev = &pdev->dev;
> + struct spmi_controller *ctrl;
> + void __iomem *intr;
> + void __iomem *cnfg;
> + int index, ret;
> + u32 irq;
> +
> + ctrl = devm_spmi_controller_alloc(dev, sizeof(*ctrl));
> + if (IS_ERR(ctrl))
> + return PTR_ERR(ctrl);
> +
> + ctrl->cmd = pmic_arb_cmd;
> + ctrl->read_cmd = pmic_arb_read_cmd;
> + ctrl->write_cmd = pmic_arb_write_cmd;
> +
> + bus = spmi_controller_get_drvdata(ctrl);
> + bus->spmic = ctrl;
> +
> + bus->ppid_to_apid = devm_kcalloc(dev, PMIC_ARB_MAX_PPID,
> + sizeof(*bus->ppid_to_apid),
> + GFP_KERNEL);
> + if (!bus->ppid_to_apid)
> + return -ENOMEM;
> +
> + bus->apid_data = devm_kcalloc(dev, pmic_arb->max_periphs,
> + sizeof(*bus->apid_data),
> + GFP_KERNEL);
> + if (!bus->apid_data)
> + return -ENOMEM;
> +
> + index = of_property_match_string(node, "reg-names", "cnfg");
> + if (index < 0) {
> + dev_err(dev, "cnfg reg region missing");
> + return -EINVAL;
> + }
> +
> + cnfg = devm_of_iomap(dev, node, index, NULL);
> + if (IS_ERR(cnfg))
> + return PTR_ERR(cnfg);
> +
> + index = of_property_match_string(node, "reg-names", "intr");
> + if (index < 0) {
> + dev_err(dev, "intr reg region missing");
> + return -EINVAL;
> + }
> +
> + intr = devm_of_iomap(dev, node, index, NULL);
> + if (IS_ERR(intr))
> + return PTR_ERR(intr);
> +
> + irq = of_irq_get_byname(node, "periph_irq");
> + if (irq < 0)
> + return irq;
> +
> + bus->pmic_arb = pmic_arb;
> + bus->intr = intr;
> + bus->cnfg = cnfg;
> + bus->irq = irq;
> + bus->id = bus_index;
> +
> + ret = pmic_arb->ver_ops->init_apid(bus, bus_index);
> + if (ret)
> + return ret;
> +
> + dev_dbg(&pdev->dev, "adding irq domain for bus %d\n", bus_index);
> +
> + bus->domain = irq_domain_add_tree(dev->of_node,
> + &pmic_arb_irq_domain_ops, bus);
> + if (!bus->domain) {
> + dev_err(&pdev->dev, "unable to create irq_domain\n");
> + return -ENOMEM;
> + }
> +
> + irq_set_chained_handler_and_data(bus->irq,
> + pmic_arb_chained_irq, bus);
> +
> + bus->spmic->dev.of_node = node;
> + dev_set_name(&bus->spmic->dev, "spmi-%d", bus_index);
> +
> + ret = devm_spmi_controller_add(dev, bus->spmic);
> + if (ret)
> + return ret;
> +
> + pmic_arb->buses_available++;
> +
> + return 0;
> +}
> +
> +static int spmi_pmic_arb_register_buses(struct spmi_pmic_arb *pmic_arb,
> + struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct device_node *node = dev->of_node;
> + struct device_node *child;
> + int ret;
> +
> + /* legacy mode doesn't provide child node for the bus */
> + if (of_device_is_compatible(node, "qcom,spmi-pmic-arb"))
> + return spmi_pmic_arb_bus_init(pdev, node, pmic_arb);
> +
> + for_each_available_child_of_node(node, child) {
> + if (of_node_name_eq(child, "spmi")) {
> + ret = spmi_pmic_arb_bus_init(pdev, child, pmic_arb);
> + if (ret)
> + return ret;
> + }
> + }
> +
> + return ret;
> +}
> +
> +static void spmi_pmic_arb_deregister_buses(struct spmi_pmic_arb *pmic_arb)
> +{
> + int i;
> +
> + for (i = 0; i < PMIC_ARB_MAX_BUSES; i++) {
> + struct spmi_pmic_arb_bus *bus = &pmic_arb->buses[i];
> +
> + irq_set_chained_handler_and_data(bus->irq,
> + NULL, NULL);
> + irq_domain_remove(bus->domain);
> + }
> +}
> +
> static int spmi_pmic_arb_probe(struct platform_device *pdev)
> {
> struct spmi_pmic_arb *pmic_arb;
> - struct spmi_controller *ctrl;
> + struct device *dev = &pdev->dev;
> struct resource *res;
> void __iomem *core;
> u32 channel, ee, hw_ver;
> int err;
>
> - ctrl = devm_spmi_controller_alloc(&pdev->dev, sizeof(*pmic_arb));
> - if (IS_ERR(ctrl))
> - return PTR_ERR(ctrl);
> -
> - pmic_arb = spmi_controller_get_drvdata(ctrl);
> - pmic_arb->spmic = ctrl;
> + pmic_arb = devm_kzalloc(dev, sizeof(*pmic_arb), GFP_KERNEL);
> + if (!pmic_arb)
> + return -ENOMEM;
>
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core");
> - core = devm_ioremap(&ctrl->dev, res->start, resource_size(res));
> + core = devm_ioremap(dev, res->start, resource_size(res));
> if (IS_ERR(core))
> return PTR_ERR(core);
>
> pmic_arb->core_size = resource_size(res);
>
> + platform_set_drvdata(pdev, pmic_arb);
> + raw_spin_lock_init(&pmic_arb->lock);
> +
> hw_ver = readl_relaxed(core + PMIC_ARB_VERSION);
>
> if (hw_ver < PMIC_ARB_VERSION_V2_MIN)
> @@ -1643,30 +1820,12 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
> else
> pmic_arb->ver_ops = &pmic_arb_v7;
>
> - dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n",
> - pmic_arb->ver_ops->ver_str, hw_ver);
> -
> err = pmic_arb->ver_ops->get_core_resources(pdev, core);
> if (err)
> return err;
>
> - err = pmic_arb->ver_ops->init_apid(pmic_arb, 0);
> - if (err)
> - return err;
> -
> - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr");
> - pmic_arb->intr = devm_ioremap_resource(&ctrl->dev, res);
> - if (IS_ERR(pmic_arb->intr))
> - return PTR_ERR(pmic_arb->intr);
> -
> - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cnfg");
> - pmic_arb->cnfg = devm_ioremap_resource(&ctrl->dev, res);
> - if (IS_ERR(pmic_arb->cnfg))
> - return PTR_ERR(pmic_arb->cnfg);
> -
> - pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq");
> - if (pmic_arb->irq < 0)
> - return pmic_arb->irq;
> + dev_info(dev, "PMIC arbiter version %s (0x%x)\n",
> + pmic_arb->ver_ops->ver_str, hw_ver);
>
> err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel);
> if (err) {
> @@ -1695,46 +1854,19 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev)
>
> pmic_arb->ee = ee;
>
> - platform_set_drvdata(pdev, ctrl);
> - raw_spin_lock_init(&pmic_arb->lock);
> -
> - ctrl->cmd = pmic_arb_cmd;
> - ctrl->read_cmd = pmic_arb_read_cmd;
> - ctrl->write_cmd = pmic_arb_write_cmd;
> -
> - dev_dbg(&pdev->dev, "adding irq domain\n");
> - pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node,
> - &pmic_arb_irq_domain_ops, pmic_arb);
> - if (!pmic_arb->domain) {
> - dev_err(&pdev->dev, "unable to create irq_domain\n");
> - return -ENOMEM;
> - }
> -
> - irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq,
> - pmic_arb);
> - err = spmi_controller_add(ctrl);
> - if (err)
> - goto err_domain_remove;
> -
> - return 0;
> -
> -err_domain_remove:
> - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
> - irq_domain_remove(pmic_arb->domain);
> - return err;
> + return spmi_pmic_arb_register_buses(pmic_arb, pdev);
> }
>
> static void spmi_pmic_arb_remove(struct platform_device *pdev)
> {
> - struct spmi_controller *ctrl = platform_get_drvdata(pdev);
> - struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl);
> - spmi_controller_remove(ctrl);
> - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL);
> - irq_domain_remove(pmic_arb->domain);
> + struct spmi_pmic_arb *pmic_arb = platform_get_drvdata(pdev);
> +
> + spmi_pmic_arb_deregister_buses(pmic_arb);
> }
>
> static const struct of_device_id spmi_pmic_arb_match_table[] = {
> { .compatible = "qcom,spmi-pmic-arb", },
> + { .compatible = "qcom,x1e80100-spmi-pmic-arb", },
> {},
> };
> MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table);
>
The change is quite long and it's hard to disinguish the introduction of
spmi_pmic_arb_bus and the addition of 2 busses for v7.
Could you split in 2 by:
1) adding spmi_pmic_arb_bus but only registering a single bus
2) add the plumbing for 2 busses for v7
it would help review and bisecting.
Thanks,
Neil
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^ permalink raw reply
* Re: [PATCH v6 01/16] regulator: dt-bindings: describe the PMU module of the QCA6390 package
From: Krzysztof Kozlowski @ 2024-03-28 9:06 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Marcel Holtmann, Luiz Augusto von Dentz, David S . Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Kalle Valo, Bjorn Andersson,
Konrad Dybcio, Liam Girdwood, Mark Brown, Catalin Marinas,
Will Deacon, Bjorn Helgaas, Saravana Kannan, Geert Uytterhoeven,
Arnd Bergmann, Neil Armstrong, Marek Szyprowski, Alex Elder,
Srini Kandagatla, Greg Kroah-Hartman, Abel Vesa,
Manivannan Sadhasivam, Lukas Wunner, Dmitry Baryshkov,
linux-bluetooth, netdev, devicetree, linux-kernel, linux-wireless,
linux-arm-msm, linux-arm-kernel, linux-pci, linux-pm,
Bartosz Golaszewski
In-Reply-To: <CAMRc=Mdw9Ox5EC6=GdR_1kzWcfhpdbz1Hu3e7+GY9-wqTh2fhQ@mail.gmail.com>
On 27/03/2024 19:55, Bartosz Golaszewski wrote:
> On Wed, Mar 27, 2024 at 7:17 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 25/03/2024 14:16, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>>>
>>> The QCA6390 package contains discreet modules for WLAN and Bluetooth. They
>>> are powered by the Power Management Unit (PMU) that takes inputs from the
>>> host and provides LDO outputs. This document describes this module.
>>>
>>> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>>
>> Can you start using b4?
>>
>> This is a friendly reminder during the review process.
>>
>> It looks like you received a tag and forgot to add it.
>>
>> If you do not know the process, here is a short explanation:
>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>> versions, under or above your Signed-off-by tag. Tag is "received", when
>> provided in a message replied to you on the mailing list. Tools like b4
>> can help here. However, there's no need to repost patches *only* to add
>> the tags. The upstream maintainer will do that for tags received on the
>> version they apply.
>>
>> https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577
>>
>> If a tag was not added on purpose, please state why and what changed.
>>
>
> As per the first sentence of the cover letter: I dropped review tags
> from the patches that changed significantly while keeping them for
> those that didn't. If there's a way to let your automation know about
> this, please let me know/point me in the right direction because I
> don't know about it.
>
I went through changelog and did not see any remarks that patch #1
changed. b4 diff tells me: not much changed. Same properties and you
just do not require supplies on other variant.
This is rather minor change - just see by yourself.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v6 01/16] regulator: dt-bindings: describe the PMU module of the QCA6390 package
From: Krzysztof Kozlowski @ 2024-03-28 9:07 UTC (permalink / raw)
To: Bartosz Golaszewski, Marcel Holtmann, Luiz Augusto von Dentz,
David S . Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kalle Valo,
Bjorn Andersson, Konrad Dybcio, Liam Girdwood, Mark Brown,
Catalin Marinas, Will Deacon, Bjorn Helgaas, Saravana Kannan,
Geert Uytterhoeven, Arnd Bergmann, Neil Armstrong,
Marek Szyprowski, Alex Elder, Srini Kandagatla,
Greg Kroah-Hartman, Abel Vesa, Manivannan Sadhasivam,
Lukas Wunner, Dmitry Baryshkov
Cc: linux-bluetooth, netdev, devicetree, linux-kernel, linux-wireless,
linux-arm-msm, linux-arm-kernel, linux-pci, linux-pm,
Bartosz Golaszewski
In-Reply-To: <20240325131624.26023-2-brgl@bgdev.pl>
On 25/03/2024 14:16, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> The QCA6390 package contains discreet modules for WLAN and Bluetooth. They
> are powered by the Power Management Unit (PMU) that takes inputs from the
> host and provides LDO outputs. This document describes this module.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH RESEND v6 0/5] spmi: pmic-arb: Add support for multiple buses
From: Neil Armstrong @ 2024-03-28 9:07 UTC (permalink / raw)
To: Abel Vesa, Stephen Boyd, Matthias Brugger, Bjorn Andersson,
Konrad Dybcio, Dmitry Baryshkov, AngeloGioacchino Del Regno,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Srini Kandagatla, Johan Hovold, linux-kernel, linux-arm-kernel,
linux-arm-msm, linux-mediatek, devicetree
In-Reply-To: <20240326-spmi-multi-master-support-v6-0-1c87d8306c5b@linaro.org>
Hi Abel,
On 26/03/2024 17:28, Abel Vesa wrote:
> This RFC prepares for and adds support for 2 buses, which is supported
> in HW starting with version 7. Until now, none of the currently
> supported platforms in upstream have used the second bus. The X1E80100
> platform, on the other hand, needs the second bus for the USB2.0 to work
> as there are 3 SMB2360 PMICs which provide eUSB2 repeaters and they are
> all found on the second bus.
@Dmitry, @Konrad, @Bjorn, could you apply those patches and test an devices
you have to make sure there's no regression ?
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
> Changes in v6:
> - Changed the compatible to platform specific (X1E80100) along with the
> schema. Fixed the spmi buses unit addresses and added the empty ranges
> property. Added missing properties to the spmi buses and the
> "unevaluatedProperties: false".
> - Deprecated the "qcom,bus-id" in the legacy schema.
> - Changed the driver to check for legacy compatible first
> - Link to v5: https://lore.kernel.org/r/20240221-spmi-multi-master-support-v5-0-3255ca413a0b@linaro.org
>
> Changes in v5:
> - Dropped the RFC as there aren't any concerns about the approach anymore
> - Dropped the unused dev and res variables from pmic_arb_get_obsrvr_chnls_v2
> - Link to v4: https://lore.kernel.org/r/20240220-spmi-multi-master-support-v4-0-dc813c878ba8@linaro.org
>
> Changes in v4:
> - Fixed comment above pmic_arb_init_apid_v7 by dropping the extra "bus" word
> - Swicthed to devm_platform_ioremap_resource_byname for obsrvr and chnls.
> The core remains with platform_get_resource_byname as we need the core size.
> - Dropped comment from probe related to the need of platform_get_resource_byname
> as it not true anymore.
> - Dropped the qcom,bus-id optional property.
> - Link to v3: https://lore.kernel.org/r/20240214-spmi-multi-master-support-v3-0-0bae0ef04faf@linaro.org
>
> Changes in v3:
> - Split the change into 3 separate patches. First 2 patches are moving
> apid init and core resources into version specific ops. Third one is
> adding the support for 2 buses and dedicated compatible.
> - Added separate bindings patch
> - Link to v2: https://lore.kernel.org/r/20240213-spmi-multi-master-support-v2-1-b3b102326906@linaro.org
>
> Changes in v2:
> - Reworked it so that it registers a spmi controller for each bus
> rather than relying on the generic framework to pass on the bus
> (master) id.
> - Link to v1: https://lore.kernel.org/r/20240207-spmi-multi-master-support-v1-0-ce57f301c7fd@linaro.org
>
> ---
> Abel Vesa (5):
> dt-bindings: spmi: Add X1E80100 SPMI PMIC ARB schema
> dt-bindings: spmi: Deprecate qcom,bus-id
Forgot to add, but please fix this in a v7:
> spmi: pmic-arb: Make the APID init a version operation
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'core' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'core_size' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'mapping_table_valid' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:243: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_read_data'
drivers/spmi/spmi-pmic-arb.c:257: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_write_data'
> spmi: pmic-arb: Make core resources acquiring a version operation
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'core' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'core_size' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:180: warning: Function parameter or struct member 'mapping_table_valid' not described in 'spmi_pmic_arb'
drivers/spmi/spmi-pmic-arb.c:222: warning: Function parameter or struct member 'get_core_resources' not described in 'pmic_arb_ver_ops'
drivers/spmi/spmi-pmic-arb.c:244: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_read_data'
drivers/spmi/spmi-pmic-arb.c:258: warning: Function parameter or struct member 'pmic_arb' not described in 'pmic_arb_write_data'
> spmi: pmic-arb: Add multi bus support
>
> .../bindings/spmi/qcom,spmi-pmic-arb.yaml | 1 +
> .../bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml | 136 +++
> drivers/spmi/spmi-pmic-arb.c | 948 +++++++++++++--------
> 3 files changed, 715 insertions(+), 370 deletions(-)
> ---
> base-commit: 4893c639cc3659cefaa675bf1e59f4e7571afb5c
> change-id: 20240207-spmi-multi-master-support-832a704b779b
>
> Best regards,
Thanks,
Neil
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^ permalink raw reply
* Re: [PATCH 01/19] amba: store owner from modules with amba_driver_register()
From: Andi Shyti @ 2024-03-28 9:09 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Russell King, Suzuki K Poulose, Mike Leach, James Clark,
Alexander Shishkin, Maxime Coquelin, Alexandre Torgue,
Linus Walleij, Olivia Mackall, Herbert Xu, Vinod Koul,
Dmitry Torokhov, Miquel Raynal, Michal Simek, Eric Auger,
Alex Williamson, linux-kernel, coresight, linux-arm-kernel,
linux-stm32, linux-i2c, linux-crypto, dmaengine, linux-input, kvm
In-Reply-To: <c33833ad-9102-40e6-97bf-9a4e1bf0a3d9@linaro.org>
Hi Krzysztof,
> >> /**
> >> - * amba_driver_register - register an AMBA device driver
> >> + * __amba_driver_register - register an AMBA device driver
> >> * @drv: amba device driver structure
> >> + * @owner: owning module/driver
> >> *
> >> * Register an AMBA device driver with the Linux device model
> >> * core. If devices pre-exist, the drivers probe function will
> >> * be called.
> >> */
> >> -int amba_driver_register(struct amba_driver *drv)
> >> +int __amba_driver_register(struct amba_driver *drv,
> >
> > ...
> >
> >> +/*
> >> + * use a macro to avoid include chaining to get THIS_MODULE
> >> + */
> >
> > Should the documentation be moved here? Well... I don't see any
> > documentation linking this file yet, but in case it comes we want
> > documented amba_driver_register() rather than
> > __amba_driver_register().
> >
>
> That's just a wrapper, not API... why would we care to have kerneldoc
> for it?
Because everyone should use the wrapper while the real function
will be used only once or twice.
I see also that this is a common practice which I don't surely
like.
In any case there is no documentation exported for AMBA so that
this discussion does not bring any tangible benefit.
So that, considering that it's a good improvement,
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Andi
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^ permalink raw reply
* Re: [PATCH v6 3/3] pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver
From: Linus Walleij @ 2024-03-28 9:10 UTC (permalink / raw)
To: Jacky Huang
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, p.zabel, j.neuschaefer,
linux-arm-kernel, linux-gpio, devicetree, linux-kernel, ychuang3,
schung
In-Reply-To: <20240313035719.768469-4-ychuang570808@gmail.com>
Hi Jacky,
overall this looks very good.
On Wed, Mar 13, 2024 at 4:57 AM Jacky Huang <ychuang570808@gmail.com> wrote:
> From: Jacky Huang <ychuang3@nuvoton.com>
>
> Add common pinctrl and GPIO driver for Nuvoton MA35 series SoC, and
> add support for ma35d1 pinctrl.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
(...)
> +static int ma35_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,
> + unsigned int group)
> +{
> + struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
> + struct ma35_pin_group *grp = &npctl->groups[group];
> + struct ma35_pin_setting *setting = grp->settings;
> + u32 i, regval;
> +
> + dev_dbg(npctl->dev, "enable function %s group %s\n",
> + npctl->functions[selector].name, npctl->groups[group].name);
> +
> + for (i = 0; i < grp->npins; i++) {
> + regmap_read(npctl->regmap, setting->offset, ®val);
> + regval &= ~GENMASK(setting->shift + 3, setting->shift);
Add a comment explaining why you add +3
> +static int ma35_gpio_core_direction_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct ma35_pin_bank *bank = gpiochip_get_data(gc);
> + void __iomem *reg_mode = bank->reg_base + MA35_GP_REG_MODE;
> + unsigned long flags;
> + unsigned int regval;
> +
> + spin_lock_irqsave(&bank->lock, flags);
> +
> + regval = readl(reg_mode);
> + regval &= ~GENMASK(gpio * 2 + 1, gpio * 2);
> + regval |= MA35_GP_MODE_INPUT << gpio * 2;
Here the first time you do this magic explain in a comment why you
use *2+1 and *2 overall (I guess two bits per line).
> +static int ma35_gpio_core_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct ma35_pin_bank *bank = gpiochip_get_data(gc);
> +
> + return readl(bank->reg_base + MA35_PIN_MAP_BASE + gpio * 4);
Here add a comment explaining the *4
I guess one 32-bit register per pin?
> +static int ma35_irq_irqtype(struct irq_data *d, unsigned int type)
> +{
> + struct ma35_pin_bank *bank = gpiochip_get_data(irq_data_get_irq_chip_data(d));
> + void __iomem *reg_itype = bank->reg_base + MA35_GP_REG_INTTYPE;
> + void __iomem *reg_ien = bank->reg_base + MA35_GP_REG_INTEN;
> + unsigned int num = (d->hwirq);
> +
> + if (type == IRQ_TYPE_PROBE) {
> + writel(readl(reg_itype) & ~BIT(num), reg_itype);
> + writel(readl(reg_ien) | BIT(num) | BIT(num + 16), reg_ien);
> + bank->irqtype &= ~BIT(num);
> + bank->irqinten |= BIT(num) | BIT(num + 16);
> + return 0;
> + }
> +
> + if (type & IRQ_TYPE_LEVEL_MASK) {
> + writel(readl(reg_itype) | BIT(num), reg_itype);
> + writel(readl(reg_ien) & ~(BIT(num) | BIT(num + 16)), reg_ien);
> + bank->irqtype |= BIT(num);
> + bank->irqinten &= ~(BIT(num) | BIT(num + 16));
> + if (type == IRQ_TYPE_LEVEL_HIGH) {
> + writel(readl(reg_ien) | BIT(num + 16), reg_ien);
> + bank->irqinten |= BIT(num + 16);
> + return 0;
> + }
> +
> + if (type == IRQ_TYPE_LEVEL_LOW) {
> + writel(readl(reg_ien) | BIT(num), reg_ien);
> + bank->irqinten |= BIT(num);
> + return 0;
> + }
> +
> + } else {
> + writel(readl(reg_itype) & ~BIT(num), reg_itype);
> + bank->irqtype &= ~BIT(num);
> +
> + if (type & IRQ_TYPE_EDGE_RISING) {
> + writel(readl(reg_ien) | BIT(num + 16), reg_ien);
> + bank->irqinten |= BIT(num + 16);
> +
> + } else {
> + writel(readl(reg_ien) & ~BIT(num + 16), reg_ien);
> + bank->irqinten &= ~BIT(num + 16);
> + }
> +
> + if (type & IRQ_TYPE_EDGE_FALLING) {
> + writel(readl(reg_ien) | BIT(num), reg_ien);
> + bank->irqinten |= BIT(num);
> +
> + } else {
> + writel(readl(reg_ien) & ~BIT(num), reg_ien);
> + bank->irqinten &= ~BIT(num);
> + }
> + }
> + return 0;
> +}
I don't understand why you don't set the irq_handler:
irq_set_handler_locked(d, handle_edge_irq);
irq_set_handler_locked(d, handle_level_irq);
It seems you are not handling IRQ_TYPE_EDGE_BOTH?
What happens if both rising and falling is specified simultaneously?
The if/else nesting is hard to read.
switch (type) {
case IRQ_TYPE_EDGE_BOTH:
(...)
case IRQ_TYPE_EDGE_RISING:
(...)
See drivers/gpio/gpio-ftgpio010.c for an example.
Have you checked that handling edge and level IRQs really work
as expected?
> +static int ma35_gpiolib_register(struct platform_device *pdev, struct ma35_pinctrl *npctl)
> +{
> + struct ma35_pin_ctrl *ctrl = npctl->ctrl;
> + struct ma35_pin_bank *bank = ctrl->pin_banks;
> + int ret;
> + int i;
> +
> + for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
> + if (!bank->valid) {
> + dev_warn(&pdev->dev, "bank %s is not valid\n",
> + bank->np->name);
> + continue;
> + }
> + bank->irqtype = 0;
> + bank->irqinten = 0;
> + bank->chip.label = bank->name;
> + bank->chip.of_gpio_n_cells = 2;
> + bank->chip.parent = &pdev->dev;
> + bank->chip.request = ma35_gpio_core_to_request;
> + bank->chip.direction_input = ma35_gpio_core_direction_in;
> + bank->chip.direction_output = ma35_gpio_core_direction_out;
> + bank->chip.get = ma35_gpio_core_get;
> + bank->chip.set = ma35_gpio_core_set;
> + bank->chip.base = -1;
> + bank->chip.ngpio = bank->nr_pins;
> + bank->chip.can_sleep = false;
> + spin_lock_init(&bank->lock);
> +
> + if (bank->irq > 0) {
> + struct gpio_irq_chip *girq;
> +
> + girq = &bank->chip.irq;
> + gpio_irq_chip_set_chip(girq, &ma35_gpio_irqchip);
> + girq->parent_handler = ma35_irq_demux_intgroup;
> + girq->num_parents = 1;
> +
> + girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),
> + GFP_KERNEL);
> + if (!girq->parents)
> + return -ENOMEM;
> +
> + girq->parents[0] = bank->irq;
> + girq->default_type = IRQ_TYPE_NONE;
> + girq->handler = handle_level_irq;
Does this really work for the edge IRQs?
I recommend setting this to handle_bad_irq and assign the right
handler in .set_type().
Yours,
Linus Walleij
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Krzysztof Kozlowski @ 2024-03-28 9:14 UTC (permalink / raw)
To: Josua Mayer, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <1153cdd4-ed86-4a1f-ae4d-d9da1161f763@solid-run.com>
On 27/03/2024 11:55, Josua Mayer wrote:
>>
>> I don't even understand what is your case.
> I see :(
> Yes there is a disconnect *somewhere*.
>
Your way of quoting, including removing blank lines, weird wrapping,
does not make it easy to answer anything here. Use decent email client
which solves all these problems.
> I shall try again:
> Marvell is selling two chips:
> 1. CN9130, High-Performance Multi-Core CPU, System on Chip
> (can be used alone)
So this is the main SoC?
> 2. 88F8215, SouthBridge Communication Processor, System on Chip
> (only usable in combination with a CN9130)
>
> Now, in terms of compatible string, what happens when a board
> has multiples of these?
Multiple of CN9130? 2x CN9130? Nothing happens, does not really matter.
Anyway the compatible is just to uniquely identify the device for users,
not represent some programming model, because there is no programming
model of a board.
>
>> What is 9131 and 9132?
> I have no idea who came up with 9131 and 9132.
> But explanation is given by Grzegorz Jaszczyk <jaz@semihalf.com>
> when he submitted cn9131-db.dts (Marvell evaluation board):
>
> Extend the support of the CN9130 by adding an external CP115.
> The last number indicates how many external CP115 are used.
You use the compatibles in your patchset, so you should know, not me. I
have zero knowledge, also actually almost zero interest, in learning
your particular platform. I tried to fixup some bindings and maintainers
for Marvell: failed with not really helpful comments. Therefore I don't
care anymore about Marvell.
You or your platform maintainers should know what is this about and come
with explanation to the community.
Best regards,
Krzysztof
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^ permalink raw reply
* [PATCH] clk: samsung: exynosautov9: fix wrong pll clock id value
From: Jaewon Kim @ 2024-03-28 9:10 UTC (permalink / raw)
To: Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi,
Alim Akhtar, Michael Turquette, Stephen Boyd
Cc: linux-samsung-soc, linux-clk, linux-arm-kernel, linux-kernel,
Jaewon Kim
In-Reply-To: <CGME20240328091426epcas2p4f227abb6cd7e710f49f4e61aa022f74f@epcas2p4.samsung.com>
All PLL id values of CMU_TOP were incorrectly set to FOUT_SHARED0_PLL.
It modified to the correct PLL clock id value.
Fixes: 6587c62f69dc ("clk: samsung: add top clock support for Exynos Auto v9 SoC")
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
---
drivers/clk/samsung/clk-exynosautov9.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynosautov9.c b/drivers/clk/samsung/clk-exynosautov9.c
index e9c06eb93e66..f04bacacab2c 100644
--- a/drivers/clk/samsung/clk-exynosautov9.c
+++ b/drivers/clk/samsung/clk-exynosautov9.c
@@ -352,13 +352,13 @@ static const struct samsung_pll_clock top_pll_clks[] __initconst = {
/* CMU_TOP_PURECLKCOMP */
PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED0, PLL_CON3_PLL_SHARED0, NULL),
- PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared1_pll", "oscclk",
+ PLL(pll_0822x, FOUT_SHARED1_PLL, "fout_shared1_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED1, PLL_CON3_PLL_SHARED1, NULL),
- PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared2_pll", "oscclk",
+ PLL(pll_0822x, FOUT_SHARED2_PLL, "fout_shared2_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED2, PLL_CON3_PLL_SHARED2, NULL),
- PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared3_pll", "oscclk",
+ PLL(pll_0822x, FOUT_SHARED3_PLL, "fout_shared3_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED3, PLL_CON3_PLL_SHARED3, NULL),
- PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared4_pll", "oscclk",
+ PLL(pll_0822x, FOUT_SHARED4_PLL, "fout_shared4_pll", "oscclk",
PLL_LOCKTIME_PLL_SHARED4, PLL_CON3_PLL_SHARED4, NULL),
};
--
2.43.2
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^ permalink raw reply related
* Re: [PATCH v2] pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
From: Linus Walleij @ 2024-03-28 9:15 UTC (permalink / raw)
To: Billy Tsai
Cc: andrew, joel, johnny_huang, linux-aspeed, openbmc, linux-gpio,
linux-arm-kernel, linux-kernel, BMC-SW, Ricky_CX_Wu,
Delphine CC Chiu
In-Reply-To: <20240313092809.2596644-1-billy_tsai@aspeedtech.com>
On Wed, Mar 13, 2024 at 10:28 AM Billy Tsai <billy_tsai@aspeedtech.com> wrote:
> The register offset to disable the internal pull-down of GPIOR~T is 0x630
> instead of 0x620, as specified in the Ast2600 datasheet v15
> The datasheet can download from the official Aspeed website.
>
> Fixes: 15711ba6ff19 ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Patch applied.
I recorded Delphine's similar patch as "reported-by".
Yours,
Linus Walleij
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^ permalink raw reply
* Re: [PATCH v1] pinctrl: pinctrl-aspeed-g6: correct the offset of SCU630
From: Linus Walleij @ 2024-03-28 9:16 UTC (permalink / raw)
To: Delphine_CC_Chiu/WYHQ/Wiwynn
Cc: patrick@stwcx.xyz, Andrew Jeffery, Joel Stanley,
linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <TYZPR04MB58539A1D94340F330CAF3CF9D62A2@TYZPR04MB5853.apcprd04.prod.outlook.com>
On Wed, Mar 13, 2024 at 7:57 AM Delphine_CC_Chiu/WYHQ/Wiwynn
<Delphine_CC_Chiu@wiwynn.com> wrote:
> Please don't review this patch since ASPEED also provided the patch to
> fix this issue.
I added your Reported-by tag to Billy's patch since you obviously found the
same issue.
Yours,
Linus Walleij
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^ permalink raw reply
* Re: [PATCH v11 00/11] Support page table check PowerPC
From: Ingo Molnar @ 2024-03-28 9:28 UTC (permalink / raw)
To: Rohan McLure
Cc: linuxppc-dev, mpe, christophe.leroy, linux-mm, linux-riscv,
linux-arm-kernel, x86
In-Reply-To: <20240328045535.194800-3-rmclure@linux.ibm.com>
* Rohan McLure <rmclure@linux.ibm.com> wrote:
> Rohan McLure (11):
> Revert "mm/page_table_check: remove unused parameter in [__]page_table_check_pud_set"
> Revert "mm/page_table_check: remove unused parameter in [__]page_table_check_pmd_set"
> Revert "mm/page_table_check: remove unused parameter in [__]page_table_check_pud_clear"
> Revert "mm/page_table_check: remove unused parameter in [__]page_table_check_pmd_clear"
> Revert "mm/page_table_check: remove unused parameter in [__]page_table_check_pte_clear"
Just a process request: please give these commits proper titles, they
are not really 'reverts' in the classical sense, and this title hides
what is being done in the commit. The typical use of reverts is to
revert a bad change because it broke something. Here the goal is to
reintroduce functionality.
So please name these 5 patches accordingly, to shed light on what is
being reintroduced. You can mention it at the end of the changelog that
it's a functional revert of commit XYZ, but that's not the primary
purpose of the commit.
Thanks,
Ingo
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Josua Mayer @ 2024-03-28 9:33 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <539eaf79-cff5-4bb7-84c8-7c9943c6d8ae@linaro.org>
Hi Krzysztof,
Thank you for all the comments so far!
Am 28.03.24 um 10:14 schrieb Krzysztof Kozlowski:
> On 27/03/2024 11:55, Josua Mayer wrote:
>
>>> I don't even understand what is your case.
>> I see :(
>> Yes there is a disconnect *somewhere*.
>>
> Your way of quoting, including removing blank lines, weird wrapping,
> does not make it easy to answer anything here. Use decent email client
> which solves all these problems.
>
>> I shall try again:
>> Marvell is selling two chips:
>> 1. CN9130, High-Performance Multi-Core CPU, System on Chip
>> (can be used alone)
> So this is the main SoC?
Correct.
>
>> 2. 88F8215, SouthBridge Communication Processor, System on Chip
>> (only usable in combination with a CN9130)
>>
>> Now, in terms of compatible string, what happens when a board
>> has multiples of these?
> Multiple of CN9130? 2x CN9130?
this specifically is an academic question,
the main point is multiple southbridges to one CN9130.
> Nothing happens, does not really matter.
> Anyway the compatible is just to uniquely identify the device for users,
> not represent some programming model, because there is no programming
> model of a board.
>
>>> What is 9131 and 9132?
>> I have no idea who came up with 9131 and 9132.
>> But explanation is given by Grzegorz Jaszczyk <jaz@semihalf.com>
>> when he submitted cn9131-db.dts (Marvell evaluation board):
>>
>> Extend the support of the CN9130 by adding an external CP115.
>> The last number indicates how many external CP115 are used.
> You use the compatibles in your patchset, so you should know, not me.I
> have zero knowledge, also actually almost zero interest, in learning
> your particular platform.
Fair enough.
> I tried to fixup some bindings and maintainers
> for Marvell: failed with not really helpful comments. Therefore I don't
> care anymore about Marvell.
>
> You <cut> should know what is this about and come
> with explanation to the community.
If I was to come up with something new, without looking at existing
Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
I would describe the hardware like this:
SolidRun "CN9131" SolidWAN board is comptible with:
- solidrun,cn9131-solidwan:
name of the carrier board, and name of the complete product
includes one southbridge chip, but I don't need to mention it?
- solidrun,cn9130-sr-som:
just the som, including 1x CN9130 SoC
- marvell,cn9130:
this is the SoC, internally combining AP+CP
AP *could* be mentioned, but I don't see a reason
> You<cut>r platform maintainers should know what is this about and come
> with explanation to the community.
Is there a way forward?
Would it be worth challenging the existing bindings by proposing (RFC)
specific changes in line with what I described above?
sincerely
Josua Mayer
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^ permalink raw reply
* [PATCH] media: verisilicon: AV1: Be more fexible on postproc capabilities
From: Benjamin Gaignard @ 2024-03-28 9:34 UTC (permalink / raw)
To: ezequiel, p.zabel, mchehab, heiko
Cc: linux-media, linux-rockchip, linux-arm-kernel, linux-kernel,
kernel, Benjamin Gaignard
RK3588 post-processor block is able to convert 10 bits streams
into 8 bits pixels format.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588")
---
drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
index f97527670783..964122e7c355 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
@@ -82,7 +82,6 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
.codec_mode = HANTRO_MODE_NONE,
- .match_depth = true,
.postprocessed = true,
.frmsize = {
.min_width = ROCKCHIP_VPU981_MIN_SIZE,
--
2.40.1
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^ permalink raw reply related
* [PATCH] media: verisilicon: Fix auxiliary buffers allocation size
From: Benjamin Gaignard @ 2024-03-28 9:34 UTC (permalink / raw)
To: ezequiel, p.zabel, mchehab, heiko
Cc: linux-media, linux-rockchip, linux-arm-kernel, linux-kernel,
kernel, Benjamin Gaignard
In-Reply-To: <20240328093439.18712-1-benjamin.gaignard@collabora.com>
Use v4l2_av1_tile_info->tile_cols to know the number of colons
in the frame. This made auxiliary buffers meory size computation
more accurate.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Fixes: 727a400686a2 ("media: verisilicon: Add Rockchip AV1 decoder")
---
.../media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
index cc4483857489..65e8f2d07400 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c
@@ -257,7 +257,8 @@ static int rockchip_vpu981_av1_dec_tiles_reallocate(struct hantro_ctx *ctx)
struct hantro_dev *vpu = ctx->dev;
struct hantro_av1_dec_hw_ctx *av1_dec = &ctx->av1_dec;
struct hantro_av1_dec_ctrls *ctrls = &av1_dec->ctrls;
- unsigned int num_tile_cols = 1 << ctrls->tile_group_entry->tile_col;
+ const struct v4l2_av1_tile_info *tile_info = &ctrls->frame->tile_info;
+ unsigned int num_tile_cols = tile_info->tile_cols;
unsigned int height = ALIGN(ctrls->frame->frame_height_minus_1 + 1, 64);
unsigned int height_in_sb = height / 64;
unsigned int stripe_num = ((height + 8) + 63) / 64;
--
2.40.1
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^ permalink raw reply related
* Re: [PATCH 2/3] devicetree: phy: rockchip-emmc: Document changed strobe-pulldown property
From: Krzysztof Kozlowski @ 2024-03-28 9:37 UTC (permalink / raw)
To: dev, Vinod Koul, Kishon Vijay Abraham I, Heiko Stuebner,
Chris Ruehl, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Christopher Obbard, Alban Browaeys, Doug Anderson, Brian Norris,
Jensen Huang, linux-phy, linux-arm-kernel, linux-rockchip,
linux-kernel, devicetree
In-Reply-To: <20240326-rk-default-enable-strobe-pulldown-v1-2-f410c71605c0@folker-schwesinger.de>
On 26/03/2024 19:54, Folker Schwesinger via B4 Relay wrote:
> From: Folker Schwesinger <dev@folker-schwesinger.de>
>
> Document the changes regarding the optional strobe-pulldown property.
> These changes are necessary as the default behavior of the driver was
> restored to the Rockchip kernel behavior of enabling the internal
> pulldown by default.
>
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.
It's: dt-bindings: phy: rockchi.......
Best regards,
Krzysztof
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^ permalink raw reply
* [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: set brcm,wp-not-connected
From: Rafał Miłecki @ 2024-03-28 9:37 UTC (permalink / raw)
To: Florian Fainelli
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, William Zhang,
Anand Gore, Kursad Oney, devicetree, linux-arm-kernel,
bcm-kernel-feedback-list, Rafał Miłecki
From: Rafał Miłecki <rafal@milecki.pl>
Every described BCM4908 board has WP pin not connected. This caused
problems for drivers since day 0 but there was no property to describe
that properly. Projects like OpenWrt were modifying Linux driver to deal
with it.
It's not clear if that is hardware limitation or just reference design
being copied over and over but this applies to all known / supported
BCM4908 boards. Handle it by marking WP as not connected by default.
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index e01cf4f54077..8b924812322c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -594,6 +594,7 @@ nand_controller: nand-controller@1800 {
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "nand_ctlrdy";
+ brcm,wp-not-connected;
status = "disabled";
nandcs: nand@0 {
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
index 030ffa5364fb..e5b37643296b 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
@@ -34,7 +34,6 @@ &hsspi {
};
&nand_controller {
- brcm,wp-not-connected;
status = "okay";
};
--
2.35.3
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^ permalink raw reply related
* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Krzysztof Kozlowski @ 2024-03-28 9:41 UTC (permalink / raw)
To: Josua Mayer, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <5ea0feb4-4d7e-4a10-9254-b034e368e8ad@solid-run.com>
On 28/03/2024 10:33, Josua Mayer wrote:
>>
>>> 2. 88F8215, SouthBridge Communication Processor, System on Chip
>>> (only usable in combination with a CN9130)
>>>
>>> Now, in terms of compatible string, what happens when a board
>>> has multiples of these?
>> Multiple of CN9130? 2x CN9130?
> this specifically is an academic question,
> the main point is multiple southbridges to one CN9130.
I did not know to what you refer.
>>
>> You <cut> should know what is this about and come
>> with explanation to the community.
> If I was to come up with something new, without looking at existing
> Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> I would describe the hardware like this:
>
> SolidRun "CN9131" SolidWAN board is comptible with:
> - solidrun,cn9131-solidwan:
> name of the carrier board, and name of the complete product
> includes one southbridge chip, but I don't need to mention it?
> - solidrun,cn9130-sr-som:
> just the som, including 1x CN9130 SoC
> - marvell,cn9130:
> this is the SoC, internally combining AP+CP
> AP *could* be mentioned, but I don't see a reason
With an explanation in commit msg about not using other compatible
fallbacks, this looks good to me.
>
>> You<cut>r platform maintainers should know what is this about and come
>> with explanation to the community.
> Is there a way forward?
> Would it be worth challenging the existing bindings by proposing (RFC)
> specific changes in line with what I described above?
It all depends on "what" and "why" you want to do. I don't know.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v2] pinctrl/meson: fix typo in PDM's pin name
From: Linus Walleij @ 2024-03-28 9:43 UTC (permalink / raw)
To: Jan Dakinevich
Cc: Neil Armstrong, Kevin Hilman, Jerome Brunet, Martin Blumenstingl,
linux-gpio, linux-arm-kernel, linux-amlogic, linux-kernel
In-Reply-To: <20240325113058.248022-1-jan.dakinevich@salutedevices.com>
On Mon, Mar 25, 2024 at 12:32 PM Jan Dakinevich
<jan.dakinevich@salutedevices.com> wrote:
> Other pins have _a or _x suffix, but this one doesn't have any. Most
> likely this is a typo.
>
> Fixes: dabad1ff8561 ("pinctrl: meson: add pinctrl driver support for Meson-A1 SoC")
> Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
Patch applied for fixes!
Yours,
Linus Walleij
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^ permalink raw reply
* Re: [PATCH v1] ARM: dts: stm32: Update button on stm32mp135f-dk
From: Patrice CHOTARD @ 2024-03-28 9:44 UTC (permalink / raw)
To: robh+dt, Krzysztof Kozlowski, alexandre.torgue
Cc: linux-stm32, linux-arm-kernel, linux-kernel, devicetree
In-Reply-To: <20240328080105.3910099-1-patrice.chotard@foss.st.com>
This patch must be dropped, i made a mistake.
Sorry
Patrice
On 3/28/24 09:01, patrice.chotard@foss.st.com wrote:
> From: Patrice Chotard <patrice.chotard@foss.st.com>
>
> On schematics, 2 buttons are available on stm32mp135-dk board:
> _ button "user1" connected to GPIOA14
> _ button "user2" connected to GPIOA13
>
> Reflect that on device tree.
>
> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
> ---
> arch/arm/boot/dts/st/stm32mp135f-dk.dts | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
> index 52171214a308..f7e03bc7eccb 100644
> --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
> +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
> @@ -48,9 +48,15 @@ optee@dd000000 {
> gpio-keys {
> compatible = "gpio-keys";
>
> - button-user {
> - label = "User-PA13";
> + button-user-1 {
> + label = "User-1";
> linux,code = <BTN_1>;
> + gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> +
> + button-user-2 {
> + label = "User-2";
> + linux,code = <BTN_2>;
> gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> };
> };
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm64: marvell: add solidrun cn9130 clearfog boards
From: Josua Mayer @ 2024-03-28 9:46 UTC (permalink / raw)
To: Krzysztof Kozlowski, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Yazan Shhady, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
In-Reply-To: <68fd00b8-d6f1-463b-9d0d-b77bf9364f7f@linaro.org>
Am 28.03.24 um 10:41 schrieb Krzysztof Kozlowski:
> On 28/03/2024 10:33, Josua Mayer wrote:
>>>> 2. 88F8215, SouthBridge Communication Processor, System on Chip
>>>> (only usable in combination with a CN9130)
>>>>
>>>> Now, in terms of compatible string, what happens when a board
>>>> has multiples of these?
>>> Multiple of CN9130? 2x CN9130?
>> this specifically is an academic question,
>> the main point is multiple southbridges to one CN9130.
> I did not know to what you refer.
>
>>> You <cut> should know what is this about and come
>>> with explanation to the community.
>> If I was to come up with something new, without looking at existing
>> Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
>> I would describe the hardware like this:
>>
>> SolidRun "CN9131" SolidWAN board is comptible with:
>> - solidrun,cn9131-solidwan:
>> name of the carrier board, and name of the complete product
>> includes one southbridge chip, but I don't need to mention it?
>> - solidrun,cn9130-sr-som:
>> just the som, including 1x CN9130 SoC
>> - marvell,cn9130:
>> this is the SoC, internally combining AP+CP
>> AP *could* be mentioned, but I don't see a reason
> With an explanation in commit msg about not using other compatible
> fallbacks, this looks good to me.
Great. So perhaps my next step will be a v2 with explanations.
>
>>> You<cut>r platform maintainers should know what is this about and come
>>> with explanation to the community.
>> Is there a way forward?
>> Would it be worth challenging the existing bindings by proposing (RFC)
>> specific changes in line with what I described above?
> It all depends on "what" and "why" you want to do. I don't know.
First priority is supporting the solidrun boards based on cn9130 soc,
which requires getting the bindings right (at least for these boards).
Changing the other bindings would only satisfy my desire for order,
but could get attention from other contributors to these platforms.
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^ permalink raw reply
* Re: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80 chars
From: Krzysztof Kozlowski @ 2024-03-28 9:49 UTC (permalink / raw)
To: Tudor Ambarus, Alim Akhtar, peter.griffin, robh+dt,
krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, linux-samsung-soc, devicetree, linux-kernel,
andre.draszik, willmcvicker, kernel-team
In-Reply-To: <454b88d5-885d-4933-ae49-46eaee99d75d@linaro.org>
On 26/03/2024 15:48, Tudor Ambarus wrote:
>
>
> On 3/26/24 11:10, Alim Akhtar wrote:
>> Hi Tudor
>
> Hi, Alim!
>>
>>> -----Original Message-----
>>> From: Tudor Ambarus <tudor.ambarus@linaro.org>
>>> Sent: Tuesday, March 26, 2024 4:06 PM
>>> To: peter.griffin@linaro.org; robh+dt@kernel.org;
>>> krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org
>>> Cc: alim.akhtar@samsung.com; linux-arm-kernel@lists.infradead.org; linux-
>>> samsung-soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
>>> kernel@vger.kernel.org; andre.draszik@linaro.org;
>>> willmcvicker@google.com; kernel-team@android.com; Tudor Ambarus
>>> <tudor.ambarus@linaro.org>
>>> Subject: [PATCH v2 3/4] arm64: dts: exynos: gs101: join lines close to 80
>> chars
>>>
>>> These lines fit 81 characters, which is pretty close to 80.
>>> Join the lines.
>>>
>> Does this breaks checkpatch flow?
>
> ./scripts/checkpatch --strict does not complain
Because checkpatch does not have limit of 80... Coding style has, but
for readability it is fine to stretch or even break this rule.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH RFC 0/3] mm/gup: consistently call it GUP-fast
From: David Hildenbrand @ 2024-03-28 9:50 UTC (permalink / raw)
To: Mike Rapoport, Arnd Bergmann
Cc: Vineet Gupta, peterx, linux-kernel, Andrew Morton,
Jason Gunthorpe, John Hubbard, linux-arm-kernel, loongarch,
linux-mips, linuxppc-dev, linux-s390, linux-sh, linux-mm,
linux-perf-users, linux-fsdevel, x86, Ryan Roberts,
Alexander Viro, Matt Turner, Alexey Brodkin
In-Reply-To: <ZgUZCBNloC-grPWJ@kernel.org>
On 28.03.24 08:15, Mike Rapoport wrote:
> On Thu, Mar 28, 2024 at 07:09:13AM +0100, Arnd Bergmann wrote:
>> On Thu, Mar 28, 2024, at 06:51, Vineet Gupta wrote:
>>> On 3/27/24 09:22, Arnd Bergmann wrote:
>>>> On Wed, Mar 27, 2024, at 16:39, David Hildenbrand wrote:
>>>>> On 27.03.24 16:21, Peter Xu wrote:
>>>>>> On Wed, Mar 27, 2024 at 02:05:35PM +0100, David Hildenbrand wrote:
>>>>>>
>>>>>> I'm not sure what config you tried there; as I am doing some build tests
>>>>>> recently, I found turning off CONFIG_SAMPLES + CONFIG_GCC_PLUGINS could
>>>>>> avoid a lot of issues, I think it's due to libc missing. But maybe not the
>>>>>> case there.
>>>>> CCin Arnd; I use some of his compiler chains, others from Fedora directly. For
>>>>> example for alpha and arc, the Fedora gcc is "13.2.1".
>>>>> But there is other stuff like (arc):
>>>>>
>>>>> ./arch/arc/include/asm/mmu-arcv2.h: In function 'mmu_setup_asid':
>>>>> ./arch/arc/include/asm/mmu-arcv2.h:82:9: error: implicit declaration of
>>>>> function 'write_aux_reg' [-Werro
>>>>> r=implicit-function-declaration]
>>>>> 82 | write_aux_reg(ARC_REG_PID, asid | MMU_ENABLE);
>>>>> | ^~~~~~~~~~~~~
>>>> Seems to be missing an #include of soc/arc/aux.h, but I can't
>>>> tell when this first broke without bisecting.
>>>
>>> Weird I don't see this one but I only have gcc 12 handy ATM.
>>>
>>> gcc version 12.2.1 20230306 (ARC HS GNU/Linux glibc toolchain -
>>> build 1360)
>>>
>>> I even tried W=1 (which according to scripts/Makefile.extrawarn) should
>>> include -Werror=implicit-function-declaration but don't see this still.
>>>
>>> Tomorrow I'll try building a gcc 13.2.1 for ARC.
>>
>> David reported them with the toolchains I built at
>> https://mirrors.edge.kernel.org/pub/tools/crosstool/
>> I'm fairly sure the problem is specific to the .config
>> and tree, not the toolchain though.
>
> This happens with defconfig and both gcc 12.2.0 and gcc 13.2.0 from your
> crosstools. I also see these on the current Linus' tree:
>
> arc/kernel/ptrace.c:342:16: warning: no previous prototype for 'syscall_trace_enter' [-Wmissing-prototypes]
> arch/arc/kernel/kprobes.c:193:15: warning: no previous prototype for 'arc_kprobe_handler' [-Wmissing-prototypes]
>
> This fixed the warning about write_aux_reg for me, probably Vineet would
> want this include somewhere else...
>
> diff --git a/arch/arc/include/asm/mmu-arcv2.h b/arch/arc/include/asm/mmu-arcv2.h
> index ed9036d4ede3..0fca342d7b79 100644
> --- a/arch/arc/include/asm/mmu-arcv2.h
> +++ b/arch/arc/include/asm/mmu-arcv2.h
> @@ -69,6 +69,8 @@
>
> #ifndef __ASSEMBLY__
>
> +#include <asm/arcregs.h>
> +
> struct mm_struct;
> extern int pae40_exist_but_not_enab(void);
Here are all err+warn I see with my configs on Linus' tree from today (not mm-unstable).
Most of them are warnings due to missing prototypes or missing "clone3".
Parisc64 seems to be a bit more broken. Maybe nobody cares about parisc64 anymore? Or
it's a toolchain issue, don't know.
xtensa is also broken, but "invalid register" smells like a toolchain issue to me.
Maybe all known/expected, just posting it if anybody cares. I can share my full build script
on request.
[INFO] Compiling alpha
[INFO] 0 errors
[INFO] 102 warnings
[PASS]
$ cat alpha_log | grep warn
<stdin>:1519:2: warning: #warning syscall clone3 not implemented [-Wcpp]
arch/alpha/lib/checksum.c:45:9: warning: no previous prototype for 'csum_tcpudp_magic' [-Wmissing-prototypes]
arch/alpha/lib/checksum.c:54:8: warning: no previous prototype for 'csum_tcpudp_nofold' [-Wmissing-prototypes]
arch/alpha/lib/checksum.c:145:9: warning: no previous prototype for 'ip_fast_csum' [-Wmissing-prototypes]
arch/alpha/lib/checksum.c:163:8: warning: no previous prototype for 'csum_partial' [-Wmissing-prototypes]
arch/alpha/lib/checksum.c:180:9: warning: no previous prototype for 'ip_compute_csum' [-Wmissing-prototypes]
arch/alpha/kernel/traps.c:211:1: warning: no previous prototype for 'do_entArith' [-Wmissing-prototypes]
arch/alpha/kernel/traps.c:233:1: warning: no previous prototype for 'do_entIF' [-Wmissing-prototypes]
arch/alpha/kernel/traps.c:400:1: warning: no previous prototype for 'do_entDbg' [-Wmissing-prototypes]
arch/alpha/kernel/traps.c:436:1: warning: no previous prototype for 'do_entUna' [-Wmissing-prototypes]
arch/alpha/kernel/traps.c:721:1: warning: no previous prototype for 'do_entUnaUser' [-Wmissing-prototypes]
arch/alpha/mm/init.c:261:1: warning: no previous prototype for 'srm_paging_stop' [-Wmissing-prototypes]
arch/alpha/lib/fpreg.c:20:1: warning: no previous prototype for 'alpha_read_fp_reg' [-Wmissing-prototypes]
[....]
[INFO] Compiling arc
[INFO] 0 errors
[INFO] 2 warnings
[PASS]
$ cat arc_log | grep warn
arch/arc/kernel/ptrace.c:342:16: warning: no previous prototype for 'syscall_trace_enter' [-Wmissing-prototypes]
arch/arc/kernel/kprobes.c:193:15: warning: no previous prototype for 'arc_kprobe_handler' [-Wmissing-prototypes]
[INFO] Compiling hexagon
[INFO] 0 errors
[INFO] 1 warnings
[PASS]
$ cat hexagon_log | grep warn
<stdin>:1519:2: warning: syscall clone3 not implemented [-W#warnings]
1519 | #warning syscall clone3 not implemented
1 warning generated.
[INFO] Compiling mips64
[INFO] 0 errors
[INFO] 15 warnings
[PASS]
$ cat mips64_log | grep warn
arch/mips/sibyte/bcm1480/setup.c:104:13: warning: no previous prototype for 'bcm1480_setup' [-Wmissing-prototypes]
arch/mips/sibyte/bcm1480/irq.c:200:13: warning: no previous prototype for 'init_bcm1480_irqs' [-Wmissing-prototypes]
arch/mips/sibyte/bcm1480/time.c:10:13: warning: no previous prototype for 'plat_time_init' [-Wmissing-prototypes]
arch/mips/sibyte/bcm1480/smp.c:49:6: warning: no previous prototype for 'bcm1480_smp_init' [-Wmissing-prototypes]
arch/mips/sibyte/bcm1480/smp.c:158:6: warning: no previous prototype for 'bcm1480_mailbox_interrupt' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/setup.c:59:5: warning: no previous prototype for 'swarm_be_handler' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_xicor1241.c:108:5: warning: no previous prototype for 'xicor_set_time' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_xicor1241.c:167:10: warning: no previous prototype for 'xicor_get_time' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_xicor1241.c:203:5: warning: no previous prototype for 'xicor_probe' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_m41t81.c:139:5: warning: no previous prototype for 'm41t81_set_time' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_m41t81.c:186:10: warning: no previous prototype for 'm41t81_get_time' [-Wmissing-prototypes]
arch/mips/sibyte/swarm/rtc_m41t81.c:219:5: warning: no previous prototype for 'm41t81_probe' [-Wmissing-prototypes]
arch/mips/mm/cerr-sb1.c:165:17: warning: no previous prototype for 'sb1_cache_error' [-Wmissing-prototypes]
arch/mips/kernel/cevt-bcm1480.c:96:6: warning: no previous prototype for 'sb1480_clockevent_init' [-Wmissing-prototypes]
arch/mips/kernel/csrc-bcm1480.c:37:13: warning: no previous prototype for 'sb1480_clocksource_init' [-Wmissing-prototypes]
[INFO] Compiling mips32-xpa
[INFO] 0 errors
[INFO] 1 warnings
[PASS]
$ cat mips32-xpa_log | grep warn
drivers/uio/uio.c:795:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
[INFO] Compiling mips32-alchemy
[INFO] 0 errors
[INFO] 1 warnings
[PASS]
$ cat mips32-alchemy_log | grep warn
drivers/net/ethernet/amd/au1000_eth.c:574:6: warning: no previous prototype for 'au1000_ReleaseDB' [-Wmissing-prototypes]
[INFO] Compiling nios2
[INFO] 0 errors
[INFO] 35 warnings
[PASS]
$ cat nios2_log | grep warn
<stdin>:1519:2: warning: #warning syscall clone3 not implemented [-Wcpp]
arch/nios2/lib/memcpy.c:160:7: warning: no previous prototype for 'memcpy' [-Wmissing-prototypes]
arch/nios2/lib/memcpy.c:194:7: warning: no previous prototype for 'memcpyb' [-Wmissing-prototypes]
arch/nios2/mm/dma-mapping.c:21:6: warning: no previous prototype for 'arch_sync_dma_for_device' [-Wmissing-prototypes]
arch/nios2/mm/dma-mapping.c:45:6: warning: no previous prototype for 'arch_sync_dma_for_cpu' [-Wmissing-prototypes]
arch/nios2/mm/dma-mapping.c:63:6: warning: no previous prototype for 'arch_dma_prep_coherent' [-Wmissing-prototypes]
arch/nios2/mm/dma-mapping.c:70:7: warning: no previous prototype for 'arch_dma_set_uncached' [-Wmissing-prototypes]
arch/nios2/kernel/irq.c:19:17: warning: no previous prototype for 'do_IRQ' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:34:6: warning: no previous prototype for 'arch_cpu_idle' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:43:6: warning: no previous prototype for 'machine_restart' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:54:6: warning: no previous prototype for 'machine_halt' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:66:6: warning: no previous prototype for 'machine_power_off' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:152:6: warning: no previous prototype for 'dump' [-Wmissing-prototypes]
arch/nios2/kernel/process.c:253:16: warning: no previous prototype for 'nios2_clone' [-Wmissing-prototypes]
[...]
[INFO] Compiling parisc64
[INFO] 79 errors
[INFO] 54 warnings
[FAIL]
$ cat parisc64_log | grep error
ipc/sem.c:1284:18: error: 'struct semid64_ds' has no member named 'sem_otime_high'; did you mean 'sem_otime'?
ipc/sem.c:1285:18: error: 'struct semid64_ds' has no member named 'sem_ctime_high'; did you mean 'sem_ctime'?
././include/linux/compiler_types.h:449:45: error: call to '__compiletime_assert_276' declared with attribute error: BUILD_BUG_ON failed: sizeof(struct semid64_ds) != 80
ipc/msg.c:567:12: error: 'struct msqid64_ds' has no member named 'msg_stime_high'; did you mean 'msg_stime'?
ipc/msg.c:568:12: error: 'struct msqid64_ds' has no member named 'msg_rtime_high'; did you mean 'msg_rtime'?
ipc/msg.c:569:12: error: 'struct msqid64_ds' has no member named 'msg_ctime_high'; did you mean 'msg_ctime'?
ipc/shm.c:1137:15: error: 'struct shmid64_ds' has no member named 'shm_atime_high'; did you mean 'shm_atime'?
ipc/shm.c:1138:15: error: 'struct shmid64_ds' has no member named 'shm_dtime_high'; did you mean 'shm_dtime'?
ipc/shm.c:1139:15: error: 'struct shmid64_ds' has no member named 'shm_ctime_high'; did you mean 'shm_ctime'?
././include/linux/compiler_types.h:449:45: error: call to '__compiletime_assert_390' declared with attribute error: BUILD_BUG_ON failed: offsetof(struct dst_entry, __rcuref) & 63
././include/linux/compiler_types.h:449:45: error: call to '__compiletime_assert_374' declared with attribute error: BUILD_BUG_ON failed: offsetof(struct dst_entry, __rcuref) & 63
././include/linux/compiler_types.h:449:45: error: call to '__compiletime_assert_382' declared with attribute error: BUILD_BUG_ON failed: offsetof(struct dst_entry, __rcuref) & 63
[...]
[INFO] Compiling sh
[INFO] 0 errors
[INFO] 39 warnings
[PASS]
$ cat sh_log | grep warn
<stdin>:1519:2: warning: #warning syscall clone3 not implemented [-Wcpp]
arch/sh/mm/cache-shx3.c:18:13: warning: no previous prototype for 'shx3_cache_init' [-Wmissing-prototypes]
arch/sh/mm/flush-sh4.c:106:13: warning: no previous prototype for 'sh4__flush_region_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh4.c:384:13: warning: no previous prototype for 'sh4_cache_init' [-Wmissing-prototypes]
arch/sh/kernel/return_address.c:49:7: warning: no previous prototype for 'return_address' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:10:6: warning: no previous prototype for 'pgd_ctor' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:32:8: warning: no previous prototype for 'pgd_alloc' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:37:6: warning: no previous prototype for 'pgd_free' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:43:6: warning: no previous prototype for 'pud_populate' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:48:8: warning: no previous prototype for 'pmd_alloc_one' [-Wmissing-prototypes]
arch/sh/mm/pgtable.c:53:6: warning: no previous prototype for 'pmd_free' [-Wmissing-prototypes]
arch/sh/mm/tlbex_32.c:22:1: warning: no previous prototype for 'handle_tlbmiss' [-Wmissing-prototypes]
arch/sh/kernel/sys_sh.c:58:16: warning: no previous prototype for 'sys_cacheflush' [-Wmissing-prototypes]
[...]
[INFO] Compiling sparc32
[INFO] 0 errors
[INFO] 1 warnings
[PASS]
$ cat sparc32_log | grep warn
<stdin>:1519:2: warning: #warning syscall clone3 not implemented [-Wcpp]
[INFO] Compiling sparc64
[INFO] 0 errors
[INFO] 26 warnings
[PASS]
$ cat sparc64_log | grep warn
<stdin>:1519:2: warning: #warning syscall clone3 not implemented [-Wcpp]
arch/sparc/vdso/vma.c:246:12: warning: no previous prototype for 'init_vdso_image' [-Wmissing-prototypes]
arch/sparc/vdso/vclock_gettime.c:254:1: warning: no previous prototype for '__vdso_clock_gettime' [-Wmissing-prototypes]
arch/sparc/vdso/vclock_gettime.c:282:1: warning: no previous prototype for '__vdso_clock_gettime_stick' [-Wmissing-prototypes]
arch/sparc/vdso/vclock_gettime.c:307:1: warning: no previous prototype for '__vdso_gettimeofday' [-Wmissing-prototypes]
arch/sparc/vdso/vclock_gettime.c:343:1: warning: no previous prototype for '__vdso_gettimeofday_stick' [-Wmissing-prototypes]
arch/sparc/kernel/traps_64.c:253:6: warning: no previous prototype for 'is_no_fault_exception' [-Wmissing-prototypes]
arch/sparc/kernel/traps_64.c:2035:6: warning: no previous prototype for 'do_mcd_err' [-Wmissing-prototypes]
[...]
[INFO] Compiling uml64
[INFO] 0 errors
[INFO] 51 warnings
[PASS]
$ cat uml64_log | grep warn
arch/x86/um/user-offsets.c:17:6: warning: no previous prototype for 'foo' [-Wmissing-prototypes]
./arch/x86/um/shared/sysdep/kernel-offsets.h:9:6: warning: no previous prototype for 'foo' [-Wmissing-prototypes]
arch/x86/um/bugs_64.c:9:6: warning: no previous prototype for 'arch_check_bugs' [-Wmissing-prototypes]
arch/x86/um/bugs_64.c:13:6: warning: no previous prototype for 'arch_examine_signal' [-Wmissing-prototypes]
arch/x86/um/fault.c:18:5: warning: no previous prototype for 'arch_fixup' [-Wmissing-prototypes]
arch/x86/um/ptrace_64.c:111:5: warning: no previous prototype for 'poke_user' [-Wmissing-prototypes]
arch/x86/um/ptrace_64.c:171:5: warning: no previous prototype for 'peek_user' [-Wmissing-prototypes]
arch/um/os-Linux/main.c:187:7: warning: no previous prototype for '__wrap_malloc' [-Wmissing-prototypes]
arch/um/os-Linux/main.c:208:7: warning: no previous prototype for '__wrap_calloc' [-Wmissing-prototypes]
arch/um/os-Linux/main.c:222:6: warning: no previous prototype for '__wrap_free' [-Wmissing-prototypes]
arch/um/os-Linux/mem.c:28:6: warning: no previous prototype for 'kasan_map_memory' [-Wmissing-prototypes]
arch/um/os-Linux/mem.c:212:13: warning: no previous prototype for 'check_tmpexec' [-Wmissing-prototypes]
arch/um/os-Linux/signal.c:75:6: warning: no previous prototype for 'sig_handler' [-Wmissing-prototypes]
arch/um/os-Linux/signal.c:111:6: warning: no previous prototype for 'timer_alarm_handler' [-Wmissing-prototypes]
[...]
[INFO] Compiling xtensa
[INFO] 1 errors
[INFO] 1 warnings
[FAIL]
$ cat xtensa_log | grep Error
./arch/xtensa/include/asm/initialize_mmu.h:57: Error: invalid register 'atomctl' for 'wsr' instruction
make[4]: *** [scripts/Makefile.build:362: arch/xtensa/kernel/head.o] Error 1
make[3]: *** [scripts/Makefile.build:485: arch/xtensa/kernel] Error 2
make[2]: *** [scripts/Makefile.build:485: arch/xtensa] Error 2
make[1]: *** [/home/dhildenb/git/linux-cross/Makefile:1919: .] Error 2
make: *** [Makefile:240: __sub-make] Error 2
--
Cheers,
David / dhildenb
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH v2 1/3] clk: samsung: introduce nMUX for MUX clks that can reparented
From: Krzysztof Kozlowski @ 2024-03-28 9:56 UTC (permalink / raw)
To: Tudor Ambarus, peter.griffin
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, linux-kernel,
andre.draszik, willmcvicker, kernel-team, s.nawrocki, cw00.choi,
mturquette, sboyd, semen.protsenko, linux-clk, jaewon02.kim
In-Reply-To: <20240326172813.801470-2-tudor.ambarus@linaro.org>
On 26/03/2024 18:28, Tudor Ambarus wrote:
> All samsung MUX clocks that are defined with MUX() set the
> CLK_SET_RATE_NO_REPARENT flag in __MUX(), which prevents MUXes to be
> reparented during clk_set_rate().
>
> Introduce nMUX() for MUX clocks that can be reparented. One user of
> nMUX() will be GS101. GS101 defines MUX clocks that are dedicated for
> each instance of an IP (see MUX USI). The reparenting of these MUX clocks
> will not affect other instances of the same IP or different IPs
> altogether.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
> drivers/clk/samsung/clk.h | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
> index a70bd7cce39f..01f58b7686db 100644
> --- a/drivers/clk/samsung/clk.h
> +++ b/drivers/clk/samsung/clk.h
> @@ -146,6 +146,26 @@ struct samsung_mux_clock {
> #define MUX_F(_id, cname, pnames, o, s, w, f, mf) \
> __MUX(_id, cname, pnames, o, s, w, f, mf)
>
> +/* Used by MUX clocks where reparenting is allowed. */
...where reparenting on clock rate change is allowed
Because otherwise this suggest muxes cannot change :)
No need to resend just for this, I can fix it while applying. Still
waiting for some review, till EOD.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v3 0/5] arm64: dts: exynos: gs101: define all PERIC USI nodes
From: Krzysztof Kozlowski @ 2024-03-28 9:58 UTC (permalink / raw)
To: peter.griffin, robh+dt, krzysztof.kozlowski+dt, conor+dt,
Tudor Ambarus
Cc: alim.akhtar, linux-arm-kernel, linux-samsung-soc, devicetree,
linux-kernel, andre.draszik, willmcvicker, kernel-team
In-Reply-To: <20240326151301.348932-1-tudor.ambarus@linaro.org>
On Tue, 26 Mar 2024 15:12:56 +0000, Tudor Ambarus wrote:
> The series starts with some trivial cosmetics patches, then defines all
> the PERIC USI nodes.
>
> v3:
> - seems that Andre' already reordered the pinctrl properties, take his
> patch (first in the series) and rebase my series on top.
> - small updates on commit messages
> - collect R-b tags
>
> [...]
Applied, thanks!
[1/5] arm64: dts: exynos: gs101: reorder pinctrl-* properties
https://git.kernel.org/krzk/linux/c/7d7df014617ba8df7fbdacac54cafe0d13573dcb
[2/5] arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
https://git.kernel.org/krzk/linux/c/73618dfa705dc8f993a6829c895eaf5af8402ceb
[3/5] arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
https://git.kernel.org/krzk/linux/c/d978c70e8d4775c62db21f85947d12b4f874104a
[4/5] arm64: dts: exynos: gs101: join lines close to 80 chars
https://git.kernel.org/krzk/linux/c/028a87e91fcd8c485afcf8bd0d26ae34a0872438
[5/5] arm64: dts: exynos: gs101: define all PERIC USI nodes
https://git.kernel.org/krzk/linux/c/a45c3a9b1ef9571741d40bf10f22ce3c60bc5111
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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^ permalink raw reply
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