* RE: [PATCH v7 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support
From: Peng Fan @ 2024-04-02 14:04 UTC (permalink / raw)
To: Cristian Marussi, Peng Fan (OSS)
Cc: Sudeep Holla, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Linus Walleij, Dan Carpenter,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, Oleksii Moisieiev
In-Reply-To: <Zgvd7npz1jdJSu-b@pluto>
> Subject: Re: [PATCH v7 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol
> protocol basic support
>
> On Tue, Apr 02, 2024 at 10:22:23AM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add basic implementation of the SCMI v3.2 pincontrol protocol.
> >
>
> Hi,
>
>
> > Co-developed-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>
> > Signed-off-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
>
> [snip]
>
>
> > +struct scmi_settings_get_ipriv {
> > + u32 selector;
> > + enum scmi_pinctrl_selector_type type;
> > + bool get_all;
> > + enum scmi_pinctrl_conf_type *config_types;
> > + u32 *config_values;
> > +};
> > +
> > +static void
> > +iter_pinctrl_settings_get_prepare_message(void *message, u32 desc_index,
> > + const void *priv)
> > +{
> > + struct scmi_msg_settings_get *msg = message;
> > + const struct scmi_settings_get_ipriv *p = priv;
> > + u32 attributes;
> > +
> > + attributes = FIELD_PREP(SELECTOR_MASK, p->type);
> > +
> > + if (p->get_all) {
> > + attributes |= FIELD_PREP(CONFIG_FLAG_MASK, 1) |
> > + FIELD_PREP(SKIP_CONFIGS_MASK, desc_index);
> > + } else {
> > + attributes |= FIELD_PREP(CONFIG_TYPE_MASK, p-
> >config_types[0]);
> > + }
> > +
> > + msg->attributes = cpu_to_le32(attributes);
> > + msg->identifier = cpu_to_le32(p->selector); }
> > +
> > +static int
> > +iter_pinctrl_settings_get_update_state(struct scmi_iterator_state *st,
> > + const void *response, void *priv) {
> > + const struct scmi_resp_settings_get *r = response;
> > + struct scmi_settings_get_ipriv *p = priv;
> > +
> > + if (p->get_all) {
> > + st->num_returned = le32_get_bits(r->num_configs,
> GENMASK(7, 0));
> > + st->num_remaining = le32_get_bits(r->num_configs,
> GENMASK(31, 24));
> > + } else {
> > + st->num_returned = 1;
> > + st->num_remaining = 0;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +iter_pinctrl_settings_get_process_response(const struct
> scmi_protocol_handle *ph,
> > + const void *response,
> > + struct scmi_iterator_state *st,
> > + void *priv)
> > +{
> > + const struct scmi_resp_settings_get *r = response;
> > + struct scmi_settings_get_ipriv *p = priv;
> > + u32 type = le32_get_bits(r->configs[st->loop_idx * 2], GENMASK(7,
> 0));
> > + u32 val = le32_to_cpu(r->configs[st->loop_idx * 2 + 1]);
> > +
> > + if (p->get_all) {
> > + p->config_types[st->desc_index + st->loop_idx] = type;
> > + } else {
> > + if (p->config_types[0] != type)
> > + return -EINVAL;
> > + }
> > +
> > + p->config_values[st->desc_index + st->loop_idx] = val;
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +scmi_pinctrl_settings_get(const struct scmi_protocol_handle *ph, u32
> selector,
> > + enum scmi_pinctrl_selector_type type,
> > + enum scmi_pinctrl_conf_type config_type,
> > + u32 *config_value, bool get_all) {
> > + int ret;
> > + void *iter;
> > + struct scmi_iterator_ops ops = {
> > + .prepare_message =
> iter_pinctrl_settings_get_prepare_message,
> > + .update_state = iter_pinctrl_settings_get_update_state,
> > + .process_response =
> iter_pinctrl_settings_get_process_response,
> > + };
> > + struct scmi_settings_get_ipriv ipriv = {
> > + .selector = selector,
> > + .type = type,
> > + .get_all = get_all,
> > + .config_types = &config_type,
> > + .config_values = config_value,
> > + };
> > +
> > + if (!config_value || type == FUNCTION_TYPE)
> > + return -EINVAL;
> > +
> > + ret = scmi_pinctrl_validate_id(ph, selector, type);
> > + if (ret)
> > + return ret;
> > +
> > + iter = ph->hops->iter_response_init(ph, &ops, SCMI_PIN_OEM_END,
> > + PINCTRL_SETTINGS_GET,
> > + sizeof(struct
> scmi_msg_settings_get),
> > + &ipriv);
> > + if (IS_ERR(iter))
> > + return PTR_ERR(iter);
> > +
> > + return ph->hops->iter_response_run(iter);
> > +}
> > +
> > +static int scmi_pinctrl_settings_get_one(const struct scmi_protocol_handle
> *ph,
> > + u32 selector,
> > + enum scmi_pinctrl_selector_type
> type,
> > + enum scmi_pinctrl_conf_type
> config_type,
> > + u32 *config_value)
> > +{
> > + return scmi_pinctrl_settings_get(ph, selector, type, config_type,
> > + config_value, false);
> > +}
> > +
> > +static int scmi_pinctrl_settings_get_all(const struct scmi_protocol_handle
> *ph,
> > + u32 selector,
> > + enum scmi_pinctrl_selector_type
> type,
> > + enum scmi_pinctrl_conf_type
> config_type,
> > + u32 *config_value)
> > +{
> > + return scmi_pinctrl_settings_get(ph, selector, type, config_type,
> > + config_value, true);
> > +}
> > +
>
> If you generalize the scmi_pinctrl_settings_get() and reintroduce a
> .settings_get_all() ops (even though unused by pinctrl driver, I am fine with
> this..), you should take care to pass as an input parameter NOT only the array
> of config_values BUT also an array of config_types since you could get back
> up to 256 OEM types: for this reason you will need also to pass to
> scmi_pinctrl_settings_get() an input param that specifies the sizes of the
> 2 array input params (in order to avoid oveflows) AND use that same inout
> param also as an output param to report at the end how many OEM types
> were effectively found and returned....
>
> IOW, I did this on top of your V7 to make the settings_get_all work:
>
> ---8<---
> diff --git a/drivers/firmware/arm_scmi/pinctrl.c
> b/drivers/firmware/arm_scmi/pinctrl.c
> index b75af1dd75fa..f4937af66c4d 100644
> --- a/drivers/firmware/arm_scmi/pinctrl.c
> +++ b/drivers/firmware/arm_scmi/pinctrl.c
> @@ -317,6 +317,7 @@ struct scmi_settings_get_ipriv {
> u32 selector;
> enum scmi_pinctrl_selector_type type;
> bool get_all;
> + unsigned int *nr_configs;
> enum scmi_pinctrl_conf_type *config_types;
> u32 *config_values;
> };
> @@ -379,6 +380,7 @@ iter_pinctrl_settings_get_process_response(const
> struct scmi_protocol_handle *ph
> }
>
> p->config_values[st->desc_index + st->loop_idx] = val;
> + ++*p->nr_configs;
>
> return 0;
> }
> @@ -386,11 +388,13 @@ iter_pinctrl_settings_get_process_response(const
> struct scmi_protocol_handle *ph static int scmi_pinctrl_settings_get(const
> struct scmi_protocol_handle *ph, u32 selector,
> enum scmi_pinctrl_selector_type type,
> - enum scmi_pinctrl_conf_type config_type,
> - u32 *config_value, bool get_all)
> + unsigned int *nr_configs,
> + enum scmi_pinctrl_conf_type *config_types,
> + u32 *config_values)
> {
> int ret;
> void *iter;
> + unsigned int max_configs = *nr_configs;
> struct scmi_iterator_ops ops = {
> .prepare_message =
> iter_pinctrl_settings_get_prepare_message,
> .update_state = iter_pinctrl_settings_get_update_state,
> @@ -399,19 +403,22 @@ scmi_pinctrl_settings_get(const struct
> scmi_protocol_handle *ph, u32 selector,
> struct scmi_settings_get_ipriv ipriv = {
> .selector = selector,
> .type = type,
> - .get_all = get_all,
> - .config_types = &config_type,
> - .config_values = config_value,
> + .get_all = (max_configs > 1),
> + .nr_configs = nr_configs,
> + .config_types = config_types,
> + .config_values = config_values,
> };
>
> - if (!config_value || type == FUNCTION_TYPE)
> + if (!config_types || !config_values || type == FUNCTION_TYPE)
> return -EINVAL;
>
> ret = scmi_pinctrl_validate_id(ph, selector, type);
> if (ret)
> return ret;
>
> - iter = ph->hops->iter_response_init(ph, &ops, SCMI_PIN_OEM_END,
> + /* Prepare to count returned configs */
> + *nr_configs = 0;
> + iter = ph->hops->iter_response_init(ph, &ops, max_configs,
> PINCTRL_SETTINGS_GET,
> sizeof(struct
> scmi_msg_settings_get),
> &ipriv);
> @@ -427,18 +434,24 @@ static int scmi_pinctrl_settings_get_one(const
> struct scmi_protocol_handle *ph,
> enum scmi_pinctrl_conf_type
> config_type,
> u32 *config_value)
> {
> - return scmi_pinctrl_settings_get(ph, selector, type, config_type,
> - config_value, false);
> + unsigned int nr_configs = 1;
> +
> + return scmi_pinctrl_settings_get(ph, selector, type, &nr_configs,
> + &config_type, config_value);
> }
>
> static int scmi_pinctrl_settings_get_all(const struct scmi_protocol_handle
> *ph,
> u32 selector,
> enum scmi_pinctrl_selector_type
> type,
> - enum scmi_pinctrl_conf_type
> config_type,
> - u32 *config_value)
> + unsigned int *nr_configs,
> + enum scmi_pinctrl_conf_type
> *config_types,
> + u32 *config_values)
> {
> - return scmi_pinctrl_settings_get(ph, selector, type, config_type,
> - config_value, true);
> + if (!nr_configs || *nr_configs == 0)
> + return -EINVAL;
> +
> + return scmi_pinctrl_settings_get(ph, selector, type, nr_configs,
> + config_types, config_values);
> }
>
> static int
> diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h
> index abaf6122ea37..7915792efd81 100644
> --- a/include/linux/scmi_protocol.h
> +++ b/include/linux/scmi_protocol.h
> @@ -882,8 +882,9 @@ struct scmi_pinctrl_proto_ops {
> int (*settings_get_all)(const struct scmi_protocol_handle *ph,
> u32 selector,
> enum scmi_pinctrl_selector_type type,
> - enum scmi_pinctrl_conf_type config_type,
> - u32 *config_value);
> + unsigned int *nr_configs,
> + enum scmi_pinctrl_conf_type *config_types,
> + u32 *config_values);
> int (*settings_conf)(const struct scmi_protocol_handle *ph,
> u32 selector, enum scmi_pinctrl_selector_type
> type,
> unsigned int nr_configs,
> --->8-----
>
> Please check if this addition sounds good to you and integrate into v8
> eventually...
Thanks for helping on this, I will included your changes, and your
Co-developed-by tag if you not mind.
Thanks,
Peng.
>
> Thanks,
> Cristian
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^ permalink raw reply
* [PATCH v1 0/3] mm/gup: consistently call it GUP-fast
From: David Hildenbrand @ 2024-04-02 12:55 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mm, David Hildenbrand, Andrew Morton, Mike Rapoport,
Jason Gunthorpe, John Hubbard, Peter Xu, linux-arm-kernel,
loongarch, linux-mips, linuxppc-dev, linux-s390, linux-sh,
linux-perf-users, linux-fsdevel, linux-riscv, x86
Some cleanups around function names, comments and the config option of
"GUP-fast" -- GUP without "lock" safety belts on.
With this cleanup it's easy to judge which functions are GUP-fast specific.
We now consistently call it "GUP-fast", avoiding mixing it with "fast GUP",
"lockless", or simply "gup" (which I always considered confusing in the
ode).
So the magic now happens in functions that contain "gup_fast", whereby
gup_fast() is the entry point into that magic. Comments consistently
reference either "GUP-fast" or "gup_fast()".
Based on mm-unstable from today. I won't CC arch maintainers, but only
arch mailing lists, to reduce noise.
Tested on x86_64, cross compiled on a bunch of archs.
RFC -> v1:
* Rebased on latest mm/mm-unstable
* "mm/gup: consistently name GUP-fast functions"
-> "internal_get_user_pages_fast()" -> "gup_fast_fallback()"
-> "undo_dev_pagemap()" -> "gup_fast_undo_dev_pagemap()"
-> Fixup a bunch more comments
* "mm/treewide: rename CONFIG_HAVE_FAST_GUP to CONFIG_HAVE_GUP_FAST"
-> Take care of RISCV
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Mike Rapoport (IBM) <rppt@kernel.org>
Cc: Jason Gunthorpe <jgg@nvidia.com>
Cc: John Hubbard <jhubbard@nvidia.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: loongarch@lists.linux.dev
Cc: linux-mips@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s390@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Cc: linux-mm@kvack.org
Cc: linux-perf-users@vger.kernel.org
Cc: linux-fsdevel@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: x86@kernel.org
David Hildenbrand (3):
mm/gup: consistently name GUP-fast functions
mm/treewide: rename CONFIG_HAVE_FAST_GUP to CONFIG_HAVE_GUP_FAST
mm: use "GUP-fast" instead "fast GUP" in remaining comments
arch/arm/Kconfig | 2 +-
arch/arm64/Kconfig | 2 +-
arch/loongarch/Kconfig | 2 +-
arch/mips/Kconfig | 2 +-
arch/powerpc/Kconfig | 2 +-
arch/riscv/Kconfig | 2 +-
arch/s390/Kconfig | 2 +-
arch/sh/Kconfig | 2 +-
arch/x86/Kconfig | 2 +-
include/linux/rmap.h | 8 +-
kernel/events/core.c | 4 +-
mm/Kconfig | 2 +-
mm/filemap.c | 2 +-
mm/gup.c | 215 +++++++++++++++++++++--------------------
mm/internal.h | 2 +-
mm/khugepaged.c | 2 +-
16 files changed, 127 insertions(+), 126 deletions(-)
--
2.44.0
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^ permalink raw reply
* RE: [PATCH v6 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support
From: Peng Fan @ 2024-04-02 14:01 UTC (permalink / raw)
To: Andy Shevchenko, Cristian Marussi
Cc: Peng Fan (OSS), Sudeep Holla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Dan Carpenter,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, Oleksii Moisieiev
In-Reply-To: <CAHp75VdAaTeQ_Ag3gd0s9UfT=kAT2hwibeJ9-YFXJx4z=R3e+g@mail.gmail.com>
> Subject: Re: [PATCH v6 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol
> protocol basic support
>
> On Tue, Apr 2, 2024 at 10:48 AM Cristian Marussi
> <cristian.marussi@arm.com> wrote:
> > On Sun, Mar 31, 2024 at 01:44:28PM +0000, Peng Fan wrote:
> > > > Sat, Mar 23, 2024 at 08:15:16PM +0800, Peng Fan (OSS) kirjoitti:
>
> ...
>
> > > > > +#include <linux/module.h>
> > > > > +#include <linux/scmi_protocol.h> #include <linux/slab.h>
> > > >
> > > > This is semi-random list of headers. Please, follow IWYU principle
> > > > (include what you use). There are a lot of inclusions I see
> > > > missing (just in the context of this page I see bits.h, types.h, and
> asm/byteorder.h).
> > >
> > > Is there any documentation about this requirement?
> > > Some headers are already included by others.
>
> The documentation here is called "a common sense".
> The C language is built like this and we expect that nobody will invest into the
> dependency hell that we have already, that's why IWYU principle, please
> follow it.
>
> > Andy made (mostly) the same remarks on this same patch ~1-year ago on
> > this same patch while it was posted by Oleksii.
> >
> > And I told that time that most of the remarks around devm_ usage were
> > wrong due to how the SCMI core handles protocol initialization (using
> > a devres group transparently).
> >
> > This is what I answered that time.
> >
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > .kernel.org%2Flinux-arm-kernel%2FZJ78hBcjAhiU%2BZBO%40e120937-
> lin%2F%2
> >
> 3t&data=05%7C02%7Cpeng.fan%40nxp.com%7C3f8c12062db048608e2a08d
> c5315bed
> >
> 0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6384766000583
> 40430%7CUn
> >
> known%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6I
> k1haW
> >
> wiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=Whn3ehZjXy%2BcKG4irlWjQ6
> K3HF%2FofD
> > Yu7j0Lrm8dN5k%3D&reserved=0
> >
> > I wont repeat myself, but, in a nutshell the memory allocation like it
> > is now is fine: a bit happens via devm_ at protocol initialization,
> > the other is doe via explicit kmalloc at runtime and freed via kfree
> > at remove time (if needed...i.e. checking the present flag of some
> > structs)
>
> This sounds like a mess. devm_ is expected to be used only for the
> ->probe() stage, otherwise you may consider cleanup.h (__free() macro)
> to have automatic free at the paths where memory is not needed.
>
> And the function naming doesn't suggest that you have a probe-remove pair.
> Moreover, if the init-deinit part is called in the probe-remove, the devm_
> must not be mixed with non-devm ones, as it breaks the order and leads to
> subtle mistakes.
I am new to __free() honestly. I'll let Cristian and Sudeep to comment on
what should I do for v8.
Thanks,
Peng.
>
> > I'll made further remarks on v7 that you just posted.
>
> --
> With Best Regards,
> Andy Shevchenko
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^ permalink raw reply
* Re: [PATCH RFT 01/10] arm64: dts: microchip: sparx5: fix mdio reg
From: Steen Hegelund @ 2024-04-02 14:00 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Rob Herring, Daniel Machon, Bjarni Jonasson, linux-kernel,
Conor Dooley, Claudiu Beznea, devicetree, linux-arm-kernel,
Krzysztof Kozlowski, UNGLinuxDriver, David S. Miller,
Lars Povlsen
In-Reply-To: <20240401153740.123978-1-krzk@kernel.org>
Hi Krzysztof,
On Mon, 2024-04-01 at 17:37 +0200, Krzysztof Kozlowski wrote:
> [Some people who received this message don't often get email from
> krzk@kernel.org. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Correct the reg address of mdio node to match unit address. Assume
> the
> reg is not correct and unit address was correct, because there is
> alerady node using the existing reg 0x110102d4.
>
> sparx5.dtsi:443.25-451.5: Warning (simple_bus_reg):
> /axi@600000000/mdio@6110102f8: simple-bus unit address format error,
> expected "6110102d4"
>
> Fixes: d0f482bb06f9 ("arm64: dts: sparx5: Add the Sparx5 switch
> node")
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> ---
>
> Not tested on hardware
> ---
> arch/arm64/boot/dts/microchip/sparx5.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
> b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> index 24075cd91420..5d820da8c69d 100644
> --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
> +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
> @@ -447,7 +447,7 @@ mdio2: mdio@6110102f8 {
> pinctrl-names = "default";
> #address-cells = <1>;
> #size-cells = <0>;
> - reg = <0x6 0x110102d4 0x24>;
> + reg = <0x6 0x110102f8 0x24>;
> };
>
> mdio3: mdio@61101031c {
> --
> 2.34.1
>
I did a check of our current Sparx5 EVBs and none of them uses
controller 2 in any revision, so this is probably why it has not come
up before, so as it stands we have no platform to test this change on
currently.
Besides that the change looks good to me.
Best Regards
Steen
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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^ permalink raw reply
* RE: [PATCH v7 4/4] pinctrl: Implementation of the generic scmi-pinctrl driver
From: Peng Fan @ 2024-04-02 13:59 UTC (permalink / raw)
To: Andy Shevchenko, Peng Fan (OSS)
Cc: Sudeep Holla, Cristian Marussi, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Dan Carpenter,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, Oleksii Moisieiev
In-Reply-To: <ZgwGpZ6S13vjk8jh@smile.fi.intel.com>
> Subject: Re: [PATCH v7 4/4] pinctrl: Implementation of the generic scmi-
> pinctrl driver
>
> On Tue, Apr 02, 2024 at 10:22:24AM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > scmi-pinctrl driver implements pinctrl driver interface and using SCMI
> > protocol to redirect messages from pinctrl subsystem SDK to SCMI
> > platform firmware, which does the changes in HW.
>
> ...
>
> > +#include <linux/device.h>
> > +#include <linux/err.h>
> > +#include <linux/module.h>
> > +#include <linux/seq_file.h>
> > +#include <linux/scmi_protocol.h>
> > +#include <linux/slab.h>
>
> Missing headers.
Not sure there is an easy way to filter out what is missed.
>
> ...
>
> > + *p_groups = (const char * const *)func->groups;
>
> Is this casting needed?
This is no needed.
>
> ...
>
> > +static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev,
> > + unsigned int _pin, unsigned long *config)
>
> Why underscored parameter name?
Underscore could be dropped.
>
> ...
>
> > +static int pinctrl_scmi_get_pins(struct scmi_pinctrl *pmx,
> > + struct pinctrl_desc *desc)
> > +{
> > + struct pinctrl_pin_desc *pins;
> > + unsigned int npins;
> > + int ret, i;
> > +
> > + npins = pinctrl_ops->count_get(pmx->ph, PIN_TYPE);
> > + /*
> > + * npins will never be zero, the scmi pinctrl driver has bailed out
> > + * if npins is zero.
> > + */
>
> This is fragile, but at least it is documented.
>
> > + pins = devm_kmalloc_array(pmx->dev, npins, sizeof(*pins),
> GFP_KERNEL);
> > + if (!pins)
> > + return -ENOMEM;
> > +
> > + for (i = 0; i < npins; i++) {
> > + pins[i].number = i;
> > + ret = pinctrl_ops->name_get(pmx->ph, i, PIN_TYPE,
> &pins[i].name);
> > + if (ret)
>
> How does the cleanup work for the previously assigned pin names? Is it
> needed?
No need. The "name" memory region is allocated in firmware pinctrl
Protocol init phase.
> Maybe a comment?
ok. As below.
/*
* The region for name is handled by the scmi firmware driver,
* no need free here
*/
>
> > + return dev_err_probe(pmx->dev, ret,
> > + "Can't get name for pin %d", i);
> > + }
> > +
> > + desc->npins = npins;
> > + desc->pins = pins;
> > + dev_dbg(pmx->dev, "got pins %u", npins);
> > +
> > + return 0;
> > +}
>
> ...
>
> > +static const struct scmi_device_id scmi_id_table[] = {
> > + { SCMI_PROTOCOL_PINCTRL, "pinctrl" },
> > + { }
> > +};
> > +MODULE_DEVICE_TABLE(scmi, scmi_id_table);
>
> Move this closer to the user.
ok. Fix in v8.
Thanks,
Peng.
>
> --
> With Best Regards,
> Andy Shevchenko
>
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^ permalink raw reply
* Re: [PATCH v6 0/4] fpga: xilinx-selectmap: add new driver
From: Charles Perry @ 2024-04-02 13:57 UTC (permalink / raw)
To: Xu Yilun
Cc: mdf, Allen VANDIVER, Brian CODY, hao wu, yilun xu, Tom Rix,
Rob Herring, krzysztof kozlowski+dt, Conor Dooley, Michal Simek,
linux-fpga, devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <Zgl4I6rykg7shI2K@yilunxu-OptiPlex-7050>
On Mar 31, 2024, at 10:50 AM, Xu Yilun yilun.xu@linux.intel.com wrote:
> On Thu, Mar 21, 2024 at 06:04:32PM -0400, Charles Perry wrote:
>> Hello,
>>
>> This patchset adds a new driver for the 7 series FPGA's SelectMAP
>> interface.
>>
>> The SelectMAP interface shares a common GPIO protocol with the SPI
>> interface which is already in the kernel (drivers/fpga/xilinx-spi.c).
>> The approach proposed in this patchset is to refactor xilinx-spi.c into
>> xilinx-core.c which would handle the common GPIO protocol. This is then
>> used to build two drivers, the already existing xilinx-spi.c driver and
>> a newly added xilinx-selectmap.c driver.
>>
>> The SelectMAP driver proposed only supports 8 bit mode. This is because
>> the 16 and 32 bits mode have limitations with regards to compressed
>> bitstream support as well as introducing endianness considerations.
>>
>> I'm testing xilinx-selectmap.c on a custom i.MX6 board connected to an
>> Artix 7 FPGA. Flashing a 913K bitstream takes 0.44 seconds.
>>
>> Changes since v5: (from Yilun review)
>> * xilinx-core.h: remove private fields kernel-doc
>> * xilinx-spi.c: rename conf into core in xilinx_spi_probe
>> * xilinx-core.c: introduce the new gpio names in patch 4/4
>> * xilinx-core.c: remove kernel-doc on xilinx_core_devm_gpiod_get()
>> * xilinx-selectmap.c:
>> * reorder includes in alphabetical order
>> * xilinx_selectmap_probe(): remove unused resource *r variable
>> * xilinx_selectmap_probe(): use a single gpio_desc* temporary
>> * xilinx_selectmap_probe(): declare variables in reverse xmas tree
>>
>> Changes since v4: (from Yilun and Krzysztof review)
>> * xilinx-core: use sizeof() instead of hardcoded immediate
>> * xilinx-core: fix module compilation (EXPORT_SYMBOL_GPL, MODULE_LICENSE,
>> MODULE_AUTHOR, MODULE_DESCRIPTION)
>> * xilinx-core: add private/public qualifiers for struct xilinx_fpga_core
>> * xilinx-spi: remove struct xilinx_spi_conf. This struct isn't needed as
>> the struct spi_device* can be retrieved from the struct device*.
>> * dt-bindings: remove usage of "_b" and "-b" for the new driver. We
>> agreed that the spi and selectmap driver will use different bindings
>> which will be handled by the driver core and that the legacy names will
>> be used only for the spi compatible.
>> * xilinx-core: select between prog/init and prog_b/init-b
>>
>> Changes since v3: (from Rob Herring review)
>> * Fix an error in the DT binding example compatible.
>> * Drop the renaming of "prog_b" to "prog" and "init-b" to "init".
>> Patches 2 and 3 are removed.
>>
>> Changes since v2:
>> * Inserted patch 2 and 3 which rename "prog_b" and "init-b" into "prog"
>> and "init" for the SPI driver.
>> * From Krzysztof Kozlowski review's:
>> * Use more specific compatible names
>> * Remove other missing occurences of the slave word missed in v2.
>> * From Xu Yilun review's:
>> * Fix vertical whitespace in get_done_gpio().
>> * Combine write() and write_one_dummy_byte() together.
>> * Eliminate most of the xilinx_core_probe() arguments, the driver
>> needs to populate those directly into the xilinx_fpga_core struct.
>> Added some documentation to struct xilinx_fpga_core to clarify
>> this.
>> * Removed typedefs from xilinx-core.h.
>> * Moved null checks in xilinx_core_probe() to first patch.
>> * Move csi_b and rdwr_b out of xilinx_selectmap_conf as they are not
>> used out of the probe function.
>>
>> Changes since v1: (from Krzysztof Kozlowski review's)
>> * Use more conventional names for gpio DT bindings
>> * fix example in DT bindings
>> * add mc-peripheral-props.yaml to DT bindings
>> * fix various formatting mistakes
>> * Remove all occurences of the "slave" word.
>>
>> Charles Perry (4):
>> fpga: xilinx-spi: extract a common driver core
>> dt-bindings: fpga: xlnx,fpga-selectmap: add DT schema
>> fpga: xilinx-selectmap: add new driver
>> xilinx-core: add new gpio names for prog and init
>>
>> .../bindings/fpga/xlnx,fpga-selectmap.yaml | 86 +++++++
>> drivers/fpga/Kconfig | 12 +
>> drivers/fpga/Makefile | 2 +
>> drivers/fpga/xilinx-core.c | 229 ++++++++++++++++++
>> drivers/fpga/xilinx-core.h | 27 +++
>> drivers/fpga/xilinx-selectmap.c | 95 ++++++++
>> drivers/fpga/xilinx-spi.c | 224 ++---------------
>> 7 files changed, 466 insertions(+), 209 deletions(-)
>> create mode 100644
>> Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml
>> create mode 100644 drivers/fpga/xilinx-core.c
>> create mode 100644 drivers/fpga/xilinx-core.h
>> create mode 100644 drivers/fpga/xilinx-selectmap.c
>
> Applied this series to for-next with a nit.
>
> Thanks,
> Yilun
>
Thanks again for all the good reviews Yilun.
Regards,
Charles
>>
>> --
>> 2.43.0
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^ permalink raw reply
* Re: [PATCH net-next 1/3] dt-bindings: net: renesas,rzn1-gmac: Document RZ/N1 GMAC support
From: Geert Uytterhoeven @ 2024-04-02 13:43 UTC (permalink / raw)
To: Romain Gantois
Cc: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Magnus Damm, Alexandre Torgue, Jose Abreu,
Maxime Coquelin, Russell King, Clément Léger,
Thomas Petazzoni, netdev, devicetree, linux-kernel,
linux-renesas-soc, linux-stm32, linux-arm-kernel
In-Reply-To: <20240402-rzn1-gmac1-v1-1-5be2b2894d8c@bootlin.com>
Hi Romain,
On Tue, Apr 2, 2024 at 2:36 PM Romain Gantois
<romain.gantois@bootlin.com> wrote:
> From: Clément Léger <clement.leger@bootlin.com>
>
> The RZ/N1 series of MPUs feature up to two Gigabit Ethernet controllers.
> These controllers are based on Synopsys IPs. They can be connected to
> RZ/N1 RGMII/RMII converters.
>
> Add a binding that describes these GMAC devices.
>
> Signed-off-by: "Clément Léger" <clement.leger@bootlin.com>
> [rgantois: commit log]
> Signed-off-by: Romain Gantois <romain.gantois@bootlin.com>
Thanks for your patch!
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
> +examples:
> + - |
> + #include <dt-bindings/clock/r9a06g032-sysctrl.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + ethernet@44000000 {
> + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> + reg = <0x44000000 0x2000>;
> + interrupt-parent = <&gic>;
There is no need to use interrupt-parent in examples.
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> + clock-names = "stmmaceth";
> + clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
If you want this to be a real example, you should add power-domains.
> + snps,multicast-filter-bins = <256>;
> + snps,perfect-filter-entries = <128>;
> + tx-fifo-depth = <2048>;
> + rx-fifo-depth = <4096>;
> + pcs-handle = <&mii_conv1>;
> + phy-mode = "mii";
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply
* Re: [PATCH v2 00/18] Improve PCI memory mapping API
From: Rick Wertenbroek @ 2024-04-02 12:36 UTC (permalink / raw)
To: Damien Le Moal
Cc: Manivannan Sadhasivam, Lorenzo Pieralisi, Kishon Vijay Abraham I,
Shawn Lin, Krzysztof Wilczyński, Bjorn Helgaas,
Heiko Stuebner, linux-pci, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree, linux-rockchip, linux-arm-kernel,
Wilfred Mallawa, Niklas Cassel
In-Reply-To: <20240330041928.1555578-1-dlemoal@kernel.org>
On Sat, Mar 30, 2024 at 5:19 AM Damien Le Moal <dlemoal@kernel.org> wrote:
>
> This series introduces the new functions pci_epc_map_align(),
> pci_epc_mem_map() and pci_epc_mem_unmap() to improve handling of the
> PCI address mapping alignment constraints of endpoint controllers in a
> controller independent manner.
>
> The issue fixed is that the fixed alignment defined by the "align" field
> of struct pci_epc_features assumes that the alignment of the endpoint
> memory used to map a RC PCI address range is independent of the PCI
> address being mapped. But that is not the case for the rk3399 SoC
> controller: in endpoint mode, this controller uses the lower bits of the
> local endpoint memory address as the lower bits for the PCI addresses
> for data transfers. That is, when mapping local memory, one must take
> into account the number of bits of the RC PCI address that change from
> the start address of the mapping.
>
> To fix this, the new endpoint controller method .map_align is introduced
> and called from pci_epc_map_align(). This method is optional and for
> controllers that do not define it, the mapping information returned
> is based of the fixed alignment constraint as defined by the align
> feature.
>
> The functions pci_epc_mem_map() is a helper function which obtains
> mapping information, allocates endpoint controller memory according to
> the mapping size obtained and maps the memory. pci_epc_mem_map() unmaps
> and frees the endpoint memory.
This way of mapping is not only useful for the RK3399 but would also
help for the addition of other future PCI endpoint controller drivers.
For example, on several FPGA PCI endpoint IPs the window mapping is
also done by passing N bits from the mapped address and M bits from
the window mapping address (where N+M=bus width, e.g., 32 or 64).
Using AND/OR masks/operations to combine the bits for the hardware
address from the mapped address and map base uses less resources than
using add/subtract to get the hardware address from an unaligned map
base and offset. So I guess that more than a few IPs, being hard or
soft IPs, use this kind of mapping (to reduce size, logic, improve max
operating frequency, improve efficiency etc.)
Two major examples come to mind :
1) The AMD/Xilinx PCIe endpoint IP. The mapping is documentented in
"AXI Bridge for PCI Express Gen3 Subsystem Product Guide (PG194)" [1]
section BAR and Address Translation (Figure AXI to PCIe Address
Translation).
2) The Intel/Altera PCIe endpoint IP. The mapping is documented in
"Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide" [2]
section 3.6. Root Port Address Translation Table Enablement.
Both those IPs don't have mainline support yet as PCIe endpoint
controllers but also use a similar kind of mapping as suggested here
for the RK3399. So these changes would also make the addition of these
controller drivers easier.
The new mapping scheme also makes it much clearer in the PCI endpoint
framework. Because without it some mapping operation would fail
because of alignment requirements in the controller, this requires
extra code and checks in the drivers that implement the endpoint
functions. With the current state of the PCI endpoint controller
framework there is no good way to express that the controller does an
AND/OR mask combination to create the hardware address and therefore
requires the map to be aligned to the window size, rather than doing a
window base addition with an offset (subtraction) in the mapping. This
could benefit from further clarification in the endpoint framework.
Best regards,
Rick
[1] https://docs.amd.com/r/en-US/pg194-axi-bridge-pcie-gen3/Address-Translation
[2] https://www.intel.com/content/www/us/en/docs/programmable/683821/23-4/
>
> This series is organized as follows:
> - Patch 1 tidy up the epc core code
> - Patch 2 and 3 introduce the new map_align endpoint controller method
> and related epc functions.
> - Patch 4 to 6 modify the test endpoint driver to use these new
> functions and improve the code of this driver.
> - Finally, Patch 7 to 18 fix the rk3399 endpoint driver, defining a
> .map_align method for it and improving its overall code readability
> and features.
>
> Changes from v1:
> - Changed pci_epc_check_func() to pci_epc_function_is_valid() in patch
> 1.
> - Removed patch "PCI: endpoint: Improve pci_epc_mem_alloc_addr()"
> (former patch 2 of v1)
> - Various typos cleanups all over. Also fixed some blank space
> indentation.
> - Added review tags
>
> Damien Le Moal (17):
> PCI: endpoint: Introduce pci_epc_function_is_valid()
> PCI: endpoint: Introduce pci_epc_map_align()
> PCI: endpoint: Introduce pci_epc_mem_map()/unmap()
> PCI: endpoint: test: Use pci_epc_mem_map/unmap()
> PCI: endpoint: test: Synchronously cancel command handler work
> PCI: endpoint: test: Implement link_down event operation
> PCI: rockchip-ep: Fix address translation unit programming
> PCI: rockchip-ep: Use a macro to define EP controller .align feature
> PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr()
> PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr()
> PCI: rockchip-ep: Implement the map_align endpoint controller operation
> PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations
> PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding
> PCI: rockchip-ep: Refactor endpoint link training enable
> PCI: rockship-ep: Introduce rockchip_pcie_ep_stop()
> PCI: rockchip-ep: Improve link training
> PCI: rockchip-ep: Handle PERST# signal in endpoint mode
>
> Wilfred Mallawa (1):
> dt-bindings: pci: rockchip,rk3399-pcie-ep: Add ep-gpios property
>
> .../bindings/pci/rockchip,rk3399-pcie-ep.yaml | 3 +
> drivers/pci/controller/pcie-rockchip-ep.c | 393 ++++++++++++++----
> drivers/pci/controller/pcie-rockchip.c | 17 +-
> drivers/pci/controller/pcie-rockchip.h | 22 +
> drivers/pci/endpoint/functions/pci-epf-test.c | 390 +++++++++--------
> drivers/pci/endpoint/pci-epc-core.c | 213 +++++++---
> include/linux/pci-epc.h | 39 ++
> 7 files changed, 768 insertions(+), 309 deletions(-)
>
> --
> 2.44.0
>
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm: ti: Add BeagleY-AI
From: Rob Herring @ 2024-04-02 13:43 UTC (permalink / raw)
To: Robert Nelson
Cc: Jason Kridner, linux-arm-kernel, Nishanth Menon, linux-kernel,
Jared McArthur, devicetree, Deepak Khatri
In-Reply-To: <20240328191205.82295-1-robertcnelson@gmail.com>
On Thu, 28 Mar 2024 14:12:04 -0500, Robert Nelson wrote:
> This board is based on ti,j722s
>
> https://beagley-ai.org/
> https://openbeagle.org/beagley-ai/beagley-ai
>
> Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
> CC: Rob Herring <robh@kernel.org>
> CC: Nishanth Menon <nm@ti.com>
> CC: Jared McArthur <j-mcarthur@ti.com>
> CC: Jason Kridner <jkridner@beagleboard.org>
> CC: Deepak Khatri <lorforlinux@beagleboard.org>
> ---
> Documentation/devicetree/bindings/arm/ti/k3.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply
* Re: [PATCH] irqchip/gic-v3-its: Don't need VSYNC if VMAPP with {V, Alloc}=={0, x}
From: Marc Zyngier @ 2024-04-02 13:43 UTC (permalink / raw)
To: Tangnianyao; +Cc: tglx, linux-arm-kernel, linux-kernel, guoyang2, wangwudi
In-Reply-To: <8532b19b-361e-2234-92db-83f4d56bae19@huawei.com>
On Tue, 02 Apr 2024 14:32:40 +0100,
Tangnianyao <tangnianyao@huawei.com> wrote:
>
>
>
> On 4/2/2024 20:35, Marc Zyngier wrote:
> > On Tue, 02 Apr 2024 12:41:47 +0100,
> > t00849498 <tangnianyao@huawei.com> wrote:
> >> From GIC spec, a VMAPP with {V, Alloc}=={0, x} is self-synchronizing,
> > It'd be nice to quote the part of the spec (5.3.19).
> yes, that's quote from GIC spec.
> >> This means the ITS command queue does not show the command as
> >> consumed until all of its effects are completed. A VSYNC with unmapped
> >> vpeid is not needed.
> >>
> >> Signed-off-by: t00849498 <tangnianyao@huawei.com>
> > Previous contributions with the same email address had the name
> > "Nianyao Tang" associated with it. Was it wrong in the past? Or is the
> > above wrong?
> Sorry, the above name is wrong, should be "Nianyao Tang".
> >
> >> ---
> >> drivers/irqchip/irq-gic-v3-its.c | 4 ++++
> >> 1 file changed, 4 insertions(+)
> >>
> >> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> >> index fca888b36680..a0ca5dcbb245 100644
> >> --- a/drivers/irqchip/irq-gic-v3-its.c
> >> +++ b/drivers/irqchip/irq-gic-v3-its.c
> >> @@ -789,6 +789,7 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
> >> unsigned long vpt_addr, vconf_addr;
> >> u64 target;
> >> bool alloc;
> >> + bool unmap_v4_1 = !desc->its_vmapp_cmd.valid && is_v4_1(its);
> >>
> >> its_encode_cmd(cmd, GITS_CMD_VMAPP);
> >> its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id);
> >> @@ -832,6 +833,9 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
> >> out:
> >> its_fixup_cmd(cmd);
> >>
> >> + if (unmap_v4_1)
> >> + return NULL;
> >> +
> >> return valid_vpe(its, desc->its_vmapp_cmd.vpe);
> >> }
> >>
> > This is a bit ugly. We already have a whole block dedicated to
> > handling VMAPP with V=0 and GICv4.1, and it'd be more readable to keep
> > all that code together. Something like the untested patch below.
>
> Thank you for quick fix, it would be great to remove this VSYNC. ITS handling VSYNC unmap
> vpeid may waste some time, trigger exception and needed to be
> handled.
Do you actually see an exception being delivered from this?
In any case, feel free to respin the patch after having tested this
diff, with the commit message fixed and a Fixes: tag attached to it.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
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^ permalink raw reply
* Re: [PATCH 0/9] perf: Avoid explicit cpumask var allocation from stack
From: Dawei Li @ 2024-04-02 13:40 UTC (permalink / raw)
To: Mark Rutland
Cc: will, xueshuai, renyu.zj, yangyicong, jonathan.cameron, andersson,
konrad.dybcio, linux-arm-kernel, linux-kernel, linux-arm-msm
In-Reply-To: <ZgvoMunpbaE-x3jV@FVFF77S0Q05N>
Hi Mark,
Thanks for the quick review.
On Tue, Apr 02, 2024 at 12:12:50PM +0100, Mark Rutland wrote:
> On Tue, Apr 02, 2024 at 06:56:01PM +0800, Dawei Li wrote:
> > Hi,
> >
> > This series try to eliminate direct cpumask var allocation from stack
> > for perf subsystem.
> >
> > Direct/explicit allocation of cpumask on stack could be dangerous since
> > it can lead to stack overflow for systems with big NR_CPUS or
> > CONFIG_CPUMASK_OFFSTACK=y.
> >
> > For arm64, it's more urgent since commit 3fbd56f0e7c1 ("ARM64: Dynamically
> > allocate cpumasks and increase supported CPUs to 512").
> >
> > It's sort of a pattern that almost every cpumask var in perf subystem
> > occurs in teardown callback of cpuhp. In which case, if dynamic
> > allocation failed(which is unlikely), we choose return 0 rather than
> > -ENOMEM to caller cuz:
> > @teardown is not supposed to fail and if it does, system crashes:
>
> .. but we've left the system in an incorrect state, so that makes no sense.
>
> As I commented on the first patch, NAK to dynamically allocating cpumasks in
> the CPUHP callbacks. Please allocate the necessry cpumasks up-front when we
> probe the PMU. At that time we can handle an allocation failure by cleaning up
> and failing to probe the PMU, and then the CPUHP callbacks don't need to
> allocate memory to offline a CPU...
Agreed that dynamically allocation in callbacks lead to inconsistency
to system.
My (original)alternative plan is simple but ugly, just make cpumask var
_static_ and add extra static lock to protect it.
The only difference between solution above and your proposal is static/
dynamic alloction. CPUHP's teardown cb is supposed to run in targetted
cpuhp thread for most cases, and it's racy. Even the cpumask var is
wrapped in dynamically allocated struct xxx_pmu, it's still shareable
between different threads/contexts and needs proper protection.
Simple as this(_untested_):
diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c
index 7ef9c7e4836b..fa89c3db4d7d 100644
--- a/drivers/perf/arm-cmn.c
+++ b/drivers/perf/arm-cmn.c
@@ -1950,18 +1950,24 @@ static int arm_cmn_pmu_offline_cpu(unsigned int cpu, struct hlist_node *cpuhp_no
struct arm_cmn *cmn;
unsigned int target;
int node;
- cpumask_t mask;
+ static cpumask_t mask;
+ static DEFINE_SPINLOCK(cpumask_lock);
cmn = hlist_entry_safe(cpuhp_node, struct arm_cmn, cpuhp_node);
if (cpu != cmn->cpu)
return 0;
+ spin_lock(&cpumask_lock);
+
node = dev_to_node(cmn->dev);
if (cpumask_and(&mask, cpumask_of_node(node), cpu_online_mask) &&
cpumask_andnot(&mask, &mask, cpumask_of(cpu)))
target = cpumask_any(&mask);
else
target = cpumask_any_but(cpu_online_mask, cpu);
+
+ spin_unlock(&cpumask_lock);
+
if (target < nr_cpu_ids)
arm_cmn_migrate(cmn, target);
return 0;
And yes, static allocation is evil :)
Thanks,
Dawei
>
> Also, for the titles it'd be better to say something like "avoid placing
> cpumasks on the stack", because "explicit cpumask var allocation" sounds like
> the use of alloc_cpumask_var().
Sound great! I will update it.
>
> Mark.
>
> >
> > static int cpuhp_issue_call(int cpu, enum cpuhp_state state, bool bringup,
> > struct hlist_node *node)
> > {
> > struct cpuhp_step *sp = cpuhp_get_step(state);
> > int ret;
> >
> > /*
> > * If there's nothing to do, we done.
> > * Relies on the union for multi_instance.
> > */
> > if (cpuhp_step_empty(bringup, sp))
> > return 0;
> > /*
> > * The non AP bound callbacks can fail on bringup. On teardown
> > * e.g. module removal we crash for now.
> > */
> > #ifdef CONFIG_SMP
> > if (cpuhp_is_ap_state(state))
> > ret = cpuhp_invoke_ap_callback(cpu, state, bringup, node);
> > else
> > ret = cpuhp_invoke_callback(cpu, state, bringup, node,
> > NULL);
> > #else
> > ret = cpuhp_invoke_callback(cpu, state, bringup, node, NULL);
> > #endif
> > BUG_ON(ret && !bringup);
> > return ret;
> > }
> >
> > Dawei Li (9):
> > perf/alibaba_uncore_drw: Avoid explicit cpumask var allocation from
> > stack
> > perf/arm-cmn: Avoid explicit cpumask var allocation from stack
> > perf/arm_cspmu: Avoid explicit cpumask var allocation from stack
> > perf/arm_dsu: Avoid explicit cpumask var allocation from stack
> > perf/dwc_pcie: Avoid explicit cpumask var allocation from stack
> > perf/hisi_pcie: Avoid explicit cpumask var allocation from stack
> > perf/hisi_uncore: Avoid explicit cpumask var allocation from stack
> > perf/qcom_l2: Avoid explicit cpumask var allocation from stack
> > perf/thunder_x2: Avoid explicit cpumask var allocation from stack
> >
> > drivers/perf/alibaba_uncore_drw_pmu.c | 13 +++++++++----
> > drivers/perf/arm-cmn.c | 13 +++++++++----
> > drivers/perf/arm_cspmu/arm_cspmu.c | 13 +++++++++----
> > drivers/perf/arm_dsu_pmu.c | 18 +++++++++++++-----
> > drivers/perf/dwc_pcie_pmu.c | 17 +++++++++++------
> > drivers/perf/hisilicon/hisi_pcie_pmu.c | 15 ++++++++++-----
> > drivers/perf/hisilicon/hisi_uncore_pmu.c | 13 +++++++++----
> > drivers/perf/qcom_l2_pmu.c | 15 ++++++++++-----
> > drivers/perf/thunderx2_pmu.c | 20 ++++++++++++--------
> > 9 files changed, 92 insertions(+), 45 deletions(-)
> >
> >
> > Thanks,
> >
> > Dawei
> >
> > --
> > 2.27.0
> >
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* [PATCH] ARM: dts: renesas: r9a06g032: Remove duplicate interrupt-parent
From: Geert Uytterhoeven @ 2024-04-02 13:36 UTC (permalink / raw)
To: Magnus Damm, Clément Léger
Cc: Romain Gantois, linux-renesas-soc, linux-arm-kernel,
Geert Uytterhoeven
As the "soc" node already specifies the GIC as the interrupt-parent,
there is no reason to repeat this in any of its subnodes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
To be queued in renesas-devel for v6.10.
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index fa63e1afc4ef4c92..45f60eeeaaa1d320 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -319,7 +319,6 @@ dma1: dma-controller@40105000 {
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;
- interrupt-parent = <&gic>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related
* Re: [PATCH bpf-next v2 1/1] arm64/cfi,bpf: Support kCFI + BPF on arm64
From: Mark Rutland @ 2024-04-02 13:35 UTC (permalink / raw)
To: Puranjay Mohan
Cc: Catalin Marinas, Will Deacon, Alexei Starovoitov, Daniel Borkmann,
Andrii Nakryiko, Martin KaFai Lau, Eduard Zingerman, Song Liu,
Yonghong Song, John Fastabend, KP Singh, Stanislav Fomichev,
Hao Luo, Jiri Olsa, Zi Shen Lim, Suzuki K Poulose, Mark Brown,
linux-arm-kernel, open list,
open list:BPF [GENERAL] (Safe Dynamic Programs and Tools),
Josh Poimboeuf
In-Reply-To: <mb61pv858vdah.fsf@gmail.com>
On Tue, Mar 26, 2024 at 10:28:06PM +0000, Puranjay Mohan wrote:
> Mark Rutland <mark.rutland@arm.com> writes:
>
> > Hi Puranjay,
> >
> > On Sun, Mar 24, 2024 at 09:15:18PM +0000, Puranjay Mohan wrote:
> >> Currently, bpf_dispatcher_*_func() is marked with `__nocfi` therefore
> >> calling BPF programs from this interface doesn't cause CFI warnings.
> >>
> >> When BPF programs are called directly from C: from BPF helpers or
> >> struct_ops, CFI warnings are generated.
> >>
> >> Implement proper CFI prologues for the BPF programs and callbacks and
> >> drop __nocfi for arm64. Fix the trampoline generation code to emit kCFI
> >> prologue when a struct_ops trampoline is being prepared.
> >>
> >> Signed-off-by: Puranjay Mohan <puranjay12@gmail.com>
> >
> > Presumably this'll need a Cc stable and a Fixes tag?
>
> Thanks for mentioning, I will find out from what commit this is broken.
>
> >
> >> ---
> >> arch/arm64/include/asm/cfi.h | 23 ++++++++++++++
> >> arch/arm64/kernel/alternative.c | 54 +++++++++++++++++++++++++++++++++
> >> arch/arm64/net/bpf_jit_comp.c | 28 +++++++++++++----
> >> 3 files changed, 99 insertions(+), 6 deletions(-)
> >> create mode 100644 arch/arm64/include/asm/cfi.h
> >>
> >> diff --git a/arch/arm64/include/asm/cfi.h b/arch/arm64/include/asm/cfi.h
> >> new file mode 100644
> >> index 000000000000..670e191f8628
> >> --- /dev/null
> >> +++ b/arch/arm64/include/asm/cfi.h
> >> @@ -0,0 +1,23 @@
> >> +/* SPDX-License-Identifier: GPL-2.0 */
> >> +#ifndef _ASM_ARM64_CFI_H
> >> +#define _ASM_ARM64_CFI_H
> >> +
> >> +#ifdef CONFIG_CFI_CLANG
> >> +#define __bpfcall
> >> +static inline int cfi_get_offset(void)
> >> +{
> >> + return 4;
> >> +}
> >> +#define cfi_get_offset cfi_get_offset
> >> +extern u32 cfi_bpf_hash;
> >> +extern u32 cfi_bpf_subprog_hash;
> >> +extern u32 cfi_get_func_hash(void *func);
> >> +#else
> >> +#define cfi_bpf_hash 0U
> >> +#define cfi_bpf_subprog_hash 0U
> >> +static inline u32 cfi_get_func_hash(void *func)
> >> +{
> >> + return 0;
> >> +}
> >> +#endif /* CONFIG_CFI_CLANG */
> >> +#endif /* _ASM_ARM64_CFI_H */
> >> diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
> >> index 8ff6610af496..1715da7df137 100644
> >> --- a/arch/arm64/kernel/alternative.c
> >> +++ b/arch/arm64/kernel/alternative.c
> >> @@ -13,6 +13,7 @@
> >> #include <linux/elf.h>
> >> #include <asm/cacheflush.h>
> >> #include <asm/alternative.h>
> >> +#include <asm/cfi.h>
> >> #include <asm/cpufeature.h>
> >> #include <asm/insn.h>
> >> #include <asm/module.h>
> >> @@ -298,3 +299,56 @@ noinstr void alt_cb_patch_nops(struct alt_instr *alt, __le32 *origptr,
> >> updptr[i] = cpu_to_le32(aarch64_insn_gen_nop());
> >> }
> >> EXPORT_SYMBOL(alt_cb_patch_nops);
> >> +
> >> +#ifdef CONFIG_CFI_CLANG
> >> +struct bpf_insn;
> >> +
> >> +/* Must match bpf_func_t / DEFINE_BPF_PROG_RUN() */
> >> +extern unsigned int __bpf_prog_runX(const void *ctx,
> >> + const struct bpf_insn *insn);
> >> +
> >> +/*
> >> + * Force a reference to the external symbol so the compiler generates
> >> + * __kcfi_typid.
> >> + */
> >> +__ADDRESSABLE(__bpf_prog_runX);
> >> +
> >> +/* u32 __ro_after_init cfi_bpf_hash = __kcfi_typeid___bpf_prog_runX; */
> >> +asm (
> >> +" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
> >> +" .type cfi_bpf_hash,@object \n"
> >> +" .globl cfi_bpf_hash \n"
> >> +" .p2align 2, 0x0 \n"
> >> +"cfi_bpf_hash: \n"
> >> +" .word __kcfi_typeid___bpf_prog_runX \n"
> >> +" .size cfi_bpf_hash, 4 \n"
> >> +" .popsection \n"
> >> +);
> >> +
> >> +/* Must match bpf_callback_t */
> >> +extern u64 __bpf_callback_fn(u64, u64, u64, u64, u64);
> >> +
> >> +__ADDRESSABLE(__bpf_callback_fn);
> >> +
> >> +/* u32 __ro_after_init cfi_bpf_subprog_hash = __kcfi_typeid___bpf_callback_fn; */
> >> +asm (
> >> +" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
> >> +" .type cfi_bpf_subprog_hash,@object \n"
> >> +" .globl cfi_bpf_subprog_hash \n"
> >> +" .p2align 2, 0x0 \n"
> >> +"cfi_bpf_subprog_hash: \n"
> >> +" .word __kcfi_typeid___bpf_callback_fn \n"
> >> +" .size cfi_bpf_subprog_hash, 4 \n"
> >> +" .popsection \n"
> >> +);
> >> +
> >> +u32 cfi_get_func_hash(void *func)
> >> +{
> >> + u32 hash;
> >> +
> >> + if (get_kernel_nofault(hash, func - cfi_get_offset()))
> >> + return 0;
> >> +
> >> + return hash;
> >> +}
> >> +#endif
> >
> > I realise this is following the example of x86, but this has nothing to do with
> > alternatives, so could we please place it elsewhere? e.g. add a new
> > arch/arm64/net/bpf_cfi.c?
>
> Sure, a new file would work.
> How about: arch/arm64/kernel/cfi.c
Looking again, I don't think we actually need a new file. We should:
(1) Add a generic macro to define a variable with a KCFI type, and migrate
existing code to this. See the patch at the end of this email.
(2) Use that macro within arch/arm64/net/bpf_jit_comp.c, which also avoids the
need to define cfi_bpf_hash or cfi_bpf_subprog_hash in the asm/cfi.h
header.
(3) Place cfi_get_func_hash() in the asm/cfi.h header for now.
> > Which functions is cfi_get_func_hash() used against? The comment in the code
> > below says:
> >
> > if (flags & BPF_TRAMP_F_INDIRECT) {
> > /*
> > * Indirect call for bpf_struct_ops
> > */
> > emit_kcfi(cfi_get_func_hash(func_addr), ctx);
> > }
> >
> > ... but it's not clear to me which functions specifically would be in that
> > 'func_addr', not why returning 0 is fine -- surely we should fail compilation
> > if the provided function pointer causes a fault and we don't have a valid
> > typeid?
>
> 'func_addr' will have one of the cfi_stubs like in net/ipv4/bpf_tcp_ca.c
> Explained in more detail below:
I see, so this is a stub function which will branch to the trampoline.
That explains which functions this'll be used for, but it doesn't explain why
we'd expect those to fault, not we why try to handle that by returning 0.
For CFI to work at all those should *never* fault, so we should be able to
write:
u32 cfi_get_func_hash(void *func)
{
u32 *hashp = func - cfi_get_offset();
return READ_ONCE(*hashp);
}
... right? Or do we expect some of the stubs to be NULL?
> >> diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c
> >> index bc16eb694657..2372812bb47c 100644
> >> --- a/arch/arm64/net/bpf_jit_comp.c
> >> +++ b/arch/arm64/net/bpf_jit_comp.c
> >> @@ -17,6 +17,7 @@
> >> #include <asm/asm-extable.h>
> >> #include <asm/byteorder.h>
> >> #include <asm/cacheflush.h>
> >> +#include <asm/cfi.h>
> >> #include <asm/debug-monitors.h>
> >> #include <asm/insn.h>
> >> #include <asm/patching.h>
> >> @@ -158,6 +159,12 @@ static inline void emit_bti(u32 insn, struct jit_ctx *ctx)
> >> emit(insn, ctx);
> >> }
> >>
> >> +static inline void emit_kcfi(u32 hash, struct jit_ctx *ctx)
> >> +{
> >> + if (IS_ENABLED(CONFIG_CFI_CLANG))
> >> + emit(hash, ctx);
> >> +}
> >> +
> >> /*
> >> * Kernel addresses in the vmalloc space use at most 48 bits, and the
> >> * remaining bits are guaranteed to be 0x1. So we can compose the address
> >> @@ -295,7 +302,7 @@ static bool is_lsi_offset(int offset, int scale)
> >> #define PROLOGUE_OFFSET (BTI_INSNS + 2 + PAC_INSNS + 8)
> >>
> >> static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
> >> - bool is_exception_cb)
> >> + bool is_exception_cb, bool is_subprog)
> >> {
> >> const struct bpf_prog *prog = ctx->prog;
> >> const bool is_main_prog = !bpf_is_subprog(prog);
> >> @@ -306,7 +313,6 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
> >> const u8 fp = bpf2a64[BPF_REG_FP];
> >> const u8 tcc = bpf2a64[TCALL_CNT];
> >> const u8 fpb = bpf2a64[FP_BOTTOM];
> >> - const int idx0 = ctx->idx;
> >> int cur_offset;
> >>
> >> /*
> >> @@ -332,6 +338,8 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf,
> >> *
> >> */
> >>
> >> + emit_kcfi(is_subprog ? cfi_bpf_subprog_hash : cfi_bpf_hash, ctx);
> >> + const int idx0 = ctx->idx;
> >> /* bpf function may be invoked by 3 instruction types:
> >> * 1. bl, attached via freplace to bpf prog via short jump
> >> * 2. br, attached via freplace to bpf prog via long jump
> >> @@ -1648,7 +1656,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
> >> * BPF line info needs ctx->offset[i] to be the offset of
> >> * instruction[i] in jited image, so build prologue first.
> >> */
> >> - if (build_prologue(&ctx, was_classic, prog->aux->exception_cb)) {
> >> + if (build_prologue(&ctx, was_classic, prog->aux->exception_cb,
> >> + bpf_is_subprog(prog))) {
> >> prog = orig_prog;
> >> goto out_off;
> >> }
> >> @@ -1696,7 +1705,8 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
> >> ctx.idx = 0;
> >> ctx.exentry_idx = 0;
> >>
> >> - build_prologue(&ctx, was_classic, prog->aux->exception_cb);
> >> + build_prologue(&ctx, was_classic, prog->aux->exception_cb,
> >> + bpf_is_subprog(prog));
> >>
> >> if (build_body(&ctx, extra_pass)) {
> >> prog = orig_prog;
> >> @@ -1745,9 +1755,9 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
> >> jit_data->ro_header = ro_header;
> >> }
> >>
> >> - prog->bpf_func = (void *)ctx.ro_image;
> >> + prog->bpf_func = (void *)ctx.ro_image + cfi_get_offset();
> >> prog->jited = 1;
> >> - prog->jited_len = prog_size;
> >> + prog->jited_len = prog_size - cfi_get_offset();
> >>
> >> if (!prog->is_func || extra_pass) {
> >> int i;
> >> @@ -2011,6 +2021,12 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,
> >> /* return address locates above FP */
> >> retaddr_off = stack_size + 8;
> >>
> >> + if (flags & BPF_TRAMP_F_INDIRECT) {
> >> + /*
> >> + * Indirect call for bpf_struct_ops
> >> + */
> >> + emit_kcfi(cfi_get_func_hash(func_addr), ctx);
> >> + }
> >
> > I'm confused; why does the trampoline need this?
> >
> > The code that branches to the trampoline doesn't check the type hash: either
> > the callsite branches directly (hence no check), or the common ftrace
> > trampoline does so indirectly, and the latter doesn't know the expected typeid,
> > so it cannot check.
>
> This is not used when the trampoline is attached to the entry of a
> kernel function and called through a direct call or from ftrace_caller.
>
> This is only used when we are building a trampoline for bpf_struct_ops.
>
> Here a kernel subsystem can call this trampoline through a function
> pointer.
>
> See: tools/testing/selftests/bpf/progs/bpf_dctcp.c
>
> Here tcp_congestion_ops functions are implemented in BPF and
> registered with the networking subsystem.
>
> So, the networking subsystem will call them directly for example like:
>
> struct tcp_congestion_ops *ca_ops = ....
>
> ca_ops->cwnd_event(sk, event);
>
> cwnd_event() is implemented in BPF and this call will land on a
> trampoline. Because this is being called from the kernel through a
> function pointer, type_id will be checked. So, the landing location in
> the trampoline should have a type_id above it.
>
> In the above example kernel is calling a function of type
> void cwnd_event(struct sock *sk, enum tcp_ca_event ev);
>
> so the calling code will fetch the type_id from above the destination
> and compare it with the type_id of the above prototype.
>
> To make this work with BPF trampolines, we define stubs while
> registering these struct_ops with the BPF subsystem.
>
> Like in net/ipv4/bpf_tcp_ca.c
> a stub is defined like following:
>
> static void bpf_tcp_ca_cwnd_event(struct sock *sk, enum tcp_ca_event ev)
> {
> }
>
> This is what `func_addr` will have in the prepare_trampoline() function
> and we use cfi_get_func_hash() to fetch the type_id and put it above the
> landing location in the trampoline.
Thanks, that makes sense.
Mark.
---->8----
From 90fe9fa0850216e86daa37c430a3878462ba3e88 Mon Sep 17 00:00:00 2001
From: Mark Rutland <mark.rutland@arm.com>
Date: Tue, 2 Apr 2024 13:56:44 +0100
Subject: [PATCH] cfi: add C CFI type macro
Currently x86 and riscv open-code 4 instances of the same logic to
define a u32 variable with the KCFI typeid of a given function.
Replace the duplicate logic with a common macro.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
---
arch/riscv/kernel/cfi.c | 34 ++--------------------------------
arch/x86/kernel/alternative.c | 35 +++--------------------------------
include/linux/cfi_types.h | 23 +++++++++++++++++++++++
3 files changed, 28 insertions(+), 64 deletions(-)
diff --git a/arch/riscv/kernel/cfi.c b/arch/riscv/kernel/cfi.c
index 64bdd3e1ab8ca..b78a6f41df22d 100644
--- a/arch/riscv/kernel/cfi.c
+++ b/arch/riscv/kernel/cfi.c
@@ -82,41 +82,11 @@ struct bpf_insn;
/* Must match bpf_func_t / DEFINE_BPF_PROG_RUN() */
extern unsigned int __bpf_prog_runX(const void *ctx,
const struct bpf_insn *insn);
-
-/*
- * Force a reference to the external symbol so the compiler generates
- * __kcfi_typid.
- */
-__ADDRESSABLE(__bpf_prog_runX);
-
-/* u32 __ro_after_init cfi_bpf_hash = __kcfi_typeid___bpf_prog_runX; */
-asm (
-" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
-" .type cfi_bpf_hash,@object \n"
-" .globl cfi_bpf_hash \n"
-" .p2align 2, 0x0 \n"
-"cfi_bpf_hash: \n"
-" .word __kcfi_typeid___bpf_prog_runX \n"
-" .size cfi_bpf_hash, 4 \n"
-" .popsection \n"
-);
+DEFINE_CFI_TYPE(cfi_bpf_hash, __bpf_prog_runX);
/* Must match bpf_callback_t */
extern u64 __bpf_callback_fn(u64, u64, u64, u64, u64);
-
-__ADDRESSABLE(__bpf_callback_fn);
-
-/* u32 __ro_after_init cfi_bpf_subprog_hash = __kcfi_typeid___bpf_callback_fn; */
-asm (
-" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
-" .type cfi_bpf_subprog_hash,@object \n"
-" .globl cfi_bpf_subprog_hash \n"
-" .p2align 2, 0x0 \n"
-"cfi_bpf_subprog_hash: \n"
-" .word __kcfi_typeid___bpf_callback_fn \n"
-" .size cfi_bpf_subprog_hash, 4 \n"
-" .popsection \n"
-);
+DEFINE_CFI_TYPE(cfi_bpf_subprog_hash, __bpf_callback_fn);
u32 cfi_get_func_hash(void *func)
{
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 45a280f2161cd..a822699a40ddd 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
#define pr_fmt(fmt) "SMP alternatives: " fmt
+#include <linux/cfi_types.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/perf_event.h>
@@ -918,41 +919,11 @@ struct bpf_insn;
/* Must match bpf_func_t / DEFINE_BPF_PROG_RUN() */
extern unsigned int __bpf_prog_runX(const void *ctx,
const struct bpf_insn *insn);
-
-/*
- * Force a reference to the external symbol so the compiler generates
- * __kcfi_typid.
- */
-__ADDRESSABLE(__bpf_prog_runX);
-
-/* u32 __ro_after_init cfi_bpf_hash = __kcfi_typeid___bpf_prog_runX; */
-asm (
-" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
-" .type cfi_bpf_hash,@object \n"
-" .globl cfi_bpf_hash \n"
-" .p2align 2, 0x0 \n"
-"cfi_bpf_hash: \n"
-" .long __kcfi_typeid___bpf_prog_runX \n"
-" .size cfi_bpf_hash, 4 \n"
-" .popsection \n"
-);
+DEFINE_CFI_TYPE(cfi_bpf_hash, __bpf_prog_runX);
/* Must match bpf_callback_t */
extern u64 __bpf_callback_fn(u64, u64, u64, u64, u64);
-
-__ADDRESSABLE(__bpf_callback_fn);
-
-/* u32 __ro_after_init cfi_bpf_subprog_hash = __kcfi_typeid___bpf_callback_fn; */
-asm (
-" .pushsection .data..ro_after_init,\"aw\",@progbits \n"
-" .type cfi_bpf_subprog_hash,@object \n"
-" .globl cfi_bpf_subprog_hash \n"
-" .p2align 2, 0x0 \n"
-"cfi_bpf_subprog_hash: \n"
-" .long __kcfi_typeid___bpf_callback_fn \n"
-" .size cfi_bpf_subprog_hash, 4 \n"
-" .popsection \n"
-);
+DEFINE_CFI_TYPE(cfi_bpf_subprog_hash, __bpf_callback_fn);
u32 cfi_get_func_hash(void *func)
{
diff --git a/include/linux/cfi_types.h b/include/linux/cfi_types.h
index 6b87136757655..f510e62ca8b18 100644
--- a/include/linux/cfi_types.h
+++ b/include/linux/cfi_types.h
@@ -41,5 +41,28 @@
SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN)
#endif
+#else /* __ASSEMBLY__ */
+
+#ifdef CONFIG_CFI_CLANG
+#define DEFINE_CFI_TYPE(name, func) \
+ /* \
+ * Force a reference to the function so the compiler generates \
+ * __kcfi_typeid_<func>. \
+ */ \
+ __ADDRESSABLE(func); \
+ /* u32 name = __kcfi_typeid_<func> */ \
+ extern u32 name; \
+ asm ( \
+ " .pushsection .data..ro_after_init,\"aw\",@progbits \n" \
+ " .type " #name ",@object \n" \
+ " .globl " #name " \n" \
+ " .p2align 2, 0x0 \n" \
+ #name ": \n" \
+ " .long __kcfi_typeid_" #func " \n" \
+ " .size " #name ", 4 \n" \
+ " .popsection \n" \
+ );
+#endif
+
#endif /* __ASSEMBLY__ */
#endif /* _LINUX_CFI_TYPES_H */
--
2.30.2
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^ permalink raw reply related
* Re: [PATCH] irqchip/gic-v3-its: Don't need VSYNC if VMAPP with {V, Alloc}=={0, x}
From: Tangnianyao @ 2024-04-02 13:32 UTC (permalink / raw)
To: Marc Zyngier; +Cc: tglx, linux-arm-kernel, linux-kernel, guoyang2, wangwudi
In-Reply-To: <86jzlgt014.wl-maz@kernel.org>
On 4/2/2024 20:35, Marc Zyngier wrote:
> On Tue, 02 Apr 2024 12:41:47 +0100,
> t00849498 <tangnianyao@huawei.com> wrote:
>> From GIC spec, a VMAPP with {V, Alloc}=={0, x} is self-synchronizing,
> It'd be nice to quote the part of the spec (5.3.19).
yes, that's quote from GIC spec.
>> This means the ITS command queue does not show the command as
>> consumed until all of its effects are completed. A VSYNC with unmapped
>> vpeid is not needed.
>>
>> Signed-off-by: t00849498 <tangnianyao@huawei.com>
> Previous contributions with the same email address had the name
> "Nianyao Tang" associated with it. Was it wrong in the past? Or is the
> above wrong?
Sorry, the above name is wrong, should be "Nianyao Tang".
>
>> ---
>> drivers/irqchip/irq-gic-v3-its.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
>> index fca888b36680..a0ca5dcbb245 100644
>> --- a/drivers/irqchip/irq-gic-v3-its.c
>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>> @@ -789,6 +789,7 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
>> unsigned long vpt_addr, vconf_addr;
>> u64 target;
>> bool alloc;
>> + bool unmap_v4_1 = !desc->its_vmapp_cmd.valid && is_v4_1(its);
>>
>> its_encode_cmd(cmd, GITS_CMD_VMAPP);
>> its_encode_vpeid(cmd, desc->its_vmapp_cmd.vpe->vpe_id);
>> @@ -832,6 +833,9 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
>> out:
>> its_fixup_cmd(cmd);
>>
>> + if (unmap_v4_1)
>> + return NULL;
>> +
>> return valid_vpe(its, desc->its_vmapp_cmd.vpe);
>> }
>>
> This is a bit ugly. We already have a whole block dedicated to
> handling VMAPP with V=0 and GICv4.1, and it'd be more readable to keep
> all that code together. Something like the untested patch below.
Thank you for quick fix, it would be great to remove this VSYNC. ITS handling VSYNC unmap
vpeid may waste some time, trigger exception and needed to be handled.
> Thanks,
>
> M.
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index fca888b36680..2a537cbfcb07 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -786,6 +786,7 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
> struct its_cmd_block *cmd,
> struct its_cmd_desc *desc)
> {
> + struct its_vpe *vpe = valid_vpe(its, desc->its_vmapp_cmd.vpe);
> unsigned long vpt_addr, vconf_addr;
> u64 target;
> bool alloc;
> @@ -798,6 +799,11 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
> if (is_v4_1(its)) {
> alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count);
> its_encode_alloc(cmd, alloc);
> + /*
> + * Unmapping a VPE is self-synchronizing on GICv4.1,
> + * no need to issue a VSYNC.
> + */
> + vpe = NULL;
> }
>
> goto out;
> @@ -832,7 +838,7 @@ static struct its_vpe *its_build_vmapp_cmd(struct its_node *its,
> out:
> its_fixup_cmd(cmd);
>
> - return valid_vpe(its, desc->its_vmapp_cmd.vpe);
> + return vpe;
> }
>
> static struct its_vpe *its_build_vmapti_cmd(struct its_node *its,
>
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^ permalink raw reply
* RE: [PATCH v7 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support
From: Peng Fan @ 2024-04-02 13:27 UTC (permalink / raw)
To: Andy Shevchenko, Peng Fan (OSS)
Cc: Sudeep Holla, Cristian Marussi, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Dan Carpenter,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, Oleksii Moisieiev
In-Reply-To: <ZgwEtxj-qi6uy_m2@smile.fi.intel.com>
Hi Andy
> Subject: Re: [PATCH v7 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol
> protocol basic support
>
> On Tue, Apr 02, 2024 at 10:22:23AM +0800, Peng Fan (OSS) wrote:
>
> ...
>
> > +#include <linux/module.h>
> > +#include <linux/scmi_protocol.h>
> > +#include <linux/slab.h>
>
> Please, follow IWYU principle, a lot of headers are missed.
ok. I will try to figure out. BTW, is there an easy way to filter
out what is missed?
>
> > +#include "common.h"
> > +#include "protocols.h"
>
> ...
>
> > + ret = scmi_pinctrl_get_pin_info(ph, selector,
> > + &pi->pins[selector]);
>
> It's netter as a single line.
I try to follow 80 max chars per SCMI coding style. If Sudeep and Cristian
is ok, I could use a single line.
>
> > + if (ret)
> > + return ret;
> > + }
>
> ...
>
> > +static int scmi_pinctrl_protocol_init(const struct
> > +scmi_protocol_handle *ph) {
> > + int ret;
> > + u32 version;
> > + struct scmi_pinctrl_info *pinfo;
> > +
> > + ret = ph->xops->version_get(ph, &version);
> > + if (ret)
> > + return ret;
> > +
> > + dev_dbg(ph->dev, "Pinctrl Version %d.%d\n",
> > + PROTOCOL_REV_MAJOR(version),
> PROTOCOL_REV_MINOR(version));
> > +
> > + pinfo = devm_kzalloc(ph->dev, sizeof(*pinfo), GFP_KERNEL);
> > + if (!pinfo)
> > + return -ENOMEM;
> > +
> > + ret = scmi_pinctrl_attributes_get(ph, pinfo);
> > + if (ret)
> > + return ret;
> > +
> > + pinfo->pins = devm_kcalloc(ph->dev, pinfo->nr_pins,
> > + sizeof(*pinfo->pins), GFP_KERNEL);
> > + if (!pinfo->pins)
> > + return -ENOMEM;
> > +
> > + pinfo->groups = devm_kcalloc(ph->dev, pinfo->nr_groups,
> > + sizeof(*pinfo->groups), GFP_KERNEL);
> > + if (!pinfo->groups)
> > + return -ENOMEM;
> > +
> > + pinfo->functions = devm_kcalloc(ph->dev, pinfo->nr_functions,
> > + sizeof(*pinfo->functions),
> GFP_KERNEL);
> > + if (!pinfo->functions)
> > + return -ENOMEM;
> > +
> > + pinfo->version = version;
> > +
> > + return ph->set_priv(ph, pinfo, version);
>
> Same comments as per previous version. devm_ here is simply wrong.
> It breaks the order of freeing resources.
>
> I.o.w. I see *no guarantee* that these init-deinit functions will be properly
> called from the respective probe-remove. Moreover the latter one may also
> have its own devm allocations (which are rightfully placed) and you get
> completely out of control the resource management.
I see an old thread.
https://lore.kernel.org/linux-arm-kernel/ZJ78hBcjAhiU+ZBO@e120937-lin/#t
The free in deinit is not to free the ones alloced in init, it is to free the ones
alloced such as in scmi_pinctrl_get_function_info
Thanks,
Peng.
>
> > +}
>
> --
> With Best Regards,
> Andy Shevchenko
>
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^ permalink raw reply
* Re: [PATCH v7 4/4] pinctrl: Implementation of the generic scmi-pinctrl driver
From: Andy Shevchenko @ 2024-04-02 13:22 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Sudeep Holla, Cristian Marussi, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Dan Carpenter, linux-arm-kernel,
linux-kernel, devicetree, linux-gpio, Peng Fan, Oleksii Moisieiev
In-Reply-To: <20240402-pinctrl-scmi-v7-4-3ea519d12cf7@nxp.com>
On Tue, Apr 02, 2024 at 10:22:24AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> scmi-pinctrl driver implements pinctrl driver interface and using
> SCMI protocol to redirect messages from pinctrl subsystem SDK to
> SCMI platform firmware, which does the changes in HW.
...
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/module.h>
> +#include <linux/seq_file.h>
> +#include <linux/scmi_protocol.h>
> +#include <linux/slab.h>
Missing headers.
...
> + *p_groups = (const char * const *)func->groups;
Is this casting needed?
...
> +static int pinctrl_scmi_pinconf_get(struct pinctrl_dev *pctldev,
> + unsigned int _pin, unsigned long *config)
Why underscored parameter name?
...
> +static int pinctrl_scmi_get_pins(struct scmi_pinctrl *pmx,
> + struct pinctrl_desc *desc)
> +{
> + struct pinctrl_pin_desc *pins;
> + unsigned int npins;
> + int ret, i;
> +
> + npins = pinctrl_ops->count_get(pmx->ph, PIN_TYPE);
> + /*
> + * npins will never be zero, the scmi pinctrl driver has bailed out
> + * if npins is zero.
> + */
This is fragile, but at least it is documented.
> + pins = devm_kmalloc_array(pmx->dev, npins, sizeof(*pins), GFP_KERNEL);
> + if (!pins)
> + return -ENOMEM;
> +
> + for (i = 0; i < npins; i++) {
> + pins[i].number = i;
> + ret = pinctrl_ops->name_get(pmx->ph, i, PIN_TYPE, &pins[i].name);
> + if (ret)
How does the cleanup work for the previously assigned pin names? Is it needed?
Maybe a comment?
> + return dev_err_probe(pmx->dev, ret,
> + "Can't get name for pin %d", i);
> + }
> +
> + desc->npins = npins;
> + desc->pins = pins;
> + dev_dbg(pmx->dev, "got pins %u", npins);
> +
> + return 0;
> +}
...
> +static const struct scmi_device_id scmi_id_table[] = {
> + { SCMI_PROTOCOL_PINCTRL, "pinctrl" },
> + { }
> +};
> +MODULE_DEVICE_TABLE(scmi, scmi_id_table);
Move this closer to the user.
--
With Best Regards,
Andy Shevchenko
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^ permalink raw reply
* Re: [PATCH 2/2] arm64: acpi: Honour firmware_signature field of FACS, if it exists
From: Mediouni, Mohamed @ 2024-04-02 12:17 UTC (permalink / raw)
To: Sudeep Holla
Cc: David Woodhouse, linux-arm-kernel@lists.infradead.org,
Catalin Marinas, Will Deacon, Robert Moore, Rafael J. Wysocki,
Len Brown, Saidi, Ali, linux-kernel@vger.kernel.org,
linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev,
Saket Dumbre
In-Reply-To: <ZgveD6Hb2HbTNYNO@bogus>
> On 2. Apr 2024, at 12:29, Sudeep Holla <sudeep.holla@arm.com> wrote:
>
>
> On Tue, Apr 02, 2024 at 10:29:57AM +0100, David Woodhouse wrote:
>> On Tue, 2024-03-12 at 13:41 +0000, David Woodhouse wrote:
>>> From: David Woodhouse <dwmw@amazon.co.uk>
>>>
>>> If the firmware_signature changes then OSPM should not attempt to resume
>>> from hibernate, but should instead perform a clean reboot. Set the global
>>> swsusp_hardware_signature to allow the generic code to include the value
>>> in the swsusp header on disk, and perform the appropriate check on resume.
>>>
>>> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
>>
>> Ping?
>>
>>> ---
>>> arch/arm64/kernel/acpi.c | 10 ++++++++++
>>> 1 file changed, 10 insertions(+)
>>>
>>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>>> index dba8fcec7f33..e0e7b93c16cc 100644
>>> --- a/arch/arm64/kernel/acpi.c
>>> +++ b/arch/arm64/kernel/acpi.c
>>> @@ -26,6 +26,7 @@
>>> #include <linux/libfdt.h>
>>> #include <linux/smp.h>
>>> #include <linux/serial_core.h>
>>> +#include <linux/suspend.h>
>>> #include <linux/pgtable.h>
>>>
>>> #include <acpi/ghes.h>
>>> @@ -227,6 +228,15 @@ void __init acpi_boot_table_init(void)
>>> if (earlycon_acpi_spcr_enable)
>>> early_init_dt_scan_chosen_stdout();
>>> } else {
>>> +#ifdef CONFIG_HIBERNATION
>>> + struct acpi_table_header *facs = NULL;
>>> + acpi_get_table(ACPI_SIG_FACS, 1, &facs);
>>> + if (facs) {
>>> + swsusp_hardware_signature =
>>> + ((struct acpi_table_facs *)facs)->hardware_signature;
>>> + acpi_put_table(facs);
>>> + }
>>> +#endif
>
> I think it is OK as a temporary solution for now. But there was some
> investigation last year as part of some work in Linaro to enable
> "drivers/acpi/sleep.c" into the build cleaning up some x86-ness in there.
> acpi_sleep_hibernate_setup() already does this but enabling sleep.c need
> some careful investigation so that it doesn't break any existing arm64/x86
> platforms and made need some wordings clarification in the ACPI spec.
> Today system suspend work via psci std path bypassing the ACPI paths which
> may not be ideal as none of the ACPI methods are honoured. Some arm64
> platforms may implement them and expect to be executed in the future,
> maybe ?
Current Windows on Arm platforms (seen on SC8280XP) don’t have _GTS
or _PTS methods, and don’t have sleeping objects either.
As such, I don’t expect any users for that potential functionality. Am I missing something
or hibernation signalling to firmware (on ARM64) can be made PSCI only indefinitely?
Thank you,
-Mohamed
> So, until that happens, I see this as an possible alternative and
> temporary solution.
>
> Acked-by: Sudeep Holla <sudeep.holla@arm.com>
>
> --
> Regards,
> Sudeep
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
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^ permalink raw reply
* Re: [PATCH v7 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support
From: Andy Shevchenko @ 2024-04-02 13:14 UTC (permalink / raw)
To: Peng Fan (OSS)
Cc: Sudeep Holla, Cristian Marussi, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Linus Walleij, Dan Carpenter, linux-arm-kernel,
linux-kernel, devicetree, linux-gpio, Peng Fan, Oleksii Moisieiev
In-Reply-To: <20240402-pinctrl-scmi-v7-3-3ea519d12cf7@nxp.com>
On Tue, Apr 02, 2024 at 10:22:23AM +0800, Peng Fan (OSS) wrote:
...
> +#include <linux/module.h>
> +#include <linux/scmi_protocol.h>
> +#include <linux/slab.h>
Please, follow IWYU principle, a lot of headers are missed.
> +#include "common.h"
> +#include "protocols.h"
...
> + ret = scmi_pinctrl_get_pin_info(ph, selector,
> + &pi->pins[selector]);
It's netter as a single line.
> + if (ret)
> + return ret;
> + }
...
> +static int scmi_pinctrl_protocol_init(const struct scmi_protocol_handle *ph)
> +{
> + int ret;
> + u32 version;
> + struct scmi_pinctrl_info *pinfo;
> +
> + ret = ph->xops->version_get(ph, &version);
> + if (ret)
> + return ret;
> +
> + dev_dbg(ph->dev, "Pinctrl Version %d.%d\n",
> + PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
> +
> + pinfo = devm_kzalloc(ph->dev, sizeof(*pinfo), GFP_KERNEL);
> + if (!pinfo)
> + return -ENOMEM;
> +
> + ret = scmi_pinctrl_attributes_get(ph, pinfo);
> + if (ret)
> + return ret;
> +
> + pinfo->pins = devm_kcalloc(ph->dev, pinfo->nr_pins,
> + sizeof(*pinfo->pins), GFP_KERNEL);
> + if (!pinfo->pins)
> + return -ENOMEM;
> +
> + pinfo->groups = devm_kcalloc(ph->dev, pinfo->nr_groups,
> + sizeof(*pinfo->groups), GFP_KERNEL);
> + if (!pinfo->groups)
> + return -ENOMEM;
> +
> + pinfo->functions = devm_kcalloc(ph->dev, pinfo->nr_functions,
> + sizeof(*pinfo->functions), GFP_KERNEL);
> + if (!pinfo->functions)
> + return -ENOMEM;
> +
> + pinfo->version = version;
> +
> + return ph->set_priv(ph, pinfo, version);
Same comments as per previous version. devm_ here is simply wrong.
It breaks the order of freeing resources.
I.o.w. I see *no guarantee* that these init-deinit functions will be properly
called from the respective probe-remove. Moreover the latter one may also have
its own devm allocations (which are rightfully placed) and you get completely
out of control the resource management.
> +}
--
With Best Regards,
Andy Shevchenko
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^ permalink raw reply
* RE: [PATCH v6 3/5] crypto: tegra: Add Tegra Security Engine driver
From: Akhil R @ 2024-04-02 12:36 UTC (permalink / raw)
To: Herbert Xu
Cc: davem@davemloft.net, robh@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
thierry.reding@gmail.com, Jon Hunter, catalin.marinas@arm.com,
will@kernel.org, Mikko Perttunen, airlied@gmail.com,
daniel@ffwll.ch, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org
In-Reply-To: <ZgVCxnI0sZcE04io@gondor.apana.org.au>
> On Tue, Mar 19, 2024 at 01:53:04PM +0530, Akhil R wrote:
> >
> > +struct tegra_sha_reqctx {
> > + struct ahash_request fallback_req;
>
> This doesn't work because ahash_request is dynamically sized.
> So you'll end up clobbering the rest of the struct if a fallback ends up being used.
>
> You should place the fallback_req at the end of the reqctx and set the reqsize
> based on the fallback reqsize.
>
Should I set the reqsize as below in sha_cra_init()? Seeing this in other crypto drivers.
crypto_ahash_set_reqsize(ahash_tfm,
sizeof(struct tegra_sha_reqctx) +
crypto_ahash_reqsize(ctx->fallback_tfm));
Regards,
Akhil
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^ permalink raw reply
* Re: [PATCH v6 3/4] firmware: arm_scmi: Add SCMI v3.2 pincontrol protocol basic support
From: Andy Shevchenko @ 2024-04-02 13:06 UTC (permalink / raw)
To: Cristian Marussi
Cc: Peng Fan, Peng Fan (OSS), Sudeep Holla, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Linus Walleij, Dan Carpenter,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-gpio@vger.kernel.org, Oleksii Moisieiev
In-Reply-To: <Zgu4Tok43W5t8KM0@pluto>
On Tue, Apr 2, 2024 at 10:48 AM Cristian Marussi
<cristian.marussi@arm.com> wrote:
> On Sun, Mar 31, 2024 at 01:44:28PM +0000, Peng Fan wrote:
> > > Sat, Mar 23, 2024 at 08:15:16PM +0800, Peng Fan (OSS) kirjoitti:
...
> > > > +#include <linux/module.h>
> > > > +#include <linux/scmi_protocol.h>
> > > > +#include <linux/slab.h>
> > >
> > > This is semi-random list of headers. Please, follow IWYU principle (include
> > > what you use). There are a lot of inclusions I see missing (just in the context of
> > > this page I see bits.h, types.h, and asm/byteorder.h).
> >
> > Is there any documentation about this requirement?
> > Some headers are already included by others.
The documentation here is called "a common sense".
The C language is built like this and we expect that nobody will
invest into the dependency hell that we have already, that's why IWYU
principle, please follow it.
> Andy made (mostly) the same remarks on this same patch ~1-year ago on
> this same patch while it was posted by Oleksii.
>
> And I told that time that most of the remarks around devm_ usage were
> wrong due to how the SCMI core handles protocol initialization (using a
> devres group transparently).
>
> This is what I answered that time.
>
> https://lore.kernel.org/linux-arm-kernel/ZJ78hBcjAhiU+ZBO@e120937-lin/#t
>
> I wont repeat myself, but, in a nutshell the memory allocation like it
> is now is fine: a bit happens via devm_ at protocol initialization, the
> other is doe via explicit kmalloc at runtime and freed via kfree at
> remove time (if needed...i.e. checking the present flag of some structs)
This sounds like a mess. devm_ is expected to be used only for the
->probe() stage, otherwise you may consider cleanup.h (__free() macro)
to have automatic free at the paths where memory is not needed.
And the function naming doesn't suggest that you have a probe-remove
pair. Moreover, if the init-deinit part is called in the probe-remove,
the devm_ must not be mixed with non-devm ones, as it breaks the order
and leads to subtle mistakes.
> I'll made further remarks on v7 that you just posted.
--
With Best Regards,
Andy Shevchenko
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^ permalink raw reply
* Re: [PATCH v4 2/2] media: i2c: Add imx283 camera sensor driver
From: Umang Jain @ 2024-04-02 12:57 UTC (permalink / raw)
To: Mauro Carvalho Chehab, Conor Dooley, Shawn Guo,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Sakari Ailus
Cc: Kieran Bingham, Rob Herring, Krzysztof Kozlowski, Sascha Hauer,
Andy Shevchenko, linux-media, devicetree, linux-arm-kernel,
linux-kernel, Laurent Pinchart
In-Reply-To: <20240402-kernel-name-extraversion-v4-2-fb776893e4ec@ideasonboard.com>
Hi,
CC'ing Laurent Pinchart as his email seems to get missed by b4
auto-to-cc (still learning grips with this tool) ..
On 02/04/24 3:37 pm, Umang Jain wrote:
> From: Kieran Bingham <kieran.bingham@ideasonboard.com>
>
> Add a v4l2 subdevice driver for the Sony IMX283 image sensor.
>
> The IMX283 is a 20MP Diagonal 15.86 mm (Type 1) CMOS Image Sensor with
> Square Pixel for Color Cameras.
>
> The following features are supported:
> - Manual exposure an gain control support
> - vblank/hblank/link freq control support
> - Test pattern support control
> - Arbitrary horizontal and vertical cropping
> - Supported resolution:
> - 5472x3648 @ 20fps (SRGGB12)
> - 5472x3648 @ 25fps (SRGGB10)
> - 2736x1824 @ 50fps (SRGGB12)
>
> Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
> Signed-off-by: Umang Jain <umang.jain@ideasonboard.com>
> ---
> MAINTAINERS | 1 +
> drivers/media/i2c/Kconfig | 10 +
> drivers/media/i2c/Makefile | 1 +
> drivers/media/i2c/imx283.c | 1605 ++++++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 1617 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a2e164131650..64d3780afb99 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20374,6 +20374,7 @@ L: linux-media@vger.kernel.org
> S: Maintained
> T: git git://linuxtv.org/media_tree.git
> F: Documentation/devicetree/bindings/media/i2c/sony,imx283.yaml
> +F: drivers/media/i2c/imx283.c
>
> SONY IMX290 SENSOR DRIVER
> M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
> index e4da68835683..b84d64d37f0e 100644
> --- a/drivers/media/i2c/Kconfig
> +++ b/drivers/media/i2c/Kconfig
> @@ -163,6 +163,16 @@ config VIDEO_IMX274
> This is a V4L2 sensor driver for the Sony IMX274
> CMOS image sensor.
>
> +config VIDEO_IMX283
> + tristate "Sony IMX283 sensor support"
> + select V4L2_CCI_I2C
> + help
> + This is a V4L2 sensor driver for the Sony IMX283
> + CMOS image sensor.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called imx283.
> +
> config VIDEO_IMX290
> tristate "Sony IMX290 sensor support"
> select REGMAP_I2C
> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
> index b82e99ca7578..bbe41e831c76 100644
> --- a/drivers/media/i2c/Makefile
> +++ b/drivers/media/i2c/Makefile
> @@ -49,6 +49,7 @@ obj-$(CONFIG_VIDEO_IMX214) += imx214.o
> obj-$(CONFIG_VIDEO_IMX219) += imx219.o
> obj-$(CONFIG_VIDEO_IMX258) += imx258.o
> obj-$(CONFIG_VIDEO_IMX274) += imx274.o
> +obj-$(CONFIG_VIDEO_IMX283) += imx283.o
> obj-$(CONFIG_VIDEO_IMX290) += imx290.o
> obj-$(CONFIG_VIDEO_IMX296) += imx296.o
> obj-$(CONFIG_VIDEO_IMX319) += imx319.o
> diff --git a/drivers/media/i2c/imx283.c b/drivers/media/i2c/imx283.c
> new file mode 100644
> index 000000000000..ace8f65aa6b3
> --- /dev/null
> +++ b/drivers/media/i2c/imx283.c
> @@ -0,0 +1,1605 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * V4L2 Support for the IMX283
> + *
> + * Diagonal 15.86 mm (Type 1) CMOS Image Sensor with Square Pixel for Color
> + * Cameras.
> + *
> + * Copyright (C) 2024 Ideas on Board Oy.
> + *
> + * Based on Sony IMX283 driver prepared by Will Whang
> + *
> + * Based on Sony imx477 camera driver
> + * Copyright (C) 2019-2020 Raspberry Pi (Trading) Ltd
> + */
> +
> +#include <linux/array_size.h>
> +#include <linux/bitops.h>
> +#include <linux/container_of.h>
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/i2c.h>
> +#include <linux/minmax.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/property.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/types.h>
> +#include <linux/units.h>
> +#include <media/v4l2-cci.h>
> +#include <media/v4l2-ctrls.h>
> +#include <media/v4l2-device.h>
> +#include <media/v4l2-event.h>
> +#include <media/v4l2-fwnode.h>
> +#include <media/v4l2-mediabus.h>
> +
> +/* Chip ID */
> +#define IMX283_REG_CHIP_ID CCI_REG8(0x3000)
> +#define IMX283_CHIP_ID 0x0b // Default power on state
> +
> +#define IMX283_REG_STANDBY CCI_REG8(0x3000)
> +#define IMX283_ACTIVE 0
> +#define IMX283_STANDBY BIT(0)
> +#define IMX283_STBLOGIC BIT(1)
> +#define IMX283_STBMIPI BIT(2)
> +#define IMX283_STBDV BIT(3)
> +#define IMX283_SLEEP BIT(4)
> +
> +#define IMX283_REG_CLAMP CCI_REG8(0x3001)
> +#define IMX283_CLPSQRST BIT(4)
> +
> +#define IMX283_REG_PLSTMG08 CCI_REG8(0x3003)
> +#define IMX283_PLSTMG08_VAL 0x77
> +
> +#define IMX283_REG_MDSEL1 CCI_REG8(0x3004)
> +#define IMX283_REG_MDSEL2 CCI_REG8(0x3005)
> +#define IMX283_REG_MDSEL3 CCI_REG8(0x3006)
> +#define IMX283_MDSEL3_VCROP_EN BIT(5)
> +#define IMX283_REG_MDSEL4 CCI_REG8(0x3007)
> +#define IMX283_MDSEL4_VCROP_EN (BIT(4) | BIT(6))
> +
> +#define IMX283_REG_SVR CCI_REG16_LE(0x3009)
> +
> +#define IMX283_REG_HTRIMMING CCI_REG8(0x300b)
> +#define IMX283_MDVREV BIT(0) /* VFLIP */
> +#define IMX283_HTRIMMING_EN BIT(4)
> +
> +#define IMX283_REG_VWINPOS CCI_REG16_LE(0x300f)
> +#define IMX283_REG_VWIDCUT CCI_REG16_LE(0x3011)
> +
> +#define IMX283_REG_MDSEL7 CCI_REG16_LE(0x3013)
> +
> +/* CSI Clock Configuration */
> +#define IMX283_REG_TCLKPOST CCI_REG8(0x3018)
> +#define IMX283_REG_THSPREPARE CCI_REG8(0x301a)
> +#define IMX283_REG_THSZERO CCI_REG8(0x301c)
> +#define IMX283_REG_THSTRAIL CCI_REG8(0x301e)
> +#define IMX283_REG_TCLKTRAIL CCI_REG8(0x3020)
> +#define IMX283_REG_TCLKPREPARE CCI_REG8(0x3022)
> +#define IMX283_REG_TCLKZERO CCI_REG16_LE(0x3024)
> +#define IMX283_REG_TLPX CCI_REG8(0x3026)
> +#define IMX283_REG_THSEXIT CCI_REG8(0x3028)
> +#define IMX283_REG_TCLKPRE CCI_REG8(0x302a)
> +#define IMX283_REG_SYSMODE CCI_REG8(0x3104)
> +
> +#define IMX283_REG_Y_OUT_SIZE CCI_REG16_LE(0x302f)
> +#define IMX283_REG_WRITE_VSIZE CCI_REG16_LE(0x3031)
> +#define IMX283_REG_OB_SIZE_V CCI_REG8(0x3033)
> +
> +/* HMAX internal HBLANK */
> +#define IMX283_REG_HMAX CCI_REG16_LE(0x3036)
> +#define IMX283_HMAX_MAX (BIT(16) - 1)
> +
> +/* VMAX internal VBLANK */
> +#define IMX283_REG_VMAX CCI_REG24_LE(0x3038)
> +#define IMX283_VMAX_MAX (BIT(16) - 1)
> +
> +/* SHR internal */
> +#define IMX283_REG_SHR CCI_REG16_LE(0x303b)
> +#define IMX283_SHR_MIN 11
> +
> +/*
> + * Analog gain control
> + * Gain [dB] = -20log{(2048 - value [10:0]) /2048}
> + * Range: 0dB to approximately +27dB
> + */
> +#define IMX283_REG_ANALOG_GAIN CCI_REG16_LE(0x3042)
> +#define IMX283_ANA_GAIN_MIN 0
> +#define IMX283_ANA_GAIN_MAX 1957
> +#define IMX283_ANA_GAIN_STEP 1
> +#define IMX283_ANA_GAIN_DEFAULT 0x0
> +
> +/*
> + * Digital gain control
> + * Gain [dB] = value * 6
> + * Range: 0dB to +18db
> + */
> +#define IMX283_REG_DIGITAL_GAIN CCI_REG8(0x3044)
> +#define IMX283_DGTL_GAIN_MIN 0
> +#define IMX283_DGTL_GAIN_MAX 3
> +#define IMX283_DGTL_GAIN_DEFAULT 0
> +#define IMX283_DGTL_GAIN_STEP 1
> +
> +#define IMX283_REG_HTRIMMING_START CCI_REG16_LE(0x3058)
> +#define IMX283_REG_HTRIMMING_END CCI_REG16_LE(0x305a)
> +
> +#define IMX283_REG_MDSEL18 CCI_REG16_LE(0x30f6)
> +
> +/* Master Mode Operation Control */
> +#define IMX283_REG_XMSTA CCI_REG8(0x3105)
> +#define IMX283_XMSTA BIT(0)
> +
> +#define IMX283_REG_SYNCDRV CCI_REG8(0x3107)
> +#define IMX283_SYNCDRV_XHS_XVS (0xa0 | 0x02)
> +#define IMX283_SYNCDRV_HIZ (0xa0 | 0x03)
> +
> +/* PLL Standby */
> +#define IMX283_REG_STBPL CCI_REG8(0x320b)
> +#define IMX283_STBPL_NORMAL 0x00
> +#define IMX283_STBPL_STANDBY 0x03
> +
> +/* Input Frequency Setting */
> +#define IMX283_REG_PLRD1 CCI_REG8(0x36c1)
> +#define IMX283_REG_PLRD2 CCI_REG16_LE(0x36c2)
> +#define IMX283_REG_PLRD3 CCI_REG8(0x36f7)
> +#define IMX283_REG_PLRD4 CCI_REG8(0x36f8)
> +
> +#define IMX283_REG_PLSTMG02 CCI_REG8(0x36aa)
> +#define IMX283_PLSTMG02_VAL 0x00
> +
> +#define IMX283_REG_EBD_X_OUT_SIZE CCI_REG16_LE(0x3a54)
> +
> +/* Test pattern generator */
> +#define IMX283_REG_TPG_CTRL CCI_REG8(0x3156)
> +#define IMX283_TPG_CTRL_CLKEN BIT(0)
> +#define IMX283_TPG_CTRL_PATEN BIT(4)
> +
> +#define IMX283_REG_TPG_PAT CCI_REG8(0x3157)
> +#define IMX283_TPG_PAT_ALL_000 0x00
> +#define IMX283_TPG_PAT_ALL_FFF 0x01
> +#define IMX283_TPG_PAT_ALL_555 0x02
> +#define IMX283_TPG_PAT_ALL_AAA 0x03
> +#define IMX283_TPG_PAT_H_COLOR_BARS 0x0a
> +#define IMX283_TPG_PAT_V_COLOR_BARS 0x0b
> +
> +/* Exposure control */
> +#define IMX283_EXPOSURE_MIN 52
> +#define IMX283_EXPOSURE_STEP 1
> +#define IMX283_EXPOSURE_DEFAULT 1000
> +#define IMX283_EXPOSURE_MAX 49865
> +
> +#define IMAGE_PAD 0
> +
> +#define IMX283_XCLR_MIN_DELAY_US (1 * USEC_PER_MSEC)
> +#define IMX283_XCLR_DELAY_RANGE_US (1 * USEC_PER_MSEC)
> +
> +/* IMX283 native and active pixel array size. */
> +static const struct v4l2_rect imx283_native_area = {
> + .top = 0,
> + .left = 0,
> + .width = 5592,
> + .height = 3710,
> +};
> +
> +static const struct v4l2_rect imx283_active_area = {
> + .top = 40,
> + .left = 108,
> + .width = 5472,
> + .height = 3648,
> +};
> +
> +struct imx283_reg_list {
> + unsigned int num_of_regs;
> + const struct cci_reg_sequence *regs;
> +};
> +
> +/* Mode : resolution and related config values */
> +struct imx283_mode {
> + unsigned int mode;
> +
> + /* Bits per pixel */
> + unsigned int bpp;
> +
> + /* Frame width */
> + unsigned int width;
> +
> + /* Frame height */
> + unsigned int height;
> +
> + /*
> + * Minimum horizontal timing in pixel-units
> + *
> + * Note that HMAX is written in 72MHz units, and the datasheet assumes a
> + * 720MHz link frequency. Convert datasheet values with the following:
> + *
> + * For 12 bpp modes (480Mbps) convert with:
> + * hmax = [hmax in 72MHz units] * 480 / 72
> + *
> + * For 10 bpp modes (576Mbps) convert with:
> + * hmax = [hmax in 72MHz units] * 576 / 72
> + */
> + u32 min_hmax;
> +
> + /* minimum V-timing in lines */
> + u32 min_vmax;
> +
> + /* default H-timing */
> + u32 default_hmax;
> +
> + /* default V-timing */
> + u32 default_vmax;
> +
> + /* minimum SHR */
> + u32 min_shr;
> +
> + /*
> + * Per-mode vertical crop constants used to calculate values
> + * of IMX283REG_WIDCUT and IMX283_REG_VWINPOS.
> + */
> + u32 veff;
> + u32 vst;
> + u32 vct;
> +
> + /* Horizontal and vertical binning ratio */
> + u8 hbin_ratio;
> + u8 vbin_ratio;
> +
> + /* Optical Blanking */
> + u32 horizontal_ob;
> + u32 vertical_ob;
> +
> + /* Analog crop rectangle. */
> + struct v4l2_rect crop;
> +};
> +
> +struct imx283_input_frequency {
> + unsigned int mhz;
> + unsigned int reg_count;
> + struct cci_reg_sequence regs[4];
> +};
> +
> +static const struct imx283_input_frequency imx283_frequencies[] = {
> + {
> + .mhz = 6 * HZ_PER_MHZ,
> + .reg_count = 4,
> + .regs = {
> + { IMX283_REG_PLRD1, 0x00 },
> + { IMX283_REG_PLRD2, 0x00f0 },
> + { IMX283_REG_PLRD3, 0x00 },
> + { IMX283_REG_PLRD4, 0xc0 },
> + },
> + },
> + {
> + .mhz = 12 * HZ_PER_MHZ,
> + .reg_count = 4,
> + .regs = {
> + { IMX283_REG_PLRD1, 0x01 },
> + { IMX283_REG_PLRD2, 0x00f0 },
> + { IMX283_REG_PLRD3, 0x01 },
> + { IMX283_REG_PLRD4, 0xc0 },
> + },
> + },
> + {
> + .mhz = 18 * HZ_PER_MHZ,
> + .reg_count = 4,
> + .regs = {
> + { IMX283_REG_PLRD1, 0x01 },
> + { IMX283_REG_PLRD2, 0x00a0 },
> + { IMX283_REG_PLRD3, 0x01 },
> + { IMX283_REG_PLRD4, 0x80 },
> + },
> + },
> + {
> + .mhz = 24 * HZ_PER_MHZ,
> + .reg_count = 4,
> + .regs = {
> + { IMX283_REG_PLRD1, 0x02 },
> + { IMX283_REG_PLRD2, 0x00f0 },
> + { IMX283_REG_PLRD3, 0x02 },
> + { IMX283_REG_PLRD4, 0xc0 },
> + },
> + },
> +};
> +
> +enum imx283_modes {
> + IMX283_MODE_0,
> + IMX283_MODE_1,
> + IMX283_MODE_1A,
> + IMX283_MODE_1S,
> + IMX283_MODE_2,
> + IMX283_MODE_2A,
> + IMX283_MODE_3,
> + IMX283_MODE_4,
> + IMX283_MODE_5,
> + IMX283_MODE_6,
> +};
> +
> +struct imx283_readout_mode {
> + u8 mdsel1;
> + u8 mdsel2;
> + u8 mdsel3;
> + u8 mdsel4;
> +};
> +
> +static const struct imx283_readout_mode imx283_readout_modes[] = {
> + /* All pixel scan modes */
> + [IMX283_MODE_0] = { 0x04, 0x03, 0x10, 0x00 }, /* 12 bit */
> + [IMX283_MODE_1] = { 0x04, 0x01, 0x00, 0x00 }, /* 10 bit */
> + [IMX283_MODE_1A] = { 0x04, 0x01, 0x20, 0x50 }, /* 10 bit */
> + [IMX283_MODE_1S] = { 0x04, 0x41, 0x20, 0x50 }, /* 10 bit */
> +
> + /* Horizontal / Vertical 2/2-line binning */
> + [IMX283_MODE_2] = { 0x0d, 0x11, 0x50, 0x00 }, /* 12 bit */
> + [IMX283_MODE_2A] = { 0x0d, 0x11, 0x70, 0x50 }, /* 12 bit */
> +
> + /* Horizontal / Vertical 3/3-line binning */
> + [IMX283_MODE_3] = { 0x1e, 0x18, 0x10, 0x00 }, /* 12 bit */
> +
> + /* Vertical 2/9 subsampling, horizontal 3 binning cropping */
> + [IMX283_MODE_4] = { 0x29, 0x18, 0x30, 0x50 }, /* 12 bit */
> +
> + /* Vertical 2/19 subsampling binning, horizontal 3 binning */
> + [IMX283_MODE_5] = { 0x2d, 0x18, 0x10, 0x00 }, /* 12 bit */
> +
> + /* Vertical 2 binning horizontal 2/4, subsampling 16:9 cropping */
> + [IMX283_MODE_6] = { 0x18, 0x21, 0x00, 0x09 }, /* 10 bit */
> +
> + /*
> + * New modes should make sure the offset period is complied.
> + * See imx283_exposure() for reference.
> + */
> +};
> +
> +static const struct cci_reg_sequence mipi_data_rate_1440Mbps[] = {
> + /* The default register settings provide the 1440Mbps rate */
> + { CCI_REG8(0x36c5), 0x00 }, /* Undocumented */
> + { CCI_REG8(0x3ac4), 0x00 }, /* Undocumented */
> +
> + { IMX283_REG_STBPL, 0x00 },
> + { IMX283_REG_TCLKPOST, 0xa7 },
> + { IMX283_REG_THSPREPARE, 0x6f },
> + { IMX283_REG_THSZERO, 0x9f },
> + { IMX283_REG_THSTRAIL, 0x5f },
> + { IMX283_REG_TCLKTRAIL, 0x5f },
> + { IMX283_REG_TCLKPREPARE, 0x6f },
> + { IMX283_REG_TCLKZERO, 0x017f },
> + { IMX283_REG_TLPX, 0x4f },
> + { IMX283_REG_THSEXIT, 0x47 },
> + { IMX283_REG_TCLKPRE, 0x07 },
> + { IMX283_REG_SYSMODE, 0x02 },
> +};
> +
> +static const struct cci_reg_sequence mipi_data_rate_720Mbps[] = {
> + /* Undocumented Additions "For 720MBps" Setting */
> + { CCI_REG8(0x36c5), 0x01 }, /* Undocumented */
> + { CCI_REG8(0x3ac4), 0x01 }, /* Undocumented */
> +
> + { IMX283_REG_STBPL, 0x00 },
> + { IMX283_REG_TCLKPOST, 0x77 },
> + { IMX283_REG_THSPREPARE, 0x37 },
> + { IMX283_REG_THSZERO, 0x67 },
> + { IMX283_REG_THSTRAIL, 0x37 },
> + { IMX283_REG_TCLKTRAIL, 0x37 },
> + { IMX283_REG_TCLKPREPARE, 0x37 },
> + { IMX283_REG_TCLKZERO, 0xdf },
> + { IMX283_REG_TLPX, 0x2f },
> + { IMX283_REG_THSEXIT, 0x47 },
> + { IMX283_REG_TCLKPRE, 0x0f },
> + { IMX283_REG_SYSMODE, 0x02 },
> +};
> +
> +static const s64 link_frequencies[] = {
> + 720 * HZ_PER_MHZ, /* 1440 Mbps lane data rate */
> + 360 * HZ_PER_MHZ, /* 720 Mbps data lane rate */
> +};
> +
> +static const struct imx283_reg_list link_freq_reglist[] = {
> + { /* 720 MHz */
> + .num_of_regs = ARRAY_SIZE(mipi_data_rate_1440Mbps),
> + .regs = mipi_data_rate_1440Mbps,
> + },
> + { /* 360 MHz */
> + .num_of_regs = ARRAY_SIZE(mipi_data_rate_720Mbps),
> + .regs = mipi_data_rate_720Mbps,
> + },
> +};
> +
> +#define CENTERED_RECTANGLE(rect, _width, _height) \
> + { \
> + .left = rect.left + ((rect.width - (_width)) / 2), \
> + .top = rect.top + ((rect.height - (_height)) / 2), \
> + .width = (_width), \
> + .height = (_height), \
> + }
> +
> +/* Mode configs */
> +static const struct imx283_mode supported_modes_12bit[] = {
> + {
> + /* 20MPix 21.40 fps readout mode 0 */
> + .mode = IMX283_MODE_0,
> + .bpp = 12,
> + .width = 5472,
> + .height = 3648,
> + .min_hmax = 5914, /* 887 @ 480MHz/72MHz */
> + .min_vmax = 3793, /* Lines */
> +
> + .veff = 3694,
> + .vst = 0,
> + .vct = 0,
> +
> + .hbin_ratio = 1,
> + .vbin_ratio = 1,
> +
> + /* 20.00 FPS */
> + .default_hmax = 6000, /* 900 @ 480MHz/72MHz */
> + .default_vmax = 4000,
> +
> + .min_shr = 11,
> + .horizontal_ob = 96,
> + .vertical_ob = 16,
> + .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
> + },
> + {
> + /*
> + * Readout mode 2 : 2/2 binned mode (2736x1824)
> + */
> + .mode = IMX283_MODE_2,
> + .bpp = 12,
> + .width = 2736,
> + .height = 1824,
> + .min_hmax = 2414, /* Pixels (362 * 480MHz/72MHz + padding) */
> + .min_vmax = 3840, /* Lines */
> +
> + /* 50.00 FPS */
> + .default_hmax = 2500, /* 375 @ 480MHz/72Mhz */
> + .default_vmax = 3840,
> +
> + .veff = 1824,
> + .vst = 0,
> + .vct = 0,
> +
> + .hbin_ratio = 2,
> + .vbin_ratio = 2,
> +
> + .min_shr = 12,
> + .horizontal_ob = 48,
> + .vertical_ob = 4,
> +
> + .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
> + },
> +};
> +
> +static const struct imx283_mode supported_modes_10bit[] = {
> + {
> + /* 20MPix 25.48 fps readout mode 1 */
> + .mode = IMX283_MODE_1,
> + .bpp = 10,
> + .width = 5472,
> + .height = 3648,
> + .min_hmax = 5960, /* 745 @ 576MHz / 72MHz */
> + .min_vmax = 3793,
> +
> + /* 25.00 FPS */
> + .default_hmax = 6000, /* 750 @ 576MHz / 72MHz */
> + .default_vmax = 3840,
> +
> + .min_shr = 10,
> + .horizontal_ob = 96,
> + .vertical_ob = 16,
> + .crop = CENTERED_RECTANGLE(imx283_active_area, 5472, 3648),
> + },
> +};
> +
> +static const u32 imx283_mbus_codes[] = {
> + MEDIA_BUS_FMT_SRGGB12_1X12,
> + MEDIA_BUS_FMT_SRGGB10_1X10,
> +};
> +
> +/* regulator supplies */
> +static const char *const imx283_supply_name[] = {
> + "vadd", /* Analog (2.9V) supply */
> + "vdd1", /* Supply Voltage 2 (1.8V) supply */
> + "vdd2", /* Supply Voltage 3 (1.2V) supply */
> +};
> +
> +struct imx283 {
> + struct device *dev;
> + struct regmap *cci;
> +
> + const struct imx283_input_frequency *freq;
> +
> + struct v4l2_subdev sd;
> + struct media_pad pad;
> +
> + struct clk *xclk;
> +
> + struct gpio_desc *reset_gpio;
> + struct regulator_bulk_data supplies[ARRAY_SIZE(imx283_supply_name)];
> +
> + /* V4L2 Controls */
> + struct v4l2_ctrl_handler ctrl_handler;
> + struct v4l2_ctrl *exposure;
> + struct v4l2_ctrl *vblank;
> + struct v4l2_ctrl *hblank;
> + struct v4l2_ctrl *vflip;
> +
> + unsigned long link_freq_bitmap;
> +
> + u16 hmax;
> + u32 vmax;
> +};
> +
> +static inline struct imx283 *to_imx283(struct v4l2_subdev *sd)
> +{
> + return container_of_const(sd, struct imx283, sd);
> +}
> +
> +static inline void get_mode_table(unsigned int code,
> + const struct imx283_mode **mode_list,
> + unsigned int *num_modes)
> +{
> + switch (code) {
> + case MEDIA_BUS_FMT_SRGGB12_1X12:
> + case MEDIA_BUS_FMT_SGRBG12_1X12:
> + case MEDIA_BUS_FMT_SGBRG12_1X12:
> + case MEDIA_BUS_FMT_SBGGR12_1X12:
> + *mode_list = supported_modes_12bit;
> + *num_modes = ARRAY_SIZE(supported_modes_12bit);
> + break;
> +
> + case MEDIA_BUS_FMT_SRGGB10_1X10:
> + case MEDIA_BUS_FMT_SGRBG10_1X10:
> + case MEDIA_BUS_FMT_SGBRG10_1X10:
> + case MEDIA_BUS_FMT_SBGGR10_1X10:
> + *mode_list = supported_modes_10bit;
> + *num_modes = ARRAY_SIZE(supported_modes_10bit);
> + break;
> + default:
> + *mode_list = NULL;
> + *num_modes = 0;
> + break;
> + }
> +}
> +
> +/* Calculate the Pixel Rate based on the current mode */
> +static u64 imx283_pixel_rate(struct imx283 *imx283,
> + const struct imx283_mode *mode)
> +{
> + u64 link_frequency = link_frequencies[__ffs(imx283->link_freq_bitmap)];
> + unsigned int bpp = mode->bpp;
> + const unsigned int ddr = 2; /* Double Data Rate */
> + const unsigned int lanes = 4; /* Only 4 lane support */
> + u64 numerator = link_frequency * ddr * lanes;
> +
> + do_div(numerator, bpp);
> +
> + return numerator;
> +}
> +
> +/* Convert from a variable pixel_rate to 72 MHz clock cycles */
> +static u64 imx283_internal_clock(unsigned int pixel_rate, unsigned int pixels)
> +{
> + /*
> + * Determine the following operation without overflow:
> + * pixels = 72 Mhz / pixel_rate
> + *
> + * The internal clock at 72MHz and Pixel Rate (between 240 and 576MHz)
> + * can easily overflow this calculation, so pre-divide to simplify.
> + */
> + const u32 iclk_pre = 72;
> + const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
> + u64 numerator = pixels * iclk_pre;
> +
> + do_div(numerator, pclk_pre);
> +
> + return numerator;
> +}
> +
> +/* Internal clock (72MHz) to Pixel Rate clock (Variable) */
> +static u64 imx283_iclk_to_pix(unsigned int pixel_rate, unsigned int cycles)
> +{
> + /*
> + * Determine the following operation without overflow:
> + * cycles * pixel_rate / 72 MHz
> + *
> + * The internal clock at 72MHz and Pixel Rate (between 240 and 576MHz)
> + * can easily overflow this calculation, so pre-divide to simplify.
> + */
> + const u32 iclk_pre = 72;
> + const u32 pclk_pre = pixel_rate / HZ_PER_MHZ;
> + u64 numerator = cycles * pclk_pre;
> +
> + do_div(numerator, iclk_pre);
> +
> + return numerator;
> +}
> +
> +/* Determine the exposure based on current hmax, vmax and a given SHR */
> +static u32 imx283_exposure(struct imx283 *imx283,
> + const struct imx283_mode *mode, u64 shr)
> +{
> + u32 svr = 0; /* SVR feature is not currently supported */
> + u32 offset;
> + u64 numerator;
> +
> + /* Number of clocks per internal offset period */
> + offset = mode->mode == IMX283_MODE_0 ? 209 : 157;
> + numerator = (imx283->vmax * (svr + 1) - shr) * imx283->hmax + offset;
> +
> + do_div(numerator, imx283->hmax);
> +
> + return clamp(numerator, 0, U32_MAX);
> +}
> +
> +static void imx283_exposure_limits(struct imx283 *imx283,
> + const struct imx283_mode *mode,
> + s64 *min_exposure, s64 *max_exposure)
> +{
> + u32 svr = 0; /* SVR feature is not currently supported */
> + u64 min_shr = mode->min_shr;
> + /* Global Shutter is not supported */
> + u64 max_shr = (svr + 1) * imx283->vmax - 4;
> +
> + max_shr = min(max_shr, BIT(16) - 1);
> +
> + *min_exposure = imx283_exposure(imx283, mode, max_shr);
> + *max_exposure = imx283_exposure(imx283, mode, min_shr);
> +}
> +
> +/*
> + * Integration Time [s] = [ {VMAX x (SVR + 1) – (SHR)} x HMAX + offset ]
> + * / [ 72 x 10^6 ]
> + */
> +static u32 imx283_shr(struct imx283 *imx283, const struct imx283_mode *mode,
> + u32 exposure)
> +{
> + u32 svr = 0; /* SVR feature is not currently supported */
> + u32 offset;
> + u64 temp;
> +
> + /* Number of clocks per internal offset period */
> + offset = mode->mode == IMX283_MODE_0 ? 209 : 157;
> + temp = ((u64)exposure * imx283->hmax - offset);
> + do_div(temp, imx283->hmax);
> +
> + return (imx283->vmax * (svr + 1) - temp);
> +}
> +
> +static const char * const imx283_tpg_menu[] = {
> + "Disabled",
> + "All 000h",
> + "All FFFh",
> + "All 555h",
> + "All AAAh",
> + "Horizontal color bars",
> + "Vertical color bars",
> +};
> +
> +static const int imx283_tpg_val[] = {
> + IMX283_TPG_PAT_ALL_000,
> + IMX283_TPG_PAT_ALL_000,
> + IMX283_TPG_PAT_ALL_FFF,
> + IMX283_TPG_PAT_ALL_555,
> + IMX283_TPG_PAT_ALL_AAA,
> + IMX283_TPG_PAT_H_COLOR_BARS,
> + IMX283_TPG_PAT_V_COLOR_BARS,
> +};
> +
> +static int imx283_update_test_pattern(struct imx283 *imx283, u32 pattern_index)
> +{
> + int ret;
> +
> + if (pattern_index >= ARRAY_SIZE(imx283_tpg_val))
> + return -EINVAL;
> +
> + if (!pattern_index)
> + return cci_write(imx283->cci, IMX283_REG_TPG_CTRL, 0x00, NULL);
> +
> + ret = cci_write(imx283->cci, IMX283_REG_TPG_PAT,
> + imx283_tpg_val[pattern_index], NULL);
> + if (ret)
> + return ret;
> +
> + return cci_write(imx283->cci, IMX283_REG_TPG_CTRL,
> + IMX283_TPG_CTRL_CLKEN | IMX283_TPG_CTRL_PATEN, NULL);
> +}
> +
> +static int imx283_set_ctrl(struct v4l2_ctrl *ctrl)
> +{
> + struct imx283 *imx283 = container_of(ctrl->handler, struct imx283,
> + ctrl_handler);
> + const struct imx283_mode *mode;
> + struct v4l2_mbus_framefmt *fmt;
> + const struct imx283_mode *mode_list;
> + struct v4l2_subdev_state *state;
> + unsigned int num_modes;
> + u64 shr, pixel_rate;
> + int ret = 0;
> +
> + state = v4l2_subdev_get_locked_active_state(&imx283->sd);
> + fmt = v4l2_subdev_state_get_format(state, 0);
> +
> + get_mode_table(fmt->code, &mode_list, &num_modes);
> + mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
> + fmt->width, fmt->height);
> +
> + /*
> + * The VBLANK control may change the limits of usable exposure, so check
> + * and adjust if necessary.
> + */
> + if (ctrl->id == V4L2_CID_VBLANK) {
> + /* Honour the VBLANK limits when setting exposure. */
> + s64 current_exposure, max_exposure, min_exposure;
> +
> + imx283->vmax = mode->height + ctrl->val;
> +
> + imx283_exposure_limits(imx283, mode,
> + &min_exposure, &max_exposure);
> +
> + current_exposure = imx283->exposure->val;
> + current_exposure = clamp(current_exposure, min_exposure,
> + max_exposure);
> +
> + __v4l2_ctrl_modify_range(imx283->exposure, min_exposure,
> + max_exposure, 1, current_exposure);
> + }
> +
> + /*
> + * Applying V4L2 control value only happens
> + * when power is up for streaming
> + */
> + if (!pm_runtime_get_if_active(imx283->dev, true))
> + return 0;
> +
> + switch (ctrl->id) {
> + case V4L2_CID_EXPOSURE:
> + shr = imx283_shr(imx283, mode, ctrl->val);
> + dev_dbg(imx283->dev, "V4L2_CID_EXPOSURE : %d - SHR: %lld\n",
> + ctrl->val, shr);
> + ret = cci_write(imx283->cci, IMX283_REG_SHR, shr, NULL);
> + break;
> +
> + case V4L2_CID_HBLANK:
> + pixel_rate = imx283_pixel_rate(imx283, mode);
> + imx283->hmax = imx283_internal_clock(pixel_rate, mode->width + ctrl->val);
> + dev_dbg(imx283->dev, "V4L2_CID_HBLANK : %d HMAX : %u\n",
> + ctrl->val, imx283->hmax);
> + ret = cci_write(imx283->cci, IMX283_REG_HMAX, imx283->hmax, NULL);
> + break;
> +
> + case V4L2_CID_VBLANK:
> + imx283->vmax = mode->height + ctrl->val;
> + dev_dbg(imx283->dev, "V4L2_CID_VBLANK : %d VMAX : %u\n",
> + ctrl->val, imx283->vmax);
> + ret = cci_write(imx283->cci, IMX283_REG_VMAX, imx283->vmax, NULL);
> + break;
> +
> + case V4L2_CID_ANALOGUE_GAIN:
> + ret = cci_write(imx283->cci, IMX283_REG_ANALOG_GAIN, ctrl->val, NULL);
> + break;
> +
> + case V4L2_CID_DIGITAL_GAIN:
> + ret = cci_write(imx283->cci, IMX283_REG_DIGITAL_GAIN, ctrl->val, NULL);
> + break;
> +
> + case V4L2_CID_VFLIP:
> + /*
> + * VFLIP is managed by BIT(0) of IMX283_REG_HTRIMMING address, hence
> + * both need to be set simultaneously.
> + */
> + if (ctrl->val) {
> + cci_write(imx283->cci, IMX283_REG_HTRIMMING,
> + IMX283_HTRIMMING_EN | IMX283_MDVREV, &ret);
> + } else {
> + cci_write(imx283->cci, IMX283_REG_HTRIMMING,
> + IMX283_HTRIMMING_EN, &ret);
> + }
> + break;
> +
> + case V4L2_CID_TEST_PATTERN:
> + ret = imx283_update_test_pattern(imx283, ctrl->val);
> + break;
> +
> + default:
> + dev_err(imx283->dev, "ctrl(id:0x%x, val:0x%x) is not handled\n",
> + ctrl->id, ctrl->val);
> + break;
> + }
> +
> + pm_runtime_put(imx283->dev);
> +
> + return ret;
> +}
> +
> +static const struct v4l2_ctrl_ops imx283_ctrl_ops = {
> + .s_ctrl = imx283_set_ctrl,
> +};
> +
> +static int imx283_enum_mbus_code(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_mbus_code_enum *code)
> +{
> + if (code->index >= ARRAY_SIZE(imx283_mbus_codes))
> + return -EINVAL;
> +
> + code->code = imx283_mbus_codes[code->index];
> +
> + return 0;
> +}
> +
> +static int imx283_enum_frame_size(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_frame_size_enum *fse)
> +{
> + const struct imx283_mode *mode_list;
> + unsigned int num_modes;
> +
> + get_mode_table(fse->code, &mode_list, &num_modes);
> +
> + if (fse->index >= num_modes)
> + return -EINVAL;
> +
> + fse->min_width = mode_list[fse->index].width;
> + fse->max_width = fse->min_width;
> + fse->min_height = mode_list[fse->index].height;
> + fse->max_height = fse->min_height;
> +
> + return 0;
> +}
> +
> +static void imx283_update_image_pad_format(struct imx283 *imx283,
> + const struct imx283_mode *mode,
> + struct v4l2_mbus_framefmt *format)
> +{
> + format->width = mode->width;
> + format->height = mode->height;
> + format->field = V4L2_FIELD_NONE;
> + format->colorspace = V4L2_COLORSPACE_RAW;
> + format->ycbcr_enc = V4L2_YCBCR_ENC_601;
> + format->quantization = V4L2_QUANTIZATION_FULL_RANGE;
> + format->xfer_func = V4L2_XFER_FUNC_NONE;
> +}
> +
> +static int imx283_init_state(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state)
> +{
> + struct imx283 *imx283 = to_imx283(sd);
> + struct v4l2_mbus_framefmt *format;
> + const struct imx283_mode *mode;
> + struct v4l2_rect *crop;
> +
> + /* Initialize try_fmt */
> + format = v4l2_subdev_state_get_format(state, IMAGE_PAD);
> +
> + mode = &supported_modes_12bit[0];
> + format->code = MEDIA_BUS_FMT_SRGGB12_1X12;
> + imx283_update_image_pad_format(imx283, mode, format);
> +
> + /* Initialize crop rectangle to mode default */
> + crop = v4l2_subdev_state_get_crop(state, IMAGE_PAD);
> + *crop = mode->crop;
> +
> + return 0;
> +}
> +
> +static void imx283_set_framing_limits(struct imx283 *imx283,
> + const struct imx283_mode *mode)
> +{
> + u64 pixel_rate = imx283_pixel_rate(imx283, mode);
> + u64 min_hblank, max_hblank, def_hblank;
> +
> + /* Initialise hmax and vmax for exposure calculations */
> + imx283->hmax = imx283_internal_clock(pixel_rate, mode->default_hmax);
> + imx283->vmax = mode->default_vmax;
> +
> + /*
> + * Horizontal Blanking
> + * Convert the HMAX_MAX (72MHz) to Pixel rate values for HBLANK_MAX
> + */
> + min_hblank = mode->min_hmax - mode->width;
> + max_hblank = imx283_iclk_to_pix(pixel_rate, IMX283_HMAX_MAX) - mode->width;
> + def_hblank = mode->default_hmax - mode->width;
> + __v4l2_ctrl_modify_range(imx283->hblank, min_hblank, max_hblank, 1,
> + def_hblank);
> + __v4l2_ctrl_s_ctrl(imx283->hblank, def_hblank);
> +
> + /* Vertical Blanking */
> + __v4l2_ctrl_modify_range(imx283->vblank, mode->min_vmax - mode->height,
> + IMX283_VMAX_MAX - mode->height, 1,
> + mode->default_vmax - mode->height);
> + __v4l2_ctrl_s_ctrl(imx283->vblank, mode->default_vmax - mode->height);
> +}
> +
> +static int imx283_set_pad_format(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_format *fmt)
> +{
> + struct v4l2_mbus_framefmt *format;
> + const struct imx283_mode *mode;
> + struct imx283 *imx283 = to_imx283(sd);
> + const struct imx283_mode *mode_list;
> + unsigned int num_modes;
> +
> + get_mode_table(fmt->format.code, &mode_list, &num_modes);
> +
> + mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
> + fmt->format.width, fmt->format.height);
> +
> + fmt->format.width = mode->width;
> + fmt->format.height = mode->height;
> + fmt->format.field = V4L2_FIELD_NONE;
> + fmt->format.colorspace = V4L2_COLORSPACE_RAW;
> + fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_601;
> + fmt->format.quantization = V4L2_QUANTIZATION_FULL_RANGE;
> + fmt->format.xfer_func = V4L2_XFER_FUNC_NONE;
> +
> + format = v4l2_subdev_state_get_format(sd_state, 0);
> +
> + if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
> + imx283_set_framing_limits(imx283, mode);
> +
> + *format = fmt->format;
> +
> + return 0;
> +}
> +
> +static int imx283_standby_cancel(struct imx283 *imx283)
> +{
> + unsigned int link_freq_idx;
> + int ret = 0;
> +
> + cci_write(imx283->cci, IMX283_REG_STANDBY,
> + IMX283_STBLOGIC | IMX283_STBDV, &ret);
> +
> + /* Configure PLL clocks based on the xclk */
> + cci_multi_reg_write(imx283->cci, imx283->freq->regs,
> + imx283->freq->reg_count, &ret);
> +
> + dev_dbg(imx283->dev, "Using clk freq %ld MHz",
> + imx283->freq->mhz / HZ_PER_MHZ);
> +
> + /* Initialise communication */
> + cci_write(imx283->cci, IMX283_REG_PLSTMG08, IMX283_PLSTMG08_VAL, &ret);
> + cci_write(imx283->cci, IMX283_REG_PLSTMG02, IMX283_PLSTMG02_VAL, &ret);
> +
> + /* Enable PLL */
> + cci_write(imx283->cci, IMX283_REG_STBPL, IMX283_STBPL_NORMAL, &ret);
> +
> + /* Configure the MIPI link speed */
> + link_freq_idx = __ffs(imx283->link_freq_bitmap);
> + cci_multi_reg_write(imx283->cci, link_freq_reglist[link_freq_idx].regs,
> + link_freq_reglist[link_freq_idx].num_of_regs,
> + &ret);
> +
> + /* 1st Stabilisation period of 1 ms or more */
> + usleep_range(1000, 2000);
> +
> + /* Activate */
> + cci_write(imx283->cci, IMX283_REG_STANDBY, IMX283_ACTIVE, &ret);
> +
> + /* 2nd Stabilisation period of 19ms or more */
> + usleep_range(19000, 20000);
> +
> + cci_write(imx283->cci, IMX283_REG_CLAMP, IMX283_CLPSQRST, &ret);
> + cci_write(imx283->cci, IMX283_REG_XMSTA, 0, &ret);
> + cci_write(imx283->cci, IMX283_REG_SYNCDRV, IMX283_SYNCDRV_XHS_XVS, &ret);
> +
> + return ret;
> +}
> +
> +/* Start streaming */
> +static int imx283_start_streaming(struct imx283 *imx283,
> + struct v4l2_subdev_state *state)
> +{
> + const struct imx283_readout_mode *readout;
> + const struct imx283_mode *mode;
> + const struct v4l2_mbus_framefmt *fmt;
> + const struct imx283_mode *mode_list;
> + unsigned int num_modes;
> + u32 v_widcut;
> + s32 v_pos;
> + u32 write_v_size;
> + u32 y_out_size;
> + int ret = 0;
> +
> + fmt = v4l2_subdev_state_get_format(state, 0);
> + get_mode_table(fmt->code, &mode_list, &num_modes);
> + mode = v4l2_find_nearest_size(mode_list, num_modes, width, height,
> + fmt->width, fmt->height);
> +
> + ret = imx283_standby_cancel(imx283);
> + if (ret) {
> + dev_err(imx283->dev, "failed to cancel standby\n");
> + return ret;
> + }
> +
> + /*
> + * Set the readout mode registers.
> + * MDSEL3 and MDSEL4 are updated to enable Arbitrary Vertical Cropping.
> + */
> + readout = &imx283_readout_modes[mode->mode];
> + cci_write(imx283->cci, IMX283_REG_MDSEL1, readout->mdsel1, &ret);
> + cci_write(imx283->cci, IMX283_REG_MDSEL2, readout->mdsel2, &ret);
> + cci_write(imx283->cci, IMX283_REG_MDSEL3,
> + readout->mdsel3 | IMX283_MDSEL3_VCROP_EN, &ret);
> + cci_write(imx283->cci, IMX283_REG_MDSEL4,
> + readout->mdsel4 | IMX283_MDSEL4_VCROP_EN, &ret);
> +
> + /* Mode 1S specific entries from the Readout Drive Mode Tables */
> + if (mode->mode == IMX283_MODE_1S) {
> + cci_write(imx283->cci, IMX283_REG_MDSEL7, 0x01, &ret);
> + cci_write(imx283->cci, IMX283_REG_MDSEL18, 0x1098, &ret);
> + }
> +
> + if (ret) {
> + dev_err(imx283->dev, "failed to set readout\n");
> + return ret;
> + }
> +
> + /* Initialise SVR. Unsupported for now - Always 0 */
> + cci_write(imx283->cci, IMX283_REG_SVR, 0x00, &ret);
> +
> + dev_dbg(imx283->dev, "Mode: Size %d x %d\n", mode->width, mode->height);
> + dev_dbg(imx283->dev, "Analogue Crop (in the mode) %d,%d %dx%d\n",
> + mode->crop.left,
> + mode->crop.top,
> + mode->crop.width,
> + mode->crop.height);
> +
> + y_out_size = mode->crop.height / mode->vbin_ratio;
> + write_v_size = y_out_size + mode->vertical_ob;
> + /*
> + * cropping start position = (VWINPOS – Vst) × 2
> + * cropping width = Veff – (VWIDCUT – Vct) × 2
> + */
> + v_pos = imx283->vflip->val ?
> + ((-mode->crop.top / mode->vbin_ratio) / 2) + mode->vst :
> + ((mode->crop.top / mode->vbin_ratio) / 2) + mode->vst;
> + v_widcut = ((mode->veff - y_out_size) / 2) + mode->vct;
> +
> + cci_write(imx283->cci, IMX283_REG_Y_OUT_SIZE, y_out_size, &ret);
> + cci_write(imx283->cci, IMX283_REG_WRITE_VSIZE, write_v_size, &ret);
> + cci_write(imx283->cci, IMX283_REG_VWIDCUT, v_widcut, &ret);
> + cci_write(imx283->cci, IMX283_REG_VWINPOS, v_pos, &ret);
> +
> + cci_write(imx283->cci, IMX283_REG_OB_SIZE_V, mode->vertical_ob, &ret);
> +
> + /* TODO: Validate mode->crop is fully contained within imx283_native_area */
> + cci_write(imx283->cci, IMX283_REG_HTRIMMING_START, mode->crop.left, &ret);
> + cci_write(imx283->cci, IMX283_REG_HTRIMMING_END,
> + mode->crop.left + mode->crop.width, &ret);
> +
> + /* Disable embedded data */
> + cci_write(imx283->cci, IMX283_REG_EBD_X_OUT_SIZE, 0, &ret);
> +
> + /* Apply customized values from controls (HMAX/VMAX/SHR) */
> + ret = __v4l2_ctrl_handler_setup(imx283->sd.ctrl_handler);
> +
> + return ret;
> +}
> +
> +static int imx283_enable_streams(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state, u32 pad,
> + u64 streams_mask)
> +{
> + struct imx283 *imx283 = to_imx283(sd);
> + int ret;
> +
> + if (pad != IMAGE_PAD)
> + return -EINVAL;
> +
> + ret = pm_runtime_get_sync(imx283->dev);
> + if (ret < 0) {
> + pm_runtime_put_noidle(imx283->dev);
> + return ret;
> + }
> +
> + ret = imx283_start_streaming(imx283, state);
> + if (ret)
> + goto err_rpm_put;
> +
> + return 0;
> +
> +err_rpm_put:
> + pm_runtime_mark_last_busy(imx283->dev);
> + pm_runtime_put_autosuspend(imx283->dev);
> +
> + return ret;
> +}
> +
> +static int imx283_disable_streams(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state, u32 pad,
> + u64 streams_mask)
> +{
> + struct imx283 *imx283 = to_imx283(sd);
> + int ret;
> +
> + if (pad != IMAGE_PAD)
> + return -EINVAL;
> +
> + ret = cci_write(imx283->cci, IMX283_REG_STANDBY, IMX283_STBLOGIC, NULL);
> + if (ret)
> + dev_err(imx283->dev, "Failed to stop stream\n");
> +
> + pm_runtime_mark_last_busy(imx283->dev);
> + pm_runtime_put_autosuspend(imx283->dev);
> +
> + return ret;
> +}
> +
> +/* Power/clock management functions */
> +static int imx283_power_on(struct imx283 *imx283)
> +{
> + int ret;
> +
> + ret = regulator_bulk_enable(ARRAY_SIZE(imx283_supply_name),
> + imx283->supplies);
> + if (ret) {
> + dev_err(imx283->dev, "failed to enable regulators\n");
> + return ret;
> + }
> +
> + ret = clk_prepare_enable(imx283->xclk);
> + if (ret) {
> + dev_err(imx283->dev, "failed to enable clock\n");
> + goto reg_off;
> + }
> +
> + gpiod_set_value_cansleep(imx283->reset_gpio, 0);
> +
> + usleep_range(IMX283_XCLR_MIN_DELAY_US,
> + IMX283_XCLR_MIN_DELAY_US + IMX283_XCLR_DELAY_RANGE_US);
> +
> + return 0;
> +
> +reg_off:
> + regulator_bulk_disable(ARRAY_SIZE(imx283_supply_name), imx283->supplies);
> + return ret;
> +}
> +
> +static int imx283_power_off(struct imx283 *imx283)
> +{
> + gpiod_set_value_cansleep(imx283->reset_gpio, 1);
> + regulator_bulk_disable(ARRAY_SIZE(imx283_supply_name), imx283->supplies);
> + clk_disable_unprepare(imx283->xclk);
> +
> + return 0;
> +}
> +
> +static int imx283_runtime_resume(struct device *dev)
> +{
> + struct v4l2_subdev *sd = dev_get_drvdata(dev);
> + struct imx283 *imx283 = to_imx283(sd);
> +
> + return imx283_power_on(imx283);
> +}
> +
> +static int imx283_runtime_suspend(struct device *dev)
> +{
> + struct v4l2_subdev *sd = dev_get_drvdata(dev);
> + struct imx283 *imx283 = to_imx283(sd);
> +
> + imx283_power_off(imx283);
> +
> + return 0;
> +}
> +
> +static int imx283_get_regulators(struct imx283 *imx283)
> +{
> + unsigned int i;
> +
> + for (i = 0; i < ARRAY_SIZE(imx283_supply_name); i++)
> + imx283->supplies[i].supply = imx283_supply_name[i];
> +
> + return devm_regulator_bulk_get(imx283->dev,
> + ARRAY_SIZE(imx283_supply_name),
> + imx283->supplies);
> +}
> +
> +/* Verify chip ID */
> +static int imx283_identify_module(struct imx283 *imx283)
> +{
> + int ret;
> + u64 val;
> +
> + ret = cci_read(imx283->cci, IMX283_REG_CHIP_ID, &val, NULL);
> + if (ret) {
> + dev_err(imx283->dev, "failed to read chip id %x, with error %d\n",
> + IMX283_CHIP_ID, ret);
> + return ret;
> + }
> +
> + if (val != IMX283_CHIP_ID) {
> + dev_err(imx283->dev, "chip id mismatch: %x!=%llx\n",
> + IMX283_CHIP_ID, val);
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static int imx283_get_selection(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_selection *sel)
> +{
> + switch (sel->target) {
> + case V4L2_SEL_TGT_CROP: {
> + sel->r = *v4l2_subdev_state_get_crop(sd_state, 0);
> + return 0;
> + }
> +
> + case V4L2_SEL_TGT_NATIVE_SIZE:
> + sel->r = imx283_native_area;
> + return 0;
> +
> + case V4L2_SEL_TGT_CROP_DEFAULT:
> + case V4L2_SEL_TGT_CROP_BOUNDS:
> + sel->r = imx283_active_area;
> + return 0;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static const struct v4l2_subdev_core_ops imx283_core_ops = {
> + .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
> + .unsubscribe_event = v4l2_event_subdev_unsubscribe,
> +};
> +
> +static const struct v4l2_subdev_video_ops imx283_video_ops = {
> + .s_stream = v4l2_subdev_s_stream_helper,
> +};
> +
> +static const struct v4l2_subdev_pad_ops imx283_pad_ops = {
> + .enum_mbus_code = imx283_enum_mbus_code,
> + .get_fmt = v4l2_subdev_get_fmt,
> + .set_fmt = imx283_set_pad_format,
> + .get_selection = imx283_get_selection,
> + .enum_frame_size = imx283_enum_frame_size,
> + .enable_streams = imx283_enable_streams,
> + .disable_streams = imx283_disable_streams,
> +};
> +
> +static const struct v4l2_subdev_internal_ops imx283_internal_ops = {
> + .init_state = imx283_init_state,
> +};
> +
> +static const struct v4l2_subdev_ops imx283_subdev_ops = {
> + .core = &imx283_core_ops,
> + .video = &imx283_video_ops,
> + .pad = &imx283_pad_ops,
> +};
> +
> +/* Initialize control handlers */
> +static int imx283_init_controls(struct imx283 *imx283)
> +{
> + struct v4l2_ctrl_handler *ctrl_hdlr;
> + struct v4l2_fwnode_device_properties props;
> + struct v4l2_ctrl *link_freq;
> + const struct imx283_mode *mode = &supported_modes_12bit[0];
> + u64 min_hblank, max_hblank, def_hblank;
> + u64 pixel_rate;
> + int ret;
> +
> + ctrl_hdlr = &imx283->ctrl_handler;
> + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 16);
> + if (ret)
> + return ret;
> +
> + /*
> + * Create the controls here, but mode specific limits are setup
> + * in the imx283_set_framing_limits() call below.
> + */
> +
> + /* By default, PIXEL_RATE is read only */
> + pixel_rate = imx283_pixel_rate(imx283, mode);
> + v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_PIXEL_RATE, pixel_rate,
> + pixel_rate, 1, pixel_rate);
> +
> + link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_LINK_FREQ,
> + __fls(imx283->link_freq_bitmap),
> + __ffs(imx283->link_freq_bitmap),
> + link_frequencies);
> + if (link_freq)
> + link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
> +
> + /* Initialise vblank/hblank/exposure based on the current mode. */
> + imx283->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_VBLANK,
> + mode->min_vmax - mode->height,
> + IMX283_VMAX_MAX, 1,
> + mode->default_vmax - mode->height);
> +
> + min_hblank = mode->min_hmax - mode->width;
> + max_hblank = imx283_iclk_to_pix(pixel_rate, IMX283_HMAX_MAX) - mode->width;
> + def_hblank = mode->default_hmax - mode->width;
> + imx283->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_HBLANK, min_hblank, max_hblank,
> + 1, def_hblank);
> +
> + imx283->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_EXPOSURE,
> + IMX283_EXPOSURE_MIN,
> + IMX283_EXPOSURE_MAX,
> + IMX283_EXPOSURE_STEP,
> + IMX283_EXPOSURE_DEFAULT);
> +
> + v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
> + IMX283_ANA_GAIN_MIN, IMX283_ANA_GAIN_MAX,
> + IMX283_ANA_GAIN_STEP, IMX283_ANA_GAIN_DEFAULT);
> +
> + v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
> + IMX283_DGTL_GAIN_MIN, IMX283_DGTL_GAIN_MAX,
> + IMX283_DGTL_GAIN_STEP, IMX283_DGTL_GAIN_DEFAULT);
> +
> + imx283->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx283_ctrl_ops, V4L2_CID_VFLIP,
> + 0, 1, 1, 0);
> + if (imx283->vflip)
> + imx283->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
> +
> + v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx283_ctrl_ops,
> + V4L2_CID_TEST_PATTERN,
> + ARRAY_SIZE(imx283_tpg_menu) - 1,
> + 0, 0, imx283_tpg_menu);
> +
> + if (ctrl_hdlr->error) {
> + ret = ctrl_hdlr->error;
> + dev_err(imx283->dev, "control init failed (%d)\n", ret);
> + goto error;
> + }
> +
> + ret = v4l2_fwnode_device_parse(imx283->dev, &props);
> + if (ret)
> + goto error;
> +
> + ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx283_ctrl_ops,
> + &props);
> + if (ret)
> + goto error;
> +
> + imx283->sd.ctrl_handler = ctrl_hdlr;
> +
> + mutex_lock(imx283->ctrl_handler.lock);
> +
> + /* Setup exposure and frame/line length limits. */
> + imx283_set_framing_limits(imx283, mode);
> +
> + mutex_unlock(imx283->ctrl_handler.lock);
> +
> + return 0;
> +
> +error:
> + v4l2_ctrl_handler_free(ctrl_hdlr);
> +
> + return ret;
> +}
> +
> +static int imx283_parse_endpoint(struct imx283 *imx283)
> +{
> + struct fwnode_handle *fwnode;
> + struct v4l2_fwnode_endpoint bus_cfg = {
> + .bus_type = V4L2_MBUS_CSI2_DPHY
> + };
> + struct fwnode_handle *ep;
> + int ret;
> +
> + fwnode = dev_fwnode(imx283->dev);
> + ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
> + if (!ep) {
> + dev_err(imx283->dev, "Failed to get next endpoint\n");
> + return -ENXIO;
> + }
> +
> + ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
> + fwnode_handle_put(ep);
> + if (ret)
> + return ret;
> +
> + if (bus_cfg.bus.mipi_csi2.num_data_lanes != 4) {
> + dev_err(imx283->dev,
> + "number of CSI2 data lanes %d is not supported\n",
> + bus_cfg.bus.mipi_csi2.num_data_lanes);
> + ret = -EINVAL;
> + goto done_endpoint_free;
> + }
> +
> + ret = v4l2_link_freq_to_bitmap(imx283->dev, bus_cfg.link_frequencies,
> + bus_cfg.nr_of_link_frequencies,
> + link_frequencies, ARRAY_SIZE(link_frequencies),
> + &imx283->link_freq_bitmap);
> +
> +done_endpoint_free:
> + v4l2_fwnode_endpoint_free(&bus_cfg);
> +
> + return ret;
> +};
> +
> +static int imx283_probe(struct i2c_client *client)
> +{
> + struct imx283 *imx283;
> + unsigned int i;
> + unsigned int xclk_freq;
> + int ret;
> +
> + imx283 = devm_kzalloc(&client->dev, sizeof(*imx283), GFP_KERNEL);
> + if (!imx283)
> + return -ENOMEM;
> +
> + imx283->dev = &client->dev;
> +
> + v4l2_i2c_subdev_init(&imx283->sd, client, &imx283_subdev_ops);
> +
> + imx283->cci = devm_cci_regmap_init_i2c(client, 16);
> + if (IS_ERR(imx283->cci)) {
> + ret = PTR_ERR(imx283->cci);
> + dev_err(imx283->dev, "failed to initialize CCI: %d\n", ret);
> + return ret;
> + }
> +
> + /* Get system clock (xclk) */
> + imx283->xclk = devm_clk_get(imx283->dev, NULL);
> + if (IS_ERR(imx283->xclk)) {
> + return dev_err_probe(imx283->dev, PTR_ERR(imx283->xclk),
> + "failed to get xclk\n");
> + }
> +
> + xclk_freq = clk_get_rate(imx283->xclk);
> + for (i = 0; i < ARRAY_SIZE(imx283_frequencies); i++) {
> + if (xclk_freq == imx283_frequencies[i].mhz) {
> + imx283->freq = &imx283_frequencies[i];
> + break;
> + }
> + }
> + if (!imx283->freq) {
> + dev_err(imx283->dev, "xclk frequency unsupported: %d Hz\n", xclk_freq);
> + return -EINVAL;
> + }
> +
> + ret = imx283_get_regulators(imx283);
> + if (ret) {
> + return dev_err_probe(imx283->dev, ret,
> + "failed to get regulators\n");
> + }
> +
> + ret = imx283_parse_endpoint(imx283);
> + if (ret) {
> + dev_err(imx283->dev, "failed to parse endpoint configuration\n");
> + return ret;
> + }
> +
> + /* Request optional enable pin */
> + imx283->reset_gpio = devm_gpiod_get_optional(imx283->dev, "reset",
> + GPIOD_OUT_LOW);
> + if (IS_ERR(imx283->reset_gpio))
> + return dev_err_probe(imx283->dev, PTR_ERR(imx283->reset_gpio),
> + "failed to get reset GPIO\n");
> +
> + /*
> + * The sensor must be powered for imx283_identify_module()
> + * to be able to read the CHIP_ID register
> + */
> + ret = imx283_power_on(imx283);
> + if (ret)
> + return ret;
> +
> + ret = imx283_identify_module(imx283);
> + if (ret)
> + goto error_power_off;
> +
> + /*
> + * Enable runtime PM with autosuspend. As the device has been powered
> + * manually, mark it as active, and increase the usage count without
> + * resuming the device.
> + */
> + pm_runtime_set_active(imx283->dev);
> + pm_runtime_get_noresume(imx283->dev);
> + pm_runtime_enable(imx283->dev);
> + pm_runtime_set_autosuspend_delay(imx283->dev, 1000);
> + pm_runtime_use_autosuspend(imx283->dev);
> +
> + /* This needs the pm runtime to be registered. */
> + ret = imx283_init_controls(imx283);
> + if (ret)
> + goto error_pm;
> +
> + /* Initialize subdev */
> + imx283->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
> + V4L2_SUBDEV_FL_HAS_EVENTS;
> + imx283->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
> + imx283->sd.internal_ops = &imx283_internal_ops;
> +
> + /* Initialize source pads */
> + imx283->pad.flags = MEDIA_PAD_FL_SOURCE;
> +
> + ret = media_entity_pads_init(&imx283->sd.entity, 1, &imx283->pad);
> + if (ret) {
> + dev_err(imx283->dev, "failed to init entity pads: %d\n", ret);
> + goto error_handler_free;
> + }
> +
> + imx283->sd.state_lock = imx283->ctrl_handler.lock;
> + ret = v4l2_subdev_init_finalize(&imx283->sd);
> + if (ret < 0) {
> + dev_err(imx283->dev, "subdev init error: %d\n", ret);
> + goto error_media_entity;
> + }
> +
> + ret = v4l2_async_register_subdev_sensor(&imx283->sd);
> + if (ret < 0) {
> + dev_err(imx283->dev, "failed to register sensor sub-device: %d\n", ret);
> + goto error_subdev_cleanup;
> + }
> +
> + /*
> + * Decrease the PM usage count. The device will get suspended after the
> + * autosuspend delay, turning the power off.
> + */
> + pm_runtime_mark_last_busy(imx283->dev);
> + pm_runtime_put_autosuspend(imx283->dev);
> +
> + return 0;
> +
> +error_subdev_cleanup:
> + v4l2_subdev_cleanup(&imx283->sd);
> +
> +error_media_entity:
> + media_entity_cleanup(&imx283->sd.entity);
> +
> +error_handler_free:
> + v4l2_ctrl_handler_free(imx283->sd.ctrl_handler);
> +
> +error_pm:
> + pm_runtime_disable(imx283->dev);
> + pm_runtime_set_suspended(imx283->dev);
> +error_power_off:
> + imx283_power_off(imx283);
> +
> + return ret;
> +}
> +
> +static void imx283_remove(struct i2c_client *client)
> +{
> + struct v4l2_subdev *sd = i2c_get_clientdata(client);
> + struct imx283 *imx283 = to_imx283(sd);
> +
> + v4l2_async_unregister_subdev(sd);
> + v4l2_subdev_cleanup(&imx283->sd);
> + media_entity_cleanup(&sd->entity);
> + v4l2_ctrl_handler_free(imx283->sd.ctrl_handler);
> +
> + pm_runtime_disable(imx283->dev);
> + if (!pm_runtime_status_suspended(imx283->dev))
> + imx283_power_off(imx283);
> + pm_runtime_set_suspended(imx283->dev);
> +}
> +
> +static DEFINE_RUNTIME_DEV_PM_OPS(imx283_pm_ops, imx283_runtime_suspend,
> + imx283_runtime_resume, NULL);
> +
> +static const struct of_device_id imx283_dt_ids[] = {
> + { .compatible = "sony,imx283" },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, imx283_dt_ids);
> +
> +static struct i2c_driver imx283_i2c_driver = {
> + .driver = {
> + .name = "imx283",
> + .pm = pm_ptr(&imx283_pm_ops),
> + .of_match_table = imx283_dt_ids,
> + },
> + .probe = imx283_probe,
> + .remove = imx283_remove,
> +};
> +module_i2c_driver(imx283_i2c_driver);
> +
> +MODULE_AUTHOR("Will Whang <will@willwhang.com>");
> +MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>");
> +MODULE_AUTHOR("Umang Jain <umang.jain@ideasonboard.com>");
> +MODULE_DESCRIPTION("Sony IMX283 Sensor Driver");
> +MODULE_LICENSE("GPL");
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* [PATCH v1 1/3] mm/gup: consistently name GUP-fast functions
From: David Hildenbrand @ 2024-04-02 12:55 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mm, David Hildenbrand, Andrew Morton, Mike Rapoport,
Jason Gunthorpe, John Hubbard, Peter Xu, linux-arm-kernel,
loongarch, linux-mips, linuxppc-dev, linux-s390, linux-sh,
linux-perf-users, linux-fsdevel, linux-riscv, x86
In-Reply-To: <20240402125516.223131-1-david@redhat.com>
Let's consistently call the "fast-only" part of GUP "GUP-fast" and rename
all relevant internal functions to start with "gup_fast", to make it
clearer that this is not ordinary GUP. The current mixture of
"lockless", "gup" and "gup_fast" is confusing.
Further, avoid the term "huge" when talking about a "leaf" -- for
example, we nowadays check pmd_leaf() because pmd_huge() is gone. For the
"hugepd"/"hugepte" stuff, it's part of the name ("is_hugepd"), so that
stays.
What remains is the "external" interface:
* get_user_pages_fast_only()
* get_user_pages_fast()
* pin_user_pages_fast()
The high-level internal functions for GUP-fast (+slow fallback) are now:
* internal_get_user_pages_fast() -> gup_fast_fallback()
* lockless_pages_from_mm() -> gup_fast()
The basic GUP-fast walker functions:
* gup_pgd_range() -> gup_fast_pgd_range()
* gup_p4d_range() -> gup_fast_p4d_range()
* gup_pud_range() -> gup_fast_pud_range()
* gup_pmd_range() -> gup_fast_pmd_range()
* gup_pte_range() -> gup_fast_pte_range()
* gup_huge_pgd() -> gup_fast_pgd_leaf()
* gup_huge_pud() -> gup_fast_pud_leaf()
* gup_huge_pmd() -> gup_fast_pmd_leaf()
The weird hugepd stuff:
* gup_huge_pd() -> gup_fast_hugepd()
* gup_hugepte() -> gup_fast_hugepte()
The weird devmap stuff:
* __gup_device_huge_pud() -> gup_fast_devmap_pud_leaf()
* __gup_device_huge_pmd -> gup_fast_devmap_pmd_leaf()
* __gup_device_huge() -> gup_fast_devmap_leaf()
* undo_dev_pagemap() -> gup_fast_undo_dev_pagemap()
Helper functions:
* unpin_user_pages_lockless() -> gup_fast_unpin_user_pages()
* gup_fast_folio_allowed() is already properly named
* gup_fast_permitted() is already properly named
With "gup_fast()", we now even have a function that is referred to in
comment in mm/mmu_gather.c.
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Mike Rapoport (IBM) <rppt@kernel.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
mm/gup.c | 205 ++++++++++++++++++++++++++++---------------------------
1 file changed, 103 insertions(+), 102 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index 95bd9d4b7cfb..f1ac2c5a7f6d 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -440,7 +440,7 @@ void unpin_user_page_range_dirty_lock(struct page *page, unsigned long npages,
}
EXPORT_SYMBOL(unpin_user_page_range_dirty_lock);
-static void unpin_user_pages_lockless(struct page **pages, unsigned long npages)
+static void gup_fast_unpin_user_pages(struct page **pages, unsigned long npages)
{
unsigned long i;
struct folio *folio;
@@ -525,9 +525,9 @@ static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
return (__boundary - 1 < end - 1) ? __boundary : end;
}
-static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long pte_end;
struct page *page;
@@ -577,7 +577,7 @@ static int gup_hugepte(pte_t *ptep, unsigned long sz, unsigned long addr,
* of the other folios. See writable_file_mapping_allowed() and
* gup_fast_folio_allowed() for more information.
*/
-static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
+static int gup_fast_hugepd(hugepd_t hugepd, unsigned long addr,
unsigned int pdshift, unsigned long end, unsigned int flags,
struct page **pages, int *nr)
{
@@ -588,7 +588,7 @@ static int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
ptep = hugepte_offset(hugepd, addr, pdshift);
do {
next = hugepte_addr_end(addr, end, sz);
- if (!gup_hugepte(ptep, sz, addr, end, flags, pages, nr))
+ if (!gup_fast_hugepte(ptep, sz, addr, end, flags, pages, nr))
return 0;
} while (ptep++, addr = next, addr != end);
@@ -613,8 +613,8 @@ static struct page *follow_hugepd(struct vm_area_struct *vma, hugepd_t hugepd,
h = hstate_vma(vma);
ptep = hugepte_offset(hugepd, addr, pdshift);
ptl = huge_pte_lock(h, vma->vm_mm, ptep);
- ret = gup_huge_pd(hugepd, addr, pdshift, addr + PAGE_SIZE,
- flags, &page, &nr);
+ ret = gup_fast_hugepd(hugepd, addr, pdshift, addr + PAGE_SIZE,
+ flags, &page, &nr);
spin_unlock(ptl);
if (ret) {
@@ -626,7 +626,7 @@ static struct page *follow_hugepd(struct vm_area_struct *vma, hugepd_t hugepd,
return NULL;
}
#else /* CONFIG_ARCH_HAS_HUGEPD */
-static inline int gup_huge_pd(hugepd_t hugepd, unsigned long addr,
+static inline int gup_fast_hugepd(hugepd_t hugepd, unsigned long addr,
unsigned int pdshift, unsigned long end, unsigned int flags,
struct page **pages, int *nr)
{
@@ -2753,7 +2753,7 @@ long get_user_pages_unlocked(unsigned long start, unsigned long nr_pages,
EXPORT_SYMBOL(get_user_pages_unlocked);
/*
- * Fast GUP
+ * GUP-fast
*
* get_user_pages_fast attempts to pin user pages by walking the page
* tables directly and avoids taking locks. Thus the walker needs to be
@@ -2767,7 +2767,7 @@ EXPORT_SYMBOL(get_user_pages_unlocked);
*
* Another way to achieve this is to batch up page table containing pages
* belonging to more than one mm_user, then rcu_sched a callback to free those
- * pages. Disabling interrupts will allow the fast_gup walker to both block
+ * pages. Disabling interrupts will allow the gup_fast() walker to both block
* the rcu_sched callback, and an IPI that we broadcast for splitting THPs
* (which is a relatively rare event). The code below adopts this strategy.
*
@@ -2876,9 +2876,8 @@ static bool gup_fast_folio_allowed(struct folio *folio, unsigned int flags)
return !reject_file_backed || shmem_mapping(mapping);
}
-static void __maybe_unused undo_dev_pagemap(int *nr, int nr_start,
- unsigned int flags,
- struct page **pages)
+static void __maybe_unused gup_fast_undo_dev_pagemap(int *nr, int nr_start,
+ unsigned int flags, struct page **pages)
{
while ((*nr) - nr_start) {
struct page *page = pages[--(*nr)];
@@ -2893,27 +2892,27 @@ static void __maybe_unused undo_dev_pagemap(int *nr, int nr_start,
#ifdef CONFIG_ARCH_HAS_PTE_SPECIAL
/*
- * Fast-gup relies on pte change detection to avoid concurrent pgtable
+ * GUP-fast relies on pte change detection to avoid concurrent pgtable
* operations.
*
- * To pin the page, fast-gup needs to do below in order:
+ * To pin the page, GUP-fast needs to do below in order:
* (1) pin the page (by prefetching pte), then (2) check pte not changed.
*
* For the rest of pgtable operations where pgtable updates can be racy
- * with fast-gup, we need to do (1) clear pte, then (2) check whether page
+ * with GUP-fast, we need to do (1) clear pte, then (2) check whether page
* is pinned.
*
* Above will work for all pte-level operations, including THP split.
*
- * For THP collapse, it's a bit more complicated because fast-gup may be
+ * For THP collapse, it's a bit more complicated because GUP-fast may be
* walking a pgtable page that is being freed (pte is still valid but pmd
* can be cleared already). To avoid race in such condition, we need to
* also check pmd here to make sure pmd doesn't change (corresponds to
* pmdp_collapse_flush() in the THP collapse code path).
*/
-static int gup_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
struct dev_pagemap *pgmap = NULL;
int nr_start = *nr, ret = 0;
@@ -2946,7 +2945,7 @@ static int gup_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
pgmap = get_dev_pagemap(pte_pfn(pte), pgmap);
if (unlikely(!pgmap)) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
goto pte_unmap;
}
} else if (pte_special(pte))
@@ -3010,20 +3009,19 @@ static int gup_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
*
* For a futex to be placed on a THP tail page, get_futex_key requires a
* get_user_pages_fast_only implementation that can pin pages. Thus it's still
- * useful to have gup_huge_pmd even if we can't operate on ptes.
+ * useful to have gup_fast_pmd_leaf even if we can't operate on ptes.
*/
-static int gup_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_pte_range(pmd_t pmd, pmd_t *pmdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
return 0;
}
#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
#if defined(CONFIG_ARCH_HAS_PTE_DEVMAP) && defined(CONFIG_TRANSPARENT_HUGEPAGE)
-static int __gup_device_huge(unsigned long pfn, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_devmap_leaf(unsigned long pfn, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages, int *nr)
{
int nr_start = *nr;
struct dev_pagemap *pgmap = NULL;
@@ -3033,19 +3031,19 @@ static int __gup_device_huge(unsigned long pfn, unsigned long addr,
pgmap = get_dev_pagemap(pfn, pgmap);
if (unlikely(!pgmap)) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
break;
}
if (!(flags & FOLL_PCI_P2PDMA) && is_pci_p2pdma_page(page)) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
break;
}
SetPageReferenced(page);
pages[*nr] = page;
if (unlikely(try_grab_page(page, flags))) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
break;
}
(*nr)++;
@@ -3056,62 +3054,62 @@ static int __gup_device_huge(unsigned long pfn, unsigned long addr,
return addr == end;
}
-static int __gup_device_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_devmap_pmd_leaf(pmd_t orig, pmd_t *pmdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long fault_pfn;
int nr_start = *nr;
fault_pfn = pmd_pfn(orig) + ((addr & ~PMD_MASK) >> PAGE_SHIFT);
- if (!__gup_device_huge(fault_pfn, addr, end, flags, pages, nr))
+ if (!gup_fast_devmap_leaf(fault_pfn, addr, end, flags, pages, nr))
return 0;
if (unlikely(pmd_val(orig) != pmd_val(*pmdp))) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
return 0;
}
return 1;
}
-static int __gup_device_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_devmap_pud_leaf(pud_t orig, pud_t *pudp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long fault_pfn;
int nr_start = *nr;
fault_pfn = pud_pfn(orig) + ((addr & ~PUD_MASK) >> PAGE_SHIFT);
- if (!__gup_device_huge(fault_pfn, addr, end, flags, pages, nr))
+ if (!gup_fast_devmap_leaf(fault_pfn, addr, end, flags, pages, nr))
return 0;
if (unlikely(pud_val(orig) != pud_val(*pudp))) {
- undo_dev_pagemap(nr, nr_start, flags, pages);
+ gup_fast_undo_dev_pagemap(nr, nr_start, flags, pages);
return 0;
}
return 1;
}
#else
-static int __gup_device_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_devmap_pmd_leaf(pmd_t orig, pmd_t *pmdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
BUILD_BUG();
return 0;
}
-static int __gup_device_huge_pud(pud_t pud, pud_t *pudp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_devmap_pud_leaf(pud_t pud, pud_t *pudp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
BUILD_BUG();
return 0;
}
#endif
-static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_pmd_leaf(pmd_t orig, pmd_t *pmdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
struct page *page;
struct folio *folio;
@@ -3123,8 +3121,8 @@ static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
if (pmd_devmap(orig)) {
if (unlikely(flags & FOLL_LONGTERM))
return 0;
- return __gup_device_huge_pmd(orig, pmdp, addr, end, flags,
- pages, nr);
+ return gup_fast_devmap_pmd_leaf(orig, pmdp, addr, end, flags,
+ pages, nr);
}
page = pmd_page(orig);
@@ -3153,9 +3151,9 @@ static int gup_huge_pmd(pmd_t orig, pmd_t *pmdp, unsigned long addr,
return 1;
}
-static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_pud_leaf(pud_t orig, pud_t *pudp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
struct page *page;
struct folio *folio;
@@ -3167,8 +3165,8 @@ static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
if (pud_devmap(orig)) {
if (unlikely(flags & FOLL_LONGTERM))
return 0;
- return __gup_device_huge_pud(orig, pudp, addr, end, flags,
- pages, nr);
+ return gup_fast_devmap_pud_leaf(orig, pudp, addr, end, flags,
+ pages, nr);
}
page = pud_page(orig);
@@ -3198,9 +3196,9 @@ static int gup_huge_pud(pud_t orig, pud_t *pudp, unsigned long addr,
return 1;
}
-static int gup_huge_pgd(pgd_t orig, pgd_t *pgdp, unsigned long addr,
- unsigned long end, unsigned int flags,
- struct page **pages, int *nr)
+static int gup_fast_pgd_leaf(pgd_t orig, pgd_t *pgdp, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
int refs;
struct page *page;
@@ -3238,8 +3236,9 @@ static int gup_huge_pgd(pgd_t orig, pgd_t *pgdp, unsigned long addr,
return 1;
}
-static int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, unsigned long end,
- unsigned int flags, struct page **pages, int *nr)
+static int gup_fast_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long next;
pmd_t *pmdp;
@@ -3253,11 +3252,11 @@ static int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, unsigned lo
return 0;
if (unlikely(pmd_leaf(pmd))) {
- /* See gup_pte_range() */
+ /* See gup_fast_pte_range() */
if (pmd_protnone(pmd))
return 0;
- if (!gup_huge_pmd(pmd, pmdp, addr, next, flags,
+ if (!gup_fast_pmd_leaf(pmd, pmdp, addr, next, flags,
pages, nr))
return 0;
@@ -3266,18 +3265,20 @@ static int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr, unsigned lo
* architecture have different format for hugetlbfs
* pmd format and THP pmd format
*/
- if (!gup_huge_pd(__hugepd(pmd_val(pmd)), addr,
- PMD_SHIFT, next, flags, pages, nr))
+ if (!gup_fast_hugepd(__hugepd(pmd_val(pmd)), addr,
+ PMD_SHIFT, next, flags, pages, nr))
return 0;
- } else if (!gup_pte_range(pmd, pmdp, addr, next, flags, pages, nr))
+ } else if (!gup_fast_pte_range(pmd, pmdp, addr, next, flags,
+ pages, nr))
return 0;
} while (pmdp++, addr = next, addr != end);
return 1;
}
-static int gup_pud_range(p4d_t *p4dp, p4d_t p4d, unsigned long addr, unsigned long end,
- unsigned int flags, struct page **pages, int *nr)
+static int gup_fast_pud_range(p4d_t *p4dp, p4d_t p4d, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long next;
pud_t *pudp;
@@ -3290,22 +3291,24 @@ static int gup_pud_range(p4d_t *p4dp, p4d_t p4d, unsigned long addr, unsigned lo
if (unlikely(!pud_present(pud)))
return 0;
if (unlikely(pud_leaf(pud))) {
- if (!gup_huge_pud(pud, pudp, addr, next, flags,
- pages, nr))
+ if (!gup_fast_pud_leaf(pud, pudp, addr, next, flags,
+ pages, nr))
return 0;
} else if (unlikely(is_hugepd(__hugepd(pud_val(pud))))) {
- if (!gup_huge_pd(__hugepd(pud_val(pud)), addr,
- PUD_SHIFT, next, flags, pages, nr))
+ if (!gup_fast_hugepd(__hugepd(pud_val(pud)), addr,
+ PUD_SHIFT, next, flags, pages, nr))
return 0;
- } else if (!gup_pmd_range(pudp, pud, addr, next, flags, pages, nr))
+ } else if (!gup_fast_pmd_range(pudp, pud, addr, next, flags,
+ pages, nr))
return 0;
} while (pudp++, addr = next, addr != end);
return 1;
}
-static int gup_p4d_range(pgd_t *pgdp, pgd_t pgd, unsigned long addr, unsigned long end,
- unsigned int flags, struct page **pages, int *nr)
+static int gup_fast_p4d_range(pgd_t *pgdp, pgd_t pgd, unsigned long addr,
+ unsigned long end, unsigned int flags, struct page **pages,
+ int *nr)
{
unsigned long next;
p4d_t *p4dp;
@@ -3319,17 +3322,18 @@ static int gup_p4d_range(pgd_t *pgdp, pgd_t pgd, unsigned long addr, unsigned lo
return 0;
BUILD_BUG_ON(p4d_leaf(p4d));
if (unlikely(is_hugepd(__hugepd(p4d_val(p4d))))) {
- if (!gup_huge_pd(__hugepd(p4d_val(p4d)), addr,
- P4D_SHIFT, next, flags, pages, nr))
+ if (!gup_fast_hugepd(__hugepd(p4d_val(p4d)), addr,
+ P4D_SHIFT, next, flags, pages, nr))
return 0;
- } else if (!gup_pud_range(p4dp, p4d, addr, next, flags, pages, nr))
+ } else if (!gup_fast_pud_range(p4dp, p4d, addr, next, flags,
+ pages, nr))
return 0;
} while (p4dp++, addr = next, addr != end);
return 1;
}
-static void gup_pgd_range(unsigned long addr, unsigned long end,
+static void gup_fast_pgd_range(unsigned long addr, unsigned long end,
unsigned int flags, struct page **pages, int *nr)
{
unsigned long next;
@@ -3343,19 +3347,20 @@ static void gup_pgd_range(unsigned long addr, unsigned long end,
if (pgd_none(pgd))
return;
if (unlikely(pgd_leaf(pgd))) {
- if (!gup_huge_pgd(pgd, pgdp, addr, next, flags,
- pages, nr))
+ if (!gup_fast_pgd_leaf(pgd, pgdp, addr, next, flags,
+ pages, nr))
return;
} else if (unlikely(is_hugepd(__hugepd(pgd_val(pgd))))) {
- if (!gup_huge_pd(__hugepd(pgd_val(pgd)), addr,
- PGDIR_SHIFT, next, flags, pages, nr))
+ if (!gup_fast_hugepd(__hugepd(pgd_val(pgd)), addr,
+ PGDIR_SHIFT, next, flags, pages, nr))
return;
- } else if (!gup_p4d_range(pgdp, pgd, addr, next, flags, pages, nr))
+ } else if (!gup_fast_p4d_range(pgdp, pgd, addr, next, flags,
+ pages, nr))
return;
} while (pgdp++, addr = next, addr != end);
}
#else
-static inline void gup_pgd_range(unsigned long addr, unsigned long end,
+static inline void gup_fast_pgd_range(unsigned long addr, unsigned long end,
unsigned int flags, struct page **pages, int *nr)
{
}
@@ -3372,10 +3377,8 @@ static bool gup_fast_permitted(unsigned long start, unsigned long end)
}
#endif
-static unsigned long lockless_pages_from_mm(unsigned long start,
- unsigned long end,
- unsigned int gup_flags,
- struct page **pages)
+static unsigned long gup_fast(unsigned long start, unsigned long end,
+ unsigned int gup_flags, struct page **pages)
{
unsigned long flags;
int nr_pinned = 0;
@@ -3403,16 +3406,16 @@ static unsigned long lockless_pages_from_mm(unsigned long start,
* that come from THPs splitting.
*/
local_irq_save(flags);
- gup_pgd_range(start, end, gup_flags, pages, &nr_pinned);
+ gup_fast_pgd_range(start, end, gup_flags, pages, &nr_pinned);
local_irq_restore(flags);
/*
* When pinning pages for DMA there could be a concurrent write protect
- * from fork() via copy_page_range(), in this case always fail fast GUP.
+ * from fork() via copy_page_range(), in this case always fail GUP-fast.
*/
if (gup_flags & FOLL_PIN) {
if (read_seqcount_retry(¤t->mm->write_protect_seq, seq)) {
- unpin_user_pages_lockless(pages, nr_pinned);
+ gup_fast_unpin_user_pages(pages, nr_pinned);
return 0;
} else {
sanity_check_pinned_pages(pages, nr_pinned);
@@ -3421,10 +3424,8 @@ static unsigned long lockless_pages_from_mm(unsigned long start,
return nr_pinned;
}
-static int internal_get_user_pages_fast(unsigned long start,
- unsigned long nr_pages,
- unsigned int gup_flags,
- struct page **pages)
+static int gup_fast_fallback(unsigned long start, unsigned long nr_pages,
+ unsigned int gup_flags, struct page **pages)
{
unsigned long len, end;
unsigned long nr_pinned;
@@ -3452,7 +3453,7 @@ static int internal_get_user_pages_fast(unsigned long start,
if (unlikely(!access_ok((void __user *)start, len)))
return -EFAULT;
- nr_pinned = lockless_pages_from_mm(start, end, gup_flags, pages);
+ nr_pinned = gup_fast(start, end, gup_flags, pages);
if (nr_pinned == nr_pages || gup_flags & FOLL_FAST_ONLY)
return nr_pinned;
@@ -3506,7 +3507,7 @@ int get_user_pages_fast_only(unsigned long start, int nr_pages,
FOLL_GET | FOLL_FAST_ONLY))
return -EINVAL;
- return internal_get_user_pages_fast(start, nr_pages, gup_flags, pages);
+ return gup_fast_fallback(start, nr_pages, gup_flags, pages);
}
EXPORT_SYMBOL_GPL(get_user_pages_fast_only);
@@ -3537,7 +3538,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages,
*/
if (!is_valid_gup_args(pages, NULL, &gup_flags, FOLL_GET))
return -EINVAL;
- return internal_get_user_pages_fast(start, nr_pages, gup_flags, pages);
+ return gup_fast_fallback(start, nr_pages, gup_flags, pages);
}
EXPORT_SYMBOL_GPL(get_user_pages_fast);
@@ -3565,7 +3566,7 @@ int pin_user_pages_fast(unsigned long start, int nr_pages,
{
if (!is_valid_gup_args(pages, NULL, &gup_flags, FOLL_PIN))
return -EINVAL;
- return internal_get_user_pages_fast(start, nr_pages, gup_flags, pages);
+ return gup_fast_fallback(start, nr_pages, gup_flags, pages);
}
EXPORT_SYMBOL_GPL(pin_user_pages_fast);
--
2.44.0
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linux-arm-kernel@lists.infradead.org
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^ permalink raw reply related
* [PATCH v1 3/3] mm: use "GUP-fast" instead "fast GUP" in remaining comments
From: David Hildenbrand @ 2024-04-02 12:55 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mm, David Hildenbrand, Andrew Morton, Mike Rapoport,
Jason Gunthorpe, John Hubbard, Peter Xu, linux-arm-kernel,
loongarch, linux-mips, linuxppc-dev, linux-s390, linux-sh,
linux-perf-users, linux-fsdevel, linux-riscv, x86
In-Reply-To: <20240402125516.223131-1-david@redhat.com>
Let's fixup the remaining comments to consistently call that thing
"GUP-fast". With this change, we consistently call it "GUP-fast".
Reviewed-by: Mike Rapoport (IBM) <rppt@kernel.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
mm/filemap.c | 2 +-
mm/khugepaged.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/filemap.c b/mm/filemap.c
index 387b394754fa..c668e11cd6ef 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1810,7 +1810,7 @@ EXPORT_SYMBOL(page_cache_prev_miss);
* C. Return the page to the page allocator
*
* This means that any page may have its reference count temporarily
- * increased by a speculative page cache (or fast GUP) lookup as it can
+ * increased by a speculative page cache (or GUP-fast) lookup as it can
* be allocated by another user before the RCU grace period expires.
* Because the refcount temporarily acquired here may end up being the
* last refcount on the page, any page allocation must be freeable by
diff --git a/mm/khugepaged.c b/mm/khugepaged.c
index 38830174608f..6972fa05132e 100644
--- a/mm/khugepaged.c
+++ b/mm/khugepaged.c
@@ -1169,7 +1169,7 @@ static int collapse_huge_page(struct mm_struct *mm, unsigned long address,
* huge and small TLB entries for the same virtual address to
* avoid the risk of CPU bugs in that area.
*
- * Parallel fast GUP is fine since fast GUP will back off when
+ * Parallel GUP-fast is fine since GUP-fast will back off when
* it detects PMD is changed.
*/
_pmd = pmdp_collapse_flush(vma, address, pmd);
--
2.44.0
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^ permalink raw reply related
* [PATCH v1 2/3] mm/treewide: rename CONFIG_HAVE_FAST_GUP to CONFIG_HAVE_GUP_FAST
From: David Hildenbrand @ 2024-04-02 12:55 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mm, David Hildenbrand, Andrew Morton, Mike Rapoport,
Jason Gunthorpe, John Hubbard, Peter Xu, linux-arm-kernel,
loongarch, linux-mips, linuxppc-dev, linux-s390, linux-sh,
linux-perf-users, linux-fsdevel, linux-riscv, x86
In-Reply-To: <20240402125516.223131-1-david@redhat.com>
Nowadays, we call it "GUP-fast", the external interface includes
functions like "get_user_pages_fast()", and we renamed all internal
functions to reflect that as well.
Let's make the config option reflect that.
Reviewed-by: Mike Rapoport (IBM) <rppt@kernel.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
arch/arm/Kconfig | 2 +-
arch/arm64/Kconfig | 2 +-
arch/loongarch/Kconfig | 2 +-
arch/mips/Kconfig | 2 +-
arch/powerpc/Kconfig | 2 +-
arch/riscv/Kconfig | 2 +-
arch/s390/Kconfig | 2 +-
arch/sh/Kconfig | 2 +-
arch/x86/Kconfig | 2 +-
include/linux/rmap.h | 8 ++++----
kernel/events/core.c | 4 ++--
mm/Kconfig | 2 +-
mm/gup.c | 10 +++++-----
mm/internal.h | 2 +-
14 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b14aed3a17ab..817918f6635a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -99,7 +99,7 @@ config ARM
select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
select HAVE_EXIT_THREAD
- select HAVE_FAST_GUP if ARM_LPAE
+ select HAVE_GUP_FAST if ARM_LPAE
select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
select HAVE_FUNCTION_ERROR_INJECTION
select HAVE_FUNCTION_GRAPH_TRACER
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7b11c98b3e84..de076a191e9f 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -205,7 +205,7 @@ config ARM64
select HAVE_SAMPLE_FTRACE_DIRECT
select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
select HAVE_EFFICIENT_UNALIGNED_ACCESS
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_ERROR_INJECTION
diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index a5f300ec6f28..cd642eefd9e5 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -119,7 +119,7 @@ config LOONGARCH
select HAVE_EBPF_JIT
select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
select HAVE_EXIT_THREAD
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_ARG_ACCESS_API
select HAVE_FUNCTION_ERROR_INJECTION
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 516dc7022bd7..f1aa1bf11166 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -68,7 +68,7 @@ config MIPS
select HAVE_DYNAMIC_FTRACE
select HAVE_EBPF_JIT if !CPU_MICROMIPS
select HAVE_EXIT_THREAD
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 1c4be3373686..e42cc8cd415f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -236,7 +236,7 @@ config PPC
select HAVE_DYNAMIC_FTRACE_WITH_REGS if ARCH_USING_PATCHABLE_FUNCTION_ENTRY || MPROFILE_KERNEL || PPC32
select HAVE_EBPF_JIT
select HAVE_EFFICIENT_UNALIGNED_ACCESS
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_ARG_ACCESS_API
select HAVE_FUNCTION_DESCRIPTORS if PPC64_ELF_ABI_V1
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index be09c8836d56..3ee60ddef93e 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -132,7 +132,7 @@ config RISCV
select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER if !XIP_KERNEL && !PREEMPTION
select HAVE_EBPF_JIT if MMU
- select HAVE_FAST_GUP if MMU
+ select HAVE_GUP_FAST if MMU
select HAVE_FUNCTION_ARG_ACCESS_API
select HAVE_FUNCTION_ERROR_INJECTION
select HAVE_GCC_PLUGINS
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 8f01ada6845e..d9aed4c93ee6 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -174,7 +174,7 @@ config S390
select HAVE_DYNAMIC_FTRACE_WITH_REGS
select HAVE_EBPF_JIT if HAVE_MARCH_Z196_FEATURES
select HAVE_EFFICIENT_UNALIGNED_ACCESS
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FENTRY
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_ARG_ACCESS_API
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 2ad3e29f0ebe..7292542f75e8 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -38,7 +38,7 @@ config SUPERH
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DYNAMIC_FTRACE
- select HAVE_FAST_GUP if MMU
+ select HAVE_GUP_FAST if MMU
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
select HAVE_FTRACE_MCOUNT_RECORD
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 4fff6ed46e90..222b42941cf3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -221,7 +221,7 @@ config X86
select HAVE_EFFICIENT_UNALIGNED_ACCESS
select HAVE_EISA
select HAVE_EXIT_THREAD
- select HAVE_FAST_GUP
+ select HAVE_GUP_FAST
select HAVE_FENTRY if X86_64 || DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index b7944a833668..9bf9324214fc 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -284,7 +284,7 @@ static inline int hugetlb_try_share_anon_rmap(struct folio *folio)
VM_WARN_ON_FOLIO(!PageAnonExclusive(&folio->page), folio);
/* Paired with the memory barrier in try_grab_folio(). */
- if (IS_ENABLED(CONFIG_HAVE_FAST_GUP))
+ if (IS_ENABLED(CONFIG_HAVE_GUP_FAST))
smp_mb();
if (unlikely(folio_maybe_dma_pinned(folio)))
@@ -295,7 +295,7 @@ static inline int hugetlb_try_share_anon_rmap(struct folio *folio)
* This is conceptually a smp_wmb() paired with the smp_rmb() in
* gup_must_unshare().
*/
- if (IS_ENABLED(CONFIG_HAVE_FAST_GUP))
+ if (IS_ENABLED(CONFIG_HAVE_GUP_FAST))
smp_mb__after_atomic();
return 0;
}
@@ -541,7 +541,7 @@ static __always_inline int __folio_try_share_anon_rmap(struct folio *folio,
*/
/* Paired with the memory barrier in try_grab_folio(). */
- if (IS_ENABLED(CONFIG_HAVE_FAST_GUP))
+ if (IS_ENABLED(CONFIG_HAVE_GUP_FAST))
smp_mb();
if (unlikely(folio_maybe_dma_pinned(folio)))
@@ -552,7 +552,7 @@ static __always_inline int __folio_try_share_anon_rmap(struct folio *folio,
* This is conceptually a smp_wmb() paired with the smp_rmb() in
* gup_must_unshare().
*/
- if (IS_ENABLED(CONFIG_HAVE_FAST_GUP))
+ if (IS_ENABLED(CONFIG_HAVE_GUP_FAST))
smp_mb__after_atomic();
return 0;
}
diff --git a/kernel/events/core.c b/kernel/events/core.c
index 724e6d7e128f..c5a0dc1f135f 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -7539,7 +7539,7 @@ static u64 perf_get_pgtable_size(struct mm_struct *mm, unsigned long addr)
{
u64 size = 0;
-#ifdef CONFIG_HAVE_FAST_GUP
+#ifdef CONFIG_HAVE_GUP_FAST
pgd_t *pgdp, pgd;
p4d_t *p4dp, p4d;
pud_t *pudp, pud;
@@ -7587,7 +7587,7 @@ static u64 perf_get_pgtable_size(struct mm_struct *mm, unsigned long addr)
if (pte_present(pte))
size = pte_leaf_size(pte);
pte_unmap(ptep);
-#endif /* CONFIG_HAVE_FAST_GUP */
+#endif /* CONFIG_HAVE_GUP_FAST */
return size;
}
diff --git a/mm/Kconfig b/mm/Kconfig
index f0ed3168db00..50df323eaece 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -473,7 +473,7 @@ config ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
config HAVE_MEMBLOCK_PHYS_MAP
bool
-config HAVE_FAST_GUP
+config HAVE_GUP_FAST
depends on MMU
bool
diff --git a/mm/gup.c b/mm/gup.c
index f1ac2c5a7f6d..929eb89c2e04 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -501,7 +501,7 @@ static inline void mm_set_has_pinned_flag(unsigned long *mm_flags)
#ifdef CONFIG_MMU
-#if defined(CONFIG_ARCH_HAS_HUGEPD) || defined(CONFIG_HAVE_FAST_GUP)
+#if defined(CONFIG_ARCH_HAS_HUGEPD) || defined(CONFIG_HAVE_GUP_FAST)
static int record_subpages(struct page *page, unsigned long sz,
unsigned long addr, unsigned long end,
struct page **pages)
@@ -515,7 +515,7 @@ static int record_subpages(struct page *page, unsigned long sz,
return nr;
}
-#endif /* CONFIG_ARCH_HAS_HUGEPD || CONFIG_HAVE_FAST_GUP */
+#endif /* CONFIG_ARCH_HAS_HUGEPD || CONFIG_HAVE_GUP_FAST */
#ifdef CONFIG_ARCH_HAS_HUGEPD
static unsigned long hugepte_addr_end(unsigned long addr, unsigned long end,
@@ -2785,7 +2785,7 @@ EXPORT_SYMBOL(get_user_pages_unlocked);
*
* This code is based heavily on the PowerPC implementation by Nick Piggin.
*/
-#ifdef CONFIG_HAVE_FAST_GUP
+#ifdef CONFIG_HAVE_GUP_FAST
/*
* Used in the GUP-fast path to determine whether GUP is permitted to work on
@@ -3364,7 +3364,7 @@ static inline void gup_fast_pgd_range(unsigned long addr, unsigned long end,
unsigned int flags, struct page **pages, int *nr)
{
}
-#endif /* CONFIG_HAVE_FAST_GUP */
+#endif /* CONFIG_HAVE_GUP_FAST */
#ifndef gup_fast_permitted
/*
@@ -3384,7 +3384,7 @@ static unsigned long gup_fast(unsigned long start, unsigned long end,
int nr_pinned = 0;
unsigned seq;
- if (!IS_ENABLED(CONFIG_HAVE_FAST_GUP) ||
+ if (!IS_ENABLED(CONFIG_HAVE_GUP_FAST) ||
!gup_fast_permitted(start, end))
return 0;
diff --git a/mm/internal.h b/mm/internal.h
index 3df06a152ff0..be432314af3e 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -1249,7 +1249,7 @@ static inline bool gup_must_unshare(struct vm_area_struct *vma,
}
/* Paired with a memory barrier in folio_try_share_anon_rmap_*(). */
- if (IS_ENABLED(CONFIG_HAVE_FAST_GUP))
+ if (IS_ENABLED(CONFIG_HAVE_GUP_FAST))
smp_rmb();
/*
--
2.44.0
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^ permalink raw reply related
* [RESEND PATCH v9 4/4] arm64: dts: st: add rcc support for STM32MP25
From: gabriel.fernandez @ 2024-04-02 12:53 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Maxime Coquelin, Alexandre Torgue, Philipp Zabel,
Gabriel Fernandez
Cc: linux-clk, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel
In-Reply-To: <20240402125312.277052-1-gabriel.fernandez@foss.st.com>
From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Add RCC support to manage clocks and resets on the STM32MP25.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 144 ++++++++++++++++++-------
arch/arm64/boot/dts/st/stm32mp255.dtsi | 4 +-
2 files changed, 110 insertions(+), 38 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 5dd4f3580a60..15b79d26d1c6 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -3,7 +3,9 @@
* Copyright (C) STMicroelectronics 2023 - All Rights Reserved
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
*/
+#include <dt-bindings/clock/st,stm32mp25-rcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/st,stm32mp25-rcc.h>
/ {
#address-cells = <2>;
@@ -35,34 +37,16 @@ arm_wdt: watchdog {
};
clocks {
- ck_flexgen_08: ck-flexgen-08 {
+ clk_dsi_txbyte: txbyteclk {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <100000000>;
+ clock-frequency = <0>;
};
- ck_flexgen_51: ck-flexgen-51 {
+ clk_rcbsec: clk-rcbsec {
#clock-cells = <0>;
compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_ls_mcu: ck-icn-ls-mcu {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_p_vdec: ck-icn-p-vdec {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_p_venc: ck-icn-p-venc {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
+ clock-frequency = <64000000>;
};
};
@@ -134,7 +118,7 @@ usart2: serial@400e0000 {
compatible = "st,stm32h7-uart";
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_flexgen_08>;
+ clocks = <&rcc CK_KER_USART2>;
status = "disabled";
};
@@ -143,8 +127,9 @@ sdmmc1: mmc@48220000 {
arm,primecell-periphid = <0x00353180>;
reg = <0x48220000 0x400>, <0x44230400 0x8>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_flexgen_51>;
+ clocks = <&rcc CK_KER_SDMMC1 >;
clock-names = "apb_pclk";
+ resets = <&rcc SDMMC1_R>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <120000000>;
@@ -168,6 +153,93 @@ package_otp@1e8 {
};
};
+ rcc: clock-controller@44200000 {
+ compatible = "st,stm32mp25-rcc";
+ reg = <0x44200000 0x10000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ clocks = <&scmi_clk CK_SCMI_HSE>,
+ <&scmi_clk CK_SCMI_HSI>,
+ <&scmi_clk CK_SCMI_MSI>,
+ <&scmi_clk CK_SCMI_LSE>,
+ <&scmi_clk CK_SCMI_LSI>,
+ <&scmi_clk CK_SCMI_HSE_DIV2>,
+ <&scmi_clk CK_SCMI_ICN_HS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_LS_MCU>,
+ <&scmi_clk CK_SCMI_ICN_SDMMC>,
+ <&scmi_clk CK_SCMI_ICN_DDR>,
+ <&scmi_clk CK_SCMI_ICN_DISPLAY>,
+ <&scmi_clk CK_SCMI_ICN_HSL>,
+ <&scmi_clk CK_SCMI_ICN_NIC>,
+ <&scmi_clk CK_SCMI_ICN_VID>,
+ <&scmi_clk CK_SCMI_FLEXGEN_07>,
+ <&scmi_clk CK_SCMI_FLEXGEN_08>,
+ <&scmi_clk CK_SCMI_FLEXGEN_09>,
+ <&scmi_clk CK_SCMI_FLEXGEN_10>,
+ <&scmi_clk CK_SCMI_FLEXGEN_11>,
+ <&scmi_clk CK_SCMI_FLEXGEN_12>,
+ <&scmi_clk CK_SCMI_FLEXGEN_13>,
+ <&scmi_clk CK_SCMI_FLEXGEN_14>,
+ <&scmi_clk CK_SCMI_FLEXGEN_15>,
+ <&scmi_clk CK_SCMI_FLEXGEN_16>,
+ <&scmi_clk CK_SCMI_FLEXGEN_17>,
+ <&scmi_clk CK_SCMI_FLEXGEN_18>,
+ <&scmi_clk CK_SCMI_FLEXGEN_19>,
+ <&scmi_clk CK_SCMI_FLEXGEN_20>,
+ <&scmi_clk CK_SCMI_FLEXGEN_21>,
+ <&scmi_clk CK_SCMI_FLEXGEN_22>,
+ <&scmi_clk CK_SCMI_FLEXGEN_23>,
+ <&scmi_clk CK_SCMI_FLEXGEN_24>,
+ <&scmi_clk CK_SCMI_FLEXGEN_25>,
+ <&scmi_clk CK_SCMI_FLEXGEN_26>,
+ <&scmi_clk CK_SCMI_FLEXGEN_27>,
+ <&scmi_clk CK_SCMI_FLEXGEN_28>,
+ <&scmi_clk CK_SCMI_FLEXGEN_29>,
+ <&scmi_clk CK_SCMI_FLEXGEN_30>,
+ <&scmi_clk CK_SCMI_FLEXGEN_31>,
+ <&scmi_clk CK_SCMI_FLEXGEN_32>,
+ <&scmi_clk CK_SCMI_FLEXGEN_33>,
+ <&scmi_clk CK_SCMI_FLEXGEN_34>,
+ <&scmi_clk CK_SCMI_FLEXGEN_35>,
+ <&scmi_clk CK_SCMI_FLEXGEN_36>,
+ <&scmi_clk CK_SCMI_FLEXGEN_37>,
+ <&scmi_clk CK_SCMI_FLEXGEN_38>,
+ <&scmi_clk CK_SCMI_FLEXGEN_39>,
+ <&scmi_clk CK_SCMI_FLEXGEN_40>,
+ <&scmi_clk CK_SCMI_FLEXGEN_41>,
+ <&scmi_clk CK_SCMI_FLEXGEN_42>,
+ <&scmi_clk CK_SCMI_FLEXGEN_43>,
+ <&scmi_clk CK_SCMI_FLEXGEN_44>,
+ <&scmi_clk CK_SCMI_FLEXGEN_45>,
+ <&scmi_clk CK_SCMI_FLEXGEN_46>,
+ <&scmi_clk CK_SCMI_FLEXGEN_47>,
+ <&scmi_clk CK_SCMI_FLEXGEN_48>,
+ <&scmi_clk CK_SCMI_FLEXGEN_49>,
+ <&scmi_clk CK_SCMI_FLEXGEN_50>,
+ <&scmi_clk CK_SCMI_FLEXGEN_51>,
+ <&scmi_clk CK_SCMI_FLEXGEN_52>,
+ <&scmi_clk CK_SCMI_FLEXGEN_53>,
+ <&scmi_clk CK_SCMI_FLEXGEN_54>,
+ <&scmi_clk CK_SCMI_FLEXGEN_55>,
+ <&scmi_clk CK_SCMI_FLEXGEN_56>,
+ <&scmi_clk CK_SCMI_FLEXGEN_57>,
+ <&scmi_clk CK_SCMI_FLEXGEN_58>,
+ <&scmi_clk CK_SCMI_FLEXGEN_59>,
+ <&scmi_clk CK_SCMI_FLEXGEN_60>,
+ <&scmi_clk CK_SCMI_FLEXGEN_61>,
+ <&scmi_clk CK_SCMI_FLEXGEN_62>,
+ <&scmi_clk CK_SCMI_FLEXGEN_63>,
+ <&scmi_clk CK_SCMI_ICN_APB1>,
+ <&scmi_clk CK_SCMI_ICN_APB2>,
+ <&scmi_clk CK_SCMI_ICN_APB3>,
+ <&scmi_clk CK_SCMI_ICN_APB4>,
+ <&scmi_clk CK_SCMI_ICN_APBDBG>,
+ <&scmi_clk CK_SCMI_TIMG1>,
+ <&scmi_clk CK_SCMI_TIMG2>,
+ <&scmi_clk CK_SCMI_PLL3>,
+ <&clk_dsi_txbyte>;
+ };
+
syscfg: syscon@44230000 {
compatible = "st,stm32mp25-syscfg", "syscon";
reg = <0x44230000 0x10000>;
@@ -186,7 +258,7 @@ gpioa: gpio@44240000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOA>;
st,bank-name = "GPIOA";
status = "disabled";
};
@@ -197,7 +269,7 @@ gpiob: gpio@44250000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x10000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOB>;
st,bank-name = "GPIOB";
status = "disabled";
};
@@ -208,7 +280,7 @@ gpioc: gpio@44260000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x20000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOC>;
st,bank-name = "GPIOC";
status = "disabled";
};
@@ -219,7 +291,7 @@ gpiod: gpio@44270000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x30000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOD>;
st,bank-name = "GPIOD";
status = "disabled";
};
@@ -230,7 +302,7 @@ gpioe: gpio@44280000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x40000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOE>;
st,bank-name = "GPIOE";
status = "disabled";
};
@@ -241,7 +313,7 @@ gpiof: gpio@44290000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x50000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOF>;
st,bank-name = "GPIOF";
status = "disabled";
};
@@ -252,7 +324,7 @@ gpiog: gpio@442a0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x60000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOG>;
st,bank-name = "GPIOG";
status = "disabled";
};
@@ -263,7 +335,7 @@ gpioh: gpio@442b0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x70000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOH>;
st,bank-name = "GPIOH";
status = "disabled";
};
@@ -274,7 +346,7 @@ gpioi: gpio@442c0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x80000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOI>;
st,bank-name = "GPIOI";
status = "disabled";
};
@@ -285,7 +357,7 @@ gpioj: gpio@442d0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x90000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOJ>;
st,bank-name = "GPIOJ";
status = "disabled";
};
@@ -296,7 +368,7 @@ gpiok: gpio@442e0000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0xa0000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOK>;
st,bank-name = "GPIOK";
status = "disabled";
};
@@ -315,7 +387,7 @@ gpioz: gpio@46200000 {
interrupt-controller;
#interrupt-cells = <2>;
reg = <0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&scmi_clk CK_SCMI_GPIOZ>;
st,bank-name = "GPIOZ";
st,bank-ioport = <11>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index 17f197c5b22b..d5175a1f339c 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -12,14 +12,14 @@ vdec: vdec@480d0000 {
compatible = "st,stm32mp25-vdec";
reg = <0x480d0000 0x3c8>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_icn_p_vdec>;
+ clocks = <&rcc CK_BUS_VDEC>;
};
venc: venc@480e0000 {
compatible = "st,stm32mp25-venc";
reg = <0x480e0000 0x800>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_icn_ls_mcu>;
+ clocks = <&rcc CK_BUS_VENC>;
};
};
};
--
2.25.1
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