* [PATCH net-next v2 05/15] net: stmmac: qcom-ethqos: move RGMII_CONFIG_DDR_MODE
From: Russell King (Oracle) @ 2026-03-27 8:43 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
In-Reply-To: <acZDEg9wdjhBTHlL@shell.armlinux.org.uk>
RGMII_CONFIG_DDR_MODE is always set irrespective of the speed. Move
this out of the switch.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index d19331067459..34d9a6b2d023 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -402,10 +402,10 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
return -EINVAL;
}
+ rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE, RGMII_IO_MACRO_CONFIG);
+
switch (speed) {
case SPEED_1000:
- rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,
- RGMII_IO_MACRO_CONFIG);
rgmii_clrmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,
RGMII_IO_MACRO_CONFIG);
rgmii_setmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,
@@ -443,8 +443,6 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
break;
case SPEED_100:
- rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,
- RGMII_IO_MACRO_CONFIG);
rgmii_setmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,
RGMII_IO_MACRO_CONFIG);
rgmii_clrmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,
@@ -481,8 +479,6 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
break;
case SPEED_10:
- rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,
- RGMII_IO_MACRO_CONFIG);
rgmii_setmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,
RGMII_IO_MACRO_CONFIG);
rgmii_clrmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,
--
2.47.3
^ permalink raw reply related
* [PATCH net-next v2 04/15] net: stmmac: qcom-ethqos: move detection of invalid RGMII speed
From: Russell King (Oracle) @ 2026-03-27 8:43 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
In-Reply-To: <acZDEg9wdjhBTHlL@shell.armlinux.org.uk>
Move detection of invalid RGMII speeds (which will never be triggered)
before the switch() to allow register modifications that are common to
all speeds to be moved out of the switch.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index f7e3a2b8803f..d19331067459 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -397,6 +397,11 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
/* Select RGMII, write 0 to interface select */
rgmii_clrmask(ethqos, RGMII_CONFIG_INTF_SEL, RGMII_IO_MACRO_CONFIG);
+ if (speed != SPEED_1000 && speed != SPEED_100 && speed != SPEED_10) {
+ dev_err(dev, "Invalid speed %d\n", speed);
+ return -EINVAL;
+ }
+
switch (speed) {
case SPEED_1000:
rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,
@@ -510,9 +515,6 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,
loopback, RGMII_IO_MACRO_CONFIG);
break;
- default:
- dev_err(dev, "Invalid speed %d\n", speed);
- return -EINVAL;
}
return 0;
--
2.47.3
^ permalink raw reply related
* [PATCH net-next v2 03/15] net: stmmac: qcom-ethqos: eliminate configure_func
From: Russell King (Oracle) @ 2026-03-27 8:43 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
In-Reply-To: <acZDEg9wdjhBTHlL@shell.armlinux.org.uk>
Since ethqos_fix_mac_speed() is called via a function pointer, and only
indirects via the configure_func function pointer, eliminate this
unnecessary indirection.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
.../stmicro/stmmac/dwmac-qcom-ethqos.c | 35 ++++++++-----------
1 file changed, 15 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index b9cfcf32cebc..f7e3a2b8803f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -100,9 +100,6 @@ struct ethqos_emac_driver_data {
struct qcom_ethqos {
struct platform_device *pdev;
void __iomem *rgmii_base;
- void (*configure_func)(struct qcom_ethqos *ethqos,
- phy_interface_t interface, int speed);
-
struct clk *link_clk;
struct phy *serdes_phy;
phy_interface_t phy_mode;
@@ -521,13 +518,17 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)
return 0;
}
-static void ethqos_configure_rgmii(struct qcom_ethqos *ethqos,
- phy_interface_t interface, int speed)
+static void ethqos_fix_mac_speed_rgmii(void *bsp_priv,
+ phy_interface_t interface, int speed,
+ unsigned int mode)
{
- struct device *dev = ðqos->pdev->dev;
+ struct qcom_ethqos *ethqos = bsp_priv;
+ struct device *dev;
unsigned int i;
u32 val;
+ dev = ðqos->pdev->dev;
+
/* Reset to POR values and enable clk */
for (i = 0; i < ethqos->num_rgmii_por; i++)
rgmii_writel(ethqos, ethqos->rgmii_por[i].value,
@@ -601,9 +602,12 @@ static void ethqos_pcs_set_inband(struct qcom_ethqos *ethqos, bool enable)
/* On interface toggle MAC registers gets reset.
* Configure MAC block for SGMII on ethernet phy link up
*/
-static void ethqos_configure_sgmii(struct qcom_ethqos *ethqos,
- phy_interface_t interface, int speed)
+static void ethqos_fix_mac_speed_sgmii(void *bsp_priv,
+ phy_interface_t interface, int speed,
+ unsigned int mode)
{
+ struct qcom_ethqos *ethqos = bsp_priv;
+
switch (speed) {
case SPEED_2500:
case SPEED_1000:
@@ -623,14 +627,6 @@ static void ethqos_configure_sgmii(struct qcom_ethqos *ethqos,
ethqos_pcs_set_inband(ethqos, interface == PHY_INTERFACE_MODE_SGMII);
}
-static void ethqos_fix_mac_speed(void *priv, phy_interface_t interface,
- int speed, unsigned int mode)
-{
- struct qcom_ethqos *ethqos = priv;
-
- ethqos->configure_func(ethqos, interface, speed);
-}
-
static int qcom_ethqos_serdes_powerup(struct net_device *ndev, void *priv)
{
struct qcom_ethqos *ethqos = priv;
@@ -687,7 +683,7 @@ static int ethqos_clks_config(void *priv, bool enabled)
/* Enable functional clock to prevent DMA reset to timeout due
* to lacking PHY clock after the hardware block has been power
* cycled. The actual configuration will be adjusted once
- * ethqos_fix_mac_speed() is invoked.
+ * ethqos' fix_mac_speed() method is invoked.
*/
qcom_ethqos_set_sgmii_loopback(ethqos, true);
ethqos_set_func_clk_en(ethqos);
@@ -753,11 +749,11 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
- ethqos->configure_func = ethqos_configure_rgmii;
+ plat_dat->fix_mac_speed = ethqos_fix_mac_speed_rgmii;
break;
case PHY_INTERFACE_MODE_2500BASEX:
case PHY_INTERFACE_MODE_SGMII:
- ethqos->configure_func = ethqos_configure_sgmii;
+ plat_dat->fix_mac_speed = ethqos_fix_mac_speed_sgmii;
plat_dat->mac_finish = ethqos_mac_finish_serdes;
break;
default:
@@ -805,7 +801,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
plat_dat->bsp_priv = ethqos;
plat_dat->set_clk_tx_rate = ethqos_set_clk_tx_rate;
- plat_dat->fix_mac_speed = ethqos_fix_mac_speed;
plat_dat->dump_debug_regs = rgmii_dump;
plat_dat->ptp_clk_freq_config = ethqos_ptp_clk_freq_config;
plat_dat->core_type = DWMAC_CORE_GMAC4;
--
2.47.3
^ permalink raw reply related
* [PATCH net-next v2 02/15] net: stmmac: qcom-ethqos: pass ethqos to ethqos_pcs_set_inband()
From: Russell King (Oracle) @ 2026-03-27 8:43 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
In-Reply-To: <acZDEg9wdjhBTHlL@shell.armlinux.org.uk>
Rather than getting the stmmac_priv pointer in
ethqos_configure_sgmii(), move it into ethqos_pcs_set_inband() and pass
the struct qcom_ethqos pointer instead.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
.../net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 502f2b184a87..b9cfcf32cebc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -590,8 +590,11 @@ static void ethqos_configure_rgmii(struct qcom_ethqos *ethqos,
ethqos_rgmii_macro_init(ethqos, speed);
}
-static void ethqos_pcs_set_inband(struct stmmac_priv *priv, bool enable)
+static void ethqos_pcs_set_inband(struct qcom_ethqos *ethqos, bool enable)
{
+ struct net_device *dev = platform_get_drvdata(ethqos->pdev);
+ struct stmmac_priv *priv = netdev_priv(dev);
+
stmmac_pcs_ctrl_ane(priv, enable, 0);
}
@@ -601,9 +604,6 @@ static void ethqos_pcs_set_inband(struct stmmac_priv *priv, bool enable)
static void ethqos_configure_sgmii(struct qcom_ethqos *ethqos,
phy_interface_t interface, int speed)
{
- struct net_device *dev = platform_get_drvdata(ethqos->pdev);
- struct stmmac_priv *priv = netdev_priv(dev);
-
switch (speed) {
case SPEED_2500:
case SPEED_1000:
@@ -620,7 +620,7 @@ static void ethqos_configure_sgmii(struct qcom_ethqos *ethqos,
break;
}
- ethqos_pcs_set_inband(priv, interface == PHY_INTERFACE_MODE_SGMII);
+ ethqos_pcs_set_inband(ethqos, interface == PHY_INTERFACE_MODE_SGMII);
}
static void ethqos_fix_mac_speed(void *priv, phy_interface_t interface,
--
2.47.3
^ permalink raw reply related
* [PATCH net-next v2 01/15] net: stmmac: qcom-ethqos: remove ethqos_configure()
From: Russell King (Oracle) @ 2026-03-27 8:43 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
In-Reply-To: <acZDEg9wdjhBTHlL@shell.armlinux.org.uk>
ethqos_configure() does nothing more than indirect via
ethqos->configure_func, and is only called from ethqos_fix_mac_speed()
just below. Move the indirect call into ethqos_fix_mac_speed().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 3ccf20fdf52a..502f2b184a87 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -623,18 +623,12 @@ static void ethqos_configure_sgmii(struct qcom_ethqos *ethqos,
ethqos_pcs_set_inband(priv, interface == PHY_INTERFACE_MODE_SGMII);
}
-static void ethqos_configure(struct qcom_ethqos *ethqos,
- phy_interface_t interface, int speed)
-{
- return ethqos->configure_func(ethqos, interface, speed);
-}
-
static void ethqos_fix_mac_speed(void *priv, phy_interface_t interface,
int speed, unsigned int mode)
{
struct qcom_ethqos *ethqos = priv;
- ethqos_configure(ethqos, interface, speed);
+ ethqos->configure_func(ethqos, interface, speed);
}
static int qcom_ethqos_serdes_powerup(struct net_device *ndev, void *priv)
--
2.47.3
^ permalink raw reply related
* [PATCH net-next v2 00/15] net: stmmac: qcom-ethqos: more cleanups
From: Russell King (Oracle) @ 2026-03-27 8:42 UTC (permalink / raw)
To: Andrew Lunn
Cc: Alexandre Torgue, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, linux-arm-kernel, linux-arm-msm, linux-stm32,
Mohd Ayaan Anwar, netdev, Paolo Abeni
Further cleanups to qcom-ethqos, mainly concentrating on the RGMII
code, making it clearer what the differences are for each speed, thus
making the code more readable.
I'm still not really happy with this. The speed specific configuration
remains split between ethqos_fix_mac_speed_rgmii() and
ethqos_rgmii_macro_init(), where the latter is only ever called from
the former. So, I think further work is needed here - maybe it needs
restructuring into the various componenet parts of the RGMII block?
v2:
- patch 2: fix typo in commit message
- patch 3: fix ethqos_fix_mac_speed() comment
.../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 220 ++++++++-------------
1 file changed, 87 insertions(+), 133 deletions(-)
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply
* [PATCH 1/2] arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
From: Canfeng Zhuang @ 2026-03-27 8:31 UTC (permalink / raw)
To: konradybcio, andersson
Cc: robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-arm-kernel
In-Reply-To: <20260327083101.1343613-1-canfeng.zhuang@oss.qualcomm.com>
The lemans-evk mezzanine connector supports a robot expansion board that
requires UART0, which is currently disabled. This prevents the expansion
board from exchanging data and control commands.
Enable UART0 and assign the serial2 alias to provide stable device
enumeration for the expansion board.
Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans-evk.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts
index 90fce947ca7e..1e9386677bf5 100644
--- a/arch/arm64/boot/dts/qcom/lemans-evk.dts
+++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts
@@ -21,6 +21,7 @@ aliases {
ethernet0 = ðernet0;
mmc1 = &sdhc;
serial0 = &uart10;
+ serial2 = &uart0;
};
dmic: audio-codec-0 {
@@ -870,6 +871,10 @@ usb_id: usb-id-state {
};
};
+&uart0 {
+ status = "okay";
+};
+
&uart10 {
compatible = "qcom,geni-debug-uart";
pinctrl-0 = <&qup_uart10_default>;
--
2.34.1
^ permalink raw reply related
* Re: (subset) [PATCH v3 0/4] iio: adc: meson-saradc: add support for Meson S4
From: Neil Armstrong @ 2026-03-27 8:31 UTC (permalink / raw)
To: khilman, martin.blumenstingl, jbrunet, jic23, dlechner, andy,
Nick Xie
Cc: krzk+dt, robh, conor+dt, linux-iio, linux-amlogic,
linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20260325070618.81955-1-nick@khadas.com>
Hi,
On Wed, 25 Mar 2026 15:06:14 +0800, Nick Xie wrote:
> This series adds support for the SARADC IP block found in the Amlogic
> Meson S4 (S905Y4) SoC and enables it for the Khadas VIM1S board to
> support the onboard ADC 'Function' key.
>
> There are no known hardware differences between the SARADC on the S4
> and the previous G12A generation. The S4 bindings utilize a fallback
> to G12A, but a dedicated driver match entry is included to ensure the
> correct part name is exposed to the userspace ABI.
>
> [...]
Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v7.1/arm64-dt)
[3/4] arm64: dts: amlogic: meson-s4: add internal SARADC controller
https://git.kernel.org/amlogic/c/3b095e9b3674da0666aea3021167ca44097ed7fa
[4/4] arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: add Function key support
https://git.kernel.org/amlogic/c/97c4d4b7de6ef264fbd45300a168c2a0874d6c75
These changes has been applied on the intermediate git tree [1].
The v7.1/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.
In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].
The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.
If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
--
Neil
^ permalink raw reply
* [PATCH 2/2] arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
From: Canfeng Zhuang @ 2026-03-27 8:31 UTC (permalink / raw)
To: konradybcio, andersson
Cc: robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-arm-kernel
In-Reply-To: <20260327083101.1343613-1-canfeng.zhuang@oss.qualcomm.com>
The monaco-evk mezzanine connector supports a robot expansion board that
requires UART6, which is currently disabled. This prevents the expansion
board from exchanging data and control commands.
Enable UART6 and assign the serial2 alias to provide stable device
enumeration for the expansion board.
Signed-off-by: Canfeng Zhuang <canfeng.zhuang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-evk.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 565418b86b2a..0b26861eac02 100644
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -21,6 +21,7 @@ aliases {
ethernet0 = ðernet0;
i2c1 = &i2c1;
serial0 = &uart7;
+ serial2 = &uart6;
};
chosen {
@@ -572,6 +573,10 @@ qup_i2c15_default: qup-i2c15-state {
};
};
+&uart6 {
+ status = "okay";
+};
+
&uart7 {
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH 0/2] arm64: dts: qcom: enable UARTs for robot expansion board
From: Canfeng Zhuang @ 2026-03-27 8:30 UTC (permalink / raw)
To: konradybcio, andersson
Cc: robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-arm-kernel
The Qualcomm Lemans EVK and Monaco EVK boards expose a mezzanine
connector used by a motor control expansion board.
This expansion board hosts an MCU running NuttX and communicates with
Linux over UART, with all protocol handling done in userspace.
This series enables the required UARTs and assigns stable serial aliases
to ensure consistent device enumeration across platforms.
Canfeng Zhuang (2):
arm64: dts: qcom: lemans-evk: enable UART0 for robot expansion board
arm64: dts: qcom: monaco-evk: enable UART6 for robot expansion board
arch/arm64/boot/dts/qcom/lemans-evk.dts | 5 +++++
arch/arm64/boot/dts/qcom/monaco-evk.dts | 5 +++++
2 files changed, 10 insertions(+)
base-commit: 46b513250491a7bfc97d98791dbe6a10bcc8129d
prerequisite-patch-id: a877aad0127409ffea7c0a7411968d336497b035
--
2.34.1
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: pwm: amlogic: Add new bindings for S6 S7 S7D
From: Krzysztof Kozlowski @ 2026-03-27 8:25 UTC (permalink / raw)
To: Xianwei Zhao
Cc: Uwe Kleine-König, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Heiner Kallweit, Neil Armstrong, Kevin Hilman,
Jerome Brunet, Martin Blumenstingl, linux-pwm, devicetree,
linux-kernel, linux-arm-kernel, linux-amlogic, Junyi Zhao
In-Reply-To: <20260326-s6-s7-pwm-v1-1-67e2f72b98bc@amlogic.com>
On Thu, Mar 26, 2026 at 06:35:38AM +0000, Xianwei Zhao wrote:
> + - items:
> + - enum:
> + - amlogic,s6-pwm
> + - amlogic,s7d-pwm
> + - const: amlogic,s7-pwm
> - items:
> - enum:
> - amlogic,meson8b-pwm-v2
> @@ -146,6 +152,20 @@ allOf:
> clock-names: false
> required:
> - clocks
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - amlogic,s7-pwm
> + then:
> + properties:
> + clocks:
> + items:
> + - description: input clock of PWM
so simpler: "maxItems: 1"
> + clock-names: false
> + required:
> + - clocks
>
> - if:
> properties:
> @@ -182,3 +202,10 @@ examples:
> clocks = <&pwm_src_a>, <&pwm_src_b>;
> #pwm-cells = <3>;
> };
> + - |
> + pwm@1000 {
> + compatible = "amlogic,s7-pwm";
You already have three examples, don't add more.
With these changes:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 0/3] Inline helpers into Rust without full LTO
From: Marek Szyprowski @ 2026-03-27 8:16 UTC (permalink / raw)
To: Arnd Bergmann, Miguel Ojeda, Robin Murphy, Danilo Krummrich,
Abdiel Janulgue, Daniel Almeida, Andreas Hindborg,
Christoph Hellwig
Cc: iommu, driver-core, acourbot, Andrew Morton, Alice Ryhl,
Anton Ivanov, Björn Roy Baron, Boqun Feng, David Gow,
Gary Guo, Johannes Berg, Justin Stitt, linux-arm-kernel,
linux-kbuild, linux-kernel, linux-mm, linux-um, Russell King,
llvm, Benno Lossin, Mark Rutland, mmaurer, Bill Wendling,
Nathan Chancellor, Nick Desaulniers, Nicolas Schier,
Nicolas Schier, Peter Zijlstra, Richard Weinberger,
rust-for-linux, Trevor Gross, Uladzislau Rezki (Sony),
Will Deacon, Geert Uytterhoeven
In-Reply-To: <7ad8bdf9-5eff-4443-ad15-c05355d793d1@app.fastmail.com>
On 26.03.2026 22:12, Arnd Bergmann wrote:
> On Sun, Mar 22, 2026, at 20:46, Miguel Ojeda wrote:
>> On Sun, 22 Mar 2026 20:21:59 +0100 Miguel Ojeda <ojeda@kernel.org> wrote:
>> BINDGEN rust/bindings/bindings_generated.rs - due to target
>> missing
>> In file included from rust/helpers/helpers.c:59:
>> rust/helpers/dma.c:17:2: warning: static function 'dma_free_attrs'
>> is used in an inline function with external linkage [-Wstatic-in-inline]
>> 17 | dma_free_attrs(dev, size, cpu_addr, dma_handle,
>> attrs);
>> | ^
>> rust/helpers/dma.c:12:1: note: use 'static' to give inline function
>> 'rust_helper_dma_free_attrs' internal linkage
>> 12 | __rust_helper void rust_helper_dma_free_attrs(struct device
>> *dev, size_t size,
>> | ^
>> | static
>>
>> For some reason, `dma_free_attrs` is not marked `inline` in
>> `include/linux/dma-mapping.h` to begin with, unlike the rest.
>>
>> Unless I am missing something and there is a reason for that, it looks
>> like it has just been missing since it was added in commit ed6ccf10f24b
>> ("dma-mapping: properly stub out the DMA API for !CONFIG_HAS_DMA").
>>
>> Do you want a patch?
> I have an older patch to drop CONFIG_NO_DMA entirely, which
> may be better here, since we know that nobody cares about the
> empty stubs.
The inline fix is already merged to v7.0-rc, but I'm fine with stubs
removal and I can queue them to -next. Could You send a proper patch
separately so I can easily apply it?
> The only targets that 'select NO_DMA' today are m68k (sun3
> and dragonball), sh2 and um, which are some of the targets
> that don't have any DMA masters, but there is little downside
> of enabling the DMA mapping interfaces on those as well.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
>
> diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
> index 11835eb59d94..19fb556357fc 100644
> --- a/arch/m68k/Kconfig
> +++ b/arch/m68k/Kconfig
> @@ -38,7 +38,6 @@ config M68K
> select MMU_GATHER_NO_RANGE if MMU
> select MODULES_USE_ELF_REL
> select MODULES_USE_ELF_RELA
> - select NO_DMA if !MMU && !COLDFIRE
> select OLD_SIGACTION
> select OLD_SIGSUSPEND3
> select UACCESS_MEMCPY if !MMU
> diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
> index c9a7e602d8a4..adc50396b87d 100644
> --- a/arch/m68k/Kconfig.cpu
> +++ b/arch/m68k/Kconfig.cpu
> @@ -38,7 +38,6 @@ config SUN3
> depends on MMU
> select HAVE_ARCH_PFN_VALID
> select LEGACY_TIMER_TICK
> - select NO_DMA
> select M68020
> help
> This option enables support for the Sun 3 series of workstations
> @@ -558,4 +557,4 @@ config COLDFIRE_COHERENT_DMA
> config M68K_NONCOHERENT_DMA
> bool
> default y
> - depends on HAS_DMA && !COLDFIRE_COHERENT_DMA
> + depends on HAS_DMA && !COLDFIRE_COHERENT_DMA && !SUN3
> diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
> index 7501ff030c63..d095ae6c19f9 100644
> --- a/arch/m68k/include/asm/pgtable_mm.h
> +++ b/arch/m68k/include/asm/pgtable_mm.h
> @@ -159,8 +159,10 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,
> ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \
> : (prot)))
>
> +#ifndef CONFIG_SUN3
> pgprot_t pgprot_dmacoherent(pgprot_t prot);
> #define pgprot_dmacoherent(prot) pgprot_dmacoherent(prot)
> +#endif
>
> #endif /* CONFIG_COLDFIRE */
> #endif /* !__ASSEMBLER__ */
> diff --git a/arch/m68k/kernel/dma.c b/arch/m68k/kernel/dma.c
> index 16063783aa80..c52584e024af 100644
> --- a/arch/m68k/kernel/dma.c
> +++ b/arch/m68k/kernel/dma.c
> @@ -8,7 +8,7 @@
> #include <linux/kernel.h>
> #include <asm/cacheflush.h>
>
> -#ifndef CONFIG_COLDFIRE
> +#if !defined(CONFIG_COLDFIRE) && !defined(CONFIG_SUN3)
> void arch_dma_prep_coherent(struct page *page, size_t size)
> {
> cache_push(page_to_phys(page), size);
> diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
> index d5795067befa..e246f295ec48 100644
> --- a/arch/sh/Kconfig
> +++ b/arch/sh/Kconfig
> @@ -63,7 +63,6 @@ config SUPERH
> select LOCK_MM_AND_FIND_VMA
> select MODULES_USE_ELF_RELA
> select NEED_SG_DMA_LENGTH
> - select NO_DMA if !MMU && !DMA_COHERENT
> select NO_GENERIC_PCI_IOPORT_MAP if PCI
> select OLD_SIGACTION
> select OLD_SIGSUSPEND
> @@ -133,10 +132,10 @@ config SWAP_IO_SPACE
> bool
>
> config DMA_COHERENT
> - bool
> + def_bool !MMU
>
> config DMA_NONCOHERENT
> - def_bool !NO_DMA && !DMA_COHERENT
> + def_bool !DMA_COHERENT
> select ARCH_HAS_DMA_PREP_COHERENT
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> select DMA_DIRECT_REMAP
> diff --git a/arch/um/Kconfig b/arch/um/Kconfig
> index 098cda44db22..dd3428a49614 100644
> --- a/arch/um/Kconfig
> +++ b/arch/um/Kconfig
> @@ -25,7 +25,6 @@ config UML
> select HAVE_DEBUG_KMEMLEAK
> select HAVE_DEBUG_BUGVERBOSE
> select HAVE_PAGE_SIZE_4KB
> - select NO_DMA if !UML_DMA_EMULATION
> select OF_EARLY_FLATTREE if OF
> select GENERIC_IRQ_SHOW
> select GENERIC_CPU_DEVICES
> diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> index 677c51ab7510..a96a22f857f1 100644
> --- a/include/linux/dma-mapping.h
> +++ b/include/linux/dma-mapping.h
> @@ -138,7 +138,6 @@ static inline void debug_dma_map_single(struct device *dev, const void *addr,
> }
> #endif /* CONFIG_DMA_API_DEBUG */
>
> -#ifdef CONFIG_HAS_DMA
> static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
> {
> debug_dma_mapping_error(dev, dma_addr);
> @@ -200,146 +199,6 @@ void *dma_vmap_noncontiguous(struct device *dev, size_t size,
> void dma_vunmap_noncontiguous(struct device *dev, void *vaddr);
> int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma,
> size_t size, struct sg_table *sgt);
> -#else /* CONFIG_HAS_DMA */
> -static inline dma_addr_t dma_map_page_attrs(struct device *dev,
> - struct page *page, size_t offset, size_t size,
> - enum dma_data_direction dir, unsigned long attrs)
> -{
> - return DMA_MAPPING_ERROR;
> -}
> -static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr,
> - size_t size, enum dma_data_direction dir, unsigned long attrs)
> -{
> -}
> -static inline dma_addr_t dma_map_phys(struct device *dev, phys_addr_t phys,
> - size_t size, enum dma_data_direction dir, unsigned long attrs)
> -{
> - return DMA_MAPPING_ERROR;
> -}
> -static inline void dma_unmap_phys(struct device *dev, dma_addr_t addr,
> - size_t size, enum dma_data_direction dir, unsigned long attrs)
> -{
> -}
> -static inline unsigned int dma_map_sg_attrs(struct device *dev,
> - struct scatterlist *sg, int nents, enum dma_data_direction dir,
> - unsigned long attrs)
> -{
> - return 0;
> -}
> -static inline void dma_unmap_sg_attrs(struct device *dev,
> - struct scatterlist *sg, int nents, enum dma_data_direction dir,
> - unsigned long attrs)
> -{
> -}
> -static inline int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
> - enum dma_data_direction dir, unsigned long attrs)
> -{
> - return -EOPNOTSUPP;
> -}
> -static inline dma_addr_t dma_map_resource(struct device *dev,
> - phys_addr_t phys_addr, size_t size, enum dma_data_direction dir,
> - unsigned long attrs)
> -{
> - return DMA_MAPPING_ERROR;
> -}
> -static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr,
> - size_t size, enum dma_data_direction dir, unsigned long attrs)
> -{
> -}
> -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
> -{
> - return -ENOMEM;
> -}
> -static inline void *dma_alloc_attrs(struct device *dev, size_t size,
> - dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs)
> -{
> - return NULL;
> -}
> -static inline void dma_free_attrs(struct device *dev, size_t size,
> - void *cpu_addr, dma_addr_t dma_handle, unsigned long attrs)
> -{
> -}
> -static inline void *dmam_alloc_attrs(struct device *dev, size_t size,
> - dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
> -{
> - return NULL;
> -}
> -static inline void dmam_free_coherent(struct device *dev, size_t size,
> - void *vaddr, dma_addr_t dma_handle)
> -{
> -}
> -static inline int dma_get_sgtable_attrs(struct device *dev,
> - struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr,
> - size_t size, unsigned long attrs)
> -{
> - return -ENXIO;
> -}
> -static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
> - void *cpu_addr, dma_addr_t dma_addr, size_t size,
> - unsigned long attrs)
> -{
> - return -ENXIO;
> -}
> -static inline bool dma_can_mmap(struct device *dev)
> -{
> - return false;
> -}
> -static inline bool dma_pci_p2pdma_supported(struct device *dev)
> -{
> - return false;
> -}
> -static inline int dma_set_mask(struct device *dev, u64 mask)
> -{
> - return -EIO;
> -}
> -static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
> -{
> - return -EIO;
> -}
> -static inline u64 dma_get_required_mask(struct device *dev)
> -{
> - return 0;
> -}
> -static inline bool dma_addressing_limited(struct device *dev)
> -{
> - return false;
> -}
> -static inline size_t dma_max_mapping_size(struct device *dev)
> -{
> - return 0;
> -}
> -static inline size_t dma_opt_mapping_size(struct device *dev)
> -{
> - return 0;
> -}
> -static inline unsigned long dma_get_merge_boundary(struct device *dev)
> -{
> - return 0;
> -}
> -static inline struct sg_table *dma_alloc_noncontiguous(struct device *dev,
> - size_t size, enum dma_data_direction dir, gfp_t gfp,
> - unsigned long attrs)
> -{
> - return NULL;
> -}
> -static inline void dma_free_noncontiguous(struct device *dev, size_t size,
> - struct sg_table *sgt, enum dma_data_direction dir)
> -{
> -}
> -static inline void *dma_vmap_noncontiguous(struct device *dev, size_t size,
> - struct sg_table *sgt)
> -{
> - return NULL;
> -}
> -static inline void dma_vunmap_noncontiguous(struct device *dev, void *vaddr)
> -{
> -}
> -static inline int dma_mmap_noncontiguous(struct device *dev,
> - struct vm_area_struct *vma, size_t size, struct sg_table *sgt)
> -{
> - return -EINVAL;
> -}
> -#endif /* CONFIG_HAS_DMA */
>
> #ifdef CONFIG_IOMMU_DMA
> /**
> diff --git a/kernel/dma/Kconfig b/kernel/dma/Kconfig
> index 0748091339f7..228a3566d344 100644
> --- a/kernel/dma/Kconfig
> +++ b/kernel/dma/Kconfig
> @@ -1,12 +1,7 @@
> # SPDX-License-Identifier: GPL-2.0-only
>
> -config NO_DMA
> - bool
> -
> config HAS_DMA
> - bool
> - depends on !NO_DMA
> - default y
> + def_bool y
>
> config DMA_OPS_HELPERS
> bool
>
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
^ permalink raw reply
* RE: [PATCH v2] PCI: imx6: Don't remove MSI capability For i.MX7D/i.MX8M
From: Hongxing Zhu @ 2026-03-27 8:12 UTC (permalink / raw)
To: Frank Li
Cc: l.stach@pengutronix.de, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org,
bhelgaas@google.com, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
In-Reply-To: <abwFVpxrriV7Bt2L@lizhi-Precision-Tower-5810>
> -----Original Message-----
> From: Frank Li <frank.li@nxp.com>
> Sent: 2026年3月19日 22:17
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; lpieralisi@kernel.org; kwilczynski@kernel.org;
> mani@kernel.org; robh@kernel.org; bhelgaas@google.com;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> imx@lists.linux.dev; linux-kernel@vger.kernel.org; stable@vger.kernel.org
> Subject: Re: [PATCH v2] PCI: imx6: Don't remove MSI capability For
> i.MX7D/i.MX8M
>
> On Thu, Mar 19, 2026 at 05:18:23PM +0800, Richard Zhu wrote:
> > The MSI trigger mechanism for endpoint devices connected to i.MX7D,
> > i.MX8MM, and i.MX8MQ PCIe root complex ports depends on the MSI
> > capability register settings in the root complex. Removing the MSI
> > capability breaks MSI functionality for these endpoints.
> >
> > Preserve the MSI capability for i.MX7D/i.MX8M PCIe root complex to
> > maintain MSI functionality.
> >
> > Cc: stable@vger.kernel.org
> > Fixes: f5cd8a929c825 ("PCI: dwc: Remove MSI/MSIX capability for Root
> > Port if iMSI-RX is used as MSI controller")
>
> I think it'd better add another varible to check in f5cd8a929c825 if
> (pp->has_msi_ctrl && !pp->xxx_broken) or direct use IP version, which
> already auto detected.
>
> Previous patch have not consider this old version controller.
Hi Frank:
From what I've observed, this behavior seems tied to the specific controller
design. For example, neither the i.MX6Q nor the i.MX6SX exhibit this issue.
The intention of commit f5cd8a929c825 is to remove the MSI capability from the
Root Complex (RC). From the author's perspective, this change should not
affect the Endpoint's (EP) MSI functionality.
I'm not sure do this check (pp->has_msi_ctrl && !pp->msi_broken) is proper or not.
Best Regards
Richard Zhu
>
> Frank
>
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> > v2 changes:
> > CC stable tree.
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 15 ++++++++++++++-
> > 1 file changed, 14 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 20dafd2710a3..0b0d6a210406 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -41,6 +41,7 @@
> > #define IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE BIT(11)
> > #define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12)
> > #define IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE GENMASK(11, 8)
> > +#define IMX8MM_PCIE_MSI_CAP_OFFSET 0x50
> >
> > #define IMX95_PCIE_PHY_GEN_CTRL 0x0
> > #define IMX95_PCIE_REF_USE_PAD BIT(17)
> > @@ -117,6 +118,7 @@ enum imx_pcie_variants {
> > #define IMX_PCIE_FLAG_HAS_LUT BIT(10)
> > #define IMX_PCIE_FLAG_8GT_ECN_ERR051586 BIT(11)
> > #define IMX_PCIE_FLAG_SKIP_L23_READY BIT(12)
> > +#define IMX_PCIE_FLAG_KEEP_MSI_CAP BIT(13)
> >
> > #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
> >
> > @@ -976,10 +978,17 @@ static int imx_pcie_start_link(struct dw_pcie
> > *pci) {
> > struct imx_pcie *imx_pcie = to_imx_pcie(pci);
> > struct device *dev = pci->dev;
> > - u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
> > + u8 offset;
> > u32 tmp;
> > int ret;
> >
> > + if (imx_pcie->drvdata->flags & IMX_PCIE_FLAG_KEEP_MSI_CAP) {
> > + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_PM);
> > + dw_pcie_dbi_ro_wr_en(pci);
> > + dw_pcie_writeb_dbi(pci, offset + 1,
> IMX8MM_PCIE_MSI_CAP_OFFSET);
> > + dw_pcie_dbi_ro_wr_dis(pci);
> > + }
> > +
> > if (!(imx_pcie->drvdata->flags &
> > IMX_PCIE_FLAG_SPEED_CHANGE_WORKAROUND)) {
> > imx_pcie_ltssm_enable(dev);
> > @@ -991,6 +1000,7 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
> > * started in Gen2 mode, there is a possibility the devices on the
> > * bus will not be detected at all. This happens with PCIe switches.
> > */
> > + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
> > dw_pcie_dbi_ro_wr_en(pci);
> > tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
> > tmp &= ~PCI_EXP_LNKCAP_SLS;
> > @@ -1897,6 +1907,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> > [IMX7D] = {
> > .variant = IMX7D,
> > .flags = IMX_PCIE_FLAG_SUPPORTS_SUSPEND |
> > + IMX_PCIE_FLAG_KEEP_MSI_CAP |
> > IMX_PCIE_FLAG_HAS_APP_RESET |
> > IMX_PCIE_FLAG_SKIP_L23_READY |
> > IMX_PCIE_FLAG_HAS_PHY_RESET,
> > @@ -1909,6 +1920,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> > [IMX8MQ] = {
> > .variant = IMX8MQ,
> > .flags = IMX_PCIE_FLAG_HAS_APP_RESET |
> > + IMX_PCIE_FLAG_KEEP_MSI_CAP |
> > IMX_PCIE_FLAG_HAS_PHY_RESET |
> > IMX_PCIE_FLAG_SUPPORTS_SUSPEND,
> > .gpr = "fsl,imx8mq-iomuxc-gpr",
> > @@ -1923,6 +1935,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> > [IMX8MM] = {
> > .variant = IMX8MM,
> > .flags = IMX_PCIE_FLAG_SUPPORTS_SUSPEND |
> > + IMX_PCIE_FLAG_KEEP_MSI_CAP |
> > IMX_PCIE_FLAG_HAS_PHYDRV |
> > IMX_PCIE_FLAG_HAS_APP_RESET,
> > .gpr = "fsl,imx8mm-iomuxc-gpr",
> > --
> > 2.37.1
> >
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: thermal: st,thermal-spear1340: convert to dtschema
From: Krzysztof Kozlowski @ 2026-03-27 8:06 UTC (permalink / raw)
To: Gopi Krishna Menon
Cc: rafael, daniel.lezcano, rui.zhang, lukasz.luba, robh, krzk+dt,
vireshk, conor+dt, linux-pm, devicetree, linux-kernel,
linux-arm-kernel, soc, daniel.baluta, simona.toaca, d-gole,
m-chawdhry
In-Reply-To: <20260324-belligerent-armadillo-of-camouflage-e52f7b@quoll>
On 24/03/2026 10:30, Krzysztof Kozlowski wrote:
> On Mon, Mar 23, 2026 at 07:08:08PM +0530, Gopi Krishna Menon wrote:
>> +properties:
>> + compatible:
>> + const: st,thermal-spear1340
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + st,thermal-flags:
>> + description: flags used to enable thermal sensor
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - st,thermal-flags
>> +
>> +unevaluatedProperties: false
>
> additionalProperties: true
Thanks for pinging me on IRC about this - it should be:
additionalProperties: false
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 0/3] Inline helpers into Rust without full LTO
From: Miguel Ojeda @ 2026-03-27 8:02 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Miguel Ojeda, Marek Szyprowski, Robin Murphy, Danilo Krummrich,
Abdiel Janulgue, Daniel Almeida, Andreas Hindborg,
Christoph Hellwig, iommu, driver-core, acourbot, Andrew Morton,
Alice Ryhl, Anton Ivanov, Björn Roy Baron, Boqun Feng,
David Gow, Gary Guo, Johannes Berg, Justin Stitt,
linux-arm-kernel, linux-kbuild, linux-kernel, linux-mm, linux-um,
Russell King, llvm, Benno Lossin, Mark Rutland, mmaurer,
Bill Wendling, Nathan Chancellor, Nick Desaulniers,
Nicolas Schier, Nicolas Schier, Peter Zijlstra,
Richard Weinberger, rust-for-linux, Trevor Gross,
Uladzislau Rezki (Sony), Will Deacon, Geert Uytterhoeven
In-Reply-To: <7ad8bdf9-5eff-4443-ad15-c05355d793d1@app.fastmail.com>
On Thu, Mar 26, 2026 at 10:13 PM Arnd Bergmann <arnd@arndb.de> wrote:
>
> I have an older patch to drop CONFIG_NO_DMA entirely, which
> may be better here, since we know that nobody cares about the
> empty stubs.
In case it helps / for future reference: the patch I sent to Marek is
already in mainline: commit 2cdaff22ed26 ("dma-mapping: add missing
`inline` for `dma_free_attrs`").
Cheers,
Miguel
^ permalink raw reply
* Re: [GIT PULL] Qualcomm Arm64 DeviceTree fixes for v7.0
From: Krzysztof Kozlowski @ 2026-03-27 8:01 UTC (permalink / raw)
To: Bjorn Andersson, arm, soc
Cc: linux-arm-msm, linux-arm-kernel, Arnd Bergmann, Sumit Garg,
Loic Poulain, Daniel J Blueman, Ravi Hothi
In-Reply-To: <20260326133845.66761-1-andersson@kernel.org>
On 26/03/2026 14:38, Bjorn Andersson wrote:
>
> ----------------------------------------------------------------
> Daniel J Blueman (1):
> arm64: dts: qcom: hamoa/x1: fix idle exit latency
>
> Loic Poulain (2):
> arm64: dts: qcom: monaco: Fix UART10 pinconf
> arm64: dts: qcom: monaco: Reserve full Gunyah metadata region
>
> Ravi Hothi (1):
> arm64: dts: qcom: qcm6490-idp: Fix WCD9370 reset GPIO polarity
>
> Sumit Garg (3):
> dt-bindings: display: msm: qcm2290-mdss: Fix iommus property
This introduces a known warning, which I already reported and pinged you
TWICE on IRC, including yesterday. I did not indicate that my fix is for
current cycle, because I did not know that troubling commit is part of
the fixes branch.
No, I am not taking a known warning without fix, especially that the fix
is right there.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH 3/4] module, m68k: force sh_addr=0 for arch-specific sections
From: Petr Pavlu @ 2026-03-27 7:59 UTC (permalink / raw)
To: Russell King, Catalin Marinas, Will Deacon, Geert Uytterhoeven,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Sami Tolvanen
Cc: Alexandre Ghiti, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Aaron Tomlin, Joe Lawrence, linux-arm-kernel, linux-m68k,
linux-riscv, linux-modules, linux-kernel
In-Reply-To: <20260327080023.861105-1-petr.pavlu@suse.com>
When linking modules with 'ld.bfd -r', sections defined without an address
inherit the location counter, resulting in non-zero sh_addr values in the
resulting .ko files. Relocatable objects are expected to have sh_addr=0 for
all sections. Non-zero addresses are confusing in this context, typically
worse compressible, and may cause tools to misbehave [1].
Force sh_addr=0 for all m68k-specific module sections.
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33958 [1]
Signed-off-by: Petr Pavlu <petr.pavlu@suse.com>
---
arch/m68k/include/asm/module.lds.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/m68k/include/asm/module.lds.h b/arch/m68k/include/asm/module.lds.h
index fda94fa38243..fcd08689b282 100644
--- a/arch/m68k/include/asm/module.lds.h
+++ b/arch/m68k/include/asm/module.lds.h
@@ -1,5 +1,5 @@
SECTIONS {
- .m68k_fixup : {
+ .m68k_fixup 0 : {
__start_fixup = .;
*(.m68k_fixup)
__stop_fixup = .;
--
2.53.0
^ permalink raw reply related
* [PATCH 4/4] module, riscv: force sh_addr=0 for arch-specific sections
From: Petr Pavlu @ 2026-03-27 7:59 UTC (permalink / raw)
To: Russell King, Catalin Marinas, Will Deacon, Geert Uytterhoeven,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Sami Tolvanen
Cc: Alexandre Ghiti, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Aaron Tomlin, Joe Lawrence, linux-arm-kernel, linux-m68k,
linux-riscv, linux-modules, linux-kernel
In-Reply-To: <20260327080023.861105-1-petr.pavlu@suse.com>
When linking modules with 'ld.bfd -r', sections defined without an address
inherit the location counter, resulting in non-zero sh_addr values in the
resulting .ko files. Relocatable objects are expected to have sh_addr=0 for
all sections. Non-zero addresses are confusing in this context, typically
worse compressible, and may cause tools to misbehave [1].
Force sh_addr=0 for all riscv-specific module sections.
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33958 [1]
Signed-off-by: Petr Pavlu <petr.pavlu@suse.com>
---
arch/riscv/include/asm/module.lds.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/include/asm/module.lds.h b/arch/riscv/include/asm/module.lds.h
index 1075beae1ac6..9ced27c8ccb6 100644
--- a/arch/riscv/include/asm/module.lds.h
+++ b/arch/riscv/include/asm/module.lds.h
@@ -2,8 +2,8 @@
/* Copyright (C) 2017 Andes Technology Corporation */
#ifdef CONFIG_MODULE_SECTIONS
SECTIONS {
- .plt : { BYTE(0) }
- .got : { BYTE(0) }
- .got.plt : { BYTE(0) }
+ .plt 0 : { BYTE(0) }
+ .got 0 : { BYTE(0) }
+ .got.plt 0 : { BYTE(0) }
}
#endif
--
2.53.0
^ permalink raw reply related
* [PATCH 2/4] module, arm64: force sh_addr=0 for arch-specific sections
From: Petr Pavlu @ 2026-03-27 7:59 UTC (permalink / raw)
To: Russell King, Catalin Marinas, Will Deacon, Geert Uytterhoeven,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Sami Tolvanen
Cc: Alexandre Ghiti, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Aaron Tomlin, Joe Lawrence, linux-arm-kernel, linux-m68k,
linux-riscv, linux-modules, linux-kernel
In-Reply-To: <20260327080023.861105-1-petr.pavlu@suse.com>
When linking modules with 'ld.bfd -r', sections defined without an address
inherit the location counter, resulting in non-zero sh_addr values in the
resulting .ko files. Relocatable objects are expected to have sh_addr=0 for
all sections. Non-zero addresses are confusing in this context, typically
worse compressible, and may cause tools to misbehave [1].
Force sh_addr=0 for all arm64-specific module sections.
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33958 [1]
Signed-off-by: Petr Pavlu <petr.pavlu@suse.com>
---
Note that the definition of .text.hot hasn't matched any input sections
since commit 1ba9f8979426 ("vmlinux.lds: Unify TEXT_MAIN, DATA_MAIN, and
related macros"), and even before that with CONFIG_LTO_CLANG=y.
The preceding comment also explains that the directive is necessary to
merge section groups. However, this approach seems suboptimal. A better
method would be to link modules using --force-group-allocation to retain
only one copy of each group.
I plan to look at this separately.
---
arch/arm64/include/asm/module.lds.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/module.lds.h b/arch/arm64/include/asm/module.lds.h
index fb944b46846d..0b3aacd22c59 100644
--- a/arch/arm64/include/asm/module.lds.h
+++ b/arch/arm64/include/asm/module.lds.h
@@ -14,7 +14,7 @@ SECTIONS {
* directive to force them into a single section and silence the
* warning.
*/
- .text.hot : { *(.text.hot) }
+ .text.hot 0 : { *(.text.hot) }
#endif
#ifdef CONFIG_UNWIND_TABLES
@@ -22,6 +22,6 @@ SECTIONS {
* Currently, we only use unwind info at module load time, so we can
* put it into the .init allocation.
*/
- .init.eh_frame : { *(.eh_frame) }
+ .init.eh_frame 0 : { *(.eh_frame) }
#endif
}
--
2.53.0
^ permalink raw reply related
* [PATCH 1/4] module, arm: force sh_addr=0 for arch-specific sections
From: Petr Pavlu @ 2026-03-27 7:59 UTC (permalink / raw)
To: Russell King, Catalin Marinas, Will Deacon, Geert Uytterhoeven,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Sami Tolvanen
Cc: Alexandre Ghiti, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Aaron Tomlin, Joe Lawrence, linux-arm-kernel, linux-m68k,
linux-riscv, linux-modules, linux-kernel
In-Reply-To: <20260327080023.861105-1-petr.pavlu@suse.com>
When linking modules with 'ld.bfd -r', sections defined without an address
inherit the location counter, resulting in non-zero sh_addr values in the
resulting .ko files. Relocatable objects are expected to have sh_addr=0 for
all sections. Non-zero addresses are confusing in this context, typically
worse compressible, and may cause tools to misbehave [1].
Force sh_addr=0 for all arm-specific module sections.
Link: https://sourceware.org/bugzilla/show_bug.cgi?id=33958 [1]
Signed-off-by: Petr Pavlu <petr.pavlu@suse.com>
---
arch/arm/include/asm/module.lds.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/module.lds.h b/arch/arm/include/asm/module.lds.h
index 0e7cb4e314b4..f9ad774b2889 100644
--- a/arch/arm/include/asm/module.lds.h
+++ b/arch/arm/include/asm/module.lds.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifdef CONFIG_ARM_MODULE_PLTS
SECTIONS {
- .plt : { BYTE(0) }
- .init.plt : { BYTE(0) }
+ .plt 0 : { BYTE(0) }
+ .init.plt 0 : { BYTE(0) }
}
#endif
--
2.53.0
^ permalink raw reply related
* [PATCH 0/4] module: force sh_addr=0 for arch-specific sections
From: Petr Pavlu @ 2026-03-27 7:58 UTC (permalink / raw)
To: Russell King, Catalin Marinas, Will Deacon, Geert Uytterhoeven,
Paul Walmsley, Palmer Dabbelt, Albert Ou, Sami Tolvanen
Cc: Alexandre Ghiti, Luis Chamberlain, Petr Pavlu, Daniel Gomez,
Aaron Tomlin, Joe Lawrence, linux-arm-kernel, linux-m68k,
linux-riscv, linux-modules, linux-kernel
When linking modules with 'ld.bfd -r', sections defined without an address
inherit the location counter, resulting in non-zero sh_addr values in the
resulting .ko files. Relocatable objects are expected to have sh_addr=0 for
all sections. Non-zero addresses are confusing in this context, typically
worse compressible, and may cause tools to misbehave [1].
Joe Lawrence previously addressed the same issue in the main
scripts/module.lds.S file [2] and we discussed that the same fix should be
also applied to architecture-specific module sections. This series
implements these changes.
The series can later be merged through the modules tree, or individual
patches can be applied through the architecture-specific trees.
[1] https://sourceware.org/bugzilla/show_bug.cgi?id=33958
[2] https://lore.kernel.org/linux-modules/20260305015237.299727-1-joe.lawrence@redhat.com/
Petr Pavlu (4):
module, arm: force sh_addr=0 for arch-specific sections
module, arm64: force sh_addr=0 for arch-specific sections
module, m68k: force sh_addr=0 for arch-specific sections
module, riscv: force sh_addr=0 for arch-specific sections
arch/arm/include/asm/module.lds.h | 4 ++--
arch/arm64/include/asm/module.lds.h | 4 ++--
arch/m68k/include/asm/module.lds.h | 2 +-
arch/riscv/include/asm/module.lds.h | 6 +++---
4 files changed, 8 insertions(+), 8 deletions(-)
base-commit: c369299895a591d96745d6492d4888259b004a9e
--
2.53.0
^ permalink raw reply
* Re: [PATCH v2 0/3] Inline helpers into Rust without full LTO
From: Geert Uytterhoeven @ 2026-03-27 7:56 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Russell King, Christian Schrefl, Miguel Ojeda, Alice Ryhl,
Ard Biesheuvel, Jamie Cunliffe, Will Deacon, Catalin Marinas,
Miguel Ojeda, Andreas Hindborg, acourbot, Andrew Morton,
Anton Ivanov, Björn Roy Baron, Boqun Feng, Danilo Krummrich,
David Gow, Gary Guo, Johannes Berg, Justin Stitt,
linux-arm-kernel, linux-kbuild, linux-kernel, linux-mm, linux-um,
llvm, Benno Lossin, Mark Rutland, mmaurer, Bill Wendling,
Nathan Chancellor, Nick Desaulniers, Nicolas Schier,
Nicolas Schier, Peter Zijlstra, Richard Weinberger,
rust-for-linux, Trevor Gross, Uladzislau Rezki (Sony),
John Paul Adrian Glaubitz
In-Reply-To: <641592e3-2354-4238-9eb8-a1f5c2a13126@app.fastmail.com>
Hi Arnd,
On Thu, 26 Mar 2026 at 22:34, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thu, Mar 26, 2026, at 16:18, Russell King (Oracle) wrote:
> > On Thu, Mar 26, 2026 at 03:31:26PM +0100, Christian Schrefl wrote:
> >> On 3/26/26 2:47 PM, Miguel Ojeda wrote:
> >> > On Thu, Mar 26, 2026 at 11:10 AM Alice Ryhl <aliceryhl@google.com> wrote:
> >
> > I'm not sure if this is still true, but I believe it used to be the case
> > that the -linux-gnueabi target has one behaviour for enums (fixed size)
> > whereas -none-eabi, the size of the type depends on the range of values
> > included in the enum.
>
> I checked Debian's arm-none-eabi-gcc, which indeed still has this behavior:
>
> $ echo 'enum { A, B } x = sizeof(x);' | arm-none-eabi-gcc -xc - -O2 -o- -S | grep -A1 x:
> x:
> .byte 1
>
> and I see the same thing for the hexagon target in clang, but none
> of the other targets that Linux runs on. In particular, clang always
> behaves like linux-gnueabi even when targeting plain eabi.
>
> $ echo 'enum { A, B } x = sizeof(x);' | clang --target=arm-none-eabi -xc - -O2 -o- -S | grep -A1 x:
> x:
> .long 4
>
> I noticed a similar issue with m68k-linux, which has a bitfield
> alignment different from anything else on gcc, but uses the normal
> behavior on clang.
Ugh, I wasn't aware of that. Adrian, did you know?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH] arm64/kvm: Enable eager hugepage splitting if HDBSS is available
From: Tian Zheng @ 2026-03-27 7:40 UTC (permalink / raw)
To: Leonardo Bras
Cc: maz, oupton, catalin.marinas, corbet, pbonzini, will, yuzenghui,
wangzhou1, liuyonglong, Jonathan.Cameron, yezhenyu2, linuxarm,
joey.gouly, kvmarm, kvm, linux-arm-kernel, linux-doc,
linux-kernel, skhan, suzuki.poulose
In-Reply-To: <acQna2hLwdr1juTN@devkitleo>
On 3/26/2026 2:20 AM, Leonardo Bras wrote:
> FEAT_HDBSS speeds up guest memory dirty tracking by avoiding a page fault
> and saving the entry in a tracking structure.
>
> That may be a problem when we have guest memory backed by hugepages or
> transparent huge pages, as it's not possible to do on-demand hugepage
> splitting, relying only on eager hugepage splitting.
>
> So, at stage2 initialization, enable eager hugepage splitting with
> chunk = PAGE_SIZE if the system supports HDBSS.
>
> Signed-off-by: Leonardo Bras <leo.bras@arm.com>
> ---
> arch/arm64/kvm/mmu.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index 070a01e53fcb..bdfa72b7c073 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -993,22 +993,26 @@ int kvm_init_stage2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu, unsigned long t
>
> mmu->last_vcpu_ran = alloc_percpu(typeof(*mmu->last_vcpu_ran));
> if (!mmu->last_vcpu_ran) {
> err = -ENOMEM;
> goto out_destroy_pgtable;
> }
>
> for_each_possible_cpu(cpu)
> *per_cpu_ptr(mmu->last_vcpu_ran, cpu) = -1;
>
> - /* The eager page splitting is disabled by default */
> - mmu->split_page_chunk_size = KVM_ARM_EAGER_SPLIT_CHUNK_SIZE_DEFAULT;
> + /* The eager page splitting is disabled by default if system has no HDBSS */
> + if (system_supports_hacdbs())
> + mmu->split_page_chunk_size = PAGE_SIZE;
> + else
> + mmu->split_page_chunk_size = KVM_ARM_EAGER_SPLIT_CHUNK_SIZE_DEFAULT;
> +
> mmu->split_page_cache.gfp_zero = __GFP_ZERO;
>
> mmu->pgd_phys = __pa(pgt->pgd);
>
> if (kvm_is_nested_s2_mmu(kvm, mmu))
> kvm_init_nested_s2_mmu(mmu);
>
> return 0;
>
> out_destroy_pgtable:
Thanks again for sending this patch. I'll integrate it into the next
version and run some tests.
^ permalink raw reply
* Re: [PATCH v3 4/5] KVM: arm64: Enable HDBSS support and handle HDBSSF events
From: Tian Zheng @ 2026-03-27 7:35 UTC (permalink / raw)
To: Leonardo Bras
Cc: maz, oupton, catalin.marinas, corbet, pbonzini, will, yuzenghui,
wangzhou1, liuyonglong, Jonathan.Cameron, yezhenyu2, linuxarm,
joey.gouly, kvmarm, kvm, linux-arm-kernel, linux-doc,
linux-kernel, skhan, suzuki.poulose
In-Reply-To: <acQj5grOdZT8LUGp@devkitleo>
On 3/26/2026 2:05 AM, Leonardo Bras wrote:
> Hello Tian,
>
> I am currently working on HACDBS enablement(which will be rebased on top of
> this patchset) and due to the fact HACDBS and HDBSS are kind of
> complementary I will sometimes come with some questions for issues I have
> faced myself on that part. :)
>
> (see below)
Of course! Happy to exchange ideas and learn together.
>
> On Wed, Feb 25, 2026 at 12:04:20PM +0800, Tian Zheng wrote:
>> From: eillon <yezhenyu2@huawei.com>
>>
>> HDBSS is enabled via an ioctl from userspace (e.g. QEMU) at the start of
>> migration. This feature is only supported in VHE mode.
>>
>> Initially, S2 PTEs doesn't contain the DBM attribute. During migration,
>> write faults are handled by user_mem_abort, which relaxes permissions
>> and adds the DBM bit when HDBSS is active. Once DBM is set, subsequent
>> writes no longer trap, as the hardware automatically transitions the page
>> from writable-clean to writable-dirty.
>>
>> KVM does not scan S2 page tables to consume DBM. Instead, when HDBSS is
>> enabled, the hardware observes the clean->dirty transition and records
>> the corresponding page into the HDBSS buffer.
>>
>> During sync_dirty_log, KVM kicks all vCPUs to force VM-Exit, ensuring
>> that check_vcpu_requests flushes the HDBSS buffer and propagates the
>> accumulated dirty information into the userspace-visible dirty bitmap.
>>
>> Add fault handling for HDBSS including buffer full, external abort, and
>> general protection fault (GPF).
>>
>> Signed-off-by: eillon <yezhenyu2@huawei.com>
>> Signed-off-by: Tian Zheng <zhengtian10@huawei.com>
>> ---
>> arch/arm64/include/asm/esr.h | 5 ++
>> arch/arm64/include/asm/kvm_host.h | 17 +++++
>> arch/arm64/include/asm/kvm_mmu.h | 1 +
>> arch/arm64/include/asm/sysreg.h | 11 ++++
>> arch/arm64/kvm/arm.c | 102 ++++++++++++++++++++++++++++++
>> arch/arm64/kvm/hyp/vhe/switch.c | 19 ++++++
>> arch/arm64/kvm/mmu.c | 70 ++++++++++++++++++++
>> arch/arm64/kvm/reset.c | 3 +
>> 8 files changed, 228 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
>> index 81c17320a588..2e6b679b5908 100644
>> --- a/arch/arm64/include/asm/esr.h
>> +++ b/arch/arm64/include/asm/esr.h
>> @@ -437,6 +437,11 @@
>> #ifndef __ASSEMBLER__
>> #include <asm/types.h>
>>
>> +static inline bool esr_iss2_is_hdbssf(unsigned long esr)
>> +{
>> + return ESR_ELx_ISS2(esr) & ESR_ELx_HDBSSF;
>> +}
>> +
>> static inline unsigned long esr_brk_comment(unsigned long esr)
>> {
>> return esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
>> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
>> index 5d5a3bbdb95e..57ee6b53e061 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -55,12 +55,17 @@
>> #define KVM_REQ_GUEST_HYP_IRQ_PENDING KVM_ARCH_REQ(9)
>> #define KVM_REQ_MAP_L1_VNCR_EL2 KVM_ARCH_REQ(10)
>> #define KVM_REQ_VGIC_PROCESS_UPDATE KVM_ARCH_REQ(11)
>> +#define KVM_REQ_FLUSH_HDBSS KVM_ARCH_REQ(12)
>>
>> #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
>> KVM_DIRTY_LOG_INITIALLY_SET)
>>
>> #define KVM_HAVE_MMU_RWLOCK
>>
>> +/* HDBSS entry field definitions */
>> +#define HDBSS_ENTRY_VALID BIT(0)
>> +#define HDBSS_ENTRY_IPA GENMASK_ULL(55, 12)
>> +
>> /*
>> * Mode of operation configurable with kvm-arm.mode early param.
>> * See Documentation/admin-guide/kernel-parameters.txt for more information.
>> @@ -84,6 +89,7 @@ int __init kvm_arm_init_sve(void);
>> u32 __attribute_const__ kvm_target_cpu(void);
>> void kvm_reset_vcpu(struct kvm_vcpu *vcpu);
>> void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu);
>> +void kvm_arm_vcpu_free_hdbss(struct kvm_vcpu *vcpu);
>>
>> struct kvm_hyp_memcache {
>> phys_addr_t head;
>> @@ -405,6 +411,8 @@ struct kvm_arch {
>> * the associated pKVM instance in the hypervisor.
>> */
>> struct kvm_protected_vm pkvm;
>> +
>> + bool enable_hdbss;
>> };
>>
>> struct kvm_vcpu_fault_info {
>> @@ -816,6 +824,12 @@ struct vcpu_reset_state {
>> bool reset;
>> };
>>
>> +struct vcpu_hdbss_state {
>> + phys_addr_t base_phys;
>> + u32 size;
>> + u32 next_index;
>> +};
>> +
>> struct vncr_tlb;
>>
>> struct kvm_vcpu_arch {
>> @@ -920,6 +934,9 @@ struct kvm_vcpu_arch {
>>
>> /* Per-vcpu TLB for VNCR_EL2 -- NULL when !NV */
>> struct vncr_tlb *vncr_tlb;
>> +
>> + /* HDBSS registers info */
>> + struct vcpu_hdbss_state hdbss;
>> };
>>
>> /*
>> diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
>> index d968aca0461a..3fea8cfe8869 100644
>> --- a/arch/arm64/include/asm/kvm_mmu.h
>> +++ b/arch/arm64/include/asm/kvm_mmu.h
>> @@ -183,6 +183,7 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
>>
>> int kvm_handle_guest_sea(struct kvm_vcpu *vcpu);
>> int kvm_handle_guest_abort(struct kvm_vcpu *vcpu);
>> +void kvm_flush_hdbss_buffer(struct kvm_vcpu *vcpu);
>>
>> phys_addr_t kvm_mmu_get_httbr(void);
>> phys_addr_t kvm_get_idmap_vector(void);
>> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
>> index f4436ecc630c..d11f4d0dd4e7 100644
>> --- a/arch/arm64/include/asm/sysreg.h
>> +++ b/arch/arm64/include/asm/sysreg.h
>> @@ -1039,6 +1039,17 @@
>>
>> #define GCS_CAP(x) ((((unsigned long)x) & GCS_CAP_ADDR_MASK) | \
>> GCS_CAP_VALID_TOKEN)
>> +
>> +/*
>> + * Definitions for the HDBSS feature
>> + */
>> +#define HDBSS_MAX_SIZE HDBSSBR_EL2_SZ_2MB
>> +
>> +#define HDBSSBR_EL2(baddr, sz) (((baddr) & GENMASK(55, 12 + sz)) | \
>> + FIELD_PREP(HDBSSBR_EL2_SZ_MASK, sz))
>> +
>> +#define HDBSSPROD_IDX(prod) FIELD_GET(HDBSSPROD_EL2_INDEX_MASK, prod)
>> +
>> /*
>> * Definitions for GICv5 instructions]
>> */
>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>> index 29f0326f7e00..d64da05e25c4 100644
>> --- a/arch/arm64/kvm/arm.c
>> +++ b/arch/arm64/kvm/arm.c
>> @@ -125,6 +125,87 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
>> return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
>> }
>>
>> +void kvm_arm_vcpu_free_hdbss(struct kvm_vcpu *vcpu)
>> +{
>> + struct page *hdbss_pg;
>> +
>> + hdbss_pg = phys_to_page(vcpu->arch.hdbss.base_phys);
>> + if (hdbss_pg)
>> + __free_pages(hdbss_pg, vcpu->arch.hdbss.size);
>> +
>> + vcpu->arch.hdbss.size = 0;
>> +}
>> +
>> +static int kvm_cap_arm_enable_hdbss(struct kvm *kvm,
>> + struct kvm_enable_cap *cap)
>> +{
>> + unsigned long i;
>> + struct kvm_vcpu *vcpu;
>> + struct page *hdbss_pg = NULL;
>> + __u64 size = cap->args[0];
>> + bool enable = cap->args[1] ? true : false;
>> +
>> + if (!system_supports_hdbss())
>> + return -EINVAL;
>> +
>> + if (size > HDBSS_MAX_SIZE)
>> + return -EINVAL;
>> +
>> + if (!enable && !kvm->arch.enable_hdbss) /* Already Off */
>> + return 0;
>> +
>> + if (enable && kvm->arch.enable_hdbss) /* Already On, can't set size */
>> + return -EINVAL;
>> +
>> + if (!enable) { /* Turn it off */
>> + kvm->arch.mmu.vtcr &= ~(VTCR_EL2_HD | VTCR_EL2_HDBSS | VTCR_EL2_HA);
>> +
>> + kvm_for_each_vcpu(i, vcpu, kvm) {
>> + /* Kick vcpus to flush hdbss buffer. */
>> + kvm_vcpu_kick(vcpu);
>> +
>> + kvm_arm_vcpu_free_hdbss(vcpu);
>> + }
>> +
>> + kvm->arch.enable_hdbss = false;
>> +
>> + return 0;
>> + }
>> +
>> + /* Turn it on */
>> + kvm_for_each_vcpu(i, vcpu, kvm) {
>> + hdbss_pg = alloc_pages(GFP_KERNEL_ACCOUNT, size);
>> + if (!hdbss_pg)
>> + goto error_alloc;
>> +
>> + vcpu->arch.hdbss = (struct vcpu_hdbss_state) {
>> + .base_phys = page_to_phys(hdbss_pg),
>> + .size = size,
>> + .next_index = 0,
>> + };
>> + }
>> +
>> + kvm->arch.enable_hdbss = true;
>> + kvm->arch.mmu.vtcr |= VTCR_EL2_HD | VTCR_EL2_HDBSS | VTCR_EL2_HA;
>> +
>> + /*
>> + * We should kick vcpus out of guest mode here to load new
>> + * vtcr value to vtcr_el2 register when re-enter guest mode.
>> + */
>> + kvm_for_each_vcpu(i, vcpu, kvm)
>> + kvm_vcpu_kick(vcpu);
>> +
>> + return 0;
>> +
>> +error_alloc:
>> + kvm_for_each_vcpu(i, vcpu, kvm) {
>> + if (vcpu->arch.hdbss.base_phys)
>> + kvm_arm_vcpu_free_hdbss(vcpu);
>> + }
>> +
>> + return -ENOMEM;
>> +}
>> +
>> int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>> struct kvm_enable_cap *cap)
>> {
>> @@ -182,6 +263,11 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
>> r = 0;
>> set_bit(KVM_ARCH_FLAG_EXIT_SEA, &kvm->arch.flags);
>> break;
>> + case KVM_CAP_ARM_HW_DIRTY_STATE_TRACK:
>> + mutex_lock(&kvm->lock);
>> + r = kvm_cap_arm_enable_hdbss(kvm, cap);
>> + mutex_unlock(&kvm->lock);
>> + break;
>> default:
>> break;
>> }
>> @@ -471,6 +557,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
>> r = kvm_supports_cacheable_pfnmap();
>> break;
>>
>> + case KVM_CAP_ARM_HW_DIRTY_STATE_TRACK:
>> + r = system_supports_hdbss();
>> + break;
>> default:
>> r = 0;
>> }
>> @@ -1120,6 +1209,9 @@ static int check_vcpu_requests(struct kvm_vcpu *vcpu)
>> if (kvm_dirty_ring_check_request(vcpu))
>> return 0;
>>
>> + if (kvm_check_request(KVM_REQ_FLUSH_HDBSS, vcpu))
>> + kvm_flush_hdbss_buffer(vcpu);
>> +
>> check_nested_vcpu_requests(vcpu);
>> }
>>
>> @@ -1898,7 +1990,17 @@ long kvm_arch_vcpu_unlocked_ioctl(struct file *filp, unsigned int ioctl,
>>
>> void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
>> {
>> + /*
>> + * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
>> + * before reporting dirty_bitmap to userspace. Send a request with
>> + * KVM_REQUEST_WAIT to flush buffer synchronously.
>> + */
>> + struct kvm_vcpu *vcpu;
>> +
>> + if (!kvm->arch.enable_hdbss)
>> + return;
>>
>> + kvm_make_all_cpus_request(kvm, KVM_REQ_FLUSH_HDBSS);
>> }
>>
>> static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm,
>> diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
>> index 9db3f11a4754..600cbc4f8ae9 100644
>> --- a/arch/arm64/kvm/hyp/vhe/switch.c
>> +++ b/arch/arm64/kvm/hyp/vhe/switch.c
>> @@ -213,6 +213,23 @@ static void __vcpu_put_deactivate_traps(struct kvm_vcpu *vcpu)
>> local_irq_restore(flags);
>> }
>>
>> +static void __load_hdbss(struct kvm_vcpu *vcpu)
>> +{
>> + struct kvm *kvm = vcpu->kvm;
>> + u64 br_el2, prod_el2;
>> +
>> + if (!kvm->arch.enable_hdbss)
>> + return;
>> +
>> + br_el2 = HDBSSBR_EL2(vcpu->arch.hdbss.base_phys, vcpu->arch.hdbss.size);
>> + prod_el2 = vcpu->arch.hdbss.next_index;
>> +
>> + write_sysreg_s(br_el2, SYS_HDBSSBR_EL2);
>> + write_sysreg_s(prod_el2, SYS_HDBSSPROD_EL2);
>> +
>> + isb();
>> +}
>> +
> I see in the code below you trust that the tracking will happen with
> PAGE_SIZE granularity (you track with PAGE_SHIFT).
>
> That may be a problem when we have guest memory backed by hugepages or
> transparent huge pages.
>
> When we are using HDBSS, there is no fault happening, so we have no way of
> doing on-demand block splitting, so we need to make use of eager block
> splitting, _before_ we start to track anything, or else we may have
> different-sized pages in the HDBSS buffer, which is harder to deal with.
>
> Suggestion: do the eager splitting before we enable HDBSS.
>
> For this to happen, we have to enable the EAGER_SPLIT_CHUNK_SIZE
> capability, which can only be enabled when all memslots are empty.
>
> I suggest doing that at kvm_init_stage2_mmu(), and checking if HDBSS is
> in which case we set mmu->split_page_chunk_size to PAGESIZE.
>
> I will send a patch you can put before this one to make sure it works :)
>
> Thanks!
> Leo
Hi Leo,
Thanks for the helpful suggestion. I had previously traced the
hugepage-splitting path
during live migration and found that when migration starts, enabling
dirty logging
triggers the splitting path. I also tested HDBSS with traditional
hugepages and haven't
observed any issues yet.
However, your concern is valid — there may be cases not covered,
especially when the
VMM uses transparent hugepages. I'll integrate your patch into the next
version and
run some tests.
For reference, here's the path I traced:
```
- userspace, e.g., QEMU
kvm_log_start
+-> kvm_section_update_flags
+-> kvm_slot_update_flags
|
| // For each memory region, QEMU issues a
KVM_SET_USER_MEMORY_REGION ioctl.
| // Before issuing it, flags are updated to include
KVM_MEM_LOG_DIRTY_PAGES.
+-> kvm_mem_flags
+-> kvm_set_user_memory_region // ioctl that enables dirty
logging on the memslot
- KVM
KVM_SET_USER_MEMORY_REGION
+-> kvm_vm_ioctl_set_memory_region
+-> kvm_set_memory_region / __kvm_set_memory_region
+-> kvm_set_memslot
+-> kvm_commit_memory_region
+-> kvm_arch_commit_memory_region
+-> kvm_mmu_split_memory_region
// Splits Stage-2 hugepages/contiguous mappings
into 4KB PTEs.
+-> kvm_mmu_split_huge_pages
+-> kvm_pgtable_stage2_split
```
Thanks again for the detailed explanation and for sending the patch.
>> void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu)
>> {
>> host_data_ptr(host_ctxt)->__hyp_running_vcpu = vcpu;
>> @@ -220,10 +237,12 @@ void kvm_vcpu_load_vhe(struct kvm_vcpu *vcpu)
>> __vcpu_load_switch_sysregs(vcpu);
>> __vcpu_load_activate_traps(vcpu);
>> __load_stage2(vcpu->arch.hw_mmu, vcpu->arch.hw_mmu->arch);
>> + __load_hdbss(vcpu);
>> }
>>
>> void kvm_vcpu_put_vhe(struct kvm_vcpu *vcpu)
>> {
>> + kvm_flush_hdbss_buffer(vcpu);
>> __vcpu_put_deactivate_traps(vcpu);
>> __vcpu_put_switch_sysregs(vcpu);
>>
>> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
>> index 070a01e53fcb..42b0710a16ce 100644
>> --- a/arch/arm64/kvm/mmu.c
>> +++ b/arch/arm64/kvm/mmu.c
>> @@ -1896,6 +1896,9 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
>> if (writable)
>> prot |= KVM_PGTABLE_PROT_W;
>>
>> + if (writable && kvm->arch.enable_hdbss && logging_active)
>> + prot |= KVM_PGTABLE_PROT_DBM;
>> +
>> if (exec_fault)
>> prot |= KVM_PGTABLE_PROT_X;
>>
>> @@ -2033,6 +2036,70 @@ int kvm_handle_guest_sea(struct kvm_vcpu *vcpu)
>> return 0;
>> }
>>
>> +void kvm_flush_hdbss_buffer(struct kvm_vcpu *vcpu)
>> +{
>> + int idx, curr_idx;
>> + u64 br_el2;
>> + u64 *hdbss_buf;
>> + struct kvm *kvm = vcpu->kvm;
>> +
>> + if (!kvm->arch.enable_hdbss)
>> + return;
>> +
>> + curr_idx = HDBSSPROD_IDX(read_sysreg_s(SYS_HDBSSPROD_EL2));
>> + br_el2 = HDBSSBR_EL2(vcpu->arch.hdbss.base_phys, vcpu->arch.hdbss.size);
>> +
>> + /* Do nothing if HDBSS buffer is empty or br_el2 is NULL */
>> + if (curr_idx == 0 || br_el2 == 0)
>> + return;
>> +
>> + hdbss_buf = page_address(phys_to_page(vcpu->arch.hdbss.base_phys));
>> + if (!hdbss_buf)
>> + return;
>> +
>> + guard(write_lock_irqsave)(&vcpu->kvm->mmu_lock);
>> + for (idx = 0; idx < curr_idx; idx++) {
>> + u64 gpa;
>> +
>> + gpa = hdbss_buf[idx];
>> + if (!(gpa & HDBSS_ENTRY_VALID))
>> + continue;
>> +
>> + gpa &= HDBSS_ENTRY_IPA;
>> + kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
>> + }
> Here ^
Thanks!
Tian
>
>> +
>> + /* reset HDBSS index */
>> + write_sysreg_s(0, SYS_HDBSSPROD_EL2);
>> + vcpu->arch.hdbss.next_index = 0;
>> + isb();
>> +}
>> +
>> +static int kvm_handle_hdbss_fault(struct kvm_vcpu *vcpu)
>> +{
>> + u64 prod;
>> + u64 fsc;
>> +
>> + prod = read_sysreg_s(SYS_HDBSSPROD_EL2);
>> + fsc = FIELD_GET(HDBSSPROD_EL2_FSC_MASK, prod);
>> +
>> + switch (fsc) {
>> + case HDBSSPROD_EL2_FSC_OK:
>> + /* Buffer full, which is reported as permission fault. */
>> + kvm_flush_hdbss_buffer(vcpu);
>> + return 1;
>> + case HDBSSPROD_EL2_FSC_ExternalAbort:
>> + case HDBSSPROD_EL2_FSC_GPF:
>> + return -EFAULT;
>> + default:
>> + /* Unknown fault. */
>> + WARN_ONCE(1,
>> + "Unexpected HDBSS fault type, FSC: 0x%llx (prod=0x%llx, vcpu=%d)\n",
>> + fsc, prod, vcpu->vcpu_id);
>> + return -EFAULT;
>> + }
>> +}
>> +
>> /**
>> * kvm_handle_guest_abort - handles all 2nd stage aborts
>> * @vcpu: the VCPU pointer
>> @@ -2071,6 +2138,9 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)
>>
>> is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
>>
>> + if (esr_iss2_is_hdbssf(esr))
>> + return kvm_handle_hdbss_fault(vcpu);
>> +
>> if (esr_fsc_is_translation_fault(esr)) {
>> /* Beyond sanitised PARange (which is the IPA limit) */
>> if (fault_ipa >= BIT_ULL(get_kvm_ipa_limit())) {
>> diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
>> index 959532422d3a..c03a4b310b53 100644
>> --- a/arch/arm64/kvm/reset.c
>> +++ b/arch/arm64/kvm/reset.c
>> @@ -161,6 +161,9 @@ void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu)
>> free_page((unsigned long)vcpu->arch.ctxt.vncr_array);
>> kfree(vcpu->arch.vncr_tlb);
>> kfree(vcpu->arch.ccsidr);
>> +
>> + if (vcpu->kvm->arch.enable_hdbss)
>> + kvm_arm_vcpu_free_hdbss(vcpu);
>> }
>>
>> static void kvm_vcpu_reset_sve(struct kvm_vcpu *vcpu)
>> --
>> 2.33.0
>>
^ permalink raw reply
* [PATCH net V2 2/2] net: xilinx: axienet: Fix BQL accounting for multi-BD TX packets
From: Suraj Gupta @ 2026-03-27 7:32 UTC (permalink / raw)
To: Radhey Shyam Pandey, Andrew Lunn, David S . Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni
Cc: Michal Simek, Sean Anderson, Daniel Borkmann, Ariane Keller,
netdev, linux-arm-kernel, linux-kernel
In-Reply-To: <20260327073238.134948-1-suraj.gupta2@amd.com>
When a TX packet spans multiple buffer descriptors (scatter-gather),
axienet_free_tx_chain sums the per-BD actual length from descriptor
status into a caller-provided accumulator. That sum is reset on each
NAPI poll. If the BDs for a single packet complete across different
polls, the earlier bytes are lost and never credited to BQL. This
causes BQL to think bytes are permanently in-flight, eventually
stalling the TX queue.
The SKB pointer is stored only on the last BD of a packet. When that
BD completes, use skb->len for the byte count instead of summing
per-BD status lengths. This matches netdev_sent_queue(), which debits
skb->len, and naturally survives across polls because no partial
packet contributes to the accumulator.
Fixes: c900e49d58eb ("net: xilinx: axienet: Implement BQL")
Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index b06e4c37ff61..263c4b67fd5a 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -770,8 +770,8 @@ static int axienet_device_reset(struct net_device *ndev)
* @first_bd: Index of first descriptor to clean up
* @nr_bds: Max number of descriptors to clean up
* @force: Whether to clean descriptors even if not complete
- * @sizep: Pointer to a u32 filled with the total sum of all bytes
- * in all cleaned-up descriptors. Ignored if NULL.
+ * @sizep: Pointer to a u32 accumulating the total byte count of
+ * completed packets (using skb->len). Ignored if NULL.
* @budget: NAPI budget (use 0 when not called from NAPI poll)
*
* Would either be called after a successful transmit operation, or after
@@ -805,6 +805,8 @@ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd,
DMA_TO_DEVICE);
if (cur_p->skb && (status & XAXIDMA_BD_STS_COMPLETE_MASK)) {
+ if (sizep)
+ *sizep += cur_p->skb->len;
napi_consume_skb(cur_p->skb, budget);
packets++;
}
@@ -818,9 +820,6 @@ static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd,
wmb();
cur_p->cntrl = 0;
cur_p->status = 0;
-
- if (sizep)
- *sizep += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK;
}
if (!force) {
--
2.49.1
^ permalink raw reply related
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