* [PATCH v5 05/38] KVM: arm64: Don't advertise unsupported features for protected guests
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
In-Reply-To: <20260330144841.26181-1-will@kernel.org>
Both SVE and PMUv3 are treated as "restricted" features for protected
guests and attempts to access their corresponding architectural state
from a protected guest result in an undefined exception being injected
by the hypervisor.
Since these exceptions are unexpected and typically fatal for the guest,
don't advertise these features for protected guests.
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Tested-by: Mostafa Saleh <smostafa@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/include/asm/kvm_pkvm.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_pkvm.h b/arch/arm64/include/asm/kvm_pkvm.h
index 757076ad4ec9..7041e398fb4c 100644
--- a/arch/arm64/include/asm/kvm_pkvm.h
+++ b/arch/arm64/include/asm/kvm_pkvm.h
@@ -40,8 +40,6 @@ static inline bool kvm_pkvm_ext_allowed(struct kvm *kvm, long ext)
case KVM_CAP_MAX_VCPU_ID:
case KVM_CAP_MSI_DEVID:
case KVM_CAP_ARM_VM_IPA_SIZE:
- case KVM_CAP_ARM_PMU_V3:
- case KVM_CAP_ARM_SVE:
case KVM_CAP_ARM_PTRAUTH_ADDRESS:
case KVM_CAP_ARM_PTRAUTH_GENERIC:
return true;
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH v5 04/38] KVM: arm64: Rename __pkvm_pgtable_stage2_unmap()
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
In-Reply-To: <20260330144841.26181-1-will@kernel.org>
In preparation for adding support for protected VMs, where pages are
donated rather than shared, rename __pkvm_pgtable_stage2_unmap() to
__pkvm_pgtable_stage2_unshare() to make it clearer about what is going
on.
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Tested-by: Mostafa Saleh <smostafa@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/pkvm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kvm/pkvm.c b/arch/arm64/kvm/pkvm.c
index 7797813f4dbe..42f6e50825ac 100644
--- a/arch/arm64/kvm/pkvm.c
+++ b/arch/arm64/kvm/pkvm.c
@@ -322,7 +322,7 @@ int pkvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,
return 0;
}
-static int __pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 start, u64 end)
+static int __pkvm_pgtable_stage2_unshare(struct kvm_pgtable *pgt, u64 start, u64 end)
{
struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt->mmu);
pkvm_handle_t handle = kvm->arch.pkvm.handle;
@@ -350,7 +350,7 @@ void pkvm_pgtable_stage2_destroy_range(struct kvm_pgtable *pgt,
if (!handle)
return;
- __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);
+ __pkvm_pgtable_stage2_unshare(pgt, addr, addr + size);
}
void pkvm_pgtable_stage2_destroy_pgd(struct kvm_pgtable *pgt)
@@ -386,7 +386,7 @@ int pkvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size,
return -EAGAIN;
/* Remove _any_ pkvm_mapping overlapping with the range, bigger or smaller. */
- ret = __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);
+ ret = __pkvm_pgtable_stage2_unshare(pgt, addr, addr + size);
if (ret)
return ret;
mapping = NULL;
@@ -409,7 +409,7 @@ int pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size)
{
lockdep_assert_held_write(&kvm_s2_mmu_to_kvm(pgt->mmu)->mmu_lock);
- return __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);
+ return __pkvm_pgtable_stage2_unshare(pgt, addr, addr + size);
}
int pkvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH v5 03/38] KVM: arm64: Move handle check into pkvm_pgtable_stage2_destroy_range()
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
In-Reply-To: <20260330144841.26181-1-will@kernel.org>
When pKVM is enabled, a VM has a 'handle' allocated by the hypervisor
in kvm_arch_init_vm() and released later by kvm_arch_destroy_vm().
Consequently, the only time __pkvm_pgtable_stage2_unmap() can run into
an uninitialised 'handle' is on the kvm_arch_init_vm() failure path,
where we destroy the empty stage-2 page-table if we fail to allocate a
handle.
Move the handle check into pkvm_pgtable_stage2_destroy_range(), which
will additionally handle protected VMs in subsequent patches.
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Tested-by: Mostafa Saleh <smostafa@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/pkvm.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kvm/pkvm.c b/arch/arm64/kvm/pkvm.c
index d7a0f69a9982..7797813f4dbe 100644
--- a/arch/arm64/kvm/pkvm.c
+++ b/arch/arm64/kvm/pkvm.c
@@ -329,9 +329,6 @@ static int __pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 start, u64 e
struct pkvm_mapping *mapping;
int ret;
- if (!handle)
- return 0;
-
for_each_mapping_in_range_safe(pgt, start, end, mapping) {
ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_guest, handle, mapping->gfn,
mapping->nr_pages);
@@ -347,6 +344,12 @@ static int __pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 start, u64 e
void pkvm_pgtable_stage2_destroy_range(struct kvm_pgtable *pgt,
u64 addr, u64 size)
{
+ struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt->mmu);
+ pkvm_handle_t handle = kvm->arch.pkvm.handle;
+
+ if (!handle)
+ return;
+
__pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);
}
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH v5 02/38] KVM: arm64: Don't leak stage-2 page-table if VM fails to init under pKVM
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
In-Reply-To: <20260330144841.26181-1-will@kernel.org>
If pkvm_init_host_vm() fails, we should free the stage-2 page-table
previously allocated by kvm_init_stage2_mmu().
Cc: Fuad Tabba <tabba@google.com>
Reviewed-by: Fuad Tabba <tabba@google.com>
Tested-by: Fuad Tabba <tabba@google.com>
Tested-by: Mostafa Saleh <smostafa@google.com>
Fixes: 07aeb70707b1 ("KVM: arm64: Reserve pKVM handle during pkvm_init_host_vm()")
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/arm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 410ffd41fd73..3589fc08266c 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -236,7 +236,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
*/
ret = pkvm_init_host_vm(kvm);
if (ret)
- goto err_free_cpumask;
+ goto err_uninit_mmu;
}
kvm_vgic_early_init(kvm);
@@ -252,6 +252,8 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
return 0;
+err_uninit_mmu:
+ kvm_uninit_stage2_mmu(kvm);
err_free_cpumask:
free_cpumask_var(kvm->arch.supported_cpus);
err_unshare_kvm:
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH v5 01/38] KVM: arm64: Remove unused PKVM_ID_FFA definition
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
In-Reply-To: <20260330144841.26181-1-will@kernel.org>
Commit 7cbf7c37718e ("KVM: arm64: Drop pkvm_mem_transition for host/hyp
sharing") removed the last users of PKVM_ID_FFA, so drop the definition
altogether.
Signed-off-by: Will Deacon <will@kernel.org>
---
arch/arm64/kvm/hyp/include/nvhe/mem_protect.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h
index 5f9d56754e39..7f25f2bca90c 100644
--- a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h
+++ b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h
@@ -27,7 +27,6 @@ extern struct host_mmu host_mmu;
enum pkvm_component_id {
PKVM_ID_HOST,
PKVM_ID_HYP,
- PKVM_ID_FFA,
};
extern unsigned long hyp_nr_cpus;
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH v5 00/38] KVM: arm64: Add support for protected guest memory with pKVM
From: Will Deacon @ 2026-03-30 14:48 UTC (permalink / raw)
To: kvmarm
Cc: linux-arm-kernel, Will Deacon, Marc Zyngier, Oliver Upton,
Joey Gouly, Suzuki K Poulose, Zenghui Yu, Catalin Marinas,
Quentin Perret, Fuad Tabba, Vincent Donnefort, Mostafa Saleh,
Alexandru Elisei
Hi everyone,
As promised on Friday, here's v5 of the pKVM protected memory patches
previously posted here:
v1: https://lore.kernel.org/kvmarm/20260105154939.11041-1-will@kernel.org/
v2: https://lore.kernel.org/kvmarm/20260119124629.2563-1-will@kernel.org/
v3: https://lore.kernel.org/r/20260305144351.17071-1-will@kernel.org
v4: https://lore.kernel.org/r/20260327140039.21228-1-will@kernel.org
This version primarily addresses the comments from Sashiko that I think
are valid:
* Mask out page offset from physical address passed to "force reclaim"
hypercall.
* Check for 'is_dying' in get_pkvm_hyp_vm() to prevent taking a
reference on a VM in the process of being destroyed.
* Take the 'slots_lock' while creating the hyp vm to avoid racing with
check in kvm_arch_prepare_memory_region().
* Keep trying to reclaim pages from a dying guest if we fail part-way
through.
* Fix return value from pkvm_pgtable_stage2_test_clear_young() if it's
unexpectedly called for a pVM.
As before, I've pushed an updated branch with this series:
https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=kvm/protected-memory
and the kvmtool patches are available at:
https://git.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git/log/?h=pkvm
Cheers,
Will
Cc: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oupton@kernel.org>
Cc: Joey Gouly <joey.gouly@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Quentin Perret <qperret@google.com>
Cc: Fuad Tabba <tabba@google.com>
Cc: Vincent Donnefort <vdonnefort@google.com>
Cc: Mostafa Saleh <smostafa@google.com>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
--->8
Fuad Tabba (1):
KVM: arm64: Expose self-hosted debug regs as RAZ/WI for protected
guests
Quentin Perret (1):
KVM: arm64: Inject SIGSEGV on illegal accesses
Will Deacon (36):
KVM: arm64: Remove unused PKVM_ID_FFA definition
KVM: arm64: Don't leak stage-2 page-table if VM fails to init under
pKVM
KVM: arm64: Move handle check into pkvm_pgtable_stage2_destroy_range()
KVM: arm64: Rename __pkvm_pgtable_stage2_unmap()
KVM: arm64: Don't advertise unsupported features for protected guests
KVM: arm64: Remove is_protected_kvm_enabled() checks from hypercalls
KVM: arm64: Ignore MMU notifier callbacks for protected VMs
KVM: arm64: Prevent unsupported memslot operations on protected VMs
KVM: arm64: Ignore -EAGAIN when mapping in pages for the pKVM host
KVM: arm64: Split teardown hypercall into two phases
KVM: arm64: Introduce __pkvm_host_donate_guest()
KVM: arm64: Hook up donation hypercall to pkvm_pgtable_stage2_map()
KVM: arm64: Handle aborts from protected VMs
KVM: arm64: Introduce __pkvm_reclaim_dying_guest_page()
KVM: arm64: Hook up reclaim hypercall to pkvm_pgtable_stage2_destroy()
KVM: arm64: Factor out pKVM host exception injection logic
KVM: arm64: Support translation faults in inject_host_exception()
KVM: arm64: Avoid pointless annotation when mapping host-owned pages
KVM: arm64: Generalise kvm_pgtable_stage2_set_owner()
KVM: arm64: Introduce host_stage2_set_owner_metadata_locked()
KVM: arm64: Change 'pkvm_handle_t' to u16
KVM: arm64: Annotate guest donations with handle and gfn in host
stage-2
KVM: arm64: Introduce hypercall to force reclaim of a protected page
KVM: arm64: Reclaim faulting page from pKVM in spurious fault handler
KVM: arm64: Return -EFAULT from VCPU_RUN on access to a poisoned pte
KVM: arm64: Add hvc handler at EL2 for hypercalls from protected VMs
KVM: arm64: Implement the MEM_SHARE hypercall for protected VMs
KVM: arm64: Implement the MEM_UNSHARE hypercall for protected VMs
KVM: arm64: Allow userspace to create protected VMs when pKVM is
enabled
KVM: arm64: Add some initial documentation for pKVM
KVM: arm64: Extend pKVM page ownership selftests to cover guest
donation
KVM: arm64: Register 'selftest_vm' in the VM table
KVM: arm64: Extend pKVM page ownership selftests to cover forced
reclaim
KVM: arm64: Extend pKVM page ownership selftests to cover guest hvcs
KVM: arm64: Rename PKVM_PAGE_STATE_MASK
drivers/virt: pkvm: Add Kconfig dependency on DMA_RESTRICTED_POOL
.../admin-guide/kernel-parameters.txt | 4 +-
Documentation/virt/kvm/arm/index.rst | 1 +
Documentation/virt/kvm/arm/pkvm.rst | 106 ++++
arch/arm64/include/asm/kvm_asm.h | 31 +-
arch/arm64/include/asm/kvm_host.h | 9 +-
arch/arm64/include/asm/kvm_pgtable.h | 45 +-
arch/arm64/include/asm/kvm_pkvm.h | 4 +-
arch/arm64/include/asm/virt.h | 9 +
arch/arm64/kvm/arm.c | 12 +-
arch/arm64/kvm/hyp/include/nvhe/mem_protect.h | 10 +-
arch/arm64/kvm/hyp/include/nvhe/memory.h | 12 +-
arch/arm64/kvm/hyp/include/nvhe/pkvm.h | 7 +-
.../arm64/kvm/hyp/include/nvhe/trap_handler.h | 2 +
arch/arm64/kvm/hyp/nvhe/hyp-main.c | 184 +++---
arch/arm64/kvm/hyp/nvhe/mem_protect.c | 587 ++++++++++++++++--
arch/arm64/kvm/hyp/nvhe/pkvm.c | 232 ++++++-
arch/arm64/kvm/hyp/nvhe/switch.c | 1 +
arch/arm64/kvm/hyp/nvhe/sys_regs.c | 8 +
arch/arm64/kvm/hyp/pgtable.c | 33 +-
arch/arm64/kvm/mmu.c | 114 +++-
arch/arm64/kvm/pkvm.c | 157 ++++-
arch/arm64/mm/fault.c | 33 +-
drivers/virt/coco/pkvm-guest/Kconfig | 2 +-
include/uapi/linux/kvm.h | 5 +
24 files changed, 1380 insertions(+), 228 deletions(-)
create mode 100644 Documentation/virt/kvm/arm/pkvm.rst
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply
* Re: [PATCH] media: nxp: imx8-isi: fix memory leaks in probe error paths and remove
From: Frank Li @ 2026-03-30 14:46 UTC (permalink / raw)
To: David Carlier
Cc: laurent.pinchart, mchehab, s.hauer, festevam, jacopo,
aisheng.dong, guoniu.zhou, linux-media, imx, linux-arm-kernel,
linux-kernel
In-Reply-To: <20260327222711.268132-1-devnexen@gmail.com>
On Fri, Mar 27, 2026 at 10:27:11PM +0000, David Carlier wrote:
> mxc_isi_probe() allocates isi->pipes with kzalloc_objs() but never
> frees it on any probe failure path or in mxc_isi_remove(), leaking the
> allocation on every failed probe and every normal unbind.
>
> Additionally, when mxc_isi_pipe_init() fails partway through the
> channel loop or when mxc_isi_v4l2_init() fails, the already initialized
> pipes are not cleaned up — their media entities and mutexes are leaked.
>
> Fix both by adding kfree(isi->pipes) to all probe error paths and to
> mxc_isi_remove(), and cleaning up already-initialized pipes in the
> err_xbar error path.
>
> Fixes: cf21f328fcaf ("media: nxp: Add i.MX8 ISP Channel driver")
> Signed-off-by: David Carlier <devnexen@gmail.com>
> ---
I think provide a helper function, devm_kzalloc_objs(), or using old
devm_kzalloc is better fix method.
Frank
> .../platform/nxp/imx8-isi/imx8-isi-core.c | 24 +++++++++++++++----
> 1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> index 4bf8570e1b9e..ab32c5b6ac9c 100644
> --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> @@ -490,33 +490,43 @@ static int mxc_isi_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> isi->num_clks = devm_clk_bulk_get_all(dev, &isi->clks);
> - if (isi->num_clks < 0)
> + if (isi->num_clks < 0) {
> + kfree(isi->pipes);
> return dev_err_probe(dev, isi->num_clks, "Failed to get clocks\n");
> + }
>
>
^ permalink raw reply
* [PATCH 4/5] lib/crc: arm64: Simplify intrinsics implementation
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
In-Reply-To: <20260330144630.33026-7-ardb@kernel.org>
NEON intrinsics are useful because they remove the need for manual
register allocation, and the resulting code can be re-compiled and
optimized for different micro-architectures, and shared between arm64
and 32-bit ARM.
However, the strong typing of the vector variables can lead to
incomprehensible gibberish, as is the case with the new CRC64
implementation. To address this, let's repaint all variables as
uint64x2_t to minimize the number of vreinterpretq_xxx() calls, and to
be able to rely on the ^ operator for exclusive OR operations. This
makes the code much more concise and readable.
While at it, wrap the calls to vmull_p64() et al in order to have a more
consistent calling convention, and encapsulate any remaining
vreinterpret() calls that are still needed.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
lib/crc/arm64/crc64-neon-inner.c | 77 ++++++++------------
1 file changed, 32 insertions(+), 45 deletions(-)
diff --git a/lib/crc/arm64/crc64-neon-inner.c b/lib/crc/arm64/crc64-neon-inner.c
index 881cdafadb37..28527e544ff6 100644
--- a/lib/crc/arm64/crc64-neon-inner.c
+++ b/lib/crc/arm64/crc64-neon-inner.c
@@ -8,9 +8,6 @@
u64 crc64_nvme_arm64_c(u64 crc, const u8 *p, size_t len);
-#define GET_P64_0(v) ((poly64_t)vgetq_lane_u64(vreinterpretq_u64_p64(v), 0))
-#define GET_P64_1(v) ((poly64_t)vgetq_lane_u64(vreinterpretq_u64_p64(v), 1))
-
/* x^191 mod G, x^127 mod G */
static const u64 fold_consts_val[2] = { 0xeadc41fd2ba3d420ULL,
0x21e9761e252621acULL };
@@ -18,61 +15,51 @@ static const u64 fold_consts_val[2] = { 0xeadc41fd2ba3d420ULL,
static const u64 bconsts_val[2] = { 0x27ecfa329aef9f77ULL,
0x34d926535897936aULL };
-u64 crc64_nvme_arm64_c(u64 crc, const u8 *p, size_t len)
+static inline uint64x2_t pmull64(uint64x2_t a, uint64x2_t b)
{
- uint64x2_t v0_u64 = { crc, 0 };
- poly64x2_t v0 = vreinterpretq_p64_u64(v0_u64);
- poly64x2_t fold_consts =
- vreinterpretq_p64_u64(vld1q_u64(fold_consts_val));
- poly64x2_t v1 = vreinterpretq_p64_u8(vld1q_u8(p));
+ return vreinterpretq_u64_p128(vmull_p64(vgetq_lane_u64(a, 0),
+ vgetq_lane_u64(b, 0)));
+}
- v0 = vreinterpretq_p64_u8(veorq_u8(vreinterpretq_u8_p64(v0),
- vreinterpretq_u8_p64(v1)));
- p += 16;
- len -= 16;
+static inline uint64x2_t pmull64_high(uint64x2_t a, uint64x2_t b)
+{
+ poly64x2_t l = vreinterpretq_p64_u64(a);
+ poly64x2_t m = vreinterpretq_p64_u64(b);
- do {
- v1 = vreinterpretq_p64_u8(vld1q_u8(p));
+ return vreinterpretq_u64_p128(vmull_high_p64(l, m));
+}
- poly128_t v2 = vmull_high_p64(fold_consts, v0);
- poly128_t v0_128 =
- vmull_p64(GET_P64_0(fold_consts), GET_P64_0(v0));
+static inline uint64x2_t pmull64_hi_lo(uint64x2_t a, uint64x2_t b)
+{
+ return vreinterpretq_u64_p128(vmull_p64(vgetq_lane_u64(a, 1),
+ vgetq_lane_u64(b, 0)));
+}
- uint8x16_t x0 = veorq_u8(vreinterpretq_u8_p128(v0_128),
- vreinterpretq_u8_p128(v2));
+u64 crc64_nvme_arm64_c(u64 crc, const u8 *p, size_t len)
+{
+ uint64x2_t fold_consts = vld1q_u64(fold_consts_val);
+ uint64x2_t v0 = { crc, 0 };
+ uint64x2_t zero = { };
- x0 = veorq_u8(x0, vreinterpretq_u8_p64(v1));
- v0 = vreinterpretq_p64_u8(x0);
+ for (;;) {
+ v0 ^= vreinterpretq_u64_u8(vld1q_u8(p));
p += 16;
len -= 16;
- } while (len >= 16);
-
- /* Multiply the 128-bit value by x^64 and reduce it back to 128 bits. */
- poly64x2_t v7 = vreinterpretq_p64_u64((uint64x2_t){ 0, 0 });
- poly128_t v1_128 = vmull_p64(GET_P64_1(fold_consts), GET_P64_0(v0));
+ if (len < 16)
+ break;
- uint8x16_t ext_v0 =
- vextq_u8(vreinterpretq_u8_p64(v0), vreinterpretq_u8_p64(v7), 8);
- uint8x16_t x0 = veorq_u8(ext_v0, vreinterpretq_u8_p128(v1_128));
+ v0 = pmull64(fold_consts, v0) ^ pmull64_high(fold_consts, v0);
+ }
- v0 = vreinterpretq_p64_u8(x0);
+ /* Multiply the 128-bit value by x^64 and reduce it back to 128 bits. */
+ v0 = vextq_u64(v0, zero, 1) ^ pmull64_hi_lo(fold_consts, v0);
/* Final Barrett reduction */
- poly64x2_t bconsts = vreinterpretq_p64_u64(vld1q_u64(bconsts_val));
-
- v1_128 = vmull_p64(GET_P64_0(bconsts), GET_P64_0(v0));
-
- poly64x2_t v1_64 = vreinterpretq_p64_u8(vreinterpretq_u8_p128(v1_128));
- poly128_t v3_128 = vmull_p64(GET_P64_1(bconsts), GET_P64_0(v1_64));
-
- x0 = veorq_u8(vreinterpretq_u8_p64(v0), vreinterpretq_u8_p128(v3_128));
-
- uint8x16_t ext_v2 = vextq_u8(vreinterpretq_u8_p64(v7),
- vreinterpretq_u8_p128(v1_128), 8);
+ uint64x2_t bconsts = vld1q_u64(bconsts_val);
+ uint64x2_t final = pmull64(bconsts, v0);
- x0 = veorq_u8(x0, ext_v2);
+ v0 ^= vextq_u64(zero, final, 1) ^ pmull64_hi_lo(bconsts, final);
- v0 = vreinterpretq_p64_u8(x0);
- return vgetq_lane_u64(vreinterpretq_u64_p64(v0), 1);
+ return vgetq_lane_u64(v0, 1);
}
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH 5/5] lib/crc: arm: Enable arm64's NEON intrinsics implementation of crc64
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
In-Reply-To: <20260330144630.33026-7-ardb@kernel.org>
Tweak the NEON intrinsics crc64 code written for arm64 so it can be
built for 32-bit ARM as well. The only workaround needed is to provide
alternatives for vmull_p64() and vmull_high_p64() on Clang, which only
defines those when building for the AArch64 or arm64ec ISA.
KUnit benchmark results (Cortex-A53 @ 1 Ghz)
Before:
# crc64_nvme_benchmark: len=1: 35 MB/s
# crc64_nvme_benchmark: len=16: 78 MB/s
# crc64_nvme_benchmark: len=64: 87 MB/s
# crc64_nvme_benchmark: len=127: 88 MB/s
# crc64_nvme_benchmark: len=128: 88 MB/s
# crc64_nvme_benchmark: len=200: 89 MB/s
# crc64_nvme_benchmark: len=256: 89 MB/s
# crc64_nvme_benchmark: len=511: 89 MB/s
# crc64_nvme_benchmark: len=512: 89 MB/s
# crc64_nvme_benchmark: len=1024: 90 MB/s
# crc64_nvme_benchmark: len=3173: 90 MB/s
# crc64_nvme_benchmark: len=4096: 90 MB/s
# crc64_nvme_benchmark: len=16384: 90 MB/s
After:
# crc64_nvme_benchmark: len=1: 32 MB/s
# crc64_nvme_benchmark: len=16: 76 MB/s
# crc64_nvme_benchmark: len=64: 71 MB/s
# crc64_nvme_benchmark: len=127: 88 MB/s
# crc64_nvme_benchmark: len=128: 618 MB/s
# crc64_nvme_benchmark: len=200: 542 MB/s
# crc64_nvme_benchmark: len=256: 920 MB/s
# crc64_nvme_benchmark: len=511: 836 MB/s
# crc64_nvme_benchmark: len=512: 1261 MB/s
# crc64_nvme_benchmark: len=1024: 1531 MB/s
# crc64_nvme_benchmark: len=3173: 1731 MB/s
# crc64_nvme_benchmark: len=4096: 1851 MB/s
# crc64_nvme_benchmark: len=16384: 1858 MB/s
Enable big-endian support only on GCC - the code generated by Clang is
horribly broken.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
lib/crc/Kconfig | 1 +
lib/crc/Makefile | 5 ++-
lib/crc/arm/crc64.h | 36 ++++++++++++++++++++
lib/crc/arm64/crc64-neon-inner.c | 35 +++++++++++++++++++
4 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/lib/crc/Kconfig b/lib/crc/Kconfig
index 31038c8d111a..2f93d4c4d52d 100644
--- a/lib/crc/Kconfig
+++ b/lib/crc/Kconfig
@@ -82,6 +82,7 @@ config CRC64
config CRC64_ARCH
bool
depends on CRC64 && CRC_OPTIMIZATIONS
+ default y if ARM && KERNEL_MODE_NEON && !(CPU_BIG_ENDIAN && CC_IS_CLANG)
default y if ARM64
default y if RISCV && RISCV_ISA_ZBC && 64BIT
default y if X86_64
diff --git a/lib/crc/Makefile b/lib/crc/Makefile
index ff213590e4e3..b6c381cc66bb 100644
--- a/lib/crc/Makefile
+++ b/lib/crc/Makefile
@@ -39,8 +39,11 @@ crc64-y := crc64-main.o
ifeq ($(CONFIG_CRC64_ARCH),y)
CFLAGS_crc64-main.o += -I$(src)/$(SRCARCH)
+crc64-cflags-$(CONFIG_ARM) += -march=armv8-a -mfpu=crypto-neon-fp-armv8
+crc64-cflags-$(CONFIG_ARM64) += -march=armv8-a+crypto
CFLAGS_REMOVE_arm64/crc64-neon-inner.o += $(CC_FLAGS_NO_FPU)
-CFLAGS_arm64/crc64-neon-inner.o += $(CC_FLAGS_FPU) -march=armv8-a+crypto
+CFLAGS_arm64/crc64-neon-inner.o += $(CC_FLAGS_FPU) $(crc64-cflags-y)
+crc64-$(CONFIG_ARM) += arm64/crc64-neon-inner.o
crc64-$(CONFIG_ARM64) += arm64/crc64-neon-inner.o
crc64-$(CONFIG_RISCV) += riscv/crc64_lsb.o riscv/crc64_msb.o
diff --git a/lib/crc/arm/crc64.h b/lib/crc/arm/crc64.h
new file mode 100644
index 000000000000..7c8d54f38e5c
--- /dev/null
+++ b/lib/crc/arm/crc64.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * CRC64 using ARM PMULL instructions
+ */
+
+#include <asm/simd.h>
+
+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pmull);
+
+u64 crc64_nvme_arm64_c(u64 crc, const u8 *p, size_t len);
+
+#define crc64_be_arch crc64_be_generic
+
+static inline u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len)
+{
+ if (len >= 128 && static_branch_likely(&have_pmull) &&
+ likely(may_use_simd())) {
+ do {
+ size_t chunk = min_t(size_t, len & ~15, SZ_4K);
+
+ scoped_ksimd()
+ crc = crc64_nvme_arm64_c(crc, p, chunk);
+
+ p += chunk;
+ len -= chunk;
+ } while (len >= 128);
+ }
+ return crc64_nvme_generic(crc, p, len);
+}
+
+#define crc64_mod_init_arch crc64_mod_init_arch
+static void crc64_mod_init_arch(void)
+{
+ if (elf_hwcap2 & HWCAP2_PMULL)
+ static_branch_enable(&have_pmull);
+}
diff --git a/lib/crc/arm64/crc64-neon-inner.c b/lib/crc/arm64/crc64-neon-inner.c
index 28527e544ff6..99607dbb7bfd 100644
--- a/lib/crc/arm64/crc64-neon-inner.c
+++ b/lib/crc/arm64/crc64-neon-inner.c
@@ -15,6 +15,40 @@ static const u64 fold_consts_val[2] = { 0xeadc41fd2ba3d420ULL,
static const u64 bconsts_val[2] = { 0x27ecfa329aef9f77ULL,
0x34d926535897936aULL };
+#if defined(CONFIG_ARM) && defined(CONFIG_CC_IS_CLANG)
+static inline uint64x2_t pmull64(uint64x2_t a, uint64x2_t b)
+{
+ uint64_t l = vgetq_lane_u64(a, 0);
+ uint64_t m = vgetq_lane_u64(b, 0);
+ uint64x2_t result;
+
+ asm("vmull.p64 %q0, %1, %2" : "=w"(result) : "w"(l), "w"(m));
+
+ return result;
+}
+
+static inline uint64x2_t pmull64_high(uint64x2_t a, uint64x2_t b)
+{
+ uint64_t l = vgetq_lane_u64(a, 1);
+ uint64_t m = vgetq_lane_u64(b, 1);
+ uint64x2_t result;
+
+ asm("vmull.p64 %q0, %1, %2" : "=w"(result) : "w"(l), "w"(m));
+
+ return result;
+}
+
+static inline uint64x2_t pmull64_hi_lo(uint64x2_t a, uint64x2_t b)
+{
+ uint64_t l = vgetq_lane_u64(a, 1);
+ uint64_t m = vgetq_lane_u64(b, 0);
+ uint64x2_t result;
+
+ asm("vmull.p64 %q0, %1, %2" : "=w"(result) : "w"(l), "w"(m));
+
+ return result;
+}
+#else
static inline uint64x2_t pmull64(uint64x2_t a, uint64x2_t b)
{
return vreinterpretq_u64_p128(vmull_p64(vgetq_lane_u64(a, 0),
@@ -34,6 +68,7 @@ static inline uint64x2_t pmull64_hi_lo(uint64x2_t a, uint64x2_t b)
return vreinterpretq_u64_p128(vmull_p64(vgetq_lane_u64(a, 1),
vgetq_lane_u64(b, 0)));
}
+#endif
u64 crc64_nvme_arm64_c(u64 crc, const u8 *p, size_t len)
{
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH 3/5] ARM: Add a neon-intrinsics.h header like on arm64
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
In-Reply-To: <20260330144630.33026-7-ardb@kernel.org>
Add a header asm/neon-intrinsics.h similar to the one that arm64 has.
This makes it possible for NEON intrinsics code to be shared seamlessly
between ARM and arm64.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
Documentation/arch/arm/kernel_mode_neon.rst | 4 +-
arch/arm/include/asm/neon-intrinsics.h | 64 ++++++++++++++++++++
2 files changed, 67 insertions(+), 1 deletion(-)
diff --git a/Documentation/arch/arm/kernel_mode_neon.rst b/Documentation/arch/arm/kernel_mode_neon.rst
index 9bfb71a2a9b9..1efb6d35b7bd 100644
--- a/Documentation/arch/arm/kernel_mode_neon.rst
+++ b/Documentation/arch/arm/kernel_mode_neon.rst
@@ -121,4 +121,6 @@ observe the following in addition to the rules above:
* Compile the unit containing the NEON intrinsics with '-ffreestanding' so GCC
uses its builtin version of <stdint.h> (this is a C99 header which the kernel
does not supply);
-* Include <arm_neon.h> last, or at least after <linux/types.h>
+* Do not include <arm_neon.h> directly: instead, include <asm/neon-intrinsics.h>,
+ which tweaks some macro definitions so that system headers can be included
+ safely.
diff --git a/arch/arm/include/asm/neon-intrinsics.h b/arch/arm/include/asm/neon-intrinsics.h
new file mode 100644
index 000000000000..3fe0b5ab9659
--- /dev/null
+++ b/arch/arm/include/asm/neon-intrinsics.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ASM_NEON_INTRINSICS_H
+#define __ASM_NEON_INTRINSICS_H
+
+#ifndef __ARM_NEON__
+#error You should compile this file with '-march=armv7-a -mfloat-abi=softfp -mfpu=neon'
+#endif
+
+#include <asm-generic/int-ll64.h>
+
+/*
+ * The C99 types uintXX_t that are usually defined in 'stdint.h' are not as
+ * unambiguous on ARM as you would expect. For the types below, there is a
+ * difference on ARM between GCC built for bare metal ARM, GCC built for glibc
+ * and the kernel itself, which results in build errors if you try to build
+ * with -ffreestanding and include 'stdint.h' (such as when you include
+ * 'arm_neon.h' in order to use NEON intrinsics)
+ *
+ * As the typedefs for these types in 'stdint.h' are based on builtin defines
+ * supplied by GCC, we can tweak these to align with the kernel's idea of those
+ * types, so 'linux/types.h' and 'stdint.h' can be safely included from the
+ * same source file (provided that -ffreestanding is used).
+ *
+ * int32_t uint32_t intptr_t uintptr_t
+ * bare metal GCC long unsigned long int unsigned int
+ * glibc GCC int unsigned int int unsigned int
+ * kernel int unsigned int long unsigned long
+ */
+
+#ifdef __INT32_TYPE__
+#undef __INT32_TYPE__
+#define __INT32_TYPE__ int
+#endif
+
+#ifdef __UINT32_TYPE__
+#undef __UINT32_TYPE__
+#define __UINT32_TYPE__ unsigned int
+#endif
+
+#ifdef __INTPTR_TYPE__
+#undef __INTPTR_TYPE__
+#define __INTPTR_TYPE__ long
+#endif
+
+#ifdef __UINTPTR_TYPE__
+#undef __UINTPTR_TYPE__
+#define __UINTPTR_TYPE__ unsigned long
+#endif
+
+/*
+ * genksyms chokes on the ARM NEON instrinsics system header, but we
+ * don't export anything it defines anyway, so just disregard when
+ * genksyms execute.
+ */
+#ifndef __GENKSYMS__
+#include <arm_neon.h>
+#endif
+
+#ifdef CONFIG_CC_IS_CLANG
+#pragma clang diagnostic ignored "-Wincompatible-pointer-types"
+#endif
+
+#endif /* __ASM_NEON_INTRINSICS_H */
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH 2/5] lib/crc: arm64: Use existing macros for kernel-mode FPU cflags
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
In-Reply-To: <20260330144630.33026-7-ardb@kernel.org>
Use the existing CC_FPU_CFLAGS and CC_NO_FPU_CFLAGS to pass the
appropriate compiler command line options for building kernel mode NEON
intrinsics code. This is tidier, and will make it easier to reuse the
code for 32-bit ARM.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
lib/crc/Makefile | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/lib/crc/Makefile b/lib/crc/Makefile
index c9c35419b39c..ff213590e4e3 100644
--- a/lib/crc/Makefile
+++ b/lib/crc/Makefile
@@ -39,9 +39,8 @@ crc64-y := crc64-main.o
ifeq ($(CONFIG_CRC64_ARCH),y)
CFLAGS_crc64-main.o += -I$(src)/$(SRCARCH)
-CFLAGS_REMOVE_arm64/crc64-neon-inner.o += -mgeneral-regs-only
-CFLAGS_arm64/crc64-neon-inner.o += -ffreestanding -march=armv8-a+crypto
-CFLAGS_arm64/crc64-neon-inner.o += -isystem $(shell $(CC) -print-file-name=include)
+CFLAGS_REMOVE_arm64/crc64-neon-inner.o += $(CC_FLAGS_NO_FPU)
+CFLAGS_arm64/crc64-neon-inner.o += $(CC_FLAGS_FPU) -march=armv8-a+crypto
crc64-$(CONFIG_ARM64) += arm64/crc64-neon-inner.o
crc64-$(CONFIG_RISCV) += riscv/crc64_lsb.o riscv/crc64_msb.o
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH 1/5] lib/crc: arm64: Drop unnecessary chunking logic from crc64
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
In-Reply-To: <20260330144630.33026-7-ardb@kernel.org>
On arm64, kernel mode NEON executes with preemption enabled, so there is
no need to chunk the input by hand.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
lib/crc/arm64/crc64.h | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/lib/crc/arm64/crc64.h b/lib/crc/arm64/crc64.h
index cc65abeee24c..ab052a782c07 100644
--- a/lib/crc/arm64/crc64.h
+++ b/lib/crc/arm64/crc64.h
@@ -16,15 +16,13 @@ static inline u64 crc64_nvme_arch(u64 crc, const u8 *p, size_t len)
{
if (len >= 128 && cpu_have_named_feature(PMULL) &&
likely(may_use_simd())) {
- do {
- size_t chunk = min_t(size_t, len & ~15, SZ_4K);
+ size_t chunk = len & ~15;
- scoped_ksimd()
- crc = crc64_nvme_arm64_c(crc, p, chunk);
+ scoped_ksimd()
+ crc = crc64_nvme_arm64_c(crc, p, chunk);
- p += chunk;
- len -= chunk;
- } while (len >= 128);
+ p += chunk;
+ len &= 15;
}
return crc64_nvme_generic(crc, p, len);
}
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply related
* [PATCH 0/5] crc64: Tweak intrinsics code and enable it for ARM
From: Ard Biesheuvel @ 2026-03-30 14:46 UTC (permalink / raw)
To: linux-crypto
Cc: linux-arm-kernel, Ard Biesheuvel, Demian Shulhan, Eric Biggers
Apply some tweaks to the new arm64 crc64 NEON intrinsics code, and wire
it up for the 32-bit ARM build. Note that true 32-bit ARM CPUs usually
don't implement the prerequisite 64x64 PMULL instructions, but 32-bit
kernels are commonly used on 64-bit capable hardware too, which do
implement the 32-bit versions of the crypto instructions if they are
implemented for the 64-bit ISA (as per the architecture).
Cc: Demian Shulhan <demyansh@gmail.com>
Cc: Eric Biggers <ebiggers@kernel.org>
Ard Biesheuvel (5):
lib/crc: arm64: Drop unnecessary chunking logic from crc64
lib/crc: arm64: Use existing macros for kernel-mode FPU cflags
ARM: Add a neon-intrinsics.h header like on arm64
lib/crc: arm64: Simplify intrinsics implementation
lib/crc: arm: Enable arm64's NEON intrinsics implementation of crc64
Documentation/arch/arm/kernel_mode_neon.rst | 4 +-
arch/arm/include/asm/neon-intrinsics.h | 64 ++++++++++++
lib/crc/Kconfig | 1 +
lib/crc/Makefile | 8 +-
lib/crc/arm/crc64.h | 36 +++++++
lib/crc/arm64/crc64-neon-inner.c | 108 ++++++++++++--------
lib/crc/arm64/crc64.h | 12 +--
7 files changed, 179 insertions(+), 54 deletions(-)
create mode 100644 arch/arm/include/asm/neon-intrinsics.h
create mode 100644 lib/crc/arm/crc64.h
base-commit: 63432fd625372a0e79fb00a4009af204f4edc013
--
2.53.0.1018.g2bb0e51243-goog
^ permalink raw reply
* Re: [PATCH v1 1/1] arm64: dts: imx91-var-dart-sonata: add RGB select supply for PCA6408
From: Frank Li @ 2026-03-30 14:40 UTC (permalink / raw)
To: Stefano Radaelli
Cc: linux-kernel, devicetree, imx, linux-arm-kernel, pierluigi.p,
Stefano Radaelli, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
In-Reply-To: <acoxJ3KUVHqIR1yQ@Lord-Beerus.station>
On Mon, Mar 30, 2026 at 10:15:35AM +0200, Stefano Radaelli wrote:
> Hi Frank,
>
> On Fri, Mar 27, 2026 at 02:41:21PM -0400, Frank Li wrote:
> >
> > Accroding to signal name, it is MUX chip select signal. Of couse it may
> > connect to a buffer's EN pin. I have not checked your schematic.
> >
> > If it connect to MUX chip or some select signal, it should use above method,
> > even though it is permanently asserted when access PCA6408.
> >
> > If it connect to EN pin of buffer, regualtor should be good.
> >
>
> Yes, it is exactly the second case!
> It's just an EN pin, that enables a buffer to route RGB signals used on
> the DART-MX91 som only.
> That's why I think regulator is the right way for this case.
Okay, it'd better to emphrase it in commit message because _SEL is miss
leasing.
Frank
>
> Best Regards,
> Stefano
^ permalink raw reply
* Re: [PATCH v1] media: rkisp1: Add support for CAC
From: Barnabás Pőcze @ 2026-03-30 14:40 UTC (permalink / raw)
To: Jacopo Mondi
Cc: Dafna Hirschfeld, Laurent Pinchart, Mauro Carvalho Chehab,
Heiko Stuebner, linux-media, linux-rockchip, linux-arm-kernel,
linux-kernel
In-Reply-To: <acP7qpa8TxGLKFiw@zed>
Hi
2026. 03. 25. 16:21 keltezéssel, Jacopo Mondi írta:
> Hi Barnabás
>
> On Mon, Mar 23, 2026 at 03:02:16PM +0100, Barnabás Pőcze wrote:
>> The CAC block implements chromatic aberration correction. Expose it to
>> userspace using the extensible parameters format. This was tested on the
>> i.MX8MP platform, but based on available documentation it is also present
>> in the RK3399 variant (V10). Thus presumably also in later versions,
>> so no feature flag is introduced.
>>
>> Signed-off-by: Barnabás Pőcze <barnabas.pocze@ideasonboard.com>
>
> Only minors..
>
>> ---
>> .../platform/rockchip/rkisp1/rkisp1-params.c | 69 ++++++++++++
>> .../platform/rockchip/rkisp1/rkisp1-regs.h | 21 +++-
>> include/uapi/linux/rkisp1-config.h | 106 +++++++++++++++++-
>> 3 files changed, 193 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
>> index 6442436a5e428..b889af9dcee45 100644
>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c
>> @@ -64,6 +64,7 @@ union rkisp1_ext_params_config {
>> struct rkisp1_ext_params_compand_bls_config compand_bls;
>> struct rkisp1_ext_params_compand_curve_config compand_curve;
>> struct rkisp1_ext_params_wdr_config wdr;
>> + struct rkisp1_ext_params_cac_config cac;
>> };
>>
>> enum rkisp1_params_formats {
>> @@ -1413,6 +1414,48 @@ static void rkisp1_wdr_config(struct rkisp1_params *params,
>> RKISP1_CIF_ISP_WDR_TONE_CURVE_YM_MASK);
>> }
>>
>> +static void
>> +rkisp1_cac_config(struct rkisp1_params *params,
>> + const struct rkisp1_cif_isp_cac_config *arg)
>
> Fits in one line without going over 80 cols
This is what the other functions looks like, so went this this.
>
>> +{
>> + u32 regval;
>> +
>> + /*
>> + * The enable bit is in the same register (RKISP1_CIF_ISP_CAC_CTRL),
>> + * so only set the clipping mode, and do not modify the other bits.
>> + */
>> + regval = rkisp1_read(params->rkisp1, RKISP1_CIF_ISP_CAC_CTRL);
>> + regval &= ~(RKISP1_CIF_ISP_CAC_CTRL_H_CLIP_MODE |
>> + RKISP1_CIF_ISP_CAC_CTRL_V_CLIP_MODE);
>> + regval |= FIELD_PREP(RKISP1_CIF_ISP_CAC_CTRL_H_CLIP_MODE, arg->h_clip_mode) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_CTRL_V_CLIP_MODE, arg->v_clip_mode);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_CTRL, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_COUNT_START_H_MASK, arg->h_count_start) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_COUNT_START_V_MASK, arg->v_count_start);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_COUNT_START, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_A_RED_MASK, arg->red[0]) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_A_BLUE_MASK, arg->blue[0]);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_A, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_B_RED_MASK, arg->red[1]) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_B_BLUE_MASK, arg->blue[1]);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_B, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_C_RED_MASK, arg->red[2]) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_C_BLUE_MASK, arg->blue[2]);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_C, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_X_NORM_NF_MASK, arg->x_nf) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_X_NORM_NS_MASK, arg->x_ns);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_X_NORM, regval);
>> +
>> + regval = FIELD_PREP(RKISP1_CIF_ISP_CAC_Y_NORM_NF_MASK, arg->y_nf) |
>> + FIELD_PREP(RKISP1_CIF_ISP_CAC_Y_NORM_NS_MASK, arg->y_ns);
>> + rkisp1_write(params->rkisp1, RKISP1_CIF_ISP_CAC_Y_NORM, regval);
>> +}
>> +
>> static void
>> rkisp1_isp_isr_other_config(struct rkisp1_params *params,
>> const struct rkisp1_params_cfg *new_params)
>> @@ -2089,6 +2132,25 @@ static void rkisp1_ext_params_wdr(struct rkisp1_params *params,
>> RKISP1_CIF_ISP_WDR_CTRL_ENABLE);
>> }
>>
>> +static void rkisp1_ext_params_cac(struct rkisp1_params *params,
>> + const union rkisp1_ext_params_config *block)
>> +{
>> + const struct rkisp1_ext_params_cac_config *cac = &block->cac;
>> +
>> + if (cac->header.flags & RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE) {
>> + rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CAC_CTRL,
>> + RKISP1_CIF_ISP_CAC_CTRL_ENABLE);
>> + return;
>> + }
>> +
>> + rkisp1_cac_config(params, &cac->config);
>> +
>> + if ((cac->header.flags & RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE) &&
>> + !(params->enabled_blocks & BIT(cac->header.type)))
>> + rkisp1_param_set_bits(params, RKISP1_CIF_ISP_CAC_CTRL,
>> + RKISP1_CIF_ISP_CAC_CTRL_ENABLE);
>> +}
>> +
>> typedef void (*rkisp1_block_handler)(struct rkisp1_params *params,
>> const union rkisp1_ext_params_config *config);
>>
>> @@ -2185,6 +2247,10 @@ static const struct rkisp1_ext_params_handler {
>> .handler = rkisp1_ext_params_wdr,
>> .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS,
>> },
>> + [RKISP1_EXT_PARAMS_BLOCK_TYPE_CAC] = {
>> + .handler = rkisp1_ext_params_cac,
>> + .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS,
>> + },
>> };
>>
>> #define RKISP1_PARAMS_BLOCK_INFO(block, data) \
>> @@ -2215,6 +2281,7 @@ rkisp1_ext_params_block_types_info[] = {
>> RKISP1_PARAMS_BLOCK_INFO(COMPAND_EXPAND, compand_curve),
>> RKISP1_PARAMS_BLOCK_INFO(COMPAND_COMPRESS, compand_curve),
>> RKISP1_PARAMS_BLOCK_INFO(WDR, wdr),
>> + RKISP1_PARAMS_BLOCK_INFO(CAC, cac),
>> };
>>
>> static_assert(ARRAY_SIZE(rkisp1_ext_params_handlers) ==
>> @@ -2474,6 +2541,8 @@ void rkisp1_params_disable(struct rkisp1_params *params)
>> rkisp1_ie_enable(params, false);
>> rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_DPF_MODE,
>> RKISP1_CIF_ISP_DPF_MODE_EN);
>> + rkisp1_param_clear_bits(params, RKISP1_CIF_ISP_CAC_CTRL,
>> + RKISP1_CIF_ISP_CAC_CTRL_ENABLE);
>> }
>>
>> static const struct rkisp1_params_ops rkisp1_v10_params_ops = {
>> diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
>> index fbeb186cde0d5..8e25537459bbd 100644
>> --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
>> +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h
>> @@ -724,6 +724,23 @@
>> #define RKISP1_CIF_ISP_WDR_DMIN_STRENGTH_MASK GENMASK(20, 16)
>> #define RKISP1_CIF_ISP_WDR_DMIN_STRENGTH_MAX 16U
>>
>> +/* CAC */
>> +#define RKISP1_CIF_ISP_CAC_CTRL_ENABLE BIT(0)
>> +#define RKISP1_CIF_ISP_CAC_CTRL_V_CLIP_MODE GENMASK(2, 1)
>> +#define RKISP1_CIF_ISP_CAC_CTRL_H_CLIP_MODE GENMASK(3, 3)
>> +#define RKISP1_CIF_ISP_CAC_COUNT_START_H_MASK GENMASK(12, 0)
>> +#define RKISP1_CIF_ISP_CAC_COUNT_START_V_MASK GENMASK(28, 16)
>> +#define RKISP1_CIF_ISP_CAC_A_RED_MASK GENMASK(8, 0)
>> +#define RKISP1_CIF_ISP_CAC_A_BLUE_MASK GENMASK(24, 16)
>> +#define RKISP1_CIF_ISP_CAC_B_RED_MASK GENMASK(8, 0)
>> +#define RKISP1_CIF_ISP_CAC_B_BLUE_MASK GENMASK(24, 16)
>> +#define RKISP1_CIF_ISP_CAC_C_RED_MASK GENMASK(8, 0)
>> +#define RKISP1_CIF_ISP_CAC_C_BLUE_MASK GENMASK(24, 16)
>
> All these masks for coefficients 0, 1 and 2 are identical. Maybe
> #define RKISP1_CIF_ISP_CAC_RED_MASK GENMASK(8, 0)
> #define RKISP1_CIF_ISP_CAC_BLUE_MASK GENMASK(24, 16)
>
> is enough
Adjusted.
>
>> +#define RKISP1_CIF_ISP_CAC_X_NORM_NF_MASK GENMASK(4, 0)
>> +#define RKISP1_CIF_ISP_CAC_X_NORM_NS_MASK GENMASK(19, 16)
>> +#define RKISP1_CIF_ISP_CAC_Y_NORM_NF_MASK GENMASK(4, 0)
>> +#define RKISP1_CIF_ISP_CAC_Y_NORM_NS_MASK GENMASK(19, 16)
Did the same with these as well.
>> +
>> /* =================================================================== */
>> /* CIF Registers */
>> /* =================================================================== */
>> @@ -1196,8 +1213,8 @@
>> #define RKISP1_CIF_ISP_CAC_A (RKISP1_CIF_ISP_CAC_BASE + 0x00000008)
>> #define RKISP1_CIF_ISP_CAC_B (RKISP1_CIF_ISP_CAC_BASE + 0x0000000c)
>> #define RKISP1_CIF_ISP_CAC_C (RKISP1_CIF_ISP_CAC_BASE + 0x00000010)
>> -#define RKISP1_CIF_ISP_X_NORM (RKISP1_CIF_ISP_CAC_BASE + 0x00000014)
>> -#define RKISP1_CIF_ISP_Y_NORM (RKISP1_CIF_ISP_CAC_BASE + 0x00000018)
>> +#define RKISP1_CIF_ISP_CAC_X_NORM (RKISP1_CIF_ISP_CAC_BASE + 0x00000014)
>> +#define RKISP1_CIF_ISP_CAC_Y_NORM (RKISP1_CIF_ISP_CAC_BASE + 0x00000018)
>>
>> #define RKISP1_CIF_ISP_EXP_BASE 0x00002600
>> #define RKISP1_CIF_ISP_EXP_CTRL (RKISP1_CIF_ISP_EXP_BASE + 0x00000000)
>> diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h
>> index b2d2a71f7baff..d8acccaddd0e9 100644
>> --- a/include/uapi/linux/rkisp1-config.h
>> +++ b/include/uapi/linux/rkisp1-config.h
>> @@ -967,6 +967,92 @@ struct rkisp1_cif_isp_wdr_config {
>> __u8 use_iref;
>> };
>>
>> +/*
>> + * enum rkisp1_cif_isp_cac_h_clip_mode - horizontal clipping mode
>> + *
>> + * @RKISP1_CIF_ISP_CAC_H_CLIP_MODE_4PX: +/- 4 pixels
>> + * @RKISP1_CIF_ISP_CAC_H_CLIP_MODE_4_5PX: +/- 4/5 pixels depending on bayer position
>> + */
>> +enum rkisp1_cif_isp_cac_h_clip_mode {
>> + RKISP1_CIF_ISP_CAC_H_CLIP_MODE_4PX = 0,
>> + RKISP1_CIF_ISP_CAC_H_CLIP_MODE_4_5PX = 1,
>> +};
>> +
>> +/**
>> + * enum rkisp1_cif_isp_cac_v_clip_mode - vertical clipping mode
>> + *
>> + * @RKISP1_CIF_ISP_CAC_V_CLIP_MODE_2PX: +/- 2 pixels
>> + * @RKISP1_CIF_ISP_CAC_V_CLIP_MODE_3PX: +/- 3 pixels
>> + * @RKISP1_CIF_ISP_CAC_V_CLIP_MODE_3_4PX: +/- 3/4 pixels depending on bayer position
>> + */
>> +enum rkisp1_cif_isp_cac_v_clip_mode {
>> + RKISP1_CIF_ISP_CAC_V_CLIP_MODE_2PX = 0,
>> + RKISP1_CIF_ISP_CAC_V_CLIP_MODE_3PX = 1,
>> + RKISP1_CIF_ISP_CAC_V_CLIP_MODE_3_4PX = 2,
>> +};
>> +
>> +/**
>> + * struct rkisp1_cif_isp_cac_config - chromatic aberration correction configuration
>> + *
>> + * The correction is carried out by shifting the red and blue pixels relative
>> + * to the green ones, depending on the distance from the optical center:
>
> Yes, the distance to the center is one parameter, but the shifting
> amount depends on other things. I would drop the last part of the
> sentence and move the description of the two below fields after the
> text
That's true, but within a specific image, the only varying quantity
is the distance, so I think it is important to emphasize that.
And I also quite like this structure of
- description of step
- parameters of step
- description of step
...
so I would love to keep it like this, if that's ok?
>
>> + *
>> + * @h_count_start: horizontal coordinate of the optical center (13-bit unsigned integer; [1,8191])
>> + * @v_count_start: vertical coordinate of the optical center (13-bit unsigned integer; [1,8191])
>
> so these could go just before @x_nf
>
>> + *
>> + * For each pixel, the x/y distances from the optical center are calculated and
>
> I forgot: did we establish that the correction is applied to the
> euclidean distance or to x and y separately ?
Given that there are two sets of "normalization" parameters, the assumption is that
at least the x/y distances are transformed separately. I see two reasonable choices
after that: (a) use the two distances separately, (b) use the radial distance. The
documentation says (b). However, testing with sensor test patterns suggests that
it is not the case (a horizontal/vertical boundary between appropriately colored
regions should have a curvature after the transformation with appropriate parameters).
>
>> + * then transformed into the [0,255] range based on the following formula:
>
> s/transformed/normalized ?
To be honest I vastly prefer "transform" / "map" over "normalize" here.
>
>> + *
>> + * (((d << 4) >> s) * f) >> 5
>> + *
>> + * where `d` is the distance, `s` and `f` are the normalization parameters:
>
> Can you use 'ns' and 'nf' to match the below ?
Adjusted.
>
>> + *
>> + * @x_nf: horizontal normalization scale parameter (5-bit unsigned integer; [0,31])
>> + * @x_ns: horizontal normalization shift parameter (4-bit unsigned integer; [0,15])
>> + *
>> + * @y_nf: vertical normalization scale parameter (5-bit unsigned integer; [0,31])
>> + * @y_ns: vertical normalization shift parameter (4-bit unsigned integer; [0,15])
>> + *
>> + * These parameters should be chosen based on the image resolution, the position
>> + * of the optical center, and the shape of pixels: so that no normalized distance
>
> s/pixels:/pixels/
Replaced `:` with `,`.
>
>> + * is larger than 255. If the pixels have square shape, the two sets of parameters
>> + * should be equal.
>> + *
>> + * The actual amount of correction is calculated with a third degree polynomial:
>> + *
>> + * c[0] * r + c[1] * r^2 + c[2] * r^3
>> + *
>> + * where `c` is the set of coefficients for the given color, and `r` is distance:
>> + *
>> + * @red: red coefficients (5.4 two's complement; [-16,15.9375])
>> + * @blue: blue coefficients (5.4 two's complement; [-16,15.9375])
>> + *
>> + * Finally, the amount is clipped as requested:
>> + *
>> + * @h_clip_mode: maximum horizontal shift (from enum rkisp1_cif_isp_cac_h_clip_mode)
>> + * @v_clip_mode: maximum vertical shift (from enum rkisp1_cif_isp_cac_v_clip_mode)
>> + *
>> + * A positive result will shift away from the optical center, while a negative
>> + * one will shift towards the optical center. In the latter case, the pixel
>> + * values at the edges are duplicated.
>> + */
>> +struct rkisp1_cif_isp_cac_config {
>> + __u8 h_clip_mode;
>> + __u8 v_clip_mode;
>> +
>> + __u16 h_count_start;
>> + __u16 v_count_start;
>> +
>> + __u16 red[3];
>> + __u16 blue[3];
>> +
>> + __u8 x_nf;
>> + __u8 x_ns;
>> +
>> + __u8 y_nf;
>> + __u8 y_ns;
>> +};
>> +
>> /*---------- PART2: Measurement Statistics ------------*/
>>
>> /**
>> @@ -1161,6 +1247,7 @@ enum rkisp1_ext_params_block_type {
>> RKISP1_EXT_PARAMS_BLOCK_TYPE_COMPAND_EXPAND,
>> RKISP1_EXT_PARAMS_BLOCK_TYPE_COMPAND_COMPRESS,
>> RKISP1_EXT_PARAMS_BLOCK_TYPE_WDR,
>> + RKISP1_EXT_PARAMS_BLOCK_TYPE_CAC,
>> };
>>
>> /* For backward compatibility */
>> @@ -1507,6 +1594,22 @@ struct rkisp1_ext_params_wdr_config {
>> struct rkisp1_cif_isp_wdr_config config;
>> } __attribute__((aligned(8)));
>>
>> +/**
>> + * struct rkisp1_ext_params_cac_config - RkISP1 extensible params CAC config
>> + *
>> + * RkISP1 extensible parameters CAC block.
>> + * Identified by :c:type:`RKISP1_EXT_PARAMS_BLOCK_TYPE_CAC`.
>> + *
>> + * @header: The RkISP1 extensible parameters header, see
>> + * :c:type:`rkisp1_ext_params_block_header`
>> + * @config: CAC configuration, see
>> + * :c:type:`rkisp1_cif_isp_cac_config`
>> + */
>> +struct rkisp1_ext_params_cac_config {
>> + struct rkisp1_ext_params_block_header header;
>> + struct rkisp1_cif_isp_cac_config config;
>> +} __attribute__((aligned(8)));
>> +
>> /*
>> * The rkisp1_ext_params_compand_curve_config structure is counted twice as it
>> * is used for both the COMPAND_EXPAND and COMPAND_COMPRESS block types.
>> @@ -1532,7 +1635,8 @@ struct rkisp1_ext_params_wdr_config {
>> sizeof(struct rkisp1_ext_params_compand_bls_config) +\
>> sizeof(struct rkisp1_ext_params_compand_curve_config) +\
>> sizeof(struct rkisp1_ext_params_compand_curve_config) +\
>> - sizeof(struct rkisp1_ext_params_wdr_config))
>> + sizeof(struct rkisp1_ext_params_wdr_config) +\
>> + sizeof(struct rkisp1_ext_params_cac_config))
>
> All minors, please add
> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
>
> Thanks
> j
>
>>
>> /**
>> * enum rksip1_ext_param_buffer_version - RkISP1 extensible parameters version
>> --
>> 2.53.0
>>
>>
^ permalink raw reply
* Re: [PATCH v4 1/3] kernel: ksysfs: initialize kernel_kobj earlier
From: Danilo Krummrich @ 2026-03-30 14:34 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Rafael J. Wysocki,
Andy Shevchenko, Daniel Scally, Heikki Krogerus, Sakari Ailus,
Aaro Koskinen, Janusz Krzysztofik, Tony Lindgren, Russell King,
Dmitry Torokhov, Kevin Hilman, Arnd Bergmann, driver-core,
linux-kernel, linux-acpi, linux-arm-kernel, linux-omap
In-Reply-To: <CAMRc=Mf3oWtrcdR+g69b8y4K-gwfMe+3LNMYQ6c6M-hw3Nh+Hw@mail.gmail.com>
On Mon Mar 30, 2026 at 4:19 PM CEST, Bartosz Golaszewski wrote:
> On Mon, Mar 30, 2026 at 3:47 PM Danilo Krummrich <dakr@kernel.org> wrote:
>>
>> On Mon Mar 30, 2026 at 2:40 PM CEST, Bartosz Golaszewski wrote:
>> > diff --git a/include/linux/kobject.h b/include/linux/kobject.h
>> > index c8219505a79f98bc370e52997efc8af51833cfda..71b9086621c35b7e4ef99b9d3b6707db23faf58c 100644
>> > --- a/include/linux/kobject.h
>> > +++ b/include/linux/kobject.h
>> > @@ -219,4 +219,6 @@ int kobject_synth_uevent(struct kobject *kobj, const char *buf, size_t count);
>> > __printf(2, 3)
>> > int add_uevent_var(struct kobj_uevent_env *env, const char *format, ...);
>> >
>> > +void ksysfs_init(void);
>>
>> NIT: I'm aware there's also all the core kobjects in include/linux/kobject.h,
>> but maybe a separate header would be a better fit.
>
> Do you mean moving all the top-level kobject declarations
> (kernel_kobj, firmware_kobj, etc.) out of kobject.h into this new
> header (ksysfs.h?) along with their init functions?
I think the top-level kobjects are fine; it's just ksysfs_init() that somehow
feels odd to me being placed in kobject.h.
The top-level kobject do make sense as they are the base for a lot of other
kobjects being created by other core code.
Whereas ksysfs_init() is a ksysfs specific thing that is only ever used by
init/main.c, i.e. other than the top-level kobjects, it has nothing to do with
the kobject API itself.
^ permalink raw reply
* Re: [PATCH] usb: phy: mxs: manually reset phy regs after a warm reset
From: Frank Li @ 2026-03-30 14:33 UTC (permalink / raw)
To: Xu Yang
Cc: gregkh, s.hauer, kernel, festevam, linux-usb, imx,
linux-arm-kernel, linux-kernel
In-Reply-To: <20260330093133.973785-1-xu.yang_2@nxp.com>
On Mon, Mar 30, 2026 at 05:31:33PM +0800, Xu Yang wrote:
> The usb phy registers are not fully reset on warm reset under stress
> conditions. We need to manually reset those (CTRL, PWD, DEBUG, PLL_SIC)
Avoid the words "we ..."
So need manually reset CTRL, PWD, DEBUG, PLL_SIC ...
> regs after a warm reset. This will reset DEBUG and PLL_SIC registers.
> CTRL and PWD register are handled by "SFT" bit in stmp_reset_block().
>
> ERR051269: USB PHY registers not fully resetting on warm reset under
> stress conditions
>
> The following USB PHY registers must be written by SW to restore the reset
> value after a warm reset:
>
> Reg: ctrl Addr: 0x29910030 Data: 0xc000_0000
> Reg: pwd Addr: 0x29910000 Data: 0x001e_1c00
> Reg: debug0 Addr: 0x29910050 Data: 0x7f18_0000
> Reg: pll_sic Addr: 0x299100a0 Data: 0x00d1_2000
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
> ---
> drivers/usb/phy/phy-mxs-usb.c | 32 +++++++++++++++++++++++++++++---
> 1 file changed, 29 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 7069dd3f4d0d..dd42db8a0829 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -209,6 +209,9 @@ static const struct mxs_phy_data imx6ul_phy_data = {
> static const struct mxs_phy_data imx7ulp_phy_data = {
> };
>
> +static const struct mxs_phy_data imx8ulp_phy_data = {
> +};
> +
> static const struct of_device_id mxs_phy_dt_ids[] = {
> { .compatible = "fsl,imx6sx-usbphy", .data = &imx6sx_phy_data, },
> { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
> @@ -217,6 +220,7 @@ static const struct of_device_id mxs_phy_dt_ids[] = {
> { .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, },
> { .compatible = "fsl,imx6ul-usbphy", .data = &imx6ul_phy_data, },
> { .compatible = "fsl,imx7ulp-usbphy", .data = &imx7ulp_phy_data, },
> + { .compatible = "fsl,imx8ulp-usbphy", .data = &imx8ulp_phy_data, },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> @@ -248,6 +252,11 @@ static inline bool is_imx7ulp_phy(struct mxs_phy *mxs_phy)
> return mxs_phy->data == &imx7ulp_phy_data;
> }
>
> +static inline bool is_imx8ulp_phy(struct mxs_phy *mxs_phy)
> +{
> + return mxs_phy->data == &imx8ulp_phy_data;
don't use this kind check.
Add field 'need_reset_reg' in mxs_phy_data
imx8ulp_phy_data = {
.need_reset_reg = true;
}
if (mxs->data->need_reset_reg)
...
The same logic for
if (is_imx7ulp_phy(mxs_phy) || is_imx8ulp_phy(mxs_phy))
mxs_phy_pll_enable(phy->io_priv, false);
add 'need_phy_pull_enable' in mxs_phy_data. (new patch for it)
set it true at both imx7ulp_phy_data and imx8ulp_phy_data.
Frank
> +}
> +
> static inline bool is_imx6ul_phy(struct mxs_phy *mxs_phy)
> {
> return mxs_phy->data == &imx6ul_phy_data;
> @@ -305,12 +314,29 @@ static int mxs_phy_pll_enable(void __iomem *base, bool enable)
> return ret;
> }
>
> +/*
> + * The imx8ulp phy registers are not properly reset after a warm
> + * reset (ERR051269). Using the following steps to reset DEBUG and
> + * PLL_SIC regs. CTRL and PWD regs are reset by "SFT" bit in
> + * stmp_reset_block().
> + */
> +static void mxs_phy_regs_reset(void __iomem *base)
> +{
> + writel(0x7f180000, base + HW_USBPHY_DEBUG_SET);
> + writel(~0x7f180000, base + HW_USBPHY_DEBUG_CLR);
> + writel(0x00d12000, base + HW_USBPHY_PLL_SIC_SET);
> + writel(~0x00d12000, base + HW_USBPHY_PLL_SIC_CLR);
> +}
> +
> static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
> {
> int ret;
> void __iomem *base = mxs_phy->phy.io_priv;
>
> - if (is_imx7ulp_phy(mxs_phy)) {
> + if (is_imx8ulp_phy(mxs_phy))
> + mxs_phy_regs_reset(base);
> +
> + if (is_imx7ulp_phy(mxs_phy) || is_imx8ulp_phy(mxs_phy)) {
> ret = mxs_phy_pll_enable(base, true);
> if (ret)
> return ret;
> @@ -368,7 +394,7 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
> return 0;
>
> disable_pll:
> - if (is_imx7ulp_phy(mxs_phy))
> + if (is_imx7ulp_phy(mxs_phy) || is_imx8ulp_phy(mxs_phy))
> mxs_phy_pll_enable(base, false);
> return ret;
> }
> @@ -487,7 +513,7 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
> writel(BM_USBPHY_CTRL_CLKGATE,
> phy->io_priv + HW_USBPHY_CTRL_SET);
>
> - if (is_imx7ulp_phy(mxs_phy))
> + if (is_imx7ulp_phy(mxs_phy) || is_imx8ulp_phy(mxs_phy))
> mxs_phy_pll_enable(phy->io_priv, false);
>
> if (mxs_phy->phy_3p0)
> --
> 2.34.1
>
^ permalink raw reply
* [PATCH v12 06/15] kasan: arm64: x86: Make page_to_virt() KASAN aware
From: Maciej Wieczor-Retman @ 2026-03-30 14:33 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Andrey Ryabinin,
Alexander Potapenko, Andrey Konovalov, Dmitry Vyukov,
Vincenzo Frascino, Andrew Morton, David Hildenbrand,
Lorenzo Stoakes, Liam R. Howlett, Vlastimil Babka, Mike Rapoport,
Suren Baghdasaryan, Michal Hocko
Cc: m.wieczorretman, Maciej Wieczor-Retman, linux-arm-kernel,
linux-kernel, kasan-dev, linux-mm
In-Reply-To: <cover.1774872838.git.m.wieczorretman@pm.me>
From: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Special page_to_virt() implementation is needed if an architecture wants
to enable KASAN software tag-based mode.
Make page_to_virt() KASAN aware in arch-independent code so
architectures implementing the software tag-based mode don't have to
define their own implementations anymore. When KASAN is disabled or for
architectures that don't implement the software tag-based mode
page_to_virt() will be optimized to it's previous form.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
---
Changelog v11:
- Redo the patch to work on the page_to_virt macro. Split off changes
about virt to phys conversion to an earlier patch.
- Remove Alexander's acked-by due to bigger changes.
Changelog v7:
- Add Alexander's Acked-by tag.
Changelog v5:
- Move __tag_reset() calls into __phys_addr_nodebug() and
__virt_addr_valid() instead of calling it on the arguments of higher
level functions.
Changelog v4:
- Simplify page_to_virt() by removing pointless casts.
- Remove change in __is_canonical_address() because it's taken care of
in a later patch due to a LAM compatible definition of canonical.
arch/arm64/include/asm/memory.h | 5 -----
include/linux/kasan.h | 10 ++++++++++
include/linux/mm.h | 5 ++++-
3 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 875c0bd0d85a..39dd0071d3ec 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -411,11 +411,6 @@ static inline unsigned long virt_to_pfn(const void *kaddr)
*/
#if defined(CONFIG_DEBUG_VIRTUAL)
-#define page_to_virt(x) ({ \
- __typeof__(x) __page = x; \
- void *__addr = __va(page_to_phys(__page)); \
- (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
-})
#define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
#else
#define page_to_virt(x) ({ \
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index e18908f3ad6e..271c59e9f422 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -527,6 +527,11 @@ static inline void *kasan_reset_tag(const void *addr)
return (void *)arch_kasan_reset_tag(addr);
}
+static inline void *kasan_set_tag(const void *addr, u8 tag)
+{
+ return (void *)arch_kasan_set_tag(addr, tag);
+}
+
/**
* kasan_report - print a report about a bad memory access detected by KASAN
* @addr: address of the bad access
@@ -544,6 +549,11 @@ static inline void *kasan_reset_tag(const void *addr)
return (void *)addr;
}
+static inline void *kasan_set_tag(const void *addr, u8 tag)
+{
+ return (void *)addr;
+}
+
#endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS*/
#ifdef CONFIG_KASAN_HW_TAGS
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 09044934dda8..f234650a4edf 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -117,7 +117,10 @@ extern int mmap_rnd_compat_bits __read_mostly;
#endif
#ifndef page_to_virt
-#define page_to_virt(x) __va(PFN_PHYS(page_to_pfn(x)))
+#define page_to_virt(x) ({ \
+ void *__addr = __va(PFN_PHYS(page_to_pfn((struct page *)x))); \
+ kasan_set_tag(__addr, page_kasan_tag(x)); \
+})
#endif
#ifndef lm_alias
--
2.53.0
^ permalink raw reply related
* [PATCH v12 02/15] kasan: arm64: x86: Make special tags arch specific
From: Maciej Wieczor-Retman @ 2026-03-30 14:33 UTC (permalink / raw)
To: Andrey Ryabinin, Alexander Potapenko, Andrey Konovalov,
Dmitry Vyukov, Vincenzo Frascino, Catalin Marinas, Will Deacon,
Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen, x86,
H. Peter Anvin, Andrew Morton, David Hildenbrand, Lorenzo Stoakes,
Liam R. Howlett, Vlastimil Babka, Mike Rapoport,
Suren Baghdasaryan, Michal Hocko
Cc: m.wieczorretman, Samuel Holland, Maciej Wieczor-Retman,
linux-kernel, kasan-dev, linux-arm-kernel, linux-mm
In-Reply-To: <cover.1774872838.git.m.wieczorretman@pm.me>
From: Samuel Holland <samuel.holland@sifive.com>
KASAN's tag-based mode defines multiple special tag values. They're
reserved for:
- Native kernel value. On arm64 it's 0xFF and it causes an early return
in the tag checking function.
- Invalid value. 0xFE marks an area as freed / unallocated. It's also
the value that is used to initialize regions of shadow memory.
- Min and max values. 0xFD is the highest value that can be randomly
generated for a new tag. 0 is the minimal value with the exception of
arm64's hardware mode where it is equal to 0xF0.
Metadata macro is also defined:
- Tag width equal to 8.
Tag-based mode on x86 is going to use 4 bit wide tags so all the above
values need to be changed accordingly.
Make tag width and native kernel tag arch specific for x86 and arm64.
Base the invalid tag value and the max value on the native kernel tag
since they follow the same pattern on both mentioned architectures.
Also generalize KASAN_SHADOW_INIT and 0xff used in various
page_kasan_tag* helpers.
Give KASAN_TAG_MIN the default value of zero, and move the special value
for hw_tags arm64 to its arch specific kasan-tags.h.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Co-developed-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Acked-by: Will Deacon <will@kernel.org> (for the arm part)
Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com>
Reviewed-by: Andrey Ryabinin <ryabinin.a.a@gmail.com>
---
Changelog v9:
- Add Andrey Ryabinin's Reviewed-by tag.
- Add Andrey Konovalov's Reviewed-by tag.
Changelog v8:
- Add Will's Acked-by tag.
Changelog v7:
- Reorder defines of arm64 tag width to prevent redefinition warnings.
- Remove KASAN_TAG_MASK so it's only defined in mmzone.h (Andrey
Konovalov)
- Merge the 'support tag widths less than 8 bits' with this patch since
they do similar things and overwrite each other. (Alexander)
Changelog v6:
- Add hardware tags KASAN_TAG_WIDTH value to the arm64 arch file.
- Keep KASAN_TAG_MASK in the mmzone.h.
- Remove ifndef from KASAN_SHADOW_INIT.
Changelog v5:
- Move KASAN_TAG_MIN to the arm64 kasan-tags.h for the hardware KASAN
mode case.
Changelog v4:
- Move KASAN_TAG_MASK to kasan-tags.h.
Changelog v2:
- Remove risc-v from the patch.
MAINTAINERS | 2 +-
arch/arm64/include/asm/kasan-tags.h | 14 ++++++++++++++
arch/arm64/include/asm/kasan.h | 2 --
arch/arm64/include/asm/uaccess.h | 1 +
arch/x86/include/asm/kasan-tags.h | 9 +++++++++
include/linux/kasan-tags.h | 19 ++++++++++++++-----
include/linux/kasan.h | 3 +--
include/linux/mm.h | 6 +++---
include/linux/page-flags-layout.h | 9 +--------
9 files changed, 44 insertions(+), 21 deletions(-)
create mode 100644 arch/arm64/include/asm/kasan-tags.h
create mode 100644 arch/x86/include/asm/kasan-tags.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 16874c32e288..897210732d30 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13735,7 +13735,7 @@ L: kasan-dev@googlegroups.com
S: Maintained
B: https://bugzilla.kernel.org/buglist.cgi?component=Sanitizers&product=Memory%20Management
F: Documentation/dev-tools/kasan.rst
-F: arch/*/include/asm/*kasan.h
+F: arch/*/include/asm/*kasan*.h
F: arch/*/mm/kasan_init*
F: include/linux/kasan*.h
F: lib/Kconfig.kasan
diff --git a/arch/arm64/include/asm/kasan-tags.h b/arch/arm64/include/asm/kasan-tags.h
new file mode 100644
index 000000000000..259952677443
--- /dev/null
+++ b/arch/arm64/include/asm/kasan-tags.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_KASAN_TAGS_H
+#define __ASM_KASAN_TAGS_H
+
+#define KASAN_TAG_KERNEL 0xFF /* native kernel pointers tag */
+
+#ifdef CONFIG_KASAN_HW_TAGS
+#define KASAN_TAG_MIN 0xF0 /* minimum value for random tags */
+#define KASAN_TAG_WIDTH 4
+#else
+#define KASAN_TAG_WIDTH 8
+#endif
+
+#endif /* ASM_KASAN_TAGS_H */
diff --git a/arch/arm64/include/asm/kasan.h b/arch/arm64/include/asm/kasan.h
index b167e9d3da91..fd4a8557d736 100644
--- a/arch/arm64/include/asm/kasan.h
+++ b/arch/arm64/include/asm/kasan.h
@@ -6,8 +6,6 @@
#include <linux/linkage.h>
#include <asm/memory.h>
-#include <asm/mte-kasan.h>
-#include <asm/pgtable-types.h>
#define arch_kasan_set_tag(addr, tag) __tag_set(addr, tag)
#define arch_kasan_reset_tag(addr) __tag_reset(addr)
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 9810106a3f66..5465bc97ccdd 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -22,6 +22,7 @@
#include <asm/cpufeature.h>
#include <asm/mmu.h>
#include <asm/mte.h>
+#include <asm/mte-kasan.h>
#include <asm/ptrace.h>
#include <asm/memory.h>
#include <asm/extable.h>
diff --git a/arch/x86/include/asm/kasan-tags.h b/arch/x86/include/asm/kasan-tags.h
new file mode 100644
index 000000000000..68ba385bc75c
--- /dev/null
+++ b/arch/x86/include/asm/kasan-tags.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_KASAN_TAGS_H
+#define __ASM_KASAN_TAGS_H
+
+#define KASAN_TAG_KERNEL 0xF /* native kernel pointers tag */
+
+#define KASAN_TAG_WIDTH 4
+
+#endif /* ASM_KASAN_TAGS_H */
diff --git a/include/linux/kasan-tags.h b/include/linux/kasan-tags.h
index 4f85f562512c..ad5c11950233 100644
--- a/include/linux/kasan-tags.h
+++ b/include/linux/kasan-tags.h
@@ -2,13 +2,22 @@
#ifndef _LINUX_KASAN_TAGS_H
#define _LINUX_KASAN_TAGS_H
+#if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
+#include <asm/kasan-tags.h>
+#endif
+
+#ifndef KASAN_TAG_WIDTH
+#define KASAN_TAG_WIDTH 0
+#endif
+
+#ifndef KASAN_TAG_KERNEL
#define KASAN_TAG_KERNEL 0xFF /* native kernel pointers tag */
-#define KASAN_TAG_INVALID 0xFE /* inaccessible memory tag */
-#define KASAN_TAG_MAX 0xFD /* maximum value for random tags */
+#endif
+
+#define KASAN_TAG_INVALID (KASAN_TAG_KERNEL - 1) /* inaccessible memory tag */
+#define KASAN_TAG_MAX (KASAN_TAG_KERNEL - 2) /* maximum value for random tags */
-#ifdef CONFIG_KASAN_HW_TAGS
-#define KASAN_TAG_MIN 0xF0 /* minimum value for random tags */
-#else
+#ifndef KASAN_TAG_MIN
#define KASAN_TAG_MIN 0x00 /* minimum value for random tags */
#endif
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index fbff1b759c85..e18908f3ad6e 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -40,8 +40,7 @@ typedef unsigned int __bitwise kasan_vmalloc_flags_t;
/* Software KASAN implementations use shadow memory. */
#ifdef CONFIG_KASAN_SW_TAGS
-/* This matches KASAN_TAG_INVALID. */
-#define KASAN_SHADOW_INIT 0xFE
+#define KASAN_SHADOW_INIT KASAN_TAG_INVALID
#else
#define KASAN_SHADOW_INIT 0
#endif
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 633bbf9a184a..09044934dda8 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -2440,7 +2440,7 @@ static inline u8 page_kasan_tag(const struct page *page)
if (kasan_enabled()) {
tag = (page->flags.f >> KASAN_TAG_PGSHIFT) & KASAN_TAG_MASK;
- tag ^= 0xff;
+ tag ^= KASAN_TAG_KERNEL;
}
return tag;
@@ -2453,7 +2453,7 @@ static inline void page_kasan_tag_set(struct page *page, u8 tag)
if (!kasan_enabled())
return;
- tag ^= 0xff;
+ tag ^= KASAN_TAG_KERNEL;
old_flags = READ_ONCE(page->flags.f);
do {
flags = old_flags;
@@ -2472,7 +2472,7 @@ static inline void page_kasan_tag_reset(struct page *page)
static inline u8 page_kasan_tag(const struct page *page)
{
- return 0xff;
+ return KASAN_TAG_KERNEL;
}
static inline void page_kasan_tag_set(struct page *page, u8 tag) { }
diff --git a/include/linux/page-flags-layout.h b/include/linux/page-flags-layout.h
index 760006b1c480..b2cc4cb870e0 100644
--- a/include/linux/page-flags-layout.h
+++ b/include/linux/page-flags-layout.h
@@ -3,6 +3,7 @@
#define PAGE_FLAGS_LAYOUT_H
#include <linux/numa.h>
+#include <linux/kasan-tags.h>
#include <generated/bounds.h>
/*
@@ -72,14 +73,6 @@
#define NODE_NOT_IN_PAGE_FLAGS 1
#endif
-#if defined(CONFIG_KASAN_SW_TAGS)
-#define KASAN_TAG_WIDTH 8
-#elif defined(CONFIG_KASAN_HW_TAGS)
-#define KASAN_TAG_WIDTH 4
-#else
-#define KASAN_TAG_WIDTH 0
-#endif
-
#ifdef CONFIG_NUMA_BALANCING
#define LAST__PID_SHIFT 8
#define LAST__PID_MASK ((1 << LAST__PID_SHIFT)-1)
--
2.53.0
^ permalink raw reply related
* [PATCH v12 01/15] kasan: sw_tags: Use arithmetic shift for shadow computation
From: Maciej Wieczor-Retman @ 2026-03-30 14:33 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Jonathan Corbet, Shuah Khan,
Andrey Ryabinin, Alexander Potapenko, Andrey Konovalov,
Dmitry Vyukov, Vincenzo Frascino, Andrew Morton, Jan Kiszka,
Kieran Bingham, Nathan Chancellor, Nick Desaulniers,
Bill Wendling, Justin Stitt
Cc: m.wieczorretman, Samuel Holland, Maciej Wieczor-Retman,
linux-arm-kernel, linux-doc, linux-kernel, kasan-dev, workflows,
linux-mm, llvm
In-Reply-To: <cover.1774872838.git.m.wieczorretman@pm.me>
From: Samuel Holland <samuel.holland@sifive.com>
Currently, kasan_mem_to_shadow() uses a logical right shift, which turns
canonical kernel addresses into non-canonical addresses by clearing the
high KASAN_SHADOW_SCALE_SHIFT bits. The value of KASAN_SHADOW_OFFSET is
then chosen so that the addition results in a canonical address for the
shadow memory.
For KASAN_GENERIC, this shift/add combination is ABI with the compiler,
because KASAN_SHADOW_OFFSET is used in compiler-generated inline tag
checks[1], which must only attempt to dereference canonical addresses.
However, for KASAN_SW_TAGS there is some freedom to change the algorithm
without breaking the ABI. Because TBI is enabled for kernel addresses,
the top bits of shadow memory addresses computed during tag checks are
irrelevant, and so likewise are the top bits of KASAN_SHADOW_OFFSET.
This is demonstrated by the fact that LLVM uses a logical right shift in
the tag check fast path[2] but a sbfx (signed bitfield extract)
instruction in the slow path[3] without causing any issues.
Use an arithmetic shift in kasan_mem_to_shadow() as it provides a number
of benefits:
1) The memory layout doesn't change but is easier to understand.
KASAN_SHADOW_OFFSET becomes a canonical memory address, and the shifted
pointer becomes a negative offset, so KASAN_SHADOW_OFFSET ==
KASAN_SHADOW_END regardless of the shift amount or the size of the
virtual address space.
2) KASAN_SHADOW_OFFSET becomes a simpler constant, requiring only one
instruction to load instead of two. Since it must be loaded in each
function with a tag check, this decreases kernel text size by 0.5%.
3) This shift and the sign extension from kasan_reset_tag() can be
combined into a single sbfx instruction. When this same algorithm change
is applied to the compiler, it removes an instruction from each inline
tag check, further reducing kernel text size by an additional 4.6%.
These benefits extend to other architectures as well. On RISC-V, where
the baseline ISA does not shifted addition or have an equivalent to the
sbfx instruction, loading KASAN_SHADOW_OFFSET is reduced from 3 to 2
instructions, and kasan_mem_to_shadow(kasan_reset_tag(addr)) similarly
combines two consecutive right shifts.
Link: https://github.com/llvm/llvm-project/blob/llvmorg-20-init/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp#L1316 [1]
Link: https://github.com/llvm/llvm-project/blob/llvmorg-20-init/llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp#L895 [2]
Link: https://github.com/llvm/llvm-project/blob/llvmorg-20-init/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp#L669 [3]
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Co-developed-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
---
Changelog v11: (Maciej)
- Remove the arch_kasan_non_canonical_hook() scheme in favor of Andrey
Ryabinin's much nicer simple implementation.
Changelog v10: (Maciej)
- Update the Documentation/dev-tools/kasan.rst file with the changed
kasan_mem_to_shadow().
Changelog v9: (Maciej)
- Take out the arm64 related code from mm/kasan/report.c and put it in
the arch specific directory in a new file so the kasan_mem_to_shadow()
function can be included.
- Reset addr tag bits in arm64's arch_kasan_non_canonical_hook() so the
inline mode can also work with that function (Andrey Ryabinin).
- Fix incorrect number of zeros in a comment in mm/kasan/report.c.
- Remove Catalin's acked-by since changes were made.
Changelog v7: (Maciej)
- Change UL to ULL in report.c to fix some compilation warnings.
Changelog v6: (Maciej)
- Add Catalin's acked-by.
- Move x86 gdb snippet here from the last patch.
Changelog v5: (Maciej)
- (u64) -> (unsigned long) in report.c
Changelog v4: (Maciej)
- Revert x86 to signed mem_to_shadow mapping.
- Remove last two paragraphs since they were just poorer duplication of
the comments in kasan_non_canonical_hook().
Changelog v3: (Maciej)
- Fix scripts/gdb/linux/kasan.py so the new signed mem_to_shadow() is
reflected there.
- Fix Documentation/arch/arm64/kasan-offsets.sh to take new offsets into
account.
- Made changes to the kasan_non_canonical_hook() according to upstream
discussion. Settled on overflow on both ranges and separate checks for
x86 and arm.
Changelog v2: (Maciej)
- Correct address range that's checked in kasan_non_canonical_hook().
Adjust the comment inside.
- Remove part of comment from arch/arm64/include/asm/memory.h.
- Append patch message paragraph about the overflow in
kasan_non_canonical_hook().
Documentation/arch/arm64/kasan-offsets.sh | 8 ++++++--
Documentation/dev-tools/kasan.rst | 18 ++++++++++++------
arch/arm64/Kconfig | 10 +++++-----
arch/arm64/include/asm/memory.h | 14 +++++++++++++-
arch/arm64/mm/kasan_init.c | 7 +++++--
include/linux/kasan.h | 10 ++++++++--
mm/kasan/report.c | 16 ++++++++++++----
scripts/gdb/linux/kasan.py | 5 ++++-
scripts/gdb/linux/mm.py | 5 +++--
9 files changed, 68 insertions(+), 25 deletions(-)
diff --git a/Documentation/arch/arm64/kasan-offsets.sh b/Documentation/arch/arm64/kasan-offsets.sh
index 2dc5f9e18039..ce777c7c7804 100644
--- a/Documentation/arch/arm64/kasan-offsets.sh
+++ b/Documentation/arch/arm64/kasan-offsets.sh
@@ -5,8 +5,12 @@
print_kasan_offset () {
printf "%02d\t" $1
- printf "0x%08x00000000\n" $(( (0xffffffff & (-1 << ($1 - 1 - 32))) \
- - (1 << (64 - 32 - $2)) ))
+ if [[ $2 -ne 4 ]] then
+ printf "0x%08x00000000\n" $(( (0xffffffff & (-1 << ($1 - 1 - 32))) \
+ - (1 << (64 - 32 - $2)) ))
+ else
+ printf "0x%08x00000000\n" $(( (0xffffffff & (-1 << ($1 - 1 - 32))) ))
+ fi
}
echo KASAN_SHADOW_SCALE_SHIFT = 3
diff --git a/Documentation/dev-tools/kasan.rst b/Documentation/dev-tools/kasan.rst
index 4968b2aa60c8..b11c1be8dff4 100644
--- a/Documentation/dev-tools/kasan.rst
+++ b/Documentation/dev-tools/kasan.rst
@@ -315,13 +315,19 @@ translate a memory address to its corresponding shadow address.
Here is the function which translates an address to its corresponding shadow
address::
- static inline void *kasan_mem_to_shadow(const void *addr)
- {
- return (void *)((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT)
- + KASAN_SHADOW_OFFSET;
- }
+ static inline void *kasan_mem_to_shadow(const void *addr)
+ {
+ void *scaled;
-where ``KASAN_SHADOW_SCALE_SHIFT = 3``.
+ if (IS_ENABLED(CONFIG_KASAN_GENERIC))
+ scaled = (void *)((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT);
+ else
+ scaled = (void *)((long)addr >> KASAN_SHADOW_SCALE_SHIFT);
+
+ return KASAN_SHADOW_OFFSET + scaled;
+ }
+
+where for Generic KASAN ``KASAN_SHADOW_SCALE_SHIFT = 3``.
Compile-time instrumentation is used to insert memory access checks. Compiler
inserts function calls (``__asan_load*(addr)``, ``__asan_store*(addr)``) before
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index bcd9f5bc66e2..87239396ed23 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -434,11 +434,11 @@ config KASAN_SHADOW_OFFSET
default 0xdffffe0000000000 if ARM64_VA_BITS_42 && !KASAN_SW_TAGS
default 0xdfffffc000000000 if ARM64_VA_BITS_39 && !KASAN_SW_TAGS
default 0xdffffff800000000 if ARM64_VA_BITS_36 && !KASAN_SW_TAGS
- default 0xefff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && KASAN_SW_TAGS
- default 0xefffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && KASAN_SW_TAGS
- default 0xeffffe0000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS
- default 0xefffffc000000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS
- default 0xeffffff800000000 if ARM64_VA_BITS_36 && KASAN_SW_TAGS
+ default 0xffff800000000000 if (ARM64_VA_BITS_48 || (ARM64_VA_BITS_52 && !ARM64_16K_PAGES)) && KASAN_SW_TAGS
+ default 0xffffc00000000000 if (ARM64_VA_BITS_47 || ARM64_VA_BITS_52) && ARM64_16K_PAGES && KASAN_SW_TAGS
+ default 0xfffffe0000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS
+ default 0xffffffc000000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS
+ default 0xfffffff800000000 if ARM64_VA_BITS_36 && KASAN_SW_TAGS
default 0xffffffffffffffff
config UNWIND_TABLES
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index a2b7a33966ff..875c0bd0d85a 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -89,7 +89,15 @@
*
* KASAN_SHADOW_END is defined first as the shadow address that corresponds to
* the upper bound of possible virtual kernel memory addresses UL(1) << 64
- * according to the mapping formula.
+ * according to the mapping formula. For Generic KASAN, the address in the
+ * mapping formula is treated as unsigned (part of the compiler's ABI), so the
+ * end of the shadow memory region is at a large positive offset from
+ * KASAN_SHADOW_OFFSET. For Software Tag-Based KASAN, the address in the
+ * formula is treated as signed. Since all kernel addresses are negative, they
+ * map to shadow memory below KASAN_SHADOW_OFFSET, making KASAN_SHADOW_OFFSET
+ * itself the end of the shadow memory region. (User pointers are positive and
+ * would map to shadow memory above KASAN_SHADOW_OFFSET, but shadow memory is
+ * not allocated for them.)
*
* KASAN_SHADOW_START is defined second based on KASAN_SHADOW_END. The shadow
* memory start must map to the lowest possible kernel virtual memory address
@@ -100,7 +108,11 @@
*/
#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
#define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
+#ifdef CONFIG_KASAN_GENERIC
#define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) + KASAN_SHADOW_OFFSET)
+#else
+#define KASAN_SHADOW_END KASAN_SHADOW_OFFSET
+#endif
#define _KASAN_SHADOW_START(va) (KASAN_SHADOW_END - (UL(1) << ((va) - KASAN_SHADOW_SCALE_SHIFT)))
#define KASAN_SHADOW_START _KASAN_SHADOW_START(vabits_actual)
#define PAGE_END KASAN_SHADOW_START
diff --git a/arch/arm64/mm/kasan_init.c b/arch/arm64/mm/kasan_init.c
index abeb81bf6ebd..937f6eb8115b 100644
--- a/arch/arm64/mm/kasan_init.c
+++ b/arch/arm64/mm/kasan_init.c
@@ -198,8 +198,11 @@ static bool __init root_level_aligned(u64 addr)
/* The early shadow maps everything to a single page of zeroes */
asmlinkage void __init kasan_early_init(void)
{
- BUILD_BUG_ON(KASAN_SHADOW_OFFSET !=
- KASAN_SHADOW_END - (1UL << (64 - KASAN_SHADOW_SCALE_SHIFT)));
+ if (IS_ENABLED(CONFIG_KASAN_GENERIC))
+ BUILD_BUG_ON(KASAN_SHADOW_OFFSET !=
+ KASAN_SHADOW_END - (1UL << (64 - KASAN_SHADOW_SCALE_SHIFT)));
+ else
+ BUILD_BUG_ON(KASAN_SHADOW_OFFSET != KASAN_SHADOW_END);
BUILD_BUG_ON(!IS_ALIGNED(_KASAN_SHADOW_START(VA_BITS), SHADOW_ALIGN));
BUILD_BUG_ON(!IS_ALIGNED(_KASAN_SHADOW_START(VA_BITS_MIN), SHADOW_ALIGN));
BUILD_BUG_ON(!IS_ALIGNED(KASAN_SHADOW_END, SHADOW_ALIGN));
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index bf233bde68c7..fbff1b759c85 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -62,8 +62,14 @@ int kasan_populate_early_shadow(const void *shadow_start,
#ifndef kasan_mem_to_shadow
static inline void *kasan_mem_to_shadow(const void *addr)
{
- return (void *)((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT)
- + KASAN_SHADOW_OFFSET;
+ void *scaled;
+
+ if (IS_ENABLED(CONFIG_KASAN_GENERIC))
+ scaled = (void *)((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT);
+ else
+ scaled = (void *)((long)addr >> KASAN_SHADOW_SCALE_SHIFT);
+
+ return KASAN_SHADOW_OFFSET + scaled;
}
#endif
diff --git a/mm/kasan/report.c b/mm/kasan/report.c
index e804b1e1f886..1e4521b5ef14 100644
--- a/mm/kasan/report.c
+++ b/mm/kasan/report.c
@@ -640,12 +640,20 @@ void kasan_non_canonical_hook(unsigned long addr)
{
unsigned long orig_addr, user_orig_addr;
const char *bug_type;
+ void *tagged_null = set_tag(NULL, KASAN_TAG_KERNEL);
+ void *tagged_addr = set_tag((void *)addr, KASAN_TAG_KERNEL);
/*
- * All addresses that came as a result of the memory-to-shadow mapping
- * (even for bogus pointers) must be >= KASAN_SHADOW_OFFSET.
+ * Filter out addresses that cannot be shadow memory accesses generated
+ * by the compiler.
+ *
+ * In SW_TAGS mode, when computing a shadow address, the compiler always
+ * sets the kernel tag (some top bits) on the pointer *before* computing
+ * the memory-to-shadow mapping. As a result, valid shadow addresses
+ * are derived from tagged kernel pointers.
*/
- if (addr < KASAN_SHADOW_OFFSET)
+ if (tagged_addr < kasan_mem_to_shadow(tagged_null) ||
+ tagged_addr > kasan_mem_to_shadow((void *)(~0ULL)))
return;
orig_addr = (unsigned long)kasan_shadow_to_mem((void *)addr);
@@ -670,7 +678,7 @@ void kasan_non_canonical_hook(unsigned long addr)
} else if (user_orig_addr < TASK_SIZE) {
bug_type = "probably user-memory-access";
orig_addr = user_orig_addr;
- } else if (addr_in_shadow((void *)addr))
+ } else if (addr_in_shadow(tagged_addr))
bug_type = "probably wild-memory-access";
else
bug_type = "maybe wild-memory-access";
diff --git a/scripts/gdb/linux/kasan.py b/scripts/gdb/linux/kasan.py
index 56730b3fde0b..4b86202b155f 100644
--- a/scripts/gdb/linux/kasan.py
+++ b/scripts/gdb/linux/kasan.py
@@ -7,7 +7,8 @@
#
import gdb
-from linux import constants, mm
+from linux import constants, utils, mm
+from ctypes import c_int64 as s64
def help():
t = """Usage: lx-kasan_mem_to_shadow [Hex memory addr]
@@ -39,6 +40,8 @@ class KasanMemToShadow(gdb.Command):
else:
help()
def kasan_mem_to_shadow(self, addr):
+ if constants.CONFIG_KASAN_SW_TAGS and not utils.is_target_arch('x86'):
+ addr = s64(addr)
return (addr >> self.p_ops.KASAN_SHADOW_SCALE_SHIFT) + self.p_ops.KASAN_SHADOW_OFFSET
KasanMemToShadow()
diff --git a/scripts/gdb/linux/mm.py b/scripts/gdb/linux/mm.py
index d78908f6664d..d4ab341d89c5 100644
--- a/scripts/gdb/linux/mm.py
+++ b/scripts/gdb/linux/mm.py
@@ -281,12 +281,13 @@ class aarch64_page_ops():
self.KERNEL_END = gdb.parse_and_eval("_end")
if constants.LX_CONFIG_KASAN_GENERIC or constants.LX_CONFIG_KASAN_SW_TAGS:
+ self.KASAN_SHADOW_OFFSET = constants.LX_CONFIG_KASAN_SHADOW_OFFSET
if constants.LX_CONFIG_KASAN_GENERIC:
self.KASAN_SHADOW_SCALE_SHIFT = 3
+ self.KASAN_SHADOW_END = (1 << (64 - self.KASAN_SHADOW_SCALE_SHIFT)) + self.KASAN_SHADOW_OFFSET
else:
self.KASAN_SHADOW_SCALE_SHIFT = 4
- self.KASAN_SHADOW_OFFSET = constants.LX_CONFIG_KASAN_SHADOW_OFFSET
- self.KASAN_SHADOW_END = (1 << (64 - self.KASAN_SHADOW_SCALE_SHIFT)) + self.KASAN_SHADOW_OFFSET
+ self.KASAN_SHADOW_END = self.KASAN_SHADOW_OFFSET
self.PAGE_END = self.KASAN_SHADOW_END - (1 << (self.vabits_actual - self.KASAN_SHADOW_SCALE_SHIFT))
else:
self.PAGE_END = self._PAGE_END(self.VA_BITS_MIN)
--
2.53.0
^ permalink raw reply related
* [PATCH] clk: visconti: pll: initialize clk_init_data to zero
From: Brian Masney @ 2026-03-30 14:32 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Nobuhiro Iwamatsu, Rosen Penev
Cc: linux-clk, linux-arm-kernel, linux-kernel, Brian Masney
Sashiko reported the following:
> The struct clk_init_data init is declared on the stack without being
> fully zero-initialized. While fields like name, flags, parent_names,
> num_parents, and ops are explicitly assigned, the parent_data and
> parent_hws fields are left containing stack garbage.
clk_core_populate_parent_map() currently prefers the parent names over
the parent data and hws, so this isn't a problem at the moment. If that
ordering ever changed in the future, then this could lead to some
unexpected crashes. Let's just go ahead and make sure that the struct
clk_init_data is initialized to zero as a good practice.
Fixes: b4cbe606dc367 ("clk: visconti: Add support common clock driver and reset driver")
Link: https://sashiko.dev/#/patchset/20260326042317.122536-1-rosenp%40gmail.com
Signed-off-by: Brian Masney <bmasney@redhat.com>
---
drivers/clk/visconti/pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/visconti/pll.c b/drivers/clk/visconti/pll.c
index 6fd02c4b641ed58f1943e55dd60ae80aba30b902..805b95481281761ad7ea4f59ddac07e4cdfb9d42 100644
--- a/drivers/clk/visconti/pll.c
+++ b/drivers/clk/visconti/pll.c
@@ -249,7 +249,7 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx,
const struct visconti_pll_rate_table *rate_table,
spinlock_t *lock)
{
- struct clk_init_data init;
+ struct clk_init_data init = {};
struct visconti_pll *pll;
struct clk_hw *pll_hw_clk;
size_t len;
---
base-commit: 3b058d1aeeeff27a7289529c4944291613b364e9
change-id: 20260330-clk-visconti-init-58fae9a7e6a1
Best regards,
--
Brian Masney <bmasney@redhat.com>
^ permalink raw reply related
* [GIT PULL 1/4] i.MX arm64 dts changes for v7.1
From: Frank Li @ 2026-03-30 14:14 UTC (permalink / raw)
To: soc, arm
Cc: Frank.Li, Shawn Guo, Fabio Estevam, kernel, imx, linux-arm-kernel
In-Reply-To: <20260330141444.3789193-1-Frank.Li@nxp.com>
From: Frank.Li@nxp.com
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux.git tags/imx-dt64-7.1
for you to fetch changes up to 825b8c7e1d2918d89eb378b761530d1e51dba82e:
arm64: dts: imx8qxp-mek: switch Type-C connector power-role to dual (2026-03-27 09:53:32 -0400)
----------------------------------------------------------------
i.MX arm64 device tree changes for 7.1:
- New Board Support
S32N79-RDB, Variscite DART-MX95, DART-MX91 with Sonata carrier boards,
Verdin iMX95 with multiple carrier boards (Yavia, Mallow, Ivy, Dahlia)
TQMa93xx/MBa93xxLA-MINI, SolidRun i.MX8MP HummingBoard IIoT,
SolidRun i.MX8MM SOM and EVB, SolidRun SolidSense-N8 board
Ka-Ro Electronics tx8m-1610 COM, GOcontroll Moduline IV and Moduline Mini,
NXP FRDM-IMX91S board, i.MX93 Wireless EVK board with Wireless SiP,
NXP i.MX8MP audio board v2.
- USB & Type-C Support
Type-C and USB nodes for imx943, correct power-fole for
imx8qxp-mek/imx8qm-mek.
- Audio Enhancements
PDM microphone, bt-sco, and WM8962 sound card support for i.MX952. AONMIX
MQS for i.MX95. Use audio-graph-card2 for imx8dxl-evk. WM8904 audio codec
for imx8mm-var-som.
- Thermal & Cooling
PF09/53 thermal zone, fan node, active cooling on A55, SCMI
sensor/lmm/cpu for imx943/imx94.
- Display Support
Multiple LVDS and parallel display overlays for TQ boards (imx91/imx93).
Parallel display for i.MX93. ontat,kd50g21-40nt-a1 panel for
imx93-9x9-qsb. pixpaper display overlay for i.MX93 FRDM.
- Networking
Multiple queue configuration on eqos for TQMa8MPxL.
MaxLinear PHY support, MCP251xFD CAN controller for imx8mm-var-som.
SDIO WiFi support (imx91-evk, imx8mp-evk, imx943-evk)
- Bluetooth Support
imx943-evk, imx93-14x14-evk, imx95-19x19-evk, imx8mp-evk, imx8mn-evk,
imx8mm-evk.
- Miscellaneous
xspi and MT35XU01G SPI NOR flash for i.MX952.
V2X/ELE mailbox nodes, SCMI misc ctrl-ids for imx94.
eDMA channel reservation for V2X, Cortex M7 support for imx95.
Ethos-U65 NPU and SRAM nodes for imx93.
Wire up DMA IRQ for PCIe for imx8qm-ss-hsio.
- Bug Fixes & Improvements
Complete pinmux for rcwsr12 to fix I2C bus recovery affect other module
pinmux for layscape platform.
Multiple bug fixes for GPIO polarity, IRQ types, pinmux configurations.
GICv3 PPI interrupt CPU mask cleanup across multiple SoCs.
Fixed Ethernet PHY IRQ types on TQ boards.
Fixed UART RTS/CTS muxing issues.
Fixed SD card issues on Kontron boards.
Fixed touch reset configuration.
Removed fallback ethernet-phy-ieee802.3-c22 where appropriate.
Move funnel outside from soc.
TMU sensor ID cleanup.
Change usdhc tuning step for eMMC and SD.
Hexadecimal format, readability improvements, duplicate removal.
----------------------------------------------------------------
Alexander Stein (23):
arm64: dts: tqma8mpql-mba8mpxl: Configure multiple queues on eqos
arm64: dts: tqma8mpql-mba8mp-ras314: Configure multiple queues on eqos
arm64: dts: imx8qm-ss-hsio: Wire up DMA IRQ for PCIe
arm64: dts: tqma9352-mba93xx*: Change Ethernet PHY IRQ to IRQ_TYPE_LEVEL_LOW
arm64: dts: tqma9352-mba91xxca: Change Ethernet PHY IRQ to IRQ_TYPE_LEVEL_LOW
arm64: dts: imx91: Remove TMU's superfluous sensor ID
arm64: dts: imx8mp-tqma8mpql-mba8mpxl-g133han01: Remove compatible from overlay
arm64: dts: imx8mp-tqma8mpql-mba8mpxl-tm070jvhg33: Remove compatible from overlay
arm64: dts: imx8mq-tqma8mq-mba8mx-tm070jvhg33: Remove compatible from overlay
arm64: dts: imx8mn-tqma8mqnl-mba8mx-tm070jvhg33: Remove compatible from overlay
arm64: dts: imx8mm-tqma8mqml-mba8mx-tm070jvhg33: Remove compatible from overlay
arm64: dts: imx93-tqma9352-mba91xxca: Add parallel display overlay
arm64: dts: imx93-tqma9352-mba91xxca: Add LVDS display overlay
arm64: dts: imx91-tqma9131-mba91xxca: Add parallel display overlay
arm64: dts: imx91-tqma9131-mba91xxca: Add LVDS display overlay
arm64: dts: imx8mm: Explicitly set DSI_PHY_REF clock as a child of CLK_24M
arm64: dts: imx8mm-tqma8mqml-mba8mx: LVDS overlay: Reduce DSI burst clock to 600Mhz
arm64: dts: imx8mn-tqma8mqnl-mba8mx: LVDS overlay: Reduce DSI burst clock to 600Mhz
arm64: dts: imx95: Move funnel outside from soc
arm64: dts: mba8mx: Add DSI->LVDS bridge IRQ
arm64: dts: freescale: tqma8mqml/tqma8mxnl-mba8mx: Add dual-channel LVDS overlay
arm64: dts: imx8mp-tqma8mpql-mba8mp-ras314: add vcc supply for BT device
arm64: dts: imx8mp-tqma8mpql: Add DT overlays to explicit list
Andrej Picej (1):
arm64: dts: imx93-phyboard-segin: Add peb-av-02 overlay
Annette Kobou (1):
arm64: dts: imx8mp-kontron: Fix boot order for PMIC and RTC
Ciprian Marian Costea (2):
arm64: dts: freescale: Add NXP S32N79 SoC support
arm64: dts: freescale: Add NXP S32N79-RDB board support
Daniel Baluta (2):
arm64: dts: imx8mp: Make MX8MP_I2C_DEFAULT independent on drive strength
arm64: dts: imx8mp-frdm: Use symbolic macros for IOMUXC_SW_PAD_CTL_PAD
Eduard Bostina (1):
arm64: dts: imx8mp-dhcom-pdk3: Use symbolic macro for IOMUXC_SAI2_TXC__GPIO4_IO25
Emanuele Ghidoli (2):
arm64: dts: freescale: imx95-toradex-smarc: fix PMIC_SD2_VSEL label position
arm64: dts: freescale: imx95-toradex-smarc: Support Cortex M7
Ernest Van Hoecke (5):
arm64: dts: freescale: Add Verdin iMX95 support
arm64: dts: freescale: imx95-verdin: Add Dahlia carrier board
arm64: dts: freescale: imx95-verdin: Add Ivy carrier board
arm64: dts: freescale: imx95-verdin: Add Mallow carrier board
arm64: dts: freescale: imx95-verdin: Add Yavia carrier board
Fabian Pfitzner (1):
arm64: dts: imx8mp-frdm: add sd, ethernet, wifi, usb and hdmi support
Florin Leotescu (1):
arm64: dts: imx943-evk: Add fan node and enable active cooling on A55
Francesco Dolcini (3):
arm64: dts: imx8-apalis: Disable the audmix
arm64: dts: imx8-apalis: Remove obsolete TODO comment
arm64: dts: imx8-apalis: Fix LEDs name collision
Frank Li (3):
arm64: dts: imx8mm-evk: replace space with tab
arm64: dts: imx8mp-evk: replace space with tab
arm64: dts: imx8mp-beacon: remove fallback ethernet-phy-ieee802.3-c22
Frieder Schrempf (3):
arm64: dts: imx8mp-kontron: Fix touch reset configuration on DL devices
arm64: dts: imx8mp-kontron: Drop vmmc-supply to fix SD card on SMARC eval carrier
arm64: dts: imx8mp-kontron: Use GPIO/IRQ defines in DL devicetree
Fugang Duan (1):
arm64: dts: imx8mm-evk: add uart3 port
Geert Uytterhoeven (2):
arm64: dts: fsl-ls1028a: Drop CPU masks from GICv3 PPI interrupts
arm64: dts: freescale: imx: Drop CPU masks from GICv3 PPI interrupts
Haibo Chen (2):
arm64: dts: imx952: Add xspi node
arm64: dts: imx952-evk: add MT35XU01G spi nor flash
Josua Mayer (17):
arm64: dts: imx8mp-hummingboard-pulse/cubox-m: fix vmmc gpio polarity
arm64: dts: imx8mp-hummingboard-pulse: fix mini-hdmi dsi port reference
arm64: dts: imx8mp-sr-som: build dtbs with symbols for overlay support
arm64: dts: freescale: add support for SolidRun i.MX8MP HummingBoard IIoT
arm64: dts: imx8mp-hummingboard-iiot: add dt overlays for muxable ports
arm64: dts: freescale: add support for solidrun solidsense-n8 board
arm64: dts: freescale: add support for solidrun i.mx8mm som and evb
arm64: dts: lx2160a-cex7/lx2162a-sr-som: fix usd-cd & gpio pinmux
arm64: dts: lx2160a: change i2c0 (iic1) pinmux mask to one bit
arm64: dts: lx2160a: remove duplicate pinmux nodes
arm64: dts: lx2160a: rename pinmux nodes for readability
arm64: dts: lx2160a: add sda gpio references for i2c bus recovery
arm64: dts: lx2160a: change zeros to hexadecimal in pinmux nodes
arm64: dts: lx2160a: complete pinmux for rcwsr12 configuration word
arm64: dts: lx2160a-cex7: add rtc alias
arm64: dts: lx2162a-sr-som: add crypto & rtc aliases, model
arm64: dts: lx2162a-clearfog: set sfp connector leds function and source
Joy Zou (3):
arm64: dts: imx95: Reserve eDMA channels 0-1 for V2X
arm64: dts: imx95-evk: update the dma-channel-mask property
arm64: dts: imx943: Add thermal support
Laurentiu Mihalcea (2):
arm64: dts: imx95: add AONMIX MQS node
arm64: dts: imx95-15x15-frdm: support AONMIX MQS
Liu Ying (2):
arm64: dts: imx93-9x9-qsb: Add ontat,kd50g21-40nt-a1 panel
arm64: dts: imx8mp-evk: Specify ADV7535 register addresses
Luke Wang (2):
arm64: dts: imx91-11x11-evk: change usdhc tuning step for eMMC and SD
arm64: dts: imx93-11x11-evk: change usdhc tuning step for eMMC and SD
Marco Felsch (1):
arm64: dts: imx93: Add parallel display output nodes
Martin Schmiedel (2):
arm64: dts: freescale: add initial device tree for TQMa93xx/MBa93xxLA-MINI
arm64: dts: freescale: imx93-tqma9352-mba93xxla-mini: Add WLAN/BT overlay
Maud Spierings (4):
arm64: dts: imx8mm: Add pinctrl config definitions
arm64: dts: freescale: add Ka-Ro Electronics tx8m-1610 COM
arm64: dts: freescale: Add the GOcontroll Moduline IV
arm64: dts: freescale: Add the GOcontroll Moduline Mini
Nora Schiffer (1):
arm64: dts: freescale: imx8mp-tqma8mpql-mba8mp-ras314: fix UART1 RTS/CTS muxing
Peng Fan (4):
arm64: dts: imx94: Add V2X/ELE mailbox nodes
arm64: dts: imx94: Add SCMI sensor/lmm/cpu nodes
arm64: dts: imx943-evk: Add nxp,ctrl-ids for scmi_misc
arm64: dts: imx943-evk: Add pf09/53 thermal zone
Primoz Fiser (1):
arm64: dts: freescale: imx93-phy{core,board}: Add i2c bus recovery
Ranjani Vaidyanathan (1):
arm64: dts: imx94: Update pin headers
Rob Herring (Arm) (1):
arm64: dts: freescale: imx93: Add Ethos-U65 NPU and SRAM nodes
Shengjiu Wang (7):
arm64: dts: imx8mm-evk: correct the spdif compatible string
arm64: dts: imx8mp-ab2: add support for NXP i.MX8MP audio board (version 2)
arm64: dts: imx952: Add audio device nodes
arm64: dts: imx952-evk: Add sound-wm8962 support
arm64: dts: imx952-evk: Add bt-sco sound card support
arm64: dts: imx952-evk: Add PDM microphone sound card support
arm64: dts: imx8dxl-evk: Use audio-graph-card2 for wm8960-2 and wm8960-3
Sherry Sun (16):
arm64: dts: imx8mm-evk: add uart1 and bluetooth node
arm64: dts: imx8mn-evk: add bluetooth dts node
arm64: dts: imx8mp-evk: add bluetooth dts node
arm64: dts: imx93-evk/qsb: add m2-pcm-level-shifter-hog to enable BT HFP
arm64: dts: imx95-19x19-evk: enable lpuart5 for Bluetooth support
arm64: dts: imx93-14x14-evk: enable lpuart5 for Bluetooth
arm64: dts: imx943-evk: enable lpuart6 for Bluetooth
arm64: dts: imx93: Extract common EVK description into shared dtsi
arm64: dts: imx93: Move 11x11 EVK specific parts back to imx93-11x11-evk.dts
arm64: dts: imx93: Add imx93w.dtsi for i.MX93 Wireless SiP
arm64: dts: imx93: Add i.MX93 Wireless EVK board support
arm64: dts: imx943-evk: add usdhc3 for SDIO WiFi support
arm64: dts: imx8mp-evk: Enable pull select bit for PCIe regulator GPIO (M.2 W_DISABLE1)
arm64: dts: imx8mp-evk: Add usdhc1 for SDIO WiFi support
arm64: dts: imx91-11x11-evk: Add usdhc3 for SDIO WiFi support
arm64: dts: imx95-15x15-evk: remove regulator-always-on for reg_m2_pwr
Stefano Radaelli (15):
arm64: dts: freescale: imx8mm-var-som: Move UART4 description to Symphony
arm64: dts: freescale: imx8mm-var-som: Align fsl,pins tables
arm64: dts: freescale: imx8mm-var-som: Update FEC support with MaxLinear PHY
arm64: dts: freescale: imx8mm-var-som: Add support for WM8904 audio codec
arm64: dts: freescale: imx8mm-var-som: Add MCP251xFD CAN controller
arm64: dts: freescale: imx8mm-var-som: Rework WiFi/BT and add legacy dts
arm64: dts: imx8mm-var-som-symphony: Move USB configuration from SOM
arm64: dts: imx8mm-var-som-symphony: Enable uSD on USDHC2
arm64: dts: imx8mm-var-som-symphony: Add TPM2 support
arm64: dts: imx8mm-var-som-symphony: Enable I2C4
arm64: dts: imx8mm-var-som-symphony: Enable PCIe
arm64: dts: freescale: Add support for Variscite DART-MX91
arm64: dts: imx91-var-dart: Add support for Variscite Sonata board
arm64: dts: freescale: Add support for Variscite DART-MX95
arm64: dts: imx95-var-dart: Add support for Variscite Sonata board
Wig Cheng (1):
arm64: dts: freescale: add pixpaper display overlay for i.MX93 FRDM
Xu Yang (5):
arm64: dts: imx94: add USB nodes
arm64: dts: imx943-evk: add Type-C and USB related nodes
arm64: dts: freescale: imx8mp-moduline-display-106: add typec-power-opmode property
arm64: dts: imx8qm-mek: switch Type-C connector power-role to dual
arm64: dts: imx8qxp-mek: switch Type-C connector power-role to dual
Yanan Yang (1):
arm64: dts: freescale: add NXP FRDM-IMX91S board support
arch/arm64/boot/dts/freescale/Makefile | 74 ++
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 15 +-
.../arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 10 +-
.../dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 2 +
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 183 ++-
.../boot/dts/freescale/fsl-lx2162a-clearfog.dts | 10 +
.../boot/dts/freescale/fsl-lx2162a-sr-som.dtsi | 19 +-
.../arm64/boot/dts/freescale/imx8-apalis-eval.dtsi | 4 -
.../boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi | 10 +-
.../boot/dts/freescale/imx8-apalis-ixora-v1.2.dtsi | 10 +-
arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 114 +-
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 78 +-
.../dts/freescale/imx8mm-hummingboard-ripple.dts | 335 ++++++
arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h | 33 +
arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi | 393 +++++++
.../imx8mm-tqma8mqml-mba8mx-lvds-g133han01.dtso | 86 ++
.../imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtso | 9 +-
.../boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts | 1 -
.../imx8mm-tx8m-1610-moduline-iv-306-d.dts | 799 ++++++++++++++
.../imx8mm-tx8m-1610-moduline-mini-111.dts | 687 ++++++++++++
.../arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi | 444 ++++++++
.../freescale/imx8mm-var-som-symphony-legacy.dts | 19 +
.../boot/dts/freescale/imx8mm-var-som-symphony.dts | 214 +++-
.../freescale/imx8mm-var-som-wifi-brcm-legacy.dtsi | 12 +
.../freescale/imx8mm-var-som-wifi-bt-iw61x.dtsi | 45 +
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi | 366 +++---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 19 +-
arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 4 +
.../dts/freescale/imx8mn-solidsense-n8-compact.dts | 851 ++++++++++++++
.../imx8mn-tqma8mqnl-mba8mx-lvds-tm070jvhg33.dtso | 7 +-
.../boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts | 1 -
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 11 +-
arch/arm64/boot/dts/freescale/imx8mp-ab2.dts | 912 +++++++++++++++
.../arm64/boot/dts/freescale/imx8mp-beacon-kit.dts | 3 +-
.../boot/dts/freescale/imx8mp-beacon-som.dtsi | 3 +-
arch/arm64/boot/dts/freescale/imx8mp-cubox-m.dts | 2 +-
.../arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 98 +-
arch/arm64/boot/dts/freescale/imx8mp-frdm.dts | 538 ++++++++-
...hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso | 67 ++
...ummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso | 97 ++
.../imx8mp-hummingboard-iiot-rs485-a.dtso | 18 +
.../imx8mp-hummingboard-iiot-rs485-b.dtso | 18 +
.../dts/freescale/imx8mp-hummingboard-iiot.dts | 716 ++++++++++++
.../imx8mp-hummingboard-pulse-common.dtsi | 2 +-
.../imx8mp-hummingboard-pulse-mini-hdmi.dtsi | 11 +-
.../boot/dts/freescale/imx8mp-kontron-dl.dtso | 26 +-
.../boot/dts/freescale/imx8mp-kontron-osm-s.dtsi | 6 +
.../imx8mp-kontron-smarc-eval-carrier.dts | 1 -
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 2 +-
.../freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts | 72 +-
.../imx8mp-tqma8mpql-mba8mpxl-lvds-g133han01.dtso | 6 +-
...imx8mp-tqma8mpql-mba8mpxl-lvds-tm070jvhg33.dtso | 6 +-
.../dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 67 ++
...x8p-ml81-moduline-display-106-av101hdt-a10.dtso | 1 +
.../imx8mp-tx8p-ml81-moduline-display-106.dts | 16 +-
.../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 8 +-
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +-
.../imx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtso | 6 +-
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 10 +-
arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi | 5 +-
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 10 +-
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 3 +-
arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts | 98 ++
.../boot/dts/freescale/imx91-11x11-frdm-s.dts | 769 +++++++++++++
.../boot/dts/freescale/imx91-var-dart-sonata.dts | 471 ++++++++
arch/arm64/boot/dts/freescale/imx91-var-dart.dtsi | 468 ++++++++
arch/arm64/boot/dts/freescale/imx91.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx91_93_common.dtsi | 64 +-
.../boot/dts/freescale/imx93-11x11-evk-common.dtsi | 861 +++++++++++++++
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 855 +-------------
.../dts/freescale/imx93-11x11-frdm-pixpaper.dtso | 50 +
arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts | 12 +
.../imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtso | 110 ++
arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts | 6 +
.../boot/dts/freescale/imx93-phyboard-nash.dts | 12 +-
.../freescale/imx93-phyboard-segin-peb-av-02.dtso | 146 +++
.../boot/dts/freescale/imx93-phyboard-segin.dts | 12 +-
.../boot/dts/freescale/imx93-phycore-som.dtsi | 12 +-
.../imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtso | 56 +
.../imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtso | 66 ++
.../dts/freescale/imx93-tqma9352-mba91xxca.dts | 4 +-
.../dts/freescale/imx93-tqma9352-mba93xxca.dts | 4 +-
.../imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso | 35 +
.../freescale/imx93-tqma9352-mba93xxla-mini.dts | 598 ++++++++++
.../dts/freescale/imx93-tqma9352-mba93xxla.dts | 4 +-
arch/arm64/boot/dts/freescale/imx93.dtsi | 36 +
arch/arm64/boot/dts/freescale/imx93w-evk.dts | 28 +
arch/arm64/boot/dts/freescale/imx93w.dtsi | 110 ++
arch/arm64/boot/dts/freescale/imx94-pinfunc.h | 12 +
arch/arm64/boot/dts/freescale/imx94.dtsi | 127 ++-
arch/arm64/boot/dts/freescale/imx943-evk.dts | 292 +++++
arch/arm64/boot/dts/freescale/imx943.dtsi | 64 ++
arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts | 1 -
arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts | 73 ++
.../boot/dts/freescale/imx95-19x19-evk-sof.dts | 7 +-
arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 2 +-
.../boot/dts/freescale/imx95-toradex-smarc.dtsi | 49 +-
.../boot/dts/freescale/imx95-var-dart-sonata.dts | 595 ++++++++++
arch/arm64/boot/dts/freescale/imx95-var-dart.dtsi | 425 +++++++
.../boot/dts/freescale/imx95-verdin-dahlia.dtsi | 270 +++++
.../arm64/boot/dts/freescale/imx95-verdin-dev.dtsi | 250 +++++
.../arm64/boot/dts/freescale/imx95-verdin-ivy.dtsi | 515 +++++++++
.../boot/dts/freescale/imx95-verdin-mallow.dtsi | 223 ++++
.../dts/freescale/imx95-verdin-nonwifi-dahlia.dts | 21 +
.../dts/freescale/imx95-verdin-nonwifi-dev.dts | 21 +
.../dts/freescale/imx95-verdin-nonwifi-ivy.dts | 21 +
.../dts/freescale/imx95-verdin-nonwifi-mallow.dts | 21 +
.../dts/freescale/imx95-verdin-nonwifi-yavia.dts | 21 +
.../boot/dts/freescale/imx95-verdin-nonwifi.dtsi | 16 +
.../dts/freescale/imx95-verdin-wifi-dahlia.dts | 21 +
.../boot/dts/freescale/imx95-verdin-wifi-dev.dts | 21 +
.../boot/dts/freescale/imx95-verdin-wifi-ivy.dts | 21 +
.../dts/freescale/imx95-verdin-wifi-mallow.dts | 21 +
.../boot/dts/freescale/imx95-verdin-wifi-yavia.dts | 21 +
.../boot/dts/freescale/imx95-verdin-wifi.dtsi | 50 +
.../boot/dts/freescale/imx95-verdin-yavia.dtsi | 217 ++++
arch/arm64/boot/dts/freescale/imx95-verdin.dtsi | 1162 ++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 109 +-
arch/arm64/boot/dts/freescale/imx952-evk.dts | 273 +++++
arch/arm64/boot/dts/freescale/imx952.dtsi | 232 +++-
arch/arm64/boot/dts/freescale/mba8mx.dtsi | 4 +-
arch/arm64/boot/dts/freescale/s32n79-rdb.dts | 70 ++
arch/arm64/boot/dts/freescale/s32n79.dtsi | 362 ++++++
124 files changed, 16770 insertions(+), 1337 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-hummingboard-ripple.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-lvds-g133han01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610-moduline-iv-306-d.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610-moduline-mini-111.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony-legacy.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-brcm-legacy.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-var-som-wifi-bt-iw61x.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-solidsense-n8-compact.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-ab2.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-dsi-WJ70N3TYJHMNG0.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-panel-lvds-WF70A8SYJHLNGA.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-a.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot-rs485-b.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx91-11x11-frdm-s.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx91-var-dart-sonata.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx91-var-dart.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx93-11x11-evk-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx93-11x11-frdm-pixpaper.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-9x9-qsb-ontat-kd50g21-40nt-a1.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-phyboard-segin-peb-av-02.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca-lvds-tm070jvhg33.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba91xxca-rgb-cdtech-dc44.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla-mini.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx93w-evk.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx93w.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-var-dart-sonata.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-var-dart.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-dahlia.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-dev.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-ivy.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-mallow.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-dahlia.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-dev.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-ivy.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-mallow.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi-yavia.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-nonwifi.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi-dahlia.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi-dev.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi-ivy.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi-mallow.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi-yavia.dts
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-wifi.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin-yavia.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx95-verdin.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/s32n79-rdb.dts
create mode 100644 arch/arm64/boot/dts/freescale/s32n79.dtsi
^ permalink raw reply
* [GIT PULL 2/4] i.MX arm dts changes for v7.1
From: Frank Li @ 2026-03-30 14:14 UTC (permalink / raw)
To: soc, arm
Cc: Frank.Li, Shawn Guo, Fabio Estevam, kernel, imx, linux-arm-kernel
In-Reply-To: <20260330141444.3789193-1-Frank.Li@nxp.com>
From: Frank.Li@nxp.com
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux.git tags/imx-dt-7.1
for you to fetch changes up to 7bc76d413dbe6631a207b38aa67b2d00fdc27b2c:
ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards (2026-03-25 13:00:22 -0400)
----------------------------------------------------------------
i.MX ARM device tree changes for 7.1:
- Device Tree Schema Compliance Fixes
Fixed numerous CHECK_DTBS warnings across multiple i.MX SoC families
Renamed nodes to match schema requirements (tcq→touchscreen,
uart8250→serial, iomuxc→pinmux, etc.). Fixed node naming conventions
(added "led-" prefix, proper addressing formats).
Corrected compatible strings and removed undocumented fallbacks. Added
required properties (clocks, clock-names, power supplies,
#sound-dai-cells).
- New Hardware Support
Added DT overlays for various expansion modules (i.MX6 DHCOM PDK2,
PicoITX display boards). Added support for muRata 1YN WiFi chip
(replacement for 1DX) on i.MX6ULL DHCOR board.
i.MX7ULP: Added CPU clock and OPP table support for frequency scaling.
- Boot Phase Properties
Added bootph.yaml properties to multiple TQ-Systems boards and SoCs:
imx7s, tqma7, mba7 imx6ul/ull, tqma6ul/ull, mba6ulx imx6qdl, tqma6, mba6.
- Bug Fixes & Corrections
Fixed interrupt property usage (interrupts→interrupts-extended where
needed). Corrected spelling ("TQ-Systems" with hyphen). Removed redundant
intermediate nodes in pinmux hierarchy. Fixed clock references and
naming.
----------------------------------------------------------------
Alexander Feilke (3):
ARM: dts: imx7s: add boot phase properties
ARM: dts: tqma7: add boot phase properties
ARM: dts: imx7-mba7: Deassert BOOT_EN after boot
Dario Binacchi (1):
ARM: dts: imx6ull-engicam-microgea-bmm: set touchscreen glitch threshold
Frank Li (24):
ARM: dts: imx35: rename emi to emi-bus to fix CHECK_DTBS warning
ARM: dts: imx35: rename i2c clock-names to ipg
ARM: dts: imx35: remove simple-bus 'usbphy'
ARM: dts: imx51-ts4800: rename fpga@0 to fpga@0,0
ARM: dts: imx51-babbage: rename at45db321d@1 to flash@1
ARM: dts: imx53: drop fallback compatible "dlg,da9052"
ARM: dts: imx6qdl-sr-som-ti: use fixed-clock instead of clock-frequency
ARM: dts: imx53-smd: Add power supply node for fsl,sgtl5000
ARM: dts: imx7s-warp: Remove data-lanes and clock-lanes for ov2680
ARM: dts: imx: rename iomuxc to pinmux
ARM: dts: imx: remove redundant intermediate node in pinmux hierarchy
ARM: dts: imx27-eukrea: replace interrupts with interrupts-extended
ARM: dts: imx27-eukrea-cpuimx27: rename uart8250 to serial
ARM: dts: imx27: remove fsl,imx-osc26m from fixed-clock node
ARM: dts: imx23: fix interrupt names for dma-controller@80024000
ARM: dts: imx23/28: add "led-" prefix to LED subnodes
ARM: dts: imx28: rename gpios-reset to reset-gpios of hx8357
ARM: dts: imx28-sps1: remove undocumented fallback compatible "mr25h256"
ARM: dts: imx28-tx28: rename compatible to "edt,edt-ft5206"
ARM: dts: imx28-tx28: remove undocumented aliases
ARM: dts: imx6qdl: add label for system clocks
ARM: dts: imx: add required clocks and clock-names for ccm
ARM: dts: imx25: rename node name tcq to touchscreen
ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif
Ian Ray (5):
ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps
ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning
ARM: dts: imx: b850v3: Use alphabetical sorting
ARM: dts: imx: b850v3: Define GPIO line names
ARM: dts: imx: b850v3: Disable unused usdhc4
Marek Vasut (2):
ARM: dts: imx6ull-dhcor: Handle both 1DX and 1YN WiFi on i.MX6ULL DHCOR
ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
Max Merchel (8):
ARM: dts: imx6qdl-tqma6: add missing labels
ARM: dts: imx6qdl: add boot phase properties
ARM: dts: imx6qdl-tqma6: add boot phase properties
ARM: dts: imx6qdl-mba6: add boot phase properties
ARM: dts: imx6ul/imx6ull: add boot phase properties
ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties
ARM: dts: mba6ulx: add boot phase properties
ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems
Peng Fan (1):
ARM: dts: imx7ulp: Add CPU clock and OPP table support
arch/arm/boot/dts/nxp/imx/Makefile | 37 ++++
arch/arm/boot/dts/nxp/imx/imx1-ads.dts | 108 +++++----
arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts | 92 ++++----
arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +-
.../boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi | 38 ++--
.../imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts | 6 +-
.../nxp/imx/imx25-eukrea-mbimxsd25-baseboard.dts | 134 ++++++-----
arch/arm/boot/dts/nxp/imx/imx25-pdk.dts | 190 ++++++++--------
arch/arm/boot/dts/nxp/imx/imx25.dtsi | 4 +-
arch/arm/boot/dts/nxp/imx/imx27-apf27.dts | 58 +++--
arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts | 194 ++++++++--------
.../boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi | 244 ++++++++++-----------
.../nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts | 196 ++++++++---------
arch/arm/boot/dts/nxp/imx/imx27-pdk.dts | 132 ++++++-----
.../dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts | 92 ++++----
.../dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi | 174 ++++++++-------
.../boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts | 206 +++++++++--------
.../boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi | 154 +++++++------
arch/arm/boot/dts/nxp/imx/imx27.dtsi | 4 +-
arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx35.dtsi | 30 +--
arch/arm/boot/dts/nxp/imx/imx51-babbage.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx53-qsb.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx53-smd.dts | 18 ++
.../arm/boot/dts/nxp/imx/imx53-voipac-dmm-668.dtsi | 2 +-
arch/arm/boot/dts/nxp/imx/imx6dl-alti6p.dts | 4 +-
.../boot/dts/nxp/imx/imx6dl-eckelmann-ci4x10.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6dl-lanmcu.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6dl-plybas.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6dl-plym2m.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6dl-prtmvt.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6dl-qmx6.dtsi | 5 +-
arch/arm/boot/dts/nxp/imx/imx6dl-victgo.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6q-b450v3.dts | 1 +
arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts | 1 +
arch/arm/boot/dts/nxp/imx/imx6q-b850v3.dts | 53 +++--
arch/arm/boot/dts/nxp/imx/imx6q-bx50v3.dtsi | 4 +
arch/arm/boot/dts/nxp/imx/imx6q-prtwd2.dts | 4 +-
...mx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi | 75 +++++++
.../nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi | 61 ++++++
.../imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso | 28 +++
...dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso | 26 +++
.../imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso | 32 +++
.../imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso | 32 +++
.../imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso | 39 ++++
...com-picoitx-overlay-626-100-x2-ch101olhlwh.dtso | 8 +
arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-som.dtsi | 6 +-
arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi | 12 +
arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 4 +-
arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi | 8 +-
arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6.dtsi | 11 +
arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6a.dtsi | 5 +-
arch/arm/boot/dts/nxp/imx/imx6qdl-tqma6b.dtsi | 6 +-
arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 24 +-
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 4 +-
.../boot/dts/nxp/imx/imx6ul-tqma6ul-common.dtsi | 10 +
arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul2.dtsi | 1 +
.../boot/dts/nxp/imx/imx6ul-tqma6ul2l-mba6ulx.dts | 4 +-
arch/arm/boot/dts/nxp/imx/imx6ul-tqma6ul2l.dtsi | 1 +
.../boot/dts/nxp/imx/imx6ul-tqma6ulx-common.dtsi | 1 +
.../boot/dts/nxp/imx/imx6ul-tqma6ulxl-common.dtsi | 1 +
arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 7 +
arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi | 4 +-
.../dts/nxp/imx/imx6ull-engicam-microgea-bmm.dts | 1 +
arch/arm/boot/dts/nxp/imx/imx6ull-tqma6ull2.dtsi | 1 +
.../dts/nxp/imx/imx6ull-tqma6ull2l-mba6ulx.dts | 2 +-
arch/arm/boot/dts/nxp/imx/imx6ull-tqma6ull2l.dtsi | 3 +-
arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 1 +
arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 13 ++
arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 5 +
arch/arm/boot/dts/nxp/imx/imx7s-warp.dts | 2 -
arch/arm/boot/dts/nxp/imx/imx7s.dtsi | 5 +
arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi | 28 +++
arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi | 6 +
arch/arm/boot/dts/nxp/mxs/imx23-olinuxino.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx23.dtsi | 6 +-
arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-apx4devkit.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-cfa10036.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-cfa10055.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-cfa10056.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-duckbill-2-485.dts | 4 +-
.../boot/dts/nxp/mxs/imx28-duckbill-2-enocean.dts | 6 +-
arch/arm/boot/dts/nxp/mxs/imx28-duckbill-2.dts | 4 +-
arch/arm/boot/dts/nxp/mxs/imx28-duckbill.dts | 4 +-
arch/arm/boot/dts/nxp/mxs/imx28-evk.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts | 4 +-
arch/arm/boot/dts/nxp/mxs/imx28-sps1.dts | 2 +-
arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts | 9 +-
91 files changed, 1609 insertions(+), 1142 deletions(-)
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi-ch101olhlwh.dtsi
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-overlay-panel-dpi.dtsi
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtso
create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtso
^ permalink raw reply
* [GIT PULL 3/4] i.MX dt binding changes for v7.1
From: Frank Li @ 2026-03-30 14:14 UTC (permalink / raw)
To: soc, arm
Cc: Frank.Li, Shawn Guo, Fabio Estevam, kernel, imx, linux-arm-kernel
From: Frank.Li@nxp.com
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux.git tags/imx-bindings-7.1
for you to fetch changes up to e54390aae6887151ff67526af45382beb889f99a:
dt-bindings: arm: fsl: add Verdin iMX95 (2026-03-26 12:17:45 -0400)
----------------------------------------------------------------
i.MX dt-bindings update for 7.1:
- New board support: Verdin iMX95, MBa93xxLA-MINI, TQMa95xxLA, S32N79
SoC/RDB, i.MX8MP audio board (version 2), SolidRun i.MX8M, TQMa8x,
GOcontroll Moduline IV/Mini, FRDM-IMX91S, Variscite DART-MX91,
i.MX93 Wireless EVK, Variscite DART-MX95.
- fsl,irqsteer add nxp,s32n79-irqsteer support.
- fsl,imx93-media-blk-ctrl add dbi-bridge.
----------------------------------------------------------------
Alexander Stein (1):
dt-bindings: arm: fsl: add bindings for TQMa8x
Ciprian Marian Costea (2):
dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support
dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board
Ernest Van Hoecke (1):
dt-bindings: arm: fsl: add Verdin iMX95
Frank Li (1):
dt-bindings: arm: lpc: add missed lpc43xx board
Josua Mayer (1):
dt-bindings: arm: fsl: Add various solidrun i.MX8M boards
Liu Ying (1):
dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example
Markus Niebel (1):
dt-bindings: arm: add bindings for TQMa95xxLA
Martin Schmiedel (1):
dt-bindings: arm: fsl: add MBa93xxLA-MINI
Maud Spierings (1):
dt-bindings: arm: fsl: Add GOcontroll Moduline IV/Mini
Peng Fan (1):
dt-bindings: fsl: imx7ulp-smc1: Add #clock-cells property
Shengjiu Wang (1):
dt-bindings: arm: fsl: Add compatible for i.MX8MP audio board (version 2)
Sherry Sun (1):
dt-bindings: arm: fsl: Add i.MX93 Wireless EVK board
Stefano Radaelli (2):
dt-bindings: arm: fsl: add Variscite DART-MX95 Boards
dt-bindings: arm: fsl: add Variscite DART-MX91 Boards
Yanan Yang (1):
dt-bindings: arm: fsl: Add FRDM-IMX91S board
.../bindings/arm/freescale/fsl,imx7ulp-pm.yaml | 5 ++
Documentation/devicetree/bindings/arm/fsl.yaml | 86 ++++++++++++++++++++++
.../devicetree/bindings/arm/nxp/lpc32xx.yaml | 22 ++++++
.../interrupt-controller/fsl,irqsteer.yaml | 4 +-
.../bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml | 78 ++++++++++++++++++++
5 files changed, 194 insertions(+), 1 deletion(-)
^ permalink raw reply
* [GIT PULL 4/4] i.MX drivers/soc changes for v7.1
From: Frank Li @ 2026-03-30 14:14 UTC (permalink / raw)
To: soc, arm
Cc: Frank.Li, Shawn Guo, Fabio Estevam, kernel, imx, linux-arm-kernel
In-Reply-To: <20260330141444.3789193-1-Frank.Li@nxp.com>
From: Frank.Li@nxp.com
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux.git tags/imx-soc-7.1
for you to fetch changes up to 1b7c834dedf9933447c424bfa01348f9dc3db4d1:
MAINTAINERS: Add i.MX team to all arm NXP platforms (2026-03-13 11:00:45 -0400)
----------------------------------------------------------------
i.MX SoC update for 7.1:
- Updates MAINTAINERS file to include i.MX team coverage for ARM NXP platforms
- Sets default values for OPACR (Off-Platform Peripheral Access Control
Register) in the i.MX AIPSTZ bus driver
----------------------------------------------------------------
Alexander Stein (1):
MAINTAINERS: Add i.MX team to all arm NXP platforms
Shengjiu Wang (1):
bus: imx-aipstz: set default value for opacr registers
MAINTAINERS | 3 +--
drivers/bus/imx-aipstz.c | 15 +++++++++++++++
2 files changed, 16 insertions(+), 2 deletions(-)
^ permalink raw reply
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