* [GIT PULL] Microchip ARM64 SoC updates for v7.1
From: Claudiu Beznea @ 2026-04-03 7:06 UTC (permalink / raw)
To: soc, arm; +Cc: conor, nicolas.ferre, claudiu.beznea, linux-arm-kernel
The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git tags/microchip-soc-7.1
for you to fetch changes up to e4ffa98a02f4d16eda9a5faec6792493b41dab35:
arm64: Kconfig: provide a top-level switch for Microchip platforms (2026-03-18 10:55:49 +0200)
----------------------------------------------------------------
Microchip ARM64 SoC updates for v7.1
This update includes:
- use a top-level configuration flag for all Microchip platforms
----------------------------------------------------------------
Bartosz Golaszewski (1):
arm64: Kconfig: provide a top-level switch for Microchip platforms
arch/arm64/Kconfig.platforms | 10 ++++------
arch/arm64/configs/defconfig | 1 +
2 files changed, 5 insertions(+), 6 deletions(-)
^ permalink raw reply
* Re: [PATCH v6 1/3] dt-bindings: media: mediatek-jpeg-decoder: add MT8189 compatible string
From: Krzysztof Kozlowski @ 2026-04-03 7:13 UTC (permalink / raw)
To: Jianhua Lin, nicolas, mchehab, robh, krzk+dt, conor+dt,
matthias.bgg, angelogioacchino.delregno
Cc: devicetree, linux-kernel, linux-media, linux-arm-kernel,
linux-mediatek, Project_Global_Chrome_Upstream_Group, sirius.wang,
vince-wl.liu, jh.hsu
In-Reply-To: <20260403064912.17259-2-jianhua.lin@mediatek.com>
On 03/04/2026 08:49, Jianhua Lin wrote:
> Add the compatible string for the JPEG decoder block found in the
> MediaTek MT8189 SoC.
>
> Compared to previous generation ICs, the MT8189 JPEG decoder requires
> 34-bit IOVA address space support and only needs a single clock
> ("jpgdec") instead of two. Therefore, it is added as a standalone
> compatible string without falling back to older SoCs.
>
> Update the binding schema to include the new compatible string and add
> an `allOf` block with conditional checks. This enforces the single clock
> requirement for MT8189 while preserving the two-clock requirement
> ("jpgdec-smi", "jpgdec") for older SoCs.
>
> Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
What?
> Suggested-by: Rob Herring <robh@kernel.org>
Where?
And I would say also - Why?
> Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com>
> ---
> .../bindings/media/mediatek-jpeg-decoder.yaml | 46 +++++++++++++++----
> 1 file changed, 38 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> index a4aacd3eb189..6596b686980c 100644
> --- a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml
> @@ -15,10 +15,10 @@ description: |-
> properties:
> compatible:
> oneOf:
> - - items:
> - - enum:
> - - mediatek,mt8173-jpgdec
> - - mediatek,mt2701-jpgdec
> + - enum:
> + - mediatek,mt2701-jpgdec
> + - mediatek,mt8173-jpgdec
> + - mediatek,mt8189-jpgdec
> - items:
> - enum:
> - mediatek,mt7623-jpgdec
> @@ -32,13 +32,20 @@ properties:
> maxItems: 1
>
> clocks:
> + minItems: 1
> maxItems: 2
> - minItems: 2
>
> clock-names:
> - items:
> - - const: jpgdec-smi
> - - const: jpgdec
> + oneOf:
> + - items:
> + - const: jpgdec
> + - items:
> + - const: jpgdec-smi
> + - const: jpgdec
> +
> + mediatek,larb:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: a phandle to the smi_larb node.
>
> power-domains:
> maxItems: 1
> @@ -60,6 +67,29 @@ required:
> - power-domains
> - iommus
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8189-jpgdec
> + then:
> + properties:
> + clocks:
> + minItems: 1
You are making some random changes to this.
Please go to previous version and read again feedback.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v6 2/3] dt-bindings: media: mediatek-jpeg-encoder: add MT8189 compatible string
From: Krzysztof Kozlowski @ 2026-04-03 7:15 UTC (permalink / raw)
To: Jianhua Lin, nicolas, mchehab, robh, krzk+dt, conor+dt,
matthias.bgg, angelogioacchino.delregno
Cc: devicetree, linux-kernel, linux-media, linux-arm-kernel,
linux-mediatek, Project_Global_Chrome_Upstream_Group, sirius.wang,
vince-wl.liu, jh.hsu
In-Reply-To: <20260403064912.17259-3-jianhua.lin@mediatek.com>
On 03/04/2026 08:49, Jianhua Lin wrote:
> Add the compatible string for the JPEG encoder block found in the
> MediaTek MT8189 SoC.
>
> Unlike some previous SoCs, the MT8189 JPEG encoder requires 34-bit IOVA
> address space support. Therefore, it is added as a standalone compatible
> string without falling back to the generic "mediatek,mtk-jpgenc" to
> ensure the driver applies the correct hardware-specific configurations.
>
> Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Not true.
> Suggested-by: Rob Herring <robh@kernel.org>
Is this some sort of joke of us?
You received no comments at v5 but "suggested-by" me appeared.
You received comments in v4 but you ignored them completely.
NAK, I am really getting fed up how absolutely terrible contributions
from Mediatek are. Mediatek doesn't follow the process, doesn't read the
documents describing the process, sends code which often fails basic
build testing.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v5 4/4] ARM: omap1: enable real software node lookup of GPIOs on Nokia 770
From: Bartosz Golaszewski @ 2026-04-03 7:23 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: Bartosz Golaszewski, Greg Kroah-Hartman, Rafael J. Wysocki,
Danilo Krummrich, Andy Shevchenko, Daniel Scally, Heikki Krogerus,
Sakari Ailus, Aaro Koskinen, Janusz Krzysztofik, Tony Lindgren,
Russell King, Kevin Hilman, Arnd Bergmann, driver-core,
linux-kernel, linux-acpi, linux-arm-kernel, linux-omap
In-Reply-To: <ac6n1p3eLVFzumbt@google.com>
On Thu, Apr 2, 2026 at 7:32 PM Dmitry Torokhov
<dmitry.torokhov@gmail.com> wrote:
>
> On Thu, Apr 02, 2026 at 04:15:05PM +0200, Bartosz Golaszewski wrote:
> > @@ -244,6 +263,13 @@ static int __init omap16xx_gpio_init(void)
> > iounmap(base);
> >
> > platform_device_register(omap16xx_gpio_dev[i]);
> > +
> > + ret = device_add_software_node(&omap16xx_gpio_dev[i]->dev,
> > + omap16xx_gpio_swnodes[i]);
> > + if (ret) {
> > + dev_err(&pdev->dev, "Failed to add software node.\n");
> > + return ret;
> > + }
>
> I think the best and safest way is to convert to using
> platform_driver_register_full() and set swnode in the relevant "info"
> instance.
For sure, that's the plan. I will respin this after v7.1-rc1 with that change.
Bart
^ permalink raw reply
* [PATCH] arm64: dts: rockchip: odroid-m2: Enable DisplayPort Alt Mode over USB-C
From: Clemens Malten @ 2026-04-03 7:25 UTC (permalink / raw)
To: heiko
Cc: robh, krzk+dt, conor+dt, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel, Clemens Malten
Enable USB-C DisplayPort Alt Mode on the ODROID-M2 board (RK3588S) by
adding the necessary DTS changes:
- Enable dp0 controller (dw-dp driver)
- Add VOP2 video pipeline endpoints: vp2 -> dp0 -> usbdp_phy0
- Fix try-power-role from 'source' to 'sink' to allow the board to
receive power and trigger correct PD negotiation
- Add altmodes block to the USB-C connector with DP SVID (0xff01) and
VDO. Note: svid must be declared as a 16-bit value (/bits/ 16) as
required by the typec class driver (fwnode_property_read_u16)
Tested on ODROID-M2 (RK3588S) with a UGreen CM654 USB-C DP adapter
under mainline Linux 6.19-rc.
This patch depends on Andy Yan's RK3588 DisplayPort Controller series:
Link: https://lore.kernel.org/all/20250822063959.692098-1-andyshrk@163.com/
Signed-off-by: Clemens Malten <c.malten@proton.me>
---
.../boot/dts/rockchip/rk3588s-odroid-m2.dts | 29 ++++++++++++++++++-
1 file changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts
index a72063c55..dbc62f032 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dts
@@ -352,7 +352,17 @@ connector {
power-role = "dual";
sink-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- try-power-role = "source";
+ try-power-role = "sink";
+
+ altmodes {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ altmode@0 {
+ reg = <0>;
+ svid = /bits/ 16 <0xff01>;
+ vdo = <0xffffffff>;
+ };
+ };
ports {
#address-cells = <1>;
@@ -952,3 +962,20 @@ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
remote-endpoint = <&hdmi0_in_vp0>;
};
};
+
+&dp0 {
+ status = "okay";
+};
+
+&dp0_in {
+ dp0_in_vp2: endpoint {
+ remote-endpoint = <&vp2_out_dp0>;
+ };
+};
+
+&vp2 {
+ vp2_out_dp0: endpoint@a {
+ reg = <ROCKCHIP_VOP2_EP_DP0>;
+ remote-endpoint = <&dp0_in_vp2>;
+ };
+};
--
2.53.0
^ permalink raw reply related
* Re: [GIT PULL 6/7] arm64: tegra: Device tree changes for v7.1-rc1
From: Krzysztof Kozlowski @ 2026-04-03 7:35 UTC (permalink / raw)
To: Thierry Reding, arm, soc
Cc: Thierry Reding, Jon Hunter, linux-tegra, linux-arm-kernel
In-Reply-To: <ac5ahWb1I-qnaK_Y@orome>
On 02/04/2026 14:02, Thierry Reding wrote:
> On Sun, Mar 29, 2026 at 05:10:43PM +0200, Thierry Reding wrote:
>> From: Thierry Reding <thierry.reding@gmail.com>
>>
>> Hi ARM SoC maintainers,
>>
>> The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
>>
>> Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
>>
>> are available in the Git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-7.1-arm64-dt
>>
>> for you to fetch changes up to c70e6bc11d2008fbb19695394b69fd941ab39030:
>>
>> arm64: tegra: Add Tegra264 GPIO controllers (2026-03-28 01:36:46 +0100)
>>
>> Thanks,
>> Thierry
>>
>> ----------------------------------------------------------------
>> arm64: tegra: Device tree changes for v7.1-rc1
>>
>> Various fixes and new additions across a number of devices. GPIO and PCI
>> are enabled on Tegra264 and the Jetson AGX Thor Developer Kit, allowing
>> it to boot via network and mass storage.
>>
>> ----------------------------------------------------------------
>> Diogo Ivo (1):
>> arm64: tegra: smaug: Enable SPI-NOR flash
>>
>> Jon Hunter (1):
>> arm64: tegra: Fix RTC aliases
>>
>> Prathamesh Shete (1):
>> arm64: tegra: Add Tegra264 GPIO controllers
>>
>> Thierry Reding (6):
>> dt-bindings: pci: Document the NVIDIA Tegra264 PCIe controller
>> Merge branch for-7.1/dt-bindings into for-7.1/pci
>> arm64: tegra: Fix snps,blen properties
>> arm64: tegra: Drop redundant clock and reset names for TSEC
>> arm64: tegra: Add PCI controllers on Tegra264
>> arm64: tegra: Add Jetson AGX Thor Developer Kit support
>>
>> .../bindings/pci/nvidia,tegra264-pcie.yaml | 149 +++++++++
>> arch/arm64/boot/dts/nvidia/Makefile | 2 +
>> arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 12 +
>> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 -
>> arch/arm64/boot/dts/nvidia/tegra234-p3701.dtsi | 1 +
>> arch/arm64/boot/dts/nvidia/tegra234-p3767.dtsi | 1 +
>> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 6 +-
>> .../dts/nvidia/tegra264-p4071-0000+p3834-0008.dts | 11 +
>> .../boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi | 12 +
>> arch/arm64/boot/dts/nvidia/tegra264.dtsi | 336 +++++++++++++++++++--
>> 10 files changed, 500 insertions(+), 32 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml
>> create mode 100644 arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834-0008.dts
>> create mode 100644 arch/arm64/boot/dts/nvidia/tegra264-p4071-0000+p3834.dtsi
>
> Hi ARM SoC maintainers,
>
> DT maintainers objected to the way I wanted to handle the DT bindings
> dependency here, so I'll drop the whole PCI stuff from this and redo the
> PR.
It took me ages to get that information from you but finally you pointed
me that this is shared with PCI, so it is fine.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [GIT PULL 1/7] dt-bindings: Changes for v7.1-rc1
From: Krzysztof Kozlowski @ 2026-04-03 7:39 UTC (permalink / raw)
To: Thierry Reding, arm, soc
Cc: Thierry Reding, Jon Hunter, linux-tegra, linux-arm-kernel
In-Reply-To: <ac5aLzMyfnxa-LLi@orome>
On 02/04/2026 14:00, Thierry Reding wrote:
> On Sun, Mar 29, 2026 at 05:10:38PM +0200, Thierry Reding wrote:
>> From: Thierry Reding <thierry.reding@gmail.com>
>>
>> Hi ARM SoC maintainers,
>>
>> The following changes since commit 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f:
>>
>> Linux 7.0-rc1 (2026-02-22 13:18:59 -0800)
>>
>> are available in the Git repository at:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git tags/tegra-for-7.1-dt-bindings
>>
>> for you to fetch changes up to bed2f5b4de6c6fd8f8928f6373ad92e8795c370f:
>>
>> dt-bindings: arm: tegra: Document Jetson AGX Thor DevKit (2026-03-28 01:05:24 +0100)
>>
>> Thanks,
>> Thierry
>>
>> ----------------------------------------------------------------
>> dt-bindings: Changes for v7.1-rc1
>>
>> This contains a few conversions to DT schema along with various
>> additions and fixes to reduce the amount of validation warnings.
>>
>> Included are also a new binding for the PCIe controller found on
>> Tegra264 as well as compatible strings for the Jetson AGX Thor
>> Developer Kit.
>>
>> ----------------------------------------------------------------
>> Sumit Gupta (1):
>> dt-bindings: arm: tegra: Add Tegra238 CBB compatible strings
>>
>> Svyatoslav Ryhel (1):
>> dt-bindings: display: tegra: Document Tegra20 HDMI port
>>
>> Thierry Reding (9):
>> dt-bindings: pci: Document the NVIDIA Tegra264 PCIe controller
>> dt-bindings: phy: tegra-xusb: Document Type C support
>> dt-bindings: clock: tegra124-dfll: Convert to json-schema
>> dt-bindings: interrupt-controller: tegra: Fix reg entries
>> dt-bindings: arm: tegra: Add missing compatible strings
>> dt-bindings: phy: tegra: Document Tegra210 USB PHY
>> dt-bindings: memory: Add Tegra210 memory controller bindings
>> dt-bindings: memory: tegra210: Mark EMC as cooling device
>> dt-bindings: arm: tegra: Document Jetson AGX Thor DevKit
>>
>> Documentation/devicetree/bindings/arm/tegra.yaml | 56 +++-
>> .../bindings/arm/tegra/nvidia,tegra234-cbb.yaml | 4 +
>> .../bindings/clock/nvidia,tegra124-dfll.txt | 155 -----------
>> .../bindings/clock/nvidia,tegra124-dfll.yaml | 290 +++++++++++++++++++++
>> .../display/tegra/nvidia,tegra20-hdmi.yaml | 13 +-
>> .../interrupt-controller/nvidia,tegra20-ictlr.yaml | 23 +-
>> .../memory-controllers/nvidia,tegra210-emc.yaml | 6 +-
>> .../memory-controllers/nvidia,tegra210-mc.yaml | 77 ++++++
>> .../bindings/pci/nvidia,tegra264-pcie.yaml | 149 +++++++++++
>> .../bindings/phy/nvidia,tegra194-xusb-padctl.yaml | 39 ++-
>> .../bindings/phy/nvidia,tegra20-usb-phy.yaml | 1 +
>> 11 files changed, 649 insertions(+), 164 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt
>> create mode 100644 Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.yaml
>> create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-mc.yaml
>> create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml
>
> Hi ARM SoC maintainers,
>
> Please ignore this for now. I'm dropping my set of patches from this
> because they upset the DT maintainers. I'll send another version with
> only Sumit and Svyatoslav's patches.
I plan to take this, because rejecting it won't improve anything and
patches seems to be non-conflicting. In the future, please do not filter
out addresses of other maintainers and their lists from
get_maintainers.pl output for patches belonging to their subsystems. If
the patchset becomes 50-Cc-patch-bomb, then standard rule of submitting
patches applies - should be split.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH 1/2] ARM: dts: imx35: remove empty clock-names for nand-controller@bb000000
From: Frank Li @ 2026-04-03 7:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Daniel Baluta, Shawn Guo,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx, miquel.raynal
clock-names is empty in nand-controller@bb000000, which is wrong.
Remove it to fix below CHECK_DTBS warings:
arch/arm/boot/dts/nxp/imx/imx35-pdk.dtb: nand-controller@bb000000 (fsl,imx35-nand): Unevaluated properties are not allowed ('clock-names' was unexpected)
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx35.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35.dtsi
index ab7b646399894..314c4f4845288 100644
--- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi
@@ -369,7 +369,6 @@ nfc: nand-controller@bb000000 {
compatible = "fsl,imx35-nand", "fsl,imx25-nand";
reg = <0xbb000000 0x2000>;
clocks = <&clks 29>;
- clock-names = "";
interrupts = <33>;
status = "disabled";
};
--
2.43.0
^ permalink raw reply related
* [PATCH 2/2] ARM: dts: imx25: remove empty clock-names for nand-controller@bb000000
From: Frank Li @ 2026-04-03 7:46 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Shawn Guo,
Daniel Baluta,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx, miquel.raynal
In-Reply-To: <20260403074634.774234-1-Frank.Li@nxp.com>
clock-names is empty in nand-controller@bb000000, which is wrong.
Remove it to fix below CHECK_DTBS warings:
arch/arm/boot/dts/nxp/imx/imx25-pdk.dtb: nand-controller@bb000000 (fsl,imx25-nand): Unevaluated properties are not allowed ('clock-names' was unexpected)
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx25.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx25.dtsi b/arch/arm/boot/dts/nxp/imx/imx25.dtsi
index 94dbcef63b8cd..160533b037940 100644
--- a/arch/arm/boot/dts/nxp/imx/imx25.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx25.dtsi
@@ -618,7 +618,6 @@ nfc: nand-controller@bb000000 {
compatible = "fsl,imx25-nand";
reg = <0xbb000000 0x2000>;
clocks = <&clks 50>;
- clock-names = "";
interrupts = <33>;
status = "disabled";
};
--
2.43.0
^ permalink raw reply related
* RE: [EXT] [PATCH v1 resend 0/7] Timer driver module support
From: Zhipeng Wang @ 2026-04-03 7:59 UTC (permalink / raw)
To: Daniel Lezcano, tglx@kernel.org
Cc: shawnguo@kernel.org, jstultz@google.com,
linux-kernel@vger.kernel.org, Matthias Brugger,
AngeloGioacchino Del Regno,
moderated list:ARM/Mediatek SoC support,
moderated list:ARM/Mediatek SoC support
In-Reply-To: <20260327180600.8150-1-daniel.lezcano@kernel.org>
> -----Original Message-----
> From: Daniel Lezcano <daniel.lezcano@kernel.org>
> Sent: 2026年3月28日 2:06
> To: daniel.lezcano@kernel.org; tglx@kernel.org; Zhipeng Wang
> <zhipeng.wang_1@nxp.com>
> Cc: shawnguo@kernel.org; jstultz@google.com; linux-kernel@vger.kernel.org;
> Matthias Brugger <matthias.bgg@gmail.com>; AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com>; moderated list:ARM/Mediatek
> SoC support <linux-arm-kernel@lists.infradead.org>; moderated
> list:ARM/Mediatek SoC support <linux-mediatek@lists.infradead.org>
> Subject: [EXT] [PATCH v1 resend 0/7] Timer driver module support
>
> [You don't often get email from daniel.lezcano@kernel.org. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
>
>
> Converting the timer driver modules requires a particular care because,
> depending on the platform, that may be not supported.
>
> A previous study showed we are safe regarding how the module refcount is
> held and if THIS_MODULE is set for the clockevent and the clocksource when
> they are registered.
>
> It won't be possible to unload a module if a clockevent is registered.
>
> It will be possible to unload a module if only a clocksource is registered and it
> is not the current one.
>
> However platforms without architected timers may need the timer driver to be
> initialized very early and others can be initialized later. The former can not be a
> module and the init function receives a device_node pointer, there is no device
> associated and devres is not used. That results in a lot of rollbacking code
> where usually it is where we find bug and resource leaks. The latter can be
> converted to a module and uses a module_platform_driver(), thus the init
> function is a probe function receiving a struct platform_device pointer
> parameter.
>
> We end up with two approaches and duplicate code for the init functions. This
> is not optimal.
>
> Finally, we have the driver having to be initialized very early on some platforms
> and be built as a module on other platforms, resulting on having two init
> functions co-existing in the same driver.
>
> This series provides what is needed to move to the same probe function for
> early init, builtin and module timers.
>
> A new macro is introduced: TIMER_PDEV_DECLARE() and a new Kconfig option
> is added CONFIG_EARLY_TIMER. TIMER_PDEV_DECLARE() will have different
> behavior depending on the context:
>
> - The driver is a module and CONFIG_EARLY_TIMER=no
> --> the driver is a module
>
> - The driver is builtin and CONFIG_EARLY_TIMER=no
> --> the driver is loaded later
>
> - The driver is builtin or a module but CONFIG_EARLY_TIMER=yes
> --> the driver is initialized through the timer-probe function
>
> The different timer driver framework functions have their __init sections
> removed and the symbols exported in order to be compatible with the drivers
> converted into modules.
>
> The series provides a couple of drivers changed. The Mediatek as a recent
> requested target which is only compiled-tested. The Rockchip timer which was
> tested on a rk3588 in the three different configurations.
>
> Daniel Lezcano (7):
> clocksource/drivers/timer-probe: Create a platform_device before the
> framework is initialized
> drivers/clocksource/rockchip: Use the TIMER_PDEV_DECLARE() macro
> clocksource/drivers/mmio: Make the code compatible with modules
> clocksource/drivers/timer-of: Make the code compatible with modules
> clocksource/drivers/timer-probe: Add the module support for the
> TIMER_PDEV_DECLARE() macro
> clocksource/drivers/rockchip: Add rockchip timer module support
> clocksource/drivers/mediatek: Convert to module support
>
> drivers/clocksource/Kconfig | 7 +-
> drivers/clocksource/mmio.c | 11 ++-
> drivers/clocksource/timer-mediatek.c | 29 ++++++--
> drivers/clocksource/timer-of.c | 24 ++++---
> drivers/clocksource/timer-of.h | 5 +-
> drivers/clocksource/timer-probe.c | 69 ++++++++++++++++--
> drivers/clocksource/timer-rockchip.c | 101 ++++++++++-----------------
> include/asm-generic/vmlinux.lds.h | 10 +++
> include/linux/clocksource.h | 31 ++++++++
> 9 files changed, 194 insertions(+), 93 deletions(-)
>
> --
> 2.43.0
Hi Daniel,
Apologies for the delayed response. Thank you for working on the timer driver module support series. I've
tested your patches on i.MX platforms and they work well with the TPM
timer driver.
Based on your framework, I've converted the i.MX TPM timer driver to
use TIMER_PDEV_DECLARE. The driver has been tested on:
- i.MX7ULP (ARM, no alternative timer): built-in with CONFIG_EARLY_TIMER=y
- i.MX8ULP (ARM64, has ARM Generic Timer): built-in, module, and
CONFIG_EARLY_TIMER=y configurations
All test cases passed without issues.
I'm attaching the patch below:
Author: Zhipeng Wang <zhipeng.wang_1@nxp.com>
Date: Thu Apr 2 15:46:53 2026 +0900
clocksource/drivers/imx-tpm: Convert to TIMER_PDEV_DECLARE and improve resource management
Convert the i.MX TPM timer driver from TIMER_OF_DECLARE to
TIMER_PDEV_DECLARE to support both early initialization and
platform device probing, aligning with the timer driver
modernization effort.
This driver is used on two different platforms with the same
hardware:
- ARM platforms (i.MX7ULP) without alternative timers require
early initialization for delay_timer and sched_clock
- ARM64 platforms (i.MX8ULP) with ARM Generic Timer can use
TPM as a backup timer with deferred initialization
Key changes:
1. Replace TIMER_OF_DECLARE with TIMER_PDEV_DECLARE to enable
flexible initialization based on platform requirements
2. Convert tpm_timer_init() to tpm_timer_probe() with platform
device parameter for proper device model integration
3. Use devm_clk_get_enabled() for ipg clock management instead
of manual clk_prepare_enable/clk_put, fixing potential
resource leaks in error paths
4. Remove __init annotations from tpm_clocksource_init() and
tpm_clockevent_init() to support deferred probing
5. Add proper of_device_id table for device matching
Tested on i.MX7ULP (ARM) and i.MX8ULP (ARM64) platforms.
Signed-off-by: Zhipeng Wang <zhipeng.wang_1@nxp.com>
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 00a5c3a682de9..6e753141b3628 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -618,8 +618,9 @@ config CLKSRC_IMX_GPT
select CLKSRC_MMIO
config CLKSRC_IMX_TPM
- bool "Clocksource using i.MX TPM" if COMPILE_TEST
+ tristate "Clocksource using i.MX TPM"
depends on (ARM || ARM64) && HAVE_CLK
+ default ARCH_MXC
select CLKSRC_MMIO
select TIMER_OF
help
diff --git a/drivers/clocksource/timer-imx-tpm.c b/drivers/clocksource/timer-imx-tpm.c
index 92c025b70eb62..13ebb6b627a5b 100644
--- a/drivers/clocksource/timer-imx-tpm.c
+++ b/drivers/clocksource/timer-imx-tpm.c
@@ -8,6 +8,8 @@
#include <linux/clocksource.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
#include <linux/sched_clock.h>
#include "timer-of.h"
@@ -152,7 +154,7 @@ static struct timer_of to_tpm = {
},
};
-static int __init tpm_clocksource_init(void)
+static int tpm_clocksource_init(void)
{
#if defined(CONFIG_ARM)
tpm_delay_timer.read_current_timer = &tpm_read_current_timer;
@@ -171,7 +173,7 @@ static int __init tpm_clocksource_init(void)
clocksource_mmio_readl_up);
}
-static void __init tpm_clockevent_init(void)
+static void tpm_clockevent_init(void)
{
clockevents_config_and_register(&to_tpm.clkevt,
timer_of_rate(&to_tpm) >> 3,
@@ -180,23 +182,21 @@ static void __init tpm_clockevent_init(void)
1));
}
-static int __init tpm_timer_init(struct device_node *np)
+static int tpm_timer_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
struct clk *ipg;
int ret;
- ipg = of_clk_get_by_name(np, "ipg");
- if (IS_ERR(ipg)) {
- pr_err("tpm: failed to get ipg clk\n");
- return -ENODEV;
- }
- /* enable clk before accessing registers */
- ret = clk_prepare_enable(ipg);
- if (ret) {
- pr_err("tpm: ipg clock enable failed (%d)\n", ret);
- clk_put(ipg);
- return ret;
- }
+ /*
+ * Get and enable ipg clock before accessing registers.
+ * Use devm variant to ensure automatic cleanup on error paths.
+ */
+ ipg = devm_clk_get_enabled(dev, "ipg");
+ if (IS_ERR(ipg))
+ return dev_err_probe(dev, PTR_ERR(ipg),
+ "failed to get ipg clock\n");
ret = timer_of_init(np, &to_tpm);
if (ret)
@@ -241,4 +241,13 @@ static int __init tpm_timer_init(struct device_node *np)
return tpm_clocksource_init();
}
-TIMER_OF_DECLARE(imx7ulp, "fsl,imx7ulp-tpm", tpm_timer_init);
+
+static const struct of_device_id imx_tpm_dt_ids[] = {
+ { .compatible = "fsl,imx7ulp-tpm", },
+ { /* sentinel */ }
+};
+
+TIMER_PDEV_DECLARE(imx_tpm, tpm_timer_probe, NULL, imx_tpm_dt_ids);
+
+MODULE_DESCRIPTION("i.MX TPM Timer Driver");
+MODULE_LICENSE("GPL");
BRs,
Zhipeng
^ permalink raw reply related
* Re: [PATCH 1/1] dt-bindings: timer: fsl,imxgpt: add compatible string fsl,imx25-epit
From: Frank Li @ 2026-04-03 8:00 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, open list:CLOCKSOURCE, CLOCKEVENT DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <aaiIdS0zRPBY81aE@mai.linaro.org>
On Wed, Mar 04, 2026 at 08:31:01PM +0100, Daniel Lezcano wrote:
> On Wed, Feb 11, 2026 at 04:49:47PM -0500, Frank Li wrote:
> > Add compatible string fsl,imx25-epit to fix below CHECK_DTBS warnings:
> > arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb: /soc/bus@53f00000/timer@53f94000: failed to match any schema with compatible: ['fsl,imx25-epit']
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
>
> Applied, thanks
Daniel Lezcano:
Can't find it at linux-next master branch, anything wrong!
Frank
^ permalink raw reply
* [PATCH v2] dt-bindings: arm-smmu: qcom: Add compatible for Hawi SoC
From: Mukesh Ojha @ 2026-04-03 8:09 UTC (permalink / raw)
To: Will Deacon, Joerg Roedel, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robin Murphy
Cc: Robin Murphy, linux-arm-kernel, iommu, devicetree, linux-kernel,
Mukesh Ojha
Qualcomm Hawi SoC include apps smmu that implements arm,mmu-500, which
is used to translate device-visible virtual addresses to physical
addresses. Add compatible for these items.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
Changes in v2:
- Added qcom in the subject as Hawi is a Qualcomm SoC.
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 27d25bc98cbe..06fb5c8e7547 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -93,6 +93,7 @@ properties:
items:
- enum:
- qcom,glymur-smmu-500
+ - qcom,hawi-smmu-500
- qcom,kaanapali-smmu-500
- qcom,milos-smmu-500
- qcom,qcm2290-smmu-500
--
2.53.0
^ permalink raw reply related
* Re: arm `rustdoc` Rust 1.85.0-only build error
From: Fabian Grünbichler @ 2026-04-03 8:12 UTC (permalink / raw)
To: Miguel Ojeda, Christian Schrrefl, Russell King
Cc: Rudraksha Gupta, Ard Biesheuvel, linux-arm-kernel, rust-for-linux,
linux-kernel
In-Reply-To: <20260331190053.482607-1-ojeda@kernel.org>
On Tue, Mar 31, 2026, at 9:00 PM, Miguel Ojeda wrote:
> Hi Christian, Russell, arm, Fabian,
>
> For Rust 1.85.0, for arm32, for the `rustdoc` target (i.e. all those
> combined), I am seeing:
>
> RUSTDOC
> .../1.85.0-x86_64-unknown-linux-gnu/lib/rustlib/src/rust/library/core/src/lib.rs
> error: target feature `fp-armv8` cannot be toggled with
> `#[target_feature]`: Rust ties `fp-armv8` to `neon`
> -->
> .../1.85.0-x86_64-unknown-linux-gnu/lib/rustlib/src/rust/library/core/src/../../stdarch/crates/core_arch/src/arm_shared/neon/generated.rs:7538:48
> |
> 7538 | #[cfg_attr(target_arch = "arm", target_feature(enable =
> "fp-armv8,v8"))]
> |
> ^^^^^^^^^^^^^^^^^^^^^
>
> The issue is [1], was introduced in Rust 1.85.0 and was fixed already in
> Rust 1.85.1 [2]:
>
> Link: https://github.com/rust-lang/rust/issues/137366 [1]
> Link: https://github.com/rust-lang/rust/pull/137632 [2]
>
> It is unfortunate since our minimum is going to be 1.85.0 since that is
> what Debian Stable has (even if patches may be on top) -- I generally
> test the latest patch versions for each minor, but I noticed this since
> I also test the actual minimum, and I am bumping it to 1.85.0.
>
> To be clear, it is likely almost no one actually cares about this, since
> nobody complained yet, and this can easily be fixed using the already
> released Rust 1.85.1.
>
> By the way, what is Debian's policy on upstream Rust patch versions?
In unstable, we pull them in usually by virtue of lagging behind a bit anyway.
In stable there is no policy per se - both importing a new smallish important
upstream release, or cherry-picking patches are options in general. A few
packages with clear upstream LTS policies are updated often (systemd, glibc,
the kernel itself, firefox-esr and chromium would be the most popular
examples). If there is no upstream stable release series that matches Debian
stable policies, the usual approach is to do a targeted backport of just the
fixes.
It's a bit unfortunate that the timing lined up like it did, because given the
lack of rustc LTS, usually there are no point releases for the version to be
included in Debian stable anyway.
It's up to the stable release managers how big of a delta is acceptable.
I will check how the full diff for 1.85.1 looks like compared to just picking
the rustdoc fix referenced above, and then file a stable update request. AFAIU
either option works for you?
The next Trixie point release is slated for May 16th, so we still have a bit of
time to discuss this with SRM.
Fabian
^ permalink raw reply
* Re: [PATCH 1/1] dt-bindings: timer: fsl,imxgpt: add compatible string fsl,imx25-epit
From: Daniel Lezcano @ 2026-04-03 8:15 UTC (permalink / raw)
To: Frank Li, Mark Brown
Cc: Daniel Lezcano, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, open list:CLOCKSOURCE, CLOCKEVENT DRIVERS,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Stephen Rothwell
In-Reply-To: <ac9ztfwZMrZZgTeP@lizhi-Precision-Tower-5810>
On 4/3/26 10:00, Frank Li wrote:
> On Wed, Mar 04, 2026 at 08:31:01PM +0100, Daniel Lezcano wrote:
>> On Wed, Feb 11, 2026 at 04:49:47PM -0500, Frank Li wrote:
>>> Add compatible string fsl,imx25-epit to fix below CHECK_DTBS warnings:
>>> arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb: /soc/bus@53f00000/timer@53f94000: failed to match any schema with compatible: ['fsl,imx25-epit']
>>>
>>> Signed-off-by: Frank Li <Frank.Li@nxp.com>
>>
>> Applied, thanks
> Daniel Lezcano:
>
> Can't find it at linux-next master branch, anything wrong!
The patch is in timer/next but may be linux-next disabled my branch
^ permalink raw reply
* Re: [PATCH v12 2/7] qcom-tgu: Add TGU driver
From: Songwei.Chai @ 2026-04-02 2:03 UTC (permalink / raw)
To: Jie Gan, andersson, alexander.shishkin, mike.leach, konrad.dybcio,
suzuki.poulose, james.clark, krzk+dt, conor+dt
Cc: linux-kernel, linux-arm-kernel, linux-arm-msm, coresight,
devicetree, gregkh
In-Reply-To: <2ff7aed6-72c0-492e-96d7-f8c30f331a01@oss.qualcomm.com>
On 3/27/2026 10:35 AM, Jie Gan wrote:
>
>
> On 3/17/2026 11:26 AM, Songwei Chai wrote:
>> Add driver to support device TGU (Trigger Generation Unit).
>> TGU is a Data Engine which can be utilized to sense a plurality of
>> signals and create a trigger into the CTI or generate interrupts to
>> processors. Add probe/enable/disable functions for tgu.
>>
>> Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
>> ---
>> .../ABI/testing/sysfs-bus-amba-devices-tgu | 9 +
>> drivers/Makefile | 1 +
>> drivers/hwtracing/Kconfig | 2 +
>> drivers/hwtracing/qcom/Kconfig | 18 ++
>> drivers/hwtracing/qcom/Makefile | 3 +
>> drivers/hwtracing/qcom/tgu.c | 183 ++++++++++++++++++
>> drivers/hwtracing/qcom/tgu.h | 51 +++++
>> 7 files changed, 267 insertions(+)
>> create mode 100644
>> Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> create mode 100644 drivers/hwtracing/qcom/Kconfig
>> create mode 100644 drivers/hwtracing/qcom/Makefile
>> create mode 100644 drivers/hwtracing/qcom/tgu.c
>> create mode 100644 drivers/hwtracing/qcom/tgu.h
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> new file mode 100644
>> index 000000000000..ead237bb7d89
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> @@ -0,0 +1,9 @@
>> +What: /sys/bus/amba/devices/<tgu-name>/enable_tgu
>> +Date: March 2026
>> +KernelVersion 7.1
>
> missed ":" in all patches.
Thanks Jie, it will be updated in next version.
> Thanks,
> Jie
>
>> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai
>> <songwei.chai@oss.qualcomm.com>
>> +Description:
>> + (RW) Set/Get the enable/disable status of TGU
>> + Accepts only one of the 2 values - 0 or 1.
>> + 0 : disable TGU.
>> + 1 : enable TGU.
>> diff --git a/drivers/Makefile b/drivers/Makefile
>> index 53fbd2e0acdd..82b712a12a26 100644
>> --- a/drivers/Makefile
>> +++ b/drivers/Makefile
>> @@ -177,6 +177,7 @@ obj-$(CONFIG_RAS) += ras/
>> obj-$(CONFIG_USB4) += thunderbolt/
>> obj-$(CONFIG_CORESIGHT) += hwtracing/coresight/
>> obj-y += hwtracing/intel_th/
>> +obj-y += hwtracing/qcom/
>> obj-$(CONFIG_STM) += hwtracing/stm/
>> obj-$(CONFIG_HISI_PTT) += hwtracing/ptt/
>> obj-y += android/
>> diff --git a/drivers/hwtracing/Kconfig b/drivers/hwtracing/Kconfig
>> index 911ee977103c..8a640218eed8 100644
>> --- a/drivers/hwtracing/Kconfig
>> +++ b/drivers/hwtracing/Kconfig
>> @@ -7,4 +7,6 @@ source "drivers/hwtracing/intel_th/Kconfig"
>> source "drivers/hwtracing/ptt/Kconfig"
>> +source "drivers/hwtracing/qcom/Kconfig"
>> +
>> endmenu
>> diff --git a/drivers/hwtracing/qcom/Kconfig
>> b/drivers/hwtracing/qcom/Kconfig
>> new file mode 100644
>> index 000000000000..d6f6d4b0f28e
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/Kconfig
>> @@ -0,0 +1,18 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +#
>> +# QCOM specific hwtracing drivers
>> +#
>> +menu "Qualcomm specific hwtracing drivers"
>> +
>> +config QCOM_TGU
>> + tristate "QCOM Trigger Generation Unit driver"
>> + help
>> + This driver provides support for Trigger Generation Unit that is
>> + used to detect patterns or sequences on a given set of signals.
>> + TGU is used to monitor a particular bus within a given region to
>> + detect illegal transaction sequences or slave responses. It is
>> also
>> + used to monitor a data stream to detect protocol violations
>> and to
>> + provide a trigger point for centering data around a specific
>> event
>> + within the trace data buffer.
>> +
>> +endmenu
>> diff --git a/drivers/hwtracing/qcom/Makefile
>> b/drivers/hwtracing/qcom/Makefile
>> new file mode 100644
>> index 000000000000..5a0a868c1ea0
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/Makefile
>> @@ -0,0 +1,3 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +
>> +obj-$(CONFIG_QCOM_TGU) += tgu.o
>> diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c
>> new file mode 100644
>> index 000000000000..58c19f12f3d7
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/tgu.c
>> @@ -0,0 +1,183 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>> + */
>> +
>> +#include <linux/amba/bus.h>
>> +#include <linux/device.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/pm_runtime.h>
>> +
>> +#include "tgu.h"
>> +
>> +static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
>> +{
>> + TGU_UNLOCK(drvdata->base);
>> + /* Enable TGU to program the triggers */
>> + writel(1, drvdata->base + TGU_CONTROL);
>> + TGU_LOCK(drvdata->base);
>> +}
>> +
>> +static int tgu_enable(struct device *dev)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + if (drvdata->enabled)
>> + return -EBUSY;
>> +
>> + tgu_write_all_hw_regs(drvdata);
>> + drvdata->enabled = true;
>> +
>> + return 0;
>> +}
>> +
>> +static void tgu_do_disable(struct tgu_drvdata *drvdata)
>> +{
>> + TGU_UNLOCK(drvdata->base);
>> + writel(0, drvdata->base + TGU_CONTROL);
>> + TGU_LOCK(drvdata->base);
>> +
>> + drvdata->enabled = false;
>> +}
>> +
>> +static void tgu_disable(struct device *dev)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + if (!drvdata->enabled)
>> + return;
>> +
>> + tgu_do_disable(drvdata);
>> +}
>> +
>> +static ssize_t enable_tgu_show(struct device *dev,
>> + struct device_attribute *attr, char *buf)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> + bool enabled;
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + enabled = drvdata->enabled;
>> +
>> + return sysfs_emit(buf, "%d\n", !!enabled);
>> +}
>> +
>> +/* enable_tgu_store - Configure Trace and Gating Unit (TGU)
>> triggers. */
>> +static ssize_t enable_tgu_store(struct device *dev,
>> + struct device_attribute *attr,
>> + const char *buf,
>> + size_t size)
>> +{
>> + unsigned long val;
>> + int ret;
>> +
>> + ret = kstrtoul(buf, 0, &val);
>> + if (ret || val > 1)
>> + return -EINVAL;
>> +
>> + if (val) {
>> + ret = pm_runtime_resume_and_get(dev);
>> + if (ret)
>> + return ret;
>> + ret = tgu_enable(dev);
>> + if (ret) {
>> + pm_runtime_put(dev);
>> + return ret;
>> + }
>> + } else {
>> + tgu_disable(dev);
>> + pm_runtime_put(dev);
>> + }
>> +
>> + return size;
>> +}
>> +static DEVICE_ATTR_RW(enable_tgu);
>> +
>> +static struct attribute *tgu_common_attrs[] = {
>> + &dev_attr_enable_tgu.attr,
>> + NULL,
>> +};
>> +
>> +static const struct attribute_group tgu_common_grp = {
>> + .attrs = tgu_common_attrs,
>> + NULL,
>> +};
>> +
>> +static const struct attribute_group *tgu_attr_groups[] = {
>> + &tgu_common_grp,
>> + NULL,
>> +};
>> +
>> +static int tgu_probe(struct amba_device *adev, const struct amba_id
>> *id)
>> +{
>> + struct device *dev = &adev->dev;
>> + struct tgu_drvdata *drvdata;
>> + int ret;
>> +
>> + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
>> + if (!drvdata)
>> + return -ENOMEM;
>> +
>> + drvdata->dev = &adev->dev;
>> + dev_set_drvdata(dev, drvdata);
>> +
>> + drvdata->base = devm_ioremap_resource(dev, &adev->res);
>> + if (IS_ERR(drvdata->base))
>> + return PTR_ERR(drvdata->base);
>> +
>> + spin_lock_init(&drvdata->lock);
>> +
>> + ret = sysfs_create_groups(&dev->kobj, tgu_attr_groups);
>> + if (ret) {
>> + dev_err(dev, "failed to create sysfs groups: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + drvdata->enabled = false;
>> +
>> + pm_runtime_put(&adev->dev);
>> +
>> + return 0;
>> +}
>> +
>> +static void tgu_remove(struct amba_device *adev)
>> +{
>> + struct device *dev = &adev->dev;
>> +
>> + sysfs_remove_groups(&dev->kobj, tgu_attr_groups);
>> +
>> + tgu_disable(dev);
>> +}
>> +
>> +static const struct amba_id tgu_ids[] = {
>> + {
>> + .id = 0x000f0e00,
>> + .mask = 0x000fffff,
>> + },
>> + { 0, 0, NULL },
>> +};
>> +
>> +MODULE_DEVICE_TABLE(amba, tgu_ids);
>> +
>> +static struct amba_driver tgu_driver = {
>> + .drv = {
>> + .name = "qcom-tgu",
>> + .suppress_bind_attrs = true,
>> + },
>> + .probe = tgu_probe,
>> + .remove = tgu_remove,
>> + .id_table = tgu_ids,
>> +};
>> +
>> +module_amba_driver(tgu_driver);
>> +
>> +MODULE_AUTHOR("Songwei Chai <songwei.chai@oss.qualcomm.com>");
>> +MODULE_AUTHOR("Jinlong Mao <jinlong.mao@oss.qualcomm.com>");
>> +MODULE_DESCRIPTION("Qualcomm Trigger Generation Unit driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h
>> new file mode 100644
>> index 000000000000..dd7533b9d735
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/tgu.h
>> @@ -0,0 +1,51 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>> + */
>> +
>> +#ifndef _QCOM_TGU_H
>> +#define _QCOM_TGU_H
>> +
>> +/* Register addresses */
>> +#define TGU_CONTROL 0x0000
>> +#define TGU_LAR 0xfb0
>> +#define TGU_UNLOCK_OFFSET 0xc5acce55
>> +
>> +static inline void TGU_LOCK(void __iomem *addr)
>> +{
>> + do {
>> + /* Wait for things to settle */
>> + mb();
>> + writel_relaxed(0x0, addr + TGU_LAR);
>> + } while (0);
>> +}
>> +
>> +static inline void TGU_UNLOCK(void __iomem *addr)
>> +{
>> + do {
>> + writel_relaxed(TGU_UNLOCK_OFFSET, addr + TGU_LAR);
>> + /* Make sure everyone has seen this */
>> + mb();
>> + } while (0);
>> +}
>> +
>> +/**
>> + * struct tgu_drvdata - Data structure for a TGU (Trigger Generator
>> Unit)
>> + * @base: Memory-mapped base address of the TGU device
>> + * @dev: Pointer to the associated device structure
>> + * @lock: Spinlock for handling concurrent access to private data
>> + * @enabled: Flag indicating whether the TGU device is enabled
>> + *
>> + * This structure defines the data associated with a TGU device,
>> + * including its base address, device pointers, clock, spinlock for
>> + * synchronization, trigger data pointers, maximum limits for various
>> + * trigger-related parameters, and enable status.
>> + */
>> +struct tgu_drvdata {
>> + void __iomem *base;
>> + struct device *dev;
>> + spinlock_t lock;
>> + bool enabled;
>> +};
>> +
>> +#endif
>
^ permalink raw reply
* Re: [PATCH v12 2/7] qcom-tgu: Add TGU driver
From: Songwei.Chai @ 2026-04-02 2:04 UTC (permalink / raw)
To: Jie Gan, andersson, alexander.shishkin, mike.leach, konrad.dybcio,
suzuki.poulose, james.clark, krzk+dt, conor+dt
Cc: linux-kernel, linux-arm-kernel, linux-arm-msm, coresight,
devicetree, gregkh
In-Reply-To: <a0a9fa9d-5438-48e0-b3de-def97d4214bf@oss.qualcomm.com>
On 3/27/2026 10:16 AM, Jie Gan wrote:
>
>
> On 3/17/2026 11:26 AM, Songwei Chai wrote:
>> Add driver to support device TGU (Trigger Generation Unit).
>> TGU is a Data Engine which can be utilized to sense a plurality of
>> signals and create a trigger into the CTI or generate interrupts to
>> processors. Add probe/enable/disable functions for tgu.
>>
>> Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
>> ---
>> .../ABI/testing/sysfs-bus-amba-devices-tgu | 9 +
>> drivers/Makefile | 1 +
>> drivers/hwtracing/Kconfig | 2 +
>> drivers/hwtracing/qcom/Kconfig | 18 ++
>> drivers/hwtracing/qcom/Makefile | 3 +
>> drivers/hwtracing/qcom/tgu.c | 183 ++++++++++++++++++
>> drivers/hwtracing/qcom/tgu.h | 51 +++++
>> 7 files changed, 267 insertions(+)
>> create mode 100644
>> Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> create mode 100644 drivers/hwtracing/qcom/Kconfig
>> create mode 100644 drivers/hwtracing/qcom/Makefile
>> create mode 100644 drivers/hwtracing/qcom/tgu.c
>> create mode 100644 drivers/hwtracing/qcom/tgu.h
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> new file mode 100644
>> index 000000000000..ead237bb7d89
>> --- /dev/null
>> +++ b/Documentation/ABI/testing/sysfs-bus-amba-devices-tgu
>> @@ -0,0 +1,9 @@
>> +What: /sys/bus/amba/devices/<tgu-name>/enable_tgu
>> +Date: March 2026
>> +KernelVersion 7.1
>> +Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai
>> <songwei.chai@oss.qualcomm.com>
>> +Description:
>> + (RW) Set/Get the enable/disable status of TGU
>> + Accepts only one of the 2 values - 0 or 1.
>> + 0 : disable TGU.
>> + 1 : enable TGU.
>> diff --git a/drivers/Makefile b/drivers/Makefile
>> index 53fbd2e0acdd..82b712a12a26 100644
>> --- a/drivers/Makefile
>> +++ b/drivers/Makefile
>> @@ -177,6 +177,7 @@ obj-$(CONFIG_RAS) += ras/
>> obj-$(CONFIG_USB4) += thunderbolt/
>> obj-$(CONFIG_CORESIGHT) += hwtracing/coresight/
>> obj-y += hwtracing/intel_th/
>> +obj-y += hwtracing/qcom/
>> obj-$(CONFIG_STM) += hwtracing/stm/
>> obj-$(CONFIG_HISI_PTT) += hwtracing/ptt/
>> obj-y += android/
>> diff --git a/drivers/hwtracing/Kconfig b/drivers/hwtracing/Kconfig
>> index 911ee977103c..8a640218eed8 100644
>> --- a/drivers/hwtracing/Kconfig
>> +++ b/drivers/hwtracing/Kconfig
>> @@ -7,4 +7,6 @@ source "drivers/hwtracing/intel_th/Kconfig"
>> source "drivers/hwtracing/ptt/Kconfig"
>> +source "drivers/hwtracing/qcom/Kconfig"
>> +
>> endmenu
>> diff --git a/drivers/hwtracing/qcom/Kconfig
>> b/drivers/hwtracing/qcom/Kconfig
>> new file mode 100644
>> index 000000000000..d6f6d4b0f28e
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/Kconfig
>> @@ -0,0 +1,18 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +#
>> +# QCOM specific hwtracing drivers
>> +#
>> +menu "Qualcomm specific hwtracing drivers"
>> +
>> +config QCOM_TGU
>> + tristate "QCOM Trigger Generation Unit driver"
>> + help
>> + This driver provides support for Trigger Generation Unit that is
>> + used to detect patterns or sequences on a given set of signals.
>> + TGU is used to monitor a particular bus within a given region to
>> + detect illegal transaction sequences or slave responses. It is
>> also
>> + used to monitor a data stream to detect protocol violations
>> and to
>> + provide a trigger point for centering data around a specific
>> event
>> + within the trace data buffer.
>> +
>> +endmenu
>> diff --git a/drivers/hwtracing/qcom/Makefile
>> b/drivers/hwtracing/qcom/Makefile
>> new file mode 100644
>> index 000000000000..5a0a868c1ea0
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/Makefile
>> @@ -0,0 +1,3 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +
>> +obj-$(CONFIG_QCOM_TGU) += tgu.o
>> diff --git a/drivers/hwtracing/qcom/tgu.c b/drivers/hwtracing/qcom/tgu.c
>> new file mode 100644
>> index 000000000000..58c19f12f3d7
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/tgu.c
>> @@ -0,0 +1,183 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>> + */
>> +
>> +#include <linux/amba/bus.h>
>> +#include <linux/device.h>
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/kernel.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/pm_runtime.h>
>> +
>> +#include "tgu.h"
>> +
>> +static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
>> +{
>> + TGU_UNLOCK(drvdata->base);
>> + /* Enable TGU to program the triggers */
>> + writel(1, drvdata->base + TGU_CONTROL);
>> + TGU_LOCK(drvdata->base);
>> +}
>> +
>> +static int tgu_enable(struct device *dev)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + if (drvdata->enabled)
>> + return -EBUSY;
>> +
>> + tgu_write_all_hw_regs(drvdata);
>> + drvdata->enabled = true;
>> +
>> + return 0;
>> +}
>> +
>> +static void tgu_do_disable(struct tgu_drvdata *drvdata)
>> +{
>> + TGU_UNLOCK(drvdata->base);
>> + writel(0, drvdata->base + TGU_CONTROL);
>> + TGU_LOCK(drvdata->base);
>> +
>> + drvdata->enabled = false;
>> +}
>> +
>> +static void tgu_disable(struct device *dev)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + if (!drvdata->enabled)
>> + return;
>> +
>> + tgu_do_disable(drvdata);
>> +}
>> +
>> +static ssize_t enable_tgu_show(struct device *dev,
>> + struct device_attribute *attr, char *buf)
>> +{
>> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev);
>> + bool enabled;
>> +
>> + guard(spinlock)(&drvdata->lock);
>> + enabled = drvdata->enabled;
>> +
>> + return sysfs_emit(buf, "%d\n", !!enabled);
>> +}
>> +
>> +/* enable_tgu_store - Configure Trace and Gating Unit (TGU)
>> triggers. */
>> +static ssize_t enable_tgu_store(struct device *dev,
>> + struct device_attribute *attr,
>> + const char *buf,
>> + size_t size)
>> +{
>> + unsigned long val;
>> + int ret;
>> +
>> + ret = kstrtoul(buf, 0, &val);
>> + if (ret || val > 1)
>> + return -EINVAL;
>> +
>> + if (val) {
>> + ret = pm_runtime_resume_and_get(dev);
>> + if (ret)
>> + return ret;
>> + ret = tgu_enable(dev);
>> + if (ret) {
>> + pm_runtime_put(dev);
>> + return ret;
>> + }
>> + } else {
>> + tgu_disable(dev);
>> + pm_runtime_put(dev);
>
> Sorry I didnt observe this issue with my previous check.
>
> echo 0 to the disabled device will result in the pm_runtime reference
> number goes to negative. We dont need pm_runtime_put(dev) when we try
> to disable a diabled device.
>
> Thanks,
> Jie
Thanks for your careful catch here, Jie.
"pm_runtime_put(dev);" will be removed here in next version.
>
>> + }
>> +
>> + return size;
>> +}
>> +static DEVICE_ATTR_RW(enable_tgu);
>> +
>> +static struct attribute *tgu_common_attrs[] = {
>> + &dev_attr_enable_tgu.attr,
>> + NULL,
>> +};
>> +
>> +static const struct attribute_group tgu_common_grp = {
>> + .attrs = tgu_common_attrs,
>> + NULL,
>> +};
>> +
>> +static const struct attribute_group *tgu_attr_groups[] = {
>> + &tgu_common_grp,
>> + NULL,
>> +};
>> +
>> +static int tgu_probe(struct amba_device *adev, const struct amba_id
>> *id)
>> +{
>> + struct device *dev = &adev->dev;
>> + struct tgu_drvdata *drvdata;
>> + int ret;
>> +
>> + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
>> + if (!drvdata)
>> + return -ENOMEM;
>> +
>> + drvdata->dev = &adev->dev;
>> + dev_set_drvdata(dev, drvdata);
>> +
>> + drvdata->base = devm_ioremap_resource(dev, &adev->res);
>> + if (IS_ERR(drvdata->base))
>> + return PTR_ERR(drvdata->base);
>> +
>> + spin_lock_init(&drvdata->lock);
>> +
>> + ret = sysfs_create_groups(&dev->kobj, tgu_attr_groups);
>> + if (ret) {
>> + dev_err(dev, "failed to create sysfs groups: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + drvdata->enabled = false;
>> +
>> + pm_runtime_put(&adev->dev);
>> +
>> + return 0;
>> +}
>> +
>> +static void tgu_remove(struct amba_device *adev)
>> +{
>> + struct device *dev = &adev->dev;
>> +
>> + sysfs_remove_groups(&dev->kobj, tgu_attr_groups);
>> +
>> + tgu_disable(dev);
>> +}
>> +
>> +static const struct amba_id tgu_ids[] = {
>> + {
>> + .id = 0x000f0e00,
>> + .mask = 0x000fffff,
>> + },
>> + { 0, 0, NULL },
>> +};
>> +
>> +MODULE_DEVICE_TABLE(amba, tgu_ids);
>> +
>> +static struct amba_driver tgu_driver = {
>> + .drv = {
>> + .name = "qcom-tgu",
>> + .suppress_bind_attrs = true,
>> + },
>> + .probe = tgu_probe,
>> + .remove = tgu_remove,
>> + .id_table = tgu_ids,
>> +};
>> +
>> +module_amba_driver(tgu_driver);
>> +
>> +MODULE_AUTHOR("Songwei Chai <songwei.chai@oss.qualcomm.com>");
>> +MODULE_AUTHOR("Jinlong Mao <jinlong.mao@oss.qualcomm.com>");
>> +MODULE_DESCRIPTION("Qualcomm Trigger Generation Unit driver");
>> +MODULE_LICENSE("GPL");
>> diff --git a/drivers/hwtracing/qcom/tgu.h b/drivers/hwtracing/qcom/tgu.h
>> new file mode 100644
>> index 000000000000..dd7533b9d735
>> --- /dev/null
>> +++ b/drivers/hwtracing/qcom/tgu.h
>> @@ -0,0 +1,51 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
>> + */
>> +
>> +#ifndef _QCOM_TGU_H
>> +#define _QCOM_TGU_H
>> +
>> +/* Register addresses */
>> +#define TGU_CONTROL 0x0000
>> +#define TGU_LAR 0xfb0
>> +#define TGU_UNLOCK_OFFSET 0xc5acce55
>> +
>> +static inline void TGU_LOCK(void __iomem *addr)
>> +{
>> + do {
>> + /* Wait for things to settle */
>> + mb();
>> + writel_relaxed(0x0, addr + TGU_LAR);
>> + } while (0);
>> +}
>> +
>> +static inline void TGU_UNLOCK(void __iomem *addr)
>> +{
>> + do {
>> + writel_relaxed(TGU_UNLOCK_OFFSET, addr + TGU_LAR);
>> + /* Make sure everyone has seen this */
>> + mb();
>> + } while (0);
>> +}
>> +
>> +/**
>> + * struct tgu_drvdata - Data structure for a TGU (Trigger Generator
>> Unit)
>> + * @base: Memory-mapped base address of the TGU device
>> + * @dev: Pointer to the associated device structure
>> + * @lock: Spinlock for handling concurrent access to private data
>> + * @enabled: Flag indicating whether the TGU device is enabled
>> + *
>> + * This structure defines the data associated with a TGU device,
>> + * including its base address, device pointers, clock, spinlock for
>> + * synchronization, trigger data pointers, maximum limits for various
>> + * trigger-related parameters, and enable status.
>> + */
>> +struct tgu_drvdata {
>> + void __iomem *base;
>> + struct device *dev;
>> + spinlock_t lock;
>> + bool enabled;
>> +};
>> +
>> +#endif
>
^ permalink raw reply
* Re: [RFC v1 01/11] media: uapi: v4l2-isp: Add v4l2 ISP extensible statistics definitions
From: Jacopo Mondi @ 2026-04-03 8:19 UTC (permalink / raw)
To: Antoine Bouyer
Cc: julien.vuillaumier, alexi.birlinger, daniel.baluta, peng.fan,
frank.li, jacopo.mondi, laurent.pinchart, mchehab, robh, krzk+dt,
conor+dt, shawnguo, s.hauer, kernel, festevam, linux-kernel,
linux-media, devicetree, linux-arm-kernel, Jai Luthra, paul elder
In-Reply-To: <20260123080938.3367348-2-antoine.bouyer@nxp.com>
Hello Antoine
in cc Jai and Paul
Jai and Paul are working on upstreaming new ISP formats which would
benefit from usage of extensible stats.
No pressure of course, just wanted to check how things are progressing
on your side. Do you have an updated version of this patch which can
be taken in ? Should we sync and work on an updated version ?
Thanks!
j
On Fri, Jan 23, 2026 at 09:09:28AM +0100, Antoine Bouyer wrote:
> Extend the v4l2-isp extensible format introduced for isp parameters buffer
> to the statistics buffer as well.
>
> Like for ISP configuration purpose, that will help supporting various ISP
> hardware versions reporting different statistics data with less impact on
> userspace.
>
> The `v4l2_isp_stats_buffer` reuses the `v4l2_isp_params_buffer` container
> definitions, with similar header, versions and flags. V0 and V1 versions
> are provided to match with params versions. On the other side, ENABLE and
> DISABLE flags are not really meaningfull for statistics purpose. So VALID
> and INVALID flags are introduced. Purpose is to force ISP driver to
> validate a statistics buffer, before it is consumed by userspace.
>
> Signed-off-by: Antoine Bouyer <antoine.bouyer@nxp.com>
> ---
> include/uapi/linux/media/v4l2-isp.h | 85 +++++++++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/include/uapi/linux/media/v4l2-isp.h b/include/uapi/linux/media/v4l2-isp.h
> index 779168f9058e..ed1279b86694 100644
> --- a/include/uapi/linux/media/v4l2-isp.h
> +++ b/include/uapi/linux/media/v4l2-isp.h
> @@ -99,4 +99,89 @@ struct v4l2_isp_params_buffer {
> __u8 data[] __counted_by(data_size);
> };
>
> +/**
> + * enum v4l2_isp_stats_version - V4L2 ISP statistics versioning
> + *
> + * @V4L2_ISP_STATS_VERSION_V0: First version of the V4L2 ISP statistics format
> + * (for compatibility)
> + * @V4L2_ISP_STATS_VERSION_V1: First version of the V4L2 ISP statistics format
> + *
> + * V0 and V1 are identical, and comply with V4l2 ISP parameters versions. So
> + * both V0 and V1 refers to the first version of the V4L2 ISP statistics
> + * format.
> + *
> + * Future revisions of the V4L2 ISP statistics format should start from the
> + * value of 2.
> + */
> +enum v4l2_isp_stats_version {
> + V4L2_ISP_STATS_VERSION_V0 = 0,
> + V4L2_ISP_STATS_VERSION_V1,
> +};
> +
> +#define V4L2_ISP_PARAMS_FL_BLOCK_VALID (1U << 0)
> +#define V4L2_ISP_PARAMS_FL_BLOCK_INVALID (1U << 1)
> +
> +/*
> + * Reserve the first 8 bits for V4L2_ISP_STATS_FL_* flag.
> + *
> + * Driver-specific flags should be defined as:
> + * #define DRIVER_SPECIFIC_FLAG0 ((1U << V4L2_ISP_STATS_FL_DRIVER_FLAGS(0))
> + * #define DRIVER_SPECIFIC_FLAG1 ((1U << V4L2_ISP_STATS_FL_DRIVER_FLAGS(1))
> + */
> +#define V4L2_ISP_STATS_FL_DRIVER_FLAGS(n) ((n) + 8)
> +
> +/**
> + * struct v4l2_isp_stats_block_header - V4L2 extensible statistics block header
> + * @type: The statistics block type (driver-specific)
> + * @flags: A bitmask of block flags (driver-specific)
> + * @size: Size (in bytes) of the statistics block, including this header
> + *
> + * This structure represents the common part of all the ISP statistics blocks.
> + * Each statistics block shall embed an instance of this structure type as its
> + * first member, followed by the block-specific statistics data.
> + *
> + * The @type field is an ISP driver-specific value that identifies the block
> + * type. The @size field specifies the size of the parameters block.
> + *
> + * The @flags field is a bitmask of per-block flags V4L2_STATS_ISP_FL_* and
> + * driver-specific flags specified by the driver header.
> + */
> +struct v4l2_isp_stats_block_header {
> + __u16 type;
> + __u16 flags;
> + __u32 size;
> +} __attribute__((aligned(8)));
> +
> +/**
> + * struct v4l2_isp_stats_buffer - V4L2 extensible statistics data
> + * @version: The statistics buffer version (driver-specific)
> + * @data_size: The statistics data effective size, excluding this header
> + * @data: The statistics data
> + *
> + * This structure contains the statistics information of the ISP hardware,
> + * serialized for userspace into a data buffer. Each statistics block is
> + * represented by a block-specific structure which contains a
> + * :c:type:`v4l2_isp_stats_block_header` entry as first member. Driver
> + * populates the @data buffer with statistics information of the ISP blocks it
> + * intends to share to userspace. As a consequence, the data buffer effective
> + * size changes according to the number of ISP blocks that driver intends to
> + * provide and is set by the driver in the @data_size field.
> + *
> + * The statistics buffer is versioned by the @version field to allow modifying
> + * and extending its definition. Driver shall populate the @version field to
> + * inform the userpsace about the version it intends to use. The userspace will
> + * parse and handle the @data buffer according to the data layout specific to
> + * the indicated version.
> + *
> + * For each ISP block that driver wants to report, a block-specific structure
> + * is appended to the @data buffer, one after the other without gaps in
> + * between. Driver shall populate the @data_size field with the effective
> + * size, in bytes, of the @data buffer.
> + */
> +struct v4l2_isp_stats_buffer {
> + __u32 version;
> + __u32 data_size;
> + __u8 data[] __counted_by(data_size);
> +};
> +
> #endif /* _UAPI_V4L2_ISP_H_ */
> --
> 2.52.0
>
^ permalink raw reply
* Re: [PATCH 1/2] ARM: dts: imx35: remove empty clock-names for nand-controller@bb000000
From: Miquel Raynal @ 2026-04-03 8:19 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Daniel Baluta, Shawn Guo,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
In-Reply-To: <20260403074634.774234-1-Frank.Li@nxp.com>
On 03/04/2026 at 03:46:30 -04, Frank Li <Frank.Li@nxp.com> wrote:
> clock-names is empty in nand-controller@bb000000, which is wrong.
>
> Remove it to fix below CHECK_DTBS warings:
> arch/arm/boot/dts/nxp/imx/imx35-pdk.dtb: nand-controller@bb000000 (fsl,imx35-nand): Unevaluated properties are not allowed ('clock-names' was unexpected)
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
^ permalink raw reply
* Re: [PATCH 2/2] ARM: dts: imx25: remove empty clock-names for nand-controller@bb000000
From: Miquel Raynal @ 2026-04-03 8:20 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Daniel Baluta,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
In-Reply-To: <20260403074634.774234-2-Frank.Li@nxp.com>
On 03/04/2026 at 03:46:31 -04, Frank Li <Frank.Li@nxp.com> wrote:
> clock-names is empty in nand-controller@bb000000, which is wrong.
>
> Remove it to fix below CHECK_DTBS warings:
> arch/arm/boot/dts/nxp/imx/imx25-pdk.dtb: nand-controller@bb000000 (fsl,imx25-nand): Unevaluated properties are not allowed ('clock-names' was unexpected)
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
^ permalink raw reply
* Re: [PATCH] arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlay
From: Florijan Plohl @ 2026-04-03 8:29 UTC (permalink / raw)
To: Frank Li
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, imx, linux-arm-kernel,
devicetree, linux-kernel, upstream
In-Reply-To: <ac50OHuEApM3tRHq@lizhi-Precision-Tower-5810>
Hello,
On 4/2/26 15:50, Frank Li wrote:
> On Thu, Apr 02, 2026 at 09:08:26AM +0200, Florijan Plohl wrote:
>> Add overlay for the PEB-AV-18 adapter on phyBOARD-Segin-i.MX91/93.
> what's means PEB-AV-18? Is it random board name?
The PEB-AV-18 is PHYTEC designation for Audio/Video adapter modules that can
be used to connect displays on their boards.
I will improve commit message to add more such information in v2.
>
>
>> The supported LCD is Powertip PH800480T032-ZHC19 panel (AC220).
>>
>> Signed-off-by: Florijan Plohl <florijan.plohl@norik.com>
>> ---
>> arch/arm64/boot/dts/freescale/Makefile | 4 +
>> .../imx91-phyboard-segin-peb-av-18.dtso | 142 ++++++++++++++++++
>> .../imx93-phyboard-segin-peb-av-18.dtso | 142 ++++++++++++++++++
> Any difference between 91 and 93, can use one overlay file?
>
> Frank
Can you suggest how to do so?
There are imx93-pinfunc.h and imx91-pinfunc.h which are not unified
between imx91 and imx93.
So we can only create common dtsi like so:
imx91-93-phyboard-segin-peb-av-18.dtsi
and still use separate dtsos:
imx91-phyboard-segin-peb-av-18.dtso
imx93-phyboard-segin-peb-av-18.dtso
Is that your idea?
BR,
Florijan Plohl
>> --
>> 2.43.0
>>
^ permalink raw reply
* [PATCH] dmaengine: imx-sdma: Refine spba bus searching in probe
From: Shengjiu Wang @ 2026-04-03 8:33 UTC (permalink / raw)
To: vkoul, Frank.Li, s.hauer, kernel, festevam, dmaengine, imx,
linux-arm-kernel, linux-kernel
There are multi spba-busses for i.MX8M* platforms, if only search for
the first spba-bus in DT, the found spba-bus may not the real bus of
audio devices, which cause issue for sdma p2p case, as the sdma p2p
script presently does not deal with the transactions involving two devices
connected to the AIPS bus.
Search the SDMA parent node first, which should be the AIPS bus, then
search the child node whose compatible string is spba-bus under that AIPS
bus for the above multi spba-busses case.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
drivers/dma/imx-sdma.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 3d527883776b..be2fb87b7a89 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -2364,13 +2364,16 @@ static int sdma_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, ret,
"failed to register controller\n");
- spba_bus = of_find_compatible_node(NULL, NULL, "fsl,spba-bus");
+ struct device_node *sdma_parent_np = of_get_parent(np);
+
+ spba_bus = of_get_compatible_child(sdma_parent_np, "fsl,spba-bus");
ret = of_address_to_resource(spba_bus, 0, &spba_res);
if (!ret) {
sdma->spba_start_addr = spba_res.start;
sdma->spba_end_addr = spba_res.end;
}
of_node_put(spba_bus);
+ of_node_put(sdma_parent_np);
}
/*
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v2 3/5] riscv: shstk: Use the new common vm_mmap_shadow_stack() helper
From: Paul Walmsley @ 2026-04-03 8:34 UTC (permalink / raw)
To: Catalin Marinas
Cc: Andrew Morton, David Hildenbrand, Mark Brown, Deepak Gupta,
Rick Edgecombe, Will Deacon, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Alexandre Ghiti, Thomas Gleixner, Ingo Molnar,
Borislav Petkov, Dave Hansen, H. Peter Anvin, linux-arm-kernel,
linux-kernel, linux-riscv, linux-mm
In-Reply-To: <20260225161404.3157851-4-catalin.marinas@arm.com>
On Wed, 25 Feb 2026, Catalin Marinas wrote:
> Replace part of the allocate_shadow_stack() content with a call to
> vm_mmap_shadow_stack(). There is no functional change.
>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> Tested-by: Deepak Gupta <debug@rivosinc.com>
> Reviewed-by: David Hildenbrand (Arm) <david@kernel.org>
> Cc: Paul Walmsley <pjw@kernel.org>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Albert Ou <aou@eecs.berkeley.edu>
> Cc: Alexandre Ghiti <alex@ghiti.fr>
Acked-by: Paul Walmsley <pjw@kernel.org>
- Paul
^ permalink raw reply
* [PATCH 1/3] firmware: arm_scmi: quirk: Improve quirk range parsing
From: Geert Uytterhoeven @ 2026-04-03 8:41 UTC (permalink / raw)
To: Sudeep Holla, Cristian Marussi, Marek Vasut
Cc: arm-scmi, linux-arm-kernel, linux-renesas-soc, Geert Uytterhoeven
In-Reply-To: <cover.1775205358.git.geert+renesas@glider.be>
When a range contains only an end ("-X"), the number string is parsed
twice, as both "sep == first" and "sep != last" are true. Fix this by
dropping the superfluous number parsing for "sep == first".
This does have a harmless functional impact for the unbounded range:
"-" is now accepted, while it was rejected before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/firmware/arm_scmi/quirks.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/firmware/arm_scmi/quirks.c b/drivers/firmware/arm_scmi/quirks.c
index 03848283c2a07b72..b1d9cd9fa2427879 100644
--- a/drivers/firmware/arm_scmi/quirks.c
+++ b/drivers/firmware/arm_scmi/quirks.c
@@ -238,16 +238,15 @@ static int scmi_quirk_range_parse(struct scmi_quirk *quirk)
if (sep)
*sep = '\0';
- if (sep == first) /* -X */
- ret = kstrtouint(first + 1, 0, &quirk->end_range);
- else /* X OR X- OR X-y */
+ if (sep != first) /* X OR X- OR X-y */ {
ret = kstrtouint(first, 0, &quirk->start_range);
- if (ret)
- return ret;
+ if (ret)
+ return ret;
+ }
if (!sep)
quirk->end_range = quirk->start_range;
- else if (sep != last) /* x-Y */
+ else if (sep != last) /* -X OR x-Y */
ret = kstrtouint(sep + 1, 0, &quirk->end_range);
if (quirk->start_range > quirk->end_range)
--
2.43.0
^ permalink raw reply related
* [PATCH 3/3] firmware: arm_scmi: Convert to list_for_each_entry()
From: Geert Uytterhoeven @ 2026-04-03 8:41 UTC (permalink / raw)
To: Sudeep Holla, Cristian Marussi, Marek Vasut
Cc: arm-scmi, linux-arm-kernel, linux-renesas-soc, Geert Uytterhoeven
In-Reply-To: <cover.1775205358.git.geert+renesas@glider.be>
Simplify the loop in scmi_handle_get() by using list_for_each_entry().
Suggested-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/firmware/arm_scmi/driver.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c
index 57785c0c04241e46..b1bba2c61b728b56 100644
--- a/drivers/firmware/arm_scmi/driver.c
+++ b/drivers/firmware/arm_scmi/driver.c
@@ -2584,13 +2584,11 @@ static bool scmi_is_transport_atomic(const struct scmi_handle *handle,
*/
static struct scmi_handle *scmi_handle_get(struct device *dev)
{
- struct list_head *p;
struct scmi_info *info;
struct scmi_handle *handle = NULL;
mutex_lock(&scmi_list_mutex);
- list_for_each(p, &scmi_list) {
- info = list_entry(p, struct scmi_info, node);
+ list_for_each_entry(info, &scmi_list, node) {
if (dev->parent == info->dev) {
info->users++;
handle = &info->handle;
--
2.43.0
^ permalink raw reply related
* [PATCH 2/3] firmware: arm_scmi: quirk: Simplify quirk table iteration
From: Geert Uytterhoeven @ 2026-04-03 8:41 UTC (permalink / raw)
To: Sudeep Holla, Cristian Marussi, Marek Vasut
Cc: arm-scmi, linux-arm-kernel, linux-renesas-soc, Geert Uytterhoeven
In-Reply-To: <cover.1775205358.git.geert+renesas@glider.be>
The current table entry is assigned in both the init and loop
expressions of the for-statement. Merge this into a single assignment
in the conditional expression, to simplify the code.
While at it, make the loop counter unsigned and loop-local.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/firmware/arm_scmi/quirks.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/firmware/arm_scmi/quirks.c b/drivers/firmware/arm_scmi/quirks.c
index b1d9cd9fa2427879..2b38ba3f59a13c9e 100644
--- a/drivers/firmware/arm_scmi/quirks.c
+++ b/drivers/firmware/arm_scmi/quirks.c
@@ -258,10 +258,8 @@ static int scmi_quirk_range_parse(struct scmi_quirk *quirk)
void scmi_quirks_initialize(void)
{
struct scmi_quirk *quirk;
- int i;
- for (i = 0, quirk = scmi_quirks_table[0]; quirk;
- i++, quirk = scmi_quirks_table[i]) {
+ for (unsigned int i = 0; (quirk = scmi_quirks_table[i]); i++) {
int ret;
ret = scmi_quirk_range_parse(quirk);
--
2.43.0
^ permalink raw reply related
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