* [RFC PATCH 3/8] mm/vmalloc: Extend vmap_small_pages_range_noflush() to support larger page_shift sizes
From: Barry Song (Xiaomi) @ 2026-04-08 2:51 UTC (permalink / raw)
To: linux-mm, linux-arm-kernel, catalin.marinas, will, akpm, urezki
Cc: linux-kernel, anshuman.khandual, ryan.roberts, ajd, rppt, david,
Xueyuan.chen21, Barry Song (Xiaomi)
In-Reply-To: <20260408025115.27368-1-baohua@kernel.org>
vmap_small_pages_range_noflush() provides a clean interface by taking
struct page **pages and mapping them via direct PTE iteration. This
avoids the page table zigzag seen when using
vmap_range_noflush() for page_shift values other than PAGE_SHIFT.
Extend it to support larger page_shift values, and add PMD- and
contiguous-PTE mappings as well.
Signed-off-by: Barry Song (Xiaomi) <baohua@kernel.org>
---
mm/vmalloc.c | 54 ++++++++++++++++++++++++++++++++++++++++------------
1 file changed, 42 insertions(+), 12 deletions(-)
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 57eae99d9909..5bf072297536 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -524,8 +524,9 @@ void vunmap_range(unsigned long addr, unsigned long end)
static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
unsigned long end, pgprot_t prot, struct page **pages, int *nr,
- pgtbl_mod_mask *mask)
+ pgtbl_mod_mask *mask, unsigned int shift)
{
+ unsigned int steps = 1;
int err = 0;
pte_t *pte;
@@ -543,6 +544,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
do {
struct page *page = pages[*nr];
+ steps = 1;
if (WARN_ON(!pte_none(ptep_get(pte)))) {
err = -EBUSY;
break;
@@ -556,9 +558,24 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
break;
}
+#ifdef CONFIG_HUGETLB_PAGE
+ if (shift != PAGE_SHIFT) {
+ unsigned long pfn = page_to_pfn(page), size;
+
+ size = arch_vmap_pte_range_map_size(addr, end, pfn, shift);
+ if (size != PAGE_SIZE) {
+ steps = size >> PAGE_SHIFT;
+ pte_t entry = pfn_pte(pfn, prot);
+
+ entry = arch_make_huge_pte(entry, ilog2(size), 0);
+ set_huge_pte_at(&init_mm, addr, pte, entry, size);
+ continue;
+ }
+ }
+#endif
+
set_pte_at(&init_mm, addr, pte, mk_pte(page, prot));
- (*nr)++;
- } while (pte++, addr += PAGE_SIZE, addr != end);
+ } while (pte += steps, *nr += steps, addr += PAGE_SIZE * steps, addr != end);
lazy_mmu_mode_disable();
*mask |= PGTBL_PTE_MODIFIED;
@@ -568,7 +585,7 @@ static int vmap_pages_pte_range(pmd_t *pmd, unsigned long addr,
static int vmap_pages_pmd_range(pud_t *pud, unsigned long addr,
unsigned long end, pgprot_t prot, struct page **pages, int *nr,
- pgtbl_mod_mask *mask)
+ pgtbl_mod_mask *mask, unsigned int shift)
{
pmd_t *pmd;
unsigned long next;
@@ -578,7 +595,20 @@ static int vmap_pages_pmd_range(pud_t *pud, unsigned long addr,
return -ENOMEM;
do {
next = pmd_addr_end(addr, end);
- if (vmap_pages_pte_range(pmd, addr, next, prot, pages, nr, mask))
+
+ if (shift == PMD_SHIFT) {
+ struct page *page = pages[*nr];
+ phys_addr_t phys_addr = page_to_phys(page);
+
+ if (vmap_try_huge_pmd(pmd, addr, next, phys_addr, prot,
+ shift)) {
+ *mask |= PGTBL_PMD_MODIFIED;
+ *nr += 1 << (shift - PAGE_SHIFT);
+ continue;
+ }
+ }
+
+ if (vmap_pages_pte_range(pmd, addr, next, prot, pages, nr, mask, shift))
return -ENOMEM;
} while (pmd++, addr = next, addr != end);
return 0;
@@ -586,7 +616,7 @@ static int vmap_pages_pmd_range(pud_t *pud, unsigned long addr,
static int vmap_pages_pud_range(p4d_t *p4d, unsigned long addr,
unsigned long end, pgprot_t prot, struct page **pages, int *nr,
- pgtbl_mod_mask *mask)
+ pgtbl_mod_mask *mask, unsigned int shift)
{
pud_t *pud;
unsigned long next;
@@ -596,7 +626,7 @@ static int vmap_pages_pud_range(p4d_t *p4d, unsigned long addr,
return -ENOMEM;
do {
next = pud_addr_end(addr, end);
- if (vmap_pages_pmd_range(pud, addr, next, prot, pages, nr, mask))
+ if (vmap_pages_pmd_range(pud, addr, next, prot, pages, nr, mask, shift))
return -ENOMEM;
} while (pud++, addr = next, addr != end);
return 0;
@@ -604,7 +634,7 @@ static int vmap_pages_pud_range(p4d_t *p4d, unsigned long addr,
static int vmap_pages_p4d_range(pgd_t *pgd, unsigned long addr,
unsigned long end, pgprot_t prot, struct page **pages, int *nr,
- pgtbl_mod_mask *mask)
+ pgtbl_mod_mask *mask, unsigned int shift)
{
p4d_t *p4d;
unsigned long next;
@@ -614,14 +644,14 @@ static int vmap_pages_p4d_range(pgd_t *pgd, unsigned long addr,
return -ENOMEM;
do {
next = p4d_addr_end(addr, end);
- if (vmap_pages_pud_range(p4d, addr, next, prot, pages, nr, mask))
+ if (vmap_pages_pud_range(p4d, addr, next, prot, pages, nr, mask, shift))
return -ENOMEM;
} while (p4d++, addr = next, addr != end);
return 0;
}
static int vmap_small_pages_range_noflush(unsigned long addr, unsigned long end,
- pgprot_t prot, struct page **pages)
+ pgprot_t prot, struct page **pages, unsigned int shift)
{
unsigned long start = addr;
pgd_t *pgd;
@@ -636,7 +666,7 @@ static int vmap_small_pages_range_noflush(unsigned long addr, unsigned long end,
next = pgd_addr_end(addr, end);
if (pgd_bad(*pgd))
mask |= PGTBL_PGD_MODIFIED;
- err = vmap_pages_p4d_range(pgd, addr, next, prot, pages, &nr, &mask);
+ err = vmap_pages_p4d_range(pgd, addr, next, prot, pages, &nr, &mask, shift);
if (err)
break;
} while (pgd++, addr = next, addr != end);
@@ -665,7 +695,7 @@ int __vmap_pages_range_noflush(unsigned long addr, unsigned long end,
if (!IS_ENABLED(CONFIG_HAVE_ARCH_HUGE_VMALLOC) ||
page_shift == PAGE_SHIFT)
- return vmap_small_pages_range_noflush(addr, end, prot, pages);
+ return vmap_small_pages_range_noflush(addr, end, prot, pages, PAGE_SHIFT);
for (i = 0; i < nr; i += 1U << (page_shift - PAGE_SHIFT)) {
int err;
--
2.39.3 (Apple Git-146)
^ permalink raw reply related
* [RFC PATCH 2/8] arm64/vmalloc: Allow arch_vmap_pte_range_map_size to batch multiple CONT_PTE
From: Barry Song (Xiaomi) @ 2026-04-08 2:51 UTC (permalink / raw)
To: linux-mm, linux-arm-kernel, catalin.marinas, will, akpm, urezki
Cc: linux-kernel, anshuman.khandual, ryan.roberts, ajd, rppt, david,
Xueyuan.chen21, Barry Song (Xiaomi)
In-Reply-To: <20260408025115.27368-1-baohua@kernel.org>
Allow arch_vmap_pte_range_map_size to batch multiple CONT_PTE hugepages,
reducing both PTE setup and TLB flush iterations.
Signed-off-by: Barry Song (Xiaomi) <baohua@kernel.org>
---
arch/arm64/include/asm/vmalloc.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/vmalloc.h b/arch/arm64/include/asm/vmalloc.h
index 4ec1acd3c1b3..9eea06d0f75d 100644
--- a/arch/arm64/include/asm/vmalloc.h
+++ b/arch/arm64/include/asm/vmalloc.h
@@ -23,6 +23,8 @@ static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,
unsigned long end, u64 pfn,
unsigned int max_page_shift)
{
+ unsigned long size;
+
/*
* If the block is at least CONT_PTE_SIZE in size, and is naturally
* aligned in both virtual and physical space, then we can pte-map the
@@ -40,7 +42,9 @@ static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,
if (!IS_ALIGNED(PFN_PHYS(pfn), CONT_PTE_SIZE))
return PAGE_SIZE;
- return CONT_PTE_SIZE;
+ size = min3(end - addr, 1UL << max_page_shift, PMD_SIZE >> 1);
+ size = 1UL << (fls(size) - 1);
+ return size;
}
#define arch_vmap_pte_range_unmap_size arch_vmap_pte_range_unmap_size
--
2.39.3 (Apple Git-146)
^ permalink raw reply related
* [RFC PATCH 1/8] arm64/hugetlb: Extend batching of multiple CONT_PTE in a single PTE setup
From: Barry Song (Xiaomi) @ 2026-04-08 2:51 UTC (permalink / raw)
To: linux-mm, linux-arm-kernel, catalin.marinas, will, akpm, urezki
Cc: linux-kernel, anshuman.khandual, ryan.roberts, ajd, rppt, david,
Xueyuan.chen21, Barry Song (Xiaomi)
In-Reply-To: <20260408025115.27368-1-baohua@kernel.org>
For sizes aligned to CONT_PTE_SIZE and smaller than PMD_SIZE,
we can batch CONT_PTE settings instead of handling them individually.
Signed-off-by: Barry Song (Xiaomi) <baohua@kernel.org>
---
arch/arm64/mm/hugetlbpage.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c
index a42c05cf5640..bf31c11ebd3b 100644
--- a/arch/arm64/mm/hugetlbpage.c
+++ b/arch/arm64/mm/hugetlbpage.c
@@ -110,6 +110,12 @@ static inline int num_contig_ptes(unsigned long size, size_t *pgsize)
contig_ptes = CONT_PTES;
break;
default:
+ if (size < CONT_PMD_SIZE && size > 0 &&
+ IS_ALIGNED(size, CONT_PTE_SIZE)) {
+ contig_ptes = size >> PAGE_SHIFT;
+ *pgsize = PAGE_SIZE;
+ break;
+ }
WARN_ON(!__hugetlb_valid_size(size));
}
@@ -359,6 +365,10 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags)
case CONT_PTE_SIZE:
return pte_mkcont(entry);
default:
+ if (pagesize < CONT_PMD_SIZE && pagesize > 0 &&
+ IS_ALIGNED(pagesize, CONT_PTE_SIZE))
+ return pte_mkcont(entry);
+
break;
}
pr_warn("%s: unrecognized huge page size 0x%lx\n",
--
2.39.3 (Apple Git-146)
^ permalink raw reply related
* [RFC PATCH 0/8] mm/vmalloc: Speed up ioremap, vmalloc and vmap with contiguous memory
From: Barry Song (Xiaomi) @ 2026-04-08 2:51 UTC (permalink / raw)
To: linux-mm, linux-arm-kernel, catalin.marinas, will, akpm, urezki
Cc: linux-kernel, anshuman.khandual, ryan.roberts, ajd, rppt, david,
Xueyuan.chen21, Barry Song (Xiaomi)
This patchset accelerates ioremap, vmalloc, and vmap when the memory
is physically fully or partially contiguous. Two techniques are used:
1. Avoid page table zigzag when setting PTEs/PMDs for multiple memory
segments
2. Use batched mappings wherever possible in both vmalloc and ARM64
layers
Patches 1–2 extend ARM64 vmalloc CONT-PTE mapping to support multiple
CONT-PTE regions instead of just one.
Patches 3–4 extend vmap_small_pages_range_noflush() to support page
shifts other than PAGE_SHIFT. This allows mapping multiple memory
segments for vmalloc() without zigzagging page tables.
Patches 5–8 add huge vmap support for contiguous pages. This not only
improves performance but also enables PMD or CONT-PTE mapping for the
vmapped area, reducing TLB pressure.
Many thanks to Xueyuan Chen for his substantial testing efforts
on RK3588 boards.
On the RK3588 8-core ARM64 SoC, with tasks pinned to CPU2 and
the performance CPUfreq policy enabled, Xueyuan’s tests report:
* ioremap(1 MB): 1.2× faster
* vmalloc(1 MB) mapping time (excluding allocation) with
VM_ALLOW_HUGE_VMAP: 1.5× faster
* vmap(): 5.6× faster when memory includes some order-8 pages,
with no regression observed for order-0 pages
Barry Song (Xiaomi) (8):
arm64/hugetlb: Extend batching of multiple CONT_PTE in a single PTE
setup
arm64/vmalloc: Allow arch_vmap_pte_range_map_size to batch multiple
CONT_PTE
mm/vmalloc: Extend vmap_small_pages_range_noflush() to support larger
page_shift sizes
mm/vmalloc: Eliminate page table zigzag for huge vmalloc mappings
mm/vmalloc: map contiguous pages in batches for vmap() if possible
mm/vmalloc: align vm_area so vmap() can batch mappings
mm/vmalloc: Coalesce same page_shift mappings in vmap to avoid pgtable
zigzag
mm/vmalloc: Stop scanning for compound pages after encountering small
pages in vmap
arch/arm64/include/asm/vmalloc.h | 6 +-
arch/arm64/mm/hugetlbpage.c | 10 ++
mm/vmalloc.c | 178 +++++++++++++++++++++++++------
3 files changed, 161 insertions(+), 33 deletions(-)
--
2.39.3 (Apple Git-146)
^ permalink raw reply
* RE: [PATCH v1] PCI: imx6: Add force_suspend flag to override L1SS suspend skip
From: Hongxing Zhu @ 2026-04-08 2:38 UTC (permalink / raw)
To: mani@kernel.org
Cc: Bjorn Helgaas, Frank Li, jingoohan1@gmail.com,
l.stach@pengutronix.de, lpieralisi@kernel.org,
kwilczynski@kernel.org, robh@kernel.org, bhelgaas@google.com,
s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
In-Reply-To: <ihoprlijtwgihkbmszm53iftvpyg7ljvubs3bv2lt22uma74ul@zqgulwmj4jpb>
> -----Original Message-----
> From: mani@kernel.org <mani@kernel.org>
> Sent: 2026年4月7日 15:24
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: Bjorn Helgaas <helgaas@kernel.org>; Frank Li <frank.li@nxp.com>;
> jingoohan1@gmail.com; l.stach@pengutronix.de; lpieralisi@kernel.org;
> kwilczynski@kernel.org; robh@kernel.org; bhelgaas@google.com;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> imx@lists.linux.dev; linux-kernel@vger.kernel.org; stable@vger.kernel.org
> Subject: Re: [PATCH v1] PCI: imx6: Add force_suspend flag to override L1SS
> suspend skip
>
> On Tue, Apr 07, 2026 at 03:31:57AM +0000, Hongxing Zhu wrote:
> > > -----Original Message-----
> > > From: mani@kernel.org <mani@kernel.org>
> > > Sent: 2026年4月4日 1:03
> > > To: Hongxing Zhu <hongxing.zhu@nxp.com>
> > > Cc: Bjorn Helgaas <helgaas@kernel.org>; Frank Li <frank.li@nxp.com>;
> > > jingoohan1@gmail.com; l.stach@pengutronix.de; lpieralisi@kernel.org;
> > > kwilczynski@kernel.org; robh@kernel.org; bhelgaas@google.com;
> > > s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> > > linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > > imx@lists.linux.dev; linux-kernel@vger.kernel.org;
> > > stable@vger.kernel.org
> > > Subject: Re: [PATCH v1] PCI: imx6: Add force_suspend flag to
> > > override L1SS suspend skip
> > >
> > > On Tue, Mar 24, 2026 at 02:01:58AM +0000, Hongxing Zhu wrote:
> > > > > -----Original Message-----
> > > > > From: Bjorn Helgaas <helgaas@kernel.org>
> > > > > Sent: 2026年3月24日 6:09
> > > > > To: Hongxing Zhu <hongxing.zhu@nxp.com>
> > > > > Cc: Frank Li <frank.li@nxp.com>; jingoohan1@gmail.com;
> > > > > l.stach@pengutronix.de; lpieralisi@kernel.org;
> > > > > kwilczynski@kernel.org; mani@kernel.org; robh@kernel.org;
> > > > > bhelgaas@google.com; s.hauer@pengutronix.de;
> > > > > kernel@pengutronix.de; festevam@gmail.com;
> > > > > linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > > > > imx@lists.linux.dev; linux-kernel@vger.kernel.org;
> > > > > stable@vger.kernel.org
> > > > > Subject: Re: [PATCH v1] PCI: imx6: Add force_suspend flag to
> > > > > override L1SS suspend skip
> > > > >
> > > > > On Wed, Mar 18, 2026 at 02:55:45AM +0000, Hongxing Zhu wrote:
> > > > > > > -----Original Message-----
> > > > > > > From: Bjorn Helgaas <helgaas@kernel.org>
> > > > > > ... [messed up quoting]
> > > > >
> > > > > > > On Tue, Mar 17, 2026 at 02:12:56PM +0800, Richard Zhu wrote:
> > > > > > > > Add a force_suspend flag to allow platform drivers to
> > > > > > > > force the PCIe link into L2 state during suspend, even
> > > > > > > > when L1SS (ASPM L1
> > > > > > > > Sub-States) is enabled.
> > > > > > > >
> > > > > > > > By default, the DesignWare PCIe host controller skips L2
> > > > > > > > suspend when L1SS is supported to meet low resume latency
> > > > > > > > requirements for devices like NVMe. However, some
> > > > > > > > platforms like i.MX PCIe need to enter L2 state for proper
> > > > > > > > power management regardless of L1SS
> > > > > support.
> > > > > > > >
> > > > > > > > Enable force_suspend for i.MX PCIe to ensure the link
> > > > > > > > enters
> > > > > > > > L2 during system suspend.
> > > > > > >
> > > > > > > I'm a little bit skeptical about this.
> > > > > > >
> > > > > > > What exactly does a "low resume latency requirement" mean?
> > > > > > > Is this an actual functional requirement that's special to
> > > > > > > NVMe, or is it just the desire for low resume latency that
> > > > > > > everybody has for all devices?
> > > > > >
> > > > > > From my understanding, L1SS mode is characterized by lower
> > > > > > latency when compared to L2 or L3 modes.
> > > > > >
> > > > > > It can be used on all devices, avoiding frequent power on/off cycles.
> > > > > > NVMe can also extend the service life of the equipment.
> > > > >
> > > > > All the above applies to all platforms, so it's not an argument
> > > > > for i.MX-specific code here.
> > > > >
> > > > Hi Bjorn:
> > > > Thanks for your kindly review.
> > > > Yes, it is.
> > > > > > > Is there something special about i.MX here? Why do we want
> > > > > > > i.MX to be different from other host controllers?
> > > > > >
> > > > > > i.MX PCIe loses power supply during Deep Sleep Mode (DSM),
> > > > > > requiring full reinitialization after system wake-up.
> > > > >
> > > > > I don't know what DSM means in PCIe or how it would help justify
> > > > > this change.
> > > > >
> > > > i.MX PCIe power is gated off during suspend, requiring full
> > > > reinitialization on resume
> > > >
> > >
> > > Is this an unconditional behavior? What if the PCIe device is
> > > configured as a wakeup source like WOL, WOW? And if you connect
> > > NVMe, this behavior will result in resume failure as NVMe driver
> > > expects the power to be retained if ASPM is supported.
> >
> > Yes, this is unconditional behavior. The i.MX PCIe controller
> > exclusively supports sideband wakeup mechanisms, which operate
> > independently of the PCIe link state and device power configuration.
> >
>
> I believe you are referring to WAKE# as the sideband wakeup mechanism. If so,
> both host and device has to support WAKE#.
>
Exactly.
> > For devices configured as wakeup sources (WOL, WOW, etc.): The
> > sideband wakeup path bypasses the standard PCIe power management, so
> > these configurations do not impact the i.MX PCIe RC controller's
> > suspend/resume behavior.
> >
>
> Once user enables wakeup for a device, PCI core will configure PME_EN only if
> the device supports toggling WAKE# from D3Cold. So the wakeup functionality
> depends on device too, not just the RC.
>
Yes, you're right.
> > For NVMe devices with ASPM: While NVMe drivers typically expect power
> > retention when ASPM is enabled, the i.MX implementation's sideband
> > wakeup mechanism operates through a separate signaling path. The
> > wakeup functionality does not depend on maintaining PCIe link power,
> > thus avoiding conflicts with NVMe power state expectations.
> >
>
> There is no relation between WAKE# and NVMe. NVMe is a passive device, so
> it doesn't support WAKE#. With this patch alone, the NVMe driver won't
> resume (is ASPM is enabled). You need to tell the NVMe driver to perpare for
> power loss too. Maybe this patch can help you:
> https://lore.kern/
> el.org%2Fall%2F20251231162126.7728-1-manivannan.sadhasivam%40oss.qual
> comm.com%2F&data=05%7C02%7Chongxing.zhu%40nxp.com%7C0779f20d02
> 37440e7acc08de9476b368%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7
> C0%7C639111434711840964%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hc
> GkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIj
> oyfQ%3D%3D%7C0%7C%7C%7C&sdata=R6fDeMjP%2BX3n5LCYFfHI%2Ff80Ms8
> 64geMQH2DGgg05fA%3D&reserved=0
>
> But that patch will only help if your platform supports S2RAM through PSCI.
Thanks a lot, this patch is helpful.
Since, i.MX platforms support the S2RAM through PSCI.
One additional note regarding NVMe: ASPM (Active State Power Management) is
disabled locally on i.MX platforms for NVMe devices. This decision was made
after encountering a system hang issue similar to the one reported by Hans a
few months ago in his patch listed below.
https://lore.kernel.org/linux-nvme/20250502032051.920990-1-hans.zhang@cixtech.com/
Best Regards
Richard Zhu
>
> - Mani
>
> --
> மணிவண்ணன் சதாசிவம்
^ permalink raw reply
* Re: [PATCH 10/10] arm64: Check DAIF (and PMR) at task-switch time
From: Jinjie Ruan @ 2026-04-08 2:17 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Catalin Marinas, Will Deacon
Cc: vladimir.murzin, peterz, linux-kernel, tglx, luto
In-Reply-To: <20260407131650.3813777-11-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> When __switch_to() switches from a 'prev' task to a 'next' task, various
> pieces of CPU state are expected to have specific values, such that
> these do not need to be saved/restored. If any of these hold an
> unexpected value when switching away from the prev task, they could lead
> to surprising behaviour in the context of the next task, and it would be
> difficult to determine where they were configured to their unexpected
> value.
>
> Add some checks for DAIF and PMR at task-switch time so that we can
> detect such issues.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/kernel/process.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> index 489554931231e..ba9038434d2fb 100644
> --- a/arch/arm64/kernel/process.c
> +++ b/arch/arm64/kernel/process.c
> @@ -699,6 +699,29 @@ void update_sctlr_el1(u64 sctlr)
> isb();
> }
>
> +static inline void debug_switch_state(void)
> +{
> + if (system_uses_irq_prio_masking()) {
> + unsigned long daif_expected = 0;
> + unsigned long daif_actual = read_sysreg(daif);
> + unsigned long pmr_expected = GIC_PRIO_IRQOFF;
> + unsigned long pmr_actual = read_sysreg_s(SYS_ICC_PMR_EL1);
> +
> + WARN_ONCE(daif_actual != daif_expected ||
> + pmr_actual != pmr_expected,
> + "Unexpected DAIF + PMR: 0x%lx + 0x%lx (expected 0x%lx + 0x%lx)\n",
> + daif_actual, pmr_actual,
> + daif_expected, pmr_expected);
> + } else {
> + unsigned long daif_expected = DAIF_PROCCTX_NOIRQ;
> + unsigned long daif_actual = read_sysreg(daif);
> +
> + WARN_ONCE(daif_actual != daif_expected,
> + "Unexpected DAIF value: 0x%lx (expected 0x%lx)\n",
> + daif_actual, daif_expected);
> + }
This logic seems consistent with arm64's local_irq_disable()
implementation. Do we need to wrap these debug checks in a config option
(e.g., CONFIG_ARM64_DEBUG_PRIORITY_MASKING) to avoid unnecessary overhead?
__schedule()
-> local_irq_disable()
-> arch_local_irq_disable()
52 static __always_inline void __daif_local_irq_disable(void)
53 {
54 barrier();
55 asm volatile("msr daifset, #3");
56 barrier();
57 }
58
59 static __always_inline void __pmr_local_irq_disable(void)
60 {
61 if (IS_ENABLED(CONFIG_ARM64_DEBUG_PRIORITY_MASKING)) {
62 u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
63 WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr !=
GIC_PRIO_IRQOFF);
64 }
65
66 barrier();
67 write_sysreg_s(GIC_PRIO_IRQOFF, SYS_ICC_PMR_EL1);
68 barrier();
69 }
70
71 static inline void arch_local_irq_disable(void)
72 {
73 if (system_uses_irq_prio_masking()) {
74 __pmr_local_irq_disable();
75 } else {
76 __daif_local_irq_disable();
77 }
78 }
> +}
> +
> /*
> * Thread switching.
> */
> @@ -708,6 +731,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
> {
> struct task_struct *last;
>
> + debug_switch_state();
> +
> fpsimd_thread_switch(next);
> tls_thread_switch(next);
> hw_breakpoint_thread_switch(next);
^ permalink raw reply
* Re: [PATCH 09/10] arm64: entry: Use split preemption logic
From: Jinjie Ruan @ 2026-04-08 1:52 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Catalin Marinas, Will Deacon
Cc: vladimir.murzin, peterz, linux-kernel, tglx, luto
In-Reply-To: <20260407131650.3813777-10-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> The generic irqentry code now provides
> irqentry_exit_to_kernel_mode_preempt() and
> irqentry_exit_to_kernel_mode_after_preempt(), which can be used
> where architectures have different state requirements for involuntary
> preemption and exception return, as is the case on arm64.
>
> Use the new functions on arm64, aligning our exit to kernel mode logic
> with the style of our exit to user mode logic. This removes the need for
> the recently-added bodge in arch_irqentry_exit_need_resched(), and
> allows preemption to occur when returning from any exception taken from
> kernel mode, which is nicer for RT.
>
> In an ideal world, we'd remove arch_irqentry_exit_need_resched(), and
> fold the conditionality directly into the architecture-specific entry
> code. That way all the logic necessary to avoid preempting from a
> pseudo-NMI could be constrained specifically to the EL1 IRQ/FIQ paths,
> avoiding redundant work for other exceptions, and making the flow a bit
> clearer. At present it looks like that would require a larger
> refactoring (e.g. for the PREEMPT_DYNAMIC logic), and so I've left that
> as-is for now.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/include/asm/entry-common.h | 21 ++++++++-------------
> arch/arm64/kernel/entry-common.c | 12 ++++--------
> 2 files changed, 12 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm/entry-common.h
> index 20f0a7c7bde15..cab8cd78f6938 100644
> --- a/arch/arm64/include/asm/entry-common.h
> +++ b/arch/arm64/include/asm/entry-common.h
> @@ -29,19 +29,14 @@ static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *regs,
>
> static inline bool arch_irqentry_exit_need_resched(void)
> {
> - if (system_uses_irq_prio_masking()) {
> - /*
> - * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC
> - * priority masking is used the GIC irqchip driver will clear DAIF.IF
> - * using gic_arch_enable_irqs() for normal IRQs. If anything is set in
> - * DAIF we must have handled an NMI, so skip preemption.
> - */
> - if (read_sysreg(daif))
> - return false;
> - } else {
> - if (read_sysreg(daif) & (PSR_D_BIT | PSR_A_BIT))
> - return false;
> - }
> + /*
> + * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC
> + * priority masking is used the GIC irqchip driver will clear DAIF.IF
> + * using gic_arch_enable_irqs() for normal IRQs. If anything is set in
> + * DAIF we must have handled an NMI, so skip preemption.
> + */
> + if (system_uses_irq_prio_masking() && read_sysreg(daif))
> + return false;
>
> /*
> * Preempting a task from an IRQ means we leave copies of PSTATE
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index 16a65987a6a9b..f42ce7b5c67f3 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -54,8 +54,11 @@ static noinstr irqentry_state_t arm64_enter_from_kernel_mode(struct pt_regs *reg
> static void noinstr arm64_exit_to_kernel_mode(struct pt_regs *regs,
> irqentry_state_t state)
> {
> + local_irq_disable();
> + irqentry_exit_to_kernel_mode_preempt(regs, state);
> + local_daif_mask();
> mte_check_tfsr_exit();
> - irqentry_exit_to_kernel_mode(regs, state);
> + irqentry_exit_to_kernel_mode_after_preempt(regs, state);
> }
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> /*
> @@ -301,7 +304,6 @@ static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_mem_abort(far, esr, regs);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -313,7 +315,6 @@ static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_sp_pc_abort(far, esr, regs);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -324,7 +325,6 @@ static void noinstr el1_undef(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_undef(regs, esr);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -335,7 +335,6 @@ static void noinstr el1_bti(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_bti(regs, esr);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -346,7 +345,6 @@ static void noinstr el1_gcs(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_gcs(regs, esr);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -357,7 +355,6 @@ static void noinstr el1_mops(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_mops(regs, esr);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
> @@ -423,7 +420,6 @@ static void noinstr el1_fpac(struct pt_regs *regs, unsigned long esr)
> state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_fpac(regs, esr);
> - local_daif_mask();
> arm64_exit_to_kernel_mode(regs, state);
> }
>
^ permalink raw reply
* Re: [PATCH 08/10] arm64: entry: Use irqentry_{enter_from,exit_to}_kernel_mode()
From: Jinjie Ruan @ 2026-04-08 1:50 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Catalin Marinas, Will Deacon
Cc: vladimir.murzin, peterz, linux-kernel, tglx, luto
In-Reply-To: <20260407131650.3813777-9-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> The generic irqentry code now provides irqentry_enter_from_kernel_mode()
> and irqentry_exit_to_kernel_mode(), which can be used when an exception
> is known to be taken from kernel mode. These can be inlined into
> architecture-specific entry code, and avoid redundant work to test
> whether the exception was taken from user mode.
>
> Use these in arm64_enter_from_kernel_mode() and
> arm64_exit_to_kernel_mode(), which are only used for exceptions known to
> be taken from kernel mode. This will remove a small amount of redundant
> work, and will permit further changes to arm64_exit_to_kernel_mode() in
> subsequent patches.
>
> There should be no funcitonal change as a result of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/kernel/entry-common.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index 3d01cdacdc7a2..16a65987a6a9b 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -39,7 +39,7 @@ static noinstr irqentry_state_t arm64_enter_from_kernel_mode(struct pt_regs *reg
> {
> irqentry_state_t state;
>
> - state = irqentry_enter(regs);
> + state = irqentry_enter_from_kernel_mode(regs);
> mte_check_tfsr_entry();
> mte_disable_tco_entry(current);
>
> @@ -55,7 +55,7 @@ static void noinstr arm64_exit_to_kernel_mode(struct pt_regs *regs,
> irqentry_state_t state)
> {
> mte_check_tfsr_exit();
> - irqentry_exit(regs, state);
> + irqentry_exit_to_kernel_mode(regs, state);
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> }
>
> /*
^ permalink raw reply
* Re: [PATCH 07/10] arm64: entry: Consistently prefix arm64-specific wrappers
From: Jinjie Ruan @ 2026-04-08 1:49 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Catalin Marinas, Will Deacon
Cc: vladimir.murzin, peterz, linux-kernel, tglx, luto
In-Reply-To: <20260407131650.3813777-8-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> For historical reasons, arm64's entry code has arm64-specific functions
> named enter_from_kernel_mode() and exit_to_kernel_mode(), which are
> wrappers for similarly-named functions from the generic irqentry code.
> Other arm64-specific wrappers have an 'arm64_' prefix to clearly
> distinguish them from their generic counterparts, e.g.
> arm64_enter_from_user_mode() and arm64_exit_to_user_mode().
>
> For consistency and clarity, add an 'arm64_' prefix to these functions.
>
> There should be no functional change as a result of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/kernel/entry-common.c | 38 ++++++++++++++++----------------
> 1 file changed, 19 insertions(+), 19 deletions(-)
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index 3625797e9ee8f..3d01cdacdc7a2 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -35,7 +35,7 @@
> * Before this function is called it is not safe to call regular kernel code,
> * instrumentable code, or any code which may trigger an exception.
> */
> -static noinstr irqentry_state_t enter_from_kernel_mode(struct pt_regs *regs)
> +static noinstr irqentry_state_t arm64_enter_from_kernel_mode(struct pt_regs *regs)
> {
> irqentry_state_t state;
>
> @@ -51,8 +51,8 @@ static noinstr irqentry_state_t enter_from_kernel_mode(struct pt_regs *regs)
> * After this function returns it is not safe to call regular kernel code,
> * instrumentable code, or any code which may trigger an exception.
> */
> -static void noinstr exit_to_kernel_mode(struct pt_regs *regs,
> - irqentry_state_t state)
> +static void noinstr arm64_exit_to_kernel_mode(struct pt_regs *regs,
> + irqentry_state_t state)
> {
> mte_check_tfsr_exit();
> irqentry_exit(regs, state);
> @@ -298,11 +298,11 @@ static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr)
> unsigned long far = read_sysreg(far_el1);
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_mem_abort(far, esr, regs);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr)
> @@ -310,55 +310,55 @@ static void noinstr el1_pc(struct pt_regs *regs, unsigned long esr)
> unsigned long far = read_sysreg(far_el1);
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_sp_pc_abort(far, esr, regs);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_undef(struct pt_regs *regs, unsigned long esr)
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_undef(regs, esr);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_bti(struct pt_regs *regs, unsigned long esr)
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_bti(regs, esr);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_gcs(struct pt_regs *regs, unsigned long esr)
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_gcs(regs, esr);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_mops(struct pt_regs *regs, unsigned long esr)
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_mops(regs, esr);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> static void noinstr el1_breakpt(struct pt_regs *regs, unsigned long esr)
> @@ -420,11 +420,11 @@ static void noinstr el1_fpac(struct pt_regs *regs, unsigned long esr)
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
> local_daif_inherit(regs);
> do_el1_fpac(regs, esr);
> local_daif_mask();
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
>
> asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs)
> @@ -491,13 +491,13 @@ static __always_inline void __el1_irq(struct pt_regs *regs,
> {
> irqentry_state_t state;
>
> - state = enter_from_kernel_mode(regs);
> + state = arm64_enter_from_kernel_mode(regs);
>
> irq_enter_rcu();
> do_interrupt_handler(regs, handler);
> irq_exit_rcu();
>
> - exit_to_kernel_mode(regs, state);
> + arm64_exit_to_kernel_mode(regs, state);
> }
> static void noinstr el1_interrupt(struct pt_regs *regs,
> void (*handler)(struct pt_regs *))
^ permalink raw reply
* Re: [PATCH 06/10] arm64: entry: Don't preempt with SError or Debug masked
From: Jinjie Ruan @ 2026-04-08 1:47 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Catalin Marinas, Will Deacon
Cc: vladimir.murzin, peterz, linux-kernel, tglx, luto
In-Reply-To: <20260407131650.3813777-7-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> On arm64, involuntary kernel preemption has been subtly broken since the
> move to the generic irqentry code. When preemption occurs, the new task
> may run with SError and Debug exceptions masked unexpectedly, leading to
> a loss of RAS events, breakpoints, watchpoints, and single-step
> exceptions.
>
> Prior to moving to the generic irqentry code, involuntary preemption of
> kernel mode would only occur when returning from regular interrupts, in
> a state where interrupts were masked and all other arm64-specific
> exceptions (SError, Debug, and pseudo-NMI) were unmasked. This is the
> only state in which it is valid to switch tasks.
>
> As part of moving to the generic irqentry code, the involuntary
> preemption logic was moved such that involuntary preemption could occur
> when returning from any (non-NMI) exception. As most exception handlers
> mask all arm64-specific exceptions before this point, preemption could
> occur in a state where arm64-specific exceptions were masked. This is
> not a valid state to switch tasks, and resulted in the loss of
> exceptions described above.
>
> As a temporary bodge, avoid the loss of exceptions by avoiding
> involuntary preemption when SError and/or Debug exceptions are masked.
> Practically speaking this means that involuntary preemption will only
> occur when returning from regular interrupts, as was the case before
> moving to the generic irqentry code.
>
> Fixes: 99eb057ccd67 ("arm64: entry: Move arm64_preempt_schedule_irq() into __exit_to_kernel_mode()")
> Reported-by: Ada Couprie Diaz <ada.coupriediaz@arm.com>
> Reported-by: Vladimir Murzin <vladimir.murzin@arm.com>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Will Deacon <will@kernel.org>
> ---
> arch/arm64/include/asm/entry-common.h | 21 +++++++++++++--------
> 1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm/entry-common.h
> index cab8cd78f6938..20f0a7c7bde15 100644
> --- a/arch/arm64/include/asm/entry-common.h
> +++ b/arch/arm64/include/asm/entry-common.h
> @@ -29,14 +29,19 @@ static __always_inline void arch_exit_to_user_mode_work(struct pt_regs *regs,
>
> static inline bool arch_irqentry_exit_need_resched(void)
> {
> - /*
> - * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC
> - * priority masking is used the GIC irqchip driver will clear DAIF.IF
> - * using gic_arch_enable_irqs() for normal IRQs. If anything is set in
> - * DAIF we must have handled an NMI, so skip preemption.
> - */
> - if (system_uses_irq_prio_masking() && read_sysreg(daif))
> - return false;
> + if (system_uses_irq_prio_masking()) {
> + /*
> + * DAIF.DA are cleared at the start of IRQ/FIQ handling, and when GIC
> + * priority masking is used the GIC irqchip driver will clear DAIF.IF
> + * using gic_arch_enable_irqs() for normal IRQs. If anything is set in
> + * DAIF we must have handled an NMI, so skip preemption.
> + */
> + if (read_sysreg(daif))
> + return false;
> + } else {
> + if (read_sysreg(daif) & (PSR_D_BIT | PSR_A_BIT))
> + return false;
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> + }
>
> /*
> * Preempting a task from an IRQ means we leave copies of PSTATE
^ permalink raw reply
* Re: [PATCH 05/10] entry: Split preemption from irqentry_exit_to_kernel_mode()
From: Jinjie Ruan @ 2026-04-08 1:40 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Andy Lutomirski, Peter Zijlstra,
Thomas Gleixner
Cc: vladimir.murzin, will, linux-kernel, catalin.marinas
In-Reply-To: <20260407131650.3813777-6-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> Some architecture-specific work needs to be performed between the state
> management for exception entry/exit and the "real" work to handle the
> exception. For example, arm64 needs to manipulate a number of exception
> masking bits, with different exceptions requiring different masking.
>
> Generally this can all be hidden in the architecture code, but for arm64
> the current structure of irqentry_exit_to_kernel_mode() makes this
> particularly difficult to handle in a way that is correct, maintainable,
> and efficient.
>
> The gory details are described in the thread surrounding:
>
> https://lore.kernel.org/lkml/acPAzdtjK5w-rNqC@J2N7QTR9R3/
>
> The summary is:
>
> * Currently, irqentry_exit_to_kernel_mode() handles both involuntary
> preemption AND state management necessary for exception return.
>
> * When scheduling (including involuntary preemption), arm64 needs to
> have all arm64-specific exceptions unmasked, though regular interrupts
> must be masked.
>
> * Prior to the state management for exception return, arm64 needs to
> mask a number of arm64-specific exceptions, and perform some work with
> these exceptions masked (with RCU watching, etc).
>
> While in theory it is possible to handle this with a new arch_*() hook
> called somewhere under irqentry_exit_to_kernel_mode(), this is fragile
> and complicated, and doesn't match the flow used for exception return to
> user mode, which has a separate 'prepare' step (where preemption can
> occur) prior to the state management.
>
> To solve this, refactor irqentry_exit_to_kernel_mode() to match the
> style of {irqentry,syscall}_exit_to_user_mode(), moving preemption logic
> into a new irqentry_exit_to_kernel_mode_preempt() function, and moving
> state management in a new irqentry_exit_to_kernel_mode_after_preempt()
> function. The existing irqentry_exit_to_kernel_mode() is left as a
> caller of both of these, avoiding the need to modify existing callers.
>
> There should be no functional change as a result of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> include/linux/irq-entry-common.h | 26 +++++++++++++++++++++-----
> 1 file changed, 21 insertions(+), 5 deletions(-)
>
> Thomas/Peter/Andy, as mentioned on IRC, I haven't created kerneldoc
> comments for these new functions because the existing comments don't
> seem all that consistent (e.g. for user mode vs kernel mode), and I
> suspect we want to rewrite them all in one go for wider consistency.
>
> I'm happy to respin this, or to follow-up with that as per your
> preference.
>
> Mark.
>
> diff --git a/include/linux/irq-entry-common.h b/include/linux/irq-entry-common.h
> index 2206150e526d8..24830baa539c6 100644
> --- a/include/linux/irq-entry-common.h
> +++ b/include/linux/irq-entry-common.h
> @@ -421,10 +421,18 @@ static __always_inline irqentry_state_t irqentry_enter_from_kernel_mode(struct p
> return ret;
> }
>
> -static __always_inline void irqentry_exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state)
> +static inline void irqentry_exit_to_kernel_mode_preempt(struct pt_regs *regs, irqentry_state_t state)
> {
> - lockdep_assert_irqs_disabled();
> + if (regs_irqs_disabled(regs) || state.exit_rcu)
> + return;
> +
> + if (IS_ENABLED(CONFIG_PREEMPTION))
> + irqentry_exit_cond_resched();
> +}
>
> +static __always_inline void
> +irqentry_exit_to_kernel_mode_after_preempt(struct pt_regs *regs, irqentry_state_t state)
> +{
> if (!regs_irqs_disabled(regs)) {
> /*
> * If RCU was not watching on entry this needs to be done
> @@ -443,9 +451,6 @@ static __always_inline void irqentry_exit_to_kernel_mode(struct pt_regs *regs, i
> }
>
> instrumentation_begin();
> - if (IS_ENABLED(CONFIG_PREEMPTION))
> - irqentry_exit_cond_resched();
> -
> /* Covers both tracing and lockdep */
> trace_hardirqs_on();
> instrumentation_end();
> @@ -459,6 +464,17 @@ static __always_inline void irqentry_exit_to_kernel_mode(struct pt_regs *regs, i
> }
> }
>
> +static __always_inline void irqentry_exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state)
> +{
> + lockdep_assert_irqs_disabled();
> +
> + instrumentation_begin();
> + irqentry_exit_to_kernel_mode_preempt(regs, state);
> + instrumentation_end();
> +
> + irqentry_exit_to_kernel_mode_after_preempt(regs, state);
> +}
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> +
> /**
> * irqentry_enter - Handle state tracking on ordinary interrupt entries
> * @regs: Pointer to pt_regs of interrupted context
^ permalink raw reply
* Re: [PATCH v12 02/17] drm/bridge: Move legacy bridge driver out of imx directory for multi-platform use
From: Damon Ding @ 2026-04-08 1:38 UTC (permalink / raw)
To: Luca Ceresoli, andrzej.hajda, neil.armstrong, rfoss,
maarten.lankhorst, mripard, tzimmermann, airlied, simona,
victor.liu, shawnguo, s.hauer, inki.dae, sw0312.kim,
kyungmin.park, krzk, jingoohan1, p.zabel, hjc, heiko, andy.yan
Cc: Laurent.pinchart, jonas, jernej.skrabec, kernel, festevam,
alim.akhtar, dmitry.baryshkov, nicolas.frattaroli, dianders,
m.szyprowski, linux-kernel, dri-devel, imx, linux-arm-kernel,
linux-samsung-soc, linux-rockchip
In-Reply-To: <DHMXIJKO62F2.3JVF0Y6L7DI0I@bootlin.com>
Hi Luca,
On 4/7/2026 8:41 PM, Luca Ceresoli wrote:
> Hello Damon,
>
> On Wed Apr 1, 2026 at 11:14 AM CEST, Damon Ding wrote:
>> As suggested by Dmitry, the DRM legacy bridge driver can be pulled
>> out of imx/ subdir for multi-platform use. The driver is also renamed
>> to make it more generic and suitable for platforms other than i.MX.
>>
>> Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
>> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
>> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
>> Tested-by: Heiko Stuebner <heiko@sntech.de> (on rk3588)
>
> I tried applying patchs 1-9 to drm-misc-next but patch 2 does not apply due
> to conflicts in the Kconfig file. Can you please rebase and send a new
> iteration?
>
>
Sure, will rebase and send a new version soon.
Best regards,
Damon
^ permalink raw reply
* Re: [PATCH 04/10] entry: Split kernel mode logic from irqentry_{enter,exit}()
From: Jinjie Ruan @ 2026-04-08 1:32 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Andy Lutomirski, Peter Zijlstra,
Thomas Gleixner
Cc: vladimir.murzin, will, linux-kernel, catalin.marinas
In-Reply-To: <20260407131650.3813777-5-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> The generic irqentry code has entry/exit functions specifically for
> exceptions taken from user mode, but doesn't have entry/exit functions
> specifically for exceptions taken from kernel mode.
>
> It would be helpful to have separate entry/exit functions specifically
> for exceptions taken from kernel mode. This would make the structure of
> the entry code more consistent, and would make it easier for
> architectures to manage logic specific to exceptions taken from kernel
> mode.
>
> Move the logic specific to kernel mode out of irqentry_enter() and
> irqentry_exit() into new irqentry_enter_from_kernel_mode() and
> irqentry_exit_to_kernel_mode() functions. These are marked
> __always_inline and placed in irq-entry-common.h, as with
> irqentry_enter_from_user_mode() and irqentry_exit_to_user_mode(), so
> that they can be inlined into architecture-specific wrappers. The
> existing out-of-line irqentry_enter() and irqentry_exit() functions
> retained as callers of the new functions.
>
> The lockdep assertion from irqentry_exit() is moved into
> irqentry_exit_to_user_mode() and irqentry_exit_to_kernel_mode(). This
> was previously missing from irqentry_exit_to_user_mode() when called
> directly, and any new lockdep assertion failure relating from this
> change is a latent bug.
>
> Aside from the lockdep change noted above, there should be no functional
> change as a result of this patch.
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> include/linux/irq-entry-common.h | 103 +++++++++++++++++++++++++++++++
> kernel/entry/common.c | 103 +++----------------------------
> 2 files changed, 111 insertions(+), 95 deletions(-)
>
> Thomas/Peter/Andy, as mentioned on IRC, I haven't created kerneldoc
> comments for these new functions because the existing comments don't
> seem all that consistent (e.g. for user mode vs kernel mode), and I
> suspect we want to rewrite them all in one go for wider consistency.
>
> I'm happy to respin this, or to follow-up with that as per your
> preference.
>
> Mark.
>
> diff --git a/include/linux/irq-entry-common.h b/include/linux/irq-entry-common.h
> index d1e8591a59195..2206150e526d8 100644
> --- a/include/linux/irq-entry-common.h
> +++ b/include/linux/irq-entry-common.h
> @@ -304,6 +304,8 @@ static __always_inline void irqentry_enter_from_user_mode(struct pt_regs *regs)
> */
> static __always_inline void irqentry_exit_to_user_mode(struct pt_regs *regs)
> {
> + lockdep_assert_irqs_disabled();
> +
> instrumentation_begin();
> irqentry_exit_to_user_mode_prepare(regs);
> instrumentation_end();
> @@ -356,6 +358,107 @@ void dynamic_irqentry_exit_cond_resched(void);
> #define irqentry_exit_cond_resched() raw_irqentry_exit_cond_resched()
> #endif /* CONFIG_PREEMPT_DYNAMIC */
>
> +static __always_inline irqentry_state_t irqentry_enter_from_kernel_mode(struct pt_regs *regs)
> +{
> + irqentry_state_t ret = {
> + .exit_rcu = false,
> + };
> +
> + /*
> + * If this entry hit the idle task invoke ct_irq_enter() whether
> + * RCU is watching or not.
> + *
> + * Interrupts can nest when the first interrupt invokes softirq
> + * processing on return which enables interrupts.
> + *
> + * Scheduler ticks in the idle task can mark quiescent state and
> + * terminate a grace period, if and only if the timer interrupt is
> + * not nested into another interrupt.
> + *
> + * Checking for rcu_is_watching() here would prevent the nesting
> + * interrupt to invoke ct_irq_enter(). If that nested interrupt is
> + * the tick then rcu_flavor_sched_clock_irq() would wrongfully
> + * assume that it is the first interrupt and eventually claim
> + * quiescent state and end grace periods prematurely.
> + *
> + * Unconditionally invoke ct_irq_enter() so RCU state stays
> + * consistent.
> + *
> + * TINY_RCU does not support EQS, so let the compiler eliminate
> + * this part when enabled.
> + */
> + if (!IS_ENABLED(CONFIG_TINY_RCU) &&
> + (is_idle_task(current) || arch_in_rcu_eqs())) {
> + /*
> + * If RCU is not watching then the same careful
> + * sequence vs. lockdep and tracing is required
> + * as in irqentry_enter_from_user_mode().
> + */
> + lockdep_hardirqs_off(CALLER_ADDR0);
> + ct_irq_enter();
> + instrumentation_begin();
> + kmsan_unpoison_entry_regs(regs);
> + trace_hardirqs_off_finish();
> + instrumentation_end();
> +
> + ret.exit_rcu = true;
> + return ret;
> + }
> +
> + /*
> + * If RCU is watching then RCU only wants to check whether it needs
> + * to restart the tick in NOHZ mode. rcu_irq_enter_check_tick()
> + * already contains a warning when RCU is not watching, so no point
> + * in having another one here.
> + */
> + lockdep_hardirqs_off(CALLER_ADDR0);
> + instrumentation_begin();
> + kmsan_unpoison_entry_regs(regs);
> + rcu_irq_enter_check_tick();
> + trace_hardirqs_off_finish();
> + instrumentation_end();
> +
> + return ret;
> +}
> +
> +static __always_inline void irqentry_exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state)
> +{
> + lockdep_assert_irqs_disabled();
> +
> + if (!regs_irqs_disabled(regs)) {
> + /*
> + * If RCU was not watching on entry this needs to be done
> + * carefully and needs the same ordering of lockdep/tracing
> + * and RCU as the return to user mode path.
> + */
> + if (state.exit_rcu) {
> + instrumentation_begin();
> + /* Tell the tracer that IRET will enable interrupts */
> + trace_hardirqs_on_prepare();
> + lockdep_hardirqs_on_prepare();
> + instrumentation_end();
> + ct_irq_exit();
> + lockdep_hardirqs_on(CALLER_ADDR0);
> + return;
> + }
> +
> + instrumentation_begin();
> + if (IS_ENABLED(CONFIG_PREEMPTION))
> + irqentry_exit_cond_resched();
> +
> + /* Covers both tracing and lockdep */
> + trace_hardirqs_on();
> + instrumentation_end();
> + } else {
> + /*
> + * IRQ flags state is correct already. Just tell RCU if it
> + * was not watching on entry.
> + */
> + if (state.exit_rcu)
> + ct_irq_exit();
> + }
> +}
> +
> /**
> * irqentry_enter - Handle state tracking on ordinary interrupt entries
> * @regs: Pointer to pt_regs of interrupted context
> diff --git a/kernel/entry/common.c b/kernel/entry/common.c
> index b5e05d87ba391..1034be02eae84 100644
> --- a/kernel/entry/common.c
> +++ b/kernel/entry/common.c
> @@ -105,70 +105,16 @@ __always_inline unsigned long exit_to_user_mode_loop(struct pt_regs *regs,
>
> noinstr irqentry_state_t irqentry_enter(struct pt_regs *regs)
> {
> - irqentry_state_t ret = {
> - .exit_rcu = false,
> - };
> -
> if (user_mode(regs)) {
> - irqentry_enter_from_user_mode(regs);
> - return ret;
> - }
> + irqentry_state_t ret = {
> + .exit_rcu = false,
> + };
>
> - /*
> - * If this entry hit the idle task invoke ct_irq_enter() whether
> - * RCU is watching or not.
> - *
> - * Interrupts can nest when the first interrupt invokes softirq
> - * processing on return which enables interrupts.
> - *
> - * Scheduler ticks in the idle task can mark quiescent state and
> - * terminate a grace period, if and only if the timer interrupt is
> - * not nested into another interrupt.
> - *
> - * Checking for rcu_is_watching() here would prevent the nesting
> - * interrupt to invoke ct_irq_enter(). If that nested interrupt is
> - * the tick then rcu_flavor_sched_clock_irq() would wrongfully
> - * assume that it is the first interrupt and eventually claim
> - * quiescent state and end grace periods prematurely.
> - *
> - * Unconditionally invoke ct_irq_enter() so RCU state stays
> - * consistent.
> - *
> - * TINY_RCU does not support EQS, so let the compiler eliminate
> - * this part when enabled.
> - */
> - if (!IS_ENABLED(CONFIG_TINY_RCU) &&
> - (is_idle_task(current) || arch_in_rcu_eqs())) {
> - /*
> - * If RCU is not watching then the same careful
> - * sequence vs. lockdep and tracing is required
> - * as in irqentry_enter_from_user_mode().
> - */
> - lockdep_hardirqs_off(CALLER_ADDR0);
> - ct_irq_enter();
> - instrumentation_begin();
> - kmsan_unpoison_entry_regs(regs);
> - trace_hardirqs_off_finish();
> - instrumentation_end();
> -
> - ret.exit_rcu = true;
> + irqentry_enter_from_user_mode(regs);
> return ret;
> }
>
> - /*
> - * If RCU is watching then RCU only wants to check whether it needs
> - * to restart the tick in NOHZ mode. rcu_irq_enter_check_tick()
> - * already contains a warning when RCU is not watching, so no point
> - * in having another one here.
> - */
> - lockdep_hardirqs_off(CALLER_ADDR0);
> - instrumentation_begin();
> - kmsan_unpoison_entry_regs(regs);
> - rcu_irq_enter_check_tick();
> - trace_hardirqs_off_finish();
> - instrumentation_end();
> -
> - return ret;
> + return irqentry_enter_from_kernel_mode(regs);
> }
>
> /**
> @@ -212,43 +158,10 @@ void dynamic_irqentry_exit_cond_resched(void)
>
> noinstr void irqentry_exit(struct pt_regs *regs, irqentry_state_t state)
> {
> - lockdep_assert_irqs_disabled();
> -
> - /* Check whether this returns to user mode */
> - if (user_mode(regs)) {
> + if (user_mode(regs))
> irqentry_exit_to_user_mode(regs);
> - } else if (!regs_irqs_disabled(regs)) {
> - /*
> - * If RCU was not watching on entry this needs to be done
> - * carefully and needs the same ordering of lockdep/tracing
> - * and RCU as the return to user mode path.
> - */
> - if (state.exit_rcu) {
> - instrumentation_begin();
> - /* Tell the tracer that IRET will enable interrupts */
> - trace_hardirqs_on_prepare();
> - lockdep_hardirqs_on_prepare();
> - instrumentation_end();
> - ct_irq_exit();
> - lockdep_hardirqs_on(CALLER_ADDR0);
> - return;
> - }
> -
> - instrumentation_begin();
> - if (IS_ENABLED(CONFIG_PREEMPTION))
> - irqentry_exit_cond_resched();
> -
> - /* Covers both tracing and lockdep */
> - trace_hardirqs_on();
> - instrumentation_end();
> - } else {
> - /*
> - * IRQ flags state is correct already. Just tell RCU if it
> - * was not watching on entry.
> - */
> - if (state.exit_rcu)
> - ct_irq_exit();
> - }
> + else
> + irqentry_exit_to_kernel_mode(regs, state);
> }
>
> irqentry_state_t noinstr irqentry_nmi_enter(struct pt_regs *regs)
^ permalink raw reply
* RE: [PATCH v2 2/3] remoteproc: imx_rproc: Pass bootaddr to SM CPU/LMM reset vector
From: Peng Fan @ 2026-04-08 1:30 UTC (permalink / raw)
To: Mathieu Poirier, Peng Fan (OSS)
Cc: Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Frank Li, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Daniel Baluta, linux-remoteproc@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
In-Reply-To: <adUghiyZbe3fmcNX@p14s>
> Subject: Re: [PATCH v2 2/3] remoteproc: imx_rproc: Pass bootaddr to
> SM CPU/LMM reset vector
>
[...]
>
> >
> > Aligning the ELF entry point with the hardware reset base on
> Cortex‑M
> > systems is possible, but it comes with several risks.
>
> I'm not asking to align the ELF entry point with the hardware reset base.
> All I want is to have the correct start address embedded in the ELF file
> to avoid having to use a mask.
I see, per my understanding:
FreeRTOS typically exposes __isr_vector, which corresponds to the hardware
reset / vector table base.
Zephyr (Cortex‑M) exposes _vector_table, which serves the same purpose.
I am not certain about other RTOSes, but the pattern seems consistent:
the vector table base is already available as a named ELF symbol.
Given that, if the preferred approach is to parse the ELF and explicitly
retrieve the hardware reset base, I can update the implementation accordingly.
If you prefer to parse the elf file to get the hardware reset base,
I could update to use them.
Options1: Something as below:
1. Include rproc_elf_find_symbol in remoteproc_elf_loader.c
2. Use below in imx_rproc.c
ret = rproc_elf_find_symbol(rproc, fw, "__isr_vector", &vector_base);
if (ret)
ret = rproc_elf_find_symbol(rproc, fw, "__vector_table", &vector_base);
if (!ret)
rproc->bootaddr = vector_base
else
dev_info(dev, "no __isr_vector or __vector_table\n")
This makes the hardware reset base explicit, avoids masking e_entry.
Option 2: User‑provided reset symbol via sysfs
As an alternative, we could expose a sysfs attribute,
e.g. reset_symbol, allowing users to specify the symbol name
to be used as the reset base:
echo __isr_vector > /sys/class/remoteproc/remoteprocX/reset_symbol
The remoteproc core would then resolve that symbol from
the ELF and set rproc->bootaddr accordingly.
This provides maximum flexibility but does introduce a new user‑visible ABI,
so I see it more as an opt‑in or fallback mechanism.
Please let me know which approach you prefer, and I will update
this series accordingly in v3..
Thanks,
Peng.
>
> > 1, Semantic mismatch (ELF vs. hardware behavior) 2, Debuggers may
> > attempt to set breakpoints or start execution at the entry symbol
> >
^ permalink raw reply
* Re: [PATCH 03/10] entry: Move irqentry_enter() prototype later
From: Jinjie Ruan @ 2026-04-08 1:21 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Andy Lutomirski, Peter Zijlstra,
Thomas Gleixner
Cc: vladimir.murzin, will, linux-kernel, catalin.marinas
In-Reply-To: <20260407131650.3813777-4-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> Subsequent patches will rework the irqentry_*() functions. The end
> result (and the intermediate diffs) will be much clearer if the
> prototype for the irqentry_enter() function is moved later, immediately
> before the prototype of the irqentry_exit() function.
>
> Move the prototype later.
>
> This is purely a move; there should be no functional change as a result
> of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> include/linux/irq-entry-common.h | 44 ++++++++++++++++----------------
> 1 file changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/include/linux/irq-entry-common.h b/include/linux/irq-entry-common.h
> index 93b4b551f7ae4..d1e8591a59195 100644
> --- a/include/linux/irq-entry-common.h
> +++ b/include/linux/irq-entry-common.h
> @@ -334,6 +334,28 @@ typedef struct irqentry_state {
> } irqentry_state_t;
> #endif
>
> +/**
> + * irqentry_exit_cond_resched - Conditionally reschedule on return from interrupt
> + *
> + * Conditional reschedule with additional sanity checks.
> + */
> +void raw_irqentry_exit_cond_resched(void);
> +
> +#ifdef CONFIG_PREEMPT_DYNAMIC
> +#if defined(CONFIG_HAVE_PREEMPT_DYNAMIC_CALL)
> +#define irqentry_exit_cond_resched_dynamic_enabled raw_irqentry_exit_cond_resched
> +#define irqentry_exit_cond_resched_dynamic_disabled NULL
> +DECLARE_STATIC_CALL(irqentry_exit_cond_resched, raw_irqentry_exit_cond_resched);
> +#define irqentry_exit_cond_resched() static_call(irqentry_exit_cond_resched)()
> +#elif defined(CONFIG_HAVE_PREEMPT_DYNAMIC_KEY)
> +DECLARE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);
> +void dynamic_irqentry_exit_cond_resched(void);
> +#define irqentry_exit_cond_resched() dynamic_irqentry_exit_cond_resched()
> +#endif
> +#else /* CONFIG_PREEMPT_DYNAMIC */
> +#define irqentry_exit_cond_resched() raw_irqentry_exit_cond_resched()
> +#endif /* CONFIG_PREEMPT_DYNAMIC */
> +
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> /**
> * irqentry_enter - Handle state tracking on ordinary interrupt entries
> * @regs: Pointer to pt_regs of interrupted context
> @@ -367,28 +389,6 @@ typedef struct irqentry_state {
> */
> irqentry_state_t noinstr irqentry_enter(struct pt_regs *regs);
>
> -/**
> - * irqentry_exit_cond_resched - Conditionally reschedule on return from interrupt
> - *
> - * Conditional reschedule with additional sanity checks.
> - */
> -void raw_irqentry_exit_cond_resched(void);
> -
> -#ifdef CONFIG_PREEMPT_DYNAMIC
> -#if defined(CONFIG_HAVE_PREEMPT_DYNAMIC_CALL)
> -#define irqentry_exit_cond_resched_dynamic_enabled raw_irqentry_exit_cond_resched
> -#define irqentry_exit_cond_resched_dynamic_disabled NULL
> -DECLARE_STATIC_CALL(irqentry_exit_cond_resched, raw_irqentry_exit_cond_resched);
> -#define irqentry_exit_cond_resched() static_call(irqentry_exit_cond_resched)()
> -#elif defined(CONFIG_HAVE_PREEMPT_DYNAMIC_KEY)
> -DECLARE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);
> -void dynamic_irqentry_exit_cond_resched(void);
> -#define irqentry_exit_cond_resched() dynamic_irqentry_exit_cond_resched()
> -#endif
> -#else /* CONFIG_PREEMPT_DYNAMIC */
> -#define irqentry_exit_cond_resched() raw_irqentry_exit_cond_resched()
> -#endif /* CONFIG_PREEMPT_DYNAMIC */
> -
> /**
> * irqentry_exit - Handle return from exception that used irqentry_enter()
> * @regs: Pointer to pt_regs (exception entry regs)
^ permalink raw reply
* Re: [PATCH 02/10] entry: Remove local_irq_{enable,disable}_exit_to_user()
From: Jinjie Ruan @ 2026-04-08 1:18 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Andy Lutomirski, Peter Zijlstra,
Thomas Gleixner
Cc: vladimir.murzin, will, linux-kernel, catalin.marinas
In-Reply-To: <20260407131650.3813777-3-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> The local_irq_enable_exit_to_user() and local_irq_disable_exit_to_user()
> functions are never overridden by architecture code, and are always
> equivalent to local_irq_enable() and local_irq_disable().
>
> These functions were added on the assumption that arm64 would override
> them to manage 'DAIF' exception masking, as described by Thomas Gleixner
> in these threads:
>
> https://lore.kernel.org/all/20190919150809.340471236@linutronix.de/
> https://lore.kernel.org/all/alpine.DEB.2.21.1910240119090.1852@nanos.tec.linutronix.de/
>
> In practice arm64 did not need to override either. Prior to moving to
> the generic irqentry code, arm64's management of DAIF was reworked in
> commit:
>
> 97d935faacde ("arm64: Unmask Debug + SError in do_notify_resume()")
>
> Since that commit, arm64 only masks interrupts during the 'prepare' step
> when returning to user mode, and masks other DAIF exceptions later.
> Within arm64_exit_to_user_mode(), the arm64 entry code is as follows:
>
> local_irq_disable();
> exit_to_user_mode_prepare_legacy(regs);
> local_daif_mask();
> mte_check_tfsr_exit();
> exit_to_user_mode();
>
> Remove the unnecessary local_irq_enable_exit_to_user() and
> local_irq_disable_exit_to_user() functions.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> include/linux/entry-common.h | 2 +-
> include/linux/irq-entry-common.h | 31 -------------------------------
> kernel/entry/common.c | 4 ++--
> 3 files changed, 3 insertions(+), 34 deletions(-)
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> diff --git a/include/linux/entry-common.h b/include/linux/entry-common.h
> index f83ca0abf2cdb..dbaa153100f44 100644
> --- a/include/linux/entry-common.h
> +++ b/include/linux/entry-common.h
> @@ -321,7 +321,7 @@ static __always_inline void syscall_exit_to_user_mode(struct pt_regs *regs)
> {
> instrumentation_begin();
> syscall_exit_to_user_mode_work(regs);
> - local_irq_disable_exit_to_user();
> + local_irq_disable();
> syscall_exit_to_user_mode_prepare(regs);
> instrumentation_end();
> exit_to_user_mode();
> diff --git a/include/linux/irq-entry-common.h b/include/linux/irq-entry-common.h
> index 3cf4d21168ba1..93b4b551f7ae4 100644
> --- a/include/linux/irq-entry-common.h
> +++ b/include/linux/irq-entry-common.h
> @@ -100,37 +100,6 @@ static __always_inline void enter_from_user_mode(struct pt_regs *regs)
> instrumentation_end();
> }
>
> -/**
> - * local_irq_enable_exit_to_user - Exit to user variant of local_irq_enable()
> - * @ti_work: Cached TIF flags gathered with interrupts disabled
> - *
> - * Defaults to local_irq_enable(). Can be supplied by architecture specific
> - * code.
> - */
> -static inline void local_irq_enable_exit_to_user(unsigned long ti_work);
> -
> -#ifndef local_irq_enable_exit_to_user
> -static __always_inline void local_irq_enable_exit_to_user(unsigned long ti_work)
> -{
> - local_irq_enable();
> -}
> -#endif
> -
> -/**
> - * local_irq_disable_exit_to_user - Exit to user variant of local_irq_disable()
> - *
> - * Defaults to local_irq_disable(). Can be supplied by architecture specific
> - * code.
> - */
> -static inline void local_irq_disable_exit_to_user(void);
> -
> -#ifndef local_irq_disable_exit_to_user
> -static __always_inline void local_irq_disable_exit_to_user(void)
> -{
> - local_irq_disable();
> -}
> -#endif
> -
> /**
> * arch_exit_to_user_mode_work - Architecture specific TIF work for exit
> * to user mode.
> diff --git a/kernel/entry/common.c b/kernel/entry/common.c
> index 9ef63e4147913..b5e05d87ba391 100644
> --- a/kernel/entry/common.c
> +++ b/kernel/entry/common.c
> @@ -47,7 +47,7 @@ static __always_inline unsigned long __exit_to_user_mode_loop(struct pt_regs *re
> */
> while (ti_work & EXIT_TO_USER_MODE_WORK_LOOP) {
>
> - local_irq_enable_exit_to_user(ti_work);
> + local_irq_enable();
>
> if (ti_work & (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY)) {
> if (!rseq_grant_slice_extension(ti_work & TIF_SLICE_EXT_DENY))
> @@ -74,7 +74,7 @@ static __always_inline unsigned long __exit_to_user_mode_loop(struct pt_regs *re
> * might have changed while interrupts and preemption was
> * enabled above.
> */
> - local_irq_disable_exit_to_user();
> + local_irq_disable();
>
> /* Check if any of the above work has queued a deferred wakeup */
> tick_nohz_user_enter_prepare();
^ permalink raw reply
* Re: [PATCH 01/10] entry: Fix stale comment for irqentry_enter()
From: Jinjie Ruan @ 2026-04-08 1:14 UTC (permalink / raw)
To: Mark Rutland, linux-arm-kernel, Andy Lutomirski, Peter Zijlstra,
Thomas Gleixner
Cc: vladimir.murzin, will, linux-kernel, catalin.marinas
In-Reply-To: <20260407131650.3813777-2-mark.rutland@arm.com>
On 2026/4/7 21:16, Mark Rutland wrote:
> The kerneldoc comment for irqentry_enter() refers to idtentry_exit(),
> which is an accidental holdover from the x86 entry code that the generic
> irqentry code was based on.
>
> Correct this to refer to irqentry_exit().
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Andy Lutomirski <luto@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@kernel.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> ---
> include/linux/irq-entry-common.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/linux/irq-entry-common.h b/include/linux/irq-entry-common.h
> index d26d1b1bcbfb9..3cf4d21168ba1 100644
> --- a/include/linux/irq-entry-common.h
> +++ b/include/linux/irq-entry-common.h
> @@ -394,7 +394,7 @@ typedef struct irqentry_state {
> * establish the proper context for NOHZ_FULL. Otherwise scheduling on exit
> * would not be possible.
> *
> - * Returns: An opaque object that must be passed to idtentry_exit()
> + * Returns: An opaque object that must be passed to irqentry_exit()
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
> */
> irqentry_state_t noinstr irqentry_enter(struct pt_regs *regs);
>
^ permalink raw reply
* [PATCH 2/2] pinctrl: single: Add bcm7038-padconf compatible matching
From: Florian Fainelli @ 2026-04-07 23:56 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tony Lindgren, Haojian Zhuang,
open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:PIN CONTROLLER - SINGLE,
open list:PIN CONTROLLER - SINGLE
In-Reply-To: <20260407235611.550515-1-florian.fainelli@broadcom.com>
Just like the TI J7200 padconf, we lose the context and therefore need
to save it and restore it across suspend/resume states.
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
drivers/pinctrl/pinctrl-single.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index d85e6c1f6321..657b42caf811 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -1960,7 +1960,7 @@ static const struct pcs_soc_data pinctrl_single_am654 = {
.irq_status_mask = (1 << 30), /* WKUP_EVT */
};
-static const struct pcs_soc_data pinctrl_single_j7200 = {
+static const struct pcs_soc_data pinctrl_single_loss_off = {
.flags = PCS_CONTEXT_LOSS_OFF,
};
@@ -1972,6 +1972,7 @@ static const struct pcs_soc_data pinconf_single = {
};
static const struct of_device_id pcs_of_match[] = {
+ { .compatible = "brcm,bcm7038-padconf", .data = &pinctrl_single_loss_off },
{ .compatible = "marvell,pxa1908-padconf", .data = &pinconf_single },
{ .compatible = "ti,am437-padconf", .data = &pinctrl_single_am437x },
{ .compatible = "ti,am654-padconf", .data = &pinctrl_single_am654 },
@@ -1979,7 +1980,7 @@ static const struct of_device_id pcs_of_match[] = {
{ .compatible = "ti,omap3-padconf", .data = &pinctrl_single_omap_wkup },
{ .compatible = "ti,omap4-padconf", .data = &pinctrl_single_omap_wkup },
{ .compatible = "ti,omap5-padconf", .data = &pinctrl_single_omap_wkup },
- { .compatible = "ti,j7200-padconf", .data = &pinctrl_single_j7200 },
+ { .compatible = "ti,j7200-padconf", .data = &pinctrl_single_loss_off },
{ .compatible = "pinctrl-single", .data = &pinctrl_single },
{ .compatible = "pinconf-single", .data = &pinconf_single },
{ },
--
2.34.1
^ permalink raw reply related
* [PATCH 0/2] Utilize pinctrl-single for bcm7038-style chips
From: Florian Fainelli @ 2026-04-07 23:56 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tony Lindgren, Haojian Zhuang,
open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:PIN CONTROLLER - SINGLE,
open list:PIN CONTROLLER - SINGLE
This patch set allows Broadcom STB chips with the BCM7038-style
pinmux/configuration blocks to use pinctrl-single. This does not
preclude us from making use of a more sophisticated driver in the
future, should we need to.
Florian Fainelli (2):
dt-bindings: pinctrl: pinctrl-single: Add brcm,bcm7038-padconf
pinctrl: single: Add bcm7038-padconf compatible matching
.../devicetree/bindings/pinctrl/pinctrl-single.yaml | 4 ++++
drivers/pinctrl/pinctrl-single.c | 5 +++--
2 files changed, 7 insertions(+), 2 deletions(-)
--
2.34.1
^ permalink raw reply
* [PATCH 1/2] dt-bindings: pinctrl: pinctrl-single: Add brcm,bcm7038-padconf
From: Florian Fainelli @ 2026-04-07 23:56 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Tony Lindgren, Haojian Zhuang,
open list:PIN CONTROL SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:PIN CONTROLLER - SINGLE,
open list:PIN CONTROLLER - SINGLE
In-Reply-To: <20260407235611.550515-1-florian.fainelli@broadcom.com>
Add the "brcm,bcm7038-padconf" compatible to the pinctrl-single binding.
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml
index 9135788cf62e..afe7329a1df2 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml
@@ -38,6 +38,10 @@ properties:
- enum:
- marvell,pxa1908-padconf
- const: pinconf-single
+ - items:
+ - enum:
+ - brcm,bcm7038-padconf
+ - const: pinctrl-single
reg:
maxItems: 1
--
2.34.1
^ permalink raw reply related
* [PATCH v3 5/6] arm64: dts: imx8mm: imx8mp: Add FIO1 DTOs for Data Modul i.MX8M Mini and Plus eDM SBC
From: Marek Vasut @ 2026-04-07 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frank Li,
Krzysztof Kozlowski, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, devicetree, imx, linux-kernel
In-Reply-To: <20260407211850.79881-1-marex@nabladev.com>
Add DT overlay for feature connector expansion module eDM-MOD-iMX8Mm-FIO1
providing additional UARTs, CAN, PWM Beeper, I2C, SPI and GPIO breakout.
This adapter can be optionally populated onto the eDM SBC.
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: Deduplicate the DTOs further
V3: New patch split from the original megapatch
---
arch/arm64/boot/dts/freescale/Makefile | 12 ++++
...l-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi | 69 +++++++++++++++++++
...l-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso | 59 ++++++++++++++++
...l-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso | 46 +++++++++++++
4 files changed, 186 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 2dc1c1b6d81f8..27504fbfcf194 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -120,6 +120,10 @@ imx8mm-data-modul-edm-sbc-overlay-cm4-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-cm4.dtbo
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo
+
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -159,6 +163,8 @@ imx8mm-data-modul-edm-sbc-overlay-edm-sbc-imx8mm-rev900-dtbs := \
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-cm4.dtb \
imx8mm-data-modul-edm-sbc-overlay-cm4.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
@@ -304,6 +310,10 @@ imx8mp-data-modul-edm-sbc-overlay-cm7-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-cm7.dtbo
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo
+
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -385,6 +395,8 @@ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-rev902-dtbs := \
dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-cm7.dtb \
imx8mp-data-modul-edm-sbc-overlay-cm7.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi
new file mode 100644
index 0000000000000..7851ca73ccd8e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&{/} {
+ can_osc: can-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <20000000>;
+ };
+};
+
+&ecspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ can_fio: can@0 {
+ compatible = "microchip,mcp2515";
+ reg = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can>;
+ clocks = <&can_osc>;
+ spi-max-frequency = <5000000>;
+ };
+};
+
+&i2c_feature { /* Feature connector I2C */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio_feature: io-expander@20 {
+ compatible = "nxp,pca9554";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_expander>;
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio4>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "GPIO1_output", "GPIO1_input",
+ "GPIO2_output", "GPIO2_input",
+ "GPIO3_output", "GPIO3_input",
+ "PCA9511A_READY", "";
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c32";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+};
+
+&uart1 { /* J500/J501 */
+ status = "okay";
+};
+
+&uart2 { /* RS485 J302/J303 */
+ linux,rs485-enabled-at-boot-time;
+ uart-has-rtscts;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
new file mode 100644
index 0000000000000..ad410db5f5b76
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-pinfunc.h"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi"
+
+&{/} {
+ beeper {
+ compatible = "pwm-beeper";
+ beeper-hz = <1000>;
+ pwms = <&pwm3 0 250000 0>;
+ };
+};
+
+&can_fio {
+ interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&iomuxc {
+ pinctrl_can: can-feature-grp {
+ fsl,pins = <
+ /* CAN_INT# */
+ MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x400000d6
+ /* CAN_RST# */
+ MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x6
+ >;
+ };
+
+ pinctrl_gpio_expander: gpio-expander-feature-grp {
+ fsl,pins = <
+ /* GPIO4_IO27 */
+ MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x6
+ >;
+ };
+
+ pinctrl_pwm3: pwm3-buzzer-feature-grp {
+ fsl,pins = <
+ /* Buzzer PWM output */
+ MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x100
+ >;
+ };
+};
+
+&pinctrl_hog_feature {
+ fsl,pins = <
+ /* GPIO5_IO04 */
+ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x6
+ >;
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
new file mode 100644
index 0000000000000..0eccb7f7c0a8c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtso
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-pinfunc.h"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtsi"
+
+&can_fio {
+ interrupts-extended = <&gpio2 10 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&iomuxc {
+ pinctrl_can: can-feature-grp {
+ fsl,pins = <
+ /* CAN_INT# */
+ MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x400000d6
+ >;
+ };
+
+ pinctrl_gpio_expander: gpio-expander-feature-grp {
+ fsl,pins = <
+ /* GPIO4_IO27 */
+ MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x6
+ >;
+ };
+};
+
+&pinctrl_sai2 {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
+ MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
+ >;
+};
+
+&pinctrl_hog_feature {
+ fsl,pins = <
+ /* GPIO5_IO03 */
+ MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x40000006
+ /* GPIO5_IO04 */
+ MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x40000006
+ >;
+};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 6/6] arm64: dts: imx8mm: imx8mp: Add FIO1-Audio DTOs for Data Modul i.MX8M Mini and Plus eDM SBC
From: Marek Vasut @ 2026-04-07 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frank Li,
Krzysztof Kozlowski, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, devicetree, imx, linux-kernel
In-Reply-To: <20260407211850.79881-1-marex@nabladev.com>
Add DT overlay for feature connector expansion module eDM-MOD-iMX8Mm-FIO1-Audio
providing additional UARTs, CAN, PWM Beeper, I2C, SPI, GPIO breakout and
SGTL5000 codec. This adapter can be optionally populated onto the eDM SBC.
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
DEPENDS:
- https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-1-marex@nabladev.com/
https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-2-marex@nabladev.com/
https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-3-marex@nabladev.com/
https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-4-marex@nabladev.com/
https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-5-marex@nabladev.com/
https://patchwork.kernel.org/project/linux-clk/patch/20260407211123.77602-6-marex@nabladev.com/
- https://patchwork.kernel.org/project/devicetree/patch/20260404183547.46509-1-marex@nabladev.com/
https://patchwork.kernel.org/project/devicetree/patch/20260404183547.46509-2-marex@nabladev.com/
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: Deduplicate the DTOs further
V3: New patch split from the original megapatch
---
arch/arm64/boot/dts/freescale/Makefile | 12 +++
...sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi | 101 ++++++++++++++++++
...sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso | 74 +++++++++++++
...sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso | 62 +++++++++++
4 files changed, 249 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 27504fbfcf194..44385fb05c533 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -124,6 +124,10 @@ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtbo
+
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -165,6 +169,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-cm4.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
@@ -314,6 +320,10 @@ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtbo
+
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -397,6 +407,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-cm7.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi
new file mode 100644
index 0000000000000..c622213c12747
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&{/} {
+ can_osc: can-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <20000000>;
+ };
+
+ sound-fio {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "SGTL5000-FIO1";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&codec_dai_fio>;
+ simple-audio-card,frame-master = <&codec_dai_fio>;
+ simple-audio-card,widgets = "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Headphone Jack", "HP_OUT";
+
+ simple-audio-card,cpu {
+ sound-dai = <&sai2>;
+ };
+
+ codec_dai_fio: simple-audio-card,codec {
+ sound-dai = <&sgtl5000_fio>;
+ };
+ };
+};
+
+&ecspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ can_fio: can@0 {
+ compatible = "microchip,mcp2518fd";
+ reg = <0>;
+ clocks = <&can_osc>;
+ spi-max-frequency = <10000000>;
+ };
+};
+
+&i2c_feature { /* Feature connector I2C */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgtl5000_fio: codec@a {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&sai5clk 1>;
+ VDDA-supply = <&buck4_reg>;
+ VDDD-supply = <&buck5_reg>;
+ VDDIO-supply = <&buck4_reg>;
+ };
+
+ gpio_feature: io-expander@20 {
+ compatible = "nxp,pca9554";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio5>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "GPI0", "GPI1", "GPI2", "GPI3",
+ "GPO0", "GPO1", "GPO2", "GPO3";
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c32";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+};
+
+&sai2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sai2>;
+ assigned-clock-rates = <24576000>;
+ fsl,sai-asynchronous;
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
+&uart2 { /* RS422 J12 */
+ linux,rs485-enabled-at-boot-time;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* UART4 is blocked by RDC and used as CM4 console UART */
+&uart4 { /* UART to 1-Wire J5 */
+ status = "disabled";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
new file mode 100644
index 0000000000000..4a02bd026ac16
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mm-clock.h>
+
+#include "imx8mm-pinfunc.h"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi"
+
+&can_fio {
+ interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&iomuxc {
+ pinctrl_codec_mclk: codec-mclk_feature-grp {
+ fsl,pins = <
+ /* GPIO4_IO27 */
+ MX8MM_IOMUXC_SAI2_MCLK_SAI5_MCLK 0x2
+ >;
+ };
+
+ pinctrl_sai2: sai2_feature-grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI2_RXC_SAI2_RX_BCLK 0x90
+ MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0x96
+ MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0x90
+ MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0x96
+ >;
+ };
+};
+
+&pinctrl_hog_feature {
+ fsl,pins = <
+ /* GPIO5_IO03 */
+ MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000006
+ /* GPIO5_IO04 */
+ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000006
+
+ /* CAN_INT# */
+ MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000090
+ >;
+};
+
+&sai2 {
+ assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
+ assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
+ fsl,sai-bit-clock-swap;
+};
+
+&spba2 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sai5clk: clock-controller@30050000 { /* SAI5 */
+ compatible = "fsl,imx8mm-sai-clock", "fsl,imx8mq-sai-clock";
+ reg = <0x30050000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
+ <&clk IMX8MM_CLK_SAI5_ROOT>;
+ clock-names = "bus", "mclk1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_codec_mclk>;
+ assigned-clocks = <&clk IMX8MM_CLK_SAI5>,
+ <&clk IMX8MM_CLK_CLKOUT1_SEL>,
+ <&clk IMX8MM_CLK_CLKOUT2_SEL>;
+ assigned-clock-parents = <&clk IMX8MM_CLK_24M>,
+ <&clk IMX8MM_CLK_24M>,
+ <&clk IMX8MM_CLK_24M>;
+ assigned-clock-rates = <24000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
new file mode 100644
index 0000000000000..90c2dd1e67248
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtso
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+#include "imx8mp-pinfunc.h"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-fio1-audio.dtsi"
+
+&can_fio {
+ interrupts-extended = <&gpio2 10 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&iomuxc {
+ pinctrl_codec_mclk: codec-mclk_feature-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI5_MCLK 0xd6
+ >;
+ };
+
+ sai2-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6
+ MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
+ MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6
+ MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
+ >;
+ };
+
+ uart1-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_CLK__UART1_DCE_TX 0x49
+ MX8MP_IOMUXC_SD1_CMD__UART1_DCE_RX 0x49
+ MX8MP_IOMUXC_SD1_DATA1__UART1_DCE_CTS 0x49
+ >;
+ };
+};
+
+&sai2 {
+ assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
+};
+
+&spba5 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ sai5clk: clock-controller@30c50000 {
+ compatible = "fsl,imx8mp-sai-clock", "fsl,imx8mq-sai-clock";
+ reg = <0x30c50000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_IPG>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>;
+ clock-names = "bus", "mclk1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_codec_mclk>;
+ status = "okay";
+ };
+};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 3/6] arm64: dts: imx8mm: imx8mp: Add HDMI DTOs for Data Modul i.MX8M Mini and Plus eDM SBC
From: Marek Vasut @ 2026-04-07 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frank Li,
Krzysztof Kozlowski, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, devicetree, imx, linux-kernel
In-Reply-To: <20260407211850.79881-1-marex@nabladev.com>
Add DT overlay for the DSI-to-HDMI adapter eDM-MOD-iMX8Mm-HDMI populated
with Lontium LT9611 bridge. This adapter can be optionally populated onto
the eDM SBC.
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: Deduplicate the DTOs further
V3: New patch split from the original megapatch
---
arch/arm64/boot/dts/freescale/Makefile | 12 +++
...l-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi | 94 +++++++++++++++++++
...l-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso | 17 ++++
...l-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso | 17 ++++
4 files changed, 140 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 09ea330884ad4..679346cd35d95 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -116,6 +116,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdps-mb-smarc-2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
+
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo
@@ -149,6 +153,8 @@ imx8mm-data-modul-edm-sbc-overlay-edm-sbc-imx8mm-rev900-dtbs := \
imx8mm-data-modul-edm-sbc-overlay-edm-sbc-imx8mm-rev900.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtb \
@@ -288,6 +294,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb
DTC_FLAGS_imx8mp-cubox-m := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-cubox-m.dtb
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
+
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo
@@ -363,6 +373,8 @@ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-rev902-dtbs := \
imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-rev902.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtb \
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi
new file mode 100644
index 0000000000000..c0f2aa462104f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&{/} {
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <<9611_out>;
+ };
+ };
+ };
+};
+
+&i2c_display { /* Display connector I2C */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lt9611_codec: hdmi-bridge@3b {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_panel_expansion>;
+ compatible = "lontium,lt9611";
+ reg = <0x3b>;
+ vcc-supply = <&buck4_reg>; /* X400 pin 55, +3V3_S0 */
+ vdd-supply = <&buck5_reg>; /* X400 pin 51, +1V8_S0 */
+
+ /* Audio I2S not described */
+ #sound-dai-cells = <1>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lt9611_a: endpoint {
+ remote-endpoint = <&mipi_dsi_bridge1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ lt9611_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&iomuxc {
+ /* Free &pinctrl_panel_expansion from hog for lt9611_codec above */
+ pinctrl-0 = <&pinctrl_hog_misc>, <&pinctrl_hog_feature>,
+ <&pinctrl_hog_panel>, <&pinctrl_hog_sbc>;
+};
+
+&mipi_dsi {
+ /* HDMI 148.5 MHz x2 (DDR) x3 (24bpp / 8) */
+ samsung,burst-clock-frequency = <891000000>;
+ samsung,esc-clock-frequency = <10000000>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ mipi_dsi_bridge1_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ /* Clock and data lanes have DN/DP swapped */
+ lane-polarities = <1 1 1 1 1>;
+ remote-endpoint = <<9611_a>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
new file mode 100644
index 0000000000000..334ba299a3541
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi"
+
+<9611_codec {
+ interrupts-extended = <&gpio2 3 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+};
+
+&lcdif {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
new file mode 100644
index 0000000000000..d8114fd869b54
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtso
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtsi"
+
+<9611_codec {
+ interrupts-extended = <&gpio4 19 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+};
+
+&lcdif1 {
+ status = "okay";
+};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 4/6] arm64: dts: imx8mm: imx8mp: Add CM DTOs for Data Modul i.MX8M Mini and Plus eDM SBC
From: Marek Vasut @ 2026-04-07 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frank Li,
Krzysztof Kozlowski, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, devicetree, imx, linux-kernel
In-Reply-To: <20260407211850.79881-1-marex@nabladev.com>
Add DT overlay which adds CM4/CM7 extras so that CM4/CM7 firmware could
be used with remoteproc and rpmsg, but without imposing the overhead
on every user of the platform. The CM4 variant applies to i.MX8M Mini,
while the CM7 variant applies to i.MX8M Plus .
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: Deduplicate the DTOs further
V3: New patch split from the original megapatch
---
arch/arm64/boot/dts/freescale/Makefile | 12 ++++
...imx8mm-data-modul-edm-sbc-overlay-cm4.dtso | 56 ++++++++++++++++++
...imx8mp-data-modul-edm-sbc-overlay-cm7.dtso | 57 +++++++++++++++++++
3 files changed, 125 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-cm4.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-cm7.dtso
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 679346cd35d95..2dc1c1b6d81f8 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -116,6 +116,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdps-mb-smarc-2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
+imx8mm-data-modul-edm-sbc-overlay-cm4-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-cm4.dtbo
+
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mm-data-modul-edm-sbc.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -153,6 +157,8 @@ imx8mm-data-modul-edm-sbc-overlay-edm-sbc-imx8mm-rev900-dtbs := \
imx8mm-data-modul-edm-sbc-overlay-edm-sbc-imx8mm-rev900.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-cm4.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-cm4.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
@@ -294,6 +300,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb
DTC_FLAGS_imx8mp-cubox-m := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-cubox-m.dtb
+imx8mp-data-modul-edm-sbc-overlay-cm7-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-cm7.dtbo
+
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi-dtbs := \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo
@@ -373,6 +383,8 @@ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-rev902-dtbs := \
imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-rev902.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-cm7.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-cm7.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtb \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-hdmi.dtbo \
imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-cm4.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-cm4.dtso
new file mode 100644
index 0000000000000..8d681c0eff0d4
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-cm4.dtso
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mm-clock.h>
+
+&{/} {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ reserved-memory { /* CM4 reserved memory */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ m_core_reserved: m_core@b7000000 {
+ reg = <0 0xb7000000 0 0x1000000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@b8000000 {
+ reg = <0 0xb8000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@b8008000 {
+ reg = <0 0xb8008000 0 0x8000>;
+ no-map;
+ };
+
+ rsc_table: rsc-table@b80ff000 {
+ reg = <0 0xb80ff000 0 0x1000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer@b8400000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0xb8400000 0 0x100000>;
+ no-map;
+ };
+ };
+
+ imx8mm-cm4 {
+ compatible = "fsl,imx8mm-cm4";
+ clocks = <&clk IMX8MM_CLK_M4_CORE>;
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu 0 1
+ &mu 1 1
+ &mu 3 1>;
+ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
+ syscon = <&src>;
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-cm7.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-cm7.dtso
new file mode 100644
index 0000000000000..21e2a8c0bab0a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-cm7.dtso
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+&{/} {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ reserved-memory { /* CM7 reserved memory */
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ m_core_reserved: m_core@54000000 {
+ reg = <0 0x54000000 0 0x1000000>;
+ no-map;
+ };
+
+ vdev0vring0: vdev0vring0@55000000 {
+ reg = <0 0x55000000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@55008000 {
+ reg = <0 0x55008000 0 0x8000>;
+ no-map;
+ };
+
+ rsc_table: rsc-table@550ff000 {
+ reg = <0 0x550ff000 0 0x1000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer@55400000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x55400000 0 0x100000>;
+ no-map;
+ };
+ };
+
+ imx8mp-cm7 {
+ compatible = "fsl,imx8mp-cm7-mmio";
+ clocks = <&clk IMX8MP_CLK_M7_CORE>;
+ fsl,iomuxc-gpr = <&gpr>;
+ mbox-names = "tx", "rx", "rxdb";
+ mboxes = <&mu 0 1
+ &mu 1 1
+ &mu 3 1>;
+ memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
+ syscon = <&src>;
+ };
+};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 1/6] arm64: dts: imx8mm: imx8mp: Add LVDS DTOs for Data Modul i.MX8M Mini and Plus eDM SBC
From: Marek Vasut @ 2026-04-07 21:17 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Conor Dooley, Fabio Estevam, Frank Li,
Krzysztof Kozlowski, Pengutronix Kernel Team, Rob Herring,
Sascha Hauer, devicetree, imx, linux-kernel
Add DT overlay for the DSI-to-LVDS adapter eDM-MOD-iMX8Mm-LVDS populated
with Lontium LT9211 bridge. This adapter can be optionally populated onto
the eDM SBC. This adapter can be extended with multiple panels, currently
supported are the following:
- AUO G215HVN011
- Innolux G070Y2-L01
- Innolux G101ICE-L01
- Innolux G121XCE-L01
- Innolux G156HCE-L01
- Multi-Inno Technology MI0700A2T-30
- Multi-Inno Technology MI1010Z1T-1CP11
Note that in case of the i.MX8M Plus eDM SBC, the adapter name containing
iMX8Mm is not a typo, this is the adapter model string. The adapter was
originally developed for the iMX8Mm eDM SBC.
Signed-off-by: Marek Vasut <marex@nabladev.com>
---
DEPENDS:
- https://patchwork.kernel.org/project/devicetree/patch/20260407203109.34302-1-marex@nabladev.com/
- https://patchwork.kernel.org/project/devicetree/patch/20260404034321.341210-1-marex@nabladev.com/
https://patchwork.kernel.org/project/devicetree/patch/20260404034321.341210-2-marex@nabladev.com/
---
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Frank Li <Frank.Li@nxp.com>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Rob Herring <robh@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
V2: Deduplicate the DTOs further
V3: - Rename buckN to buckN_reg and ldoN to ldoN_reg to be consistent across MX8MM and MX8MP
- Split off anything non-LVDS related
---
arch/arm64/boot/dts/freescale/Makefile | 134 +++++++++++++++++-
...edm-sbc-overlay-edm-mod-imx8mm-common.dtsi | 59 ++++++++
...bc-overlay-edm-mod-imx8mm-lvds-common.dtsi | 118 +++++++++++++++
...-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi | 32 +++++
...verlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi | 12 ++
...verlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi | 12 ++
...erlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi | 12 ++
...erlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi | 12 ++
...erlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso | 7 +
...verlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi | 12 ++
...verlay-edm-mod-imx8mm-lvds-g215hvn011.dtso | 7 +
...rlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi | 12 ++
...rlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso | 7 +
...y-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi | 12 ++
...y-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso | 7 +
...bc-overlay-edm-mod-imx8mm-lvds-single.dtsi | 20 +++
...l-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi | 22 +++
...m-data-modul-edm-sbc-overlay-lvds-3v3.dtsi | 19 +++
...m-data-modul-edm-sbc-overlay-lvds-5v0.dtsi | 19 +++
...-data-modul-edm-sbc-overlay-lvds-dual.dtsi | 29 ++++
...modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi | 31 ++++
...odul-edm-sbc-overlay-lvds-g101ice-l01.dtsi | 31 ++++
...odul-edm-sbc-overlay-lvds-g121xce-l01.dtsi | 31 ++++
...odul-edm-sbc-overlay-lvds-g156hce-l01.dtsi | 31 ++++
...modul-edm-sbc-overlay-lvds-g215hvn011.dtsi | 30 ++++
...dul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi | 31 ++++
...-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi | 31 ++++
...ata-modul-edm-sbc-overlay-lvds-single.dtsi | 13 ++
.../freescale/imx8mm-data-modul-edm-sbc.dts | 8 +-
...verlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso | 7 +
...erlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso | 7 +
...verlay-edm-mod-imx8mm-lvds-g215hvn011.dtso | 11 ++
...rlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso | 7 +
...y-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso | 7 +
...l-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi | 35 +++++
...verlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtso | 24 ++++
...erlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso | 24 ++++
...erlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtso | 24 ++++
...erlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtso | 32 +++++
...verlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso | 36 +++++
...rlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtso | 24 ++++
...y-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtso | 24 ++++
...l-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi | 79 +++++++++++
.../freescale/imx8mp-data-modul-edm-sbc.dts | 48 +++----
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 2 +-
50 files changed, 1192 insertions(+), 35 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-5v0.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtso
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 711e36cc2c990..fbfd0e79f118d 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -115,7 +115,51 @@ dtb-$(CONFIG_ARCH_MXC) += imx8dxl-evk-pcie-ep.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdp-mba8xx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8dxp-tqma8xdps-mb-smarc-2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-beacon-kit.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtbo
+
+imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11-dtbs := \
+ imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtbo \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtb \
+ imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtbo
+
dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-emtop-baseboard.dtb
@@ -237,7 +281,93 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-aristainetos3-proton2s.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-beacon-kit.dtb
DTC_FLAGS_imx8mp-cubox-m := -@
dtb-$(CONFIG_ARCH_MXC) += imx8mp-cubox-m.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtbo
+
+imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11-dtbs := \
+ imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtbo
+
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtbo \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtb \
+ imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtbo
+
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-drc02.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi
new file mode 100644
index 0000000000000..8a95dc05b1fcf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+&{/} {
+ reg_backlight_en_level: regulator-backlight-en-level {
+ compatible = "regulator-gpio";
+ regulator-name = "Backlight_SEL_EN";
+ regulator-type = "voltage";
+ states = <3300000 0x0>,
+ <5000000 0x1>;
+
+ /* Default setting: lowest supported voltage. */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_backlight_pwm_level: regulator-backlight-pwm-level {
+ compatible = "regulator-gpio";
+ regulator-name = "Backlight_SEL_PWM";
+ regulator-type = "voltage";
+ gpios = <&gpio_display 2 GPIO_ACTIVE_HIGH>; /* SEL_PWM */
+ states = <3300000 0x0>,
+ <5000000 0x1>;
+
+ /* Default setting: lowest supported voltage. */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_panel_bl: regulator-panel-bl {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_panel_backlight>;
+ regulator-name = "PANEL_BL";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio3 0 0>;
+ enable-active-high;
+ /* Used by panels which enable PWM signal before BL ON/OFF */
+ status = "disabled";
+ };
+};
+
+®_panel_vcc {
+ compatible = "regulator-gpio";
+ regulator-type = "voltage";
+ enable-active-high;
+ status = "okay";
+
+ /* Default setting: lowest supported voltage. */
+ gpios-states = <0 0>; /* Default GPIO state is LOW/LOW, so 3V3 out */
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi
new file mode 100644
index 0000000000000..246ad17adb199
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+&{/} {
+ reg_lt9211_vcc18: regulator-lt9211-vcc18 {
+ compatible = "regulator-fixed";
+ regulator-name = "LT9211_VCC18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&buck5_reg>; /* X400 pin 51, +1V8_S0 */
+ };
+};
+
+&i2c_display { /* Display connector I2C */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <100000>;
+
+ lt9211_codec: bridge@2d {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_panel_expansion>;
+ compatible = "lontium,lt9211";
+ reg = <0x2d>;
+ interrupts-extended = <&gpio2 3 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ vccio-supply = <®_lt9211_vcc18>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ lt9211_a: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&mipi_dsi_bridge1_out>;
+ };
+ };
+ };
+ };
+
+ gpio_display: io-expander@41 {
+ compatible = "nxp,pca9536";
+ reg = <0x41>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "SEL_12V", "SEL_5V", "SEL_PWM", "SEL_EN";
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+®_backlight_en_level {
+ gpios = <&gpio_display 3 GPIO_ACTIVE_HIGH>; /* SEL_EN */
+};
+
+®_backlight_pwm_level {
+ gpios = <&gpio_display 2 GPIO_ACTIVE_HIGH>; /* SEL_PWM */
+};
+
+®_panel_bl {
+ gpio = <&gpio3 0 0>;
+};
+
+&iomuxc {
+ /* Free &pinctrl_panel_expansion from hog for lt9211_codec above */
+ pinctrl-0 = <&pinctrl_hog_misc>, <&pinctrl_hog_feature>,
+ <&pinctrl_hog_panel>, <&pinctrl_hog_sbc>;
+};
+
+&mipi_dsi {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ mipi_dsi_bridge1_out: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ /* Clock and data lanes have DN/DP swapped */
+ lane-polarities = <1 1 1 1 1>;
+ remote-endpoint = <<9211_a>;
+ };
+ };
+ };
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+®_panel_vcc {
+ /*
+ * AP63300 voltage divider settings:
+ * R1=16k2
+ * R2=5k23 with optional series Rs=7k68 (5V) or Rt=1k5 (12V)
+ *
+ * 1 / Rx = (1 / R2) [ + (1 / Rs)][ + (1 / Rt)]
+ * Vout = 0.8 * ((R1 / Rx) + 1)
+ */
+ gpios = <&gpio_display 1 GPIO_ACTIVE_HIGH>, /* 5V */
+ <&gpio_display 0 GPIO_ACTIVE_HIGH>; /* 12V */
+ states = <3300000 0x0>,
+ <5000000 0x1>,
+ <12000000 0x2>,
+ <3900000 0x3>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi
new file mode 100644
index 0000000000000..abe50eb8b4b61
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+<9211_codec {
+ ports {
+ port@2 {
+ reg = <2>;
+
+ lt9211_out_a: endpoint {
+ remote-endpoint = <&panel_lvds_a>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ lt9211_out_b: endpoint {
+ remote-endpoint = <&panel_lvds_b>;
+ };
+ };
+ };
+};
+
+&panel_lvds_a {
+ remote-endpoint = <<9211_out_a>;
+};
+
+&panel_lvds_b {
+ remote-endpoint = <<9211_out_b>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi
new file mode 100644
index 0000000000000..cca52464a695e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <216000000>; /* RX ByteClock ~27 MHz */
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
new file mode 100644
index 0000000000000..5d1ea31f33de3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi
new file mode 100644
index 0000000000000..52d216fbba432
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <515000000>;
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
new file mode 100644
index 0000000000000..2d1bbdd065227
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi
new file mode 100644
index 0000000000000..aba3c9a1a3e8a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <470000000>;
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
new file mode 100644
index 0000000000000..bc2f6fef6256e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi
new file mode 100644
index 0000000000000..f478f4e557cce
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <864000000>;
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
new file mode 100644
index 0000000000000..5f77946e042e3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi
new file mode 100644
index 0000000000000..21bec8a01287e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-dual.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <864000000>; /* RX ByteClock ~27 MHz */
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
new file mode 100644
index 0000000000000..75ae12dfd7fc6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi
new file mode 100644
index 0000000000000..38a3a9a4c75b3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <216000000>; /* RX ByteClock ~27 MHz */
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
new file mode 100644
index 0000000000000..ee2c79664e355
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi
new file mode 100644
index 0000000000000..98b5c5883cfd0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi"
+
+&mipi_dsi {
+ samsung,burst-clock-frequency = <400000000>;
+ samsung,esc-clock-frequency = <10000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
new file mode 100644
index 0000000000000..d05f0dcc3137c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi
new file mode 100644
index 0000000000000..9e70c1481c1eb
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-single.dtsi
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+<9211_codec {
+ ports {
+ port@2 {
+ reg = <2>;
+
+ lt9211_out_a: endpoint {
+ remote-endpoint = <&panel_lvds>;
+ };
+ };
+ };
+};
+
+&panel_lvds {
+ remote-endpoint = <<9211_out_a>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
new file mode 100644
index 0000000000000..31598aa86b100
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi"
+
+&lcdif {
+ status = "okay";
+};
+
+<9211_codec {
+ interrupts-extended = <&gpio2 3 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+};
+
+®_panel_vcc {
+ enable-gpios = <&gpio3 6 0>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi
new file mode 100644
index 0000000000000..0955764c0ebff
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+®_backlight_pwm_level {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+®_backlight_en_level {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
+
+®_panel_vcc {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-5v0.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-5v0.dtsi
new file mode 100644
index 0000000000000..70ad6bb9b80ac
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-5v0.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+®_backlight_pwm_level {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+};
+
+®_backlight_en_level {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+};
+
+®_panel_vcc {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi
new file mode 100644
index 0000000000000..65f9ad81cfbc7
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+&panel {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dual-lvds-odd-pixels;
+
+ panel_lvds_b: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dual-lvds-even-pixels;
+
+ panel_lvds_a: endpoint {
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi
new file mode 100644
index 0000000000000..80f7b74f1ea08
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 6.3 POWER ON/OFF SEQUENCE, T9 >= 10 ms */
+ pwm-off-delay-ms = <10>;
+ /* 3.2 BACKLIGHT UNIT fPWM=200 Hz (Typ.), value below in ns */
+ pwms = <&pwm1 0 5000000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "innolux,g070y2-l01";
+};
+
+®_panel_bl {
+ startup-delay-us = <10000>; /* T8 */
+ off-on-delay-us = <550000>; /* T9 + T6 + T3 + T7 + T4 + T1 + T2 + T5 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 6.3 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <1000>; /* 0.5ms <= T1 + T2 <= 60 ms */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi
new file mode 100644
index 0000000000000..1a2bd204c30b1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 6.3 POWER ON/OFF SEQUENCE, T9 >= 10 ms */
+ pwm-off-delay-ms = <10>;
+ /* 3.2 BACKLIGHT UNIT fPWM=200 Hz (Typ.), value below in ns */
+ pwms = <&pwm1 0 5000000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "innolux,g101ice-l01";
+};
+
+®_panel_bl {
+ startup-delay-us = <10000>; /* T8 */
+ off-on-delay-us = <950000>; /* T9 + T6 + T3 + T7 + T4 + T1 + T2 + T5 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 6.3 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <1000>; /* 0.5ms <= T1 + T2 <= 60 ms */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi
new file mode 100644
index 0000000000000..f87e8c821dacb
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024 Wael Karman <wkarman@data-modul.com>
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 6.2 POWER ON/OFF SEQUENCE, T9 >= 10 ms */
+ pwm-off-delay-ms = <10>;
+ /* 3.2 BACKLIGHT UNIT fPWM=200 Hz (Typ.), value below in ns */
+ pwms = <&pwm1 0 5000000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "innolux,g121xce-l01";
+};
+
+®_panel_bl {
+ startup-delay-us = <10000>; /* T8 */
+ off-on-delay-us = <1180000>; /* T9 + T6 + T3 + T7 + T4 + T1 + T2 + T5 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 6.2 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <1000>; /* 0.5ms <= T1 + T2 <= 60 ms */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi
new file mode 100644
index 0000000000000..46c8bc7021a4f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 4.6 POWER ON/OFF SEQUENCE, T9 >= 10 ms */
+ pwm-off-delay-ms = <10>;
+ /* 4.3.2 BACKLIGHT UNIT fPWM=200 Hz (Typ.), value below in ns */
+ pwms = <&pwm1 0 5000000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "innolux,g156hce-l01";
+};
+
+®_panel_bl {
+ startup-delay-us = <10000>; /* T8 */
+ off-on-delay-us = <1170000>; /* T9 + T6 + T3 + T7 + T4 + T1 + T2 + T5 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 4.6 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <1000>; /* 0.5ms <= T1 + T2 <= 60 ms */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi
new file mode 100644
index 0000000000000..3585170bd59dd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-5v0.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-dual.dtsi"
+
+&backlight {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_panel_backlight>;
+ enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
+ /* 6.5 POWER ON/OFF SEQUENCE, T6 >= 10 ms */
+ post-pwm-on-delay-ms = <10>;
+ /* 6.5 POWER ON/OFF SEQUENCE, T7 >= 0 ms */
+ pwm-off-delay-ms = <10>;
+ /* 5.2 BACKLIGHT UNIT 200Hz..20kHz, value below in ns */
+ pwms = <&pwm1 0 66666 0>; /* 15 kHz = 66666ns */
+ status = "okay";
+};
+
+&panel {
+ /* The G215HVN01 is replacement for T215HVN01, which is supported. */
+ compatible = "auo,t215hvn01";
+};
+
+®_panel_vcc {
+ /* 6.5 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <40000>; /* 30.5ms <= T1 + T2 <= 60 ms */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi
new file mode 100644
index 0000000000000..4a077e6e6b8af
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 1.5 POWER ON/OFF SEQUENCE, T4 >= 200 ms */
+ pwm-off-delay-ms = <200>;
+ /* ELECTRICAL CHARACTERISTICS, BL_ADJ Frequency 20K HZ Typ., value below in ns */
+ pwms = <&pwm1 0 50000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "multi-inno,mi0700a2t-30";
+};
+
+®_panel_bl {
+ startup-delay-us = <200000>; /* T3 */
+ off-on-delay-us = <1450000>; /* T4 + T5 + T6 + T1 + T2 + T3 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 1.5 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <60000>; /* T1 + T2 >= 1 ms (typ. 60ms) */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi
new file mode 100644
index 0000000000000..e8d8cd85d04ae
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-3v3.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl>;
+ /* 3 POWER ON/OFF SEQUENCE, T7 >= 200 ms */
+ pwm-off-delay-ms = <200>;
+ /* ELECTRICAL CHARACTERISTICS, BL_ADJ Frequency 20K HZ Typ., value below in ns */
+ pwms = <&pwm1 0 50000 0>;
+ status = "okay";
+};
+
+&panel {
+ compatible = "multi-inno,mi1010z1t-1cp11";
+};
+
+®_panel_bl {
+ startup-delay-us = <200000>; /* T6 */
+ off-on-delay-us = <1450000>; /* T7 + T3 + T4 + T5 + T1 + T2 + T6 */
+ status = "okay";
+};
+
+®_panel_vcc {
+ /* 3 POWER ON/OFF SEQUENCE */
+ startup-delay-us = <60000>; /* T1 + T2 >= 1 ms (typ. 60ms) */
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi
new file mode 100644
index 0000000000000..68c20692241a1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc-overlay-lvds-single.dtsi
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2026 Marek Vasut
+ */
+
+&panel {
+ status = "okay";
+
+ port {
+ panel_lvds: endpoint {
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
index 472c584fb3bd2..df857de0375cf 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
@@ -30,11 +30,8 @@ memory@40000000 {
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_panel_backlight>;
brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
default-brightness-level = <7>;
- enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
pwms = <&pwm1 0 5000000 0>;
/* Disabled by default, unless display board plugged in. */
status = "disabled";
@@ -66,7 +63,6 @@ reg_panel_vcc: regulator-panel-vcc {
regulator-name = "PANEL_VCC";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio3 6 0>;
enable-active-high;
/* Disabled by default, unless display board plugged in. */
status = "disabled";
@@ -454,7 +450,7 @@ pcieclk: clk@6a {
};
};
-&i2c3 { /* Display connector I2C */
+i2c_display: &i2c3 { /* Display connector I2C */
/* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
clock-frequency = <320000>;
pinctrl-names = "default", "gpio";
@@ -465,7 +461,7 @@ &i2c3 { /* Display connector I2C */
status = "okay";
};
-&i2c4 { /* Feature connector I2C */
+i2c_feature: &i2c4 { /* Feature connector I2C */
/* IMX8MM ERRATA e7805 -- I2C is limited to 384 kHz due to SoC bug */
clock-frequency = <320000>;
pinctrl-names = "default", "gpio";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
new file mode 100644
index 0000000000000..6b6b160c0f3a1
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g070y2-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
new file mode 100644
index 0000000000000..549ea2ab8819a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g101ice-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
new file mode 100644
index 0000000000000..c8c4328218152
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g121xce-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
new file mode 100644
index 0000000000000..033eb210917cd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g156hce-l01.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g151hce-l01.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
new file mode 100644
index 0000000000000..faf2c06fc50c3
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtso
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-g215hvn011.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl_supply>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
new file mode 100644
index 0000000000000..359a8b1521b01
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi0700a2t-30.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
new file mode 100644
index 0000000000000..525cedb64a776
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtso
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-mi1010z1t-1cp11.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
new file mode 100644
index 0000000000000..6c346baee903f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds.dtsi
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-lvds-common.dtsi"
+
+&{/} {
+ reg_panel_bl_supply: regulator-panel-bl-supply {
+ compatible = "regulator-fixed";
+ regulator-name = "BKLT0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+};
+
+&lcdif1 {
+ status = "okay";
+};
+
+<9211_codec {
+ interrupts-extended = <&gpio4 19 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+};
+
+®_panel_bl {
+ vin-supply = <®_panel_bl_supply>;
+};
+
+®_panel_vcc {
+ enable-gpios = <&gpio3 6 0>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtso
new file mode 100644
index 0000000000000..7a4126214a4f6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g070y2-l01.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g070y2-l01.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The G070Y2-L01 panel requires 29.5 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 206.5 MHz , since 206.5 MHz / 7 = 29.5 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <206500000>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds>;
+};
+
+&panel_lvds {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso
new file mode 100644
index 0000000000000..817d4ec62d0e8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g101ice-l01.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g101ice-l01.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The G101ICE-L01 panel requires 71.1 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <497700000>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds>;
+};
+
+&panel_lvds {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtso
new file mode 100644
index 0000000000000..729f477038b17
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g121xce-l01.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024 Wael Karman <wkarman@data-modul.com>
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g121xce-l01.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The G121XCE-L01 panel requires 64.9 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 454.3 MHz , since 454.3 MHz / 7 = 64.9 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <454300000>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds>;
+};
+
+&panel_lvds {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtso
new file mode 100644
index 0000000000000..86163d6ddd5c6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g156hce-l01.dtso
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g156hce-l01.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The G156HCE-L01 panel requires 141.86 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 993.2 MHz , since 993.2 MHz / 7 = 141.86 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <993020000>;
+};
+
+&ldb_lvds_ch0 {
+ remote-endpoint = <&panel_lvds_b>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds_a>;
+};
+
+&panel_lvds_a {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
+
+&panel_lvds_b {
+ remote-endpoint = <&ldb_lvds_ch0>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso
new file mode 100644
index 0000000000000..a6d13c3609796
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-g215hvn011.dtso
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-g215hvn011.dtsi"
+
+&backlight {
+ power-supply = <®_panel_bl_supply>;
+};
+
+&media_blk_ctrl {
+ /*
+ * The G215HVN01 panel requires 148.8 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 1041.6 MHz , since 1041.6 MHz / 7 = 148.8 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <1041600000>;
+};
+
+&ldb_lvds_ch0 {
+ remote-endpoint = <&panel_lvds_b>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds_a>;
+};
+
+&panel_lvds_a {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
+
+&panel_lvds_b {
+ remote-endpoint = <&ldb_lvds_ch0>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtso
new file mode 100644
index 0000000000000..76bfbd307ba2d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi0700a2t-30.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-mi0700a2t-30.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The MI0700A2T-30 panel requires 33 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 231 MHz , since 231 MHz / 7 = 33 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <231000000>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds>;
+};
+
+&panel_lvds {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtso b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtso
new file mode 100644
index 0000000000000..4066bac28f3df
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds-mi1010z1t-1cp11.dtso
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024-2026 Marek Vasut
+ */
+
+#include "imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi"
+#include "imx8mm-data-modul-edm-sbc-overlay-lvds-mi1010z1t-1cp11.dtsi"
+
+&media_blk_ctrl {
+ /*
+ * The MI1010Z1T-1CP11 panel requires 51.2 MHz LVDS clock.
+ * Set IMX8MP_VIDEO_PLL1 to 358.4 MHz , since 358.4 MHz / 7 = 51.2 MHz .
+ */
+ assigned-clock-rates = <500000000>, <200000000>,
+ <0>, <0>, <500000000>, <358400000>;
+};
+
+&ldb_lvds_ch1 {
+ remote-endpoint = <&panel_lvds>;
+};
+
+&panel_lvds {
+ remote-endpoint = <&ldb_lvds_ch1>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi
new file mode 100644
index 0000000000000..b06af369a9245
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc-overlay-edm-sbc-imx8mp-lvds.dtsi
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2023-2026 Marek Vasut
+ */
+/dts-v1/;
+/plugin/;
+
+#include "imx8mm-data-modul-edm-sbc-overlay-edm-mod-imx8mm-common.dtsi"
+
+&{/} {
+ reg_panel_bl_supply: regulator-panel-bl-supply {
+ compatible = "regulator-gpio";
+ regulator-type = "voltage";
+ regulator-name = "PANEL_BL_SUPPLY";
+ enable-gpios = <&gpiolvds 0 0>;
+ enable-active-high;
+ status = "okay";
+
+ /*
+ * MP2328 voltage divider settings:
+ * R1=51k1
+ * R2=5k62 with optional series Rs=2k21 (12V)
+ *
+ * 1 / Rx = (1 / R2) [ + (1 / Rs)][ + (1 / Rt)]
+ * Vout = 0.5 + ((R1 / Rx) * 0.5)
+ */
+ gpios = <&gpiolvds 1 GPIO_ACTIVE_HIGH>; /* 12V */
+ states = <5000000 0x0>,
+ <12000000 0x1>;
+
+ /* Default setting: lowest supported voltage. */
+ gpios-states = <1>; /* Default GPIO state is HIGH, so 12V0 out */
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+};
+
+&lcdif2 {
+ status = "okay";
+};
+
+&lvds_bridge {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+®_backlight_en_level {
+ gpios = <&gpiolvds 5 GPIO_ACTIVE_HIGH>; /* SEL_EN */
+};
+
+®_backlight_pwm_level {
+ gpios = <&gpiolvds 4 GPIO_ACTIVE_HIGH>; /* SEL_PWM */
+};
+
+®_panel_bl {
+ gpio = <&gpiowifi 0 0>;
+ vin-supply = <®_panel_bl_supply>;
+};
+
+®_panel_vcc {
+ enable-gpios = <&gpiowifi 4 0>;
+ /*
+ * MP2328 voltage divider settings:
+ * R1=51k1
+ * R2=9k09 with optional series Rs=5k62 (5V) or Rt=2k21 (12V)
+ *
+ * 1 / Rx = (1 / R2) [ + (1 / Rs)][ + (1 / Rt)]
+ * Vout = 0.5 + ((R1 / Rx) * 0.5)
+ */
+ gpios = <&gpiolvds 2 GPIO_ACTIVE_HIGH>, /* 5V */
+ <&gpiolvds 3 GPIO_ACTIVE_HIGH>; /* 12V */
+ states = <3300000 0x0>,
+ <5000000 0x1>,
+ <12000000 0x2>,
+ <14000000 0x3>;
+};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
index cb28cf1cdd23f..c284edfa1f4c8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
@@ -30,11 +30,8 @@ memory@40000000 {
backlight: backlight {
compatible = "pwm-backlight";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_panel_backlight>;
brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
default-brightness-level = <7>;
- enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
pwms = <&pwm1 0 5000000 0>;
/* Disabled by default, unless display board plugged in. */
status = "disabled";
@@ -86,9 +83,6 @@ reg_panel_vcc: regulator-panel-vcc {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "PANEL_VCC";
- /* GPIO flags are ignored, enable-active-high applies. */
- gpio = <&gpio3 6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
/* Disabled by default, unless display board plugged in. */
status = "disabled";
};
@@ -116,7 +110,7 @@ reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
enable-active-high;
off-on-delay-us = <12000>;
startup-delay-us = <100>;
- vin-supply = <&buck4>;
+ vin-supply = <&buck4_reg>;
};
sound {
@@ -152,19 +146,19 @@ watchdog { /* TPS3813 */
};
&A53_0 {
- cpu-supply = <&buck2>;
+ cpu-supply = <&buck2_reg>;
};
&A53_1 {
- cpu-supply = <&buck2>;
+ cpu-supply = <&buck2_reg>;
};
&A53_2 {
- cpu-supply = <&buck2>;
+ cpu-supply = <&buck2_reg>;
};
&A53_3 {
- cpu-supply = <&buck2>;
+ cpu-supply = <&buck2_reg>;
};
&ecspi1 {
@@ -405,8 +399,8 @@ sgtl5000: audio-codec@a {
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clk_pwm4>;
- VDDA-supply = <&buck4>;
- VDDIO-supply = <&buck4>;
+ VDDA-supply = <&buck4_reg>;
+ VDDIO-supply = <&buck4_reg>;
};
usb-hub@2c {
@@ -454,7 +448,9 @@ pcieclk: clk@6a {
};
};
-&i2c2 {
+i2c_display: &i2c2 { };
+
+i2c_feature: &i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
@@ -527,7 +523,7 @@ pmic: pmic@25 {
* MIMX8ML8CVNKZAB
*/
regulators {
- buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */
+ buck1_reg: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1000000>;
regulator-ramp-delay = <3125>;
@@ -535,7 +531,7 @@ buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */
regulator-boot-on;
};
- buck2: BUCK2 { /* VDD_ARM */
+ buck2_reg: BUCK2 { /* VDD_ARM */
nxp,dvs-run-voltage = <950000>;
nxp,dvs-standby-voltage = <850000>;
regulator-min-microvolt = <850000>;
@@ -545,47 +541,47 @@ buck2: BUCK2 { /* VDD_ARM */
regulator-boot-on;
};
- buck4: BUCK4 { /* VDD_3V3 */
+ buck4_reg: BUCK4 { /* VDD_3V3 */
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
- buck5: BUCK5 { /* VDD_1V8 */
+ buck5_reg: BUCK5 { /* VDD_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
- buck6: BUCK6 { /* NVCC_DRAM_1V1 */
+ buck6_reg: BUCK6 { /* NVCC_DRAM_1V1 */
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
- ldo1: LDO1 { /* NVCC_SNVS_1V8 */
+ ldo1_reg: LDO1 { /* NVCC_SNVS_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
- ldo3: LDO3 { /* VDDA_1V8 */
+ ldo3_reg: LDO3 { /* VDDA_1V8 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
- ldo4: LDO4 { /* PMIC_LDO4 */
+ ldo4_reg: LDO4 { /* PMIC_LDO4 */
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
- ldo5: LDO5 { /* NVCC_SD2 */
+ ldo5_reg: LDO5 { /* NVCC_SD2 */
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
@@ -650,7 +646,7 @@ &usdhc2 {
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
vmmc-supply = <®_usdhc2_vmmc>;
- vqmmc-supply = <&ldo5>;
+ vqmmc-supply = <&ldo5_reg>;
bus-width = <4>;
status = "okay";
};
@@ -661,8 +657,8 @@ &usdhc3 {
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- vmmc-supply = <&buck4>;
- vqmmc-supply = <&buck5>;
+ vmmc-supply = <&buck4_reg>;
+ vqmmc-supply = <&buck5_reg>;
bus-width = <8>;
no-sd;
no-sdio;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 90d7bb8f5619e..42a3216daed44 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1437,7 +1437,7 @@ aips5: bus@30df0000 {
#access-controller-cells = <3>;
ranges = <0x30c00000 0x30c00000 0x400000>;
- spba-bus@30c00000 {
+ spba5: spba-bus@30c00000 {
compatible = "fsl,spba-bus", "simple-bus";
reg = <0x30c00000 0x100000>;
#address-cells = <1>;
--
2.53.0
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