* Re: [PATCH v2 0/6] fsl-mc: Move over to device MSI infrastructure
From: Marc Zyngier @ 2026-05-10 13:00 UTC (permalink / raw)
To: Christophe Leroy (CS GROUP)
Cc: Ioana Ciornei, Thomas Gleixner, Sascha Bischoff, linux-kernel,
linux-arm-kernel, linuxppc-dev
In-Reply-To: <177209938125.547814.7154250802402503122.b4-ty@kernel.org>
On Thu, 26 Feb 2026 09:50:43 +0000,
"Christophe Leroy (CS GROUP)" <chleroy@kernel.org> wrote:
>
>
> On Tue, 24 Feb 2026 10:09:30 +0000, Marc Zyngier wrote:
> > This is the second drop of this cleanup series for the fsl-mc MSI
> > infrastructure, initially posted at [1].
> >
> > * From v1 [1]:
> >
> > - Drop the now unused DOMAIN_BUS_FSL_MC_MSI bus token
> >
> > [...]
>
> Applied, thanks!
>
> [1/6] fsl-mc: Remove MSI domain propagation to sub-devices
> commit: 1fb7392ee3408494d4d62c09a8c3e5f5934caba7
> [2/6] fsl-mc: Add minimal infrastructure to use platform MSI
> commit: 0c9f522f2d41c7e055a602a0d2c41dc7af01010b
> [3/6] irqchip/gic-v3-its: Add fsl_mc device plumbing to the msi-parent handling
> commit: cf3179b4e53f527aba9f0c6c3b921619c8adf761
> [4/6] fsl-mc: Switch over to per-device platform MSI
> commit: 4a958e47c246fa3fb8954f4303e0da15ab3d026d
> [5/6] fsl-mc: Remove legacy MSI implementation
> commit: 14b1cbcc6cec0b02298f4adf717646cd943b7ef6
> [6/6] platform-msi: Remove stale comment
> commit: f0a2eac6a597268034fd40d92c1469182438b53d
Is there any particular reason why this didn't make it into 7.1?
I was really looking forward to some additional cleanups in the GICv3
ITS code, and this gets in the way.
Do I need to respin it?
Thanks,
M.
--
Jazz isn't dead. It just smells funny.
^ permalink raw reply
* [PATCH 0/3] Add GPADC support for A523
From: Michal Piekos @ 2026-05-10 12:57 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maksim Kiselev
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
Add support for Allwinner A523 GPADC in sun20i gpadc driver and describe
corresponding node in dts for A523 SoC.
A523 uses same model as existing driver except it has two clocks.
Added support to enable more than one clock in the driver, extended the
binding with new compatible and wired up dts node for A523 which uses D1
as fallback compatible.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
Michal Piekos (3):
dt-bindings: iio: adc: Add GPADC for Allwinner A523
iio: adc: sun20i-gpadc: add A523 gpadc support
arm64: dts: allwinner: a523: add gpadc node
.../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 37 +++++++++++++++++++++-
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 12 +++++++
drivers/iio/adc/sun20i-gpadc-iio.c | 8 ++---
3 files changed, 52 insertions(+), 5 deletions(-)
---
base-commit: 8ab992f815d6736b5c7a6f5fd7bfe7bc106bb3dc
change-id: 20260507-sunxi-a523-gpadc-1879aa5df754
Best regards,
--
Michal Piekos <michal.piekos@mmpsystems.pl>
^ permalink raw reply
* [PATCH 1/3] dt-bindings: iio: adc: Add GPADC for Allwinner A523
From: Michal Piekos @ 2026-05-10 12:57 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maksim Kiselev
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-0-4f6b0f4000fb@mmpsystems.pl>
Add support for the GPADC for the Allwinner A523. It differs from the
D1/T113s/R329/T507 by having two clocks.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
.../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 37 +++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
index da605a051b94..89da96cd705f 100644
--- a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
@@ -17,6 +17,7 @@ properties:
- items:
- enum:
- allwinner,sun50i-h616-gpadc
+ - allwinner,sun55i-a523-gpadc
- const: allwinner,sun20i-d1-gpadc
"#io-channel-cells":
@@ -29,7 +30,12 @@ properties:
const: 0
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
interrupts:
maxItems: 1
@@ -40,6 +46,35 @@ properties:
resets:
maxItems: 1
+allOf:
+ - if:
+ properties:
+ compatible:
+ items:
+ - const: allwinner,sun55i-a523-gpadc
+ - const: allwinner,sun20i-d1-gpadc
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ items:
+ - description: Bus clock
+ - description: Module clock
+ clock-names:
+ minItems: 2
+ maxItems: 2
+ items:
+ - const: bus
+ - const: mod
+ required:
+ - clock-names
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+ clock-names: false
+
patternProperties:
"^channel@[0-9a-f]+$":
$ref: adc.yaml
--
2.43.0
^ permalink raw reply related
* [PATCH 2/3] iio: adc: sun20i-gpadc: add A523 gpadc support
From: Michal Piekos @ 2026-05-10 12:57 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maksim Kiselev
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-0-4f6b0f4000fb@mmpsystems.pl>
A523 differs from existing sun20i-gpadc-iio by having two clocks; bus
clock and module clock.
Change driver to enable all clocks.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
drivers/iio/adc/sun20i-gpadc-iio.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/sun20i-gpadc-iio.c b/drivers/iio/adc/sun20i-gpadc-iio.c
index 861c14da75ad..dd4c7e6e3d76 100644
--- a/drivers/iio/adc/sun20i-gpadc-iio.c
+++ b/drivers/iio/adc/sun20i-gpadc-iio.c
@@ -180,7 +180,7 @@ static int sun20i_gpadc_probe(struct platform_device *pdev)
struct iio_dev *indio_dev;
struct sun20i_gpadc_iio *info;
struct reset_control *rst;
- struct clk *clk;
+ struct clk_bulk_data *clks;
int irq;
int ret;
@@ -205,9 +205,9 @@ static int sun20i_gpadc_probe(struct platform_device *pdev)
if (IS_ERR(info->regs))
return PTR_ERR(info->regs);
- clk = devm_clk_get_enabled(dev, NULL);
- if (IS_ERR(clk))
- return dev_err_probe(dev, PTR_ERR(clk), "failed to enable bus clock\n");
+ ret = devm_clk_bulk_get_all_enabled(dev, &clks);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "failed to enable clocks\n");
rst = devm_reset_control_get_exclusive(dev, NULL);
if (IS_ERR(rst))
--
2.43.0
^ permalink raw reply related
* [PATCH 3/3] arm64: dts: allwinner: a523: add gpadc node
From: Michal Piekos @ 2026-05-10 12:57 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Maksim Kiselev
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-0-4f6b0f4000fb@mmpsystems.pl>
Describe high speed timer block on Allwinner D1S-T113.
Tested on Radxa Cubie A5E:
- 2 connected channels are showing voltages in agreement with
schematics.
BOOT-SEL-ADC ~500mV
BOM-ADC ~1800mV
- 3rd channel exposed on 40pin header is showing correct voltages when
connected to known voltage source.
Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
---
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 5afa8d92acbf..f6c5cae5b23a 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -340,6 +340,18 @@ ledc: led-controller@2008000 {
status = "disabled";
};
+ gpadc: adc@2009000 {
+ compatible = "allwinner,sun55i-a523-gpadc",
+ "allwinner,sun20i-d1-gpadc";
+ reg = <0x2009000 0x400>;
+ clocks = <&ccu CLK_BUS_GPADC0>, <&ccu CLK_GPADC0>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC0>;
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #io-channel-cells = <1>;
+ };
+
wdt: watchdog@2050000 {
compatible = "allwinner,sun55i-a523-wdt";
reg = <0x2050000 0x20>;
--
2.43.0
^ permalink raw reply related
* [PATCH v5 18/21] drm: bridge: dw_hdmi: Remove the empty dw_hdmi_setup_rx_sense()
From: Jonas Karlman @ 2026-05-10 12:41 UTC (permalink / raw)
To: Andrzej Hajda, Neil Armstrong, Robert Foss, Heiko Stuebner,
Laurent Pinchart, Jonas Karlman, Jernej Skrabec, Luca Ceresoli,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, David Airlie,
Simona Vetter, Kevin Hilman, Jerome Brunet, Martin Blumenstingl
Cc: Liu Ying, Sandy Huang, Andy Yan, Chen-Yu Tsai, Christian Hewitt,
Diederik de Haas, Nicolas Frattaroli, Dmitry Baryshkov, dri-devel,
linux-arm-kernel, linux-rockchip, linux-amlogic, linux-sunxi, imx,
linux-kernel
In-Reply-To: <20260510124111.1226584-1-jonas@kwiboo.se>
The dw_hdmi_setup_rx_sense() helper is empty and no longer needed after
recent RXSENSE and HPD rework, remove it.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v5: No change
v4: New patch
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 5 -----
drivers/gpu/drm/meson/meson_dw_hdmi.c | 3 ---
include/drm/bridge/dw_hdmi.h | 2 --
3 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 7fd2de41bc02..a388efeb6a87 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3000,11 +3000,6 @@ static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id)
return ret;
}
-void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense)
-{
-}
-EXPORT_SYMBOL_GPL(dw_hdmi_setup_rx_sense);
-
static irqreturn_t dw_hdmi_irq(int irq, void *dev_id)
{
struct dw_hdmi *hdmi = dev_id;
diff --git a/drivers/gpu/drm/meson/meson_dw_hdmi.c b/drivers/gpu/drm/meson/meson_dw_hdmi.c
index 9ba83bf4787c..3ad84cebf2c9 100644
--- a/drivers/gpu/drm/meson/meson_dw_hdmi.c
+++ b/drivers/gpu/drm/meson/meson_dw_hdmi.c
@@ -524,9 +524,6 @@ static irqreturn_t dw_hdmi_top_thread_irq(int irq, void *dev_id)
if (stat & HDMITX_TOP_INTR_HPD_RISE)
hpd_connected = true;
- dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,
- hpd_connected);
-
drm_helper_hpd_irq_event(dw_hdmi->bridge->dev);
drm_bridge_hpd_notify(dw_hdmi->bridge,
hpd_connected ? connector_status_connected
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h
index d587c4076a25..cea6618f097c 100644
--- a/include/drm/bridge/dw_hdmi.h
+++ b/include/drm/bridge/dw_hdmi.h
@@ -187,8 +187,6 @@ struct dw_hdmi *dw_hdmi_bind(struct platform_device *pdev,
void dw_hdmi_suspend(struct dw_hdmi *hdmi);
void dw_hdmi_resume(struct dw_hdmi *hdmi);
-void dw_hdmi_setup_rx_sense(struct dw_hdmi *hdmi, bool hpd, bool rx_sense);
-
int dw_hdmi_set_plugged_cb(struct dw_hdmi *hdmi, hdmi_codec_plugged_cb fn,
struct device *codec_dev);
void dw_hdmi_set_sample_non_pcm(struct dw_hdmi *hdmi, unsigned int non_pcm);
--
2.54.0
^ permalink raw reply related
* Re: [PATCH 1/3] dt-bindings: iio: adc: Add GPADC for Allwinner A523
From: Rob Herring (Arm) @ 2026-05-10 14:29 UTC (permalink / raw)
To: Michal Piekos
Cc: linux-arm-kernel, Samuel Holland, Chen-Yu Tsai, linux-kernel,
Conor Dooley, Jonathan Cameron, Maksim Kiselev, Andy Shevchenko,
David Lechner, Jernej Skrabec, Krzysztof Kozlowski, linux-iio,
linux-sunxi, Nuno Sá, devicetree
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-1-4f6b0f4000fb@mmpsystems.pl>
On Sun, 10 May 2026 14:57:22 +0200, Michal Piekos wrote:
> Add support for the GPADC for the Allwinner A523. It differs from the
> D1/T113s/R329/T507 by having two clocks.
>
> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
> ---
> .../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 37 +++++++++++++++++++++-
> 1 file changed, 36 insertions(+), 1 deletion(-)
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml: allOf:0:then:properties:clocks: {'minItems': 2, 'maxItems': 2, 'items': [{'description': 'Bus clock'}, {'description': 'Module clock'}]} should not be valid under {'required': ['maxItems']}
hint: "maxItems" is not needed with an "items" list
from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml: allOf:0:then:properties:clocks: 'oneOf' conditional failed, one must be fixed:
False schema does not allow 2
[{'description': 'Bus clock'}, {'description': 'Module clock'}] is too long
[{'description': 'Bus clock'}, {'description': 'Module clock'}] is too short
1 was expected
hint: "minItems" is only needed if less than the "items" list length
from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml: allOf:0:then:properties:clock-names: {'minItems': 2, 'maxItems': 2, 'items': [{'const': 'bus'}, {'const': 'mod'}]} should not be valid under {'required': ['maxItems']}
hint: "maxItems" is not needed with an "items" list
from schema $id: http://devicetree.org/meta-schemas/items.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml: allOf:0:then:properties:clock-names: 'oneOf' conditional failed, one must be fixed:
False schema does not allow 2
[{'const': 'bus'}, {'const': 'mod'}] is too long
[{'const': 'bus'}, {'const': 'mod'}] is too short
1 was expected
hint: "minItems" is only needed if less than the "items" list length
from schema $id: http://devicetree.org/meta-schemas/items.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.kernel.org/project/devicetree/patch/20260510-sunxi-a523-gpadc-v1-1-4f6b0f4000fb@mmpsystems.pl
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply
* Re: [PATCH 3/3] arm64: dts: allwinner: a523: add gpadc node
From: Jernej Škrabec @ 2026-05-10 14:39 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Maksim Kiselev, Michal Piekos
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-3-4f6b0f4000fb@mmpsystems.pl>
Dne nedelja, 10. maj 2026 ob 14:57:24 Srednjeevropski poletni čas je Michal Piekos napisal(a):
> Describe high speed timer block on Allwinner D1S-T113.
Above line doesn't make much sense.
Best regards,
Jernej
>
> Tested on Radxa Cubie A5E:
> - 2 connected channels are showing voltages in agreement with
> schematics.
> BOOT-SEL-ADC ~500mV
> BOM-ADC ~1800mV
> - 3rd channel exposed on 40pin header is showing correct voltages when
> connected to known voltage source.
>
> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
> ---
> arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index 5afa8d92acbf..f6c5cae5b23a 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -340,6 +340,18 @@ ledc: led-controller@2008000 {
> status = "disabled";
> };
>
> + gpadc: adc@2009000 {
> + compatible = "allwinner,sun55i-a523-gpadc",
> + "allwinner,sun20i-d1-gpadc";
> + reg = <0x2009000 0x400>;
> + clocks = <&ccu CLK_BUS_GPADC0>, <&ccu CLK_GPADC0>;
> + clock-names = "bus", "mod";
> + resets = <&ccu RST_BUS_GPADC0>;
> + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + #io-channel-cells = <1>;
> + };
> +
> wdt: watchdog@2050000 {
> compatible = "allwinner,sun55i-a523-wdt";
> reg = <0x2050000 0x20>;
>
>
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: iio: adc: Add GPADC for Allwinner A523
From: Jernej Škrabec @ 2026-05-10 14:40 UTC (permalink / raw)
To: Jonathan Cameron, David Lechner, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Samuel Holland, Maksim Kiselev, Michal Piekos
Cc: linux-iio, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, Michal Piekos
In-Reply-To: <20260510-sunxi-a523-gpadc-v1-1-4f6b0f4000fb@mmpsystems.pl>
Dne nedelja, 10. maj 2026 ob 14:57:22 Srednjeevropski poletni čas je Michal Piekos napisal(a):
> Add support for the GPADC for the Allwinner A523. It differs from the
> D1/T113s/R329/T507 by having two clocks.
>
> Signed-off-by: Michal Piekos <michal.piekos@mmpsystems.pl>
> ---
> .../iio/adc/allwinner,sun20i-d1-gpadc.yaml | 37 +++++++++++++++++++++-
> 1 file changed, 36 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> index da605a051b94..89da96cd705f 100644
> --- a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> @@ -17,6 +17,7 @@ properties:
> - items:
> - enum:
> - allwinner,sun50i-h616-gpadc
> + - allwinner,sun55i-a523-gpadc
It shouldn't be combined if it has different number of clocks.
Best regards,
Jernej
> - const: allwinner,sun20i-d1-gpadc
>
> "#io-channel-cells":
> @@ -29,7 +30,12 @@ properties:
> const: 0
>
> clocks:
> - maxItems: 1
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
>
> interrupts:
> maxItems: 1
> @@ -40,6 +46,35 @@ properties:
> resets:
> maxItems: 1
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + items:
> + - const: allwinner,sun55i-a523-gpadc
> + - const: allwinner,sun20i-d1-gpadc
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + items:
> + - description: Bus clock
> + - description: Module clock
> + clock-names:
> + minItems: 2
> + maxItems: 2
> + items:
> + - const: bus
> + - const: mod
> + required:
> + - clock-names
> + else:
> + properties:
> + clocks:
> + maxItems: 1
> + clock-names: false
> +
> patternProperties:
> "^channel@[0-9a-f]+$":
> $ref: adc.yaml
>
>
^ permalink raw reply
* [PATCH v3 2/5] KVM: arm64: Move shadow_pt_debugfs_dentry to reduce holes in kvm_s2_mmu
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
In-Reply-To: <20260510145338.322962-1-weilin.chang@arm.com>
dentry pointer shadow_pt_debugfs_dentry was placed between two booleans
in kvm_s2_mmu, which created unnecessary holes in the struct. Move it so
the two booleans connect.
Signed-off-by: Wei-Lin Chang <weilin.chang@arm.com>
---
arch/arm64/include/asm/kvm_host.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 851f6171751c..1a56d137df10 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -217,16 +217,16 @@ struct kvm_s2_mmu {
*/
bool nested_stage2_enabled;
-#ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS
- struct dentry *shadow_pt_debugfs_dentry;
-#endif
-
/*
* true when this MMU needs to be unmapped before being used for a new
* purpose.
*/
bool pending_unmap;
+#ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS
+ struct dentry *shadow_pt_debugfs_dentry;
+#endif
+
/*
* 0: Nobody is currently using this, check vttbr for validity
* >0: Somebody is actively using this.
--
2.43.0
^ permalink raw reply related
* [PATCH v3 0/5] KVM: arm64: nv: Implement nested stage-2 reverse map
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
Hi,
This is v3 of optimizing the shadow s2 mmu unmapping during MMU
notifiers.
Two new preparatory patches are added, one reduces a hole in kvm_s2_mmu
and another refactors the code a bit during s2 faults. Other changes are
listed below.
* Changes from v2 [1]:
- Removed "polluted" teminology.
- Use xa_{mk, to}_value() when storing and retriving values from maple
trees.
- Avoid using the 63rd bit in maple tree values so that xa_{mk, to}_value()
does not lose us a bit.
- Added reverse map removal during TLBI handling.
- Other suggested refactorings.
Thanks!
[1]: https://lore.kernel.org/kvmarm/20260411125024.3735989-1-weilin.chang@arm.com/
Wei-Lin Chang (5):
KVM: arm64: Use a variable for the canonical GPA in kvm_s2_fault_map()
KVM: arm64: Move shadow_pt_debugfs_dentry to reduce holes in
kvm_s2_mmu
KVM: arm64: nv: Avoid full shadow s2 unmap
KVM: arm64: nv: Remove reverse map entries during TLBI handling
KVM: arm64: nv: Create nested IPA direct map to speed up reverse map
removal
arch/arm64/include/asm/kvm_host.h | 17 +-
arch/arm64/include/asm/kvm_nested.h | 6 +
arch/arm64/kvm/mmu.c | 43 +++--
arch/arm64/kvm/nested.c | 238 +++++++++++++++++++++++++++-
arch/arm64/kvm/sys_regs.c | 3 +
5 files changed, 290 insertions(+), 17 deletions(-)
--
2.43.0
^ permalink raw reply
* [PATCH v3 1/5] KVM: arm64: Use a variable for the canonical GPA in kvm_s2_fault_map()
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
In-Reply-To: <20260510145338.322962-1-weilin.chang@arm.com>
Create a variable to store the canonical GPA, instead of calculating it
when needed. This will be useful when we need to use the canonical GPA
for the nested reverse map later.
Signed-off-by: Wei-Lin Chang <weilin.chang@arm.com>
---
arch/arm64/kvm/mmu.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index d089c107d9b7..e4becd5cdf36 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -1981,6 +1981,7 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
long mapping_size;
kvm_pfn_t pfn;
gfn_t gfn;
+ phys_addr_t canonical_gpa;
int ret;
kvm_fault_lock(kvm);
@@ -1994,6 +1995,7 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
mapping_size = s2vi->vma_pagesize;
pfn = s2vi->pfn;
gfn = s2vi->gfn;
+ canonical_gpa = gfn_to_gpa(get_canonical_gfn(s2fd, s2vi));
/*
* If we are not forced to use page mapping, check if we are
@@ -2012,6 +2014,7 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
goto out_unlock;
}
}
+ canonical_gpa = ALIGN_DOWN(canonical_gpa, mapping_size);
}
if (!perm_fault_granule && !s2vi->map_non_cacheable && kvm_has_mte(kvm))
@@ -2045,11 +2048,9 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
* making sure we adjust the canonical IPA if the mapping size has
* been updated (via a THP upgrade, for example).
*/
- if (writable && !ret) {
- phys_addr_t ipa = gfn_to_gpa(get_canonical_gfn(s2fd, s2vi));
- ipa &= ~(mapping_size - 1);
- mark_page_dirty_in_slot(kvm, s2fd->memslot, gpa_to_gfn(ipa));
- }
+ if (writable && !ret)
+ mark_page_dirty_in_slot(kvm, s2fd->memslot,
+ gpa_to_gfn(canonical_gpa));
if (ret != -EAGAIN)
return ret;
--
2.43.0
^ permalink raw reply related
* [PATCH v3 4/5] KVM: arm64: nv: Remove reverse map entries during TLBI handling
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
In-Reply-To: <20260510145338.322962-1-weilin.chang@arm.com>
When a guest hypervisor issues a TLBI for a specific IPA range, KVM
unmaps that range from all the effected shadow stage-2s. During this we
get the opportunity to remove the reverse map, and lower the probability
of creating UNKNOWN_IPA reverse map ranges at subsequent stage-2 faults.
However, the TLBI ranges are specified in nested IPA, so in order to
locate the affected ranges in the reverse map maple tree, which is a
mapping from canonical IPA to nested IPA, we can only iterate through
the entire tree and check each entry.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Wei-Lin Chang <weilin.chang@arm.com>
---
arch/arm64/include/asm/kvm_nested.h | 2 ++
arch/arm64/kvm/nested.c | 38 +++++++++++++++++++++++++++++
arch/arm64/kvm/sys_regs.c | 3 +++
3 files changed, 43 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
index 5cbf78dfc685..b11925826b25 100644
--- a/arch/arm64/include/asm/kvm_nested.h
+++ b/arch/arm64/include/asm/kvm_nested.h
@@ -76,6 +76,8 @@ extern void kvm_s2_mmu_iterate_by_vmid(struct kvm *kvm, u16 vmid,
const union tlbi_info *info,
void (*)(struct kvm_s2_mmu *,
const union tlbi_info *));
+extern void kvm_remove_nested_revmap(struct kvm_s2_mmu *mmu, u64 nested_ipa,
+ size_t size);
extern void kvm_record_nested_revmap(gpa_t gpa, struct kvm_s2_mmu *mmu,
gpa_t fault_ipa, size_t map_size);
extern void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu);
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 35b5d5f21a23..96b88d9c0c2a 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -784,6 +784,44 @@ static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)
return s2_mmu;
}
+void kvm_remove_nested_revmap(struct kvm_s2_mmu *mmu, u64 nested_ipa, size_t size)
+{
+ /*
+ * Iterate through the mt of this mmu, remove all canonical ipa ranges
+ * with !UNKNOWN_IPA that maps to ranges that are strictly within
+ * [addr, addr + size).
+ */
+ struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ void *entry;
+ u64 entry_val, nested_ipa_end = nested_ipa + size;
+ u64 this_nested_ipa, this_nested_ipa_end;
+ size_t revmap_size;
+
+ MA_STATE(mas_rev, revmap_mt, 0, ULONG_MAX);
+
+ mtree_lock(revmap_mt);
+ mas_for_each(&mas_rev, entry, ULONG_MAX) {
+ entry_val = xa_to_value(entry);
+ if (entry_val & UNKNOWN_IPA)
+ continue;
+
+ revmap_size = mas_rev.last - mas_rev.index + 1;
+ this_nested_ipa = entry_val & ADDR_MASK;
+ this_nested_ipa_end = this_nested_ipa + revmap_size;
+
+ if (this_nested_ipa >= nested_ipa &&
+ this_nested_ipa_end <= nested_ipa_end) {
+ /*
+ * As the shadow stage-2 is about to be unmapped
+ * after this function, it doesn't matter whether the
+ * removal of the reverse map failed or not.
+ */
+ mas_store_gfp(&mas_rev, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
+ }
+ }
+ mtree_unlock(revmap_mt);
+}
+
void kvm_record_nested_revmap(gpa_t ipa, struct kvm_s2_mmu *mmu,
gpa_t fault_ipa, size_t map_size)
{
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 6a96cb7ba9a3..a97304680cee 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -4006,6 +4006,7 @@ union tlbi_info {
static void s2_mmu_unmap_range(struct kvm_s2_mmu *mmu,
const union tlbi_info *info)
{
+ kvm_remove_nested_revmap(mmu, info->range.start, info->range.size);
/*
* The unmap operation is allowed to drop the MMU lock and block, which
* means that @mmu could be used for a different context than the one
@@ -4104,6 +4105,8 @@ static void s2_mmu_unmap_ipa(struct kvm_s2_mmu *mmu,
max_size = compute_tlb_inval_range(mmu, info->ipa.addr);
base_addr &= ~(max_size - 1);
+ kvm_remove_nested_revmap(mmu, base_addr, max_size);
+
/*
* See comment in s2_mmu_unmap_range() for why this is allowed to
* reschedule.
--
2.43.0
^ permalink raw reply related
* [PATCH v3 3/5] KVM: arm64: nv: Avoid full shadow s2 unmap
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
In-Reply-To: <20260510145338.322962-1-weilin.chang@arm.com>
Currently we are forced to fully unmap all shadow stage-2 for a VM when
unmapping a page from the canonical stage-2, for example during an MMU
notifier call. This is because we are not tracking what canonical IPA
are mapped in the shadow stage-2 page tables hence there is no way to
know what to unmap.
Create a per kvm_s2_mmu maple tree to track canonical IPA range ->
nested IPA range, so that it is possible to partially unmap shadow
stage-2 when a canonical IPA range is unmapped. The algorithm is simple
and conservative:
At each shadow stage-2 map, insert the nested IPA range into the maple
tree, with the canonical IPA range as the key. If the canonical IPA
range doesn't overlap with existing ranges in the tree, insert as is,
and a reverse mapping for this range is established. But if the
canonical IPA range overlaps with any existing ranges in the tree,
create a new range that spans all the overlapping ranges including the
input range and replace those existing ranges. In the mean time, mark
this new spanning canonical IPA range with an "UNKNOWN_IPA" bit,
indicating we give up tracking the nested IPA ranges that map to this
canonical IPA range.
The maple tree's 64 bit entry is enough to store the nested IPA and
the UNKNOWN_IPA status, therefore besides maple tree's internal
operation, memory allocation is avoided.
Example:
|||| means existing range, ---- means empty range
input: $$$$$$$$$$$$$$$$$$$$$$$$$$
tree: --||||-----|||||||---------||||||||||-----------
insert spanning range and replace overlapping ones:
--||||-----||||||||||||||||||||||||||-----------
^^^^marked UNKNOWN_IPA^^^^
With the reverse map created, when a canonical IPA range gets unmapped,
look into each s2 mmu's maple tree and look for canonical IPA ranges
affected, and base on their UNKNOWN_IPA status:
UNKNOWN_IPA -> fall back and fully unmap the current shadow
stage-2, also clear the tree
not UNKNOWN_IPA -> unmap the nested IPA range, and remove the reverse
map entry
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Wei-Lin Chang <weilin.chang@arm.com>
---
arch/arm64/include/asm/kvm_host.h | 4 +
arch/arm64/include/asm/kvm_nested.h | 4 +
arch/arm64/kvm/mmu.c | 27 ++++--
arch/arm64/kvm/nested.c | 140 +++++++++++++++++++++++++++-
4 files changed, 167 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 1a56d137df10..dc4c0bce1bbb 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -223,6 +223,10 @@ struct kvm_s2_mmu {
*/
bool pending_unmap;
+ bool nested_revmap_broken;
+ /* canonical IPA to nested IPA range lookup */
+ struct maple_tree nested_revmap_mt;
+
#ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS
struct dentry *shadow_pt_debugfs_dentry;
#endif
diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h
index 091544e6af44..5cbf78dfc685 100644
--- a/arch/arm64/include/asm/kvm_nested.h
+++ b/arch/arm64/include/asm/kvm_nested.h
@@ -76,6 +76,8 @@ extern void kvm_s2_mmu_iterate_by_vmid(struct kvm *kvm, u16 vmid,
const union tlbi_info *info,
void (*)(struct kvm_s2_mmu *,
const union tlbi_info *));
+extern void kvm_record_nested_revmap(gpa_t gpa, struct kvm_s2_mmu *mmu,
+ gpa_t fault_ipa, size_t map_size);
extern void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu);
extern void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu);
@@ -164,6 +166,8 @@ extern int kvm_s2_handle_perm_fault(struct kvm_vcpu *vcpu,
struct kvm_s2_trans *trans);
extern int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2);
extern void kvm_nested_s2_wp(struct kvm *kvm);
+extern void kvm_unmap_gfn_range_nested(struct kvm *kvm, gpa_t gpa, size_t size,
+ bool may_block);
extern void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block);
extern void kvm_nested_s2_flush(struct kvm *kvm);
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index e4becd5cdf36..ce0bd88cd3c1 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -5,6 +5,7 @@
*/
#include <linux/acpi.h>
+#include <linux/maple_tree.h>
#include <linux/mman.h>
#include <linux/kvm_host.h>
#include <linux/io.h>
@@ -1099,6 +1100,7 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu)
{
struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu);
struct kvm_pgtable *pgt = NULL;
+ struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
write_lock(&kvm->mmu_lock);
pgt = mmu->pgt;
@@ -1108,8 +1110,11 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu)
free_percpu(mmu->last_vcpu_ran);
}
- if (kvm_is_nested_s2_mmu(kvm, mmu))
+ if (kvm_is_nested_s2_mmu(kvm, mmu)) {
+ if (!mtree_empty(revmap_mt))
+ mtree_destroy(revmap_mt);
kvm_init_nested_s2_mmu(mmu);
+ }
write_unlock(&kvm->mmu_lock);
@@ -1631,6 +1636,10 @@ static int gmem_abort(const struct kvm_s2_fault_desc *s2fd)
goto out_unlock;
}
+ if (s2fd->nested)
+ kvm_record_nested_revmap(gfn << PAGE_SHIFT, pgt->mmu,
+ s2fd->fault_ipa, PAGE_SIZE);
+
ret = KVM_PGT_FN(kvm_pgtable_stage2_map)(pgt, s2fd->fault_ipa, PAGE_SIZE,
__pfn_to_phys(pfn), prot,
memcache, flags);
@@ -2034,6 +2043,10 @@ static int kvm_s2_fault_map(const struct kvm_s2_fault_desc *s2fd,
ret = KVM_PGT_FN(kvm_pgtable_stage2_relax_perms)(pgt, gfn_to_gpa(gfn),
prot, flags);
} else {
+ if (s2fd->nested)
+ kvm_record_nested_revmap(canonical_gpa, pgt->mmu,
+ gfn_to_gpa(gfn), mapping_size);
+
ret = KVM_PGT_FN(kvm_pgtable_stage2_map)(pgt, gfn_to_gpa(gfn), mapping_size,
__pfn_to_phys(pfn), prot,
memcache, flags);
@@ -2389,14 +2402,16 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)
bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
{
+ gpa_t gpa = range->start << PAGE_SHIFT;
+ size_t size = (range->end - range->start) << PAGE_SHIFT;
+ bool may_block = range->may_block;
+
if (!kvm->arch.mmu.pgt || kvm_vm_is_protected(kvm))
return false;
- __unmap_stage2_range(&kvm->arch.mmu, range->start << PAGE_SHIFT,
- (range->end - range->start) << PAGE_SHIFT,
- range->may_block);
+ __unmap_stage2_range(&kvm->arch.mmu, gpa, size, may_block);
+ kvm_unmap_gfn_range_nested(kvm, gpa, size, may_block);
- kvm_nested_s2_unmap(kvm, range->may_block);
return false;
}
@@ -2674,7 +2689,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
write_lock(&kvm->mmu_lock);
kvm_stage2_unmap_range(&kvm->arch.mmu, gpa, size, true);
- kvm_nested_s2_unmap(kvm, true);
+ kvm_unmap_gfn_range_nested(kvm, gpa, size, true);
write_unlock(&kvm->mmu_lock);
}
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 883b6c1008fb..35b5d5f21a23 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -7,6 +7,7 @@
#include <linux/bitfield.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
+#include <linux/maple_tree.h>
#include <asm/fixmap.h>
#include <asm/kvm_arm.h>
@@ -43,6 +44,20 @@ struct vncr_tlb {
*/
#define S2_MMU_PER_VCPU 2
+/*
+ * Per shadow S2 reverse map (IPA -> nested IPA range) maple tree payload
+ * layout:
+ *
+ * bit 62: valid, prevents the case where the nested IPA is 0 and turning
+ * the whole value to 0
+ * bits 55-12: nested IPA bits 55-12
+ * bit 0: UNKNOWN_IPA bit, 1 indicates we give up on tracking what nested
+ * IPA maps to this canonical IPA in the shadow stage-2
+ */
+#define VALID_ENTRY BIT(62)
+#define ADDR_MASK GENMASK_ULL(55, 12)
+#define UNKNOWN_IPA BIT(0)
+
void kvm_init_nested(struct kvm *kvm)
{
kvm->arch.nested_mmus = NULL;
@@ -769,12 +784,57 @@ static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)
return s2_mmu;
}
+void kvm_record_nested_revmap(gpa_t ipa, struct kvm_s2_mmu *mmu,
+ gpa_t fault_ipa, size_t map_size)
+{
+ struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ gpa_t ipa_end = ipa + map_size - 1;
+ u64 entry, new_entry = 0;
+ MA_STATE(mas_rev, revmap_mt, ipa, ipa_end);
+
+ if (mmu->nested_revmap_broken)
+ return;
+
+ mtree_lock(revmap_mt);
+ entry = xa_to_value(mas_find_range(&mas_rev, ipa_end));
+
+ if (entry) {
+ /* maybe just a perm update... */
+ if (!(entry & UNKNOWN_IPA) && mas_rev.index == ipa &&
+ mas_rev.last == ipa_end &&
+ fault_ipa == (entry & ADDR_MASK))
+ goto unlock;
+ /*
+ * Create a "UNKNOWN_IPA" range that spans all the overlapping
+ * ranges and store it.
+ */
+ while (entry && mas_rev.index <= ipa_end) {
+ ipa = min(mas_rev.index, ipa);
+ ipa_end = max(mas_rev.last, ipa_end);
+ entry = xa_to_value(mas_find_range(&mas_rev, ipa_end));
+ }
+ new_entry |= UNKNOWN_IPA;
+ } else {
+ new_entry |= fault_ipa;
+ new_entry |= VALID_ENTRY;
+ }
+
+ mas_set_range(&mas_rev, ipa, ipa_end);
+ if (mas_store_gfp(&mas_rev, xa_mk_value(new_entry),
+ GFP_NOWAIT | __GFP_ACCOUNT))
+ mmu->nested_revmap_broken = true;
+unlock:
+ mtree_unlock(revmap_mt);
+}
+
void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu)
{
/* CnP being set denotes an invalid entry */
mmu->tlb_vttbr = VTTBR_CNP_BIT;
mmu->nested_stage2_enabled = false;
atomic_set(&mmu->refcnt, 0);
+ mt_init(&mmu->nested_revmap_mt);
+ mmu->nested_revmap_broken = false;
}
void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu)
@@ -1150,6 +1210,82 @@ void kvm_nested_s2_wp(struct kvm *kvm)
kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm->arch.mmu.pgt->ia_bits));
}
+static void reset_revmap_and_unmap(struct kvm_s2_mmu *mmu, bool may_block)
+{
+ mtree_destroy(&mmu->nested_revmap_mt);
+ mmu->nested_revmap_broken = false;
+ kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), may_block);
+}
+
+static void unmap_mmu_ipa_range(struct kvm_s2_mmu *mmu, gpa_t gpa,
+ size_t unmap_size, bool may_block)
+{
+ struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ gpa_t ipa = gpa;
+ gpa_t ipa_end = gpa + unmap_size - 1;
+ u64 entry;
+ size_t entry_size;
+ MA_STATE(mas_rev, revmap_mt, gpa, ipa_end);
+
+ if (mmu->nested_revmap_broken) {
+ reset_revmap_and_unmap(mmu, may_block);
+ return;
+ }
+
+ mtree_lock(revmap_mt);
+ entry = xa_to_value(mas_find_range(&mas_rev, ipa_end));
+
+ while (entry && mas_rev.index <= ipa_end) {
+ ipa = mas_rev.last + 1;
+ entry_size = mas_rev.last - mas_rev.index + 1;
+ /*
+ * Give up and invalidate this s2 mmu if the unmap range
+ * touches any UNKNOWN_IPA range.
+ */
+ if (entry & UNKNOWN_IPA) {
+ mtree_unlock(revmap_mt);
+ reset_revmap_and_unmap(mmu, may_block);
+ return;
+ }
+
+ /*
+ * Ignore result, it is okay if a reverse mapping erase
+ * fails.
+ */
+ mas_store_gfp(&mas_rev, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
+
+ mtree_unlock(revmap_mt);
+ kvm_stage2_unmap_range(mmu, entry & ADDR_MASK, entry_size,
+ may_block);
+ mtree_lock(revmap_mt);
+ /*
+ * Other maple tree operations during preemption could render
+ * this ma_state invalid, so reset it.
+ */
+ mas_set_range(&mas_rev, ipa, ipa_end);
+ entry = xa_to_value(mas_find_range(&mas_rev, ipa_end));
+ }
+ mtree_unlock(revmap_mt);
+}
+
+void kvm_unmap_gfn_range_nested(struct kvm *kvm, gpa_t gpa, size_t size,
+ bool may_block)
+{
+ int i;
+
+ if (!kvm->arch.nested_mmus_size)
+ return;
+
+ for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
+ struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
+
+ if (kvm_s2_mmu_valid(mmu))
+ unmap_mmu_ipa_range(mmu, gpa, size, may_block);
+ }
+
+ kvm_invalidate_vncr_ipa(kvm, gpa, gpa + size);
+}
+
void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block)
{
int i;
@@ -1163,7 +1299,7 @@ void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block)
struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
if (kvm_s2_mmu_valid(mmu))
- kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), may_block);
+ reset_revmap_and_unmap(mmu, may_block);
}
kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm->arch.mmu.pgt->ia_bits));
@@ -1848,7 +1984,7 @@ void check_nested_vcpu_requests(struct kvm_vcpu *vcpu)
write_lock(&vcpu->kvm->mmu_lock);
if (mmu->pending_unmap) {
- kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), true);
+ reset_revmap_and_unmap(mmu, true);
mmu->pending_unmap = false;
}
write_unlock(&vcpu->kvm->mmu_lock);
--
2.43.0
^ permalink raw reply related
* [PATCH v3 5/5] KVM: arm64: nv: Create nested IPA direct map to speed up reverse map removal
From: Wei-Lin Chang @ 2026-05-10 14:53 UTC (permalink / raw)
To: linux-arm-kernel, kvmarm, linux-kernel
Cc: Marc Zyngier, Oliver Upton, Joey Gouly, Suzuki K Poulose,
Zenghui Yu, Catalin Marinas, Will Deacon, Wei-Lin Chang
In-Reply-To: <20260510145338.322962-1-weilin.chang@arm.com>
Iterating through the whole reverse map to find which entries to remove
when handling guest hypervisor TLBIs is not efficient. Create a direct
map that goes from nested IPA to canonical IPA so that the canonical
IPA range affected by the TLBI can be quickly determined, then remove
the entries in the reverse map accordingly.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Wei-Lin Chang <weilin.chang@arm.com>
---
arch/arm64/include/asm/kvm_host.h | 5 ++
arch/arm64/kvm/mmu.c | 9 ++-
arch/arm64/kvm/nested.c | 124 ++++++++++++++++++++++--------
3 files changed, 104 insertions(+), 34 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index dc4c0bce1bbb..f9e95a023ec4 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -226,6 +226,11 @@ struct kvm_s2_mmu {
bool nested_revmap_broken;
/* canonical IPA to nested IPA range lookup */
struct maple_tree nested_revmap_mt;
+ /*
+ * Nested IPA to canonical IPA range lookup, essentially a cache of
+ * the guest's stage-2.
+ */
+ struct maple_tree nested_direct_mt;
#ifdef CONFIG_PTDUMP_STAGE2_DEBUGFS
struct dentry *shadow_pt_debugfs_dentry;
diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index ce0bd88cd3c1..77146431be6d 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -1101,6 +1101,7 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu)
struct kvm *kvm = kvm_s2_mmu_to_kvm(mmu);
struct kvm_pgtable *pgt = NULL;
struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ struct maple_tree *direct_mt = &mmu->nested_direct_mt;
write_lock(&kvm->mmu_lock);
pgt = mmu->pgt;
@@ -1111,8 +1112,12 @@ void kvm_free_stage2_pgd(struct kvm_s2_mmu *mmu)
}
if (kvm_is_nested_s2_mmu(kvm, mmu)) {
- if (!mtree_empty(revmap_mt))
- mtree_destroy(revmap_mt);
+ if (!mtree_empty(revmap_mt) || !mtree_empty(direct_mt)) {
+ mtree_lock(revmap_mt);
+ __mt_destroy(revmap_mt);
+ __mt_destroy(direct_mt);
+ mtree_unlock(revmap_mt);
+ }
kvm_init_nested_s2_mmu(mmu);
}
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index 96b88d9c0c2a..fcb6a88047e1 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -45,14 +45,14 @@ struct vncr_tlb {
#define S2_MMU_PER_VCPU 2
/*
- * Per shadow S2 reverse map (IPA -> nested IPA range) maple tree payload
- * layout:
+ * Per shadow S2 reverse & direct map maple tree payload layout:
*
- * bit 62: valid, prevents the case where the nested IPA is 0 and turning
+ * bit 62: valid, prevents the case where the address is 0 and turning
* the whole value to 0
- * bits 55-12: nested IPA bits 55-12
+ * bits 55-12: {nested, canonical} IPA bits 55-12
* bit 0: UNKNOWN_IPA bit, 1 indicates we give up on tracking what nested
- * IPA maps to this canonical IPA in the shadow stage-2
+ * IPA maps to this canonical IPA in the shadow stage-2, only used
+ * in reverse map
*/
#define VALID_ENTRY BIT(62)
#define ADDR_MASK GENMASK_ULL(55, 12)
@@ -787,37 +787,67 @@ static struct kvm_s2_mmu *get_s2_mmu_nested(struct kvm_vcpu *vcpu)
void kvm_remove_nested_revmap(struct kvm_s2_mmu *mmu, u64 nested_ipa, size_t size)
{
/*
- * Iterate through the mt of this mmu, remove all canonical ipa ranges
- * with !UNKNOWN_IPA that maps to ranges that are strictly within
- * [addr, addr + size).
+ * For all ranges in direct_mt that are completely covered by the range
+ * we are TLBIing [gpa, gpa + size), remove the reverse map and its
+ * corresponding direct map together, when these conditions are met:
+ *
+ * 1. The reverse map is not UNKNOWN_IPA.
+ * 2. The reverse map is completely covered by the TLBI range.
+ * 3. The reverse map and the direct map are symmetric i.e. they map to
+ * each other, with the same size.
+ *
+ * Symmetry must be checked because there are three places where the
+ * direct map could become inconsistent:
+ *
+ * 1. Direct map removal failure during an mmu notifier in
+ * unmap_mmu_ipa_range().
+ * 2. Direct map insertion failure during an s2 fault in
+ * kvm_record_nested_revmap().
+ * 3. Direct map removal failure during a previous call of this very
+ * function.
*/
struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
- void *entry;
- u64 entry_val, nested_ipa_end = nested_ipa + size;
- u64 this_nested_ipa, this_nested_ipa_end;
- size_t revmap_size;
-
- MA_STATE(mas_rev, revmap_mt, 0, ULONG_MAX);
-
+ struct maple_tree *direct_mt = &mmu->nested_direct_mt;
+ gpa_t nested_ipa_end = nested_ipa + size - 1;
+ u64 entry_dir;
+ struct mapping {
+ u64 from;
+ u64 to;
+ size_t size;
+ };
+
+ MA_STATE(mas_dir, direct_mt, nested_ipa, nested_ipa_end);
mtree_lock(revmap_mt);
- mas_for_each(&mas_rev, entry, ULONG_MAX) {
- entry_val = xa_to_value(entry);
- if (entry_val & UNKNOWN_IPA)
- continue;
-
- revmap_size = mas_rev.last - mas_rev.index + 1;
- this_nested_ipa = entry_val & ADDR_MASK;
- this_nested_ipa_end = this_nested_ipa + revmap_size;
-
- if (this_nested_ipa >= nested_ipa &&
- this_nested_ipa_end <= nested_ipa_end) {
- /*
- * As the shadow stage-2 is about to be unmapped
- * after this function, it doesn't matter whether the
- * removal of the reverse map failed or not.
- */
+ entry_dir = xa_to_value(mas_find_range(&mas_dir, nested_ipa_end));
+
+ while (entry_dir && mas_dir.index <= nested_ipa_end) {
+ struct mapping dir, rev;
+ u64 entry_rev;
+
+ dir.from = mas_dir.index;
+ dir.to = entry_dir & ADDR_MASK;
+ dir.size = mas_dir.last - mas_dir.index + 1;
+
+ /* Use ipa range to find the corresponding entry in revmap. */
+ MA_STATE(mas_rev, revmap_mt, dir.to, dir.to + dir.size - 1);
+ entry_rev = xa_to_value(mas_find_range(&mas_rev,
+ dir.to + dir.size - 1));
+
+ rev.from = mas_rev.index;
+ rev.to = entry_rev & ADDR_MASK;
+ rev.size = mas_rev.last - mas_rev.index + 1;
+
+ /* The three conditions outlined above. */
+ if (entry_rev && !(entry_rev & UNKNOWN_IPA) &&
+ dir.from >= nested_ipa &&
+ dir.from + dir.size - 1 <= nested_ipa_end &&
+ dir.from == rev.to &&
+ rev.from == dir.to &&
+ dir.size == rev.size) {
+ mas_store_gfp(&mas_dir, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
mas_store_gfp(&mas_rev, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
}
+ entry_dir = xa_to_value(mas_find_range(&mas_dir, nested_ipa_end));
}
mtree_unlock(revmap_mt);
}
@@ -826,9 +856,12 @@ void kvm_record_nested_revmap(gpa_t ipa, struct kvm_s2_mmu *mmu,
gpa_t fault_ipa, size_t map_size)
{
struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ struct maple_tree *direct_mt = &mmu->nested_direct_mt;
gpa_t ipa_end = ipa + map_size - 1;
+ gpa_t fault_ipa_end = fault_ipa + map_size - 1;
u64 entry, new_entry = 0;
MA_STATE(mas_rev, revmap_mt, ipa, ipa_end);
+ MA_STATE(mas_dir, direct_mt, fault_ipa, fault_ipa_end);
if (mmu->nested_revmap_broken)
return;
@@ -861,6 +894,15 @@ void kvm_record_nested_revmap(gpa_t ipa, struct kvm_s2_mmu *mmu,
if (mas_store_gfp(&mas_rev, xa_mk_value(new_entry),
GFP_NOWAIT | __GFP_ACCOUNT))
mmu->nested_revmap_broken = true;
+
+ /*
+ * Add direct map but ignore the result, missing a direct map does not
+ * affect correctness.
+ */
+ if (new_entry & VALID_ENTRY && !mmu->nested_revmap_broken)
+ mas_store_gfp(&mas_dir, xa_mk_value(ipa | VALID_ENTRY),
+ GFP_NOWAIT | __GFP_ACCOUNT);
+
unlock:
mtree_unlock(revmap_mt);
}
@@ -872,6 +914,8 @@ void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu)
mmu->nested_stage2_enabled = false;
atomic_set(&mmu->refcnt, 0);
mt_init(&mmu->nested_revmap_mt);
+ mt_init_flags(&mmu->nested_direct_mt, MT_FLAGS_LOCK_EXTERN);
+ mt_set_external_lock(&mmu->nested_direct_mt, &mmu->nested_revmap_mt.ma_lock);
mmu->nested_revmap_broken = false;
}
@@ -1250,7 +1294,10 @@ void kvm_nested_s2_wp(struct kvm *kvm)
static void reset_revmap_and_unmap(struct kvm_s2_mmu *mmu, bool may_block)
{
- mtree_destroy(&mmu->nested_revmap_mt);
+ mtree_lock(&mmu->nested_revmap_mt);
+ __mt_destroy(&mmu->nested_revmap_mt);
+ __mt_destroy(&mmu->nested_direct_mt);
+ mtree_unlock(&mmu->nested_revmap_mt);
mmu->nested_revmap_broken = false;
kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), may_block);
}
@@ -1259,11 +1306,14 @@ static void unmap_mmu_ipa_range(struct kvm_s2_mmu *mmu, gpa_t gpa,
size_t unmap_size, bool may_block)
{
struct maple_tree *revmap_mt = &mmu->nested_revmap_mt;
+ struct maple_tree *direct_mt = &mmu->nested_direct_mt;
gpa_t ipa = gpa;
gpa_t ipa_end = gpa + unmap_size - 1;
+ gpa_t nested_ipa, nested_ipa_end;
u64 entry;
size_t entry_size;
MA_STATE(mas_rev, revmap_mt, gpa, ipa_end);
+ MA_STATE(mas_dir, direct_mt, 0, ULONG_MAX);
if (mmu->nested_revmap_broken) {
reset_revmap_and_unmap(mmu, may_block);
@@ -1292,6 +1342,16 @@ static void unmap_mmu_ipa_range(struct kvm_s2_mmu *mmu, gpa_t gpa,
*/
mas_store_gfp(&mas_rev, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
+ /*
+ * Try to also remove the direct map, it is okay if this fails,
+ * as we check for direct map consistency in
+ * kvm_remove_nested_revmap().
+ */
+ nested_ipa = entry & ADDR_MASK;
+ nested_ipa_end = nested_ipa + entry_size - 1;
+ mas_set_range(&mas_dir, nested_ipa, nested_ipa_end);
+ mas_store_gfp(&mas_dir, NULL, GFP_NOWAIT | __GFP_ACCOUNT);
+
mtree_unlock(revmap_mt);
kvm_stage2_unmap_range(mmu, entry & ADDR_MASK, entry_size,
may_block);
--
2.43.0
^ permalink raw reply related
* [PATCH v5 00/10] arm64: dts: lx2160a: cleanups, add new board, large pci bars
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
This patch-set is made of 3 parts:
1. Extend lx2160 pci node ranges to support 16-bit, and large 64-bit
bars. LX2160A SoC has always supported this, and SolidRun carried it
in vendor fork for several years now.
2. Cleanup some status properties in LX2162A Clearfog dts.
3. Add description for solidrun twins baord with single LX2160A CEX-7
module.
There are no inter-dependencies between the parts and they may apply
individually if necessary.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
Changes in v5:
- add new board
- add cleanups to existing solidrun boards
- pci: extend to lx2160a-rev2 dtsi
- pci: remove non-standard flags to pass dtbs_check
- Link to v4: https://lore.kernel.org/r/20260302-lx2160-pci-v4-1-30a30dc47ec6@solid-run.com
Changes in v4
- dropped accidentally added empty line at top of file:
- actually drop RFC prefix
- rebased on v7.0-rc1 and re-tested on v7.0-rc2
- Link to v3: https://lore.kernel.org/r/20250907-lx2160-pci-v3-1-bb66cc41b8f9@solid-run.com
Changes in v3:
- dropped rfc label
- adjusted flags
- split 16GB area into 4x4GB sections.
- enhance commit description with details explanation
- Link to v2: https://lore.kernel.org/r/20240429-lx2160-pci-v2-1-1b94576d6263@solid-run.com
Changes in v2:
- adjusted flags to fix several errors during probe and bar allocation
- explicitly tested with 2 pci cards on Debian (Linux 6.1)
- still rfc because a limitation in designware pci driver
- Link to v1: https://lore.kernel.org/r/20240321-lx2160-pci-v1-1-3673708f7eb6@solid-run.com
---
Josua Mayer (10):
arm64: dts: lx2160a: extend 32-bit, and add 64-bit pci regions
arm64: dts: lx2162a-clearfog: use rev2 SoC dtsi
arm64: dts: lx2162a-clearfog: cleanup superfluous status properties
arm64: dts: lx2162a-clearfog: specify sfp ports led colour and function
dt-bindings: arm: fsl: Add solidrun lx2160a twins board
arm64: dts: lx2160a-clearfog-itx: remove redundant dts version tag
arm64: dts: lx2160a-clearfog-itx: move shared includes to dts
arm64: dts: lx2160a: add labels to thermal trip-point nodes
arm64: dts: lx2160a-cex7: add labels to i2c buses behind mux
arm64: dts: Add support for LX2160 Twins board in single configuration
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 12 +-
.../boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts | 2 +
.../dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 3 -
.../boot/dts/freescale/fsl-lx2160a-half-twins.dts | 822 +++++++++++++++++++++
.../boot/dts/freescale/fsl-lx2160a-honeycomb.dts | 2 +
.../arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi | 30 +-
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 61 +-
.../boot/dts/freescale/fsl-lx2162a-clearfog.dts | 37 +-
10 files changed, 909 insertions(+), 63 deletions(-)
---
base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731
change-id: 20240118-lx2160-pci-4bdb196e58f3
Best regards,
--
Josua Mayer <josua@solid-run.com>
^ permalink raw reply
* [PATCH v5 09/10] arm64: dts: lx2160a-cex7: add labels to i2c buses behind mux
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
The LX2160 CEX-7 module integrates in i2c bus multiplexer. Some of its
channel nodes have labels, others do not.
Add descriptive labels to the unlabeled channels, allowing other board
dts to reference them for example in aliases.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
index 7df93bb37d13c..ce63545abb6e6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
@@ -58,7 +58,7 @@ i2c-mux@77 {
#size-cells = <0>;
reg = <0x77>;
- i2c@0 {
+ ddr_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -84,7 +84,7 @@ eeprom@57 {
};
};
- i2c@1 {
+ fan_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
@@ -95,7 +95,7 @@ fan-temperature-ctrlr@18 {
};
};
- i2c@2 {
+ power_i2c: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
@@ -106,7 +106,7 @@ regulator@5c {
};
};
- i2c@3 {
+ i2c_smb: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
--
2.51.0
^ permalink raw reply related
* [PATCH v5 02/10] arm64: dts: lx2162a-clearfog: use rev2 SoC dtsi
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
LX2160A and LX2162A are different pakages of the same silicon.
While LX2160A had two revisions, LX2162A was released later based on
LX2160A revision 2.
Commit a8fe6c8dfc40 ("arm64: dts: fsl-lx2160a: add rev2 support") has
added a new soc dtsi for revision 2.
Update LX2162A Clearfog description to use revision 2 dtsi.
Fixes: 5093b190f9ce ("arm64: dts: freescale: Add support for LX2162 SoM & Clearfog Board") # no-stable
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
index 9d50d3e2761da..f95e9c19bfc75 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
@@ -6,7 +6,7 @@
/dts-v1/;
-#include "fsl-lx2160a.dtsi"
+#include "fsl-lx2160a-rev2.dtsi"
#include "fsl-lx2162a-sr-som.dtsi"
/ {
--
2.51.0
^ permalink raw reply related
* [PATCH v5 05/10] dt-bindings: arm: fsl: Add solidrun lx2160a twins board
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
The SolidRun LX2160A Twins board supports two configurations, one with
with a sinle CEX-7 module, and one with two (dual).
The dual configuration was not yet tested.
Add binding for the single variant only.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 0023cd1268075..1f11c1208c248 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1868,6 +1868,7 @@ properties:
- enum:
- solidrun,clearfog-cx
- solidrun,honeycomb
+ - solidrun,twins-single
- const: solidrun,lx2160a-cex7
- const: fsl,lx2160a
--
2.51.0
^ permalink raw reply related
* [PATCH v5 06/10] arm64: dts: lx2160a-clearfog-itx: remove redundant dts version tag
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
The dts version tag should only appear in the top level dts file.
Since the cex-7 module and clearfog-itx are shared code intended for
inclusion, drop their dts version tags.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 2 --
arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 2 --
2 files changed, 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
index 90956ffb8ea9a..56b74837ddd48 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
@@ -4,8 +4,6 @@
//
// Copyright 2019 SolidRun Ltd.
-/dts-v1/;
-
#include "fsl-lx2160a.dtsi"
/ {
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
index 580ee9b3026e3..6388bd60ffdf5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
@@ -5,8 +5,6 @@
//
// Copyright 2019 SolidRun Ltd.
-/dts-v1/;
-
#include "fsl-lx2160a-cex7.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
--
2.51.0
^ permalink raw reply related
* [PATCH v5 04/10] arm64: dts: lx2162a-clearfog: specify sfp ports led colour and function
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
The LX2162A Clearfog board has a green LED on each of four SFP ports.
Describe in device-tree that their colour is green and function "lan".
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
index 6fd85a5cac94e..99ee2b1c0f13b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include <dt-bindings/leds/common.h>
+
#include "fsl-lx2160a-rev2.dtsi"
#include "fsl-lx2162a-sr-som.dtsi"
@@ -38,6 +40,9 @@ leds {
compatible = "gpio-leds";
led_sfp_at: led-sfp-at {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <1>;
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* PROC_IRQ5 */
default-state = "off";
linux,default-trigger = "netdev";
@@ -45,6 +50,9 @@ led_sfp_at: led-sfp-at {
};
led_sfp_ab: led-sfp-ab {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; /* PROC_IRQ11 */
default-state = "off";
linux,default-trigger = "netdev";
@@ -52,6 +60,9 @@ led_sfp_ab: led-sfp-ab {
};
led_sfp_bt: led-sfp-bt {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <3>;
gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; /* EVT1_B */
default-state = "off";
linux,default-trigger = "netdev";
@@ -59,6 +70,9 @@ led_sfp_bt: led-sfp-bt {
};
led_sfp_bb: led-sfp-bb {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <4>;
gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>; /* EVT2_B */
default-state = "off";
linux,default-trigger = "netdev";
--
2.51.0
^ permalink raw reply related
* [PATCH v5 07/10] arm64: dts: lx2160a-clearfog-itx: move shared includes to dts
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
Originally includes were defined hierarchically:
- CEX-7 Module includes SoC
- Clearfog-CX & Honeycomb common parts include CEX-7 Module
- Boards include common parts
This makes it difficult to modify the includes on a per-board level,
e.g. when adding a new board based on CEX-7 module but revision 2 SoC
(which now has its own soc dtsi).
Move includes of both SoC and CEX-7 module out of common parts and into
each board dts.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi | 2 --
arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts | 2 ++
arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 1 -
arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts | 2 ++
4 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
index 56b74837ddd48..7df93bb37d13c 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dtsi
@@ -4,8 +4,6 @@
//
// Copyright 2019 SolidRun Ltd.
-#include "fsl-lx2160a.dtsi"
-
/ {
model = "SolidRun LX2160A COM Express Type 7 module";
compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a";
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
index 86a9b771428dc..802d7611c6479 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include "fsl-lx2160a.dtsi"
+#include "fsl-lx2160a-cex7.dtsi"
#include "fsl-lx2160a-clearfog-itx.dtsi"
/ {
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
index 6388bd60ffdf5..170e5b0034f19 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
@@ -5,7 +5,6 @@
//
// Copyright 2019 SolidRun Ltd.
-#include "fsl-lx2160a-cex7.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
/ {
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts
index fe19f3009ea58..2b1e13053422b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-honeycomb.dts
@@ -6,6 +6,8 @@
/dts-v1/;
+#include "fsl-lx2160a.dtsi"
+#include "fsl-lx2160a-cex7.dtsi"
#include "fsl-lx2160a-clearfog-itx.dtsi"
/ {
--
2.51.0
^ permalink raw reply related
* [PATCH v5 08/10] arm64: dts: lx2160a: add labels to thermal trip-point nodes
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
LX2160A SoC dtsi defines rather conservative thermal trip points,
alert at 85°C and critical at 95°C.
This is okay for most boards, however the SoC maximum junction
temperature is 105°C in both commercial and industrial version.
Industrial grade boards need to change the thresholds to avoid premature
thermal shutdown in high-temeprature environments.
Add labels to all thermal trip point nodes, enabling board dts to
reference them and modify properties.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 3f63fbf2485e5..e2de7e596d2b6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -499,13 +499,13 @@ ddr-ctrl5-thermal {
thermal-sensors = <&tmu 1>;
trips {
- ddr-cluster5-alert {
+ cluster5_alert: ddr-cluster5-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- ddr-cluster5-crit {
+ cluster5_crit: ddr-cluster5-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@@ -519,13 +519,13 @@ wriop-thermal {
thermal-sensors = <&tmu 2>;
trips {
- wriop-alert {
+ wriop_alert: wriop-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- wriop-crit {
+ wriop_crit: wriop-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@@ -539,13 +539,13 @@ dce-thermal {
thermal-sensors = <&tmu 3>;
trips {
- dce-qbman-alert {
+ dce_qbman_alert: dce-qbman-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- dce-qbman-crit {
+ dce_qbman_crit: dce-qbman-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@@ -559,13 +559,13 @@ ccn-thermal {
thermal-sensors = <&tmu 4>;
trips {
- ccn-dpaa-alert {
+ ccn_dpaa_alert: ccn-dpaa-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- ccn-dpaa-crit {
+ ccn_dpaa_crit: ccn-dpaa-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@@ -579,13 +579,13 @@ cluster4-thermal {
thermal-sensors = <&tmu 5>;
trips {
- clust4-hsio3-alert {
+ cluster4_alert: clust4-hsio3-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- clust4-hsio3-crit {
+ cluster4_crit: clust4-hsio3-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
@@ -599,13 +599,13 @@ cluster2-3-thermal {
thermal-sensors = <&tmu 6>;
trips {
- cluster2-3-alert {
+ cluster2_3_alert: cluster2-3-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
- cluster2-3-crit {
+ cluster2_3_crit: cluster2-3-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
--
2.51.0
^ permalink raw reply related
* [PATCH v5 10/10] arm64: dts: Add support for LX2160 Twins board in single configuration
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
Add support for the SolidRun LX2160A Twins board in its single cpu
configuration.
The twins board is designed to host a pair of LX2160A CEX-7 modules,
sharing a single PCI-E connector in multi-host mode.
It may be assembled in two configurations (different assembly options
facilitating signal re-routing), with a single or with dual CEX-7
module. Their marketing names are:
- SolidWAN Single LX2160
- SolidWAN Dual LX2160
This patch adds the single configuration, featuring:
- 8x SFP (1Gbps)
- 8x SFP+ (1/10Gbps)
- PCI-E OCP card connector
- USB-3.0 front-panel header with single port
- microSD
- dual hot-swappable power supplies
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 2 +
.../boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts | 2 +-
.../boot/dts/freescale/fsl-lx2160a-half-twins.dts | 822 +++++++++++++++++++++
3 files changed, 825 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 711e36cc2c990..59eee431562ef 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -51,6 +51,8 @@ DTC_FLAGS_fsl-lx2160a-bluebox3-rev-a := -Wno-interrupt_map
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-bluebox3-rev-a.dtb
DTC_FLAGS_fsl-lx2160a-clearfog-cx := -Wno-interrupt_map
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-clearfog-cx.dtb
+DTC_FLAGS_fsl-lx2160a-half-twins := -Wno-interrupt_map
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-half-twins.dtb
DTC_FLAGS_fsl-lx2160a-honeycomb := -Wno-interrupt_map
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-honeycomb.dtb
DTC_FLAGS_fsl-lx2160a-qds := -Wno-interrupt_map
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
index 802d7611c6479..6078ce47fabf1 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-cx.dts
@@ -6,7 +6,7 @@
/dts-v1/;
-#include "fsl-lx2160a.dtsi"
+#include "fsl-lx2160a-rev2.dtsi"
#include "fsl-lx2160a-cex7.dtsi"
#include "fsl-lx2160a-clearfog-itx.dtsi"
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-half-twins.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-half-twins.dts
new file mode 100644
index 0000000000000..434b3f4873008
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-half-twins.dts
@@ -0,0 +1,822 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for single LX2160A CEX-7 on Twins board.
+//
+// Copyright 2022 SolidRun Ltd.
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+
+#include "fsl-lx2160a-rev2.dtsi"
+#include "fsl-lx2160a-cex7.dtsi"
+
+/ {
+ compatible = "solidrun,twins-single", "solidrun,lx2160a-cex7", "fsl,lx2160a";
+ model = "SolidRun LX2160A SolidWAN Single";
+
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &expander0;
+ gpio5 = &expander1;
+ gpio6 = &expander2;
+ gpio7 = &expander3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c2;
+ i2c2 = &i2c4;
+ i2c3 = &fan_i2c;
+ i2c4 = &power_i2c;
+ i2c5 = &i2c_smb;
+ i2c6 = &sfp0_i2c;
+ i2c7 = &sfp1_i2c;
+ i2c8 = &sfp2_i2c;
+ i2c9 = &sfp3_i2c;
+ i2c10 = &twins_sfp_c1_at_i2c;
+ i2c11 = &twins_sfp_c1_ab_i2c;
+ i2c12 = &twins_sfp_c1_bt_i2c;
+ i2c13 = &twins_sfp_c1_bb_i2c;
+ i2c14 = &twins_sfp_c2_at_i2c;
+ i2c15 = &twins_sfp_c2_ab_i2c;
+ i2c16 = &twins_sfp_c2_bt_i2c;
+ i2c17 = &twins_sfp_c2_bb_i2c;
+ i2c18 = &twins_sfp_c3_at_i2c;
+ i2c19 = &twins_sfp_c3_ab_i2c;
+ i2c20 = &twins_sfp_c3_bt_i2c;
+ i2c21 = &twins_sfp_c3_bb_i2c;
+ i2c22 = &htwins_sfp_c3_at_i2c;
+ i2c23 = &htwins_sfp_c3_ab_i2c;
+ i2c24 = &htwins_sfp_c3_bt_i2c;
+ i2c25 = &htwins_sfp_c3_bb_i2c;
+ i2c26 = &ddr_i2c;
+ mmc0 = &esdhc0;
+ mmc1 = &esdhc1;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_ht_c3_bt: led-sfp-1 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <1>;
+ gpios = <&expander3 14 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac5>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_ht_c3_bb: led-sfp-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
+ gpios = <&expander3 13 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac15>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_ht_c3_at: led-sfp-3 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <2>;
+ gpios = <&expander3 11 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac6>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_ht_c3_ab: led-sfp-4 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <4>;
+ gpios = <&expander3 12 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac11>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c1_bt: led-sfp-9 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <9>;
+ gpios = <&expander1 4 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac4>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c1_bb: led-sfp-10 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <10>;
+ gpios = <&expander1 3 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac17>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c1_at: led-sfp-11 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <11>;
+ gpios = <&expander1 1 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac3>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c1_ab: led-sfp-12 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <12>;
+ gpios = <&expander1 2 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac12>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c2_bt: led-sfp-13 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <13>;
+ gpios = <&expander1 10 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac8>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c2_bb: led-sfp-14 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <14>;
+ gpios = <&expander1 9 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac16>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c2_at: led-sfp-15 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <15>;
+ gpios = <&expander1 5 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac7>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c2_ab: led-sfp-16 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <16>;
+ gpios = <&expander1 6 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac18>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c3_bt: led-sfp-17 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <17>;
+ gpios = <&expander1 14 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac10>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c3_bb: led-sfp-18 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <18>;
+ gpios = <&expander1 13 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac14>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c3_at: led-sfp-19 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <19>;
+ gpios = <&expander1 11 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac9>;
+ linux,default-trigger = "netdev";
+ };
+
+ led_c3_ab: led-sfp-20 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ function-enumerator = <20>;
+ gpios = <&expander1 12 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&dpmac13>;
+ linux,default-trigger = "netdev";
+ };
+
+ led-status {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_STATUS;
+ function-enumerator = <0>;
+ gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-status-twin {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_STATUS;
+ function-enumerator = <1>;
+ gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+ };
+
+ led-fault {
+ color = <LED_COLOR_ID_YELLOW>;
+ default-state = "off";
+ function = LED_FUNCTION_FAULT;
+ function-enumerator = <0>;
+ gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
+ panic-indicator;
+ };
+
+ led-fault-twin {
+ color = <LED_COLOR_ID_YELLOW>;
+ default-state = "off";
+ function = LED_FUNCTION_FAULT;
+ function-enumerator = <1>;
+ gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ mux-controller {
+ compatible = "gpio-mux";
+ #mux-control-cells = <0>;
+ /*
+ * This gpio controlled mux can route the tacho signals of 6 PWM FAN connectors
+ * to the tacho inputs of both CEX-7 modules (twins).
+ *
+ * The first twin controls this mux and monitors four fan connectors, two intended
+ * for itself, and two for the OCP card.
+ *
+ * The second twin monitors only two fan connectors intended for itself.
+ *
+ * The table below maps selector GPIO states to monitored fan connector per twin:
+ *
+ * | SEL1 | SEL0 | Twin 1 | Twin 2 |
+ * | ---: | ---: | :------| ------ |
+ * | 0 | 0 | J10 | J5024 |
+ * | 0 | 1 | J5016 | J5024 |
+ * | 1 | 0 | J5026 | J5025 |
+ * | 1 | 1 | J5013 | J5025 |
+ */
+ mux-gpios = <&expander0 8 GPIO_ACTIVE_HIGH>, /* SEL0 */
+ <&expander0 15 GPIO_ACTIVE_HIGH>; /* SEL1 */
+ };
+
+ ht_c3_bt_sfp: sfp-1 {
+ compatible = "sff,sfp";
+ i2c-bus = <&htwins_sfp_c3_bt_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander2 13 GPIO_ACTIVE_LOW>;
+ };
+
+ ht_c3_bb_sfp: sfp-2 {
+ compatible = "sff,sfp";
+ i2c-bus = <&htwins_sfp_c3_bb_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander2 14 GPIO_ACTIVE_LOW>;
+ };
+
+ ht_c3_at_sfp: sfp-3 {
+ compatible = "sff,sfp";
+ i2c-bus = <&htwins_sfp_c3_at_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander2 11 GPIO_ACTIVE_LOW>;
+ };
+
+ ht_c3_ab_sfp: sfp-4 {
+ compatible = "sff,sfp";
+ i2c-bus = <&htwins_sfp_c3_ab_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander2 12 GPIO_ACTIVE_LOW>;
+ };
+
+ c1_bt_sfp: sfp-9 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c1_bt_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ c1_bb_sfp: sfp-10 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c1_bb_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 4 GPIO_ACTIVE_LOW>;
+ };
+
+ c1_at_sfp: sfp-11 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c1_at_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
+ };
+
+ c1_ab_sfp: sfp-12 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c1_ab_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ c2_bt_sfp: sfp-13 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c2_bt_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 9 GPIO_ACTIVE_LOW>;
+ };
+
+ c2_bb_sfp: sfp-14 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c2_bb_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 10 GPIO_ACTIVE_LOW>;
+ };
+
+ c2_at_sfp: sfp-15 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c2_at_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
+ };
+
+ c2_ab_sfp: sfp-16 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c2_ab_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 6 GPIO_ACTIVE_LOW>;
+ };
+
+ c3_bt_sfp: sfp-17 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c3_bt_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 13 GPIO_ACTIVE_LOW>;
+ };
+
+ c3_bb_sfp: sfp-18 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c3_bb_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ c3_at_sfp: sfp-19 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c3_at_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 11 GPIO_ACTIVE_LOW>;
+ };
+
+ c3_ab_sfp: sfp-20 {
+ compatible = "sff,sfp";
+ i2c-bus = <&twins_sfp_c3_ab_i2c>;
+ maximum-power-milliwatt = <2000>;
+ mod-def0-gpios = <&expander0 12 GPIO_ACTIVE_LOW>;
+ };
+};
+
+/*
+ * This board supports industrial grade temperatures,
+ * the LX2160A SoC maximum junction temperature is 105°C.
+ *
+ * Raise thermal thresholds to allow operation near maximum temperature.
+ */
+&ccn_dpaa_alert {
+ temperature = <100000>;
+};
+
+&ccn_dpaa_crit {
+ temperature = <105000>;
+};
+
+&cluster2_3_alert {
+ temperature = <100000>;
+};
+
+&cluster2_3_crit {
+ temperature = <105000>;
+};
+
+&cluster4_alert {
+ temperature = <100000>;
+};
+
+&cluster4_crit {
+ temperature = <105000>;
+};
+
+&cluster5_alert {
+ temperature = <100000>;
+};
+
+&cluster5_crit {
+ temperature = <105000>;
+};
+
+&cluster6_7_alert {
+ temperature = <100000>;
+};
+
+&cluster6_7_crit {
+ temperature = <105000>;
+};
+
+&dce_qbman_alert {
+ temperature = <100000>;
+};
+
+&dce_qbman_crit {
+ temperature = <105000>;
+};
+
+/* sfp port 11 */
+&dpmac3 {
+ managed = "in-band-status";
+ phys = <&serdes_1 7>;
+ sfp = <&c1_at_sfp>;
+};
+
+/* sfp port 9 */
+&dpmac4 {
+ managed = "in-band-status";
+ phys = <&serdes_1 6>;
+ sfp = <&c1_bt_sfp>;
+};
+
+/* sfp port 1 */
+&dpmac5 {
+ managed = "in-band-status";
+ phys = <&serdes_1 5>;
+ sfp = <&ht_c3_bt_sfp>;
+};
+
+/* sfp port 3 */
+&dpmac6 {
+ managed = "in-band-status";
+ phys = <&serdes_1 4>;
+ sfp = <&ht_c3_at_sfp>;
+};
+
+/* sfp port 15 */
+&dpmac7 {
+ managed = "in-band-status";
+ phys = <&serdes_1 3>;
+ sfp = <&c2_at_sfp>;
+};
+
+/* sfp port 13 */
+&dpmac8 {
+ managed = "in-band-status";
+ phys = <&serdes_1 2>;
+ sfp = <&c2_bt_sfp>;
+};
+
+/* sfp port 19 */
+&dpmac9 {
+ managed = "in-band-status";
+ phys = <&serdes_1 1>;
+ sfp = <&c3_at_sfp>;
+};
+
+/* sfp port 17 */
+&dpmac10 {
+ managed = "in-band-status";
+ phys = <&serdes_1 0>;
+ sfp = <&c3_bt_sfp>;
+};
+
+/* sfp port 4 */
+&dpmac11 {
+ managed = "in-band-status";
+ phys = <&serdes_2 0>;
+ sfp = <&ht_c3_ab_sfp>;
+};
+
+/* sfp port 12 */
+&dpmac12 {
+ managed = "in-band-status";
+ phys = <&serdes_2 1>;
+ sfp = <&c1_ab_sfp>;
+};
+
+/* sfp port 20 */
+&dpmac13 {
+ managed = "in-band-status";
+ phys = <&serdes_2 6>;
+ sfp = <&c3_ab_sfp>;
+};
+
+/* sfp port 18 */
+&dpmac14 {
+ managed = "in-band-status";
+ phys = <&serdes_2 7>;
+ sfp = <&c3_bb_sfp>;
+};
+
+/* sfp port 2 */
+&dpmac15 {
+ managed = "in-band-status";
+ phys = <&serdes_2 4>;
+ sfp = <&ht_c3_bb_sfp>;
+};
+
+/* sfp port 14 */
+&dpmac16 {
+ managed = "in-band-status";
+ phys = <&serdes_2 5>;
+ sfp = <&c2_bb_sfp>;
+};
+
+/* sfp port 10 */
+&dpmac17 {
+ /* override connection to on-COM phy */
+ /delete-property/ phy-handle;
+ /delete-property/ phy-connection-type;
+ managed = "in-band-status";
+ phys = <&serdes_2 2>;
+ sfp = <&c1_bb_sfp>;
+};
+
+/* sfp port 16 */
+&dpmac18 {
+ managed = "in-band-status";
+ phys = <&serdes_2 3>;
+ sfp = <&c2_ab_sfp>;
+};
+
+&esdhc0 {
+ pinctrl-0 = <&esdhc0_cd_wp_pins>, <&esdhc0_cmd_data30_clk_vsel_pins>;
+ pinctrl-names = "default";
+ /*
+ * Disable 1.8V modes so that microsd state is same between
+ * power-on-reset, u-boot and linux.
+ * This avoids sporadic read errors after hard reset with some cards.
+ */
+ no-1-8-v;
+ status = "okay";
+};
+
+&i2c2 {
+ expander0: gpio@20 {
+ compatible = "nxp,pca9555";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander1: gpio@21 {
+ compatible = "nxp,pca9555";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander2: gpio@24 {
+ compatible = "nxp,pca9555";
+ reg = <0x24>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander3: gpio@25 {
+ compatible = "nxp,pca9555";
+ reg = <0x25>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ /* Half twins configuration; take over c3 from the other twin side */
+ i2c-mux@73 {
+ compatible = "nxp,pca9547";
+ reg = <0x73>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ htwins_sfp_c3_at_i2c: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ htwins_sfp_c3_ab_i2c: i2c@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ htwins_sfp_c3_bt_i2c: i2c@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ htwins_sfp_c3_bb_i2c: i2c@6 {
+ reg = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2c-mux@76 {
+ compatible = "nxp,pca9547";
+ reg = <0x76>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ twins_sfp_c1_at_i2c: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c1_ab_i2c: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c1_bt_i2c: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c1_bb_i2c: i2c@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c2_at_i2c: i2c@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c2_ab_i2c: i2c@6 {
+ reg = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ twins_sfp_c2_bt_i2c: i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c2_bb_i2c: i2c@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c3_at_i2c: i2c@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c3_ab_i2c: i2c@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c3_bt_i2c: i2c@5 {
+ reg = <5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ twins_sfp_c3_bb_i2c: i2c@6 {
+ reg = <6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+};
+
+&pcs_mdio3 {
+ status = "okay";
+};
+
+&pcs_mdio4 {
+ status = "okay";
+};
+
+&pcs_mdio5 {
+ status = "okay";
+};
+
+&pcs_mdio6 {
+ status = "okay";
+};
+
+&pcs_mdio7 {
+ status = "okay";
+};
+
+&pcs_mdio8 {
+ status = "okay";
+};
+
+&pcs_mdio9 {
+ status = "okay";
+};
+
+&pcs_mdio10 {
+ status = "okay";
+};
+
+&pcs_mdio11 {
+ status = "okay";
+};
+
+&pcs_mdio12 {
+ status = "okay";
+};
+
+&pcs_mdio13 {
+ status = "okay";
+};
+
+&pcs_mdio14 {
+ status = "okay";
+};
+
+&pcs_mdio15 {
+ status = "okay";
+};
+
+&pcs_mdio16 {
+ status = "okay";
+};
+
+&pcs_mdio17 {
+ status = "okay";
+};
+
+&pcs_mdio18 {
+ status = "okay";
+};
+
+&rgmii_phy1 {
+ /*
+ * COM has a phy at address 1 connected to SoC Ethernet Controller 1.
+ * It competes for WRIOP MAC17, and no connector has been wired.
+ */
+ status = "disabled";
+};
+
+&serdes_2 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&wriop_alert {
+ temperature = <100000>;
+};
+
+&wriop_crit {
+ temperature = <105000>;
+};
--
2.51.0
^ permalink raw reply related
* [PATCH v5 03/10] arm64: dts: lx2162a-clearfog: cleanup superfluous status properties
From: Josua Mayer @ 2026-05-10 15:12 UTC (permalink / raw)
To: Shawn Guo, Li Yang, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Rob Herring, Krzysztof Kozlowski, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: Yazan Shhady, Jon Nettleton, linux-arm-kernel, devicetree,
linux-kernel, imx, Josua Mayer
In-Reply-To: <20260510-lx2160-pci-v5-0-540b83852227@solid-run.com>
The SoC dtsi has always enabled serdes block 1, enabled dpmac and
disabled pcie nodes.
Drop the superfluous status properties on these nodes.
Further drop crypto alias as SoM dtsi already set it.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
.../boot/dts/freescale/fsl-lx2162a-clearfog.dts | 21 ---------------------
1 file changed, 21 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
index f95e9c19bfc75..6fd85a5cac94e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-clearfog.dts
@@ -14,7 +14,6 @@ / {
compatible = "solidrun,lx2162a-clearfog", "solidrun,lx2162a-som", "fsl,lx2160a";
aliases {
- crypto = &crypto;
i2c0 = &i2c0;
i2c1 = &i2c2;
i2c2 = &i2c4;
@@ -124,42 +123,36 @@ &dpmac11 {
phys = <&serdes_2 0>;
phy-handle = <ðernet_phy3>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac12 {
phys = <&serdes_2 1>;
phy-handle = <ðernet_phy1>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac13 {
phys = <&serdes_2 6>;
phy-handle = <ðernet_phy6>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac14 {
phys = <&serdes_2 7>;
phy-handle = <ðernet_phy8>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac15 {
phys = <&serdes_2 4>;
phy-handle = <ðernet_phy4>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac16 {
phys = <&serdes_2 5>;
phy-handle = <ðernet_phy2>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac17 {
@@ -170,14 +163,12 @@ &dpmac17 {
phys = <&serdes_2 2>;
phy-handle = <ðernet_phy5>;
phy-connection-type = "sgmii";
- status = "okay";
};
&dpmac18 {
phys = <&serdes_2 3>;
phy-handle = <ðernet_phy7>;
phy-connection-type = "sgmii";
- status = "okay";
};
&emdio1 {
@@ -314,14 +305,6 @@ pcieclk_i2c: i2c@2 {
};
};
-&pcie3 {
- status = "disabled";
-};
-
-&pcie4 {
- status = "disabled";
-};
-
&pcs_mdio3 {
status = "okay";
};
@@ -370,10 +353,6 @@ &pcs_mdio18 {
status = "okay";
};
-&serdes_1 {
- status = "okay";
-};
-
&serdes_2 {
status = "okay";
};
--
2.51.0
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