* [PATCH v4 1/3] dt-bindings: PCI: imx6q-pcie: Add intr, aer and pme interrupts
From: Richard Zhu @ 2026-05-13 2:50 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, bhelgaas, frank.li, l.stach, lpieralisi,
kwilczynski, mani, s.hauer, kernel, festevam
Cc: linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel,
Richard Zhu, Frank Li
In-Reply-To: <20260513025101.1498104-1-hongxing.zhu@nxp.com>
Add optional interrupt entries to the i.MX6Q PCIe binding to support
event-based interrupt handling:
- intr: General controller events and link state changes
- aer: Advanced Error Reporting events
- pme: Power Management Events
These interrupts enable proper handling of AER, PME, and other
controller-specific events when supported by the hardware.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 9d1349855b42..cf709132ff1e 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -58,12 +58,18 @@ properties:
items:
- description: builtin MSI controller.
- description: builtin DMA controller.
+ - description: PCIe event interrupt.
+ - description: builtin AER SPI standalone interrupt line.
+ - description: builtin PME SPI standalone interrupt line.
interrupt-names:
minItems: 1
items:
- const: msi
- const: dma
+ - const: intr
+ - const: aer
+ - const: pme
reset-gpio:
description: Should specify the GPIO for controlling the PCI bus device
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
prerequisite-patch-id: b47e314ffa7c4d406797ecd88b943068a814fb9e
prerequisite-patch-id: af0a125aaa64bd3f6fcf55825d967ad6c4339716
prerequisite-patch-id: 6f434b1e2c82ec8da9b502c4287171babc53dcaf
prerequisite-patch-id: 9c6e0e10a650652f14a346a9f0ff824d53c530d1
prerequisite-patch-id: 0bddec7b62daafe2877ca92766d8b35e8c41dfe1
prerequisite-patch-id: 277480331fcb80aeee5848afa1eee4532c4a1646
prerequisite-patch-id: 9ce151e05ca8ff8e66e3b2ef37114c89dae9dbea
--
2.37.1
^ permalink raw reply related
* [PATCH v4 0/3] Add root port reset to support link recovery
From: Richard Zhu @ 2026-05-13 2:50 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, bhelgaas, frank.li, l.stach, lpieralisi,
kwilczynski, mani, s.hauer, kernel, festevam
Cc: linux-pci, linux-arm-kernel, devicetree, imx, linux-kernel
Based on the following patch-set[1] issued by Mani.
Add support for resetting the Root Port for i.MX PCIe to enable link recovery.
[1] [v7,0/4] PCI: Add support for resetting the Root Ports in a platform specific way
PCIe links can go down due to various unexpected circumstances. This patch series
adds root port reset support for link recovery on i.MX PCIe controllers when the
optional "intr" interrupt is present.
When a link down event is detected, the root port reset uninitializes and
reinitializes the PCIe controller, then restarts the PCIe link.
On i.MX95 platforms, link events and PME share the same interrupt line.
Link event interrupts cannot use only an IRQ thread handler because the PME
driver uses request_irq() to bind the PME interrupt directly with only the
IRQF_SHARED flag set.
To address this, we register one handler with IRQF_SHARED for link event
interrupts and manipulate the enable bits of link events to ensure the same
interrupt source is triggered only once at a time.
Additionally, this series adds 'intr', 'aer', and 'pme' interrupt entries to
the i.MX6Q PCIe binding to support PCIe event-based interrupts for general
controller events, Advanced Error Reporting, and Power Management Events
respectively.
Changes in v4:
- Set these new added three interrupts as optional interrupt.
Changes in v3:
- Don't add a new if:block; Drop the maxItems constraint of the interrupts
property for i.MX95 PCIe.
- Add constraints for the interrupts property for other variants.
- Regarding the ABI break: add descriptions explaining why these new
interrupts are mandatory and required by i.MX95 PCIe.
Changes in v2:
- Constrain the new added three interrupt entries to be valid only for the
i.MX95 variant using conditional schemas
[PATCH v4 1/3] dt-bindings: PCI: imx6q-pcie: Add intr, aer and pme
[PATCH v4 2/3] arm64: dts: imx95: Add dma, intr, aer and pme
[PATCH v4 3/3] PCI: imx6: Add root port reset to support link
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 +++++
arch/arm64/boot/dts/freescale/imx95.dtsi | 16 +++++++++---
drivers/pci/controller/dwc/pci-imx6.c | 123 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 141 insertions(+), 4 deletions(-)
^ permalink raw reply
* [PATCH] wifi: mt76: mt7921: fix uninitialized variable warning
From: Hongling Zeng @ 2026-05-13 2:14 UTC (permalink / raw)
To: nbd, lorenzo, ryder.lee, shayne.chen, sean.wang, matthias.bgg,
angelogioacchino.delregno, xiong.huang, madhurkumar004
Cc: linux-wireless, linux-kernel, linux-arm-kernel, linux-mediatek,
zhongling0719, Hongling Zeng, kernel test robot
Move the initialization of 'dev' before the error path that uses it.
This fixes the compiler warning:
drivers/net/wireless/mediatek/mt76/mt7921/pci.c:347:6: warning:
variable 'dev' is used uninitialized whenever 'if' condition is true
Fixes: 0d56655a74ef ("wifi: mt76: mt7921: fix resource leak in probe error path")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202605130432.S8Ozipm2-lkp@intel.com/
Signed-off-by: Hongling Zeng <zenghongling@kylinos.cn>
---
drivers/net/wireless/mediatek/mt76/mt7921/pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
index 4bb436465a3d..49a37185f056 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c
@@ -343,13 +343,14 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
pci_set_drvdata(pdev, mdev);
+ dev = container_of(mdev, struct mt792x_dev, mt76);
+
regs = pcim_iomap_region(pdev, 0, pci_name(pdev));
if (IS_ERR(regs)) {
ret = PTR_ERR(regs);
goto err_free_dev;
}
- dev = container_of(mdev, struct mt792x_dev, mt76);
dev->fw_features = features;
dev->hif_ops = &mt7921_pcie_ops;
dev->irq_map = &irq_map;
--
2.25.1
^ permalink raw reply related
* RE: (subset) [PATCH V14 00/12] pci-imx6: Add support for parsing the reset property in new Root Port binding
From: Sherry Sun @ 2026-05-13 2:01 UTC (permalink / raw)
To: Frank Li, Manivannan Sadhasivam, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, Frank Li,
s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com,
lpieralisi@kernel.org, kwilczynski@kernel.org,
bhelgaas@google.com, Hongxing Zhu, l.stach@pengutronix.de
Cc: imx@lists.linux.dev, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <177859052375.25787.11297345759999790209.b4-ty@b4>
> Subject: Re: (subset) [PATCH V14 00/12] pci-imx6: Add support for parsing the
> reset property in new Root Port binding
>
>
> On Wed, 22 Apr 2026 17:35:37 +0800, Sherry Sun wrote:
> > This patch set adds support for parsing the reset property in new Root
> > Port binding in pci-imx6 driver, similar to the implementation in the
> > qcom pcie driver[1].
> >
> > Also introduce generic helper functions to parse Root Port device tree
> > nodes and extract common properties like reset GPIOs. This allows
> > multiple PCI host controller drivers to share the same parsing logic.
> >
> > [...]
>
> Applied, thanks!
>
> [01/12] dt-bindings: PCI: fsl,imx6q-pcie: Add reset GPIO in Root Port node
> commit: 556c5f7aa06d3e8119d35f40b6602d3a547cef9e
> [02/12] PCI: host-generic: Add common helpers for parsing Root Port
> properties
> commit: 6cfd1e2fae1bbaa9258794ba9f3128afb752245c
> [03/12] PCI: imx6: Assert PERST# before enabling regulators
> commit: 97eacf72d1754eeff8624114074929606fc3f2bb
> [04/12] PCI: imx6: Add support for parsing the reset property in new Root
> Port binding
> commit: 40b7f61a1a4d7fd18188f3f87e15ff5a90ce1d31
>
Hi Frank,
Can you please help pick the remaining imx dts patches, thanks!
Best Regards
Sherry
^ permalink raw reply
* [PATCH] coresight: fix resource leaks on path build failure
From: Jie Gan @ 2026-05-13 1:32 UTC (permalink / raw)
To: Suzuki K Poulose, Mike Leach, James Clark, Leo Yan,
Alexander Shishkin, Mathieu Poirier, Tingwei Zhang,
Greg Kroah-Hartman
Cc: coresight, linux-arm-kernel, linux-kernel, Jie Gan
Two related leaks when _coresight_build_path() encounters an error after
coresight_grab_device() has already incremented the pm_runtime, module,
and device references for a node:
1. In _coresight_build_path(), if kzalloc_obj() for the path node fails
after coresight_grab_device() succeeds, coresight_drop_device() was
never called, permanently leaking all three references.
2. In coresight_build_path(), on failure the partial path was freed with
kfree(path) instead of coresight_release_path(path). kfree() only
frees the coresight_path struct itself; it does not iterate path_list
to call coresight_drop_device() and kfree() for each coresight_node
already added by deeper recursive calls, leaking both the pm_runtime,
module, and device references and the node memory for every element
on the partial path.
Fix both by adding coresight_drop_device() in the OOM unwind of
_coresight_build_path(), and replacing kfree(path) with
coresight_release_path(path) in coresight_build_path().
Fixes: 32b0707a4182 ("coresight: Add try_get_module() in coresight_grab_device()")
Fixes: b3e94405941e ("coresight: associating path with session rather than tracer")
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
drivers/hwtracing/coresight/coresight-core.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index 46f247f73cf6..c1354ea8e11d 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -825,8 +825,10 @@ static int _coresight_build_path(struct coresight_device *csdev,
return ret;
node = kzalloc_obj(struct coresight_node);
- if (!node)
+ if (!node) {
+ coresight_drop_device(csdev);
return -ENOMEM;
+ }
node->csdev = csdev;
list_add(&node->link, &path->path_list);
@@ -851,7 +853,7 @@ struct coresight_path *coresight_build_path(struct coresight_device *source,
rc = _coresight_build_path(source, source, sink, path);
if (rc) {
- kfree(path);
+ coresight_release_path(path);
return ERR_PTR(rc);
}
---
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
change-id: 20260513-fix-memory-leak-issue-034b4a45265e
Best regards,
--
Jie Gan <jie.gan@oss.qualcomm.com>
^ permalink raw reply related
* Re: [PATCH v8 0/2] arm64/sve: Performance improvements with SVE state saving
From: Mark Brown @ 2026-05-13 1:18 UTC (permalink / raw)
To: Will Deacon
Cc: Catalin Marinas, Mark Rutland, Ryan Roberts, linux-arm-kernel,
linux-kernel
In-Reply-To: <agM03CN6cX2JNu62@willie-the-truck>
[-- Attachment #1: Type: text/plain, Size: 1464 bytes --]
On Tue, May 12, 2026 at 03:10:36PM +0100, Will Deacon wrote:
> On Fri, Mar 20, 2026 at 03:44:13PM +0000, Mark Brown wrote:
> > The two patches here move to using a time based heuristic to decide when
> > to reenable the SVE access trap, doing so after a second. This means
> > that tasks actively using SVE which block in syscalls should see reduced
> > or similar numbers of access traps, while CPU bound tasks that rarely
> > use SVE will see the SVE syscall overhead removed after running for
> > approximately a second, confirmed via fp-pidbench.
> Have you looked at all at applying this heuristic to SME? I wonder if it
> would help with the recent DVMSync erratum workaround, where tasks that
> use SME once/infrequently end up causing IPIs for TLB invalidation every
> time they run on an effected core.
I have not done so myself, though I did discuss this with Catalin while
he was working on those workarounds. IIRC he wanted to get a better
picture of the system level costs with actual usage before deciding if
it was a good tradeoff, either to do this at all or to see if we can
skip the timeout based approach or could just reenable SME traps
whenever we see SME is not in use.
With SME it's easier because you can directly tell if the task currently
has SME enabled so I'd expect the checks on state load are enough and we
don't need to put anything into the syscall path, it's likely that the
tradeoffs for doing that don't work out so well.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* [PATCH] arm64: mm: fix accidental linear mapping of no-map reserved memory
From: liulhong617 @ 2026-05-13 1:02 UTC (permalink / raw)
To: catalin.marinas, will; +Cc: linux-arm-kernel, linux-kernel, liulhong617
From: liulhong617 <liulhong617@gmail.com>
When reserved-memory regions with the "no-map" property are not
page-aligned, the kernel may accidentally map them into the linear
mapping, contradicting the no-map semantics.
The root cause is a mismatch between /proc/iomem's address boundaries
and the actual page table mapping boundaries:
1. /proc/iomem derives its ranges from memblock via
memblock_region_reserved_base_pfn/memblock_region_reserved_end_pfn,
which perform PFN rounding so the displayed boundaries are
page-aligned. This gives the impression that the no-map region
occupies whole pages.
2. However, memblock_mark_nomap() splits memblock.memory regions at
exact byte boundaries (memblock_isolate_range preserves raw DT
base/size with no alignment). When for_each_mem_range iterates the
non-NOMAP regions adjacent to a no-map region, it returns start/end
values that are NOT page-aligned — they are the precise byte
boundaries from the memblock split.
3. These sub-page-aligned values are passed to
__create_pgd_mapping_locked(), which does:
phys &= PAGE_MASK;
addr = virt & PAGE_MASK;
end = PAGE_ALIGN(virt + size);
The downward rounding of phys via PAGE_MASK extends the mapped
range backward into the adjacent no-map region, effectively
including no-map memory in the linear mapping.
For example, with 64K pages, reserved_region@A2000000 (base=0xA2000000,
size=0x8000, no-map) causes for_each_mem_range to return
start=0xA2008000 for the next mappable region. After phys &= PAGE_MASK,
the actual mapping starts at 0xA2000000 — the entire no-map region is
incorrectly mapped.
Fix this by rounding the mappable range inward to PAGE_SIZE boundaries
before passing it to __map_memblock: start is rounded UP and end is
rounded DOWN. This ensures the mapped area never overlaps with adjacent
no-map regions. The cost is at most one page of unmapped gap at each
boundary, which is preferable to violating no-map semantics.
Signed-off-by: liulhong617 <liulhong617@gmail.com>
---
arch/arm64/mm/mmu.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index dd85e093f..bc8ac7622 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -1175,6 +1175,20 @@ static void __init map_mem(pgd_t *pgdp)
for_each_mem_range(i, &start, &end) {
if (start >= end)
break;
+ /*
+ * for_each_mem_range may return sub-page-aligned boundaries
+ * after memblock_mark_nomap() splits regions at byte precision.
+ * __create_pgd_mapping_locked aligns phys down to PAGE_MASK,
+ * which could accidentally map no-map memory on the boundary.
+ * Round the mappable range inward: start UP, end DOWN, so
+ * that the mapped area never overlaps with adjacent no-map
+ * regions. The cost is at most one page of unmapped gap at
+ * each boundary.
+ */
+ start = PAGE_ALIGN(start);
+ end = end & PAGE_MASK;
+ if (start >= end)
+ continue;
/*
* The linear map must allow allocation tags reading/writing
* if MTE is present. Otherwise, it has the same attributes as
--
2.34.1
^ permalink raw reply related
* [PATCH v4 3/3] iio: adc: xilinx-ams: refactor alarm mapping to table-driven approach
From: Guilherme Ivo Bozi @ 2026-05-13 0:31 UTC (permalink / raw)
To: anand.ashok.dumbre, andy, conall.ogriofa, dlechner, jic23,
manish.narani, michal.simek, nuno.sa, salih.erim
Cc: Guilherme Ivo Bozi, Jonathan.Cameron, linux-arm-kernel, linux-iio
In-Reply-To: <20260513003503.339418-1-guilherme.bozi@usp.br>
Replace multiple open-coded switch statements that map between
scan_index, alarm bits, and register offsets with a centralized
table-driven approach.
Introduce a struct-based alarm_map to describe the relationship
between scan indices and alarm offsets, and add a helper to
translate scan_index to event IDs. This removes duplicated logic
across ams_get_alarm_offset(), ams_event_to_channel(), and
ams_get_alarm_mask().
The new approach improves maintainability, reduces code size,
and makes it easier to extend or modify alarm mappings in the
future, while preserving existing behavior.
Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br>
---
drivers/iio/adc/xilinx-ams.c | 161 +++++++++++++----------------------
1 file changed, 58 insertions(+), 103 deletions(-)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 70a1f97f6dad..d38c4401dfce 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -102,6 +102,7 @@
#define AMS_PS_SEQ_MASK GENMASK(21, 0)
#define AMS_PL_SEQ_MASK GENMASK_ULL(59, 22)
+#define AMS_ALARM_NONE 0x000 /* not a real offset */
#define AMS_ALARM_TEMP 0x140
#define AMS_ALARM_SUPPLY1 0x144
#define AMS_ALARM_SUPPLY2 0x148
@@ -763,9 +764,49 @@ static int ams_read_raw(struct iio_dev *indio_dev,
}
}
+struct ams_alarm_map {
+ enum ams_ps_pl_seq scan_index;
+ unsigned int base_offset;
+};
+
+/*
+ * Array index matches enum ams_alarm_bit.
+ * Entries with base_offset == AMS_ALARM_NONE are unused/invalid
+ * (e.g. RESERVED) and must be skipped.
+ */
+static const struct ams_alarm_map alarm_map[] = {
+ [AMS_ALARM_BIT_TEMP] = { AMS_SEQ_TEMP, AMS_ALARM_TEMP },
+ [AMS_ALARM_BIT_SUPPLY1] = { AMS_SEQ_SUPPLY1, AMS_ALARM_SUPPLY1 },
+ [AMS_ALARM_BIT_SUPPLY2] = { AMS_SEQ_SUPPLY2, AMS_ALARM_SUPPLY2 },
+ [AMS_ALARM_BIT_SUPPLY3] = { AMS_SEQ_SUPPLY3, AMS_ALARM_SUPPLY3 },
+ [AMS_ALARM_BIT_SUPPLY4] = { AMS_SEQ_SUPPLY4, AMS_ALARM_SUPPLY4 },
+ [AMS_ALARM_BIT_SUPPLY5] = { AMS_SEQ_SUPPLY5, AMS_ALARM_SUPPLY5 },
+ [AMS_ALARM_BIT_SUPPLY6] = { AMS_SEQ_SUPPLY6, AMS_ALARM_SUPPLY6 },
+ [AMS_ALARM_BIT_RESERVED] = { 0, AMS_ALARM_NONE },
+ [AMS_ALARM_BIT_SUPPLY7] = { AMS_SEQ_SUPPLY7, AMS_ALARM_SUPPLY7 },
+ [AMS_ALARM_BIT_SUPPLY8] = { AMS_SEQ_SUPPLY8, AMS_ALARM_SUPPLY8 },
+ [AMS_ALARM_BIT_SUPPLY9] = { AMS_SEQ_SUPPLY9, AMS_ALARM_SUPPLY9 },
+ [AMS_ALARM_BIT_SUPPLY10] = { AMS_SEQ_SUPPLY10, AMS_ALARM_SUPPLY10 },
+ [AMS_ALARM_BIT_VCCAMS] = { AMS_SEQ_VCCAMS, AMS_ALARM_VCCAMS },
+ [AMS_ALARM_BIT_TEMP_REMOTE] = { AMS_SEQ_TEMP_REMOTE, AMS_ALARM_TEMP_REMOTE },
+};
+
+static int ams_scan_index_to_event(int scan_index)
+{
+ for (unsigned int i = 0; i < ARRAY_SIZE(alarm_map); i++) {
+ if (alarm_map[i].base_offset == AMS_ALARM_NONE)
+ continue;
+
+ if (alarm_map[i].scan_index == scan_index)
+ return i;
+ }
+
+ return -EINVAL;
+}
+
static int ams_get_alarm_offset(int scan_index, enum iio_event_direction dir)
{
- int offset;
+ int offset, event;
if (scan_index >= AMS_PS_SEQ_MAX)
scan_index -= AMS_PS_SEQ_MAX;
@@ -779,36 +820,11 @@ static int ams_get_alarm_offset(int scan_index, enum iio_event_direction dir)
offset = 0;
}
- switch (scan_index) {
- case AMS_SEQ_TEMP:
- return AMS_ALARM_TEMP + offset;
- case AMS_SEQ_SUPPLY1:
- return AMS_ALARM_SUPPLY1 + offset;
- case AMS_SEQ_SUPPLY2:
- return AMS_ALARM_SUPPLY2 + offset;
- case AMS_SEQ_SUPPLY3:
- return AMS_ALARM_SUPPLY3 + offset;
- case AMS_SEQ_SUPPLY4:
- return AMS_ALARM_SUPPLY4 + offset;
- case AMS_SEQ_SUPPLY5:
- return AMS_ALARM_SUPPLY5 + offset;
- case AMS_SEQ_SUPPLY6:
- return AMS_ALARM_SUPPLY6 + offset;
- case AMS_SEQ_SUPPLY7:
- return AMS_ALARM_SUPPLY7 + offset;
- case AMS_SEQ_SUPPLY8:
- return AMS_ALARM_SUPPLY8 + offset;
- case AMS_SEQ_SUPPLY9:
- return AMS_ALARM_SUPPLY9 + offset;
- case AMS_SEQ_SUPPLY10:
- return AMS_ALARM_SUPPLY10 + offset;
- case AMS_SEQ_VCCAMS:
- return AMS_ALARM_VCCAMS + offset;
- case AMS_SEQ_TEMP_REMOTE:
- return AMS_ALARM_TEMP_REMOTE + offset;
- default:
+ event = ams_scan_index_to_event(scan_index);
+ if (event < 0 || alarm_map[event].base_offset == AMS_ALARM_NONE)
return 0;
- }
+
+ return alarm_map[event].base_offset + offset;
}
static const struct iio_chan_spec *ams_event_to_channel(struct iio_dev *dev,
@@ -821,49 +837,13 @@ static const struct iio_chan_spec *ams_event_to_channel(struct iio_dev *dev,
scan_index = AMS_PS_SEQ_MAX;
}
- switch (event) {
- case AMS_ALARM_BIT_TEMP:
- scan_index += AMS_SEQ_TEMP;
- break;
- case AMS_ALARM_BIT_SUPPLY1:
- scan_index += AMS_SEQ_SUPPLY1;
- break;
- case AMS_ALARM_BIT_SUPPLY2:
- scan_index += AMS_SEQ_SUPPLY2;
- break;
- case AMS_ALARM_BIT_SUPPLY3:
- scan_index += AMS_SEQ_SUPPLY3;
- break;
- case AMS_ALARM_BIT_SUPPLY4:
- scan_index += AMS_SEQ_SUPPLY4;
- break;
- case AMS_ALARM_BIT_SUPPLY5:
- scan_index += AMS_SEQ_SUPPLY5;
- break;
- case AMS_ALARM_BIT_SUPPLY6:
- scan_index += AMS_SEQ_SUPPLY6;
- break;
- case AMS_ALARM_BIT_SUPPLY7:
- scan_index += AMS_SEQ_SUPPLY7;
- break;
- case AMS_ALARM_BIT_SUPPLY8:
- scan_index += AMS_SEQ_SUPPLY8;
- break;
- case AMS_ALARM_BIT_SUPPLY9:
- scan_index += AMS_SEQ_SUPPLY9;
- break;
- case AMS_ALARM_BIT_SUPPLY10:
- scan_index += AMS_SEQ_SUPPLY10;
- break;
- case AMS_ALARM_BIT_VCCAMS:
- scan_index += AMS_SEQ_VCCAMS;
- break;
- case AMS_ALARM_BIT_TEMP_REMOTE:
- scan_index += AMS_SEQ_TEMP_REMOTE;
- break;
- default:
- break;
- }
+ if (event >= ARRAY_SIZE(alarm_map))
+ return NULL;
+
+ if (alarm_map[event].base_offset == AMS_ALARM_NONE)
+ return NULL;
+
+ scan_index += alarm_map[event].scan_index;
for (i = 0; i < dev->num_channels; i++)
if (dev->channels[i].scan_index == scan_index)
@@ -877,43 +857,18 @@ static const struct iio_chan_spec *ams_event_to_channel(struct iio_dev *dev,
static int ams_get_alarm_mask(int scan_index)
{
- int bit = 0;
+ int bit = 0, event;
if (scan_index >= AMS_PS_SEQ_MAX) {
bit = AMS_PL_ALARM_START;
scan_index -= AMS_PS_SEQ_MAX;
}
- switch (scan_index) {
- case AMS_SEQ_TEMP:
- return BIT(AMS_ALARM_BIT_TEMP + bit);
- case AMS_SEQ_SUPPLY1:
- return BIT(AMS_ALARM_BIT_SUPPLY1 + bit);
- case AMS_SEQ_SUPPLY2:
- return BIT(AMS_ALARM_BIT_SUPPLY2 + bit);
- case AMS_SEQ_SUPPLY3:
- return BIT(AMS_ALARM_BIT_SUPPLY3 + bit);
- case AMS_SEQ_SUPPLY4:
- return BIT(AMS_ALARM_BIT_SUPPLY4 + bit);
- case AMS_SEQ_SUPPLY5:
- return BIT(AMS_ALARM_BIT_SUPPLY5 + bit);
- case AMS_SEQ_SUPPLY6:
- return BIT(AMS_ALARM_BIT_SUPPLY6 + bit);
- case AMS_SEQ_SUPPLY7:
- return BIT(AMS_ALARM_BIT_SUPPLY7 + bit);
- case AMS_SEQ_SUPPLY8:
- return BIT(AMS_ALARM_BIT_SUPPLY8 + bit);
- case AMS_SEQ_SUPPLY9:
- return BIT(AMS_ALARM_BIT_SUPPLY9 + bit);
- case AMS_SEQ_SUPPLY10:
- return BIT(AMS_ALARM_BIT_SUPPLY10 + bit);
- case AMS_SEQ_VCCAMS:
- return BIT(AMS_ALARM_BIT_VCCAMS + bit);
- case AMS_SEQ_TEMP_REMOTE:
- return BIT(AMS_ALARM_BIT_TEMP_REMOTE + bit);
- default:
+ event = ams_scan_index_to_event(scan_index);
+ if (event < 0)
return 0;
- }
+
+ return BIT(event + bit);
}
static int ams_read_event_config(struct iio_dev *indio_dev,
--
2.47.3
^ permalink raw reply related
* [PATCH v4 2/3] iio: adc: xilinx-ams: use guard(mutex) for automatic locking
From: Guilherme Ivo Bozi @ 2026-05-13 0:31 UTC (permalink / raw)
To: anand.ashok.dumbre, andy, conall.ogriofa, dlechner, jic23,
manish.narani, michal.simek, nuno.sa, salih.erim
Cc: Guilherme Ivo Bozi, Andy Shevchenko, Jonathan.Cameron,
linux-arm-kernel, linux-iio
In-Reply-To: <20260513003503.339418-1-guilherme.bozi@usp.br>
Replace open-coded mutex_lock()/mutex_unlock() pairs with
guard(mutex) to simplify locking and ensure proper unlock on
all control flow paths.
This removes explicit unlock handling, reduces boilerplate,
and avoids potential mistakes in error paths while keeping
the behavior unchanged.
Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
---
drivers/iio/adc/xilinx-ams.c | 24 ++++++++----------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 6191cd1b29a5..70a1f97f6dad 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -720,22 +720,20 @@ static int ams_read_raw(struct iio_dev *indio_dev,
int ret;
switch (mask) {
- case IIO_CHAN_INFO_RAW:
- mutex_lock(&ams->lock);
+ case IIO_CHAN_INFO_RAW: {
+ guard(mutex)(&ams->lock);
if (chan->scan_index >= AMS_CTRL_SEQ_BASE) {
ret = ams_read_vcc_reg(ams, chan->address, val);
if (ret)
- goto unlock_mutex;
+ return ret;
ams_enable_channel_sequence(indio_dev);
} else if (chan->scan_index >= AMS_PS_SEQ_MAX)
*val = readl(ams->pl_base + chan->address);
else
*val = readl(ams->ps_base + chan->address);
- ret = IIO_VAL_INT;
-unlock_mutex:
- mutex_unlock(&ams->lock);
- return ret;
+ return IIO_VAL_INT;
+ }
case IIO_CHAN_INFO_SCALE:
switch (chan->type) {
case IIO_VOLTAGE:
@@ -939,7 +937,7 @@ static int ams_write_event_config(struct iio_dev *indio_dev,
alarm = ams_get_alarm_mask(chan->scan_index);
- mutex_lock(&ams->lock);
+ guard(mutex)(&ams->lock);
if (state)
ams->alarm_mask |= alarm;
@@ -948,8 +946,6 @@ static int ams_write_event_config(struct iio_dev *indio_dev,
ams_update_alarm(ams, ams->alarm_mask);
- mutex_unlock(&ams->lock);
-
return 0;
}
@@ -962,15 +958,13 @@ static int ams_read_event_value(struct iio_dev *indio_dev,
struct ams *ams = iio_priv(indio_dev);
unsigned int offset = ams_get_alarm_offset(chan->scan_index, dir);
- mutex_lock(&ams->lock);
+ guard(mutex)(&ams->lock);
if (chan->scan_index >= AMS_PS_SEQ_MAX)
*val = readl(ams->pl_base + offset);
else
*val = readl(ams->ps_base + offset);
- mutex_unlock(&ams->lock);
-
return IIO_VAL_INT;
}
@@ -983,7 +977,7 @@ static int ams_write_event_value(struct iio_dev *indio_dev,
struct ams *ams = iio_priv(indio_dev);
unsigned int offset;
- mutex_lock(&ams->lock);
+ guard(mutex)(&ams->lock);
/* Set temperature channel threshold to direct threshold */
if (chan->type == IIO_TEMP) {
@@ -1005,8 +999,6 @@ static int ams_write_event_value(struct iio_dev *indio_dev,
else
writel(val, ams->ps_base + offset);
- mutex_unlock(&ams->lock);
-
return 0;
}
--
2.47.3
^ permalink raw reply related
* [PATCH v4 1/3] iio: adc: xilinx-ams: fix out-of-bounds channel lookup in event handling
From: Guilherme Ivo Bozi @ 2026-05-13 0:31 UTC (permalink / raw)
To: anand.ashok.dumbre, andy, conall.ogriofa, dlechner, jic23,
manish.narani, michal.simek, nuno.sa, salih.erim
Cc: Guilherme Ivo Bozi, Jonathan.Cameron, linux-arm-kernel, linux-iio
In-Reply-To: <20260513003503.339418-1-guilherme.bozi@usp.br>
ams_event_to_channel() may return a pointer past the end of
dev->channels when no matching scan_index is found. This can lead
to invalid memory access in ams_handle_event().
Add a bounds check in ams_event_to_channel() and return NULL when
no channel is found. Also guard the caller to safely handle this
case.
Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
Signed-off-by: Guilherme Ivo Bozi <guilherme.bozi@usp.br>
---
drivers/iio/adc/xilinx-ams.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 124470c92529..6191cd1b29a5 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -871,6 +871,9 @@ static const struct iio_chan_spec *ams_event_to_channel(struct iio_dev *dev,
if (dev->channels[i].scan_index == scan_index)
break;
+ if (i == dev->num_channels)
+ return NULL;
+
return &dev->channels[i];
}
@@ -1012,6 +1015,8 @@ static void ams_handle_event(struct iio_dev *indio_dev, u32 event)
const struct iio_chan_spec *chan;
chan = ams_event_to_channel(indio_dev, event);
+ if (!chan)
+ return;
if (chan->type == IIO_TEMP) {
/*
--
2.47.3
^ permalink raw reply related
* [PATCH v4 0/3] iio: adc: xilinx-ams: refactor alarm handling to table-driven design
From: Guilherme Ivo Bozi @ 2026-05-13 0:31 UTC (permalink / raw)
To: anand.ashok.dumbre, andy, conall.ogriofa, dlechner, jic23,
manish.narani, michal.simek, nuno.sa, salih.erim
Cc: Guilherme Ivo Bozi, Jonathan.Cameron, linux-arm-kernel, linux-iio
This series addresses significant code duplication in alarm handling
logic across the Xilinx AMS IIO driver.
To address this, the series introduces a centralized table-driven
mapping (alarm_map) that replaces multiple switch statements spread
across the driver.
This improves:
- maintainability (single source of truth for mappings)
- readability (removes repeated switch logic)
- extensibility (new alarms require only table updates)
No functional changes are intended.
Series overview:
- Patch 1: fix out-of-bounds channel lookup
- Patch 2: convert mutex handling to guard(mutex)
- Patch 3: introduce table-driven alarm mapping
v1 -> v2:
- Fixed Fixes tag format
- Replaced AMS_ALARM_INVALID with AMS_ALARM_NONE
- Changed alarm_map base_offset type
v2 -> v3:
- Replace 'i >= num_channels' with 'i == num_channels'
- Add missing trailing comma in alarm_map array initializer
v3 -> v4:
- Removed unnecessary 'event < 0' check for type e32
Guilherme Ivo Bozi (3):
iio: adc: xilinx-ams: fix out-of-bounds channel lookup in event
handling
iio: adc: xilinx-ams: use guard(mutex) for automatic locking
iio: adc: xilinx-ams: refactor alarm mapping to table-driven approach
drivers/iio/adc/xilinx-ams.c | 190 +++++++++++++----------------------
1 file changed, 71 insertions(+), 119 deletions(-)
--
2.47.3
^ permalink raw reply
* [PATCH 07/12] crypto: atmel - expose CONFIG zone through sysfs
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Expose the CONFIG EEPROM zone through a read-only sysfs attribute for
Atmel I2C crypto devices.
The CONFIG zone contains device configuration state, including slot
configuration and lock status, which is useful for debugging and
verifying provisioning state.
Reuse the generic EEPROM display helper provided by the Atmel I2C core
driver to expose the CONFIG zone for both SHA204A and ECC devices.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 7 +++++++
drivers/crypto/atmel-sha204a.c | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index b5f2d44ec74c..f08fdf284b60 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -23,6 +23,12 @@
#include <crypto/kpp.h>
#include "atmel-i2c.h"
+static ssize_t config_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_CONFIG_ZONE);
+}
+static DEVICE_ATTR_ADMIN_RO(config);
+
static ssize_t otp_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_OTP_ZONE);
@@ -30,6 +36,7 @@ static ssize_t otp_show(struct device *dev, struct device_attribute *attr, char
static DEVICE_ATTR_RO(otp);
static struct attribute *atmel_ecc508a_attrs[] = {
+ &dev_attr_config.attr,
&dev_attr_otp.attr,
NULL
};
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index 4f10e826e675..341554b7b7a2 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -19,6 +19,12 @@
#include <linux/workqueue.h>
#include "atmel-i2c.h"
+static ssize_t config_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_CONFIG_ZONE);
+}
+static DEVICE_ATTR_ADMIN_RO(config);
+
static ssize_t otp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -27,6 +33,7 @@ static ssize_t otp_show(struct device *dev,
static DEVICE_ATTR_RO(otp);
static struct attribute *atmel_sha204a_attrs[] = {
+ &dev_attr_config.attr,
&dev_attr_otp.attr,
NULL
};
--
2.53.0
^ permalink raw reply related
* [PATCH 04/12] crypto: atmel - add per-device timing and match-data driven configuration
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
The ATSHA204(A) and ATECC device families define different maximum
command execution times in their datasheets. The current driver uses a
mixed set of timing constants, which can result in insufficient wait
times for some devices.
Introduce struct atmel_i2c_of_match_data to provide per-device timing
information through the device match tables. Store the match data in the
client private structure and pass the timing parameters to the command
initialization helpers instead of relying on global timing constants.
This allows the common atmel-i2c core to use device-specific command
timeouts for operations such as READ, RANDOM, GENKEY, and ECDH.
Also move the legacy hwrng quality information into the match data
structure to consolidate per-device configuration in a single place.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 32 +++++++++++++---
drivers/crypto/atmel-i2c.c | 29 ++++++++------
drivers/crypto/atmel-i2c.h | 36 ++++++++++++------
drivers/crypto/atmel-sha204a.c | 69 ++++++++++++++++++++++++----------
4 files changed, 120 insertions(+), 46 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index 0dede3707b73..7793f7b4e97e 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -76,6 +76,8 @@ static int atmel_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf,
unsigned int len)
{
struct atmel_ecdh_ctx *ctx = kpp_tfm_ctx(tfm);
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(ctx->client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_cmd *cmd;
void *public_key;
struct ecdh params;
@@ -112,7 +114,7 @@ static int atmel_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf,
ctx->do_fallback = false;
- atmel_i2c_init_genkey_cmd(cmd, DATA_SLOT_2);
+ atmel_i2c_init_genkey_cmd(cmd, DATA_SLOT_2, &data->timings);
ret = atmel_i2c_send_receive(ctx->client, cmd);
if (ret)
@@ -164,6 +166,8 @@ static int atmel_ecdh_compute_shared_secret(struct kpp_request *req)
{
struct crypto_kpp *tfm = crypto_kpp_reqtfm(req);
struct atmel_ecdh_ctx *ctx = kpp_tfm_ctx(tfm);
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(ctx->client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_work_data *work_data;
gfp_t gfp;
int ret;
@@ -187,7 +191,7 @@ static int atmel_ecdh_compute_shared_secret(struct kpp_request *req)
work_data->ctx = ctx;
work_data->client = ctx->client;
- ret = atmel_i2c_init_ecdh_cmd(&work_data->cmd, req->src);
+ ret = atmel_i2c_init_ecdh_cmd(&work_data->cmd, req->src, &data->timings);
if (ret)
goto free_work_data;
@@ -278,14 +282,22 @@ static struct kpp_alg atmel_ecdh_nist_p256 = {
static int atmel_ecc_probe(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv;
+ const struct atmel_i2c_of_match_data *data;
int ret;
ret = atmel_i2c_probe(client);
if (ret)
goto done;
- i2c_priv = i2c_get_clientdata(client);
+ data = device_get_match_data(&client->dev);
+ if (!data) {
+ dev_err(&client->dev, "no match data found via OF or ID table\n");
+ ret = -ENODEV;
+ goto done;
+ }
+ i2c_priv = i2c_get_clientdata(client);
+ i2c_priv->data = data;
i2c_priv->caps = BIT(ATMEL_CAP_ECDH);
/* add to client list */
@@ -339,9 +351,19 @@ static void atmel_ecc_remove(struct i2c_client *client)
crypto_unregister_kpp(&atmel_ecdh_nist_p256);
}
+static const struct atmel_i2c_of_match_data atecc508a_match_data = {
+ .timings = {
+ .max_exec_time_ecdh = 58,
+ .max_exec_time_genkey = 115,
+ .max_exec_time_random = 23,
+ .max_exec_time_read = 1,
+ .max_exec_time_write = 42,
+ },
+};
+
static const struct of_device_id atmel_ecc_dt_ids[] = {
- { .compatible = "atmel,atecc508a", },
- { .compatible = "atmel,atecc608b", },
+ { .compatible = "atmel,atecc508a", .data = &atecc508a_match_data, },
+ { .compatible = "atmel,atecc608b", .data = &atecc508a_match_data, },
{ }
};
MODULE_DEVICE_TABLE(of, atmel_ecc_dt_ids);
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index b7ee2ec37531..7fa7cf9ab3c1 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -96,7 +96,8 @@ struct i2c_client *atmel_i2c_client_alloc(enum atmel_i2c_capability cap)
}
EXPORT_SYMBOL(atmel_i2c_client_alloc);
-void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd)
+void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
+ const struct atmel_i2c_max_exec_timings *timings)
{
cmd->word_addr = COMMAND;
cmd->opcode = OPCODE_READ;
@@ -110,12 +111,13 @@ void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd)
atmel_i2c_checksum(cmd);
- cmd->msecs = MAX_EXEC_TIME_READ;
+ cmd->msecs = timings->max_exec_time_read;
cmd->rxsize = READ_RSP_SIZE;
}
EXPORT_SYMBOL(atmel_i2c_init_read_config_cmd);
-int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr)
+int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
+ const struct atmel_i2c_max_exec_timings *timings)
{
if (addr >= OTP_ZONE_SIZE / 4)
return -EINVAL;
@@ -132,14 +134,15 @@ int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr)
atmel_i2c_checksum(cmd);
- cmd->msecs = MAX_EXEC_TIME_READ;
+ cmd->msecs = timings->max_exec_time_read;
cmd->rxsize = READ_RSP_SIZE;
return 0;
}
EXPORT_SYMBOL(atmel_i2c_init_read_otp_cmd);
-void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd)
+void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
+ const struct atmel_i2c_max_exec_timings *timings)
{
cmd->word_addr = COMMAND;
cmd->opcode = OPCODE_RANDOM;
@@ -149,12 +152,13 @@ void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd)
atmel_i2c_checksum(cmd);
- cmd->msecs = MAX_EXEC_TIME_RANDOM;
+ cmd->msecs = timings->max_exec_time_random;
cmd->rxsize = RANDOM_RSP_SIZE;
}
EXPORT_SYMBOL(atmel_i2c_init_random_cmd);
-void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid)
+void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
+ const struct atmel_i2c_max_exec_timings *timings)
{
cmd->word_addr = COMMAND;
cmd->count = GENKEY_COUNT;
@@ -165,13 +169,14 @@ void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid)
atmel_i2c_checksum(cmd);
- cmd->msecs = MAX_EXEC_TIME_GENKEY;
+ cmd->msecs = timings->max_exec_time_genkey;
cmd->rxsize = GENKEY_RSP_SIZE;
}
EXPORT_SYMBOL(atmel_i2c_init_genkey_cmd);
int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
- struct scatterlist *pubkey)
+ struct scatterlist *pubkey,
+ const struct atmel_i2c_max_exec_timings *timings)
{
size_t copied;
@@ -196,7 +201,7 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
atmel_i2c_checksum(cmd);
- cmd->msecs = MAX_EXEC_TIME_ECDH;
+ cmd->msecs = timings->max_exec_time_ecdh;
cmd->rxsize = ECDH_RSP_SIZE;
return 0;
@@ -363,6 +368,8 @@ static inline size_t atmel_i2c_wake_token_sz(u32 bus_clk_rate)
static int device_sanity_check(struct i2c_client *client)
{
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_cmd *cmd;
int ret;
@@ -370,7 +377,7 @@ static int device_sanity_check(struct i2c_client *client)
if (!cmd)
return -ENOMEM;
- atmel_i2c_init_read_config_cmd(cmd);
+ atmel_i2c_init_read_config_cmd(cmd, &data->timings);
ret = atmel_i2c_send_receive(client, cmd);
if (ret)
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index 70579b438256..5224a62c16c9 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -57,6 +57,19 @@ struct atmel_i2c_cmd {
u16 rxsize;
} __packed;
+struct atmel_i2c_max_exec_timings {
+ unsigned int max_exec_time_genkey;
+ unsigned int max_exec_time_ecdh;
+ unsigned int max_exec_time_random;
+ unsigned int max_exec_time_read;
+ unsigned int max_exec_time_write;
+};
+
+struct atmel_i2c_of_match_data {
+ const unsigned short *legacy_hwrng;
+ struct atmel_i2c_max_exec_timings timings;
+};
+
/* Status/Error codes */
#define STATUS_SIZE 0x04
#define STATUS_NOERR 0x00
@@ -88,12 +101,6 @@ struct atmel_i2c_cmd {
/* Wake Low duration */
#define TWLO_USEC 60
-/* Command execution time (milliseconds) */
-#define MAX_EXEC_TIME_ECDH 58
-#define MAX_EXEC_TIME_GENKEY 115
-#define MAX_EXEC_TIME_READ 1
-#define MAX_EXEC_TIME_RANDOM 50
-
/* Command opcode */
#define OPCODE_ECDH 0x43
#define OPCODE_GENKEY 0x40
@@ -135,6 +142,7 @@ extern struct atmel_i2c_client_mgmt atmel_i2c_mgmt;
* @tfm_count : number of active crypto transformations on i2c client
* @hwrng : hold the hardware generated rng
* @caps : feature capability of the particular driver
+ * @data : preinitialized driver data
*
* Reads and writes from/to the i2c client are sequential. The first byte
* transmitted to the device is treated as the byte size. Any attempt to send
@@ -152,6 +160,7 @@ struct atmel_i2c_client_priv {
atomic_t tfm_count ____cacheline_aligned;
struct hwrng hwrng;
u32 caps;
+ const struct atmel_i2c_of_match_data *data;
};
/**
@@ -189,12 +198,17 @@ void atmel_i2c_flush_queue(void);
int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd);
-void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd);
-int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr);
-void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd);
-void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid);
+void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
+ const struct atmel_i2c_max_exec_timings *timings);
+int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
+ const struct atmel_i2c_max_exec_timings *timings);
+void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
+ const struct atmel_i2c_max_exec_timings *timings);
+void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
+ const struct atmel_i2c_max_exec_timings *timings);
int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
- struct scatterlist *pubkey);
+ struct scatterlist *pubkey,
+ const struct atmel_i2c_max_exec_timings *timings);
struct i2c_client *atmel_i2c_client_alloc(enum atmel_i2c_capability cap);
void atmel_i2c_unregister_client(struct atmel_i2c_client_priv *i2c_priv);
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index ab758c9cd410..febf9891b167 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -40,14 +40,15 @@ static void atmel_sha204a_rng_done(struct atmel_i2c_work_data *work_data,
atomic_dec(&i2c_priv->tfm_count);
}
-static int atmel_sha204a_rng_read_nonblocking(struct hwrng *rng, void *data,
+static int atmel_sha204a_rng_read_nonblocking(struct hwrng *rng, void *buf,
size_t max)
{
- struct atmel_i2c_client_priv *i2c_priv;
+ struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
+ struct atmel_i2c_client_priv,
+ hwrng);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_work_data *work_data;
- i2c_priv = container_of(rng, struct atmel_i2c_client_priv, hwrng);
-
/* keep maximum 1 asynchronous read in flight at any time */
if (!atomic_add_unless(&i2c_priv->tfm_count, 1, 1))
return 0;
@@ -55,7 +56,7 @@ static int atmel_sha204a_rng_read_nonblocking(struct hwrng *rng, void *data,
if (rng->priv) {
work_data = (struct atmel_i2c_work_data *)rng->priv;
max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(data, &work_data->cmd.data[RSP_DATA_IDX], max);
+ memcpy(buf, &work_data->cmd.data[RSP_DATA_IDX], max);
rng->priv = 0;
} else {
work_data = kmalloc_obj(*work_data, GFP_ATOMIC);
@@ -69,42 +70,45 @@ static int atmel_sha204a_rng_read_nonblocking(struct hwrng *rng, void *data,
max = 0;
}
- atmel_i2c_init_random_cmd(&work_data->cmd);
+ atmel_i2c_init_random_cmd(&work_data->cmd, &data->timings);
atmel_i2c_enqueue(work_data, atmel_sha204a_rng_done, rng);
return max;
}
-static int atmel_sha204a_rng_read(struct hwrng *rng, void *data, size_t max,
+static int atmel_sha204a_rng_read(struct hwrng *rng, void *buf, size_t max,
bool wait)
{
- struct atmel_i2c_client_priv *i2c_priv;
+ struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
+ struct atmel_i2c_client_priv,
+ hwrng);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_cmd cmd;
int ret;
if (!wait)
- return atmel_sha204a_rng_read_nonblocking(rng, data, max);
-
- i2c_priv = container_of(rng, struct atmel_i2c_client_priv, hwrng);
+ return atmel_sha204a_rng_read_nonblocking(rng, buf, max);
- atmel_i2c_init_random_cmd(&cmd);
+ atmel_i2c_init_random_cmd(&cmd, &data->timings);
ret = atmel_i2c_send_receive(i2c_priv->client, &cmd);
if (ret)
return ret;
max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(data, &cmd.data[RSP_DATA_IDX], max);
+ memcpy(buf, &cmd.data[RSP_DATA_IDX], max);
return max;
}
static int atmel_sha204a_otp_read(struct i2c_client *client, u16 addr, u8 *otp)
{
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
struct atmel_i2c_cmd cmd;
int ret;
- ret = atmel_i2c_init_read_otp_cmd(&cmd, addr);
+ ret = atmel_i2c_init_read_otp_cmd(&cmd, addr, &data->timings);
if (ret < 0) {
dev_err(&client->dev, "failed, invalid otp address %04X\n",
addr);
@@ -164,6 +168,7 @@ static const struct attribute_group atmel_sha204a_groups = {
static int atmel_sha204a_probe(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv;
+ const struct atmel_i2c_of_match_data *data;
const unsigned short *quality;
int ret;
@@ -171,8 +176,15 @@ static int atmel_sha204a_probe(struct i2c_client *client)
if (ret)
goto done;
- i2c_priv = i2c_get_clientdata(client);
+ data = device_get_match_data(&client->dev);
+ if (!data) {
+ dev_err(&client->dev, "no match data found via OF or ID table\n");
+ ret = -ENODEV;
+ goto done;
+ }
+ i2c_priv = i2c_get_clientdata(client);
+ i2c_priv->data = data;
i2c_priv->caps = 0;
/* add to client list */
@@ -187,7 +199,7 @@ static int atmel_sha204a_probe(struct i2c_client *client)
i2c_priv->hwrng.name = dev_name(&client->dev);
i2c_priv->hwrng.read = atmel_sha204a_rng_read;
- quality = i2c_get_match_data(client);
+ quality = i2c_priv->data->legacy_hwrng;
if (quality)
i2c_priv->hwrng.quality = *quality;
@@ -227,15 +239,34 @@ static void atmel_sha204a_remove(struct i2c_client *client)
kfree((void *)i2c_priv->hwrng.priv);
}
+static const struct atmel_i2c_of_match_data atsha204_match_data = {
+ .timings = {
+ .max_exec_time_genkey = 43,
+ .max_exec_time_random = 50,
+ .max_exec_time_read = 4,
+ .max_exec_time_write = 42,
+ },
+ .legacy_hwrng = &atsha204_quality,
+};
+
+static const struct atmel_i2c_of_match_data atsha204a_match_data = {
+ .timings = {
+ .max_exec_time_genkey = 43,
+ .max_exec_time_random = 50,
+ .max_exec_time_read = 4,
+ .max_exec_time_write = 42,
+ },
+};
+
static const struct of_device_id atmel_sha204a_dt_ids[] __maybe_unused = {
- { .compatible = "atmel,atsha204", .data = &atsha204_quality },
- { .compatible = "atmel,atsha204a", },
+ { .compatible = "atmel,atsha204", .data = &atsha204_match_data, },
+ { .compatible = "atmel,atsha204a", .data = &atsha204a_match_data, },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, atmel_sha204a_dt_ids);
static const struct i2c_device_id atmel_sha204a_id[] = {
- { "atsha204", (kernel_ulong_t)&atsha204_quality },
+ { "atsha204" },
{ "atsha204a" },
{ /* sentinel */ }
};
--
2.53.0
^ permalink raw reply related
* [PATCH 09/12] crypto: atmel - check client data in remove callbacks
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Check the i2c client private data pointer in the remove callbacks of
the Atmel ECC and SHA204A drivers before accessing driver state.
Move sysfs group removal ahead of the NULL check so cleanup can still
proceed even if client data is unavailable. Also downgrade the
busy-device warning in the ECC remove path from dev_emerg() to
dev_warn().
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 20 ++++++--------------
drivers/crypto/atmel-sha204a.c | 7 +++++--
2 files changed, 11 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index f6d1a9694d63..9ad6d42b6eef 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -380,19 +380,13 @@ static void atmel_ecc_remove(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
- /* Return EBUSY if i2c client already allocated. */
- if (atomic_read(&i2c_priv->tfm_count)) {
- /*
- * After we return here, the memory backing the device is freed.
- * That happens no matter what the return value of this function
- * is because in the Linux device model there is no error
- * handling for unbinding a driver.
- * If there is still some action pending, it probably involves
- * accessing the freed memory.
- */
- dev_emerg(&client->dev, "Device is busy, expect memory corruption.\n");
+ sysfs_remove_group(&client->dev.kobj, &atmel_ecc508a_groups);
+
+ if (!i2c_priv)
return;
- }
+
+ if (atomic_read(&i2c_priv->tfm_count))
+ dev_warn(&client->dev, "Device is busy, remove it anyhow\n");
atmel_i2c_unregister_client(i2c_priv);
atmel_i2c_flush_queue();
@@ -403,8 +397,6 @@ static void atmel_ecc_remove(struct i2c_client *client)
kfree((void *)i2c_priv->hwrng.priv);
i2c_priv->hwrng.priv = 0;
}
-
- sysfs_remove_group(&client->dev.kobj, &atmel_ecc508a_groups);
}
static const struct atmel_i2c_of_match_data atecc508a_match_data = {
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index 88726f6ef87c..6a41024ae40d 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -111,6 +111,11 @@ static void atmel_sha204a_remove(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ sysfs_remove_group(&client->dev.kobj, &atmel_sha204a_groups);
+
+ if (!i2c_priv)
+ return;
+
devm_hwrng_unregister(&client->dev, &i2c_priv->hwrng);
atmel_i2c_flush_queue();
@@ -118,8 +123,6 @@ static void atmel_sha204a_remove(struct i2c_client *client)
kfree((void *)i2c_priv->hwrng.priv);
i2c_priv->hwrng.priv = 0;
}
-
- sysfs_remove_group(&client->dev.kobj, &atmel_sha204a_groups);
}
static const struct atmel_i2c_of_match_data atsha204_match_data = {
--
2.53.0
^ permalink raw reply related
* Re: [PATCH net-next v7 2/4] net: stmmac: eic7700: enable clocks before syscon access and correct RX sampling timing
From: Jakub Kicinski @ 2026-05-12 23:13 UTC (permalink / raw)
To: 李志
Cc: andrew+netdev, devicetree, davem, edumazet, robh, krzk+dt,
conor+dt, netdev, pabeni, mcoquelin.stm32, alexandre.torgue,
rmk+kernel, pjw, palmer, aou, alex, linux-riscv, linux-stm32,
linux-arm-kernel, linux-kernel, maxime.chevallier, ningyu, linmin,
pinkesh.vaghela, pritesh.patel, weishangjuan, horms
In-Reply-To: <446f69bd.7fe4.19e1ab248fb.Coremail.lizhi2@eswincomputing.com>
On Tue, 12 May 2026 13:39:12 +0800 (GMT+08:00) 李志 wrote:
> For the eth1 enablement part, my current understanding is that it
> should be treated as a new independent v1 series for net-next,
> since the scope and target tree have changed after the split.
>
> Would you prefer this eth1 series to start as v1, or should it
> continue as v8 for continuity with the original series?
v8 is better, but is the fix in net-next already?
If this is the posting you're referring to:
https://lore.kernel.org/all/20260507083214.192-1-lizhi2@eswincomputing.com/
it has been dropped based on feedback from Maxime and I don't see a v2.
^ permalink raw reply
* [PATCH 2/2] firmware: samsung: acpm: add Exynos850 support
From: Alexey Klimov @ 2026-05-12 23:12 UTC (permalink / raw)
To: Sam Protsenko, Tudor Ambarus, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krzysztof Kozlowski, Alim Akhtar
Cc: Peter Griffin, linux-samsung-soc, devicetree, linux-arm-kernel,
linux-kernel
In-Reply-To: <20260513-exynos850-acpm-firmware-support-v1-0-3858d097e433@linaro.org>
The Exynos850 SoC contains an APM co-processor. Communication
with this hardware block is established using the ACPM protocol,
which handles IPC messages for clocks, power, thermal management,
and PMIC control.
Add the "samsung,exynos850-acpm-ipc" compatible string along with
its associated match data. This includes the specific initialisation
data base offset (which differs from the GS101 offset) and the
"exynos850-acpm-clk" device name required to properly instantiate
the clock provider.
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
drivers/firmware/samsung/exynos-acpm.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/firmware/samsung/exynos-acpm.c b/drivers/firmware/samsung/exynos-acpm.c
index 16c46ed60837..db4138f36038 100644
--- a/drivers/firmware/samsung/exynos-acpm.c
+++ b/drivers/firmware/samsung/exynos-acpm.c
@@ -37,6 +37,7 @@
#define ACPM_POLL_TIMEOUT_US (100 * USEC_PER_MSEC)
#define ACPM_TX_TIMEOUT_US 500000
+#define ACPM_EXYNOS850_INITDATA_BASE 0x7000
#define ACPM_GS101_INITDATA_BASE 0xa000
/**
@@ -766,6 +767,11 @@ struct acpm_handle *devm_acpm_get_by_node(struct device *dev,
}
EXPORT_SYMBOL_GPL(devm_acpm_get_by_node);
+static const struct acpm_match_data acpm_exynos850 = {
+ .initdata_base = ACPM_EXYNOS850_INITDATA_BASE,
+ .acpm_clk_dev_name = "exynos850-acpm-clk",
+};
+
static const struct acpm_match_data acpm_gs101 = {
.initdata_base = ACPM_GS101_INITDATA_BASE,
.acpm_clk_dev_name = "gs101-acpm-clk",
@@ -776,6 +782,10 @@ static const struct of_device_id acpm_match[] = {
.compatible = "google,gs101-acpm-ipc",
.data = &acpm_gs101,
},
+ {
+ .compatible = "samsung,exynos850-acpm-ipc",
+ .data = &acpm_exynos850,
+ },
{},
};
MODULE_DEVICE_TABLE(of, acpm_match);
--
2.51.0
^ permalink raw reply related
* [PATCH 0/2] Initial Exynos850 ACPM support for exynos-acpm
From: Alexey Klimov @ 2026-05-12 23:12 UTC (permalink / raw)
To: Sam Protsenko, Tudor Ambarus, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krzysztof Kozlowski, Alim Akhtar
Cc: Peter Griffin, linux-samsung-soc, devicetree, linux-arm-kernel,
linux-kernel
This series adds support for the Exynos850 SoC to the Samsung ACPM
firmware IPC driver.
The Exynos850 contains an APM co-processor that handles IPC messages for
clocks, power, thermal management, and PMIC control. While it uses the
same underlying ACPM communication machinery and protocols set as
the GS101, the exact implementation details vary between the two SoCs.
Those protocol-specific differences will be managed individually by the
corresponding protocol drivers. However, a dedicated compatible string
is still required for the core IPC driver because the Exynos850 firmware
utilizes a different initialisation data base offset.
First patch updates the google,gs101-acpm-ipc dt-bindings to include the
new "samsung,exynos850-acpm-ipc" compatible string.
Second patch adds the corresponding match data, base offset, and clock
device name to the exynos-acpm firmware driver.
There is a dependency for driver changes (not for device tree bindings
update) on clk-acpm exynos850 series posted here:
https://lore.kernel.org/linux-samsung-soc/20260512-exynos850-acpm-clk-v1-0-837532ddbf38@linaro.org/
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
Alexey Klimov (2):
dt-bindings: firmware: google,gs101-acpm-ipc: document Exynos850 compatible
firmware: samsung: acpm: add Exynos850 support
.../devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml | 4 +++-
drivers/firmware/samsung/exynos-acpm.c | 10 ++++++++++
2 files changed, 13 insertions(+), 1 deletion(-)
---
base-commit: 9e0898f1c0f134c6bad146ca8578f73c3e40ac0a
change-id: 20260512-exynos850-acpm-firmware-support-0aefaf4104b6
prerequisite-change-id: 20260512-exynos850-acpm-clk-bed1c23b66eb:v1
prerequisite-patch-id: 223c977406801dde31779f956e33e65e51a0323c
prerequisite-patch-id: 9b11f60e3c53e94e28b5e54fb7bb87e5415d8a05
Best regards,
--
Alexey Klimov <alexey.klimov@linaro.org>
^ permalink raw reply
* [PATCH 1/2] dt-bindings: firmware: google,gs101-acpm-ipc: document Exynos850 compatible
From: Alexey Klimov @ 2026-05-12 23:12 UTC (permalink / raw)
To: Sam Protsenko, Tudor Ambarus, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krzysztof Kozlowski, Alim Akhtar
Cc: Peter Griffin, linux-samsung-soc, devicetree, linux-arm-kernel,
linux-kernel
In-Reply-To: <20260513-exynos850-acpm-firmware-support-v1-0-3858d097e433@linaro.org>
The Exynos850 SoC incorporates an APM co-processor. Communication with
this hardware block is done using the ACPM protocol, which handles IPC
messages for clocks, power, thermal management and PMIC control.
Dedicated compatible string is required for the Exynos850 because
its firmware utilizes a different initialisation data base offset
(0x7000) compared to the existing GS101 implementation (0xa000).
Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org>
---
Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
index e68f9c3ca5e2..511c873280fe 100644
--- a/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
+++ b/Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
@@ -22,7 +22,9 @@ description: |
properties:
compatible:
- const: google,gs101-acpm-ipc
+ enum:
+ - google,gs101-acpm-ipc
+ - samsung,exynos850-acpm-ipc
"#clock-cells":
const: 1
--
2.51.0
^ permalink raw reply related
* [PATCH 12/12] crypto: atmel - add SHA256 ahash support
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Add SHA256 ahash support for ATSHA204A and ECC based devices using
the hardware SHA engine provided by the Atmel secure element devices.
Implement common SHA256 request handling in the atmel-i2c core driver,
including init, update, final, finup, digest, export and import
operations. Scatterlist input is processed using the crypto hash
walker.
ATSHA204A devices require software-side SHA256 padding according to
FIPS 180-4 before submitting the final data blocks to the device.
Newer ECC devices instead support a dedicated SHA final command which
performs padding internally in hardware. For these devices, the final
block length is passed through the command parameter field.
The SHA engine requires a strict multi-command transaction sequence:
SHA INIT, followed by one or more SHA COMPUTE operations and, on ECC
devices, a terminating SHA FINAL operation. The device SHA context is
lost if the device enters sleep mode or if unrelated commands are
interleaved during the sequence.
To support these hardware requirements, split the existing
send/receive helper into a low-level transfer helper and a higher
level wrapper handling wakeup, sleep and locking. SHA operations keep
the device awake and hold the i2c client lock across the complete hash
transaction until the final digest has been retrieved.
Register the SHA256 ahash algorithm in both atmel-sha204a and
atmel-ecc drivers and add capability based client allocation for SHA
operations.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 50 +++++-
drivers/crypto/atmel-i2c.c | 273 +++++++++++++++++++++++++++++++--
drivers/crypto/atmel-i2c.h | 40 +++++
drivers/crypto/atmel-sha204a.c | 55 ++++++-
4 files changed, 407 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index ed8c0ce5562b..aacf9e8add7a 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -19,10 +19,50 @@
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <crypto/internal/kpp.h>
+#include <crypto/internal/hash.h>
#include <crypto/ecdh.h>
#include <crypto/kpp.h>
+#include <crypto/sha2.h>
#include "atmel-i2c.h"
+static int atmel_ecc_sha_init_tfm(struct crypto_tfm *tfm)
+{
+ struct atmel_i2c_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+
+ ctx->client = atmel_i2c_client_alloc(ATMEL_CAP_SHA);
+ if (IS_ERR(ctx->client)) {
+ pr_err("tfm - i2c_client binding failed\n");
+ return PTR_ERR(ctx->client);
+ }
+
+ return 0;
+}
+
+static struct ahash_alg atmel_ecc_sha = {
+ .init = atmel_i2c_sha_init,
+ .update = atmel_i2c_sha_update,
+ .final = atmel_i2c_sha_final,
+ .finup = atmel_i2c_sha_finup,
+ .digest = atmel_i2c_sha_digest,
+ .export = atmel_i2c_sha_export,
+ .import = atmel_i2c_sha_import,
+ .halg = {
+ .digestsize = SHA256_DIGEST_SIZE,
+ .statesize = sizeof(struct atmel_i2c_sha_reqctx),
+ .base = {
+ .cra_name = "sha256",
+ .cra_driver_name = "atmel-sha256",
+ .cra_init = atmel_ecc_sha_init_tfm,
+ .cra_priority = ATMEL_I2C_PRIORITY,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH,
+ .cra_blocksize = SHA256_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct atmel_i2c_sha_ctx),
+ .cra_reqsize = sizeof(struct atmel_i2c_sha_reqctx),
+ .cra_module = THIS_MODULE,
+ }
+ }
+};
+
static ssize_t config_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_CONFIG_ZONE);
@@ -321,7 +361,7 @@ static int atmel_ecc_probe(struct i2c_client *client)
i2c_priv = i2c_get_clientdata(client);
i2c_priv->data = data;
- i2c_priv->caps = BIT(ATMEL_CAP_ECDH);
+ i2c_priv->caps = BIT(ATMEL_CAP_ECDH) | BIT(ATMEL_CAP_SHA);
ret = atmel_i2c_device_sanity_check(client);
if (ret) {
@@ -364,6 +404,12 @@ static int atmel_ecc_probe(struct i2c_client *client)
dev_info(&client->dev, "atmel ecc algorithms registered in /proc/crypto\n");
}
+ ret = crypto_register_ahash(&atmel_ecc_sha);
+ if (ret) {
+ dev_err(&client->dev, "SHA256 registration failed\n");
+ goto err_list_del;
+ }
+
goto done;
err_list_del:
@@ -392,6 +438,7 @@ static void atmel_ecc_remove(struct i2c_client *client)
atmel_i2c_flush_queue();
crypto_unregister_kpp(&atmel_ecdh_nist_p256);
+ crypto_unregister_ahash(&atmel_ecc_sha);
if (i2c_priv->hwrng.priv) {
kfree((void *)i2c_priv->hwrng.priv);
@@ -405,6 +452,7 @@ static const struct atmel_i2c_of_match_data atecc508a_match_data = {
.max_exec_time_genkey = 115,
.max_exec_time_random = 23,
.max_exec_time_read = 1,
+ .max_exec_time_sha = 9,
.max_exec_time_write = 42,
},
.eeprom_zone_size = {
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index 53aba2f4bedb..cbdc8c0e5aca 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -19,6 +19,10 @@
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
+#include <crypto/hash.h>
+#include <crypto/sha2.h>
+#include <crypto/internal/hash.h>
+
#include "atmel-i2c.h"
#define ATMEL_I2C_COMMAND 0x03 /* packet function */
@@ -49,12 +53,17 @@
#define ATMEL_I2C_ECDH_RSP_SIZE (32 + ATMEL_I2C_RSP_OVERHEAD_SIZE)
#define ATMEL_I2C_ECDH_PREFIX_MODE 0x00
+/* Definitions for the SHA Command */
+#define ATMEL_I2C_SHA_RSP_SIZE (ATMEL_I2C_RSP_OVERHEAD_SIZE + \
+ SHA256_DIGEST_SIZE)
+
/* Command opcode */
#define ATMEL_I2C_OPCODE_ECDH 0x43
#define ATMEL_I2C_OPCODE_GENKEY 0x40
#define ATMEL_I2C_OPCODE_READ 0x02
#define ATMEL_I2C_OPCODE_RANDOM 0x1b
#define ATMEL_I2C_OPCODE_WRITE 0x12
+#define ATMEL_I2C_OPCODE_SHA 0x47
/*
* Wake High delay to data communication (microseconds). SDA should be stable
@@ -244,6 +253,43 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
}
EXPORT_SYMBOL(atmel_i2c_init_ecdh_cmd);
+int atmel_i2c_init_sha_cmd(struct atmel_i2c_cmd *cmd,
+ u8 *challenge, size_t len,
+ enum atmel_i2c_sha_engine_cmd sha_engine_cmd,
+ const struct atmel_i2c_max_exec_timings *timings)
+{
+ cmd->word_addr = ATMEL_I2C_COMMAND;
+ cmd->opcode = ATMEL_I2C_OPCODE_SHA;
+ cmd->param1 = sha_engine_cmd;
+
+ cmd->param2 = cpu_to_le16(0);
+ /*
+ * Starting with the bigger ECCs, the device learned how to do SHA256
+ * padding (FIPS 180-4). Since SHA UPDATE always consumes 64B (SHA256
+ * block size), the only length needed to communicate is the number of
+ * used bytes in the final block. For the Atmel ECC series, this is
+ * passed in the param2.
+ */
+ if (sha_engine_cmd == atmel_sha_ecc_end)
+ cmd->param2 = cpu_to_le16(len);
+
+ cmd->count = ATMEL_I2C_COUNT_OVERHEAD_SIZE;
+ if (sha_engine_cmd == atmel_sha_init) {
+ memset(cmd->data, 0, sizeof(cmd->data));
+ } else {
+ memcpy(cmd->data, challenge, len);
+ cmd->count += len;
+ }
+
+ atmel_i2c_checksum(cmd);
+
+ cmd->msecs = timings->max_exec_time_sha;
+ cmd->rxsize = atmel_i2c_sha_rsp_size[sha_engine_cmd];
+
+ return 0;
+}
+EXPORT_SYMBOL(atmel_i2c_init_sha_cmd);
+
static void atmel_i2c_rng_done(struct atmel_i2c_work_data *work_data,
void *areq, int status)
{
@@ -492,21 +538,15 @@ static int atmel_i2c_sleep(struct i2c_client *client)
* counter other than to put the device into sleep or idle mode and then
* wake it up again.
*/
-int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
+static int _atmel_i2c_send_receive(struct i2c_client *client,
+ struct atmel_i2c_cmd *cmd)
{
- struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
int ret;
- mutex_lock(&i2c_priv->lock);
-
- ret = atmel_i2c_wakeup(client);
- if (ret)
- goto err;
-
/* send the command */
ret = i2c_master_send(client, (u8 *)cmd, cmd->count + ATMEL_I2C_ADDR_SIZE);
if (ret < 0)
- goto err;
+ return ret;
/* delay the appropriate amount of time for command to execute */
msleep(cmd->msecs);
@@ -514,6 +554,24 @@ int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
/* receive the response */
ret = i2c_master_recv(client, cmd->data, cmd->rxsize);
if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
+{
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ int ret;
+
+ mutex_lock(&i2c_priv->lock);
+
+ ret = atmel_i2c_wakeup(client);
+ if (ret)
+ goto err;
+
+ ret = _atmel_i2c_send_receive(client, cmd);
+ if (ret)
goto err;
/* put the device into low-power mode */
@@ -529,6 +587,203 @@ int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
}
EXPORT_SYMBOL(atmel_i2c_send_receive);
+int atmel_i2c_sha_init(struct ahash_request *req)
+{
+ struct atmel_i2c_sha_reqctx *rctx = ahash_request_ctx(req);
+ struct atmel_i2c_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(ctx->client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_cmd *cmd;
+ int ret;
+
+ rctx->bufcnt = 0;
+ rctx->total = 0;
+ rctx->ctx = i2c_get_clientdata(ctx->client);
+
+ cmd = kmalloc_obj(*cmd);
+ if (!cmd)
+ return -ENOMEM;
+
+ /* SHA init */
+ ret = atmel_i2c_init_sha_cmd(cmd, NULL, 0, atmel_sha_init, &data->timings);
+ if (ret)
+ goto err_free;
+
+ mutex_lock(&i2c_priv->lock);
+
+ ret = atmel_i2c_wakeup(ctx->client);
+ if (ret)
+ goto err;
+
+ ret = _atmel_i2c_send_receive(ctx->client, cmd);
+ if (ret)
+ goto err;
+
+ /* we keep the lock hold until error out or _sha_final() is called */
+ return 0;
+err:
+ mutex_unlock(&i2c_priv->lock);
+err_free:
+ kfree_sensitive(cmd);
+ return ret;
+}
+EXPORT_SYMBOL(atmel_i2c_sha_init);
+
+int atmel_i2c_sha_update(struct ahash_request *req)
+{
+ struct atmel_i2c_sha_reqctx *rctx = ahash_request_ctx(req);
+ struct atmel_i2c_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(ctx->client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_cmd *cmd;
+ struct crypto_hash_walk walk;
+ int nbytes, take, copied = 0;
+ const u8 *pdata;
+ int ret;
+
+ rctx->total += req->nbytes;
+
+ cmd = kmalloc_obj(*cmd);
+ if (!cmd) {
+ ret = -ENOMEM;
+ goto err_nomem;
+ }
+
+ /*
+ * Note, we are actively holding the i2c_priv->lock while the SHA engine
+ * operates. This covers init, update and final steps.
+ */
+ nbytes = crypto_hash_walk_first(req, &walk);
+ for (; nbytes > 0; nbytes = crypto_hash_walk_done(&walk, copied)) {
+ copied = nbytes;
+ pdata = walk.data;
+ while (copied > 0) {
+ take = min(copied, SHA256_BLOCK_SIZE - rctx->bufcnt);
+
+ memcpy(rctx->buffer + rctx->bufcnt, pdata, take);
+ pdata += take;
+ copied -= take;
+ rctx->bufcnt += take;
+ if (rctx->bufcnt == SHA256_BLOCK_SIZE) {
+ ret = atmel_i2c_init_sha_cmd(cmd, rctx->buffer,
+ SHA256_BLOCK_SIZE,
+ atmel_sha_compute,
+ &data->timings);
+ if (ret)
+ goto err;
+
+ ret = _atmel_i2c_send_receive(ctx->client, cmd);
+ if (ret)
+ goto err;
+
+ rctx->bufcnt = 0;
+ }
+ }
+ }
+
+ kfree_sensitive(cmd);
+ return 0;
+err:
+ kfree_sensitive(cmd);
+err_nomem:
+ mutex_unlock(&i2c_priv->lock);
+ return ret;
+}
+EXPORT_SYMBOL(atmel_i2c_sha_update);
+
+int atmel_i2c_sha_final(struct ahash_request *req)
+{
+ struct atmel_i2c_sha_reqctx *rctx = ahash_request_ctx(req);
+ struct atmel_i2c_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(ctx->client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_cmd *cmd;
+ u8 final_blocks[2 * SHA256_BLOCK_SIZE];
+ u32 total_pad;
+ __be64 bits;
+ int i, ret = 0;
+
+ cmd = kmalloc_obj(*cmd);
+ if (!cmd) {
+ ret = -ENOMEM;
+ goto err_nomem;
+ }
+
+ if (data->needs_sha_padding) {
+ /*
+ * Determine if padding fits in current block or needs another,
+ * SHA256 needs 8 bytes for length at the end of a 64-byte block.
+ */
+ memset(final_blocks, 0, sizeof(final_blocks));
+ memcpy(final_blocks, rctx->buffer, rctx->bufcnt);
+ final_blocks[rctx->bufcnt] = 0x80; /* pad bit */
+ total_pad = SHA256_BLOCK_SIZE * (rctx->bufcnt < 56 ? 1 : 2);
+ bits = cpu_to_be64((u64)rctx->total << 3); /* needs num of bits */
+ memcpy(final_blocks + total_pad - 8, &bits, 8);
+ for (i = 0; i < total_pad; i += SHA256_BLOCK_SIZE) {
+ ret = atmel_i2c_init_sha_cmd(cmd, final_blocks + i,
+ SHA256_BLOCK_SIZE,
+ atmel_sha_compute, &data->timings);
+ if (ret)
+ goto err_or_done;
+
+ ret = _atmel_i2c_send_receive(ctx->client, cmd);
+ if (ret)
+ goto err_or_done;
+ }
+ } else {
+ ret = atmel_i2c_init_sha_cmd(cmd, rctx->buffer, rctx->bufcnt,
+ atmel_sha_ecc_end, &data->timings);
+ if (ret)
+ goto err_or_done;
+
+ ret = _atmel_i2c_send_receive(ctx->client, cmd);
+ if (ret)
+ goto err_or_done;
+ }
+
+ memcpy(req->result, &cmd->data[ATMEL_I2C_RSP_DATA_IDX],
+ SHA256_DIGEST_SIZE);
+
+ /* Sleep returns a positive int on success, API requires 0 on success */
+ ret = atmel_i2c_sleep(ctx->client);
+ if (ret < 0)
+ goto err_or_done;
+ ret = 0;
+err_or_done:
+ kfree_sensitive(cmd);
+err_nomem:
+ mutex_unlock(&i2c_priv->lock);
+ return ret;
+}
+EXPORT_SYMBOL(atmel_i2c_sha_final);
+
+int atmel_i2c_sha_finup(struct ahash_request *req)
+{
+ return atmel_i2c_sha_update(req) ? : atmel_i2c_sha_final(req);
+}
+EXPORT_SYMBOL(atmel_i2c_sha_finup);
+
+int atmel_i2c_sha_digest(struct ahash_request *req)
+{
+ return atmel_i2c_sha_init(req) ? : atmel_i2c_sha_finup(req);
+}
+EXPORT_SYMBOL(atmel_i2c_sha_digest);
+
+int atmel_i2c_sha_export(struct ahash_request *req, void *out)
+{
+ memcpy(out, ahash_request_ctx(req), sizeof(struct atmel_i2c_sha_reqctx));
+ return 0;
+}
+EXPORT_SYMBOL(atmel_i2c_sha_export);
+
+int atmel_i2c_sha_import(struct ahash_request *req, const void *in)
+{
+ memcpy(ahash_request_ctx(req), in, sizeof(struct atmel_i2c_sha_reqctx));
+ return 0;
+}
+EXPORT_SYMBOL(atmel_i2c_sha_import);
+
static void atmel_i2c_work_handler(struct work_struct *work)
{
struct atmel_i2c_work_data *work_data =
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index 20afe2da4f8d..e0021d4ea686 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -7,8 +7,11 @@
#ifndef __ATMEL_I2C_H__
#define __ATMEL_I2C_H__
+#include <linux/device.h>
+#include <crypto/internal/hash.h>
#include <linux/hw_random.h>
#include <linux/types.h>
+#include <crypto/sha2.h>
#define ATMEL_I2C_PRIORITY 300
@@ -79,11 +82,13 @@ struct atmel_i2c_max_exec_timings {
unsigned int max_exec_time_ecdh;
unsigned int max_exec_time_random;
unsigned int max_exec_time_read;
+ unsigned int max_exec_time_sha;
unsigned int max_exec_time_write;
};
struct atmel_i2c_of_match_data {
const unsigned short needs_legacy_hwrng;
+ const unsigned short needs_sha_padding;
struct atmel_i2c_max_exec_timings timings;
size_t eeprom_zone_size[3]; /* all atmel devices have three zones */
};
@@ -91,6 +96,30 @@ struct atmel_i2c_of_match_data {
/* Used for binding tfm objects to i2c clients. */
enum atmel_i2c_capability {
ATMEL_CAP_ECDH = 0,
+ ATMEL_CAP_SHA,
+};
+
+enum atmel_i2c_sha_engine_cmd {
+ atmel_sha_init = 0,
+ atmel_sha_compute,
+ atmel_sha_ecc_end,
+};
+
+size_t atmel_i2c_sha_rsp_size[] = {
+ [atmel_sha_init] = ATMEL_I2C_STATUS_RSP_SIZE,
+ [atmel_sha_compute] = SHA256_DIGEST_SIZE + ATMEL_I2C_RSP_OVERHEAD_SIZE,
+ [atmel_sha_ecc_end] = SHA256_DIGEST_SIZE + ATMEL_I2C_RSP_OVERHEAD_SIZE,
+};
+
+struct atmel_i2c_sha_ctx {
+ struct i2c_client *client;
+};
+
+struct atmel_i2c_sha_reqctx {
+ u8 buffer[SHA256_BLOCK_SIZE];
+ size_t bufcnt;
+ size_t total; /* size of full input, needed for padding */
+ struct atmel_i2c_client_priv *ctx;
};
struct atmel_i2c_client_mgmt {
@@ -172,9 +201,20 @@ void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
struct scatterlist *pubkey,
const struct atmel_i2c_max_exec_timings *timings);
+int atmel_i2c_init_sha_cmd(struct atmel_i2c_cmd *cmd, u8 *challenge, size_t len,
+ enum atmel_i2c_sha_engine_cmd sha_engine_cmd,
+ const struct atmel_i2c_max_exec_timings *timings);
int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
struct device *dev);
+int atmel_i2c_sha_init(struct ahash_request *req);
+int atmel_i2c_sha_update(struct ahash_request *req);
+int atmel_i2c_sha_final(struct ahash_request *req);
+int atmel_i2c_sha_finup(struct ahash_request *req);
+int atmel_i2c_sha_digest(struct ahash_request *req);
+int atmel_i2c_sha_export(struct ahash_request *req, void *out);
+int atmel_i2c_sha_import(struct ahash_request *req, const void *in);
+
int atmel_i2c_device_sanity_check(struct i2c_client *client);
ssize_t atmel_i2c_eeprom_display(struct device *dev,
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index 6a41024ae40d..74535480edeb 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -17,8 +17,48 @@
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/workqueue.h>
+#include <crypto/sha2.h>
+
#include "atmel-i2c.h"
+static int atmel_sha204a_sha_init_tfm(struct crypto_tfm *tfm)
+{
+ struct atmel_i2c_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+
+ ctx->client = atmel_i2c_client_alloc(ATMEL_CAP_SHA);
+ if (IS_ERR(ctx->client)) {
+ pr_err("tfm - i2c_client binding failed\n");
+ return PTR_ERR(ctx->client);
+ }
+
+ return 0;
+}
+
+static struct ahash_alg atmel_sha204a_sha = {
+ .init = atmel_i2c_sha_init,
+ .update = atmel_i2c_sha_update,
+ .final = atmel_i2c_sha_final,
+ .finup = atmel_i2c_sha_finup,
+ .digest = atmel_i2c_sha_digest,
+ .export = atmel_i2c_sha_export,
+ .import = atmel_i2c_sha_import,
+ .halg = {
+ .digestsize = SHA256_DIGEST_SIZE,
+ .statesize = sizeof(struct atmel_i2c_sha_reqctx),
+ .base = {
+ .cra_name = "sha256",
+ .cra_driver_name = "atmel-sha256",
+ .cra_init = atmel_sha204a_sha_init_tfm,
+ .cra_priority = ATMEL_I2C_PRIORITY,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH,
+ .cra_blocksize = SHA256_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct atmel_i2c_sha_ctx),
+ .cra_reqsize = sizeof(struct atmel_i2c_sha_reqctx),
+ .cra_module = THIS_MODULE,
+ }
+ }
+};
+
static ssize_t config_show(struct device *dev, struct device_attribute *attr, char *buf)
{
return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_CONFIG_ZONE);
@@ -62,7 +102,7 @@ static int atmel_sha204a_probe(struct i2c_client *client)
i2c_priv = i2c_get_clientdata(client);
i2c_priv->data = data;
- i2c_priv->caps = 0;
+ i2c_priv->caps = BIT(ATMEL_CAP_SHA);
ret = atmel_i2c_device_sanity_check(client);
if (ret) {
@@ -95,6 +135,13 @@ static int atmel_sha204a_probe(struct i2c_client *client)
goto err_list_del;
}
+ /* register algorithms */
+ ret = crypto_register_ahash(&atmel_sha204a_sha);
+ if (ret) {
+ dev_err(&client->dev, "SHA256 registration failed\n");
+ goto err_list_del;
+ }
+
goto done;
err_list_del:
@@ -119,6 +166,8 @@ static void atmel_sha204a_remove(struct i2c_client *client)
devm_hwrng_unregister(&client->dev, &i2c_priv->hwrng);
atmel_i2c_flush_queue();
+ crypto_unregister_ahash(&atmel_sha204a_sha);
+
if (i2c_priv->hwrng.priv) {
kfree((void *)i2c_priv->hwrng.priv);
i2c_priv->hwrng.priv = 0;
@@ -130,6 +179,7 @@ static const struct atmel_i2c_of_match_data atsha204_match_data = {
.max_exec_time_genkey = 43,
.max_exec_time_random = 50,
.max_exec_time_read = 4,
+ .max_exec_time_sha = 22,
.max_exec_time_write = 42,
},
.eeprom_zone_size = {
@@ -142,6 +192,7 @@ static const struct atmel_i2c_of_match_data atsha204_match_data = {
* [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html
*/
.needs_legacy_hwrng = 1,
+ .needs_sha_padding = 1,
};
static const struct atmel_i2c_of_match_data atsha204a_match_data = {
@@ -149,6 +200,7 @@ static const struct atmel_i2c_of_match_data atsha204a_match_data = {
.max_exec_time_genkey = 43,
.max_exec_time_random = 50,
.max_exec_time_read = 4,
+ .max_exec_time_sha = 22,
.max_exec_time_write = 42,
},
.eeprom_zone_size = {
@@ -156,6 +208,7 @@ static const struct atmel_i2c_of_match_data atsha204a_match_data = {
[ATMEL_EEPROM_OTP_ZONE] = 64,
[ATMEL_EEPROM_DATA_ZONE] = 512
},
+ .needs_sha_padding = 1,
};
static const struct of_device_id atmel_sha204a_dt_ids[] __maybe_unused = {
--
2.53.0
^ permalink raw reply related
* [PATCH 11/12] crypto: atmel - refactor and localize driver constants
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
After refactoring the client drivers to use the shared atmel-i2c core,
many constants and definitions no longer need global visibility.
Move command definitions, timing constants, status codes and related
helpers from the public header into the local compile unit of the core
driver where possible.
As part of this cleanup, rename macros and constants to use consistent
ATMEL_I2C_* naming and align them with common kernel driver conventions.
Also replace remaining hardcoded values with named constants throughout
the driver.
This is a preparatory cleanup and does not change functionality.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 4 +-
drivers/crypto/atmel-i2c.c | 115 +++++++++++++++++++++++++------------
drivers/crypto/atmel-i2c.h | 76 +++++++++---------------
3 files changed, 108 insertions(+), 87 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index 9ad6d42b6eef..ed8c0ce5562b 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -137,7 +137,7 @@ static int atmel_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf,
ctx->do_fallback = false;
- atmel_i2c_init_genkey_cmd(cmd, DATA_SLOT_2, &data->timings);
+ atmel_i2c_init_genkey_cmd(cmd, ATMEL_I2C_ECDH_SLOT_DEFAULT, &data->timings);
ret = atmel_i2c_send_receive(ctx->client, cmd);
if (ret)
@@ -296,7 +296,7 @@ static struct kpp_alg atmel_ecdh_nist_p256 = {
.cra_flags = CRYPTO_ALG_NEED_FALLBACK,
.cra_name = "ecdh-nist-p256",
.cra_driver_name = "atmel-ecdh",
- .cra_priority = ATMEL_ECC_PRIORITY,
+ .cra_priority = ATMEL_I2C_PRIORITY,
.cra_module = THIS_MODULE,
.cra_ctxsize = sizeof(struct atmel_ecdh_ctx),
},
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index 0ec2d768a763..53aba2f4bedb 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -21,19 +21,62 @@
#include <linux/workqueue.h>
#include "atmel-i2c.h"
-#define ATMEL_I2C_COMMAND 0x03 /* packet function */
+#define ATMEL_I2C_COMMAND 0x03 /* packet function */
+#define ATMEL_I2C_SLEEP_TOKEN 0x01
/* Definitions for the device lock state */
-#define ATMEL_I2C_DEVICE_LOCK_ADDR 0x15
-#define ATMEL_I2C_LOCK_VALUE_IDX (ATMEL_I2C_RSP_DATA_IDX + 2)
-#define ATMEL_I2C_LOCK_CONFIG_IDX (ATMEL_I2C_RSP_DATA_IDX + 3)
+#define ATMEL_I2C_DEVICE_LOCK_ADDR 0x15
+#define ATMEL_I2C_LOCK_VALUE_IDX (ATMEL_I2C_RSP_DATA_IDX + 2)
+#define ATMEL_I2C_LOCK_CONFIG_IDX (ATMEL_I2C_RSP_DATA_IDX + 3)
+
+/* Definitions for the READ Command */
+#define ATMEL_I2C_READ_COUNT ATMEL_I2C_COUNT_OVERHEAD_SIZE
+#define ATMEL_I2C_READ_RSP_SIZE (4 + ATMEL_I2C_RSP_OVERHEAD_SIZE)
+
+/* Definitions for the RANDOM Command */
+#define ATMEL_I2C_RANDOM_COUNT ATMEL_I2C_COUNT_OVERHEAD_SIZE
+#define ATMEL_I2C_RNG_BLOCK_SIZE 32
+#define ATMEL_I2C_RANDOM_RSP_SIZE (ATMEL_I2C_RNG_BLOCK_SIZE + \
+ ATMEL_I2C_RSP_OVERHEAD_SIZE)
+#define ATMEL_I2C_RANDOM_COUNT ATMEL_I2C_COUNT_OVERHEAD_SIZE
+
+/* Definitions for the GenKey Command */
+#define ATMEL_I2C_GENKEY_COUNT ATMEL_I2C_COUNT_OVERHEAD_SIZE
+#define ATMEL_I2C_GENKEY_MODE_PRIVATE 0x04
+
+/* Definitions for the ECDH Command */
+#define ATMEL_I2C_ECDH_COUNT 71
+#define ATMEL_I2C_ECDH_RSP_SIZE (32 + ATMEL_I2C_RSP_OVERHEAD_SIZE)
+#define ATMEL_I2C_ECDH_PREFIX_MODE 0x00
/* Command opcode */
-#define ATMEL_I2C_OPCODE_ECDH 0x43
-#define ATMEL_I2C_OPCODE_GENKEY 0x40
-#define ATMEL_I2C_OPCODE_READ 0x02
-#define ATMEL_I2C_OPCODE_RANDOM 0x1b
-#define ATMEL_I2C_OPCODE_WRITE 0x12
+#define ATMEL_I2C_OPCODE_ECDH 0x43
+#define ATMEL_I2C_OPCODE_GENKEY 0x40
+#define ATMEL_I2C_OPCODE_READ 0x02
+#define ATMEL_I2C_OPCODE_RANDOM 0x1b
+#define ATMEL_I2C_OPCODE_WRITE 0x12
+
+/*
+ * Wake High delay to data communication (microseconds). SDA should be stable
+ * high for this entire duration.
+ */
+#define ATMEL_I2C_TWHI_MIN 1500
+#define ATMEL_I2C_TWHI_MAX 1550
+
+/* Wake Low duration */
+#define ATMEL_I2C_TWLO_USEC 60
+
+/* Status/Error codes */
+enum atmel_i2c_error_codes {
+ ATMEL_STATUS_OK_NOERR = 0x00, /* success */
+ ATMEL_STATUS_CHECKMAC_OR_VERIFY_MISCOMPARE = 0x01,
+ ATMEL_STATUS_PARSE_ERROR = 0x03,
+ ATMEL_STATUS_ECC_FAULT = 0x05,
+ ATMEL_STATUS_EXECUTION_FAULT = 0x0F,
+ ATMEL_STATUS_OK_WAKE_SUCCESSFULL = 0x11, /* success */
+ ATMEL_STATUS_WATCHDOG_EXPIRE = 0xEE,
+ ATMEL_STATUS_CRC_ERROR = 0xFF,
+};
struct atmel_i2c_client_mgmt atmel_i2c_mgmt = {
.i2c_list_lock = __SPIN_LOCK_UNLOCKED(atmel_i2c_mgmt.i2c_list_lock),
@@ -45,12 +88,12 @@ static const struct {
u8 value;
const char *error_text;
} error_list[] = {
- { 0x01, "CheckMac or Verify miscompare" },
- { 0x03, "Parse Error" },
- { 0x05, "ECC Fault" },
- { 0x0F, "Execution Error" },
- { 0xEE, "Watchdog about to expire" },
- { 0xFF, "CRC or other communication error" },
+ { ATMEL_STATUS_CHECKMAC_OR_VERIFY_MISCOMPARE, "CheckMac or Verify miscompare" },
+ { ATMEL_STATUS_PARSE_ERROR, "Parse Error" },
+ { ATMEL_STATUS_ECC_FAULT, "ECC Fault" },
+ { ATMEL_STATUS_EXECUTION_FAULT, "Execution Error" },
+ { ATMEL_STATUS_WATCHDOG_EXPIRE, "Watchdog about to expire" },
+ { ATMEL_STATUS_CRC_ERROR, "CRC or other communication error" },
};
/**
@@ -65,7 +108,7 @@ static const struct {
static void atmel_i2c_checksum(struct atmel_i2c_cmd *cmd)
{
u8 *data = &cmd->count;
- size_t len = cmd->count - CRC_SIZE;
+ size_t len = cmd->count - ATMEL_I2C_CRC_SIZE;
__le16 *__crc16 = (__le16 *)(data + len);
*__crc16 = cpu_to_le16(bitrev16(crc16(0, data, len)));
@@ -141,12 +184,12 @@ void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
cmd->opcode = ATMEL_I2C_OPCODE_RANDOM;
cmd->param1 = 0;
cmd->param2 = 0;
- cmd->count = RANDOM_COUNT;
+ cmd->count = ATMEL_I2C_RANDOM_COUNT;
atmel_i2c_checksum(cmd);
cmd->msecs = timings->max_exec_time_random;
- cmd->rxsize = RANDOM_RSP_SIZE;
+ cmd->rxsize = ATMEL_I2C_RANDOM_RSP_SIZE;
}
EXPORT_SYMBOL(atmel_i2c_init_random_cmd);
@@ -154,16 +197,16 @@ void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
const struct atmel_i2c_max_exec_timings *timings)
{
cmd->word_addr = ATMEL_I2C_COMMAND;
- cmd->count = GENKEY_COUNT;
+ cmd->count = ATMEL_I2C_GENKEY_COUNT;
cmd->opcode = ATMEL_I2C_OPCODE_GENKEY;
- cmd->param1 = GENKEY_MODE_PRIVATE;
+ cmd->param1 = ATMEL_I2C_GENKEY_MODE_PRIVATE;
/* a random private key will be generated and stored in slot keyID */
cmd->param2 = cpu_to_le16(keyid);
atmel_i2c_checksum(cmd);
cmd->msecs = timings->max_exec_time_genkey;
- cmd->rxsize = GENKEY_RSP_SIZE;
+ cmd->rxsize = ATMEL_I2C_GENKEY_RSP_SIZE;
}
EXPORT_SYMBOL(atmel_i2c_init_genkey_cmd);
@@ -174,11 +217,11 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
size_t copied;
cmd->word_addr = ATMEL_I2C_COMMAND;
- cmd->count = ECDH_COUNT;
+ cmd->count = ATMEL_I2C_ECDH_COUNT;
cmd->opcode = ATMEL_I2C_OPCODE_ECDH;
- cmd->param1 = ECDH_PREFIX_MODE;
+ cmd->param1 = ATMEL_I2C_ECDH_PREFIX_MODE;
/* private key slot */
- cmd->param2 = cpu_to_le16(DATA_SLOT_2);
+ cmd->param2 = cpu_to_le16(ATMEL_I2C_ECDH_SLOT_DEFAULT);
/*
* The device only supports NIST P256 ECC keys. The public key size will
@@ -195,7 +238,7 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
atmel_i2c_checksum(cmd);
cmd->msecs = timings->max_exec_time_ecdh;
- cmd->rxsize = ECDH_RSP_SIZE;
+ cmd->rxsize = ATMEL_I2C_ECDH_RSP_SIZE;
return 0;
}
@@ -231,7 +274,7 @@ static int atmel_i2c_rng_read_nonblocking(struct hwrng *rng, void *buf,
if (rng->priv) {
work_data = (struct atmel_i2c_work_data *)rng->priv;
- max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
+ max = min(ATMEL_I2C_RANDOM_RSP_SIZE - ATMEL_I2C_RSP_OVERHEAD_SIZE, max);
memcpy(buf, &work_data->cmd.data[ATMEL_I2C_RSP_DATA_IDX], max);
rng->priv = 0;
} else {
@@ -271,7 +314,7 @@ static int atmel_i2c_rng_read(struct hwrng *rng, void *buf, size_t max,
if (ret)
return ret;
- max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
+ max = min(ATMEL_I2C_RANDOM_RSP_SIZE - ATMEL_I2C_RSP_OVERHEAD_SIZE, max);
memcpy(buf, &cmd.data[ATMEL_I2C_RSP_DATA_IDX], max);
return max;
@@ -323,7 +366,7 @@ static int atmel_i2c_eeprom_read(struct i2c_client *client, u16 addr,
goto err;
}
- memcpy(buf, cmd->data + ATMEL_I2C_RSP_DATA_IDX, 4);
+ memcpy(buf, cmd->data + ATMEL_I2C_RSP_DATA_IDX, ATMEL_I2C_STATUS_RSP_SIZE);
err:
kfree(cmd);
@@ -381,10 +424,10 @@ static int atmel_i2c_status(struct device *dev, u8 *status)
int i;
u8 err_id = status[1];
- if (*status != STATUS_SIZE)
+ if (*status != ATMEL_I2C_STATUS_RSP_SIZE)
return 0;
- if (err_id == STATUS_WAKE_SUCCESSFUL || err_id == STATUS_NOERR)
+ if (err_id == ATMEL_STATUS_OK_WAKE_SUCCESSFULL || err_id == ATMEL_STATUS_OK_NOERR)
return 0;
for (i = 0; i < err_list_len; i++)
@@ -403,7 +446,7 @@ static int atmel_i2c_status(struct device *dev, u8 *status)
static int atmel_i2c_wakeup(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
- u8 status[STATUS_RSP_SIZE];
+ u8 status[ATMEL_I2C_STATUS_RSP_SIZE];
int ret;
/*
@@ -418,9 +461,9 @@ static int atmel_i2c_wakeup(struct i2c_client *client)
* Wait to wake the device. Typical execution times for ecdh and genkey
* are around tens of milliseconds. Delta is chosen to 50 microseconds.
*/
- usleep_range(TWHI_MIN, TWHI_MAX);
+ usleep_range(ATMEL_I2C_TWHI_MIN, ATMEL_I2C_TWHI_MAX);
- ret = i2c_master_recv(client, status, STATUS_SIZE);
+ ret = i2c_master_recv(client, status, ATMEL_I2C_STATUS_RSP_SIZE);
if (ret < 0)
return ret;
@@ -429,7 +472,7 @@ static int atmel_i2c_wakeup(struct i2c_client *client)
static int atmel_i2c_sleep(struct i2c_client *client)
{
- u8 sleep = SLEEP_TOKEN;
+ u8 sleep = ATMEL_I2C_SLEEP_TOKEN;
return i2c_master_send(client, &sleep, 1);
}
@@ -461,7 +504,7 @@ int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
goto err;
/* send the command */
- ret = i2c_master_send(client, (u8 *)cmd, cmd->count + WORD_ADDR_SIZE);
+ ret = i2c_master_send(client, (u8 *)cmd, cmd->count + ATMEL_I2C_ADDR_SIZE);
if (ret < 0)
goto err;
@@ -521,7 +564,7 @@ EXPORT_SYMBOL(atmel_i2c_flush_queue);
static inline size_t atmel_i2c_wake_token_sz(u32 bus_clk_rate)
{
- u32 no_of_bits = DIV_ROUND_UP(TWLO_USEC * bus_clk_rate, USEC_PER_SEC);
+ u32 no_of_bits = DIV_ROUND_UP(ATMEL_I2C_TWLO_USEC * bus_clk_rate, USEC_PER_SEC);
/* return the size of the wake_token in bytes */
return DIV_ROUND_UP(no_of_bits, 8);
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index 2f76e107340e..20afe2da4f8d 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -10,28 +10,39 @@
#include <linux/hw_random.h>
#include <linux/types.h>
-#define ATMEL_ECC_PRIORITY 300
+#define ATMEL_I2C_PRIORITY 300
-#define SLEEP_TOKEN 0x01
-#define WAKE_TOKEN_MAX_SIZE 8
+#define ATMEL_I2C_WAKE_TOKEN_MAX_SIZE 8
/* Definitions of Data and Command sizes */
-#define WORD_ADDR_SIZE 1
-#define COUNT_SIZE 1
-#define CRC_SIZE 2
-#define CMD_OVERHEAD_SIZE (COUNT_SIZE + CRC_SIZE)
+#define ATMEL_I2C_ADDR_SIZE 1
+#define ATMEL_I2C_OPCODE_SIZE 1
+#define ATMEL_I2C_COUNT_SIZE 1
+#define ATMEL_I2C_PARAM1_SIZE 1
+#define ATMEL_I2C_PARAM2_SIZE 2
+#define ATMEL_I2C_CRC_SIZE 2
+
+#define ATMEL_I2C_RSP_OVERHEAD_SIZE (ATMEL_I2C_COUNT_SIZE + \
+ ATMEL_I2C_CRC_SIZE)
+#define ATMEL_I2C_COUNT_OVERHEAD_SIZE (ATMEL_I2C_OPCODE_SIZE + \
+ ATMEL_I2C_COUNT_SIZE + \
+ ATMEL_I2C_PARAM1_SIZE + \
+ ATMEL_I2C_PARAM2_SIZE + \
+ ATMEL_I2C_CRC_SIZE)
+
+/* Definitions for the status Command */
+#define ATMEL_I2C_STATUS_RSP_SIZE 4
/* size in bytes of the n prime */
#define ATMEL_ECC_NIST_P256_N_SIZE 32
#define ATMEL_ECC_PUBKEY_SIZE (2 * ATMEL_ECC_NIST_P256_N_SIZE)
+#define ATMEL_I2C_GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \
+ ATMEL_I2C_RSP_OVERHEAD_SIZE)
+#define ATMEL_I2C_MAX_RSP_SIZE ATMEL_I2C_GENKEY_RSP_SIZE
-#define STATUS_RSP_SIZE 4
-#define ECDH_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
-#define GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \
- CMD_OVERHEAD_SIZE)
-#define ATMEL_I2C_READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE)
-#define RANDOM_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
-#define MAX_RSP_SIZE GENKEY_RSP_SIZE
+/* Definitions for Indexes common to all commands */
+#define ATMEL_I2C_RSP_DATA_IDX 1 /* buffer index of data in response */
+#define ATMEL_I2C_ECDH_SLOT_DEFAULT 2
/**
* atmel_i2c_cmd - structure used for communicating with the device.
@@ -51,7 +62,7 @@ struct atmel_i2c_cmd {
u8 opcode;
u8 param1;
__le16 param2;
- u8 data[MAX_RSP_SIZE];
+ u8 data[ATMEL_I2C_MAX_RSP_SIZE];
u8 msecs;
u16 rxsize;
} __packed;
@@ -77,39 +88,6 @@ struct atmel_i2c_of_match_data {
size_t eeprom_zone_size[3]; /* all atmel devices have three zones */
};
-/* Status/Error codes */
-#define STATUS_SIZE 0x04
-#define STATUS_NOERR 0x00
-#define STATUS_WAKE_SUCCESSFUL 0x11
-
-/* Definitions for Indexes common to all commands */
-#define ATMEL_I2C_RSP_DATA_IDX 1 /* buffer index of data in response */
-#define DATA_SLOT_2 2 /* used for ECDH private key */
-
-/*
- * Wake High delay to data communication (microseconds). SDA should be stable
- * high for this entire duration.
- */
-#define TWHI_MIN 1500
-#define TWHI_MAX 1550
-
-/* Wake Low duration */
-#define TWLO_USEC 60
-
-/* Definitions for the READ Command */
-#define ATMEL_I2C_READ_COUNT 7
-
-/* Definitions for the RANDOM Command */
-#define RANDOM_COUNT 7
-
-/* Definitions for the GenKey Command */
-#define GENKEY_COUNT 7
-#define GENKEY_MODE_PRIVATE 0x04
-
-/* Definitions for the ECDH Command */
-#define ECDH_COUNT 71
-#define ECDH_PREFIX_MODE 0x00
-
/* Used for binding tfm objects to i2c clients. */
enum atmel_i2c_capability {
ATMEL_CAP_ECDH = 0,
@@ -144,7 +122,7 @@ struct atmel_i2c_client_priv {
struct i2c_client *client;
struct list_head i2c_client_list_node;
struct mutex lock;
- u8 wake_token[WAKE_TOKEN_MAX_SIZE];
+ u8 wake_token[ATMEL_I2C_WAKE_TOKEN_MAX_SIZE];
size_t wake_token_sz;
atomic_t tfm_count ____cacheline_aligned;
struct hwrng hwrng;
--
2.53.0
^ permalink raw reply related
* [PATCH 10/12] crypto: atmel - update workqueue flags and add flush on exit
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Update workqueue initialization to use WQ_MEM_RECLAIM instead of
WQ_PERCPU. WQ_MEM_RECLAIM already provides per-CPU execution
semantics via a bound workqueue while also ensuring forward progress
via a rescue thread.
Add a flush_workqueue() call during module exit to ensure all queued
work is completed before destroying the workqueue.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-i2c.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index 50b6bce478d2..0ec2d768a763 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -626,12 +626,13 @@ EXPORT_SYMBOL(atmel_i2c_probe);
static int __init atmel_i2c_init(void)
{
- atmel_wq = alloc_workqueue("atmel_wq", WQ_PERCPU, 0);
+ atmel_wq = alloc_workqueue("atmel_wq", WQ_MEM_RECLAIM, 0);
return atmel_wq ? 0 : -ENOMEM;
}
static void __exit atmel_i2c_exit(void)
{
+ flush_workqueue(atmel_wq);
destroy_workqueue(atmel_wq);
}
--
2.53.0
^ permalink raw reply related
* [PATCH 05/12] crypto: atmel - move RNG support into common i2c core
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Move the hardware RNG implementation from atmel-sha204a into the
shared atmel-i2c core.
The ATSHA204(A) and ATECC devices provide compatible RANDOM commands
through the common Atmel I2C interface. Consolidate the RNG handling in
the core driver and provide a shared atmel_i2c_register_rng() helper for
registering the hwrng device.
This removes duplicated RNG code from atmel-sha204a and enables RNG
support for other compatible Atmel devices, including the ECC family.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 12 ++++
drivers/crypto/atmel-i2c.c | 93 ++++++++++++++++++++++++++
drivers/crypto/atmel-i2c.h | 4 +-
drivers/crypto/atmel-sha204a.c | 115 +++++----------------------------
4 files changed, 123 insertions(+), 101 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index 7793f7b4e97e..67fa5975fa7f 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -306,6 +306,13 @@ static int atmel_ecc_probe(struct i2c_client *client)
&atmel_i2c_mgmt.i2c_client_list);
spin_unlock(&atmel_i2c_mgmt.i2c_list_lock);
+ /* register rng */
+ ret = atmel_i2c_register_rng(i2c_priv, &client->dev);
+ if (ret) {
+ dev_err(&client->dev, "failed to register hw_random\n");
+ goto err_list_del;
+ }
+
/* register algorithms */
ret = crypto_register_kpp(&atmel_ecdh_nist_p256);
if (ret) {
@@ -349,6 +356,11 @@ static void atmel_ecc_remove(struct i2c_client *client)
atmel_i2c_flush_queue();
crypto_unregister_kpp(&atmel_ecdh_nist_p256);
+
+ if (i2c_priv->hwrng.priv) {
+ kfree((void *)i2c_priv->hwrng.priv);
+ i2c_priv->hwrng.priv = 0;
+ }
}
static const struct atmel_i2c_of_match_data atecc508a_match_data = {
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index 7fa7cf9ab3c1..d451017171d8 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -208,6 +208,99 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
}
EXPORT_SYMBOL(atmel_i2c_init_ecdh_cmd);
+static void atmel_i2c_rng_done(struct atmel_i2c_work_data *work_data,
+ void *areq, int status)
+{
+ struct atmel_i2c_client_priv *i2c_priv = work_data->ctx;
+ struct hwrng *rng = areq;
+
+ if (status)
+ dev_warn_ratelimited(&i2c_priv->client->dev,
+ "i2c transaction failed (%d)\n",
+ status);
+
+ rng->priv = (unsigned long)work_data;
+ atomic_dec(&i2c_priv->tfm_count);
+}
+
+static int atmel_i2c_rng_read_nonblocking(struct hwrng *rng, void *buf,
+ size_t max)
+{
+ struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
+ struct atmel_i2c_client_priv,
+ hwrng);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_work_data *work_data;
+
+ /* keep maximum 1 asynchronous read in flight at any time */
+ if (!atomic_add_unless(&i2c_priv->tfm_count, 1, 1))
+ return 0;
+
+ if (rng->priv) {
+ work_data = (struct atmel_i2c_work_data *)rng->priv;
+ max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
+ memcpy(buf, &work_data->cmd.data[RSP_DATA_IDX], max);
+ rng->priv = 0;
+ } else {
+ work_data = kmalloc_obj(*work_data, GFP_ATOMIC);
+ if (!work_data) {
+ atomic_dec(&i2c_priv->tfm_count);
+ return -ENOMEM;
+ }
+ work_data->ctx = i2c_priv;
+ work_data->client = i2c_priv->client;
+
+ max = 0;
+ }
+
+ atmel_i2c_init_random_cmd(&work_data->cmd, &data->timings);
+ atmel_i2c_enqueue(work_data, atmel_i2c_rng_done, rng);
+
+ return max;
+}
+
+static int atmel_i2c_rng_read(struct hwrng *rng, void *buf, size_t max,
+ bool wait)
+{
+ struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
+ struct atmel_i2c_client_priv,
+ hwrng);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_cmd cmd;
+ int ret;
+
+ if (!wait)
+ return atmel_i2c_rng_read_nonblocking(rng, buf, max);
+
+ atmel_i2c_init_random_cmd(&cmd, &data->timings);
+
+ ret = atmel_i2c_send_receive(i2c_priv->client, &cmd);
+ if (ret)
+ return ret;
+
+ max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
+ memcpy(buf, &cmd.data[RSP_DATA_IDX], max);
+
+ return max;
+}
+
+int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
+ struct device *dev)
+{
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+
+ memset(&i2c_priv->hwrng, 0, sizeof(i2c_priv->hwrng));
+
+ i2c_priv->hwrng.name = dev_name(dev);
+ i2c_priv->hwrng.read = atmel_i2c_rng_read;
+
+ if (data->needs_legacy_hwrng)
+ i2c_priv->hwrng.quality = data->needs_legacy_hwrng;
+
+ return devm_hwrng_register(dev, &i2c_priv->hwrng);
+}
+EXPORT_SYMBOL(atmel_i2c_register_rng);
+
/*
* After wake and after execution of a command, there will be error, status, or
* result bytes in the device's output register that can be retrieved by the
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index 5224a62c16c9..5f6c9ff0cf64 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -66,7 +66,7 @@ struct atmel_i2c_max_exec_timings {
};
struct atmel_i2c_of_match_data {
- const unsigned short *legacy_hwrng;
+ const unsigned short needs_legacy_hwrng;
struct atmel_i2c_max_exec_timings timings;
};
@@ -209,6 +209,8 @@ void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
struct scatterlist *pubkey,
const struct atmel_i2c_max_exec_timings *timings);
+int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
+ struct device *dev);
struct i2c_client *atmel_i2c_client_alloc(enum atmel_i2c_capability cap);
void atmel_i2c_unregister_client(struct atmel_i2c_client_priv *i2c_priv);
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index febf9891b167..ae24d8fbabf9 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -19,88 +19,6 @@
#include <linux/workqueue.h>
#include "atmel-i2c.h"
-/*
- * According to review by Bill Cox [1], the ATSHA204 has very low entropy.
- * [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html
- */
-static const unsigned short atsha204_quality = 1;
-
-static void atmel_sha204a_rng_done(struct atmel_i2c_work_data *work_data,
- void *areq, int status)
-{
- struct atmel_i2c_client_priv *i2c_priv = work_data->ctx;
- struct hwrng *rng = areq;
-
- if (status)
- dev_warn_ratelimited(&i2c_priv->client->dev,
- "i2c transaction failed (%d)\n",
- status);
-
- rng->priv = (unsigned long)work_data;
- atomic_dec(&i2c_priv->tfm_count);
-}
-
-static int atmel_sha204a_rng_read_nonblocking(struct hwrng *rng, void *buf,
- size_t max)
-{
- struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
- struct atmel_i2c_client_priv,
- hwrng);
- const struct atmel_i2c_of_match_data *data = i2c_priv->data;
- struct atmel_i2c_work_data *work_data;
-
- /* keep maximum 1 asynchronous read in flight at any time */
- if (!atomic_add_unless(&i2c_priv->tfm_count, 1, 1))
- return 0;
-
- if (rng->priv) {
- work_data = (struct atmel_i2c_work_data *)rng->priv;
- max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(buf, &work_data->cmd.data[RSP_DATA_IDX], max);
- rng->priv = 0;
- } else {
- work_data = kmalloc_obj(*work_data, GFP_ATOMIC);
- if (!work_data) {
- atomic_dec(&i2c_priv->tfm_count);
- return -ENOMEM;
- }
- work_data->ctx = i2c_priv;
- work_data->client = i2c_priv->client;
-
- max = 0;
- }
-
- atmel_i2c_init_random_cmd(&work_data->cmd, &data->timings);
- atmel_i2c_enqueue(work_data, atmel_sha204a_rng_done, rng);
-
- return max;
-}
-
-static int atmel_sha204a_rng_read(struct hwrng *rng, void *buf, size_t max,
- bool wait)
-{
- struct atmel_i2c_client_priv *i2c_priv = container_of(rng,
- struct atmel_i2c_client_priv,
- hwrng);
- const struct atmel_i2c_of_match_data *data = i2c_priv->data;
- struct atmel_i2c_cmd cmd;
- int ret;
-
- if (!wait)
- return atmel_sha204a_rng_read_nonblocking(rng, buf, max);
-
- atmel_i2c_init_random_cmd(&cmd, &data->timings);
-
- ret = atmel_i2c_send_receive(i2c_priv->client, &cmd);
- if (ret)
- return ret;
-
- max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(buf, &cmd.data[RSP_DATA_IDX], max);
-
- return max;
-}
-
static int atmel_sha204a_otp_read(struct i2c_client *client, u16 addr, u8 *otp)
{
struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
@@ -169,7 +87,6 @@ static int atmel_sha204a_probe(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv;
const struct atmel_i2c_of_match_data *data;
- const unsigned short *quality;
int ret;
ret = atmel_i2c_probe(client);
@@ -193,25 +110,16 @@ static int atmel_sha204a_probe(struct i2c_client *client)
&atmel_i2c_mgmt.i2c_client_list);
spin_unlock(&atmel_i2c_mgmt.i2c_list_lock);
- /* register rng */
- memset(&i2c_priv->hwrng, 0, sizeof(i2c_priv->hwrng));
-
- i2c_priv->hwrng.name = dev_name(&client->dev);
- i2c_priv->hwrng.read = atmel_sha204a_rng_read;
-
- quality = i2c_priv->data->legacy_hwrng;
- if (quality)
- i2c_priv->hwrng.quality = *quality;
-
- ret = devm_hwrng_register(&client->dev, &i2c_priv->hwrng);
+ ret = sysfs_create_group(&client->dev.kobj, &atmel_sha204a_groups);
if (ret) {
- dev_warn(&client->dev, "failed to register RNG (%d)\n", ret);
+ dev_err(&client->dev, "failed to register sysfs entry\n");
goto err_list_del;
}
- ret = sysfs_create_group(&client->dev.kobj, &atmel_sha204a_groups);
+ /* register rng */
+ ret = atmel_i2c_register_rng(i2c_priv, &client->dev);
if (ret) {
- dev_err(&client->dev, "failed to register sysfs entry\n");
+ dev_err(&client->dev, "failed to register hw_random\n");
goto err_list_del;
}
@@ -234,9 +142,12 @@ static void atmel_sha204a_remove(struct i2c_client *client)
devm_hwrng_unregister(&client->dev, &i2c_priv->hwrng);
atmel_i2c_flush_queue();
- sysfs_remove_group(&client->dev.kobj, &atmel_sha204a_groups);
+ if (i2c_priv->hwrng.priv) {
+ kfree((void *)i2c_priv->hwrng.priv);
+ i2c_priv->hwrng.priv = 0;
+ }
- kfree((void *)i2c_priv->hwrng.priv);
+ sysfs_remove_group(&client->dev.kobj, &atmel_sha204a_groups);
}
static const struct atmel_i2c_of_match_data atsha204_match_data = {
@@ -246,7 +157,11 @@ static const struct atmel_i2c_of_match_data atsha204_match_data = {
.max_exec_time_read = 4,
.max_exec_time_write = 42,
},
- .legacy_hwrng = &atsha204_quality,
+ /*
+ * According to review by Bill Cox [1], the ATSHA204 has very low entropy.
+ * [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html
+ */
+ .needs_legacy_hwrng = 1,
};
static const struct atmel_i2c_of_match_data atsha204a_match_data = {
--
2.53.0
^ permalink raw reply related
* [PATCH 06/12] crypto: atmel - move EEPROM access support into common i2c core
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Move EEPROM read support from atmel-sha204a and atmel-ecc into the
shared atmel-i2c core and provide a generic interface for accessing
EEPROM zones on compatible Atmel devices.
Introduce enum atmel_i2c_eeprom_zones together with per-device EEPROM
zone sizing in struct atmel_i2c_of_match_data. Add common helpers for
EEPROM readout and sysfs formatting, and convert existing OTP sysfs
handling to use the shared infrastructure.
This removes duplicated EEPROM access logic from individual drivers and
extends support to ECC devices. The common implementation supports
CONFIG, OTP, and DATA zones using device-specific layout information
supplied via match data tables.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 36 ++++++++
drivers/crypto/atmel-i2c.c | 153 +++++++++++++++++++++++++--------
drivers/crypto/atmel-i2c.h | 30 +++----
drivers/crypto/atmel-sha204a.c | 65 ++++----------
4 files changed, 186 insertions(+), 98 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index 67fa5975fa7f..b5f2d44ec74c 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -23,6 +23,22 @@
#include <crypto/kpp.h>
#include "atmel-i2c.h"
+static ssize_t otp_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_OTP_ZONE);
+}
+static DEVICE_ATTR_RO(otp);
+
+static struct attribute *atmel_ecc508a_attrs[] = {
+ &dev_attr_otp.attr,
+ NULL
+};
+
+static const struct attribute_group atmel_ecc508a_groups = {
+ .name = "atecc508a",
+ .attrs = atmel_ecc508a_attrs,
+};
+
/**
* struct atmel_ecdh_ctx - transformation context
* @client : pointer to i2c client device
@@ -306,6 +322,18 @@ static int atmel_ecc_probe(struct i2c_client *client)
&atmel_i2c_mgmt.i2c_client_list);
spin_unlock(&atmel_i2c_mgmt.i2c_list_lock);
+ /* EEPROM read out */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ ret = -ENODEV;
+ goto err_list_del;
+ }
+
+ ret = sysfs_create_group(&client->dev.kobj, &atmel_ecc508a_groups);
+ if (ret) {
+ dev_err(&client->dev, "failed to register sysfs entry\n");
+ goto err_list_del;
+ }
+
/* register rng */
ret = atmel_i2c_register_rng(i2c_priv, &client->dev);
if (ret) {
@@ -326,6 +354,7 @@ static int atmel_ecc_probe(struct i2c_client *client)
goto done;
err_list_del:
+ sysfs_remove_group(&client->dev.kobj, &atmel_ecc508a_groups);
spin_lock(&atmel_i2c_mgmt.i2c_list_lock);
list_del(&i2c_priv->i2c_client_list_node);
spin_unlock(&atmel_i2c_mgmt.i2c_list_lock);
@@ -361,6 +390,8 @@ static void atmel_ecc_remove(struct i2c_client *client)
kfree((void *)i2c_priv->hwrng.priv);
i2c_priv->hwrng.priv = 0;
}
+
+ sysfs_remove_group(&client->dev.kobj, &atmel_ecc508a_groups);
}
static const struct atmel_i2c_of_match_data atecc508a_match_data = {
@@ -371,6 +402,11 @@ static const struct atmel_i2c_of_match_data atecc508a_match_data = {
.max_exec_time_read = 1,
.max_exec_time_write = 42,
},
+ .eeprom_zone_size = {
+ [ATMEL_EEPROM_CONFIG_ZONE] = 128,
+ [ATMEL_EEPROM_OTP_ZONE] = 64,
+ [ATMEL_EEPROM_DATA_ZONE] = 1208
+ },
};
static const struct of_device_id atmel_ecc_dt_ids[] = {
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index d451017171d8..26863573a10f 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -21,6 +21,15 @@
#include <linux/workqueue.h>
#include "atmel-i2c.h"
+#define ATMEL_I2C_COMMAND 0x03 /* packet function */
+
+/* Command opcode */
+#define ATMEL_I2C_OPCODE_ECDH 0x43
+#define ATMEL_I2C_OPCODE_GENKEY 0x40
+#define ATMEL_I2C_OPCODE_READ 0x02
+#define ATMEL_I2C_OPCODE_RANDOM 0x1b
+#define ATMEL_I2C_OPCODE_WRITE 0x12
+
struct atmel_i2c_client_mgmt atmel_i2c_mgmt = {
.i2c_list_lock = __SPIN_LOCK_UNLOCKED(atmel_i2c_mgmt.i2c_list_lock),
.i2c_client_list = LIST_HEAD_INIT(atmel_i2c_mgmt.i2c_client_list),
@@ -96,56 +105,55 @@ struct i2c_client *atmel_i2c_client_alloc(enum atmel_i2c_capability cap)
}
EXPORT_SYMBOL(atmel_i2c_client_alloc);
-void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
- const struct atmel_i2c_max_exec_timings *timings)
+static int atmel_i2c_init_read_eeprom_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
+ enum atmel_i2c_eeprom_zones zone,
+ const struct atmel_i2c_of_match_data *data)
{
- cmd->word_addr = COMMAND;
- cmd->opcode = OPCODE_READ;
- /*
- * Read the word from Configuration zone that contains the lock bytes
- * (UserExtra, Selector, LockValue, LockConfig).
- */
- cmd->param1 = CONFIGURATION_ZONE;
- cmd->param2 = cpu_to_le16(DEVICE_LOCK_ADDR);
- cmd->count = READ_COUNT;
+ const struct atmel_i2c_max_exec_timings *timings = &data->timings;
+ size_t zone_size = data->eeprom_zone_size[zone];
+
+ if (addr > zone_size)
+ return -EINVAL;
+
+ cmd->word_addr = ATMEL_I2C_COMMAND;
+ cmd->opcode = ATMEL_I2C_OPCODE_READ;
+ cmd->param1 = zone;
+ cmd->param2 = cpu_to_le16(addr);
+ cmd->count = ATMEL_I2C_READ_COUNT;
atmel_i2c_checksum(cmd);
cmd->msecs = timings->max_exec_time_read;
- cmd->rxsize = READ_RSP_SIZE;
+ cmd->rxsize = ATMEL_I2C_READ_RSP_SIZE;
+
+ return 0;
}
-EXPORT_SYMBOL(atmel_i2c_init_read_config_cmd);
-int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
- const struct atmel_i2c_max_exec_timings *timings)
+void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
+ const struct atmel_i2c_max_exec_timings *timings)
{
- if (addr >= OTP_ZONE_SIZE / 4)
- return -EINVAL;
-
- cmd->word_addr = COMMAND;
- cmd->opcode = OPCODE_READ;
+ cmd->word_addr = ATMEL_I2C_COMMAND;
+ cmd->opcode = ATMEL_I2C_OPCODE_READ;
/*
- * Read the word from OTP zone that may contain e.g. serial
- * numbers or similar if persistently pre-initialized and locked
+ * Read the word from Configuration zone that contains the lock bytes
+ * (UserExtra, Selector, LockValue, LockConfig).
*/
- cmd->param1 = OTP_ZONE;
- cmd->param2 = cpu_to_le16(addr);
- cmd->count = READ_COUNT;
+ cmd->param1 = CONFIGURATION_ZONE;
+ cmd->param2 = cpu_to_le16(DEVICE_LOCK_ADDR);
+ cmd->count = ATMEL_I2C_READ_COUNT;
atmel_i2c_checksum(cmd);
cmd->msecs = timings->max_exec_time_read;
- cmd->rxsize = READ_RSP_SIZE;
-
- return 0;
+ cmd->rxsize = ATMEL_I2C_READ_RSP_SIZE;
}
-EXPORT_SYMBOL(atmel_i2c_init_read_otp_cmd);
+EXPORT_SYMBOL(atmel_i2c_init_read_config_cmd);
void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
const struct atmel_i2c_max_exec_timings *timings)
{
- cmd->word_addr = COMMAND;
- cmd->opcode = OPCODE_RANDOM;
+ cmd->word_addr = ATMEL_I2C_COMMAND;
+ cmd->opcode = ATMEL_I2C_OPCODE_RANDOM;
cmd->param1 = 0;
cmd->param2 = 0;
cmd->count = RANDOM_COUNT;
@@ -160,9 +168,9 @@ EXPORT_SYMBOL(atmel_i2c_init_random_cmd);
void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
const struct atmel_i2c_max_exec_timings *timings)
{
- cmd->word_addr = COMMAND;
+ cmd->word_addr = ATMEL_I2C_COMMAND;
cmd->count = GENKEY_COUNT;
- cmd->opcode = OPCODE_GENKEY;
+ cmd->opcode = ATMEL_I2C_OPCODE_GENKEY;
cmd->param1 = GENKEY_MODE_PRIVATE;
/* a random private key will be generated and stored in slot keyID */
cmd->param2 = cpu_to_le16(keyid);
@@ -180,9 +188,9 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
{
size_t copied;
- cmd->word_addr = COMMAND;
+ cmd->word_addr = ATMEL_I2C_COMMAND;
cmd->count = ECDH_COUNT;
- cmd->opcode = OPCODE_ECDH;
+ cmd->opcode = ATMEL_I2C_OPCODE_ECDH;
cmd->param1 = ECDH_PREFIX_MODE;
/* private key slot */
cmd->param2 = cpu_to_le16(DATA_SLOT_2);
@@ -301,6 +309,81 @@ int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
}
EXPORT_SYMBOL(atmel_i2c_register_rng);
+static int atmel_i2c_eeprom_read(struct i2c_client *client, u16 addr,
+ enum atmel_i2c_eeprom_zones zone, u8 *buf)
+{
+ struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ struct atmel_i2c_cmd *cmd;
+ int ret = -1;
+
+ cmd = kmalloc_obj(*cmd);
+ if (!cmd)
+ return -ENOMEM;
+
+ ret = atmel_i2c_init_read_eeprom_cmd(cmd, addr, zone, data);
+ if (ret < 0) {
+ dev_err(&client->dev, "failed, invalid eeprom address %04X\n",
+ addr);
+ goto err;
+ }
+
+ ret = atmel_i2c_send_receive(client, cmd);
+ if (ret)
+ goto err;
+
+ if (cmd->data[0] == 0xff) {
+ dev_err(&client->dev, "failed, device not ready\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ memcpy(buf, cmd->data + RSP_DATA_IDX, 4);
+
+err:
+ kfree(cmd);
+ return ret;
+}
+
+ssize_t atmel_i2c_eeprom_display(struct device *dev,
+ struct device_attribute *attr,
+ char *buf,
+ enum atmel_i2c_eeprom_zones zone)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ const struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
+ const struct atmel_i2c_of_match_data *data = i2c_priv->data;
+ const size_t *eeprom = data->eeprom_zone_size;
+ u16 block_addr;
+ u8 *eeprom_buf;
+ ssize_t len = 0;
+ int i, ret = 0;
+
+ eeprom_buf = kcalloc(eeprom[zone], sizeof(*eeprom_buf), GFP_KERNEL);
+ if (!eeprom_buf)
+ return -ENOMEM;
+
+ for (block_addr = 0; block_addr < eeprom[zone] / 4; block_addr++) {
+ ret = atmel_i2c_eeprom_read(client, block_addr, zone,
+ eeprom_buf + block_addr * 4);
+ if (ret < 0) {
+ dev_err(dev, "failed to read %s zone\n",
+ zone == ATMEL_EEPROM_CONFIG_ZONE ? "CONFIG"
+ : (zone == ATMEL_EEPROM_OTP_ZONE ? "OTP" : "DATA"));
+ goto err;
+ }
+ }
+
+ for (i = 0; i < eeprom[zone]; i++)
+ len += sysfs_emit_at(buf, len, "%02X", eeprom_buf[i]);
+ len += sysfs_emit_at(buf, len, "\n");
+ ret = len;
+err:
+ kfree(eeprom_buf);
+ return ret;
+}
+EXPORT_SYMBOL(atmel_i2c_eeprom_display);
+
/*
* After wake and after execution of a command, there will be error, status, or
* result bytes in the device's output register that can be retrieved by the
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index 5f6c9ff0cf64..e30e0c417de2 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -12,7 +12,6 @@
#define ATMEL_ECC_PRIORITY 300
-#define COMMAND 0x03 /* packet function */
#define SLEEP_TOKEN 0x01
#define WAKE_TOKEN_MAX_SIZE 8
@@ -30,7 +29,7 @@
#define ECDH_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
#define GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \
CMD_OVERHEAD_SIZE)
-#define READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE)
+#define ATMEL_I2C_READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE)
#define RANDOM_RSP_SIZE (32 + CMD_OVERHEAD_SIZE)
#define MAX_RSP_SIZE GENKEY_RSP_SIZE
@@ -57,6 +56,13 @@ struct atmel_i2c_cmd {
u16 rxsize;
} __packed;
+/* Definitions for eeprom organization */
+enum atmel_i2c_eeprom_zones {
+ ATMEL_EEPROM_CONFIG_ZONE = 0,
+ ATMEL_EEPROM_OTP_ZONE = 1,
+ ATMEL_EEPROM_DATA_ZONE = 2,
+};
+
struct atmel_i2c_max_exec_timings {
unsigned int max_exec_time_genkey;
unsigned int max_exec_time_ecdh;
@@ -68,6 +74,7 @@ struct atmel_i2c_max_exec_timings {
struct atmel_i2c_of_match_data {
const unsigned short needs_legacy_hwrng;
struct atmel_i2c_max_exec_timings timings;
+ size_t eeprom_zone_size[3]; /* all atmel devices have three zones */
};
/* Status/Error codes */
@@ -77,10 +84,6 @@ struct atmel_i2c_of_match_data {
/* Definitions for eeprom organization */
#define CONFIGURATION_ZONE 0
-#define OTP_ZONE 1
-
-/* Definitions for eeprom zone sizes */
-#define OTP_ZONE_SIZE 64
/* Definitions for Indexes common to all commands */
#define RSP_DATA_IDX 1 /* buffer index of data in response */
@@ -101,14 +104,8 @@ struct atmel_i2c_of_match_data {
/* Wake Low duration */
#define TWLO_USEC 60
-/* Command opcode */
-#define OPCODE_ECDH 0x43
-#define OPCODE_GENKEY 0x40
-#define OPCODE_READ 0x02
-#define OPCODE_RANDOM 0x1b
-
/* Definitions for the READ Command */
-#define READ_COUNT 7
+#define ATMEL_I2C_READ_COUNT 7
/* Definitions for the RANDOM Command */
#define RANDOM_COUNT 7
@@ -200,8 +197,6 @@ int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
const struct atmel_i2c_max_exec_timings *timings);
-int atmel_i2c_init_read_otp_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
- const struct atmel_i2c_max_exec_timings *timings);
void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
const struct atmel_i2c_max_exec_timings *timings);
void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
@@ -212,6 +207,11 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
struct device *dev);
+ssize_t atmel_i2c_eeprom_display(struct device *dev,
+ struct device_attribute *attr,
+ char *buf,
+ enum atmel_i2c_eeprom_zones zone);
+
struct i2c_client *atmel_i2c_client_alloc(enum atmel_i2c_capability cap);
void atmel_i2c_unregister_client(struct atmel_i2c_client_priv *i2c_priv);
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index ae24d8fbabf9..4f10e826e675 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -19,57 +19,10 @@
#include <linux/workqueue.h>
#include "atmel-i2c.h"
-static int atmel_sha204a_otp_read(struct i2c_client *client, u16 addr, u8 *otp)
-{
- struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
- const struct atmel_i2c_of_match_data *data = i2c_priv->data;
- struct atmel_i2c_cmd cmd;
- int ret;
-
- ret = atmel_i2c_init_read_otp_cmd(&cmd, addr, &data->timings);
- if (ret < 0) {
- dev_err(&client->dev, "failed, invalid otp address %04X\n",
- addr);
- return ret;
- }
-
- ret = atmel_i2c_send_receive(client, &cmd);
- if (ret < 0) {
- dev_err(&client->dev, "failed to read otp at %04X\n", addr);
- return ret;
- }
-
- if (cmd.data[0] == 0xff) {
- dev_err(&client->dev, "failed, device not ready\n");
- return -EIO;
- }
-
- memcpy(otp, cmd.data+1, 4);
-
- return ret;
-}
-
static ssize_t otp_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- u16 addr;
- u8 otp[OTP_ZONE_SIZE];
- struct i2c_client *client = to_i2c_client(dev);
- ssize_t len = 0;
- int i, ret;
-
- for (addr = 0; addr < OTP_ZONE_SIZE / 4; addr++) {
- ret = atmel_sha204a_otp_read(client, addr, otp + addr * 4);
- if (ret < 0) {
- dev_err(dev, "failed to read otp zone\n");
- return ret;
- }
- }
-
- for (i = 0; i < OTP_ZONE_SIZE; i++)
- len += sysfs_emit_at(buf, len, "%02X", otp[i]);
- len += sysfs_emit_at(buf, len, "\n");
- return len;
+ return atmel_i2c_eeprom_display(dev, attr, buf, ATMEL_EEPROM_OTP_ZONE);
}
static DEVICE_ATTR_RO(otp);
@@ -110,6 +63,12 @@ static int atmel_sha204a_probe(struct i2c_client *client)
&atmel_i2c_mgmt.i2c_client_list);
spin_unlock(&atmel_i2c_mgmt.i2c_list_lock);
+ /* EEPROM read out */
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ ret = -ENODEV;
+ goto err_list_del;
+ }
+
ret = sysfs_create_group(&client->dev.kobj, &atmel_sha204a_groups);
if (ret) {
dev_err(&client->dev, "failed to register sysfs entry\n");
@@ -157,6 +116,11 @@ static const struct atmel_i2c_of_match_data atsha204_match_data = {
.max_exec_time_read = 4,
.max_exec_time_write = 42,
},
+ .eeprom_zone_size = {
+ [ATMEL_EEPROM_CONFIG_ZONE] = 88,
+ [ATMEL_EEPROM_OTP_ZONE] = 64,
+ [ATMEL_EEPROM_DATA_ZONE] = 512
+ },
/*
* According to review by Bill Cox [1], the ATSHA204 has very low entropy.
* [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html
@@ -171,6 +135,11 @@ static const struct atmel_i2c_of_match_data atsha204a_match_data = {
.max_exec_time_read = 4,
.max_exec_time_write = 42,
},
+ .eeprom_zone_size = {
+ [ATMEL_EEPROM_CONFIG_ZONE] = 88,
+ [ATMEL_EEPROM_OTP_ZONE] = 64,
+ [ATMEL_EEPROM_DATA_ZONE] = 512
+ },
};
static const struct of_device_id atmel_sha204a_dt_ids[] __maybe_unused = {
--
2.53.0
^ permalink raw reply related
* [PATCH 08/12] crypto: atmel - move device sanity check to core driver
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Move the device sanity check implementation into the shared Atmel
I2C core driver and reuse the generic EEPROM access helpers for
reading the CONFIG zone lock state.
This removes duplicate CONFIG zone handling and consolidates common
response index and lock state definitions under the Atmel I2C core
namespace.
Update both SHA204A and ECC drivers to invoke the shared sanity
check helper during probe.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 10 ++++++--
drivers/crypto/atmel-i2c.c | 43 ++++++++++++----------------------
drivers/crypto/atmel-i2c.h | 14 +++--------
drivers/crypto/atmel-sha204a.c | 6 +++++
4 files changed, 32 insertions(+), 41 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index f08fdf284b60..f6d1a9694d63 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -81,7 +81,7 @@ static void atmel_ecdh_done(struct atmel_i2c_work_data *work_data, void *areq,
/* copy the shared secret */
copied = sg_copy_from_buffer(req->dst, sg_nents_for_len(req->dst, n_sz),
- &cmd->data[RSP_DATA_IDX], n_sz);
+ &cmd->data[ATMEL_I2C_RSP_DATA_IDX], n_sz);
if (copied != n_sz)
status = -EINVAL;
@@ -144,7 +144,7 @@ static int atmel_ecdh_set_secret(struct crypto_kpp *tfm, const void *buf,
goto free_public_key;
/* save the public key */
- memcpy(public_key, &cmd->data[RSP_DATA_IDX], ATMEL_ECC_PUBKEY_SIZE);
+ memcpy(public_key, &cmd->data[ATMEL_I2C_RSP_DATA_IDX], ATMEL_ECC_PUBKEY_SIZE);
ctx->public_key = public_key;
kfree(cmd);
@@ -323,6 +323,12 @@ static int atmel_ecc_probe(struct i2c_client *client)
i2c_priv->data = data;
i2c_priv->caps = BIT(ATMEL_CAP_ECDH);
+ ret = atmel_i2c_device_sanity_check(client);
+ if (ret) {
+ dev_err(&client->dev, "failed to read EEPROM, is hardware attached?\n");
+ goto done;
+ }
+
/* add to client list */
spin_lock(&atmel_i2c_mgmt.i2c_list_lock);
list_add_tail(&i2c_priv->i2c_client_list_node,
diff --git a/drivers/crypto/atmel-i2c.c b/drivers/crypto/atmel-i2c.c
index 26863573a10f..50b6bce478d2 100644
--- a/drivers/crypto/atmel-i2c.c
+++ b/drivers/crypto/atmel-i2c.c
@@ -23,6 +23,11 @@
#define ATMEL_I2C_COMMAND 0x03 /* packet function */
+/* Definitions for the device lock state */
+#define ATMEL_I2C_DEVICE_LOCK_ADDR 0x15
+#define ATMEL_I2C_LOCK_VALUE_IDX (ATMEL_I2C_RSP_DATA_IDX + 2)
+#define ATMEL_I2C_LOCK_CONFIG_IDX (ATMEL_I2C_RSP_DATA_IDX + 3)
+
/* Command opcode */
#define ATMEL_I2C_OPCODE_ECDH 0x43
#define ATMEL_I2C_OPCODE_GENKEY 0x40
@@ -129,26 +134,6 @@ static int atmel_i2c_init_read_eeprom_cmd(struct atmel_i2c_cmd *cmd, u16 addr,
return 0;
}
-void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
- const struct atmel_i2c_max_exec_timings *timings)
-{
- cmd->word_addr = ATMEL_I2C_COMMAND;
- cmd->opcode = ATMEL_I2C_OPCODE_READ;
- /*
- * Read the word from Configuration zone that contains the lock bytes
- * (UserExtra, Selector, LockValue, LockConfig).
- */
- cmd->param1 = CONFIGURATION_ZONE;
- cmd->param2 = cpu_to_le16(DEVICE_LOCK_ADDR);
- cmd->count = ATMEL_I2C_READ_COUNT;
-
- atmel_i2c_checksum(cmd);
-
- cmd->msecs = timings->max_exec_time_read;
- cmd->rxsize = ATMEL_I2C_READ_RSP_SIZE;
-}
-EXPORT_SYMBOL(atmel_i2c_init_read_config_cmd);
-
void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
const struct atmel_i2c_max_exec_timings *timings)
{
@@ -247,7 +232,7 @@ static int atmel_i2c_rng_read_nonblocking(struct hwrng *rng, void *buf,
if (rng->priv) {
work_data = (struct atmel_i2c_work_data *)rng->priv;
max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(buf, &work_data->cmd.data[RSP_DATA_IDX], max);
+ memcpy(buf, &work_data->cmd.data[ATMEL_I2C_RSP_DATA_IDX], max);
rng->priv = 0;
} else {
work_data = kmalloc_obj(*work_data, GFP_ATOMIC);
@@ -287,7 +272,7 @@ static int atmel_i2c_rng_read(struct hwrng *rng, void *buf, size_t max,
return ret;
max = min(RANDOM_RSP_SIZE - CMD_OVERHEAD_SIZE, max);
- memcpy(buf, &cmd.data[RSP_DATA_IDX], max);
+ memcpy(buf, &cmd.data[ATMEL_I2C_RSP_DATA_IDX], max);
return max;
}
@@ -338,7 +323,7 @@ static int atmel_i2c_eeprom_read(struct i2c_client *client, u16 addr,
goto err;
}
- memcpy(buf, cmd->data + RSP_DATA_IDX, 4);
+ memcpy(buf, cmd->data + ATMEL_I2C_RSP_DATA_IDX, 4);
err:
kfree(cmd);
@@ -542,7 +527,7 @@ static inline size_t atmel_i2c_wake_token_sz(u32 bus_clk_rate)
return DIV_ROUND_UP(no_of_bits, 8);
}
-static int device_sanity_check(struct i2c_client *client)
+int atmel_i2c_device_sanity_check(struct i2c_client *client)
{
struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
const struct atmel_i2c_of_match_data *data = i2c_priv->data;
@@ -553,7 +538,8 @@ static int device_sanity_check(struct i2c_client *client)
if (!cmd)
return -ENOMEM;
- atmel_i2c_init_read_config_cmd(cmd, &data->timings);
+ atmel_i2c_init_read_eeprom_cmd(cmd, ATMEL_I2C_DEVICE_LOCK_ADDR,
+ ATMEL_EEPROM_CONFIG_ZONE, data);
ret = atmel_i2c_send_receive(client, cmd);
if (ret)
@@ -565,8 +551,8 @@ static int device_sanity_check(struct i2c_client *client)
* Failure to lock these zones may permit modification of any secret
* keys and may lead to other security problems.
*/
- if (cmd->data[LOCK_CONFIG_IDX] || cmd->data[LOCK_VALUE_IDX]) {
- dev_err(&client->dev, "Configuration or Data and OTP zones are unlocked!\n");
+ if (cmd->data[ATMEL_I2C_LOCK_CONFIG_IDX] || cmd->data[ATMEL_I2C_LOCK_VALUE_IDX]) {
+ dev_err(&client->dev, "Config, Data and OTP zones are unlocked!\n");
ret = -ENOTSUPP;
}
@@ -575,6 +561,7 @@ static int device_sanity_check(struct i2c_client *client)
kfree(cmd);
return ret;
}
+EXPORT_SYMBOL(atmel_i2c_device_sanity_check);
void atmel_i2c_unregister_client(struct atmel_i2c_client_priv *i2c_priv)
{
@@ -633,7 +620,7 @@ int atmel_i2c_probe(struct i2c_client *client)
i2c_set_clientdata(client, i2c_priv);
- return device_sanity_check(client);
+ return 0;
}
EXPORT_SYMBOL(atmel_i2c_probe);
diff --git a/drivers/crypto/atmel-i2c.h b/drivers/crypto/atmel-i2c.h
index e30e0c417de2..2f76e107340e 100644
--- a/drivers/crypto/atmel-i2c.h
+++ b/drivers/crypto/atmel-i2c.h
@@ -82,18 +82,10 @@ struct atmel_i2c_of_match_data {
#define STATUS_NOERR 0x00
#define STATUS_WAKE_SUCCESSFUL 0x11
-/* Definitions for eeprom organization */
-#define CONFIGURATION_ZONE 0
-
/* Definitions for Indexes common to all commands */
-#define RSP_DATA_IDX 1 /* buffer index of data in response */
+#define ATMEL_I2C_RSP_DATA_IDX 1 /* buffer index of data in response */
#define DATA_SLOT_2 2 /* used for ECDH private key */
-/* Definitions for the device lock state */
-#define DEVICE_LOCK_ADDR 0x15
-#define LOCK_VALUE_IDX (RSP_DATA_IDX + 2)
-#define LOCK_CONFIG_IDX (RSP_DATA_IDX + 3)
-
/*
* Wake High delay to data communication (microseconds). SDA should be stable
* high for this entire duration.
@@ -195,8 +187,6 @@ void atmel_i2c_flush_queue(void);
int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd);
-void atmel_i2c_init_read_config_cmd(struct atmel_i2c_cmd *cmd,
- const struct atmel_i2c_max_exec_timings *timings);
void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd,
const struct atmel_i2c_max_exec_timings *timings);
void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid,
@@ -207,6 +197,8 @@ int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
int atmel_i2c_register_rng(struct atmel_i2c_client_priv *i2c_priv,
struct device *dev);
+int atmel_i2c_device_sanity_check(struct i2c_client *client);
+
ssize_t atmel_i2c_eeprom_display(struct device *dev,
struct device_attribute *attr,
char *buf,
diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c
index 341554b7b7a2..88726f6ef87c 100644
--- a/drivers/crypto/atmel-sha204a.c
+++ b/drivers/crypto/atmel-sha204a.c
@@ -64,6 +64,12 @@ static int atmel_sha204a_probe(struct i2c_client *client)
i2c_priv->data = data;
i2c_priv->caps = 0;
+ ret = atmel_i2c_device_sanity_check(client);
+ if (ret) {
+ dev_err(&client->dev, "failed to read EEPROM, is hardware attached?\n");
+ goto done;
+ }
+
/* add to client list */
spin_lock(&atmel_i2c_mgmt.i2c_list_lock);
list_add_tail(&i2c_priv->i2c_client_list_node,
--
2.53.0
^ permalink raw reply related
* [PATCH 03/12] crypto: atmel - remove obsolete CONFIG_OF guard
From: Lothar Rubusch @ 2026-05-12 22:43 UTC (permalink / raw)
To: thorsten.blum, herbert, davem, nicolas.ferre, alexandre.belloni,
claudiu.beznea
Cc: linux-crypto, linux-arm-kernel, linux-kernel, l.rubusch
In-Reply-To: <20260512224349.64621-1-l.rubusch@gmail.com>
Remove the CONFIG_OF preprocessor guard around the OF device match
table in atmel-ecc.
OF match tables are expected to be present unconditionally and the
MODULE_DEVICE_TABLE(of, ...) handling already accounts for
configurations where OF support is disabled. Keeping the additional
guard provides no benefit and only adds unnecessary conditional
compilation.
Also compact the match table formatting while touching the code.
Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
---
drivers/crypto/atmel-ecc.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/atmel-ecc.c b/drivers/crypto/atmel-ecc.c
index c63d30947bd7..0dede3707b73 100644
--- a/drivers/crypto/atmel-ecc.c
+++ b/drivers/crypto/atmel-ecc.c
@@ -339,18 +339,12 @@ static void atmel_ecc_remove(struct i2c_client *client)
crypto_unregister_kpp(&atmel_ecdh_nist_p256);
}
-#ifdef CONFIG_OF
static const struct of_device_id atmel_ecc_dt_ids[] = {
- {
- .compatible = "atmel,atecc508a",
- }, {
- .compatible = "atmel,atecc608b",
- }, {
- /* sentinel */
- }
+ { .compatible = "atmel,atecc508a", },
+ { .compatible = "atmel,atecc608b", },
+ { }
};
MODULE_DEVICE_TABLE(of, atmel_ecc_dt_ids);
-#endif
static const struct i2c_device_id atmel_ecc_id[] = {
{ "atecc508a" },
--
2.53.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox