* Re: [PATCH v4 04/13] dma: swiotlb: track pool encryption state and honor DMA_ATTR_CC_SHARED
From: Aneesh Kumar K.V @ 2026-05-14 14:43 UTC (permalink / raw)
To: Mostafa Saleh
Cc: iommu, linux-arm-kernel, linux-kernel, linux-coco, Robin Murphy,
Marek Szyprowski, Will Deacon, Marc Zyngier, Steven Price,
Suzuki K Poulose, Catalin Marinas, Jiri Pirko, Jason Gunthorpe,
Petr Tesarik, Alexey Kardashevskiy, Dan Williams, Xu Yilun,
linuxppc-dev, linux-s390, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy (CS GROUP), Alexander Gordeev,
Gerald Schaefer, Heiko Carstens, Vasily Gorbik,
Christian Borntraeger, Sven Schnelle, x86
In-Reply-To: <agXaby-7L7yS3Vva@google.com>
Mostafa Saleh <smostafa@google.com> writes:
> On Thu, May 14, 2026 at 06:18:05PM +0530, Aneesh Kumar K.V wrote:
>> Mostafa Saleh <smostafa@google.com> writes:
>>
>> > On Thu, May 14, 2026 at 11:24:42AM +0530, Aneesh Kumar K.V wrote:
>> >> Mostafa Saleh <smostafa@google.com> writes:
>> >>
>> >> > On Tue, May 12, 2026 at 02:33:59PM +0530, Aneesh Kumar K.V (Arm) wrote:
>> >> >> Teach swiotlb to distinguish between encrypted and decrypted bounce
>> >> >> buffer pools, and make allocation and mapping paths select a pool whose
>> >> >> state matches the requested DMA attributes.
>> >> >>
>> >> >> Add a decrypted flag to io_tlb_mem, initialize it for the default and
>> >> >> restricted pools, and propagate DMA_ATTR_CC_SHARED into swiotlb pool
>> >> >> allocation. Reject swiotlb alloc/map requests when the selected pool does
>> >> >> not match the required encrypted/decrypted state.
>> >> >>
>> >> >> Also return DMA addresses with the matching phys_to_dma_{encrypted,
>> >> >> unencrypted} helper so the DMA address encoding stays consistent with the
>> >> >> chosen pool.
>> >> >>
>> >> >> Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar@kernel.org>
>> >> >> ---
>> >> >> include/linux/dma-direct.h | 10 ++++
>> >> >> include/linux/swiotlb.h | 8 ++-
>> >> >> kernel/dma/direct.c | 14 +++--
>> >> >> kernel/dma/swiotlb.c | 108 +++++++++++++++++++++++++++----------
>> >> >> 4 files changed, 107 insertions(+), 33 deletions(-)
>> >> >>
>> >> >> diff --git a/include/linux/dma-direct.h b/include/linux/dma-direct.h
>> >> >> index c249912456f9..94fad4e7c11e 100644
>> >> >> --- a/include/linux/dma-direct.h
>> >> >> +++ b/include/linux/dma-direct.h
>> >> >> @@ -77,6 +77,10 @@ static inline dma_addr_t dma_range_map_max(const struct bus_dma_region *map)
>> >> >> #ifndef phys_to_dma_unencrypted
>> >> >> #define phys_to_dma_unencrypted phys_to_dma
>> >> >> #endif
>> >> >> +
>> >> >> +#ifndef phys_to_dma_encrypted
>> >> >> +#define phys_to_dma_encrypted phys_to_dma
>> >> >> +#endif
>> >> >> #else
>> >> >> static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
>> >> >> {
>> >> >> @@ -90,6 +94,12 @@ static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev,
>> >> >> {
>> >> >> return dma_addr_unencrypted(__phys_to_dma(dev, paddr));
>> >> >> }
>> >> >> +
>> >> >> +static inline dma_addr_t phys_to_dma_encrypted(struct device *dev,
>> >> >> + phys_addr_t paddr)
>> >> >> +{
>> >> >> + return dma_addr_encrypted(__phys_to_dma(dev, paddr));
>> >> >> +}
>> >> >> /*
>> >> >> * If memory encryption is supported, phys_to_dma will set the memory encryption
>> >> >> * bit in the DMA address, and dma_to_phys will clear it.
>> >> >> diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
>> >> >> index 3dae0f592063..b3fa3c6e0169 100644
>> >> >> --- a/include/linux/swiotlb.h
>> >> >> +++ b/include/linux/swiotlb.h
>> >> >> @@ -81,6 +81,7 @@ struct io_tlb_pool {
>> >> >> struct list_head node;
>> >> >> struct rcu_head rcu;
>> >> >> bool transient;
>> >> >> + bool unencrypted;
>> >> >> #endif
>> >> >> };
>> >> >>
>> >> >> @@ -111,6 +112,7 @@ struct io_tlb_mem {
>> >> >> struct dentry *debugfs;
>> >> >> bool force_bounce;
>> >> >> bool for_alloc;
>> >> >> + bool unencrypted;
>> >> >> #ifdef CONFIG_SWIOTLB_DYNAMIC
>> >> >> bool can_grow;
>> >> >> u64 phys_limit;
>> >> >> @@ -282,7 +284,8 @@ static inline void swiotlb_sync_single_for_cpu(struct device *dev,
>> >> >> extern void swiotlb_print_info(void);
>> >> >>
>> >> >> #ifdef CONFIG_DMA_RESTRICTED_POOL
>> >> >> -struct page *swiotlb_alloc(struct device *dev, size_t size);
>> >> >> +struct page *swiotlb_alloc(struct device *dev, size_t size,
>> >> >> + unsigned long attrs);
>> >> >> bool swiotlb_free(struct device *dev, struct page *page, size_t size);
>> >> >>
>> >> >> static inline bool is_swiotlb_for_alloc(struct device *dev)
>> >> >> @@ -290,7 +293,8 @@ static inline bool is_swiotlb_for_alloc(struct device *dev)
>> >> >> return dev->dma_io_tlb_mem->for_alloc;
>> >> >> }
>> >> >> #else
>> >> >> -static inline struct page *swiotlb_alloc(struct device *dev, size_t size)
>> >> >> +static inline struct page *swiotlb_alloc(struct device *dev, size_t size,
>> >> >> + unsigned long attrs)
>> >> >> {
>> >> >> return NULL;
>> >> >> }
>> >> >> diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
>> >> >> index dc2907439b3d..97ae4fa10521 100644
>> >> >> --- a/kernel/dma/direct.c
>> >> >> +++ b/kernel/dma/direct.c
>> >> >> @@ -104,9 +104,10 @@ static void __dma_direct_free_pages(struct device *dev, struct page *page,
>> >> >> dma_free_contiguous(dev, page, size);
>> >> >> }
>> >> >>
>> >> >> -static struct page *dma_direct_alloc_swiotlb(struct device *dev, size_t size)
>> >> >> +static struct page *dma_direct_alloc_swiotlb(struct device *dev, size_t size,
>> >> >> + unsigned long attrs)
>> >> >> {
>> >> >> - struct page *page = swiotlb_alloc(dev, size);
>> >> >> + struct page *page = swiotlb_alloc(dev, size, attrs);
>> >> >>
>> >> >> if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
>> >> >> swiotlb_free(dev, page, size);
>> >> >> @@ -266,8 +267,12 @@ void *dma_direct_alloc(struct device *dev, size_t size,
>> >> >> gfp, attrs);
>> >> >>
>> >> >> if (is_swiotlb_for_alloc(dev)) {
>> >> >> - page = dma_direct_alloc_swiotlb(dev, size);
>> >> >> + page = dma_direct_alloc_swiotlb(dev, size, attrs);
>> >> >> if (page) {
>> >> >> + /*
>> >> >> + * swiotlb allocations comes from pool already marked
>> >> >> + * decrypted
>> >> >> + */
>> >> >> mark_mem_decrypt = false;
>> >> >> goto setup_page;
>> >> >> }
>> >> >> @@ -374,6 +379,7 @@ void dma_direct_free(struct device *dev, size_t size,
>> >> >> return;
>> >> >>
>> >> >> if (swiotlb_find_pool(dev, dma_to_phys(dev, dma_addr)))
>> >> >> + /* Swiotlb doesn't need a page attribute update on free */
>> >> >> mark_mem_encrypted = false;
>> >> >>
>> >> >> if (is_vmalloc_addr(cpu_addr)) {
>> >> >> @@ -403,7 +409,7 @@ struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
>> >> >> gfp, attrs);
>> >> >>
>> >> >> if (is_swiotlb_for_alloc(dev)) {
>> >> >> - page = dma_direct_alloc_swiotlb(dev, size);
>> >> >> + page = dma_direct_alloc_swiotlb(dev, size, attrs);
>> >> >> if (!page)
>> >> >> return NULL;
>> >> >>
>> >> >> diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
>> >> >> index ab4eccbaa076..065663be282c 100644
>> >> >> --- a/kernel/dma/swiotlb.c
>> >> >> +++ b/kernel/dma/swiotlb.c
>> >> >> @@ -259,10 +259,21 @@ void __init swiotlb_update_mem_attributes(void)
>> >> >> struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
>> >> >> unsigned long bytes;
>> >> >>
>> >> >> + /*
>> >> >> + * if platform support memory encryption, swiotlb buffers are
>> >> >> + * decrypted by default.
>> >> >> + */
>> >> >> + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
>> >> >> + io_tlb_default_mem.unencrypted = true;
>> >> >> + else
>> >> >> + io_tlb_default_mem.unencrypted = false;
>> >> >> +
>> >> >> if (!mem->nslabs || mem->late_alloc)
>> >> >> return;
>> >> >> bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
>> >> >> - set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
>> >> >> +
>> >> >> + if (io_tlb_default_mem.unencrypted)
>> >> >> + set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
>> >> >> }
>> >> >>
>> >> >> static void swiotlb_init_io_tlb_pool(struct io_tlb_pool *mem, phys_addr_t start,
>> >> >> @@ -505,8 +516,10 @@ int swiotlb_init_late(size_t size, gfp_t gfp_mask,
>> >> >> if (!mem->slots)
>> >> >> goto error_slots;
>> >> >>
>> >> >> - set_memory_decrypted((unsigned long)vstart,
>> >> >> - (nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
>> >> >> + if (io_tlb_default_mem.unencrypted)
>> >> >> + set_memory_decrypted((unsigned long)vstart,
>> >> >> + (nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
>> >> >> +
>> >> >> swiotlb_init_io_tlb_pool(mem, virt_to_phys(vstart), nslabs, true,
>> >> >> nareas);
>> >> >> add_mem_pool(&io_tlb_default_mem, mem);
>> >> >> @@ -539,7 +552,9 @@ void __init swiotlb_exit(void)
>> >> >> tbl_size = PAGE_ALIGN(mem->end - mem->start);
>> >> >> slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs));
>> >> >>
>> >> >> - set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
>> >> >> + if (io_tlb_default_mem.unencrypted)
>> >> >> + set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
>> >> >> +
>> >> >> if (mem->late_alloc) {
>> >> >> area_order = get_order(array_size(sizeof(*mem->areas),
>> >> >> mem->nareas));
>> >> >> @@ -563,6 +578,7 @@ void __init swiotlb_exit(void)
>> >> >> * @gfp: GFP flags for the allocation.
>> >> >> * @bytes: Size of the buffer.
>> >> >> * @phys_limit: Maximum allowed physical address of the buffer.
>> >> >> + * @unencrypted: true to allocate unencrypted memory, false for encrypted memory
>> >> >> *
>> >> >> * Allocate pages from the buddy allocator. If successful, make the allocated
>> >> >> * pages decrypted that they can be used for DMA.
>> >> >> @@ -570,7 +586,8 @@ void __init swiotlb_exit(void)
>> >> >> * Return: Decrypted pages, %NULL on allocation failure, or ERR_PTR(-EAGAIN)
>> >> >> * if the allocated physical address was above @phys_limit.
>> >> >> */
>> >> >> -static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
>> >> >> +static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes,
>> >> >> + u64 phys_limit, bool unencrypted)
>> >> >> {
>> >> >> unsigned int order = get_order(bytes);
>> >> >> struct page *page;
>> >> >> @@ -588,13 +605,13 @@ static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
>> >> >> }
>> >> >>
>> >> >> vaddr = phys_to_virt(paddr);
>> >> >> - if (set_memory_decrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> + if (unencrypted && set_memory_decrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> goto error;
>> >> >> return page;
>> >> >>
>> >> >> error:
>> >> >> /* Intentional leak if pages cannot be encrypted again. */
>> >> >> - if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> + if (unencrypted && !set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> __free_pages(page, order);
>> >> >> return NULL;
>> >> >> }
>> >> >> @@ -604,30 +621,26 @@ static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
>> >> >> * @dev: Device for which a memory pool is allocated.
>> >> >> * @bytes: Size of the buffer.
>> >> >> * @phys_limit: Maximum allowed physical address of the buffer.
>> >> >> + * @attrs: DMA attributes for the allocation.
>> >> >> * @gfp: GFP flags for the allocation.
>> >> >> *
>> >> >> * Return: Allocated pages, or %NULL on allocation failure.
>> >> >> */
>> >> >> static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
>> >> >> - u64 phys_limit, gfp_t gfp)
>> >> >> + u64 phys_limit, unsigned long attrs, gfp_t gfp)
>> >> >> {
>> >> >> struct page *page;
>> >> >> - unsigned long attrs = 0;
>> >> >>
>> >> >> /*
>> >> >> * Allocate from the atomic pools if memory is encrypted and
>> >> >> * the allocation is atomic, because decrypting may block.
>> >> >> */
>> >> >> - if (!gfpflags_allow_blocking(gfp) && dev && force_dma_unencrypted(dev)) {
>> >> >> + if (!gfpflags_allow_blocking(gfp) && (attrs & DMA_ATTR_CC_SHARED)) {
>> >> >> void *vaddr;
>> >> >>
>> >> >> if (!IS_ENABLED(CONFIG_DMA_COHERENT_POOL))
>> >> >> return NULL;
>> >> >>
>> >> >> - /* swiotlb considered decrypted by default */
>> >> >> - if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
>> >> >> - attrs = DMA_ATTR_CC_SHARED;
>> >> >> -
>> >> >> return dma_alloc_from_pool(dev, bytes, &vaddr, gfp,
>> >> >> attrs, dma_coherent_ok);
>> >> >> }
>> >> >> @@ -638,7 +651,8 @@ static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
>> >> >> else if (phys_limit <= DMA_BIT_MASK(32))
>> >> >> gfp |= __GFP_DMA32;
>> >> >>
>> >> >> - while (IS_ERR(page = alloc_dma_pages(gfp, bytes, phys_limit))) {
>> >> >> + while (IS_ERR(page = alloc_dma_pages(gfp, bytes, phys_limit,
>> >> >> + !!(attrs & DMA_ATTR_CC_SHARED)))) {
>> >> >> if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
>> >> >> phys_limit < DMA_BIT_MASK(64) &&
>> >> >> !(gfp & (__GFP_DMA32 | __GFP_DMA)))
>> >> >> @@ -657,15 +671,18 @@ static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
>> >> >> * swiotlb_free_tlb() - free a dynamically allocated IO TLB buffer
>> >> >> * @vaddr: Virtual address of the buffer.
>> >> >> * @bytes: Size of the buffer.
>> >> >> + * @unencrypted: true if @vaddr was allocated decrypted and must be
>> >> >> + * re-encrypted before being freed
>> >> >> */
>> >> >> -static void swiotlb_free_tlb(void *vaddr, size_t bytes)
>> >> >> +static void swiotlb_free_tlb(void *vaddr, size_t bytes, bool unencrypted)
>> >> >> {
>> >> >> if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
>> >> >> dma_free_from_pool(NULL, vaddr, bytes))
>> >> >> return;
>> >> >>
>> >> >> /* Intentional leak if pages cannot be encrypted again. */
>> >> >> - if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> + if (!unencrypted ||
>> >> >> + !set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
>> >> >> __free_pages(virt_to_page(vaddr), get_order(bytes));
>> >> >> }
>> >> >>
>> >> >> @@ -676,6 +693,7 @@ static void swiotlb_free_tlb(void *vaddr, size_t bytes)
>> >> >> * @nslabs: Desired (maximum) number of slabs.
>> >> >> * @nareas: Number of areas.
>> >> >> * @phys_limit: Maximum DMA buffer physical address.
>> >> >> + * @attrs: DMA attributes for the allocation.
>> >> >> * @gfp: GFP flags for the allocations.
>> >> >> *
>> >> >> * Allocate and initialize a new IO TLB memory pool. The actual number of
>> >> >> @@ -686,7 +704,8 @@ static void swiotlb_free_tlb(void *vaddr, size_t bytes)
>> >> >> */
>> >> >> static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
>> >> >> unsigned long minslabs, unsigned long nslabs,
>> >> >> - unsigned int nareas, u64 phys_limit, gfp_t gfp)
>> >> >> + unsigned int nareas, u64 phys_limit, unsigned long attrs,
>> >> >> + gfp_t gfp)
>> >> >> {
>> >> >> struct io_tlb_pool *pool;
>> >> >> unsigned int slot_order;
>> >> >> @@ -704,9 +723,10 @@ static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
>> >> >> if (!pool)
>> >> >> goto error;
>> >> >> pool->areas = (void *)pool + sizeof(*pool);
>> >> >> + pool->unencrypted = !!(attrs & DMA_ATTR_CC_SHARED);
>> >> >>
>> >> >> tlb_size = nslabs << IO_TLB_SHIFT;
>> >> >> - while (!(tlb = swiotlb_alloc_tlb(dev, tlb_size, phys_limit, gfp))) {
>> >> >> + while (!(tlb = swiotlb_alloc_tlb(dev, tlb_size, phys_limit, attrs, gfp))) {
>> >> >> if (nslabs <= minslabs)
>> >> >> goto error_tlb;
>> >> >> nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
>> >> >> @@ -724,7 +744,8 @@ static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
>> >> >> return pool;
>> >> >>
>> >> >> error_slots:
>> >> >> - swiotlb_free_tlb(page_address(tlb), tlb_size);
>> >> >> + swiotlb_free_tlb(page_address(tlb), tlb_size,
>> >> >> + !!(attrs & DMA_ATTR_CC_SHARED));
>> >> >> error_tlb:
>> >> >> kfree(pool);
>> >> >> error:
>> >> >> @@ -742,7 +763,9 @@ static void swiotlb_dyn_alloc(struct work_struct *work)
>> >> >> struct io_tlb_pool *pool;
>> >> >>
>> >> >> pool = swiotlb_alloc_pool(NULL, IO_TLB_MIN_SLABS, default_nslabs,
>> >> >> - default_nareas, mem->phys_limit, GFP_KERNEL);
>> >> >> + default_nareas, mem->phys_limit,
>> >> >> + mem->unencrypted ? DMA_ATTR_CC_SHARED : 0,
>> >> >> + GFP_KERNEL);
>> >> >> if (!pool) {
>> >> >> pr_warn_ratelimited("Failed to allocate new pool");
>> >> >> return;
>> >> >> @@ -762,7 +785,7 @@ static void swiotlb_dyn_free(struct rcu_head *rcu)
>> >> >> size_t tlb_size = pool->end - pool->start;
>> >> >>
>> >> >> free_pages((unsigned long)pool->slots, get_order(slots_size));
>> >> >> - swiotlb_free_tlb(pool->vaddr, tlb_size);
>> >> >> + swiotlb_free_tlb(pool->vaddr, tlb_size, pool->unencrypted);
>> >> >> kfree(pool);
>> >> >> }
>> >> >>
>> >> >> @@ -1232,6 +1255,7 @@ static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
>> >> >> nslabs = nr_slots(alloc_size);
>> >> >> phys_limit = min_not_zero(*dev->dma_mask, dev->bus_dma_limit);
>> >> >> pool = swiotlb_alloc_pool(dev, nslabs, nslabs, 1, phys_limit,
>> >> >> + mem->unencrypted ? DMA_ATTR_CC_SHARED : 0,
>> >> >> GFP_NOWAIT);
>> >> >> if (!pool)
>> >> >> return -1;
>> >> >> @@ -1394,6 +1418,7 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
>> >> >> enum dma_data_direction dir, unsigned long attrs)
>> >> >> {
>> >> >> struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
>> >> >> + bool require_decrypted = false;
>> >> >> unsigned int offset;
>> >> >> struct io_tlb_pool *pool;
>> >> >> unsigned int i;
>> >> >> @@ -1411,6 +1436,16 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
>> >> >> if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
>> >> >> pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
>> >> >>
>> >> >> + /*
>> >> >> + * if we are trying to swiotlb map a decrypted paddr or the paddr is encrypted
>> >> >> + * but the device is forcing decryption, use decrypted io_tlb_mem
>> >> >> + */
>> >> >> + if ((attrs & DMA_ATTR_CC_SHARED) || force_dma_unencrypted(dev))
>> >> >> + require_decrypted = true;
>> >> >> +
>> >> >> + if (require_decrypted != mem->unencrypted)
>> >> >> + return (phys_addr_t)DMA_MAPPING_ERROR;
>> >> >> +
>> >> >> /*
>> >> >> * The default swiotlb memory pool is allocated with PAGE_SIZE
>> >> >> * alignment. If a mapping is requested with larger alignment,
>> >> >> @@ -1608,8 +1643,14 @@ dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
>> >> >> if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
>> >> >> return DMA_MAPPING_ERROR;
>> >> >>
>> >> >> - /* Ensure that the address returned is DMA'ble */
>> >> >> - dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
>> >> >> + /*
>> >> >> + * Use the allocated io_tlb_mem encryption type to determine dma addr.
>> >> >> + */
>> >> >> + if (dev->dma_io_tlb_mem->unencrypted)
>> >> >> + dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
>> >> >> + else
>> >> >> + dma_addr = phys_to_dma_encrypted(dev, swiotlb_addr);
>> >> >> +
>> >> >> if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
>> >> >> __swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
>> >> >> attrs | DMA_ATTR_SKIP_CPU_SYNC,
>> >> >> @@ -1773,7 +1814,8 @@ static inline void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
>> >> >>
>> >> >> #ifdef CONFIG_DMA_RESTRICTED_POOL
>> >> >>
>> >> >> -struct page *swiotlb_alloc(struct device *dev, size_t size)
>> >> >> +struct page *swiotlb_alloc(struct device *dev, size_t size,
>> >> >> + unsigned long attrs)
>> >> >> {
>> >> >> struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
>> >> >> struct io_tlb_pool *pool;
>> >> >> @@ -1784,6 +1826,9 @@ struct page *swiotlb_alloc(struct device *dev, size_t size)
>> >> >> if (!mem)
>> >> >> return NULL;
>> >> >>
>> >> >> + if (mem->unencrypted != !!(attrs & DMA_ATTR_CC_SHARED))
>> >> >> + return NULL;
>> >> >> +
>> >> >> align = (1 << (get_order(size) + PAGE_SHIFT)) - 1;
>> >> >> index = swiotlb_find_slots(dev, 0, size, align, &pool);
>> >> >> if (index == -1)
>> >> >> @@ -1853,9 +1898,18 @@ static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
>> >> >> kfree(mem);
>> >> >> return -ENOMEM;
>> >> >> }
>> >> >> + /*
>> >> >> + * if platform supports memory encryption,
>> >> >> + * restricted mem pool is decrypted by default
>> >> >> + */
>> >> >> + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
>> >> >> + mem->unencrypted = true;
>> >> >> + set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
>> >> >> + rmem->size >> PAGE_SHIFT);
>> >> >> + } else {
>> >> >> + mem->unencrypted = false;
>> >> >> + }
>> >> >
>> >> > This breaks pKVM as it doesn’t set CC_ATTR_MEM_ENCRYPT, so all virtio
>> >> > traffic now fails.
>> >> >
>> >> > Also, by design, some drivers are clueless about bouncing, so
>> >> > I believe that the pool should have a way to control it’s property
>> >> > (encrypted or decrypted) and that takes priority over whatever
>> >> > attributes comes from allocation.
>> >> > And that brings us to the same point whether it’s better to return
>> >> > the memory along with it’s state or we pass the requested state.
>> >> > I think for other cases it’s fine for the device/DMA-API to dictate
>> >> > the attrs, but not in restricted-dma case, the firmware just knows better.
>> >> >
>> >>
>> >> Is it that the pKVM guest kernel does not have awareness of
>> >> encrypted/decrypted DMA allocations? Instead, the firmware attaches
>> >> hypervisor-shared pages to the device via restricted-dma-pool? The
>> >> kernel then has swiotlb->for_alloc = true, and hence all DMA allocations
>> >> go through the restricted-dma-pool?
>> >
>> > Yes.
>> >
>> >>
>> >> Given that pKVM supports pkvm_set_memory_encrypted() and
>> >> pkvm_set_memory_decrypted(), can we consider adding CC_ATTR_MEM_ENCRYPT
>> >> support to pKVM? It would also be good to investigate whether we can set
>> >> force_dma_unencrypted(dev) to true where needed.
>> >
>> > I was looking in to that, but it didn't work because
>> > force_dma_unencrypted() is broken with restricted-dma due to the
>> > double decryption issue, that's when I sent my first series [1]
>> >
>> > May be we should land some basic fixes for that path so we can
>> > convert pKVM, then we do the full rework.
>> >
>> > I will revive my old work and see if I can send a RFC.
>> >
>> > [1] https://lore.kernel.org/all/20260305170335.963568-1-smostafa@google.com/
>> >
>>
>> With this series, can you check whether the only change needed is
>> something like the following?
>>
>> modified kernel/dma/swiotlb.c
>> @@ -1905,7 +1905,8 @@ static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
>> * if platform supports memory encryption,
>> * restricted mem pool is decrypted by default
>> */
>> - if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
>> + //if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
>> + if (true) {
>> mem->unencrypted = true;
>> set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
>> rmem->size >> PAGE_SHIFT);
>
> Yes, that boots, but I will need to do more tests.
>
>>
>> >
>> >>
>> >> I agree that this patch, as it stands, can break pKVM because we are now
>> >> missing the set_memory_decrypted() call required for pKVM to work.
>> >>
>> >> We now mark the swiotlb io_tlb_mem as unencrypted/encrypted in the guest
>> >> using struct io_tlb_mem->unencrypted. I am not clear what we can use for
>> >> pKVM to conditionalize this so that it works for both protected and
>> >> unprotected guests.
>> >
>> > There is no problem with non-protected guests as they don't use memory
>> > encryption, my initial thought was that th encrpyted/decrypted is
>> > per-pool property which is decided by FW (device-tree).
>> >
>>
>> What I meant was that we need a generic way to identify a pKVM guest, so
>> that we can use it in the conditional above.
>
> I have this patch, with that I can boot with your series unmodified,
> but I will need to do more testing.
>
Thanks, I can add this to the series once you complete the required testing.
>
> From d795b4c4ee2437587616b2b342e9996afe6d6680 Mon Sep 17 00:00:00 2001
> From: Mostafa Saleh <smostafa@google.com>
> Date: Thu, 14 May 2026 13:46:15 +0000
> Subject: [PATCH] arm64/coco: Add pKVM as a CC platform
>
> pKVM does support memory encryption, expose that to the rest of
> the kernel through cc_platform_has()
>
> At the moment, all devices inside the guest are emulated which
> requires its memory to be shared back to the host (decrypted), so
> set force_dma_unencrypted() to always return true.
>
> Signed-off-by: Mostafa Saleh <smostafa@google.com>
> ---
> arch/arm64/include/asm/hypervisor.h | 6 ++++++
> arch/arm64/include/asm/mem_encrypt.h | 3 ++-
> arch/arm64/kernel/rsi.c | 12 ------------
> arch/arm64/mm/init.c | 13 +++++++++++++
> drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c | 5 +++++
> 5 files changed, 26 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm64/include/asm/hypervisor.h b/arch/arm64/include/asm/hypervisor.h
> index a12fd897c877..1b0e15f290be 100644
> --- a/arch/arm64/include/asm/hypervisor.h
> +++ b/arch/arm64/include/asm/hypervisor.h
> @@ -10,8 +10,14 @@ void kvm_arm_target_impl_cpu_init(void);
>
> #ifdef CONFIG_ARM_PKVM_GUEST
> void pkvm_init_hyp_services(void);
> +bool is_protected_kvm_guest(void);
> #else
> static inline void pkvm_init_hyp_services(void) { };
> +
> +static inline bool is_protected_kvm_guest(void)
> +{
> + return false;
> +}
> #endif
>
> static inline void kvm_arch_init_hyp_services(void)
> diff --git a/arch/arm64/include/asm/mem_encrypt.h b/arch/arm64/include/asm/mem_encrypt.h
> index 314b2b52025f..636f45b4d8af 100644
> --- a/arch/arm64/include/asm/mem_encrypt.h
> +++ b/arch/arm64/include/asm/mem_encrypt.h
> @@ -2,6 +2,7 @@
> #ifndef __ASM_MEM_ENCRYPT_H
> #define __ASM_MEM_ENCRYPT_H
>
> +#include <asm/hypervisor.h>
> #include <asm/rsi.h>
>
> struct device;
> @@ -20,7 +21,7 @@ int realm_register_memory_enc_ops(void);
>
> static inline bool force_dma_unencrypted(struct device *dev)
> {
> - return is_realm_world();
> + return is_realm_world() || is_protected_kvm_guest();
> }
>
> /*
> diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c
> index 92160f2e57ff..25ca75ce1a4d 100644
> --- a/arch/arm64/kernel/rsi.c
> +++ b/arch/arm64/kernel/rsi.c
> @@ -7,7 +7,6 @@
> #include <linux/memblock.h>
> #include <linux/psci.h>
> #include <linux/swiotlb.h>
> -#include <linux/cc_platform.h>
> #include <linux/platform_device.h>
>
> #include <asm/io.h>
> @@ -23,17 +22,6 @@ EXPORT_SYMBOL(prot_ns_shared);
> DEFINE_STATIC_KEY_FALSE_RO(rsi_present);
> EXPORT_SYMBOL(rsi_present);
>
> -bool cc_platform_has(enum cc_attr attr)
> -{
> - switch (attr) {
> - case CC_ATTR_MEM_ENCRYPT:
> - return is_realm_world();
> - default:
> - return false;
> - }
> -}
> -EXPORT_SYMBOL_GPL(cc_platform_has);
> -
> static bool rsi_version_matches(void)
> {
> unsigned long ver_lower, ver_higher;
> diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
> index acf67c7064db..a087ac5b15f7 100644
> --- a/arch/arm64/mm/init.c
> +++ b/arch/arm64/mm/init.c
> @@ -12,6 +12,7 @@
> #include <linux/swap.h>
> #include <linux/init.h>
> #include <linux/cache.h>
> +#include <linux/cc_platform.h>
> #include <linux/mman.h>
> #include <linux/nodemask.h>
> #include <linux/initrd.h>
> @@ -36,6 +37,7 @@
>
> #include <asm/boot.h>
> #include <asm/fixmap.h>
> +#include <asm/hypervisor.h>
> #include <asm/kasan.h>
> #include <asm/kernel-pgtable.h>
> #include <asm/kvm_host.h>
> @@ -414,6 +416,17 @@ void dump_mem_limit(void)
> }
> }
>
> +bool cc_platform_has(enum cc_attr attr)
> +{
> + switch (attr) {
> + case CC_ATTR_MEM_ENCRYPT:
> + return is_realm_world() || is_protected_kvm_guest();
> + default:
> + return false;
> + }
> +}
> +EXPORT_SYMBOL_GPL(cc_platform_has);
> +
> #ifdef CONFIG_EXECMEM
> static u64 module_direct_base __ro_after_init = 0;
> static u64 module_plt_base __ro_after_init = 0;
> diff --git a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
> index 4230b817a80b..297e6d6019b8 100644
> --- a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
> +++ b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
> @@ -95,6 +95,11 @@ static int mmio_guard_ioremap_hook(phys_addr_t phys, size_t size,
> return 0;
> }
>
> +bool is_protected_kvm_guest(void)
> +{
> + return !!pkvm_granule;
> +}
> +
> void pkvm_init_hyp_services(void)
> {
> int i;
-aneesh
^ permalink raw reply
* Re: (subset) [PATCH] leds: Move MODULE_DEVICE_TABLE next to the table itself
From: Lee Jones @ 2026-05-14 14:43 UTC (permalink / raw)
To: Lee Jones, Pavel Machek, William Zhang, Anand Gore, Kursad Oney,
Florian Fainelli, Rafał Miłecki,
Broadcom internal kernel review list, Thomas Weißschuh,
Benson Leung, Guenter Roeck, linux-leds, linux-arm-kernel,
linux-kernel, chrome-platform, Krzysztof Kozlowski
In-Reply-To: <20260505102846.186219-2-krzysztof.kozlowski@oss.qualcomm.com>
On Tue, 05 May 2026 12:28:45 +0200, Krzysztof Kozlowski wrote:
> By convention MODULE_DEVICE_TABLE() immediately follows the ID table it
> exports, because this is easier to read and verify. It also makes more
> sense since #ifdef for ACPI or OF could hide both of them.
>
> Most of the privers already have this correctly placed, so adjust
> the missing ones. No functional impact.
>
> [...]
Applied, thanks!
[1/1] leds: Move MODULE_DEVICE_TABLE next to the table itself
commit: 7c3d6730e8f03220f48e70ba9d4c05296aa83fae
--
Lee Jones [李琼斯]
^ permalink raw reply
* Re: [PATCH v2] nvme-apple: Reset q->sq_tail during queue init
From: Keith Busch @ 2026-05-14 14:40 UTC (permalink / raw)
To: Nick Chan
Cc: Sven Peter, Janne Grunau, Neal Gompa, Jens Axboe,
Christoph Hellwig, Sagi Grimberg, asahi, linux-arm-kernel,
linux-nvme, linux-kernel, stable, Yuriy Havrylyuk
In-Reply-To: <20260514-nvme-apple-sq-reset-v2-1-84cbb5c70bf5@gmail.com>
On Thu, May 14, 2026 at 09:16:01PM +0800, Nick Chan wrote:
> Fixes a "duplicate tag error for tag 0" firmware crash during controller
> reset while setting up the admin queue on Apple A11 / T8015.
Thanks, applied to nvme-7.1.
^ permalink raw reply
* Re: [PATCH v5 1/3] firmware: smccc: coco: Manage arm-smccc platform device and CCA auxiliary drivers
From: Aneesh Kumar K.V @ 2026-05-14 14:38 UTC (permalink / raw)
To: Catalin Marinas, Greg KH
Cc: Suzuki K Poulose, linux-coco, linux-arm-kernel, linux-kernel,
Jeremy Linton, Jonathan Cameron, Lorenzo Pieralisi, Mark Rutland,
Sudeep Holla, Will Deacon, Steven Price
In-Reply-To: <agXL12bNh4gGyK1K@arm.com>
Catalin Marinas <catalin.marinas@arm.com> writes:
> On Thu, May 14, 2026 at 02:55:48PM +0200, Greg Kroah-Hartman wrote:
>> On Thu, May 14, 2026 at 12:04:13PM +0100, Suzuki K Poulose wrote:
>> > On 14/05/2026 10:40, Aneesh Kumar K.V (Arm) wrote:
>> > > Make the SMCCC driver responsible for registering the arm-smccc platform
>> > > device and after confirming the relevant SMCCC function IDs, create
>> > > the arm_cca_guest auxiliary device.
>> > >
>> >
>> > There are a few changes squashed in to this patch. Please could we
>> > split the patch in the following order ?
>> >
>> > 1. Add platform device for arm-smccc
>>
>> Do not make any more "fake" platform devices please.
>>
>> > 2. Move TRNG to Auxilliary Device - (Even though it is a later patch, move
>> > it before the RSI changes)
>>
>> No, move it to the faux api please.
>
> So should we end up with:
>
> /sys/devices/faux/arm-smccc/
> smccc_trng/
> arm-rsi-dev/
> tsm/tsm0
>
> /sys/class/tsm/tsm0
> -> ../../devices/faux/arm-smccc/arm-rsi-dev/tsm/tsm0
>
> /sys/firmware/cca/
> realm_guest
But we need the ability to autoload different TSM backend drivers based
on the support/availability of these SMCCC function-id ranges. faux
device don't support that.
-aneesh
^ permalink raw reply
* Re: [PATCH v4 04/13] dma: swiotlb: track pool encryption state and honor DMA_ATTR_CC_SHARED
From: Jason Gunthorpe @ 2026-05-14 14:37 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Mostafa Saleh, iommu, linux-arm-kernel, linux-kernel, linux-coco,
Robin Murphy, Marek Szyprowski, Will Deacon, Marc Zyngier,
Steven Price, Suzuki K Poulose, Catalin Marinas, Jiri Pirko,
Petr Tesarik, Alexey Kardashevskiy, Dan Williams, Xu Yilun,
linuxppc-dev, linux-s390, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy (CS GROUP), Alexander Gordeev,
Gerald Schaefer, Heiko Carstens, Vasily Gorbik,
Christian Borntraeger, Sven Schnelle, x86
In-Reply-To: <yq5apl2y5f96.fsf@kernel.org>
On Thu, May 14, 2026 at 06:18:05PM +0530, Aneesh Kumar K.V wrote:
> > There is no problem with non-protected guests as they don't use memory
> > encryption, my initial thought was that th encrpyted/decrypted is
> > per-pool property which is decided by FW (device-tree).
>
> What I meant was that we need a generic way to identify a pKVM guest, so
> that we can use it in the conditional above.
If I understood Mostafa's remarks I think different devices in the
guest need shared/decrypted and some don't? Ie a virtio hypervisor
device needs shared while a real PCI device doesn't? Is that right?
In CC terms that would be a mixture of T=0 and T=1 devices hardwired
and signaled by firwmare..
Ideally we'd have a flow where if the arch precreates a swiotlb pool
with special parameters this overrides all other decision making. Then
this series is about making CC NOT use that flow... ??
Jason
^ permalink raw reply
* Re: [PATCH v5 1/3] firmware: smccc: coco: Manage arm-smccc platform device and CCA auxiliary drivers
From: Aneesh Kumar K.V @ 2026-05-14 14:37 UTC (permalink / raw)
To: Greg KH, Suzuki K Poulose
Cc: linux-coco, linux-arm-kernel, linux-kernel, Catalin Marinas,
Jeremy Linton, Jonathan Cameron, Lorenzo Pieralisi, Mark Rutland,
Sudeep Holla, Will Deacon, Steven Price
In-Reply-To: <2026051420-amusement-drove-73e6@gregkh>
Greg KH <gregkh@linuxfoundation.org> writes:
> On Thu, May 14, 2026 at 12:04:13PM +0100, Suzuki K Poulose wrote:
>> Hi Aneesh
>>
>> On 14/05/2026 10:40, Aneesh Kumar K.V (Arm) wrote:
>> > Make the SMCCC driver responsible for registering the arm-smccc platform
>> > device and after confirming the relevant SMCCC function IDs, create
>> > the arm_cca_guest auxiliary device.
>> >
>>
>> There are a few changes squashed in to this patch. Please could we
>> split the patch in the following order ?
>>
>> 1. Add platform device for arm-smccc
>
> Do not make any more "fake" platform devices please.
>
>> 2. Move TRNG to Auxilliary Device - (Even though it is a later patch, move
>> it before the RSI changes)
>
> No, move it to the faux api please.
>
Maybe I was not complete in my previous reply. I did not want to repeat
the entire thread, so I quoted the lore link for more details.
1. We have platform firmware-provided SMCCC interfaces. Based on the
support/availability of these function IDs, we want to load multiple
drivers.
2. This patch series adds a platform device to represent the
firmware-provided SMCCC resource.
3. Different SMCCC ranges are now represented as auxiliary devices.
4. Different subsystems, such as TSM, can autoload their backend drivers
based on the availability of these SMCCC ranges, which are now
represented as auxiliary devices.
You had agreed to all of this in the previous discussion here:
https://lore.kernel.org/all/2025101516-handbook-hyphen-62ec@gregkh
-aneesh
^ permalink raw reply
* [PATCH v22 13/13] arm64: dts: qcom: Add psci reboot-modes for talos boards
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski, Song Xue
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for qcs615-ride, for use by the
psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via the
Firehose protocol.
Support for these modes is firmware dependent.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 831002789838033ff6c4135f2d558a0af0d3ec83..ad488570135591eb7a9e5dec5fb1924163a159e9 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -498,6 +498,13 @@ &pon_resin {
status = "okay";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index ff5afbfce2a4744777829a1938754f02a5f6cb5c..83ba8d3bc40731f54d71b6892045bc1dd15d320d 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -560,7 +560,7 @@ pmu-a76 {
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.34.1
^ permalink raw reply related
* [PATCH v22 12/13] arm64: dts: qcom: Add psci reboot-modes for monaco boards
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for monaco-evk and
qcs8300-ride for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-evk.dts | 7 +++++++
arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 7 +++++++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
index 9d17ef7d2caf130564efc2d0159ac0de39126e80..df668dbf2bc60175c36cabfa310aff625647899e 100644
--- a/arch/arm64/boot/dts/qcom/monaco-evk.dts
+++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -661,6 +661,13 @@ usb2_id: usb2-id-state {
};
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_i2c0_data_clk {
drive-strength = <2>;
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 7b1d57460f1e6953acc7fa06d22a1f83ab24edb0..da675f7a8f2d83f3598a6a7ad71a99206213d03c 100644
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -674,7 +674,7 @@ pmu-a78 {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index e9a8553a8d821ca88a38ac59a78625707850bb5d..3ab5ae3124ed5314f04202b6b247fbbbef665053 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -678,6 +678,13 @@ &mdss_dsi0_out {
remote-endpoint = <&dsi2dp_bridge_in>;
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
--
2.34.1
^ permalink raw reply related
* [PATCH v22 11/13] arm64: dts: qcom: Add psci reboot-modes for lemans boards
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for lemans-evk and
lemans-ride-common(sa8775p-ride, sa8775p-ride-r3, qcs9100-ride,
qcs9100-ride-r3) for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans-evk.dts | 7 +++++++
arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 7 +++++++
arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts
index c665db6a4595cef441f4bd5ba21fe133652b97c6..8be0f50188839e6301e33a50948a523825fc5a6a 100644
--- a/arch/arm64/boot/dts/qcom/lemans-evk.dts
+++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts
@@ -758,6 +758,13 @@ usb2_id: usb2-id-state {
};
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_i2c19_default {
drive-strength = <2>;
bias-pull-up;
diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
index 40f88498999bd89e030a6685e6b84e7283e866c6..2a9ef170f654b1e270b1fa6d4b861dc0c4642760 100644
--- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi
@@ -800,6 +800,13 @@ &pmm8654au_3_gpios {
"GNSS_BOOT_MODE";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_1 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 84a1e5ebbf5e58b2fe11978c3af08cda614605f0..447d80aec5bfa1fcf11a933669f4740ef310c9c2 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -559,7 +559,7 @@ pmu {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.34.1
^ permalink raw reply related
* [PATCH v22 10/13] arm64: dts: qcom: Add psci reboot-modes for kodiak boards
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Add PSCI SYSTEM_RESET2 reboot-modes for qcm6490-idp and qcs6490-rb3gen2
for use by the psci-reboot-mode driver.
The following modes are defined:
- bootloader: reboot into fastboot mode for fastboot flashing.
- edl: reboot into emergency download mode for image loading via
the Firehose protocol.
Support for these modes is firmware dependent and not available across
all kodiak based boards.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +++++++
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 +++++++
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index 988ca5f7c8a0ec5196c88881f529236c321ad617..72bcc732ab7b64288e1848edb8a55e2c7fe34f98 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -863,7 +863,7 @@ pmu-a78 {
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index bdc02260f902bd37242ba96b90a858ff091e0c80..b7a0b53476395c25f264f2808176588f5943c4c7 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -786,6 +786,13 @@ &qup_uart7_tx {
bias-disable;
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index ceb68a890bf401ca1d0c787a801d6b192f4e0743..f4af4d1e9bfcee0bbeca892d5386bcec5663c20a 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -1096,6 +1096,13 @@ &pon_resin {
status = "okay";
};
+&psci {
+ reboot-mode {
+ mode-bootloader = <0x80010001 0x2>;
+ mode-edl = <0x80000000 0x1>;
+ };
+};
+
&qup_uart7_cts {
/*
* Configure a bias-bus-hold on CTS to lower power
--
2.34.1
^ permalink raw reply related
* [PATCH v22 09/13] mfd: psci-mfd: Add psci-reboot-mode child cell
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
The PSCI "reboot-mode" node does not define a compatible because it is a
configuration of boot-states provided by the underlying firmware. With
the new firmware-node based cells in mfd-core, this node can now be
exposed as a proper child cell.
Add the psci-reboot-mode child cell to the psci-mfd driver and associate
the reboot-mode node as its firmware-node.
Suggested-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/mfd/psci-mfd.c | 18 ++++++++++++++++++
drivers/power/reset/Kconfig | 2 +-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/psci-mfd.c b/drivers/mfd/psci-mfd.c
index 7affd6bb09dd83452664edeccb09290fe4f43186..852d8e294a438d4ee6789c556d16a83739af2013 100644
--- a/drivers/mfd/psci-mfd.c
+++ b/drivers/mfd/psci-mfd.c
@@ -7,11 +7,29 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/property.h>
+
+static struct fwnode_handle *psci_reboot_mode_get_child_fwnode(struct device *parent)
+{
+ struct fwnode_handle *fwnode;
+
+ fwnode = fwnode_get_named_child_node(dev_fwnode(parent), "reboot-mode");
+ if (!fwnode_device_is_available(fwnode)) {
+ fwnode_handle_put(fwnode);
+ fwnode = NULL;
+ }
+
+ return fwnode;
+}
static const struct mfd_cell psci_cells[] = {
{
.name = "psci-cpuidle-domain",
},
+ {
+ .name = "psci-reboot-mode",
+ .get_child_fwnode = psci_reboot_mode_get_child_fwnode,
+ },
};
static int psci_mfd_probe(struct platform_device *pdev)
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index d9d1f768b8691abc3b32f2675519f2ddbaf19b84..79559206d5852ae5eae4c8eb2c390901cea7531c 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -350,7 +350,7 @@ config NVMEM_REBOOT_MODE
config PSCI_REBOOT_MODE
bool "PSCI reboot mode driver"
- depends on OF && ARM_PSCI_FW
+ depends on OF && ARM_PSCI_FW && MFD_PSCI
select REBOOT_MODE
help
Say y here will enable PSCI reboot mode driver. This gets
--
2.34.1
^ permalink raw reply related
* [PATCH v22 08/13] mfd: core: Add firmware-node support to MFD cells
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
MFD core has no way to register a child device using an explicit firmware
node. This prevents drivers from registering child nodes when those nodes
do not define a compatible string. One such example is the PSCI
"reboot-mode" node, which omits a compatible string as it describes
boot-states provided by the underlying firmware.
Extend struct mfd_cell with a callback that allows drivers to provide an
explicit firmware node. The node is added to the MFD child device during
registration when none is assigned by device tree, ACPI, or software
matching.
Suggested-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/mfd/mfd-core.c | 30 ++++++++++++++++++++++++++++++
include/linux/mfd/core.h | 14 ++++++++++++++
2 files changed, 44 insertions(+)
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
index 7aa32b90cf1eb7fa0a05bf3dc506e60a262c9850..cc2a2a924d6d3044e29a9f864b536ee325ed797b 100644
--- a/drivers/mfd/mfd-core.c
+++ b/drivers/mfd/mfd-core.c
@@ -10,6 +10,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/acpi.h>
+#include <linux/fwnode.h>
#include <linux/list.h>
#include <linux/property.h>
#include <linux/mfd/core.h>
@@ -148,6 +149,11 @@ static int mfd_match_of_node_to_dev(struct platform_device *pdev,
return 0;
}
+static void mfd_child_fwnode_put(void *data)
+{
+ fwnode_handle_put(data);
+}
+
static int mfd_add_device(struct device *parent, int id,
const struct mfd_cell *cell,
struct resource *mem_base,
@@ -156,6 +162,7 @@ static int mfd_add_device(struct device *parent, int id,
struct resource *res;
struct platform_device *pdev;
struct mfd_of_node_entry *of_entry, *tmp;
+ struct fwnode_handle *fwnode;
bool disabled = false;
int ret = -ENOMEM;
int platform_id;
@@ -224,6 +231,29 @@ static int mfd_add_device(struct device *parent, int id,
mfd_acpi_add_device(cell, pdev);
+ if (!pdev->dev.fwnode && cell->get_child_fwnode) {
+ fwnode = cell->get_child_fwnode(parent);
+ if (fwnode) {
+ device_set_node(&pdev->dev, fwnode);
+
+ /*
+ * platform_device_release() drops only of_node refs.
+ * Track non-OF fwnodes explicitly so they are put on
+ * all teardown paths.
+ */
+ if (!to_of_node(fwnode)) {
+ ret = devm_add_action(&pdev->dev,
+ mfd_child_fwnode_put,
+ fwnode);
+ if (ret) {
+ device_set_node(&pdev->dev, NULL);
+ fwnode_handle_put(fwnode);
+ goto fail_of_entry;
+ }
+ }
+ }
+ }
+
if (cell->pdata_size) {
ret = platform_device_add_data(pdev,
cell->platform_data, cell->pdata_size);
diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h
index faeea7abd688f223fb0b31cde0a9b69dfe2a61ff..abfc26c057d6ee46947ba2b6f2e99f420e74b127 100644
--- a/include/linux/mfd/core.h
+++ b/include/linux/mfd/core.h
@@ -50,6 +50,7 @@
#define MFD_DEP_LEVEL_HIGH 1
struct irq_domain;
+struct fwnode_handle;
struct software_node;
/* Matches ACPI PNP id, either _HID or _CID, or ACPI _ADR */
@@ -80,6 +81,19 @@ struct mfd_cell {
/* Software node for the device. */
const struct software_node *swnode;
+ /*
+ * Callback to return an explicit firmware node.
+ * @parent: MFD parent device passed to mfd_add_devices().
+ *
+ * Called only if OF/ACPI matching did not assign a fwnode.
+ * Ownership of the returned reference is transferred to MFD core.
+ *
+ * Return a referenced fwnode or NULL if none is available.
+ *
+ * mfd_cell must be zero-initialized or get_child_fwnode must be NULL
+ * when unused.
+ */
+ struct fwnode_handle *(*get_child_fwnode)(struct device *parent);
/*
* Device Tree compatible string
--
2.34.1
^ permalink raw reply related
* [PATCH v22 07/13] power: reset: Add psci-reboot-mode driver
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
PSCI supports different types of resets like SYSTEM_RESET, SYSTEM_RESET2
ARCH WARM reset and SYSTEM_RESET2 vendor-specific resets. Currently
there is no common driver that handles all supported psci resets at one
place. Additionally, there is no common mechanism to issue the supported
psci resets from userspace.
Add a psci-reboot-mode driver, and define two types of PSCI resets,
predefined-resets and vendor-specific resets. Predefined-resets are
defined by psci driver and vendor-specific resets are defined by SoC
vendors, under the psci:reboot-mode node of SoC device tree.
Register the driver with the reboot-mode framework to interface these
resets to userspace. When userspace initiates a supported command, pass
the reset arguments to the PSCI driver to enable command-based reset.
This change allows userspace to issue supported PSCI reset commands
using the standard reboot system calls while enabling SoC vendors to
define their specific resets for PSCI.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
MAINTAINERS | 1 +
drivers/power/reset/Kconfig | 10 +++++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/psci-reboot-mode.c | 72 ++++++++++++++++++++++++++++++++++
4 files changed, 84 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 36ba42209c0b332813a296880cd55798a5592d2a..4b0815c31679550f5ab719de4a5852990c7cc643 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21342,6 +21342,7 @@ S: Maintained
F: Documentation/devicetree/bindings/arm/psci.yaml
F: drivers/firmware/psci/
F: drivers/mfd/psci-mfd.c
+F: drivers/power/reset/psci-reboot-mode.c
F: include/linux/psci.h
F: include/uapi/linux/psci.h
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 124afb99febe92450b6ae322aeed3b63fa2070df..d9d1f768b8691abc3b32f2675519f2ddbaf19b84 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -348,6 +348,16 @@ config NVMEM_REBOOT_MODE
then the bootloader can read it and take different
action according to the mode.
+config PSCI_REBOOT_MODE
+ bool "PSCI reboot mode driver"
+ depends on OF && ARM_PSCI_FW
+ select REBOOT_MODE
+ help
+ Say y here will enable PSCI reboot mode driver. This gets
+ the PSCI reboot mode arguments and passes them to psci
+ driver. psci driver uses these arguments for issuing
+ device reset into different boot states.
+
config POWER_MLXBF
tristate "Mellanox BlueField power handling driver"
depends on (GPIO_MLXBF2 || GPIO_MLXBF3) && ACPI
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index d7ae97241a838fe1b536b2f911868e7590d12e3b..02948622fe3d00e165f941108ab92ecb66b0f0e8 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -40,5 +40,6 @@ obj-$(CONFIG_REBOOT_MODE) += reboot-mode.o
obj-$(CONFIG_SYSCON_REBOOT_MODE) += syscon-reboot-mode.o
obj-$(CONFIG_POWER_RESET_SC27XX) += sc27xx-poweroff.o
obj-$(CONFIG_NVMEM_REBOOT_MODE) += nvmem-reboot-mode.o
+obj-$(CONFIG_PSCI_REBOOT_MODE) += psci-reboot-mode.o
obj-$(CONFIG_POWER_MLXBF) += pwr-mlxbf.o
obj-$(CONFIG_POWER_RESET_QEMU_VIRT_CTRL) += qemu-virt-ctrl.o
diff --git a/drivers/power/reset/psci-reboot-mode.c b/drivers/power/reset/psci-reboot-mode.c
new file mode 100644
index 0000000000000000000000000000000000000000..845b2a1816ce53451dea8dfc4bffffda0d3e9293
--- /dev/null
+++ b/drivers/power/reset/psci-reboot-mode.c
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/psci.h>
+#include <linux/reboot-mode.h>
+#include <linux/types.h>
+
+/*
+ * Predefined modes:
+ * reset_type = 0
+ * cookie stored in magic[63:32]
+ */
+#define PSCI_PREDEF_MAGIC(cookie) ((cookie) * BIT_ULL(32))
+
+static const struct reboot_mode_entry psci_resets[] = {
+ {
+ .name = "psci-system-reset",
+ .magic = PSCI_PREDEF_MAGIC(PSCI_RESET_TYPE_SYSTEM_RESET),
+ },
+ {
+ .name = "psci-system-reset2-arch-warm-reset",
+ .magic = PSCI_PREDEF_MAGIC(PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM),
+ },
+};
+
+/*
+ * magic is a pre-encoded value:
+ * reset_type in low 32 bits
+ * cookie in high 32 bits
+ */
+static int psci_reboot_mode_write(struct reboot_mode_driver *reboot, u64 magic)
+{
+ psci_set_reset_cmd(magic);
+ return 0;
+}
+
+static int psci_reboot_mode_probe(struct platform_device *pdev)
+{
+ struct reboot_mode_driver *reboot;
+ size_t count;
+ int ret;
+
+ reboot = devm_kzalloc(&pdev->dev, sizeof(*reboot), GFP_KERNEL);
+ if (!reboot)
+ return -ENOMEM;
+
+ reboot_mode_driver_init(reboot, &pdev->dev, psci_reboot_mode_write);
+
+ /* Skip PSCI SYSTEM_RESET2 modes if unsupported */
+ count = psci_has_system_reset2_support() ? ARRAY_SIZE(psci_resets) : 1;
+ ret = reboot_mode_add_predefined_modes(reboot, psci_resets, count);
+ if (ret)
+ return ret;
+
+ return devm_reboot_mode_register(&pdev->dev, reboot);
+}
+
+static struct platform_driver psci_reboot_mode_driver = {
+ .probe = psci_reboot_mode_probe,
+ .driver = {
+ .name = "psci-reboot-mode",
+ },
+};
+
+module_platform_driver(psci_reboot_mode_driver);
+
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related
* [PATCH v22 06/13] dt-bindings: arm: Document reboot mode magic
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Add bindings to describe vendor-specific reboot modes. Values here
correspond to valid parameters to vendor-specific reset types in PSCI
SYSTEM_RESET2 call.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
Documentation/devicetree/bindings/arm/psci.yaml | 42 +++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml
index 6e2e0c551841111fbb0aa8c0951dca411b94035c..5fdcbf331ea5620363638feb6f8105427a87c00f 100644
--- a/Documentation/devicetree/bindings/arm/psci.yaml
+++ b/Documentation/devicetree/bindings/arm/psci.yaml
@@ -98,6 +98,26 @@ properties:
[1] Kernel documentation - ARM idle states bindings
Documentation/devicetree/bindings/cpu/idle-states.yaml
+ reboot-mode:
+ type: object
+ $ref: /schemas/power/reset/reboot-mode.yaml#
+ unevaluatedProperties: false
+ properties:
+ # "mode-normal" is just SYSTEM_RESET
+ mode-normal: false
+ patternProperties:
+ "^mode-.*$":
+ minItems: 1
+ maxItems: 2
+ description: |
+ Describes a vendor-specific reset type. The string after "mode-"
+ maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call.
+
+ Parameters are named mode-xxx = <type[, cookie]>, where xxx is the
+ name of the magic reboot mode, type corresponds to the reset_type
+ and the values should be provided as per the PSCI SYSTEM_RESET2
+ specs. The cookie value is optional and defaulted to zero.
+
patternProperties:
"^power-domain-":
$ref: /schemas/power/power-domain.yaml#
@@ -137,6 +157,15 @@ allOf:
required:
- cpu_off
- cpu_on
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ const: arm,psci-1.0
+ then:
+ properties:
+ reboot-mode: false
additionalProperties: false
@@ -260,4 +289,17 @@ examples:
domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
};
};
+
+ - |+
+
+ // Case 5: SYSTEM_RESET2 vendor resets
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+
+ reboot-mode {
+ mode-edl = <0x80000000 1>;
+ mode-bootloader = <0x80010001 2>;
+ };
+ };
...
--
2.34.1
^ permalink raw reply related
* [PATCH v22 05/13] mfd: psci-mfd: Add PSCI MFD driver for cpuidle-psci-domain cell
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
PSCI has multiple kernel consumers, such as cpuidle-psci-domain.
Currently, both the PSCI core driver and cpuidle-psci-domain bind
directly to the same PSCI node "arm,psci-1.0". Additional consumers, if
introduced, would also need to bind in the same way, leading to several
drivers attached to a single device node.
Introduce a PSCI MFD driver that binds to "arm,psci-1.0" and registers
PSCI child cells. As the first user, register cpuidle-psci-domain as a
child cell.
Update cpuidle-psci-domain to probe as an MFD child and use the parent
PSCI node for power-domain traversal.
Suggested-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
MAINTAINERS | 1 +
drivers/cpuidle/Kconfig.arm | 1 +
drivers/cpuidle/cpuidle-psci-domain.c | 9 +-------
drivers/mfd/Kconfig | 12 ++++++++++
drivers/mfd/Makefile | 2 ++
drivers/mfd/psci-mfd.c | 43 +++++++++++++++++++++++++++++++++++
6 files changed, 60 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index f877e5aaf2c77df8dea7135ffe3617dd61504fc6..36ba42209c0b332813a296880cd55798a5592d2a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21341,6 +21341,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/arm/psci.yaml
F: drivers/firmware/psci/
+F: drivers/mfd/psci-mfd.c
F: include/linux/psci.h
F: include/uapi/linux/psci.h
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index a1ee475d180dacab245510674514811aec337ad3..1a1316d11e0a2e4f61801586229f5104e2435865 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -36,6 +36,7 @@ config ARM_PSCI_CPUIDLE_DOMAIN
bool "PSCI CPU idle Domain"
depends on ARM_PSCI_CPUIDLE
depends on PM_GENERIC_DOMAINS_OF
+ depends on MFD_PSCI
select DT_IDLE_GENPD
default y
help
diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c
index b9e4ad7d43a3310a76ce62018dff0af1488e33d2..a2d01810f2957abdfa52ae66503dc0cbb205f163 100644
--- a/drivers/cpuidle/cpuidle-psci-domain.c
+++ b/drivers/cpuidle/cpuidle-psci-domain.c
@@ -17,7 +17,6 @@
#include <linux/pm_runtime.h>
#include <linux/psci.h>
#include <linux/slab.h>
-#include <linux/string.h>
#include "cpuidle-psci.h"
#include "dt_idle_genpd.h"
@@ -122,14 +121,9 @@ static void psci_pd_remove(void)
}
}
-static const struct of_device_id psci_of_match[] = {
- { .compatible = "arm,psci-1.0" },
- {}
-};
-
static int psci_cpuidle_domain_probe(struct platform_device *pdev)
{
- struct device_node *np = pdev->dev.of_node;
+ struct device_node *np = pdev->dev.parent->of_node;
bool use_osi = psci_has_osi_support();
int ret = 0, pd_count = 0;
@@ -181,7 +175,6 @@ static struct platform_driver psci_cpuidle_domain_driver = {
.probe = psci_cpuidle_domain_probe,
.driver = {
.name = "psci-cpuidle-domain",
- .of_match_table = psci_of_match,
},
};
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 7192c9d1d268e93d1557ca6519ac96056e37e221..df912b3391459a78e958fbae5852fd93ce3165ca 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2376,6 +2376,18 @@ config MFD_KHADAS_MCU
additional drivers must be enabled in order to use the functionality
of the device.
+config MFD_PSCI
+ bool "PSCI MFD for psci child cells"
+ depends on ARM_PSCI_FW
+ depends on OF
+ select MFD_CORE
+ default y
+ help
+ PSCI MFD registers PSCI child cells and exposes them as
+ platform devices. Child drivers are probed only if enabled in the
+ kernel configuration. Select this option whenever a supported PSCI
+ child driver is selected.
+
config MFD_ACER_A500_EC
tristate "Support for Acer Iconia Tab A500 Embedded Controller"
depends on I2C
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index e75e8045c28afae975ac61d282b3b85af5440119..36e872b11b995135a04ca24c33fd3a4d08e4f49a 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -24,6 +24,8 @@ obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o
obj-$(CONFIG_MFD_GATEWORKS_GSC) += gateworks-gsc.o
obj-$(CONFIG_MFD_MACSMC) += macsmc.o
+obj-$(CONFIG_MFD_PSCI) += psci-mfd.o
+
obj-$(CONFIG_MFD_TI_LP873X) += lp873x.o
obj-$(CONFIG_MFD_TI_LP87565) += lp87565.o
obj-$(CONFIG_MFD_TI_AM335X_TSCADC) += ti_am335x_tscadc.o
diff --git a/drivers/mfd/psci-mfd.c b/drivers/mfd/psci-mfd.c
new file mode 100644
index 0000000000000000000000000000000000000000..7affd6bb09dd83452664edeccb09290fe4f43186
--- /dev/null
+++ b/drivers/mfd/psci-mfd.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+static const struct mfd_cell psci_cells[] = {
+ {
+ .name = "psci-cpuidle-domain",
+ },
+};
+
+static int psci_mfd_probe(struct platform_device *pdev)
+{
+ return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, psci_cells,
+ ARRAY_SIZE(psci_cells), NULL, 0, NULL);
+}
+
+static const struct of_device_id psci_mfd_of_match[] = {
+ { .compatible = "arm,psci-1.0" },
+ { }
+};
+
+static struct platform_driver psci_mfd_driver = {
+ .probe = psci_mfd_probe,
+ .driver = {
+ .name = "psci-mfd",
+ .of_match_table = psci_mfd_of_match,
+ },
+};
+
+static int __init psci_mfd_init(void)
+{
+ return platform_driver_register(&psci_mfd_driver);
+}
+
+core_initcall(psci_mfd_init);
+
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related
* [PATCH v22 04/13] firmware: psci: Introduce command-based resets
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
PSCI currently supports only two resets - SYSTEM_RESET and SYSTEM_RESET2
ARCH WARM reset. The reset patch is selected based on the Linux
reboot_mode variable. The PSCI specification now includes SYSTEM_RESET2
for vendor-specific resets but there's no mechanism to issue these
through psci_sys_reset().
Add a command-based reset mechanism that allows external drivers to set
the psci reset command via a exported psci_set_reset_cmd() function.
Define predefined reset_types - PSCI_RESET_TYPE_SYSTEM_RESET to map to
SYSTEM_RESET, and PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM to map to
SYSTEM_RESET2 arch warm reset. Interpret zero cmd_reset_type, for
predefined reset-command selection via cmd_cookie. For non-zero
cmd_reset_type, check for valid vendor_reset_type and set the psci
reset_command and cookie accordingly.
Disable PSCI command-based reset by default and treat invalid reset
commands as no‑op. psci_sys_reset() follows its original flow based on
reboot_mode until a reset command is explicitly set by
psci_set_reset_cmd(). In the device reset flow, psci_set_reset_cmd() is
called in reboot_notifier phase and the device reset happens in
psci_sys_reset() which is called later in the restart_notifier phase. If
a kernel panic occurs in between these two phases, the reboot should
take its original flow based on the value of reboot_mode. Disable the
command-based reset in such case.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/firmware/psci/psci.c | 75 ++++++++++++++++++++++++++++++++++++++++++--
include/linux/psci.h | 19 +++++++++++
2 files changed, 92 insertions(+), 2 deletions(-)
diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c
index e73bae6cb23a3bfa6441503f667b0ffdfcd72536..4e0710ab09cdb0af7280ff4334aa1ea1bfe95aff 100644
--- a/drivers/firmware/psci/psci.c
+++ b/drivers/firmware/psci/psci.c
@@ -51,6 +51,16 @@ static int resident_cpu = -1;
struct psci_operations psci_ops;
static enum arm_smccc_conduit psci_conduit = SMCCC_CONDUIT_NONE;
+/*
+ * Encoded reset command:
+ * bits[63:32] = cookie
+ * bits[31:0] = reset_type
+ */
+static u64 reset_cmd;
+
+#define PSCI_RESET_TYPE(reset_cmd) ((u32)(reset_cmd))
+#define PSCI_RESET_COOKIE(reset_cmd) ((u32)((reset_cmd) >> 32))
+
bool psci_tos_resident_on(int cpu)
{
return cpu == resident_cpu;
@@ -80,6 +90,35 @@ static u32 psci_cpu_suspend_feature;
static bool psci_system_reset2_supported;
static bool psci_system_off2_hibernate_supported;
+static u32 psci_fn_from_cookie(u32 cookie)
+{
+ switch (cookie) {
+ case PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM:
+ if (psci_system_reset2_supported)
+ return PSCI_FN_NATIVE(1_1, SYSTEM_RESET2);
+ return 0;
+ case PSCI_RESET_TYPE_SYSTEM_RESET:
+ return PSCI_0_2_FN_SYSTEM_RESET;
+ default:
+ return 0;
+ }
+}
+
+/** psci_set_reset_cmd() - Configure reset request for psci_sys_reset()
+ * @psci_reset_cmd: reset command encoded as cookie[63:32] | reset_type[31:0]
+ *
+ * Save reset command.
+ */
+void psci_set_reset_cmd(u64 psci_reset_cmd)
+{
+ reset_cmd = psci_reset_cmd;
+}
+
+bool psci_has_system_reset2_support(void)
+{
+ return psci_system_reset2_supported;
+}
+
static inline bool psci_has_ext_power_state(void)
{
return psci_cpu_suspend_feature &
@@ -306,8 +345,24 @@ static int get_set_conduit_method(const struct device_node *np)
return 0;
}
-static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
- void *data)
+static void psci_handle_reset_cmd(void)
+{
+ u32 psci_sys_reset_fn;
+
+ if ((reset_cmd & BIT_ULL(31)) && psci_system_reset2_supported) {
+ /* PSCI SYSTEM_RESET2 Vendor-specific reset */
+ invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2),
+ PSCI_RESET_TYPE(reset_cmd),
+ PSCI_RESET_COOKIE(reset_cmd), 0);
+ } else {
+ /* cookie part of the reset_cmd decides ARCH WARM RESET vs SYSTEM_RESET */
+ psci_sys_reset_fn = psci_fn_from_cookie(PSCI_RESET_COOKIE(reset_cmd));
+ if (!PSCI_RESET_TYPE(reset_cmd) && psci_sys_reset_fn)
+ invoke_psci_fn(psci_sys_reset_fn, 0, 0, 0);
+ }
+}
+
+static void psci_handle_reboot_mode(void)
{
if ((reboot_mode == REBOOT_WARM || reboot_mode == REBOOT_SOFT) &&
psci_system_reset2_supported) {
@@ -320,6 +375,22 @@ static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
} else {
invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0);
}
+}
+
+static int psci_sys_reset(struct notifier_block *nb, unsigned long action,
+ void *data)
+{
+ /*
+ * Command-based resets are configured at the reboot_notifier phase.
+ * If a kernel panic occurs between the reboot_notifier and this final
+ * reset, ignore the command-based reset and let reboot_mode drive the
+ * reset flow.
+ * If reset_cmd is zero, there is no command to handle.
+ */
+ if (reset_cmd && !panic_in_progress())
+ psci_handle_reset_cmd();
+ else
+ psci_handle_reboot_mode();
return NOTIFY_DONE;
}
diff --git a/include/linux/psci.h b/include/linux/psci.h
index 4ca0060a3fc42ba1ca751c7862fb4ad8dda35a4c..c2458291a3faf5ac89b1528dae2c9b805a2dd075 100644
--- a/include/linux/psci.h
+++ b/include/linux/psci.h
@@ -21,6 +21,21 @@ bool psci_power_state_is_valid(u32 state);
int psci_set_osi_mode(bool enable);
bool psci_has_osi_support(void);
+/**
+ * enum psci_reset_type - PSCI_RESET_TYPE for SYSTEM_RESET.
+ * @PSCI_RESET_TYPE_SYSTEM_RESET: Standard SYSTEM_RESET command.
+ * @PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM: SYSTEM_RESET2 architectural warm reset.
+ *
+ * These enum values map PSCI_RESET_TYPE_SYSTEM_* constants to reset strings
+ * issued from user space. When user space requests a reset, the cookie
+ * carries one of these values, and the PSCI reset path translates it into
+ * the appropriate PSCI system reset call.
+ */
+enum psci_reset_type {
+ PSCI_RESET_TYPE_SYSTEM_RESET = 1,
+ PSCI_RESET_TYPE_SYSTEM_RESET2_ARCH_WARM,
+};
+
struct psci_operations {
u32 (*get_version)(void);
int (*cpu_suspend)(u32 state, unsigned long entry_point);
@@ -45,8 +60,12 @@ struct psci_0_1_function_ids get_psci_0_1_function_ids(void);
#if defined(CONFIG_ARM_PSCI_FW)
int __init psci_dt_init(void);
+void psci_set_reset_cmd(u64 psci_reset_cmd);
+bool psci_has_system_reset2_support(void);
#else
static inline int psci_dt_init(void) { return 0; }
+static inline void psci_set_reset_cmd(u64 psci_reset_cmd) { }
+static inline bool psci_has_system_reset2_support(void) { return false; }
#endif
#if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI)
--
2.34.1
^ permalink raw reply related
* [PATCH v22 03/13] power: reset: reboot-mode: Add support for predefined reboot modes
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
reboot-mode based drivers can define a reboot-mode by adding it under
the reboot-mode node in device tree. This limits such drivers, to define
any predefined reboot-modes statically within the driver and creates a
dependency on device-tree.
Extend the reboot-mode framework to handle predefined modes alongside
those defined in device tree. Drivers can now define their own
reboot-modes and register them via the framework. A centralized init
call has been added to the reboot-mode framework and adopted by
existing drivers. This ensures driver state is initialized together
with predefined modes.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/power/reset/nvmem-reboot-mode.c | 4 +-
drivers/power/reset/qcom-pon.c | 4 +-
drivers/power/reset/reboot-mode.c | 142 ++++++++++++++++++++++++-------
drivers/power/reset/syscon-reboot-mode.c | 4 +-
include/linux/reboot-mode.h | 13 +++
5 files changed, 130 insertions(+), 37 deletions(-)
diff --git a/drivers/power/reset/nvmem-reboot-mode.c b/drivers/power/reset/nvmem-reboot-mode.c
index bd05d660490c686b43134f82f1eadd7665403d20..50e5e1ff4cd3b14f634dc50cdadd97472cf0b1d0 100644
--- a/drivers/power/reset/nvmem-reboot-mode.c
+++ b/drivers/power/reset/nvmem-reboot-mode.c
@@ -51,8 +51,8 @@ static int nvmem_reboot_mode_probe(struct platform_device *pdev)
if (!nvmem_rbm)
return -ENOMEM;
- nvmem_rbm->reboot.dev = &pdev->dev;
- nvmem_rbm->reboot.write = nvmem_reboot_mode_write;
+ reboot_mode_driver_init(&nvmem_rbm->reboot, &pdev->dev,
+ nvmem_reboot_mode_write);
nvmem_rbm->cell = devm_nvmem_cell_get(&pdev->dev, "reboot-mode");
if (IS_ERR(nvmem_rbm->cell)) {
diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c
index 57b36e6186f80aff947fd7f5aae5ce280c65dc6b..95d6f5dd134d54783f5ab6c600d455862e3d39f1 100644
--- a/drivers/power/reset/qcom-pon.c
+++ b/drivers/power/reset/qcom-pon.c
@@ -70,9 +70,9 @@ static int qcom_pon_probe(struct platform_device *pdev)
reason_shift = (long)of_device_get_match_data(&pdev->dev);
if (reason_shift != NO_REASON_SHIFT) {
- pon->reboot_mode.dev = &pdev->dev;
+ reboot_mode_driver_init(&pon->reboot_mode, &pdev->dev,
+ qcom_pon_reboot_mode_write);
pon->reason_shift = reason_shift;
- pon->reboot_mode.write = qcom_pon_reboot_mode_write;
error = devm_reboot_mode_register(&pdev->dev, &pon->reboot_mode);
if (error) {
dev_err(&pdev->dev, "can't register reboot mode\n");
diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot-mode.c
index f1372dc700e48043320812c3d3619ab1539e1854..d76aee524749a6ec3dff9729c2b678b7244e4f09 100644
--- a/drivers/power/reset/reboot-mode.c
+++ b/drivers/power/reset/reboot-mode.c
@@ -31,12 +31,12 @@ struct reboot_mode_sysfs_data {
struct list_head head;
};
-static inline void reboot_mode_release_list(struct reboot_mode_sysfs_data *priv)
+static inline void reboot_mode_release_list(struct list_head *head)
{
struct mode_info *info;
struct mode_info *next;
- list_for_each_entry_safe(info, next, &priv->head, list) {
+ list_for_each_entry_safe(info, next, head, list) {
list_del(&info->list);
kfree_const(info->mode);
kfree(info);
@@ -116,6 +116,51 @@ static int reboot_mode_notify(struct notifier_block *this,
return NOTIFY_DONE;
}
+/**
+ * reboot_mode_driver_init - Initialize reboot-mode state
+ * @reboot: reboot mode driver object to initialize
+ * @dev: backing device
+ * @write: write callback for programming magic
+ *
+ * This function must be called with a valid @dev and @write before calling
+ * reboot_mode_register(), reboot_mode_add_predefined_modes(), or any other
+ * reboot-mode framework API.
+ */
+void reboot_mode_driver_init(struct reboot_mode_driver *reboot,
+ struct device *dev,
+ int (*write)(struct reboot_mode_driver *reboot, u64 magic))
+{
+ memset(reboot, 0, sizeof(*reboot));
+ reboot->dev = dev;
+ reboot->write = write;
+ INIT_LIST_HEAD(&reboot->head);
+ INIT_LIST_HEAD(&reboot->predefined_modes);
+}
+EXPORT_SYMBOL_GPL(reboot_mode_driver_init);
+
+static struct mode_info *reboot_mode_create_info(const char *mode, u64 magic)
+{
+ struct mode_info *info;
+
+ if (!mode || mode[0] == '\0') {
+ pr_err("invalid mode name(%s): too short!\n", mode);
+ return ERR_PTR(-EINVAL);
+ }
+
+ info = kzalloc_obj(*info, GFP_KERNEL);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+ info->mode = kstrdup_const(mode, GFP_KERNEL);
+ if (!info->mode) {
+ kfree(info);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ info->magic = magic;
+ return info;
+}
+
static int reboot_mode_create_device(struct reboot_mode_driver *reboot)
{
struct reboot_mode_sysfs_data *priv;
@@ -157,7 +202,7 @@ static int reboot_mode_create_device(struct reboot_mode_driver *reboot)
return 0;
error:
- reboot_mode_release_list(priv);
+ reboot_mode_release_list(&priv->head);
kfree(priv);
return ret;
}
@@ -170,7 +215,7 @@ static int reboot_mode_create_device(struct reboot_mode_driver *reboot)
*/
int reboot_mode_register(struct reboot_mode_driver *reboot)
{
- struct mode_info *info = NULL;
+ struct mode_info *info;
struct property *prop;
struct device_node *np = reboot->dev->of_node;
size_t len = strlen(PREFIX);
@@ -180,9 +225,11 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
INIT_LIST_HEAD(&reboot->head);
+ if (!np)
+ goto predefined_modes;
+
for_each_property_of_node(np, prop) {
memset(magic, 0, sizeof(magic));
-
if (strncmp(prop->name, PREFIX, len))
continue;
@@ -194,28 +241,18 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
continue;
}
- info = kzalloc(sizeof(*info), GFP_KERNEL);
- if (!info) {
- ret = -ENOMEM;
- goto error;
- }
-
- info->magic = REBOOT_MODE_MAGIC(magic[0], magic[1]);
- info->mode = kstrdup_const(prop->name + len, GFP_KERNEL);
- if (!info->mode) {
- ret = -ENOMEM;
- goto error;
- } else if (info->mode[0] == '\0') {
- kfree_const(info->mode);
- ret = -EINVAL;
- pr_err("invalid mode name(%s): too short!\n", prop->name);
+ info = reboot_mode_create_info(prop->name + len,
+ REBOOT_MODE_MAGIC(magic[0], magic[1]));
+ if (IS_ERR(info)) {
+ ret = PTR_ERR(info);
goto error;
}
list_add_tail(&info->list, &reboot->head);
- info = NULL;
}
+predefined_modes:
+ list_splice_tail_init(&reboot->predefined_modes, &reboot->head);
reboot->reboot_notifier.notifier_call = reboot_mode_notify;
register_reboot_notifier(&reboot->reboot_notifier);
@@ -226,7 +263,6 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
return 0;
error:
- kfree(info);
reboot_mode_unregister(reboot);
return ret;
}
@@ -259,7 +295,7 @@ static inline void reboot_mode_unregister_device(struct reboot_mode_driver *rebo
if (!priv)
return;
- reboot_mode_release_list(priv);
+ reboot_mode_release_list(&priv->head);
kfree(priv);
}
@@ -269,17 +305,12 @@ static inline void reboot_mode_unregister_device(struct reboot_mode_driver *rebo
*/
int reboot_mode_unregister(struct reboot_mode_driver *reboot)
{
- struct mode_info *info;
- struct mode_info *next;
-
unregister_reboot_notifier(&reboot->reboot_notifier);
+ reboot->reboot_notifier.notifier_call = NULL;
reboot_mode_unregister_device(reboot);
- list_for_each_entry_safe(info, next, &reboot->head, list) {
- list_del(&info->list);
- kfree_const(info->mode);
- kfree(info);
- }
+ reboot_mode_release_list(&reboot->head);
+ reboot_mode_release_list(&reboot->predefined_modes);
return 0;
}
@@ -344,6 +375,55 @@ void devm_reboot_mode_unregister(struct device *dev,
}
EXPORT_SYMBOL_GPL(devm_reboot_mode_unregister);
+/**
+ * reboot_mode_add_predefined_modes - Add predefined reboot modes
+ * @reboot: reboot mode driver
+ * @modes: array of predefined reboot mode entries
+ * @count: number of entries in @modes
+ *
+ * Add predefined reboot modes in a single call before registration.
+ *
+ * @reboot must be initialized with reboot_mode_driver_init() before calling
+ * this function.
+ *
+ * Returns: 0 on success, -EINVAL if @modes is NULL, @count is 0, or an entry
+ * has an invalid name, -EBUSY if called after reboot_mode_register()
+ * or if predefined modes are already present, or -ENOMEM on allocation
+ * failures.
+ */
+int reboot_mode_add_predefined_modes(struct reboot_mode_driver *reboot,
+ const struct reboot_mode_entry *modes,
+ size_t count)
+{
+ struct mode_info *info;
+ int ret;
+ size_t i;
+
+ if (reboot->reboot_notifier.notifier_call == reboot_mode_notify ||
+ !list_empty(&reboot->predefined_modes))
+ return -EBUSY;
+
+ if (!modes || !count)
+ return -EINVAL;
+
+ for (i = 0; i < count; i++) {
+ info = reboot_mode_create_info(modes[i].name, modes[i].magic);
+ if (IS_ERR(info)) {
+ ret = PTR_ERR(info);
+ goto error;
+ }
+
+ list_add_tail(&info->list, &reboot->predefined_modes);
+ }
+
+ return 0;
+
+error:
+ reboot_mode_release_list(&reboot->predefined_modes);
+ return ret;
+}
+EXPORT_SYMBOL_GPL(reboot_mode_add_predefined_modes);
+
static int __init reboot_mode_init(void)
{
return class_register(&reboot_mode_class);
diff --git a/drivers/power/reset/syscon-reboot-mode.c b/drivers/power/reset/syscon-reboot-mode.c
index 9f4b18c5e46f6a8bf197773ceceb80b250f57541..55f2fd33e0d2abc599848c936619cb6cdbaed47d 100644
--- a/drivers/power/reset/syscon-reboot-mode.c
+++ b/drivers/power/reset/syscon-reboot-mode.c
@@ -45,8 +45,8 @@ static int syscon_reboot_mode_probe(struct platform_device *pdev)
if (!syscon_rbm)
return -ENOMEM;
- syscon_rbm->reboot.dev = &pdev->dev;
- syscon_rbm->reboot.write = syscon_reboot_mode_write;
+ reboot_mode_driver_init(&syscon_rbm->reboot, &pdev->dev,
+ syscon_reboot_mode_write);
syscon_rbm->mask = 0xffffffff;
syscon_rbm->map = syscon_node_to_regmap(pdev->dev.parent->of_node);
diff --git a/include/linux/reboot-mode.h b/include/linux/reboot-mode.h
index 2ce189fdfff4b396d7cc6f175b30016781ae4fe9..4503ee388cd00d5e004600d51056d623ea23e345 100644
--- a/include/linux/reboot-mode.h
+++ b/include/linux/reboot-mode.h
@@ -15,18 +15,31 @@
/* Get 32 bit arg2 from 64 bit magic */
#define REBOOT_MODE_ARG2(magic) FIELD_GET(GENMASK_ULL(63, 32), magic)
+struct reboot_mode_entry {
+ const char *name;
+ u64 magic;
+};
+
struct reboot_mode_driver {
struct device *dev;
struct list_head head;
+ /* List of predefined reboot-modes, populated via reboot_mode_add_predefined_modes(). */
+ struct list_head predefined_modes;
int (*write)(struct reboot_mode_driver *reboot, u64 magic);
struct notifier_block reboot_notifier;
};
+void reboot_mode_driver_init(struct reboot_mode_driver *reboot,
+ struct device *dev,
+ int (*write)(struct reboot_mode_driver *reboot, u64 magic));
int reboot_mode_register(struct reboot_mode_driver *reboot);
int reboot_mode_unregister(struct reboot_mode_driver *reboot);
int devm_reboot_mode_register(struct device *dev,
struct reboot_mode_driver *reboot);
void devm_reboot_mode_unregister(struct device *dev,
struct reboot_mode_driver *reboot);
+int reboot_mode_add_predefined_modes(struct reboot_mode_driver *reboot,
+ const struct reboot_mode_entry *modes,
+ size_t count);
#endif
--
2.34.1
^ permalink raw reply related
* [PATCH v22 02/13] power: reset: reboot-mode: Add support for 64 bit magic
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Bartosz Golaszewski, Sebastian Reichel
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Current reboot-mode supports a single 32-bit argument for any
supported mode. Some reboot-mode based drivers may require
passing two independent 32-bit arguments during a reboot
sequence, for uses-cases, where a mode requires an additional
argument. Such drivers may not be able to use the reboot-mode
driver. For example, ARM PSCI vendor-specific resets, need two
arguments for its operation – reset_type and cookie, to complete
the reset operation. If a driver wants to implement this
firmware-based reset, it cannot use reboot-mode framework.
Introduce 64-bit magic values in reboot-mode driver to
accommodate up-to two 32-bit arguments in below format.
| Higher 32 bit | Lower 32 bit |
| arg2 | arg1 |
Update current reboot-mode drivers for 64-bit magic.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/power/reset/nvmem-reboot-mode.c | 8 ++++----
drivers/power/reset/qcom-pon.c | 6 +++---
drivers/power/reset/reboot-mode.c | 19 ++++++++++++-------
drivers/power/reset/syscon-reboot-mode.c | 6 +++---
include/linux/reboot-mode.h | 15 ++++++++++++++-
5 files changed, 36 insertions(+), 18 deletions(-)
diff --git a/drivers/power/reset/nvmem-reboot-mode.c b/drivers/power/reset/nvmem-reboot-mode.c
index d260715fccf67f9f072bb56c5defbf885750650e..bd05d660490c686b43134f82f1eadd7665403d20 100644
--- a/drivers/power/reset/nvmem-reboot-mode.c
+++ b/drivers/power/reset/nvmem-reboot-mode.c
@@ -17,10 +17,10 @@ struct nvmem_reboot_mode {
struct nvmem_cell *cell;
};
-static int nvmem_reboot_mode_write(struct reboot_mode_driver *reboot,
- unsigned int magic)
+static int nvmem_reboot_mode_write(struct reboot_mode_driver *reboot, u64 magic)
{
struct nvmem_reboot_mode *nvmem_rbm;
+ u32 magic_arg1 = REBOOT_MODE_ARG1(magic);
size_t buf_len;
void *buf;
int ret;
@@ -32,10 +32,10 @@ static int nvmem_reboot_mode_write(struct reboot_mode_driver *reboot,
return PTR_ERR(buf);
kfree(buf);
- if (buf_len > sizeof(magic))
+ if (buf_len > sizeof(magic_arg1))
return -EINVAL;
- ret = nvmem_cell_write(nvmem_rbm->cell, &magic, buf_len);
+ ret = nvmem_cell_write(nvmem_rbm->cell, &magic_arg1, buf_len);
if (ret < 0)
dev_err(reboot->dev, "update reboot mode bits failed\n");
diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c
index 7e108982a582e8243c5c806bd4a793646b87189f..57b36e6186f80aff947fd7f5aae5ce280c65dc6b 100644
--- a/drivers/power/reset/qcom-pon.c
+++ b/drivers/power/reset/qcom-pon.c
@@ -27,17 +27,17 @@ struct qcom_pon {
long reason_shift;
};
-static int qcom_pon_reboot_mode_write(struct reboot_mode_driver *reboot,
- unsigned int magic)
+static int qcom_pon_reboot_mode_write(struct reboot_mode_driver *reboot, u64 magic)
{
struct qcom_pon *pon = container_of
(reboot, struct qcom_pon, reboot_mode);
+ u32 magic_arg1 = REBOOT_MODE_ARG1(magic);
int ret;
ret = regmap_update_bits(pon->regmap,
pon->baseaddr + PON_SOFT_RB_SPARE,
GENMASK(7, pon->reason_shift),
- magic << pon->reason_shift);
+ magic_arg1 << pon->reason_shift);
if (ret < 0)
dev_err(pon->dev, "update reboot mode bits failed\n");
diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot-mode.c
index 7a74f72a8313b73c3e0930a426ebcf7ef6eed99b..f1372dc700e48043320812c3d3619ab1539e1854 100644
--- a/drivers/power/reset/reboot-mode.c
+++ b/drivers/power/reset/reboot-mode.c
@@ -22,7 +22,7 @@
struct mode_info {
const char *mode;
- u32 magic;
+ u64 magic;
struct list_head list;
};
@@ -74,8 +74,7 @@ static const struct class reboot_mode_class = {
.dev_groups = reboot_mode_groups,
};
-static unsigned int get_reboot_mode_magic(struct reboot_mode_driver *reboot,
- const char *cmd)
+static u64 get_reboot_mode_magic(struct reboot_mode_driver *reboot, const char *cmd)
{
const char *normal = "normal";
struct mode_info *info;
@@ -107,7 +106,7 @@ static int reboot_mode_notify(struct notifier_block *this,
unsigned long mode, void *cmd)
{
struct reboot_mode_driver *reboot;
- unsigned int magic;
+ u64 magic;
reboot = container_of(this, struct reboot_mode_driver, reboot_notifier);
magic = get_reboot_mode_magic(reboot, cmd);
@@ -175,16 +174,22 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
struct property *prop;
struct device_node *np = reboot->dev->of_node;
size_t len = strlen(PREFIX);
- u32 magic;
+ size_t count;
+ u32 magic[2];
int ret;
INIT_LIST_HEAD(&reboot->head);
for_each_property_of_node(np, prop) {
+ memset(magic, 0, sizeof(magic));
+
if (strncmp(prop->name, PREFIX, len))
continue;
- if (device_property_read_u32(reboot->dev, prop->name, &magic)) {
+ count = device_property_count_u32(reboot->dev, prop->name);
+
+ if (!count || count > ARRAY_SIZE(magic) ||
+ device_property_read_u32_array(reboot->dev, prop->name, magic, count)) {
pr_debug("reboot mode %s without magic number\n", prop->name);
continue;
}
@@ -195,7 +200,7 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
goto error;
}
- info->magic = magic;
+ info->magic = REBOOT_MODE_MAGIC(magic[0], magic[1]);
info->mode = kstrdup_const(prop->name + len, GFP_KERNEL);
if (!info->mode) {
ret = -ENOMEM;
diff --git a/drivers/power/reset/syscon-reboot-mode.c b/drivers/power/reset/syscon-reboot-mode.c
index e0772c9f70f7a19cd8ec8a0b7fdbbaa7ba44afd0..9f4b18c5e46f6a8bf197773ceceb80b250f57541 100644
--- a/drivers/power/reset/syscon-reboot-mode.c
+++ b/drivers/power/reset/syscon-reboot-mode.c
@@ -20,16 +20,16 @@ struct syscon_reboot_mode {
u32 mask;
};
-static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot,
- unsigned int magic)
+static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, u64 magic)
{
struct syscon_reboot_mode *syscon_rbm;
+ u32 magic_arg1 = REBOOT_MODE_ARG1(magic);
int ret;
syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot);
ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset,
- syscon_rbm->mask, magic);
+ syscon_rbm->mask, magic_arg1);
if (ret < 0)
dev_err(reboot->dev, "update reboot mode bits failed\n");
diff --git a/include/linux/reboot-mode.h b/include/linux/reboot-mode.h
index 4a2abb38d1d612ec0fdf05eb18c98b210f631b7f..2ce189fdfff4b396d7cc6f175b30016781ae4fe9 100644
--- a/include/linux/reboot-mode.h
+++ b/include/linux/reboot-mode.h
@@ -2,10 +2,23 @@
#ifndef __REBOOT_MODE_H__
#define __REBOOT_MODE_H__
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/types.h>
+
+/* Construct 64-bit reboot magic: arg2 in upper 32 bits, arg1 in lower 32 */
+#define REBOOT_MODE_MAGIC(arg1, arg2) \
+ (FIELD_PREP(GENMASK_ULL(31, 0), (arg1)) | \
+ FIELD_PREP(GENMASK_ULL(63, 32), (arg2)))
+/* Get 32 bit arg1 from 64 bit magic */
+#define REBOOT_MODE_ARG1(magic) FIELD_GET(GENMASK_ULL(31, 0), magic)
+/* Get 32 bit arg2 from 64 bit magic */
+#define REBOOT_MODE_ARG2(magic) FIELD_GET(GENMASK_ULL(63, 32), magic)
+
struct reboot_mode_driver {
struct device *dev;
struct list_head head;
- int (*write)(struct reboot_mode_driver *reboot, unsigned int magic);
+ int (*write)(struct reboot_mode_driver *reboot, u64 magic);
struct notifier_block reboot_notifier;
};
--
2.34.1
^ permalink raw reply related
* [PATCH v22 00/13] Implement PSCI reboot mode driver for PSCI resets
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Sebastian Reichel, Bartosz Golaszewski, Song Xue
Userspace should be able to initiate device reboots using the various
PSCI SYSTEM_RESET and SYSTEM_RESET2 types defined by PSCI spec. This
patch series introduces psci-reboot-mode driver that will induce
command-based resets to psci driver for executing the device reset.
The PSCI system reset calls takes two arguments: reset_type and cookie.
It defines predefined reset types, such as warm and cold reset, and
vendor-specific reset types which are SoC vendor specific. To support
these requirements, the reboot-mode framework is enhanced in two key
ways:
1. 64-bit magic support: Extend reboot-mode to handle two 32-bit
arguments (reset_type and cookie) by encoding them into a single 64-bit
magic value.
2. Predefined modes: Add support for predefined reboot modes in the
framework.
With these enhancements, the patch series enables:
- Arch Warm reset and system reset cold as predefined reboot modes.
- Vendor-specific resets, configurable via the SoC-specific device tree.
Together, these changes allow userspace to trigger all above PSCI resets
from userspace.
Note on introducing PSCI-MFD:
In v19/20, psci-reboot-mode was implemented as a faux-device. Review
discussion suggested this may not be the best model for firmware-backed
consumers, and that representing PSCI users as regular platform devices
would be better. One suggestion was to add a PSCI-MFD driver, allowing
multiple consumers tied to a single PSCI node "arm,psci-1.0" be probed
as MFD cells.
Following this, the series adds a PSCI-MFD driver and introduces
cpuidle-psci-domain and psci-reboot-mode as child cells. To meet the
psci-reboot-mode requirement, the MFD core is extended to support
fwnode.
Reference discussions on this:
https://lore.kernel.org/all/20260306-faux-dev-with-fwnode-v1-1-792a86a62530@oss.qualcomm.com/
---
The patch is tested on rb3Gen2, lemans-ride, lemans-evk, monaco-ride,
qcs615-ride.
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
Changes in v22:
By Bart:
power: reset: reboot-mode: Add support for predefined reboot modes
- Add reboot-mode helper to add predefined modes.
- Add centralized init for reboot-mode.
- Dropping Reviewed-by from Bartosz as changes may need a review.
power: reset: Add psci-reboot-mode driver
- Use reboot-mode helpers to initialize reboot-mode driver and add
predefined modes.
mfd: core: Add firmware-node support to MFD cells
- Use callback function to get fwnode from a MFD child cell.
mfd: psci-mfd: Add psci-reboot-mode child cell
- Use callback function to return fwnode for reboot-mode.
By Pankaj:
mfd: psci-mfd: Add PSCI MFD driver for cpuidle-psci-domain cell
- Make MFD_PSCI defaults to y as ARM_PSCI_CPUIDLE_DOMAIN defaults to
y and depends on it.
- Link to v21: https://lore.kernel.org/r/20260427-arm-psci-system_reset2-vendor-reboots-v21-0-dcf937775e73@oss.qualcomm.com
Changes in v21:
By Krzysztof
power: reset: reboot-mode: Remove devres based allocations
- remove fixes tag.
By Lorenzo
firmware: psci: Introduce command-based resets
- psci_set_reset_cmd() only takes reset_type/cookie as input params.
- updated this as a encoded u64 reset_command - from Pavan Kondeti.
- Update commit text for reason for explicit panic_handling.
- Clean split of reset flow in psci_sys_reset via handle_reboot_mode and handle_cmd_reset.
- Add psci_has_system_reset2_support() helper and PSCI reset-type defines.
By Lorenzo/Bart
power: reset: Add psci-reboot-mode driver
By Bart
- Drop faux-device based probe.
- Convert driver to platform-driver model (probed via PSCI MFD).
By Lorenzo:
- Use PSCI-specific predefined reset mode naming/magic.
- Register arch-warm predefined mode only when SYSTEM_RESET2 is supported.
- psci_reboot_mode_write to directly pass reset_type and cokie.
- Add MAINTAINERS entry for drivers/power/reset/psci-reboot-mode.c.
By Bart
mfd: psci-mfd: Introduce psci mfd driver for cpuidle-psci-domain cell
- Introduce psci-mfd driver.
mfd: Add psci-reboot-mode cell via fwnode
- Register psci-reboot-mode from psci-mfd with reboot-mode child node
fwnode.
- Update reset Kconfig dependency to tie PSCI reboot-mode to MFD PSCI path.
For alignment:
- mfd: core: Add firmware-node support to MFD cells
- Add firmware-node support to MFD cells.
By Pavan
power: reset: reboot-mode: Add support for predefined reboot modes
- Move redundant logic of adding modes to list to a common function.
By Arnd
- Remove refrences for Linux reboot-modes from code and commit text.
By Konrad
- Updated all dt changes to add reboot-mode for supported board files.
- Link to v20: https://lore.kernel.org/r/20260304-arm-psci-system_reset2-vendor-reboots-v20-0-cf7d346b8372@oss.qualcomm.com
Changes in v20:
By Bart:
power: reset: Add psci-reboot-mode driver
- Check for psci compatible in init arm,psci-1.0
- Node pointer should not be assigned in device probe.
To Align on above:
- Remove probe call for faux device.
- Set node using device_set_node after faux_device_create.
- Register the reboot mode using explicit call to psci_reboot_mode_register_device.
- Updated in-code documentation.
For Alignment to use of device_property_xx:
power: reset: reboot-mode: Add support for 64 bit magic
- Use device_property_count_u32 instead of device_property_read_u32.
- Check count of properties before reading.
- u64 magic changed to u32 magic[2].
- nvmem-reboot rebased on recent changes.
- Update documentation and commit text.
power: reset: reboot-mode: Remove devres based allocations
By Dmitry/Bart:
- pr_err to pr_debug in case of invalid reboot-mode prop.
By Bart:
- Use device_property_read_u32 instead of of_property_read_u32.
- Avoid repeated code for free list. Now calling unregister from
error path of regiister_reboot_mode.
- Fix magic assignment.
- Link to v19: https://lore.kernel.org/r/20251228-arm-psci-system_reset2-vendor-reboots-v19-0-ebb956053098@oss.qualcomm.com
Changes in v19:
- Add missing To/Cc entries (include devicetree list) – Thanks to
Krzysztof for pointing this out.
- Fix compilation error in reboot-mode.c for ARCH=powerpc by explicitly
including <linux/slab.h>.
- Link to v18: https://lore.kernel.org/r/20251223-arm-psci-system_reset2-vendor-reboots-v18-0-32fa9e76efc3@oss.qualcomm.com
Changes in v18:
power: reset: reboot-mode: Remove devres based allocations
- Update commit text for alignment. – Bart
- Read magic before assigning kzalloc(info) in reboot_mode_register. - Mukesh
- Update error handling path. - Mukesh
By Bjorn
- Expose sysfs for reboot-mode bisected to different series-
Link: https://lore.kernel.org/all/20251222-next-15nov_expose_sysfs-v21-0-244614135fd8@oss.qualcomm.com/
By Bjorn/Lorenzo/Mukesh
power: reset: reboot-mode: Add support for 64 bit magic
- Use FIELD_GET/FIELD_PREP for u64 magic wherever required.
- Update commit text and add documentation for structure of 64 bit magic.
By Lorenzo
- Remove direct reboot-mode registration by psci driver.
- Add support for predefined reboot modes in reboot-mode framework.
- Add psci-reboot-mode driver and implement a psci-resets to accommodate
all psci-resets including warm, cold and customizable vendor-resets.
By Bjorn
- Update DT patches for qcm6490, lemans, monaco and tolos.
- Update commit text to include more details – By Bjorn
For Alignment
- dt-bindings: arm: Document reboot mode magic
- Update reboot mode documentation to clarify that argument1 should provide
full value of reset_type along with the 31st bit wherever required.
- DT patches for qcm6490, lemans, monaco and tolos.
- Provide full value of reset_type including 31st bit.(eg:0x80000001).
- Link to v17: https://lore.kernel.org/r/20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com
Previous versions:
- Link to v16: https://lore.kernel.org/r/20251015-arm-psci-system_reset2-vendor-reboots-v16-0-b98aedaa23ee@oss.qualcomm.com
- Link to v15: https://lore.kernel.org/r/20250922-arm-psci-system_reset2-vendor-reboots-v15-0-7ce3a08878f1@oss.qualcomm.com
- Link to v14: https://lore.kernel.org/r/20250815-arm-psci-system_reset2-vendor-reboots-v14-0-37d29f59ac9a@oss.qualcomm.com
- Link to v13: https://lore.kernel.org/r/20250727-arm-psci-system_reset2-vendor-reboots-v13-0-6b8d23315898@oss.qualcomm.com
- Link to v12: https://lore.kernel.org/r/20250721-arm-psci-system_reset2-vendor-reboots-v12-0-87bac3ec422e@oss.qualcomm.com
- Link to v11: https://lore.kernel.org/r/20250717-arm-psci-system_reset2-vendor-reboots-v11-0-df3e2b2183c3@oss.qualcomm.com
- Link to v10: https://lore.kernel.org/all/569f154d-c714-1714-b898-83a42a38771c@oss.qualcomm.com/
- Link to v9: https://lore.kernel.org/all/20250303-arm-psci-system_reset2-vendor-reboots-v9-0-b2cf4a20feda@oss.qualcomm.com/
- Link to v8: https://lore.kernel.org/r/20241107-arm-psci-system_reset2-vendor-reboots-v8-0-e8715fa65cb5@quicinc.com
- Link to v7: https://lore.kernel.org/r/20241028-arm-psci-system_reset2-vendor-reboots-v7-0-a4c40b0ebc54@quicinc.com
- Link to v6: https://lore.kernel.org/r/20241018-arm-psci-system_reset2-vendor-reboots-v6-0-50cbe88b0a24@quicinc.com
- Link to v5: https://lore.kernel.org/r/20240617-arm-psci-system_reset2-vendor-reboots-v5-0-086950f650c8@quicinc.com
- Link to v4: https://lore.kernel.org/r/20240611-arm-psci-system_reset2-vendor-reboots-v4-0-98f55aa74ae8@quicinc.com
- Link to v3: https://lore.kernel.org/r/20240515-arm-psci-system_reset2-vendor-reboots-v3-0-16dd4f9c0ab4@quicinc.com
- Link to v2: https://lore.kernel.org/r/20240414-arm-psci-system_reset2-vendor-reboots-v2-0-da9a055a648f@quicinc.com
- Link to v1: https://lore.kernel.org/r/20231117-arm-psci-system_reset2-vendor-reboots-v1-0-03c4612153e2@quicinc.com
- Link to RFC: https://lore.kernel.org/r/20231030-arm-psci-system_reset2-vendor-reboots-v1-0-dcdd63352ad1@quicinc.com
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Arnd Bergmann <arnd@arndb.de>
To: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Sebastian Reichel <sre@kernel.org>
To: Rob Herring <robh@kernel.org>
To: Sudeep Holla <sudeep.holla@arm.com>
To: Souvik Chakravarty <Souvik.Chakravarty@arm.com>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Andy Yan <andy.yan@rock-chips.com>
To: Matthias Brugger <matthias.bgg@gmail.com>
To: Mark Rutland <mark.rutland@arm.com>
To: Conor Dooley <conor+dt@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
To: John Stultz <john.stultz@linaro.org>
To: Moritz Fischer <moritz.fischer@ettus.com>
To: Rafael J. Wysocki <rafael@kernel.org>
To: Daniel Lezcano <daniel.lezcano@kernel.org>
To: Christian Loehle <christian.loehle@arm.com>
To: Ulf Hansson <ulf.hansson@linaro.org>
To: Lee Jones <lee@kernel.org>
To: Ulf Hansson <ulfh@kernel.org>
Cc: Florian Fainelli <florian.fainelli@broadcom.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Cc: Andre Draszik <andre.draszik@linaro.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
---
Shivendra Pratap (13):
power: reset: reboot-mode: Remove devres based allocations
power: reset: reboot-mode: Add support for 64 bit magic
power: reset: reboot-mode: Add support for predefined reboot modes
firmware: psci: Introduce command-based resets
mfd: psci-mfd: Add PSCI MFD driver for cpuidle-psci-domain cell
dt-bindings: arm: Document reboot mode magic
power: reset: Add psci-reboot-mode driver
mfd: core: Add firmware-node support to MFD cells
mfd: psci-mfd: Add psci-reboot-mode child cell
arm64: dts: qcom: Add psci reboot-modes for kodiak boards
arm64: dts: qcom: Add psci reboot-modes for lemans boards
arm64: dts: qcom: Add psci reboot-modes for monaco boards
arm64: dts: qcom: Add psci reboot-modes for talos boards
Documentation/devicetree/bindings/arm/psci.yaml | 42 +++++++
MAINTAINERS | 2 +
arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +-
arch/arm64/boot/dts/qcom/lemans-evk.dts | 7 ++
arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 7 ++
arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +-
arch/arm64/boot/dts/qcom/monaco-evk.dts | 7 ++
arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +-
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 ++
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 ++
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 ++
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 7 ++
arch/arm64/boot/dts/qcom/talos.dtsi | 2 +-
drivers/cpuidle/Kconfig.arm | 1 +
drivers/cpuidle/cpuidle-psci-domain.c | 9 +-
drivers/firmware/psci/psci.c | 75 ++++++++++-
drivers/mfd/Kconfig | 12 ++
drivers/mfd/Makefile | 2 +
drivers/mfd/mfd-core.c | 30 +++++
drivers/mfd/psci-mfd.c | 61 +++++++++
drivers/power/reset/Kconfig | 10 ++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/nvmem-reboot-mode.c | 12 +-
drivers/power/reset/psci-reboot-mode.c | 72 +++++++++++
drivers/power/reset/qcom-pon.c | 10 +-
drivers/power/reset/reboot-mode.c | 153 ++++++++++++++++++-----
drivers/power/reset/syscon-reboot-mode.c | 10 +-
include/linux/mfd/core.h | 14 +++
include/linux/psci.h | 19 +++
include/linux/reboot-mode.h | 28 ++++-
30 files changed, 559 insertions(+), 61 deletions(-)
---
base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83
change-id: 20250709-arm-psci-system_reset2-vendor-reboots-46c80044afcf
Best regards,
--
Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
^ permalink raw reply
* [PATCH v22 01/13] power: reset: reboot-mode: Remove devres based allocations
From: Shivendra Pratap @ 2026-05-14 14:25 UTC (permalink / raw)
To: Sebastian Reichel, Mark Rutland, Lorenzo Pieralisi,
Rafael J. Wysocki, Daniel Lezcano, Christian Loehle, Ulf Hansson,
Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Bjorn Andersson, Konrad Dybcio, Arnd Bergmann, Souvik Chakravarty,
Andy Yan, Matthias Brugger, John Stultz, Moritz Fischer,
Bartosz Golaszewski, Sudeep Holla, Ulf Hansson
Cc: linux-pm, linux-kernel, linux-arm-msm, linux-arm-kernel,
devicetree, Shivendra Pratap, Florian Fainelli,
Krzysztof Kozlowski, Dmitry Baryshkov, Mukesh Ojha, Andre Draszik,
Greg Kroah-Hartman, Kathiravan Thirumoorthy, Srinivas Kandagatla,
Sebastian Reichel, Bartosz Golaszewski
In-Reply-To: <20260514-arm-psci-system_reset2-vendor-reboots-v22-0-28a5bde07483@oss.qualcomm.com>
Devres APIs are intended for use in drivers, where the managed lifetime
of resources is tied directly to the driver attach/detach cycle. In
shared subsystem code, there is no guarantee that the subsystem
functions will only be called after a driver has been attached, nor that
they will not be referenced after the managed resources have been
released during driver detach.
To ensure correct lifetime handling, avoid using devres-based
allocations in the reboot-mode and explicitly handle allocation and
cleanup of resources.
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
---
drivers/power/reset/reboot-mode.c | 32 ++++++++++++++++++++------------
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot-mode.c
index d20e44db053256d87ad8034ddab233e49d36072d..7a74f72a8313b73c3e0930a426ebcf7ef6eed99b 100644
--- a/drivers/power/reset/reboot-mode.c
+++ b/drivers/power/reset/reboot-mode.c
@@ -3,6 +3,8 @@
* Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
*/
+#define pr_fmt(fmt) "reboot-mode: " fmt
+
#include <linux/device.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -10,6 +12,7 @@
#include <linux/list.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/property.h>
#include <linux/reboot.h>
#include <linux/reboot-mode.h>
#include <linux/slab.h>
@@ -168,10 +171,11 @@ static int reboot_mode_create_device(struct reboot_mode_driver *reboot)
*/
int reboot_mode_register(struct reboot_mode_driver *reboot)
{
- struct mode_info *info;
+ struct mode_info *info = NULL;
struct property *prop;
struct device_node *np = reboot->dev->of_node;
size_t len = strlen(PREFIX);
+ u32 magic;
int ret;
INIT_LIST_HEAD(&reboot->head);
@@ -180,19 +184,18 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
if (strncmp(prop->name, PREFIX, len))
continue;
- info = devm_kzalloc(reboot->dev, sizeof(*info), GFP_KERNEL);
+ if (device_property_read_u32(reboot->dev, prop->name, &magic)) {
+ pr_debug("reboot mode %s without magic number\n", prop->name);
+ continue;
+ }
+
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
ret = -ENOMEM;
goto error;
}
- if (of_property_read_u32(np, prop->name, &info->magic)) {
- dev_err(reboot->dev, "reboot mode %s without magic number\n",
- info->mode);
- devm_kfree(reboot->dev, info);
- continue;
- }
-
+ info->magic = magic;
info->mode = kstrdup_const(prop->name + len, GFP_KERNEL);
if (!info->mode) {
ret = -ENOMEM;
@@ -200,12 +203,12 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
} else if (info->mode[0] == '\0') {
kfree_const(info->mode);
ret = -EINVAL;
- dev_err(reboot->dev, "invalid mode name(%s): too short!\n",
- prop->name);
+ pr_err("invalid mode name(%s): too short!\n", prop->name);
goto error;
}
list_add_tail(&info->list, &reboot->head);
+ info = NULL;
}
reboot->reboot_notifier.notifier_call = reboot_mode_notify;
@@ -218,6 +221,7 @@ int reboot_mode_register(struct reboot_mode_driver *reboot)
return 0;
error:
+ kfree(info);
reboot_mode_unregister(reboot);
return ret;
}
@@ -261,12 +265,16 @@ static inline void reboot_mode_unregister_device(struct reboot_mode_driver *rebo
int reboot_mode_unregister(struct reboot_mode_driver *reboot)
{
struct mode_info *info;
+ struct mode_info *next;
unregister_reboot_notifier(&reboot->reboot_notifier);
reboot_mode_unregister_device(reboot);
- list_for_each_entry(info, &reboot->head, list)
+ list_for_each_entry_safe(info, next, &reboot->head, list) {
+ list_del(&info->list);
kfree_const(info->mode);
+ kfree(info);
+ }
return 0;
}
--
2.34.1
^ permalink raw reply related
* Re: [PATCH v5 1/3] firmware: smccc: coco: Manage arm-smccc platform device and CCA auxiliary drivers
From: Greg KH @ 2026-05-14 14:23 UTC (permalink / raw)
To: Catalin Marinas
Cc: Suzuki K Poulose, Aneesh Kumar K.V (Arm), linux-coco,
linux-arm-kernel, linux-kernel, Jeremy Linton, Jonathan Cameron,
Lorenzo Pieralisi, Mark Rutland, Sudeep Holla, Will Deacon,
Steven Price
In-Reply-To: <agXSI6PPf4uR7VBL@arm.com>
On Thu, May 14, 2026 at 02:46:11PM +0100, Catalin Marinas wrote:
> On Thu, May 14, 2026 at 03:25:34PM +0200, Greg Kroah-Hartman wrote:
> > On Thu, May 14, 2026 at 02:19:19PM +0100, Catalin Marinas wrote:
> > > On Thu, May 14, 2026 at 02:55:48PM +0200, Greg Kroah-Hartman wrote:
> > > > On Thu, May 14, 2026 at 12:04:13PM +0100, Suzuki K Poulose wrote:
> > > > > On 14/05/2026 10:40, Aneesh Kumar K.V (Arm) wrote:
> > > > > > Make the SMCCC driver responsible for registering the arm-smccc platform
> > > > > > device and after confirming the relevant SMCCC function IDs, create
> > > > > > the arm_cca_guest auxiliary device.
> > > > > >
> > > > >
> > > > > There are a few changes squashed in to this patch. Please could we
> > > > > split the patch in the following order ?
> > > > >
> > > > > 1. Add platform device for arm-smccc
> > > >
> > > > Do not make any more "fake" platform devices please.
> > > >
> > > > > 2. Move TRNG to Auxilliary Device - (Even though it is a later patch, move
> > > > > it before the RSI changes)
> > > >
> > > > No, move it to the faux api please.
> > >
> > > So should we end up with:
> > >
> > > /sys/devices/faux/arm-smccc/
> > > smccc_trng/
> > > arm-rsi-dev/
> >
> > What types are these child devices? Also faux ones?
>
> They'd also be faux devices with this structure (in practice they are
> firmware interfaces that may be backed by some hardware like in the TRNG
> case, though not directly accessible to Linux).
Great, seems sane to me!
^ permalink raw reply
* Re: [PATCH v2 8/8] PCI: rzg3s-host: Add 100 ms delay after link training
From: kernel test robot @ 2026-05-14 14:22 UTC (permalink / raw)
To: Hans Zhang, bhelgaas, lpieralisi, kwilczynski, mani, vigneshr,
jingoohan1, thomas.petazzoni, pali, ryder.lee, jianjun.wang,
claudiu.beznea.uj, mpillai
Cc: oe-kbuild-all, robh, s-vadapalli, linux-omap, linux-arm-kernel,
linux-mediatek, linux-renesas-soc, linux-pci, linux-kernel,
Hans Zhang
In-Reply-To: <20260506152346.166056-9-18255117159@163.com>
Hi Hans,
kernel test robot noticed the following build errors:
[auto build test ERROR on a293ec25d59dd96309058c70df5a4dd0f889a1e4]
url: https://github.com/intel-lab-lkp/linux/commits/Hans-Zhang/PCI-Add-pcie_wait_after_link_train-helper/20260514-132815
base: a293ec25d59dd96309058c70df5a4dd0f889a1e4
patch link: https://lore.kernel.org/r/20260506152346.166056-9-18255117159%40163.com
patch subject: [PATCH v2 8/8] PCI: rzg3s-host: Add 100 ms delay after link training
config: arm64-allnoconfig-bpf (https://download.01.org/0day-ci/archive/20260514/202605141646.YYkbS6Hg-lkp@intel.com/config)
compiler: aarch64-linux-gnu-gcc (Debian 14.2.0-19) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260514/202605141646.YYkbS6Hg-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202605141646.YYkbS6Hg-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/pci/controller/pci-thunder-pem.c:16:
drivers/pci/controller/../pci.h: In function 'pcie_wait_after_link_train':
>> drivers/pci/controller/../pci.h:73:17: error: implicit declaration of function 'msleep' [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^~~~~~
--
In file included from drivers/pci/controller/dwc/pcie-al.c:14:
drivers/pci/controller/dwc/../../pci.h: In function 'pcie_wait_after_link_train':
>> drivers/pci/controller/dwc/../../pci.h:73:17: error: implicit declaration of function 'msleep' [-Wimplicit-function-declaration]
73 | msleep(PCIE_RESET_CONFIG_WAIT_MS);
| ^~~~~~
vim +/msleep +73 drivers/pci/controller/../pci.h
62
63 /**
64 * pcie_wait_after_link_train - Wait 100 ms if link speed > 5 GT/s
65 * @max_link_speed: the maximum link speed (2 = 5.0 GT/s, 3 = 8.0 GT/s, ...)
66 *
67 * Must be called after Link training completes and before the first
68 * Configuration Request is sent.
69 */
70 static inline void pcie_wait_after_link_train(int max_link_speed)
71 {
72 if (max_link_speed > 2)
> 73 msleep(PCIE_RESET_CONFIG_WAIT_MS);
74 }
75
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply
* Re: [PATCH v3 3/4] arm64: cpufeature: Add support for the MPAM v0.1 architecture version
From: Catalin Marinas @ 2026-05-14 14:22 UTC (permalink / raw)
To: James Morse
Cc: linux-kernel, linux-arm-kernel, zengheng4, wangkefeng.wang,
xry111, yang, reinette.chatre, will, thuth, ben.horgan,
mrigendra.chaubey, fenghuay, ahmed.genidi
In-Reply-To: <20260508162341.3762549-4-james.morse@arm.com>
On Fri, May 08, 2026 at 05:23:40PM +0100, James Morse wrote:
> From: Zeng Heng <zengheng4@huawei.com>
>
> According to the MPAM spec [1], the supported architecture versions are
> v1.0, v1.1 and v0.1. MPAM versions v0.1 and v1.1 are functionally
> identical, but v0.1 additionally supports the FORCE_NS feature.
>
> ID_AA64PR | ID_AA64PR | MPAM Extension | Notes
> F0_EL1. | F1_EL1. | Architecture |
> MPAM | MPAM_frac | version |
> ---------------------------------------------------------------------------
> 0b0000 | 0b0001 | v0.1 | MPAM v0.1 is implemented.
> | | | MPAM v0.1 is the same as MPAM v1.1
> | | | with FORCE_NS which is
> | | | incompatible with MPAM v1.0.
> ---------------------------------------------------------------------------
> 0b0001 | 0b0000 | v1.0 | MPAM v1.0 is implemented.
> ---------------------------------------------------------------------------
> 0b0001 | 0b0001 | v1.1 | MPAM v1.1 is implemented.
> | | | MPAM v1.1 includes all features of
> | | | MPAM v1.0.
> | | | It must not include FORCE_NS.
>
> FORCE_NS is a feature that operates in EL3 mode. Consequently, the current
> Linux MPAM driver is also compatible with MPAM v0.1. To support v0.1, the
> existing driver which only checks ID_AA64PFR0_EL1.MPAM for the major
> version needs to examine ID_AA64PFR1_EL1.MPAM_frac for the minor version
> as well.
>
> [1] https://developer.arm.com/documentation/ddi0598/db/?lang=en
>
> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
> Reviewed-by: James Morse <james.morse@arm.com>
> Signed-off-by: James Morse <james.morse@arm.com>
Not sure how this will go in for 7.2, so:
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
^ permalink raw reply
* Re: [PATCH v4 04/13] dma: swiotlb: track pool encryption state and honor DMA_ATTR_CC_SHARED
From: Mostafa Saleh @ 2026-05-14 14:21 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: iommu, linux-arm-kernel, linux-kernel, linux-coco, Robin Murphy,
Marek Szyprowski, Will Deacon, Marc Zyngier, Steven Price,
Suzuki K Poulose, Catalin Marinas, Jiri Pirko, Jason Gunthorpe,
Petr Tesarik, Alexey Kardashevskiy, Dan Williams, Xu Yilun,
linuxppc-dev, linux-s390, Madhavan Srinivasan, Michael Ellerman,
Nicholas Piggin, Christophe Leroy (CS GROUP), Alexander Gordeev,
Gerald Schaefer, Heiko Carstens, Vasily Gorbik,
Christian Borntraeger, Sven Schnelle, x86
In-Reply-To: <yq5apl2y5f96.fsf@kernel.org>
On Thu, May 14, 2026 at 06:18:05PM +0530, Aneesh Kumar K.V wrote:
> Mostafa Saleh <smostafa@google.com> writes:
>
> > On Thu, May 14, 2026 at 11:24:42AM +0530, Aneesh Kumar K.V wrote:
> >> Mostafa Saleh <smostafa@google.com> writes:
> >>
> >> > On Tue, May 12, 2026 at 02:33:59PM +0530, Aneesh Kumar K.V (Arm) wrote:
> >> >> Teach swiotlb to distinguish between encrypted and decrypted bounce
> >> >> buffer pools, and make allocation and mapping paths select a pool whose
> >> >> state matches the requested DMA attributes.
> >> >>
> >> >> Add a decrypted flag to io_tlb_mem, initialize it for the default and
> >> >> restricted pools, and propagate DMA_ATTR_CC_SHARED into swiotlb pool
> >> >> allocation. Reject swiotlb alloc/map requests when the selected pool does
> >> >> not match the required encrypted/decrypted state.
> >> >>
> >> >> Also return DMA addresses with the matching phys_to_dma_{encrypted,
> >> >> unencrypted} helper so the DMA address encoding stays consistent with the
> >> >> chosen pool.
> >> >>
> >> >> Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar@kernel.org>
> >> >> ---
> >> >> include/linux/dma-direct.h | 10 ++++
> >> >> include/linux/swiotlb.h | 8 ++-
> >> >> kernel/dma/direct.c | 14 +++--
> >> >> kernel/dma/swiotlb.c | 108 +++++++++++++++++++++++++++----------
> >> >> 4 files changed, 107 insertions(+), 33 deletions(-)
> >> >>
> >> >> diff --git a/include/linux/dma-direct.h b/include/linux/dma-direct.h
> >> >> index c249912456f9..94fad4e7c11e 100644
> >> >> --- a/include/linux/dma-direct.h
> >> >> +++ b/include/linux/dma-direct.h
> >> >> @@ -77,6 +77,10 @@ static inline dma_addr_t dma_range_map_max(const struct bus_dma_region *map)
> >> >> #ifndef phys_to_dma_unencrypted
> >> >> #define phys_to_dma_unencrypted phys_to_dma
> >> >> #endif
> >> >> +
> >> >> +#ifndef phys_to_dma_encrypted
> >> >> +#define phys_to_dma_encrypted phys_to_dma
> >> >> +#endif
> >> >> #else
> >> >> static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
> >> >> {
> >> >> @@ -90,6 +94,12 @@ static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev,
> >> >> {
> >> >> return dma_addr_unencrypted(__phys_to_dma(dev, paddr));
> >> >> }
> >> >> +
> >> >> +static inline dma_addr_t phys_to_dma_encrypted(struct device *dev,
> >> >> + phys_addr_t paddr)
> >> >> +{
> >> >> + return dma_addr_encrypted(__phys_to_dma(dev, paddr));
> >> >> +}
> >> >> /*
> >> >> * If memory encryption is supported, phys_to_dma will set the memory encryption
> >> >> * bit in the DMA address, and dma_to_phys will clear it.
> >> >> diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
> >> >> index 3dae0f592063..b3fa3c6e0169 100644
> >> >> --- a/include/linux/swiotlb.h
> >> >> +++ b/include/linux/swiotlb.h
> >> >> @@ -81,6 +81,7 @@ struct io_tlb_pool {
> >> >> struct list_head node;
> >> >> struct rcu_head rcu;
> >> >> bool transient;
> >> >> + bool unencrypted;
> >> >> #endif
> >> >> };
> >> >>
> >> >> @@ -111,6 +112,7 @@ struct io_tlb_mem {
> >> >> struct dentry *debugfs;
> >> >> bool force_bounce;
> >> >> bool for_alloc;
> >> >> + bool unencrypted;
> >> >> #ifdef CONFIG_SWIOTLB_DYNAMIC
> >> >> bool can_grow;
> >> >> u64 phys_limit;
> >> >> @@ -282,7 +284,8 @@ static inline void swiotlb_sync_single_for_cpu(struct device *dev,
> >> >> extern void swiotlb_print_info(void);
> >> >>
> >> >> #ifdef CONFIG_DMA_RESTRICTED_POOL
> >> >> -struct page *swiotlb_alloc(struct device *dev, size_t size);
> >> >> +struct page *swiotlb_alloc(struct device *dev, size_t size,
> >> >> + unsigned long attrs);
> >> >> bool swiotlb_free(struct device *dev, struct page *page, size_t size);
> >> >>
> >> >> static inline bool is_swiotlb_for_alloc(struct device *dev)
> >> >> @@ -290,7 +293,8 @@ static inline bool is_swiotlb_for_alloc(struct device *dev)
> >> >> return dev->dma_io_tlb_mem->for_alloc;
> >> >> }
> >> >> #else
> >> >> -static inline struct page *swiotlb_alloc(struct device *dev, size_t size)
> >> >> +static inline struct page *swiotlb_alloc(struct device *dev, size_t size,
> >> >> + unsigned long attrs)
> >> >> {
> >> >> return NULL;
> >> >> }
> >> >> diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
> >> >> index dc2907439b3d..97ae4fa10521 100644
> >> >> --- a/kernel/dma/direct.c
> >> >> +++ b/kernel/dma/direct.c
> >> >> @@ -104,9 +104,10 @@ static void __dma_direct_free_pages(struct device *dev, struct page *page,
> >> >> dma_free_contiguous(dev, page, size);
> >> >> }
> >> >>
> >> >> -static struct page *dma_direct_alloc_swiotlb(struct device *dev, size_t size)
> >> >> +static struct page *dma_direct_alloc_swiotlb(struct device *dev, size_t size,
> >> >> + unsigned long attrs)
> >> >> {
> >> >> - struct page *page = swiotlb_alloc(dev, size);
> >> >> + struct page *page = swiotlb_alloc(dev, size, attrs);
> >> >>
> >> >> if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
> >> >> swiotlb_free(dev, page, size);
> >> >> @@ -266,8 +267,12 @@ void *dma_direct_alloc(struct device *dev, size_t size,
> >> >> gfp, attrs);
> >> >>
> >> >> if (is_swiotlb_for_alloc(dev)) {
> >> >> - page = dma_direct_alloc_swiotlb(dev, size);
> >> >> + page = dma_direct_alloc_swiotlb(dev, size, attrs);
> >> >> if (page) {
> >> >> + /*
> >> >> + * swiotlb allocations comes from pool already marked
> >> >> + * decrypted
> >> >> + */
> >> >> mark_mem_decrypt = false;
> >> >> goto setup_page;
> >> >> }
> >> >> @@ -374,6 +379,7 @@ void dma_direct_free(struct device *dev, size_t size,
> >> >> return;
> >> >>
> >> >> if (swiotlb_find_pool(dev, dma_to_phys(dev, dma_addr)))
> >> >> + /* Swiotlb doesn't need a page attribute update on free */
> >> >> mark_mem_encrypted = false;
> >> >>
> >> >> if (is_vmalloc_addr(cpu_addr)) {
> >> >> @@ -403,7 +409,7 @@ struct page *dma_direct_alloc_pages(struct device *dev, size_t size,
> >> >> gfp, attrs);
> >> >>
> >> >> if (is_swiotlb_for_alloc(dev)) {
> >> >> - page = dma_direct_alloc_swiotlb(dev, size);
> >> >> + page = dma_direct_alloc_swiotlb(dev, size, attrs);
> >> >> if (!page)
> >> >> return NULL;
> >> >>
> >> >> diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
> >> >> index ab4eccbaa076..065663be282c 100644
> >> >> --- a/kernel/dma/swiotlb.c
> >> >> +++ b/kernel/dma/swiotlb.c
> >> >> @@ -259,10 +259,21 @@ void __init swiotlb_update_mem_attributes(void)
> >> >> struct io_tlb_pool *mem = &io_tlb_default_mem.defpool;
> >> >> unsigned long bytes;
> >> >>
> >> >> + /*
> >> >> + * if platform support memory encryption, swiotlb buffers are
> >> >> + * decrypted by default.
> >> >> + */
> >> >> + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
> >> >> + io_tlb_default_mem.unencrypted = true;
> >> >> + else
> >> >> + io_tlb_default_mem.unencrypted = false;
> >> >> +
> >> >> if (!mem->nslabs || mem->late_alloc)
> >> >> return;
> >> >> bytes = PAGE_ALIGN(mem->nslabs << IO_TLB_SHIFT);
> >> >> - set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
> >> >> +
> >> >> + if (io_tlb_default_mem.unencrypted)
> >> >> + set_memory_decrypted((unsigned long)mem->vaddr, bytes >> PAGE_SHIFT);
> >> >> }
> >> >>
> >> >> static void swiotlb_init_io_tlb_pool(struct io_tlb_pool *mem, phys_addr_t start,
> >> >> @@ -505,8 +516,10 @@ int swiotlb_init_late(size_t size, gfp_t gfp_mask,
> >> >> if (!mem->slots)
> >> >> goto error_slots;
> >> >>
> >> >> - set_memory_decrypted((unsigned long)vstart,
> >> >> - (nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
> >> >> + if (io_tlb_default_mem.unencrypted)
> >> >> + set_memory_decrypted((unsigned long)vstart,
> >> >> + (nslabs << IO_TLB_SHIFT) >> PAGE_SHIFT);
> >> >> +
> >> >> swiotlb_init_io_tlb_pool(mem, virt_to_phys(vstart), nslabs, true,
> >> >> nareas);
> >> >> add_mem_pool(&io_tlb_default_mem, mem);
> >> >> @@ -539,7 +552,9 @@ void __init swiotlb_exit(void)
> >> >> tbl_size = PAGE_ALIGN(mem->end - mem->start);
> >> >> slots_size = PAGE_ALIGN(array_size(sizeof(*mem->slots), mem->nslabs));
> >> >>
> >> >> - set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
> >> >> + if (io_tlb_default_mem.unencrypted)
> >> >> + set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT);
> >> >> +
> >> >> if (mem->late_alloc) {
> >> >> area_order = get_order(array_size(sizeof(*mem->areas),
> >> >> mem->nareas));
> >> >> @@ -563,6 +578,7 @@ void __init swiotlb_exit(void)
> >> >> * @gfp: GFP flags for the allocation.
> >> >> * @bytes: Size of the buffer.
> >> >> * @phys_limit: Maximum allowed physical address of the buffer.
> >> >> + * @unencrypted: true to allocate unencrypted memory, false for encrypted memory
> >> >> *
> >> >> * Allocate pages from the buddy allocator. If successful, make the allocated
> >> >> * pages decrypted that they can be used for DMA.
> >> >> @@ -570,7 +586,8 @@ void __init swiotlb_exit(void)
> >> >> * Return: Decrypted pages, %NULL on allocation failure, or ERR_PTR(-EAGAIN)
> >> >> * if the allocated physical address was above @phys_limit.
> >> >> */
> >> >> -static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
> >> >> +static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes,
> >> >> + u64 phys_limit, bool unencrypted)
> >> >> {
> >> >> unsigned int order = get_order(bytes);
> >> >> struct page *page;
> >> >> @@ -588,13 +605,13 @@ static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
> >> >> }
> >> >>
> >> >> vaddr = phys_to_virt(paddr);
> >> >> - if (set_memory_decrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> + if (unencrypted && set_memory_decrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> goto error;
> >> >> return page;
> >> >>
> >> >> error:
> >> >> /* Intentional leak if pages cannot be encrypted again. */
> >> >> - if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> + if (unencrypted && !set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> __free_pages(page, order);
> >> >> return NULL;
> >> >> }
> >> >> @@ -604,30 +621,26 @@ static struct page *alloc_dma_pages(gfp_t gfp, size_t bytes, u64 phys_limit)
> >> >> * @dev: Device for which a memory pool is allocated.
> >> >> * @bytes: Size of the buffer.
> >> >> * @phys_limit: Maximum allowed physical address of the buffer.
> >> >> + * @attrs: DMA attributes for the allocation.
> >> >> * @gfp: GFP flags for the allocation.
> >> >> *
> >> >> * Return: Allocated pages, or %NULL on allocation failure.
> >> >> */
> >> >> static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
> >> >> - u64 phys_limit, gfp_t gfp)
> >> >> + u64 phys_limit, unsigned long attrs, gfp_t gfp)
> >> >> {
> >> >> struct page *page;
> >> >> - unsigned long attrs = 0;
> >> >>
> >> >> /*
> >> >> * Allocate from the atomic pools if memory is encrypted and
> >> >> * the allocation is atomic, because decrypting may block.
> >> >> */
> >> >> - if (!gfpflags_allow_blocking(gfp) && dev && force_dma_unencrypted(dev)) {
> >> >> + if (!gfpflags_allow_blocking(gfp) && (attrs & DMA_ATTR_CC_SHARED)) {
> >> >> void *vaddr;
> >> >>
> >> >> if (!IS_ENABLED(CONFIG_DMA_COHERENT_POOL))
> >> >> return NULL;
> >> >>
> >> >> - /* swiotlb considered decrypted by default */
> >> >> - if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
> >> >> - attrs = DMA_ATTR_CC_SHARED;
> >> >> -
> >> >> return dma_alloc_from_pool(dev, bytes, &vaddr, gfp,
> >> >> attrs, dma_coherent_ok);
> >> >> }
> >> >> @@ -638,7 +651,8 @@ static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
> >> >> else if (phys_limit <= DMA_BIT_MASK(32))
> >> >> gfp |= __GFP_DMA32;
> >> >>
> >> >> - while (IS_ERR(page = alloc_dma_pages(gfp, bytes, phys_limit))) {
> >> >> + while (IS_ERR(page = alloc_dma_pages(gfp, bytes, phys_limit,
> >> >> + !!(attrs & DMA_ATTR_CC_SHARED)))) {
> >> >> if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
> >> >> phys_limit < DMA_BIT_MASK(64) &&
> >> >> !(gfp & (__GFP_DMA32 | __GFP_DMA)))
> >> >> @@ -657,15 +671,18 @@ static struct page *swiotlb_alloc_tlb(struct device *dev, size_t bytes,
> >> >> * swiotlb_free_tlb() - free a dynamically allocated IO TLB buffer
> >> >> * @vaddr: Virtual address of the buffer.
> >> >> * @bytes: Size of the buffer.
> >> >> + * @unencrypted: true if @vaddr was allocated decrypted and must be
> >> >> + * re-encrypted before being freed
> >> >> */
> >> >> -static void swiotlb_free_tlb(void *vaddr, size_t bytes)
> >> >> +static void swiotlb_free_tlb(void *vaddr, size_t bytes, bool unencrypted)
> >> >> {
> >> >> if (IS_ENABLED(CONFIG_DMA_COHERENT_POOL) &&
> >> >> dma_free_from_pool(NULL, vaddr, bytes))
> >> >> return;
> >> >>
> >> >> /* Intentional leak if pages cannot be encrypted again. */
> >> >> - if (!set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> + if (!unencrypted ||
> >> >> + !set_memory_encrypted((unsigned long)vaddr, PFN_UP(bytes)))
> >> >> __free_pages(virt_to_page(vaddr), get_order(bytes));
> >> >> }
> >> >>
> >> >> @@ -676,6 +693,7 @@ static void swiotlb_free_tlb(void *vaddr, size_t bytes)
> >> >> * @nslabs: Desired (maximum) number of slabs.
> >> >> * @nareas: Number of areas.
> >> >> * @phys_limit: Maximum DMA buffer physical address.
> >> >> + * @attrs: DMA attributes for the allocation.
> >> >> * @gfp: GFP flags for the allocations.
> >> >> *
> >> >> * Allocate and initialize a new IO TLB memory pool. The actual number of
> >> >> @@ -686,7 +704,8 @@ static void swiotlb_free_tlb(void *vaddr, size_t bytes)
> >> >> */
> >> >> static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
> >> >> unsigned long minslabs, unsigned long nslabs,
> >> >> - unsigned int nareas, u64 phys_limit, gfp_t gfp)
> >> >> + unsigned int nareas, u64 phys_limit, unsigned long attrs,
> >> >> + gfp_t gfp)
> >> >> {
> >> >> struct io_tlb_pool *pool;
> >> >> unsigned int slot_order;
> >> >> @@ -704,9 +723,10 @@ static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
> >> >> if (!pool)
> >> >> goto error;
> >> >> pool->areas = (void *)pool + sizeof(*pool);
> >> >> + pool->unencrypted = !!(attrs & DMA_ATTR_CC_SHARED);
> >> >>
> >> >> tlb_size = nslabs << IO_TLB_SHIFT;
> >> >> - while (!(tlb = swiotlb_alloc_tlb(dev, tlb_size, phys_limit, gfp))) {
> >> >> + while (!(tlb = swiotlb_alloc_tlb(dev, tlb_size, phys_limit, attrs, gfp))) {
> >> >> if (nslabs <= minslabs)
> >> >> goto error_tlb;
> >> >> nslabs = ALIGN(nslabs >> 1, IO_TLB_SEGSIZE);
> >> >> @@ -724,7 +744,8 @@ static struct io_tlb_pool *swiotlb_alloc_pool(struct device *dev,
> >> >> return pool;
> >> >>
> >> >> error_slots:
> >> >> - swiotlb_free_tlb(page_address(tlb), tlb_size);
> >> >> + swiotlb_free_tlb(page_address(tlb), tlb_size,
> >> >> + !!(attrs & DMA_ATTR_CC_SHARED));
> >> >> error_tlb:
> >> >> kfree(pool);
> >> >> error:
> >> >> @@ -742,7 +763,9 @@ static void swiotlb_dyn_alloc(struct work_struct *work)
> >> >> struct io_tlb_pool *pool;
> >> >>
> >> >> pool = swiotlb_alloc_pool(NULL, IO_TLB_MIN_SLABS, default_nslabs,
> >> >> - default_nareas, mem->phys_limit, GFP_KERNEL);
> >> >> + default_nareas, mem->phys_limit,
> >> >> + mem->unencrypted ? DMA_ATTR_CC_SHARED : 0,
> >> >> + GFP_KERNEL);
> >> >> if (!pool) {
> >> >> pr_warn_ratelimited("Failed to allocate new pool");
> >> >> return;
> >> >> @@ -762,7 +785,7 @@ static void swiotlb_dyn_free(struct rcu_head *rcu)
> >> >> size_t tlb_size = pool->end - pool->start;
> >> >>
> >> >> free_pages((unsigned long)pool->slots, get_order(slots_size));
> >> >> - swiotlb_free_tlb(pool->vaddr, tlb_size);
> >> >> + swiotlb_free_tlb(pool->vaddr, tlb_size, pool->unencrypted);
> >> >> kfree(pool);
> >> >> }
> >> >>
> >> >> @@ -1232,6 +1255,7 @@ static int swiotlb_find_slots(struct device *dev, phys_addr_t orig_addr,
> >> >> nslabs = nr_slots(alloc_size);
> >> >> phys_limit = min_not_zero(*dev->dma_mask, dev->bus_dma_limit);
> >> >> pool = swiotlb_alloc_pool(dev, nslabs, nslabs, 1, phys_limit,
> >> >> + mem->unencrypted ? DMA_ATTR_CC_SHARED : 0,
> >> >> GFP_NOWAIT);
> >> >> if (!pool)
> >> >> return -1;
> >> >> @@ -1394,6 +1418,7 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
> >> >> enum dma_data_direction dir, unsigned long attrs)
> >> >> {
> >> >> struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
> >> >> + bool require_decrypted = false;
> >> >> unsigned int offset;
> >> >> struct io_tlb_pool *pool;
> >> >> unsigned int i;
> >> >> @@ -1411,6 +1436,16 @@ phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
> >> >> if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
> >> >> pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
> >> >>
> >> >> + /*
> >> >> + * if we are trying to swiotlb map a decrypted paddr or the paddr is encrypted
> >> >> + * but the device is forcing decryption, use decrypted io_tlb_mem
> >> >> + */
> >> >> + if ((attrs & DMA_ATTR_CC_SHARED) || force_dma_unencrypted(dev))
> >> >> + require_decrypted = true;
> >> >> +
> >> >> + if (require_decrypted != mem->unencrypted)
> >> >> + return (phys_addr_t)DMA_MAPPING_ERROR;
> >> >> +
> >> >> /*
> >> >> * The default swiotlb memory pool is allocated with PAGE_SIZE
> >> >> * alignment. If a mapping is requested with larger alignment,
> >> >> @@ -1608,8 +1643,14 @@ dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
> >> >> if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
> >> >> return DMA_MAPPING_ERROR;
> >> >>
> >> >> - /* Ensure that the address returned is DMA'ble */
> >> >> - dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
> >> >> + /*
> >> >> + * Use the allocated io_tlb_mem encryption type to determine dma addr.
> >> >> + */
> >> >> + if (dev->dma_io_tlb_mem->unencrypted)
> >> >> + dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
> >> >> + else
> >> >> + dma_addr = phys_to_dma_encrypted(dev, swiotlb_addr);
> >> >> +
> >> >> if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
> >> >> __swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir,
> >> >> attrs | DMA_ATTR_SKIP_CPU_SYNC,
> >> >> @@ -1773,7 +1814,8 @@ static inline void swiotlb_create_debugfs_files(struct io_tlb_mem *mem,
> >> >>
> >> >> #ifdef CONFIG_DMA_RESTRICTED_POOL
> >> >>
> >> >> -struct page *swiotlb_alloc(struct device *dev, size_t size)
> >> >> +struct page *swiotlb_alloc(struct device *dev, size_t size,
> >> >> + unsigned long attrs)
> >> >> {
> >> >> struct io_tlb_mem *mem = dev->dma_io_tlb_mem;
> >> >> struct io_tlb_pool *pool;
> >> >> @@ -1784,6 +1826,9 @@ struct page *swiotlb_alloc(struct device *dev, size_t size)
> >> >> if (!mem)
> >> >> return NULL;
> >> >>
> >> >> + if (mem->unencrypted != !!(attrs & DMA_ATTR_CC_SHARED))
> >> >> + return NULL;
> >> >> +
> >> >> align = (1 << (get_order(size) + PAGE_SHIFT)) - 1;
> >> >> index = swiotlb_find_slots(dev, 0, size, align, &pool);
> >> >> if (index == -1)
> >> >> @@ -1853,9 +1898,18 @@ static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
> >> >> kfree(mem);
> >> >> return -ENOMEM;
> >> >> }
> >> >> + /*
> >> >> + * if platform supports memory encryption,
> >> >> + * restricted mem pool is decrypted by default
> >> >> + */
> >> >> + if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
> >> >> + mem->unencrypted = true;
> >> >> + set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
> >> >> + rmem->size >> PAGE_SHIFT);
> >> >> + } else {
> >> >> + mem->unencrypted = false;
> >> >> + }
> >> >
> >> > This breaks pKVM as it doesn’t set CC_ATTR_MEM_ENCRYPT, so all virtio
> >> > traffic now fails.
> >> >
> >> > Also, by design, some drivers are clueless about bouncing, so
> >> > I believe that the pool should have a way to control it’s property
> >> > (encrypted or decrypted) and that takes priority over whatever
> >> > attributes comes from allocation.
> >> > And that brings us to the same point whether it’s better to return
> >> > the memory along with it’s state or we pass the requested state.
> >> > I think for other cases it’s fine for the device/DMA-API to dictate
> >> > the attrs, but not in restricted-dma case, the firmware just knows better.
> >> >
> >>
> >> Is it that the pKVM guest kernel does not have awareness of
> >> encrypted/decrypted DMA allocations? Instead, the firmware attaches
> >> hypervisor-shared pages to the device via restricted-dma-pool? The
> >> kernel then has swiotlb->for_alloc = true, and hence all DMA allocations
> >> go through the restricted-dma-pool?
> >
> > Yes.
> >
> >>
> >> Given that pKVM supports pkvm_set_memory_encrypted() and
> >> pkvm_set_memory_decrypted(), can we consider adding CC_ATTR_MEM_ENCRYPT
> >> support to pKVM? It would also be good to investigate whether we can set
> >> force_dma_unencrypted(dev) to true where needed.
> >
> > I was looking in to that, but it didn't work because
> > force_dma_unencrypted() is broken with restricted-dma due to the
> > double decryption issue, that's when I sent my first series [1]
> >
> > May be we should land some basic fixes for that path so we can
> > convert pKVM, then we do the full rework.
> >
> > I will revive my old work and see if I can send a RFC.
> >
> > [1] https://lore.kernel.org/all/20260305170335.963568-1-smostafa@google.com/
> >
>
> With this series, can you check whether the only change needed is
> something like the following?
>
> modified kernel/dma/swiotlb.c
> @@ -1905,7 +1905,8 @@ static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
> * if platform supports memory encryption,
> * restricted mem pool is decrypted by default
> */
> - if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
> + //if (cc_platform_has(CC_ATTR_MEM_ENCRYPT)) {
> + if (true) {
> mem->unencrypted = true;
> set_memory_decrypted((unsigned long)phys_to_virt(rmem->base),
> rmem->size >> PAGE_SHIFT);
Yes, that boots, but I will need to do more tests.
>
> >
> >>
> >> I agree that this patch, as it stands, can break pKVM because we are now
> >> missing the set_memory_decrypted() call required for pKVM to work.
> >>
> >> We now mark the swiotlb io_tlb_mem as unencrypted/encrypted in the guest
> >> using struct io_tlb_mem->unencrypted. I am not clear what we can use for
> >> pKVM to conditionalize this so that it works for both protected and
> >> unprotected guests.
> >
> > There is no problem with non-protected guests as they don't use memory
> > encryption, my initial thought was that th encrpyted/decrypted is
> > per-pool property which is decided by FW (device-tree).
> >
>
> What I meant was that we need a generic way to identify a pKVM guest, so
> that we can use it in the conditional above.
I have this patch, with that I can boot with your series unmodified,
but I will need to do more testing.
From d795b4c4ee2437587616b2b342e9996afe6d6680 Mon Sep 17 00:00:00 2001
From: Mostafa Saleh <smostafa@google.com>
Date: Thu, 14 May 2026 13:46:15 +0000
Subject: [PATCH] arm64/coco: Add pKVM as a CC platform
pKVM does support memory encryption, expose that to the rest of
the kernel through cc_platform_has()
At the moment, all devices inside the guest are emulated which
requires its memory to be shared back to the host (decrypted), so
set force_dma_unencrypted() to always return true.
Signed-off-by: Mostafa Saleh <smostafa@google.com>
---
arch/arm64/include/asm/hypervisor.h | 6 ++++++
arch/arm64/include/asm/mem_encrypt.h | 3 ++-
arch/arm64/kernel/rsi.c | 12 ------------
arch/arm64/mm/init.c | 13 +++++++++++++
drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c | 5 +++++
5 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/include/asm/hypervisor.h b/arch/arm64/include/asm/hypervisor.h
index a12fd897c877..1b0e15f290be 100644
--- a/arch/arm64/include/asm/hypervisor.h
+++ b/arch/arm64/include/asm/hypervisor.h
@@ -10,8 +10,14 @@ void kvm_arm_target_impl_cpu_init(void);
#ifdef CONFIG_ARM_PKVM_GUEST
void pkvm_init_hyp_services(void);
+bool is_protected_kvm_guest(void);
#else
static inline void pkvm_init_hyp_services(void) { };
+
+static inline bool is_protected_kvm_guest(void)
+{
+ return false;
+}
#endif
static inline void kvm_arch_init_hyp_services(void)
diff --git a/arch/arm64/include/asm/mem_encrypt.h b/arch/arm64/include/asm/mem_encrypt.h
index 314b2b52025f..636f45b4d8af 100644
--- a/arch/arm64/include/asm/mem_encrypt.h
+++ b/arch/arm64/include/asm/mem_encrypt.h
@@ -2,6 +2,7 @@
#ifndef __ASM_MEM_ENCRYPT_H
#define __ASM_MEM_ENCRYPT_H
+#include <asm/hypervisor.h>
#include <asm/rsi.h>
struct device;
@@ -20,7 +21,7 @@ int realm_register_memory_enc_ops(void);
static inline bool force_dma_unencrypted(struct device *dev)
{
- return is_realm_world();
+ return is_realm_world() || is_protected_kvm_guest();
}
/*
diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c
index 92160f2e57ff..25ca75ce1a4d 100644
--- a/arch/arm64/kernel/rsi.c
+++ b/arch/arm64/kernel/rsi.c
@@ -7,7 +7,6 @@
#include <linux/memblock.h>
#include <linux/psci.h>
#include <linux/swiotlb.h>
-#include <linux/cc_platform.h>
#include <linux/platform_device.h>
#include <asm/io.h>
@@ -23,17 +22,6 @@ EXPORT_SYMBOL(prot_ns_shared);
DEFINE_STATIC_KEY_FALSE_RO(rsi_present);
EXPORT_SYMBOL(rsi_present);
-bool cc_platform_has(enum cc_attr attr)
-{
- switch (attr) {
- case CC_ATTR_MEM_ENCRYPT:
- return is_realm_world();
- default:
- return false;
- }
-}
-EXPORT_SYMBOL_GPL(cc_platform_has);
-
static bool rsi_version_matches(void)
{
unsigned long ver_lower, ver_higher;
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index acf67c7064db..a087ac5b15f7 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -12,6 +12,7 @@
#include <linux/swap.h>
#include <linux/init.h>
#include <linux/cache.h>
+#include <linux/cc_platform.h>
#include <linux/mman.h>
#include <linux/nodemask.h>
#include <linux/initrd.h>
@@ -36,6 +37,7 @@
#include <asm/boot.h>
#include <asm/fixmap.h>
+#include <asm/hypervisor.h>
#include <asm/kasan.h>
#include <asm/kernel-pgtable.h>
#include <asm/kvm_host.h>
@@ -414,6 +416,17 @@ void dump_mem_limit(void)
}
}
+bool cc_platform_has(enum cc_attr attr)
+{
+ switch (attr) {
+ case CC_ATTR_MEM_ENCRYPT:
+ return is_realm_world() || is_protected_kvm_guest();
+ default:
+ return false;
+ }
+}
+EXPORT_SYMBOL_GPL(cc_platform_has);
+
#ifdef CONFIG_EXECMEM
static u64 module_direct_base __ro_after_init = 0;
static u64 module_plt_base __ro_after_init = 0;
diff --git a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
index 4230b817a80b..297e6d6019b8 100644
--- a/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
+++ b/drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
@@ -95,6 +95,11 @@ static int mmio_guard_ioremap_hook(phys_addr_t phys, size_t size,
return 0;
}
+bool is_protected_kvm_guest(void)
+{
+ return !!pkvm_granule;
+}
+
void pkvm_init_hyp_services(void)
{
int i;
--
2.54.0.563.g4f69b47b94-goog
Thanks,
Mostafa
>
> -aneesh
^ permalink raw reply related
* Re: (subset) [PATCH v8 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0
From: Lee Jones @ 2026-05-14 14:13 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery, Linus Walleij, Bartosz Golaszewski,
Ryan Chen, Billy Tsai
Cc: Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel, openbmc, linux-gpio, linux-clk
In-Reply-To: <20260428-upstream_pinctrl-v8-2-eb8ef9ab0498@aspeedtech.com>
On Tue, 28 Apr 2026 17:49:46 +0800, Billy Tsai wrote:
> AST2700 consists of two interconnected SoC instances, each with its own
> System Control Unit (SCU). The SCU0 provides pin control, interrupt
> controllers, clocks, resets, and address-space mappings for the
> Secondary and Tertiary Service Processors (SSP and TSP).
>
> Describe the SSP/TSP address mappings using the standard
> memory-region and memory-region-names properties.
>
> [...]
Applied, thanks!
[2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0
commit: 821fe4172d2a220278d6d279b695b3e299c1614f
--
Lee Jones [李琼斯]
^ permalink raw reply
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