* [PATCH 01/11] dt-bindings: power: Convert Ux500 PM domains to schema
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Convert the legacy Ux500 power domain text binding to YAML.
Move it under bindings/power.
Reference the generic power-domain schema.
Update MAINTAINERS for the new path.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
.../devicetree/bindings/arm/ux500/power_domain.txt | 35 ----------------
.../power/stericsson,ux500-pm-domains.yaml | 46 ++++++++++++++++++++++
MAINTAINERS | 1 +
3 files changed, 47 insertions(+), 35 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/ux500/power_domain.txt b/Documentation/devicetree/bindings/arm/ux500/power_domain.txt
deleted file mode 100644
index 5679d1742d3e..000000000000
--- a/Documentation/devicetree/bindings/arm/ux500/power_domain.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-* ST-Ericsson UX500 PM Domains
-
-UX500 supports multiple PM domains which are used to gate power to one or
-more peripherals on the SOC.
-
-The implementation of PM domains for UX500 are based upon the generic PM domain
-and use the corresponding DT bindings.
-
-==PM domain providers==
-
-Required properties:
- - compatible: Must be "stericsson,ux500-pm-domains".
- - #power-domain-cells : Number of cells in a power domain specifier, must be 1.
-
-Example:
- pm_domains: pm_domains0 {
- compatible = "stericsson,ux500-pm-domains";
- #power-domain-cells = <1>;
- };
-
-==PM domain consumers==
-
-Required properties:
- - power-domains: A phandle and PM domain specifier. Below are the list of
- valid specifiers:
-
- Index Specifier
- ----- ---------
- 0 DOMAIN_VAPE
-
-Example:
- sdi0_per1@80126000 {
- compatible = "arm,pl18x", "arm,primecell";
- power-domains = <&pm_domains DOMAIN_VAPE>
- };
diff --git a/Documentation/devicetree/bindings/power/stericsson,ux500-pm-domains.yaml b/Documentation/devicetree/bindings/power/stericsson,ux500-pm-domains.yaml
new file mode 100644
index 000000000000..72c39c083efb
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/stericsson,ux500-pm-domains.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/stericsson,ux500-pm-domains.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST-Ericsson UX500 power domains
+
+maintainers:
+ - Linus Walleij <linusw@kernel.org>
+ - Ulf Hansson <ulfh@kernel.org>
+
+description:
+ The UX500 power domain controller gates power to one or more peripherals on
+ the SoC. Domain specifiers use one cell containing one of the DOMAIN_*
+ indexes defined in dt-bindings/arm/ux500_pm_domains.h.
+
+allOf:
+ - $ref: power-domain.yaml#
+
+properties:
+ compatible:
+ const: stericsson,ux500-pm-domains
+
+ '#power-domain-cells':
+ const: 1
+
+required:
+ - compatible
+ - '#power-domain-cells'
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/arm/ux500_pm_domains.h>
+
+ pm_domains: power-controller {
+ compatible = "stericsson,ux500-pm-domains";
+ #power-domain-cells = <1>;
+ };
+
+ sdi0_per1@80126000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ power-domains = <&pm_domains DOMAIN_VAPE>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index c8d4b913f26c..a984c4647cc7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3167,6 +3167,7 @@ F: Documentation/devicetree/bindings/arm/ux500.yaml
F: Documentation/devicetree/bindings/arm/ux500/
F: Documentation/devicetree/bindings/gpio/st,nomadik-gpio.yaml
F: Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml
+F: Documentation/devicetree/bindings/power/stericsson,ux500-pm-domains.yaml
F: arch/arm/boot/dts/st/ste-*
F: arch/arm/mach-nomadik/
F: arch/arm/mach-ux500/
--
2.54.0
^ permalink raw reply related
* [PATCH 02/11] dt-bindings: Add the actual power domains on U8500
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij, Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
This file has been left in an unfinished state just defining
the root power domain for the U8500 SoC. Fix it up by adding
the actual existing power domains in this SoC.
The PRCMU code and old regulator driver is mentioning some
*_RET domains, this means "retention" and is a state in the
domain and not a domain of its own.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
include/dt-bindings/arm/ux500_pm_domains.h | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/arm/ux500_pm_domains.h b/include/dt-bindings/arm/ux500_pm_domains.h
index 9bd764f0c9e6..1c168e59ac90 100644
--- a/include/dt-bindings/arm/ux500_pm_domains.h
+++ b/include/dt-bindings/arm/ux500_pm_domains.h
@@ -8,8 +8,23 @@
#define _DT_BINDINGS_ARM_UX500_PM_DOMAINS_H
#define DOMAIN_VAPE 0
+#define DOMAIN_VARM 1
+#define DOMAIN_VMODEM 2
+#define DOMAIN_VPLL 3
+#define DOMAIN_VSMPS1 4
+#define DOMAIN_VSMPS2 5
+#define DOMAIN_VSMPS3 6
+#define DOMAIN_VRF1 7
+#define DOMAIN_SVA_MMDSP 8
+#define DOMAIN_SVA_PIPE 9
+#define DOMAIN_SIA_MMDSP 10
+#define DOMAIN_SIA_PIPE 11
+#define DOMAIN_SGA 12
+#define DOMAIN_B2R2_MCDE 13
+#define DOMAIN_ESRAM_12 14
+#define DOMAIN_ESRAM_34 15
/* Number of PM domains. */
-#define NR_DOMAINS (DOMAIN_VAPE + 1)
+#define NR_DOMAINS (DOMAIN_ESRAM_34 + 1)
#endif
--
2.54.0
^ permalink raw reply related
* [PATCH 03/11] pmdomain: st: ux500: Implement more power domains
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij, Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
This starts to implement the power domains that are just skeleton
implementations right now.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pmdomain/st/ste-ux500-pm-domain.c | 125 +++++++++++++++++++++++++++++-
1 file changed, 124 insertions(+), 1 deletion(-)
diff --git a/drivers/pmdomain/st/ste-ux500-pm-domain.c b/drivers/pmdomain/st/ste-ux500-pm-domain.c
index 6896cb4a7b71..723001004690 100644
--- a/drivers/pmdomain/st/ste-ux500-pm-domain.c
+++ b/drivers/pmdomain/st/ste-ux500-pm-domain.c
@@ -41,14 +41,137 @@ static int pd_power_on(struct generic_pm_domain *domain)
return 0;
}
+/*
+ * Apart from these voltage domains there is also VSAFE which is always
+ * on. Vape_esram0_pwr for eSRAM0 is connected to VSAFE.
+ */
static struct generic_pm_domain ux500_pm_domain_vape = {
- .name = "VAPE",
+ /* Vape_pwr */
+ .name = "VAPE", /* 0.95 .. 1.20 V */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_varm = {
+ .name = "VARM",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_vmodem = {
+ .name = "VMODEM",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_vpll = {
+ .name = "VPLL", /* 1.8 V */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+/*
+ * CHECKME: as these are used directly by peripherals as regulators,
+ * perhaps they should stay in the regulator subsystem?
+ */
+static struct generic_pm_domain ux500_pm_domain_vsmps1 = {
+ .name = "VSMPS1", /* Also called VIO (1.2V) */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_vsmps2 = {
+ .name = "VSMPS2", /* Also called VIO (1.8V) */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_vsmps3 = {
+ .name = "VSMPS3",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_vrf1 = {
+ .name = "VRF1",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+/* The following are technically children of VAPE */
+static struct generic_pm_domain ux500_pm_domain_sva_mmdsp = {
+ /* Vape_SVA_MMDSP_pwr */
+ .name = "SVA_MMDSP",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_sva_pipe = {
+ /* Vape_SVA_pwr */
+ .name = "SVA_PIPE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_sia_mmdsp = {
+ /* Vape_SIA_MMDSP_pwr */
+ .name = "SIA_MMDSP",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_sia_pipe = {
+ /* Vape_SIA_pwr */
+ .name = "SIA_PIPE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_sga = {
+ /* Vape_SGA_pwr */
+ .name = "SGA",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_b2r2_mcde = {
+ /* Vape_DSS_pwr DSS (display subsystem) */
+ .name = "B2R2_MCDE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_esram_12 = {
+ /* Vape_esram0_pwr, Vape_esram1_pwr */
+ .name = "ESRAM_12",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+};
+
+static struct generic_pm_domain ux500_pm_domain_esram_34 = {
+ /* Vape_esram3_pwr, Vape_esram4_pwr */
+ .name = "ESRAM_34",
.power_off = pd_power_off,
.power_on = pd_power_on,
};
static struct generic_pm_domain *ux500_pm_domains[NR_DOMAINS] = {
[DOMAIN_VAPE] = &ux500_pm_domain_vape,
+ [DOMAIN_VARM] = &ux500_pm_domain_varm,
+ [DOMAIN_VMODEM] = &ux500_pm_domain_vmodem,
+ [DOMAIN_VPLL] = &ux500_pm_domain_vpll,
+ [DOMAIN_VSMPS1] = &ux500_pm_domain_vsmps1,
+ [DOMAIN_VSMPS2] = &ux500_pm_domain_vsmps2,
+ [DOMAIN_VSMPS3] = &ux500_pm_domain_vsmps3,
+ [DOMAIN_VRF1] = &ux500_pm_domain_vrf1,
+ [DOMAIN_SVA_MMDSP] = &ux500_pm_domain_sva_mmdsp,
+ [DOMAIN_SVA_PIPE] = &ux500_pm_domain_sva_pipe,
+ [DOMAIN_SIA_MMDSP] = &ux500_pm_domain_sia_mmdsp,
+ [DOMAIN_SIA_PIPE] = &ux500_pm_domain_sia_pipe,
+ [DOMAIN_SGA] = &ux500_pm_domain_sga,
+ [DOMAIN_B2R2_MCDE] = &ux500_pm_domain_b2r2_mcde,
+ [DOMAIN_ESRAM_12] = &ux500_pm_domain_esram_12,
+ [DOMAIN_ESRAM_34] = &ux500_pm_domain_esram_34,
};
static const struct of_device_id ux500_pm_domain_matches[] = {
--
2.54.0
^ permalink raw reply related
* [PATCH 04/11] ARM: dts: ux500: Rename power domains node
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij, Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
This matches the naming used in the binding document
Documentation/devicetree/bindings/power/power-domain.yaml
It's most logical to call it a power controller.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/st/ste-dbx5x0.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
index 0f87abeddc33..d76a65da7011 100644
--- a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
@@ -343,7 +343,7 @@ pmu {
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
- pm_domains: pm_domains0 {
+ pm_domains: power-controller {
compatible = "stericsson,ux500-pm-domains";
#power-domain-cells = <1>;
};
--
2.54.0
^ permalink raw reply related
* [PATCH 05/11] ARM: dts: ux500: Add power domains
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij, Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Add the actual power domains to all the SoC peripherals.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/st/ste-dbx5x0.dtsi | 58 ++++++++++++++++++++++++++++++------
1 file changed, 49 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
index d76a65da7011..a6fef302c994 100644
--- a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
@@ -154,6 +154,7 @@ sram@40020000 {
reg = <0x40020000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
+ power-domains = <&pm_domains DOMAIN_ESRAM_12>;
ranges = <0 0x40020000 0x40000>;
};
sram@40060000 {
@@ -162,6 +163,7 @@ sram@40060000 {
reg = <0x40060000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
+ power-domains = <&pm_domains DOMAIN_ESRAM_34>;
ranges = <0 0x40060000 0x40000>;
lcla: sram@20000 {
@@ -181,7 +183,7 @@ lcla: sram@20000 {
ptm@801ae000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x801ae000 0x1000>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU0>;
@@ -197,7 +199,7 @@ ptm0_out_port: endpoint {
ptm@801af000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x801af000 0x1000>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
cpu = <&CPU1>;
@@ -213,7 +215,7 @@ ptm1_out_port: endpoint {
funnel@801a6000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x801a6000 0x1000>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
out-ports {
@@ -249,6 +251,7 @@ replicator {
compatible = "arm,coresight-static-replicator";
clocks = <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "atclk";
+ power-domains = <&pm_domains DOMAIN_VARM>;
out-ports {
#address-cells = <1>;
@@ -280,7 +283,7 @@ replicator_in_port0: endpoint {
tpiu@80190000 {
compatible = "arm,coresight-tpiu", "arm,primecell";
reg = <0x80190000 0x1000>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
in-ports {
@@ -295,7 +298,7 @@ tpiu_in_port: endpoint {
etb@801a4000 {
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x801a4000 0x1000>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&prcmu_clk PRCMU_APETRACECLK>, <&prcmu_clk PRCMU_APEATCLK>;
clock-names = "apb_pclk", "atclk";
in-ports {
@@ -314,11 +317,13 @@ intc: interrupt-controller@a0411000 {
interrupt-controller;
reg = <0xa0411000 0x1000>,
<0xa0410100 0x100>;
+ power-domains = <&pm_domains DOMAIN_VARM>;
};
scu@a0410000 {
compatible = "arm,cortex-a9-scu";
reg = <0xa0410000 0x100>;
+ power-domains = <&pm_domains DOMAIN_VARM>;
};
/*
@@ -326,6 +331,7 @@ scu@a0410000 {
* and various things like spin tables
*/
backupram@80150000 {
+ /* This memory is in the VSAFE (always on) power domain */
compatible = "ste,dbx500-backupram";
reg = <0x80150000 0x2000>;
};
@@ -334,6 +340,7 @@ L2: cache-controller {
compatible = "arm,pl310-cache";
reg = <0xa0412000 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pm_domains DOMAIN_VARM>;
cache-unified;
cache-level = <2>;
};
@@ -341,6 +348,7 @@ L2: cache-controller {
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pm_domains DOMAIN_VARM>;
};
pm_domains: power-controller {
@@ -357,6 +365,7 @@ clocks {
reg = <0x8012f000 0x1000>, <0x8011f000 0x1000>,
<0x8000f000 0x1000>, <0xa03ff000 0x1000>,
<0xa03cf000 0x1000>;
+ power-domains = <&pm_domains DOMAIN_VPLL>; /* CHECKME: correct domain? */
prcmu_clk: prcmu-clock {
#clock-cells = <1>;
@@ -393,7 +402,7 @@ mtu@a03c6000 {
compatible = "st,nomadik-mtu";
reg = <0xa03c6000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-
+ power-domains = <&pm_domains DOMAIN_VAPE>;
clocks = <&prcmu_clk PRCMU_TIMCLK>, <&prcc_pclk 6 6>;
clock-names = "timclk", "apb_pclk";
};
@@ -402,7 +411,7 @@ timer@a0410600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xa0410600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
-
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&smp_twd_clk>;
};
@@ -410,14 +419,15 @@ watchdog@a0410620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0xa0410620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
+ power-domains = <&pm_domains DOMAIN_VARM>;
clocks = <&smp_twd_clk>;
};
rtc@80154000 {
+ /* This peripheral is in the VSAFE (always on) power domain */
compatible = "arm,pl031", "arm,primecell";
reg = <0x80154000 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
-
clocks = <&rtc_clk>;
clock-names = "apb_pclk";
};
@@ -435,6 +445,7 @@ gpio0: gpio@8012e000 {
gpio-bank = <0>;
gpio-ranges = <&pinctrl 0 0 32>;
clocks = <&prcc_pclk 1 9>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio1: gpio@8012e080 {
@@ -450,6 +461,7 @@ gpio1: gpio@8012e080 {
gpio-bank = <1>;
gpio-ranges = <&pinctrl 0 32 5>;
clocks = <&prcc_pclk 1 9>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio2: gpio@8000e000 {
@@ -465,6 +477,7 @@ gpio2: gpio@8000e000 {
gpio-bank = <2>;
gpio-ranges = <&pinctrl 0 64 32>;
clocks = <&prcc_pclk 3 8>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio3: gpio@8000e080 {
@@ -480,6 +493,7 @@ gpio3: gpio@8000e080 {
gpio-bank = <3>;
gpio-ranges = <&pinctrl 0 96 2>;
clocks = <&prcc_pclk 3 8>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio4: gpio@8000e100 {
@@ -495,6 +509,7 @@ gpio4: gpio@8000e100 {
gpio-bank = <4>;
gpio-ranges = <&pinctrl 0 128 32>;
clocks = <&prcc_pclk 3 8>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio5: gpio@8000e180 {
@@ -510,6 +525,7 @@ gpio5: gpio@8000e180 {
gpio-bank = <5>;
gpio-ranges = <&pinctrl 0 160 12>;
clocks = <&prcc_pclk 3 8>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio6: gpio@8011e000 {
@@ -525,6 +541,7 @@ gpio6: gpio@8011e000 {
gpio-bank = <6>;
gpio-ranges = <&pinctrl 0 192 32>;
clocks = <&prcc_pclk 2 11>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio7: gpio@8011e080 {
@@ -540,6 +557,7 @@ gpio7: gpio@8011e080 {
gpio-bank = <7>;
gpio-ranges = <&pinctrl 0 224 7>;
clocks = <&prcc_pclk 2 11>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
gpio8: gpio@a03fe000 {
@@ -555,6 +573,7 @@ gpio8: gpio@a03fe000 {
gpio-bank = <8>;
gpio-ranges = <&pinctrl 0 256 12>;
clocks = <&prcc_pclk 5 1>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
pinctrl: pinctrl {
@@ -570,6 +589,7 @@ usb_per5@a03e0000 {
reg = <0xa03e0000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
+ power-domains = <&pm_domains DOMAIN_VAPE>;
dr_mode = "otg";
@@ -613,9 +633,11 @@ dma: dma-controller@801C0000 {
memcpy-channels = <56 57 58 59 60>;
clocks = <&prcmu_clk PRCMU_DMACLK>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
prcmu: prcmu@80157000 {
+ /* This peripheral is in the VSAFE (always on) power domain */
compatible = "stericsson,db8500-prcmu", "syscon";
reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
@@ -641,6 +663,10 @@ thermal: thermal@801573c0 {
#thermal-sensor-cells = <0>;
};
+ /*
+ * TODO: Delete these bogus regulators and replace with power
+ * domains.
+ */
db8500-prcmu-regulators {
compatible = "stericsson,db8500-prcmu-regulator";
@@ -932,6 +958,7 @@ serial0: serial@80120000 {
clocks = <&prcc_kclk 1 0>, <&prcc_pclk 1 0>;
clock-names = "uart", "apb_pclk";
+ power-domains = <&pm_domains DOMAIN_VAPE>;
resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART0>;
status = "disabled";
@@ -948,6 +975,7 @@ serial1: serial@80121000 {
clocks = <&prcc_kclk 1 1>, <&prcc_pclk 1 1>;
clock-names = "uart", "apb_pclk";
+ power-domains = <&pm_domains DOMAIN_VAPE>;
resets = <&prcc_reset DB8500_PRCC_1 DB8500_PRCC_1_RESET_UART1>;
status = "disabled";
@@ -964,6 +992,7 @@ serial2: serial@80007000 {
clocks = <&prcc_kclk 3 6>, <&prcc_pclk 3 6>;
clock-names = "uart", "apb_pclk";
+ power-domains = <&pm_domains DOMAIN_VAPE>;
resets = <&prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_UART2>;
status = "disabled";
@@ -1080,7 +1109,9 @@ msp0: msp@80123000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80123000 0x1000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ /* TODO: delete and replace with power-domain handling */
v-ape-supply = <&db8500_vape_reg>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
<&dma 31 0 0x10>; /* Logical - MemToDev - HighPrio */
@@ -1097,7 +1128,9 @@ msp1: msp@80124000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80124000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ /* TODO: delete and replace with power-domain handling */
v-ape-supply = <&db8500_vape_reg>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
/* This DMA channel only exist on DB8500 v1 */
dmas = <&dma 30 0 0x10>; /* Logical - MemToDev - HighPrio */
@@ -1115,7 +1148,9 @@ msp2: msp@80117000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80117000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ /* TODO: delete and replace with power-domain handling */
v-ape-supply = <&db8500_vape_reg>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
dmas = <&dma 14 0 0x12>, /* Logical - DevToMem - HighPrio */
<&dma 14 1 0x19>; /* Physical Chan 1 - MemToDev
@@ -1133,7 +1168,9 @@ msp3: msp@80125000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80125000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+ /* TODO: delete and replace with power-domain handling */
v-ape-supply = <&db8500_vape_reg>;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
/* This DMA channel only exist on DB8500 v2 */
dmas = <&dma 30 0 0x12>; /* Logical - DevToMem - HighPrio */
@@ -1175,14 +1212,17 @@ gpu@a0300000 {
"combined";
clocks = <&prcmu_clk PRCMU_ACLK>, <&prcmu_clk PRCMU_SGACLK>;
clock-names = "bus", "core";
+ power-domains = <&pm_domains DOMAIN_SGA>;
+ /* TODO: delete and replace with power-domain handling */
mali-supply = <&db8500_sga_reg>;
- power-domains = <&pm_domains DOMAIN_VAPE>;
};
mcde@a0350000 {
compatible = "ste,mcde";
reg = <0xa0350000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pm_domains DOMAIN_B2R2_MCDE>;
+ /* TODO: delete and replace with power-domain handling */
epod-supply = <&db8500_b2r2_mcde_reg>;
clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
--
2.54.0
^ permalink raw reply related
* [PATCH 06/11] pmdomain: st: ux500: Control DB8500 EPODs
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Move the DB8500 EPOD state handling into the Ux500 power-domain driver.
Keep the old regulator driver mutually exclusive with the pmdomain driver.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/mach-ux500/Kconfig | 2 +-
drivers/pmdomain/st/ste-ux500-pm-domain.c | 380 ++++++++++++++++++++++--------
drivers/regulator/Kconfig | 1 +
3 files changed, 282 insertions(+), 101 deletions(-)
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index c18def269137..56636c993f49 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -26,7 +26,7 @@ menuconfig ARCH_U8500
select PL310_ERRATA_753970 if CACHE_L2X0
select PM_GENERIC_DOMAINS if PM
select REGULATOR
- select REGULATOR_DB8500_PRCMU
+ select UX500_PM_DOMAIN
select REGULATOR_FIXED_VOLTAGE
select SOC_BUS
select RESET_CONTROLLER
diff --git a/drivers/pmdomain/st/ste-ux500-pm-domain.c b/drivers/pmdomain/st/ste-ux500-pm-domain.c
index 723001004690..1cd5b4985db0 100644
--- a/drivers/pmdomain/st/ste-ux500-pm-domain.c
+++ b/drivers/pmdomain/st/ste-ux500-pm-domain.c
@@ -6,172 +6,315 @@
*
* Implements PM domains using the generic PM domain for ux500.
*/
+#include <linux/cleanup.h>
#include <linux/device.h>
+#include <linux/err.h>
#include <linux/kernel.h>
+#include <linux/mfd/dbx500-prcmu.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
#include <linux/printk.h>
#include <linux/slab.h>
-#include <linux/err.h>
-#include <linux/of.h>
-#include <linux/pm_domain.h>
#include <dt-bindings/arm/ux500_pm_domains.h>
-static int pd_power_off(struct generic_pm_domain *domain)
+#define UX500_EPOD_NONE NUM_EPOD_ID
+
+/**
+ * struct dbx500_powerdomain_info - dbx500 power domain information
+ * @genpd: generic power domain
+ * @epod_id: id for EPOD (power domain)
+ * @is_ramret: RAM retention switch for EPOD (power domain)
+ * @exclude_from_power_state: exclude domain from power state count
+ */
+struct dbx500_powerdomain_info {
+ struct generic_pm_domain genpd;
+ u16 epod_id;
+ bool is_ramret;
+ bool exclude_from_power_state;
+};
+
+static DEFINE_MUTEX(ux500_pd_lock);
+static int power_state_active_cnt;
+static bool epod_on[NUM_EPOD_ID];
+static bool epod_ramret[NUM_EPOD_ID];
+
+static void power_state_active_enable(void)
+{
+ power_state_active_cnt++;
+}
+
+static int power_state_active_disable(void)
{
- /*
- * Handle the gating of the PM domain regulator here.
- *
- * Drivers/subsystems handling devices in the PM domain needs to perform
- * register context save/restore from their respective runtime PM
- * callbacks, to be able to enable PM domain gating/ungating.
- */
+ if (power_state_active_cnt <= 0) {
+ pr_err("power state: unbalanced enable/disable calls\n");
+ return -EINVAL;
+ }
+
+ power_state_active_cnt--;
return 0;
}
-static int pd_power_on(struct generic_pm_domain *domain)
+static int enable_epod(u16 epod_id, bool ramret)
{
- /*
- * Handle the ungating of the PM domain regulator here.
- *
- * Drivers/subsystems handling devices in the PM domain needs to perform
- * register context save/restore from their respective runtime PM
- * callbacks, to be able to enable PM domain gating/ungating.
- */
+ int ret;
+
+ if (ramret) {
+ if (!epod_on[epod_id]) {
+ ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
+ if (ret < 0)
+ return ret;
+ }
+ epod_ramret[epod_id] = true;
+ } else {
+ ret = prcmu_set_epod(epod_id, EPOD_STATE_ON);
+ if (ret < 0)
+ return ret;
+ epod_on[epod_id] = true;
+ }
+
+ return 0;
+}
+
+static int disable_epod(u16 epod_id, bool ramret)
+{
+ int ret;
+
+ if (ramret) {
+ if (!epod_on[epod_id]) {
+ ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
+ if (ret < 0)
+ return ret;
+ }
+ epod_ramret[epod_id] = false;
+ } else {
+ if (epod_ramret[epod_id]) {
+ ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
+ if (ret < 0)
+ return ret;
+ } else {
+ ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
+ if (ret < 0)
+ return ret;
+ }
+ epod_on[epod_id] = false;
+ }
+
return 0;
}
+static int pd_power_off(struct generic_pm_domain *domain)
+{
+ struct dbx500_powerdomain_info *info =
+ container_of(domain, struct dbx500_powerdomain_info, genpd);
+ int ret = 0;
+
+ guard(mutex)(&ux500_pd_lock);
+ if (info->epod_id < NUM_EPOD_ID)
+ ret = disable_epod(info->epod_id, info->is_ramret);
+ else if (!info->exclude_from_power_state)
+ ret = power_state_active_disable();
+
+ return ret;
+}
+
+static int pd_power_on(struct generic_pm_domain *domain)
+{
+ struct dbx500_powerdomain_info *info =
+ container_of(domain, struct dbx500_powerdomain_info, genpd);
+ int ret = 0;
+
+ guard(mutex)(&ux500_pd_lock);
+ if (info->epod_id < NUM_EPOD_ID)
+ ret = enable_epod(info->epod_id, info->is_ramret);
+ else if (!info->exclude_from_power_state)
+ power_state_active_enable();
+
+ return ret;
+}
+
/*
* Apart from these voltage domains there is also VSAFE which is always
* on. Vape_esram0_pwr for eSRAM0 is connected to VSAFE.
*/
-static struct generic_pm_domain ux500_pm_domain_vape = {
+static struct dbx500_powerdomain_info ux500_pm_domain_vape = {
/* Vape_pwr */
- .name = "VAPE", /* 0.95 .. 1.20 V */
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "VAPE", /* 0.95 .. 1.20 V */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
-static struct generic_pm_domain ux500_pm_domain_varm = {
- .name = "VARM",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_varm = {
+ .genpd = {
+ .name = "VARM",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
-static struct generic_pm_domain ux500_pm_domain_vmodem = {
- .name = "VMODEM",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vmodem = {
+ .genpd = {
+ .name = "VMODEM",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
-static struct generic_pm_domain ux500_pm_domain_vpll = {
- .name = "VPLL", /* 1.8 V */
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vpll = {
+ .genpd = {
+ .name = "VPLL", /* 1.8 V */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
/*
* CHECKME: as these are used directly by peripherals as regulators,
* perhaps they should stay in the regulator subsystem?
*/
-static struct generic_pm_domain ux500_pm_domain_vsmps1 = {
- .name = "VSMPS1", /* Also called VIO (1.2V) */
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vsmps1 = {
+ .genpd = {
+ .name = "VSMPS1", /* Also called VIO (1.2V) */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
-static struct generic_pm_domain ux500_pm_domain_vsmps2 = {
- .name = "VSMPS2", /* Also called VIO (1.8V) */
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vsmps2 = {
+ .genpd = {
+ .name = "VSMPS2", /* Also called VIO (1.8V) */
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
+ .exclude_from_power_state = true,
};
-static struct generic_pm_domain ux500_pm_domain_vsmps3 = {
- .name = "VSMPS3",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vsmps3 = {
+ .genpd = {
+ .name = "VSMPS3",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
-static struct generic_pm_domain ux500_pm_domain_vrf1 = {
- .name = "VRF1",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+static struct dbx500_powerdomain_info ux500_pm_domain_vrf1 = {
+ .genpd = {
+ .name = "VRF1",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = UX500_EPOD_NONE,
};
/* The following are technically children of VAPE */
-static struct generic_pm_domain ux500_pm_domain_sva_mmdsp = {
+static struct dbx500_powerdomain_info ux500_pm_domain_sva_mmdsp = {
/* Vape_SVA_MMDSP_pwr */
- .name = "SVA_MMDSP",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "SVA_MMDSP",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_SVAMMDSP,
};
-static struct generic_pm_domain ux500_pm_domain_sva_pipe = {
+static struct dbx500_powerdomain_info ux500_pm_domain_sva_pipe = {
/* Vape_SVA_pwr */
- .name = "SVA_PIPE",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "SVA_PIPE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_SVAPIPE,
};
-static struct generic_pm_domain ux500_pm_domain_sia_mmdsp = {
+static struct dbx500_powerdomain_info ux500_pm_domain_sia_mmdsp = {
/* Vape_SIA_MMDSP_pwr */
- .name = "SIA_MMDSP",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "SIA_MMDSP",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_SIAMMDSP,
};
-static struct generic_pm_domain ux500_pm_domain_sia_pipe = {
+static struct dbx500_powerdomain_info ux500_pm_domain_sia_pipe = {
/* Vape_SIA_pwr */
- .name = "SIA_PIPE",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "SIA_PIPE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_SIAPIPE,
};
-static struct generic_pm_domain ux500_pm_domain_sga = {
+static struct dbx500_powerdomain_info ux500_pm_domain_sga = {
/* Vape_SGA_pwr */
- .name = "SGA",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "SGA",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_SGA,
};
-static struct generic_pm_domain ux500_pm_domain_b2r2_mcde = {
+static struct dbx500_powerdomain_info ux500_pm_domain_b2r2_mcde = {
/* Vape_DSS_pwr DSS (display subsystem) */
- .name = "B2R2_MCDE",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "B2R2_MCDE",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_B2R2_MCDE,
};
-static struct generic_pm_domain ux500_pm_domain_esram_12 = {
+static struct dbx500_powerdomain_info ux500_pm_domain_esram_12 = {
/* Vape_esram0_pwr, Vape_esram1_pwr */
- .name = "ESRAM_12",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "ESRAM_12",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_ESRAM12,
};
-static struct generic_pm_domain ux500_pm_domain_esram_34 = {
+static struct dbx500_powerdomain_info ux500_pm_domain_esram_34 = {
/* Vape_esram3_pwr, Vape_esram4_pwr */
- .name = "ESRAM_34",
- .power_off = pd_power_off,
- .power_on = pd_power_on,
+ .genpd = {
+ .name = "ESRAM_34",
+ .power_off = pd_power_off,
+ .power_on = pd_power_on,
+ },
+ .epod_id = EPOD_ID_ESRAM34,
};
static struct generic_pm_domain *ux500_pm_domains[NR_DOMAINS] = {
- [DOMAIN_VAPE] = &ux500_pm_domain_vape,
- [DOMAIN_VARM] = &ux500_pm_domain_varm,
- [DOMAIN_VMODEM] = &ux500_pm_domain_vmodem,
- [DOMAIN_VPLL] = &ux500_pm_domain_vpll,
- [DOMAIN_VSMPS1] = &ux500_pm_domain_vsmps1,
- [DOMAIN_VSMPS2] = &ux500_pm_domain_vsmps2,
- [DOMAIN_VSMPS3] = &ux500_pm_domain_vsmps3,
- [DOMAIN_VRF1] = &ux500_pm_domain_vrf1,
- [DOMAIN_SVA_MMDSP] = &ux500_pm_domain_sva_mmdsp,
- [DOMAIN_SVA_PIPE] = &ux500_pm_domain_sva_pipe,
- [DOMAIN_SIA_MMDSP] = &ux500_pm_domain_sia_mmdsp,
- [DOMAIN_SIA_PIPE] = &ux500_pm_domain_sia_pipe,
- [DOMAIN_SGA] = &ux500_pm_domain_sga,
- [DOMAIN_B2R2_MCDE] = &ux500_pm_domain_b2r2_mcde,
- [DOMAIN_ESRAM_12] = &ux500_pm_domain_esram_12,
- [DOMAIN_ESRAM_34] = &ux500_pm_domain_esram_34,
+ [DOMAIN_VAPE] = &ux500_pm_domain_vape.genpd,
+ [DOMAIN_VARM] = &ux500_pm_domain_varm.genpd,
+ [DOMAIN_VMODEM] = &ux500_pm_domain_vmodem.genpd,
+ [DOMAIN_VPLL] = &ux500_pm_domain_vpll.genpd,
+ [DOMAIN_VSMPS1] = &ux500_pm_domain_vsmps1.genpd,
+ [DOMAIN_VSMPS2] = &ux500_pm_domain_vsmps2.genpd,
+ [DOMAIN_VSMPS3] = &ux500_pm_domain_vsmps3.genpd,
+ [DOMAIN_VRF1] = &ux500_pm_domain_vrf1.genpd,
+ [DOMAIN_SVA_MMDSP] = &ux500_pm_domain_sva_mmdsp.genpd,
+ [DOMAIN_SVA_PIPE] = &ux500_pm_domain_sva_pipe.genpd,
+ [DOMAIN_SIA_MMDSP] = &ux500_pm_domain_sia_mmdsp.genpd,
+ [DOMAIN_SIA_PIPE] = &ux500_pm_domain_sia_pipe.genpd,
+ [DOMAIN_SGA] = &ux500_pm_domain_sga.genpd,
+ [DOMAIN_B2R2_MCDE] = &ux500_pm_domain_b2r2_mcde.genpd,
+ [DOMAIN_ESRAM_12] = &ux500_pm_domain_esram_12.genpd,
+ [DOMAIN_ESRAM_34] = &ux500_pm_domain_esram_34.genpd,
};
static const struct of_device_id ux500_pm_domain_matches[] = {
@@ -179,11 +322,44 @@ static const struct of_device_id ux500_pm_domain_matches[] = {
{ },
};
+static int ux500_pm_domain_add_subdomain(struct generic_pm_domain *domain)
+{
+ return pm_genpd_add_subdomain(&ux500_pm_domain_vape.genpd, domain);
+}
+
+static int ux500_pm_domains_add_subdomains(void)
+{
+ int ret;
+
+ ret = ux500_pm_domain_add_subdomain(&ux500_pm_domain_sva_mmdsp.genpd);
+ if (ret)
+ return ret;
+
+ ret = ux500_pm_domain_add_subdomain(&ux500_pm_domain_sva_pipe.genpd);
+ if (ret)
+ return ret;
+
+ ret = ux500_pm_domain_add_subdomain(&ux500_pm_domain_sia_mmdsp.genpd);
+ if (ret)
+ return ret;
+
+ ret = ux500_pm_domain_add_subdomain(&ux500_pm_domain_sia_pipe.genpd);
+ if (ret)
+ return ret;
+
+ ret = ux500_pm_domain_add_subdomain(&ux500_pm_domain_sga.genpd);
+ if (ret)
+ return ret;
+
+ return ux500_pm_domain_add_subdomain(&ux500_pm_domain_b2r2_mcde.genpd);
+}
+
static int ux500_pm_domains_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct genpd_onecell_data *genpd_data;
int i;
+ int ret;
if (!np)
return -ENODEV;
@@ -196,7 +372,11 @@ static int ux500_pm_domains_probe(struct platform_device *pdev)
genpd_data->num_domains = ARRAY_SIZE(ux500_pm_domains);
for (i = 0; i < ARRAY_SIZE(ux500_pm_domains); ++i)
- pm_genpd_init(ux500_pm_domains[i], NULL, false);
+ pm_genpd_init(ux500_pm_domains[i], NULL, true);
+
+ ret = ux500_pm_domains_add_subdomains();
+ if (ret)
+ return ret;
of_genpd_add_provider_onecell(np, genpd_data);
return 0;
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 87554ab92801..35d1b191462c 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -414,6 +414,7 @@ config REGULATOR_DBX500_PRCMU
config REGULATOR_DB8500_PRCMU
bool "ST-Ericsson DB8500 Voltage Domain Regulators"
depends on MFD_DB8500_PRCMU
+ depends on !UX500_PM_DOMAIN
select REGULATOR_DBX500_PRCMU
help
This driver supports the voltage domain regulators controlled by the
--
2.54.0
^ permalink raw reply related
* [PATCH 07/11] drm/mcde: Use power domain for display power
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Replace explicit EPOD regulator handling with runtime PM.
Use the MCDE power domain and drop the regulator dependency.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
drivers/gpu/drm/mcde/mcde_clk_div.c | 4 +--
drivers/gpu/drm/mcde/mcde_display.c | 11 +++----
drivers/gpu/drm/mcde/mcde_drm.h | 2 --
drivers/gpu/drm/mcde/mcde_drv.c | 63 +++++++++++--------------------------
drivers/gpu/drm/mcde/mcde_dsi.c | 1 -
5 files changed, 25 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/mcde/mcde_clk_div.c b/drivers/gpu/drm/mcde/mcde_clk_div.c
index 8c5af2677357..1a22e6233946 100644
--- a/drivers/gpu/drm/mcde/mcde_clk_div.c
+++ b/drivers/gpu/drm/mcde/mcde_clk_div.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/clk-provider.h>
#include <linux/io.h>
-#include <linux/regulator/consumer.h>
+#include <linux/pm_runtime.h>
#include "mcde_drm.h"
#include "mcde_display_regs.h"
@@ -95,7 +95,7 @@ static unsigned long mcde_clk_div_recalc_rate(struct clk_hw *hw,
* It will come up with 0 in the divider register bits, which
* means "divide by 2".
*/
- if (!regulator_is_enabled(mcde->epod))
+ if (!pm_runtime_active(mcde->dev))
return DIV_ROUND_UP_ULL(prate, 2);
cr = readl(mcde->regs + cdiv->cr);
diff --git a/drivers/gpu/drm/mcde/mcde_display.c b/drivers/gpu/drm/mcde/mcde_display.c
index 257a6e84dd58..52f071bb347c 100644
--- a/drivers/gpu/drm/mcde/mcde_display.c
+++ b/drivers/gpu/drm/mcde/mcde_display.c
@@ -7,7 +7,7 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-buf.h>
-#include <linux/regulator/consumer.h>
+#include <linux/pm_runtime.h>
#include <linux/media-bus-format.h>
#include <drm/drm_device.h>
@@ -1168,16 +1168,15 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe,
int ret;
/* This powers up the entire MCDE block and the DSI hardware */
- ret = regulator_enable(mcde->epod);
+ ret = pm_runtime_resume_and_get(mcde->dev);
if (ret) {
- dev_err(drm->dev, "can't re-enable EPOD regulator\n");
+ dev_err(drm->dev, "can't enable MCDE power domain\n");
return;
}
dev_info(drm->dev, "enable MCDE, %d x %d format %p4cc\n",
mode->hdisplay, mode->vdisplay, &format);
-
/* Clear any pending interrupts */
mcde_display_disable_irqs(mcde);
writel(0, mcde->regs + MCDE_IMSCERR);
@@ -1327,9 +1326,9 @@ static void mcde_display_disable(struct drm_simple_display_pipe *pipe)
spin_unlock_irq(&crtc->dev->event_lock);
}
- ret = regulator_disable(mcde->epod);
+ ret = pm_runtime_put_sync_suspend(mcde->dev);
if (ret)
- dev_err(drm->dev, "can't disable EPOD regulator\n");
+ dev_err(drm->dev, "can't disable MCDE power domain\n");
/* Make sure we are powered down (before we may power up again) */
usleep_range(50000, 70000);
diff --git a/drivers/gpu/drm/mcde/mcde_drm.h b/drivers/gpu/drm/mcde/mcde_drm.h
index ecb70b4b737c..d4ff7606d917 100644
--- a/drivers/gpu/drm/mcde/mcde_drm.h
+++ b/drivers/gpu/drm/mcde/mcde_drm.h
@@ -91,8 +91,6 @@ struct mcde {
/* Locks the MCDE FIFO control register A and B */
spinlock_t fifo_crx1_lock;
- struct regulator *epod;
- struct regulator *vana;
};
#define to_mcde(dev) container_of(dev, struct mcde, drm)
diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c
index 5f2c462bad7e..3f966cccda5a 100644
--- a/drivers/gpu/drm/mcde/mcde_drv.c
+++ b/drivers/gpu/drm/mcde/mcde_drv.c
@@ -61,7 +61,7 @@
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
-#include <linux/regulator/consumer.h>
+#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/delay.h>
@@ -283,45 +283,25 @@ static int mcde_probe(struct platform_device *pdev)
mcde->dev = dev;
platform_set_drvdata(pdev, drm);
- /* First obtain and turn on the main power */
- mcde->epod = devm_regulator_get(dev, "epod");
- if (IS_ERR(mcde->epod)) {
- ret = PTR_ERR(mcde->epod);
- dev_err(dev, "can't get EPOD regulator\n");
- return ret;
- }
- ret = regulator_enable(mcde->epod);
+ pm_runtime_enable(dev);
+ ret = pm_runtime_resume_and_get(dev);
if (ret) {
- dev_err(dev, "can't enable EPOD regulator\n");
+ dev_err(dev, "can't enable MCDE power domain\n");
+ pm_runtime_disable(dev);
return ret;
}
- mcde->vana = devm_regulator_get(dev, "vana");
- if (IS_ERR(mcde->vana)) {
- ret = PTR_ERR(mcde->vana);
- dev_err(dev, "can't get VANA regulator\n");
- goto regulator_epod_off;
- }
- ret = regulator_enable(mcde->vana);
- if (ret) {
- dev_err(dev, "can't enable VANA regulator\n");
- goto regulator_epod_off;
- }
- /*
- * The vendor code uses ESRAM (onchip RAM) and need to activate
- * the v-esram34 regulator, but we don't use that yet
- */
/* Clock the silicon so we can access the registers */
mcde->mcde_clk = devm_clk_get(dev, "mcde");
if (IS_ERR(mcde->mcde_clk)) {
dev_err(dev, "unable to get MCDE main clock\n");
ret = PTR_ERR(mcde->mcde_clk);
- goto regulator_off;
+ goto pm_runtime_put;
}
ret = clk_prepare_enable(mcde->mcde_clk);
if (ret) {
dev_err(dev, "failed to enable MCDE main clock\n");
- goto regulator_off;
+ goto pm_runtime_put;
}
dev_info(dev, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde->mcde_clk));
@@ -412,14 +392,15 @@ static int mcde_probe(struct platform_device *pdev)
/*
* Perform an invasive reset of the MCDE and all blocks by
- * cutting the power to the subsystem, then bring it back up
+ * powering down the subsystem, then bring it back up
* later when we enable the display as a result of
* component_master_add_with_match().
*/
- ret = regulator_disable(mcde->epod);
+ ret = pm_runtime_put_sync_suspend(dev);
if (ret) {
- dev_err(dev, "can't disable EPOD regulator\n");
- return ret;
+ dev_err(dev, "can't disable MCDE power domain\n");
+ pm_runtime_get_noresume(dev);
+ goto clk_disable;
}
/* Wait 50 ms so we are sure we cut the power */
usleep_range(50000, 70000);
@@ -428,25 +409,18 @@ static int mcde_probe(struct platform_device *pdev)
match);
if (ret) {
dev_err(dev, "failed to add component master\n");
- /*
- * The EPOD regulator is already disabled at this point so some
- * special errorpath code is needed
- */
- clk_disable_unprepare(mcde->mcde_clk);
- regulator_disable(mcde->vana);
- return ret;
+ goto clk_disable_pm_disabled;
}
return 0;
clk_disable:
clk_disable_unprepare(mcde->mcde_clk);
-regulator_off:
- regulator_disable(mcde->vana);
-regulator_epod_off:
- regulator_disable(mcde->epod);
+pm_runtime_put:
+ pm_runtime_put_sync_suspend(dev);
+clk_disable_pm_disabled:
+ pm_runtime_disable(dev);
return ret;
-
}
static void mcde_remove(struct platform_device *pdev)
@@ -456,8 +430,7 @@ static void mcde_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &mcde_drm_comp_ops);
clk_disable_unprepare(mcde->mcde_clk);
- regulator_disable(mcde->vana);
- regulator_disable(mcde->epod);
+ pm_runtime_disable(&pdev->dev);
}
static void mcde_shutdown(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c
index 47d45897ed06..e09b2d4aca0c 100644
--- a/drivers/gpu/drm/mcde/mcde_dsi.c
+++ b/drivers/gpu/drm/mcde/mcde_dsi.c
@@ -8,7 +8,6 @@
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
-#include <linux/regulator/consumer.h>
#include <video/mipi_display.h>
#include <drm/drm_atomic_helper.h>
--
2.54.0
^ permalink raw reply related
* [PATCH 08/11] dmaengine: ste_dma40: Use power domain for LCLA SRAM
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Replace the LCLA ESRAM regulator with runtime PM.
Use the SRAM device that owns the ESRAM34 power domain.
Hold that domain while DMA transfers are active.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
drivers/dma/ste_dma40.c | 97 ++++++++++++++++++++++++++++---------------------
1 file changed, 55 insertions(+), 42 deletions(-)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 9b803c0aec25..6ca67ec446dc 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -21,8 +21,8 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_dma.h>
+#include <linux/of_platform.h>
#include <linux/amba/bus.h>
-#include <linux/regulator/consumer.h>
#include "dmaengine.h"
#include "ste_dma40.h"
@@ -571,7 +571,8 @@ struct d40_gen_dmac {
* to phy_chans entries.
* @plat_data: Pointer to provided platform_data which is the driver
* configuration.
- * @lcpa_regulator: Pointer to hold the regulator for the esram bank for lcla.
+ * @lcla_dev: SRAM device for the ESRAM bank used by LCLA.
+ * @lcla_pm_enabled: Whether runtime PM was enabled for LCLA by this driver.
* @phy_res: Vector containing all physical channels.
* @lcla_pool: lcla pool settings and data.
* @lcpa_base: The virtual mapped address of LCPA.
@@ -607,7 +608,8 @@ struct d40_base {
struct d40_chan **lookup_log_chans;
struct d40_chan **lookup_phy_chans;
struct stedma40_platform_data *plat_data;
- struct regulator *lcpa_regulator;
+ struct device *lcla_dev;
+ bool lcla_pm_enabled;
/* Physical half channels */
struct d40_phy_res *phy_res;
struct d40_lcla_pool lcla_pool;
@@ -628,6 +630,22 @@ static struct device *chan2dev(struct d40_chan *d40c)
return &d40c->chan.dev->device;
}
+static void d40_transfer_runtime_get(struct d40_base *base)
+{
+ if (base->lcla_dev)
+ pm_runtime_get_sync(base->lcla_dev);
+
+ pm_runtime_get_sync(base->dev);
+}
+
+static void d40_transfer_runtime_put(struct d40_base *base)
+{
+ pm_runtime_put_autosuspend(base->dev);
+
+ if (base->lcla_dev)
+ pm_runtime_put_sync_suspend(base->lcla_dev);
+}
+
static bool chan_is_physical(struct d40_chan *chan)
{
return chan->log_num == D40_PHY_CHAN;
@@ -1516,7 +1534,7 @@ static struct d40_desc *d40_queue_start(struct d40_chan *d40c)
if (d40d != NULL) {
if (!d40c->busy) {
d40c->busy = true;
- pm_runtime_get_sync(d40c->base->dev);
+ d40_transfer_runtime_get(d40c->base);
}
/* Remove from queue */
@@ -1579,7 +1597,7 @@ static void dma_tc_handle(struct d40_chan *d40c)
if (d40_queue_start(d40c) == NULL) {
d40c->busy = false;
- pm_runtime_put_autosuspend(d40c->base->dev);
+ d40_transfer_runtime_put(d40c->base);
}
d40_desc_remove(d40d);
@@ -2052,7 +2070,7 @@ static int d40_free_dma(struct d40_chan *d40c)
d40c->base->lookup_phy_chans[phy->num] = NULL;
if (d40c->busy)
- pm_runtime_put_autosuspend(d40c->base->dev);
+ d40_transfer_runtime_put(d40c->base);
d40c->busy = false;
d40c->phy_chan = NULL;
@@ -2613,7 +2631,7 @@ static int d40_terminate_all(struct dma_chan *chan)
d40_term_all(d40c);
pm_runtime_put_autosuspend(d40c->base->dev);
if (d40c->busy)
- pm_runtime_put_autosuspend(d40c->base->dev);
+ d40_transfer_runtime_put(d40c->base);
d40c->busy = false;
spin_unlock_irqrestore(&d40c->lock, flags);
@@ -2916,29 +2934,11 @@ static int __init d40_dmaengine_init(struct d40_base *base,
#ifdef CONFIG_PM_SLEEP
static int dma40_suspend(struct device *dev)
{
- struct d40_base *base = dev_get_drvdata(dev);
- int ret;
-
- ret = pm_runtime_force_suspend(dev);
- if (ret)
- return ret;
-
- if (base->lcpa_regulator)
- ret = regulator_disable(base->lcpa_regulator);
- return ret;
+ return pm_runtime_force_suspend(dev);
}
static int dma40_resume(struct device *dev)
{
- struct d40_base *base = dev_get_drvdata(dev);
- int ret = 0;
-
- if (base->lcpa_regulator) {
- ret = regulator_enable(base->lcpa_regulator);
- if (ret)
- return ret;
- }
-
return pm_runtime_force_resume(dev);
}
#endif
@@ -3492,7 +3492,10 @@ static int __init d40_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = pdev->dev.of_node;
struct device_node *np_lcpa;
+ struct device_node *np_lcla;
+ struct device_node *np_lcla_parent;
struct d40_base *base;
+ struct platform_device *lcla_pdev;
struct resource *res;
struct resource res_lcpa;
int num_reserved_chans;
@@ -3590,23 +3593,32 @@ static int __init d40_probe(struct platform_device *pdev)
}
if (base->plat_data->use_esram_lcla) {
+ np_lcla = of_parse_phandle(np, "sram", 1);
+ if (!np_lcla) {
+ dev_err(dev, "no LCLA SRAM node\n");
+ ret = -EINVAL;
+ goto destroy_cache;
+ }
- base->lcpa_regulator = regulator_get(base->dev, "lcla_esram");
- if (IS_ERR(base->lcpa_regulator)) {
- d40_err(dev, "Failed to get lcpa_regulator\n");
- ret = PTR_ERR(base->lcpa_regulator);
- base->lcpa_regulator = NULL;
+ np_lcla_parent = of_get_parent(np_lcla);
+ of_node_put(np_lcla);
+ if (!np_lcla_parent) {
+ dev_err(dev, "no LCLA SRAM parent node\n");
+ ret = -EINVAL;
goto destroy_cache;
}
- ret = regulator_enable(base->lcpa_regulator);
- if (ret) {
- d40_err(dev,
- "Failed to enable lcpa_regulator\n");
- regulator_put(base->lcpa_regulator);
- base->lcpa_regulator = NULL;
+ lcla_pdev = of_find_device_by_node(np_lcla_parent);
+ of_node_put(np_lcla_parent);
+ if (!lcla_pdev) {
+ ret = -EPROBE_DEFER;
goto destroy_cache;
}
+ base->lcla_dev = &lcla_pdev->dev;
+ if (!pm_runtime_enabled(base->lcla_dev)) {
+ pm_runtime_enable(base->lcla_dev);
+ base->lcla_pm_enabled = true;
+ }
}
writel_relaxed(D40_DREG_GCC_ENABLE_ALL, base->virtbase + D40_DREG_GCC);
@@ -3642,16 +3654,17 @@ static int __init d40_probe(struct platform_device *pdev)
SZ_1K * base->num_phy_chans,
DMA_TO_DEVICE);
- if (!base->lcla_pool.base_unaligned && base->lcla_pool.base)
+ if (!base->lcla_pool.base_unaligned && base->lcla_pool.base &&
+ base->lcla_pool.pages)
free_pages((unsigned long)base->lcla_pool.base,
base->lcla_pool.pages);
kfree(base->lcla_pool.base_unaligned);
- if (base->lcpa_regulator) {
- regulator_disable(base->lcpa_regulator);
- regulator_put(base->lcpa_regulator);
- }
+ if (base->lcla_pm_enabled)
+ pm_runtime_disable(base->lcla_dev);
+ if (base->lcla_dev)
+ put_device(base->lcla_dev);
pm_runtime_disable(base->dev);
report_failure:
--
2.54.0
^ permalink raw reply related
* [PATCH 09/11] regulator: db8500-prcmu: Remove EPOD regulators
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Remove the obsolete DB8500 PRCMU regulator drivers.
Drop the regulator build hooks now that EPODs are power domains.
Keep the MFD cell around because a later patch reuses it for a
small compatibility regulator driver.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
drivers/mfd/db8500-prcmu.c | 239 +---------------
drivers/regulator/Kconfig | 12 -
drivers/regulator/Makefile | 2 -
drivers/regulator/db8500-prcmu.c | 501 ---------------------------------
drivers/regulator/dbx500-prcmu.c | 155 ----------
drivers/regulator/dbx500-prcmu.h | 55 ----
include/linux/regulator/db8500-prcmu.h | 38 ---
7 files changed, 1 insertion(+), 1001 deletions(-)
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 21e68a382b11..f1eeab3e6270 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -34,8 +34,6 @@
#include <linux/mfd/core.h>
#include <linux/mfd/dbx500-prcmu.h>
#include <linux/mfd/abx500/ab8500.h>
-#include <linux/regulator/db8500-prcmu.h>
-#include <linux/regulator/machine.h>
#include "db8500-prcmu-regs.h"
/* Index of different voltages to be used when accessing AVSData */
@@ -2704,248 +2702,13 @@ static void init_prcm_registers(void)
writel(val, (PRCM_A9PL_FORCE_CLKEN));
}
-/*
- * Power domain switches (ePODs) modeled as regulators for the DB8500 SoC
- */
-static struct regulator_consumer_supply db8500_vape_consumers[] = {
- REGULATOR_SUPPLY("v-ape", NULL),
- REGULATOR_SUPPLY("v-i2c", "nmk-i2c.0"),
- REGULATOR_SUPPLY("v-i2c", "nmk-i2c.1"),
- REGULATOR_SUPPLY("v-i2c", "nmk-i2c.2"),
- REGULATOR_SUPPLY("v-i2c", "nmk-i2c.3"),
- REGULATOR_SUPPLY("v-i2c", "nmk-i2c.4"),
- /* "v-mmc" changed to "vcore" in the mainline kernel */
- REGULATOR_SUPPLY("vcore", "sdi0"),
- REGULATOR_SUPPLY("vcore", "sdi1"),
- REGULATOR_SUPPLY("vcore", "sdi2"),
- REGULATOR_SUPPLY("vcore", "sdi3"),
- REGULATOR_SUPPLY("vcore", "sdi4"),
- REGULATOR_SUPPLY("v-dma", "dma40.0"),
- REGULATOR_SUPPLY("v-ape", "ab8500-usb.0"),
- /* "v-uart" changed to "vcore" in the mainline kernel */
- REGULATOR_SUPPLY("vcore", "uart0"),
- REGULATOR_SUPPLY("vcore", "uart1"),
- REGULATOR_SUPPLY("vcore", "uart2"),
- REGULATOR_SUPPLY("v-ape", "nmk-ske-keypad.0"),
- REGULATOR_SUPPLY("v-hsi", "ste_hsi.0"),
- REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
-};
-
-static struct regulator_consumer_supply db8500_vsmps2_consumers[] = {
- REGULATOR_SUPPLY("musb_1v8", "ab8500-usb.0"),
- /* AV8100 regulator */
- REGULATOR_SUPPLY("hdmi_1v8", "0-0070"),
-};
-
-static struct regulator_consumer_supply db8500_b2r2_mcde_consumers[] = {
- REGULATOR_SUPPLY("vsupply", "b2r2_bus"),
- REGULATOR_SUPPLY("vsupply", "mcde"),
-};
-
-/* SVA MMDSP regulator switch */
-static struct regulator_consumer_supply db8500_svammdsp_consumers[] = {
- REGULATOR_SUPPLY("sva-mmdsp", "cm_control"),
-};
-
-/* SVA pipe regulator switch */
-static struct regulator_consumer_supply db8500_svapipe_consumers[] = {
- REGULATOR_SUPPLY("sva-pipe", "cm_control"),
-};
-
-/* SIA MMDSP regulator switch */
-static struct regulator_consumer_supply db8500_siammdsp_consumers[] = {
- REGULATOR_SUPPLY("sia-mmdsp", "cm_control"),
-};
-
-/* SIA pipe regulator switch */
-static struct regulator_consumer_supply db8500_siapipe_consumers[] = {
- REGULATOR_SUPPLY("sia-pipe", "cm_control"),
-};
-
-static struct regulator_consumer_supply db8500_sga_consumers[] = {
- REGULATOR_SUPPLY("v-mali", NULL),
-};
-
-/* ESRAM1 and 2 regulator switch */
-static struct regulator_consumer_supply db8500_esram12_consumers[] = {
- REGULATOR_SUPPLY("esram12", "cm_control"),
-};
-
-/* ESRAM3 and 4 regulator switch */
-static struct regulator_consumer_supply db8500_esram34_consumers[] = {
- REGULATOR_SUPPLY("v-esram34", "mcde"),
- REGULATOR_SUPPLY("esram34", "cm_control"),
- REGULATOR_SUPPLY("lcla_esram", "dma40.0"),
-};
-
-static struct regulator_init_data db8500_regulators[DB8500_NUM_REGULATORS] = {
- [DB8500_REGULATOR_VAPE] = {
- .constraints = {
- .name = "db8500-vape",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- .always_on = true,
- },
- .consumer_supplies = db8500_vape_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_vape_consumers),
- },
- [DB8500_REGULATOR_VARM] = {
- .constraints = {
- .name = "db8500-varm",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_VMODEM] = {
- .constraints = {
- .name = "db8500-vmodem",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_VPLL] = {
- .constraints = {
- .name = "db8500-vpll",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_VSMPS1] = {
- .constraints = {
- .name = "db8500-vsmps1",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_VSMPS2] = {
- .constraints = {
- .name = "db8500-vsmps2",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_vsmps2_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_vsmps2_consumers),
- },
- [DB8500_REGULATOR_VSMPS3] = {
- .constraints = {
- .name = "db8500-vsmps3",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_VRF1] = {
- .constraints = {
- .name = "db8500-vrf1",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_SWITCH_SVAMMDSP] = {
- /* dependency to u8500-vape is handled outside regulator framework */
- .constraints = {
- .name = "db8500-sva-mmdsp",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_svammdsp_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_svammdsp_consumers),
- },
- [DB8500_REGULATOR_SWITCH_SVAMMDSPRET] = {
- .constraints = {
- /* "ret" means "retention" */
- .name = "db8500-sva-mmdsp-ret",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_SWITCH_SVAPIPE] = {
- /* dependency to u8500-vape is handled outside regulator framework */
- .constraints = {
- .name = "db8500-sva-pipe",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_svapipe_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_svapipe_consumers),
- },
- [DB8500_REGULATOR_SWITCH_SIAMMDSP] = {
- /* dependency to u8500-vape is handled outside regulator framework */
- .constraints = {
- .name = "db8500-sia-mmdsp",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_siammdsp_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_siammdsp_consumers),
- },
- [DB8500_REGULATOR_SWITCH_SIAMMDSPRET] = {
- .constraints = {
- .name = "db8500-sia-mmdsp-ret",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_SWITCH_SIAPIPE] = {
- /* dependency to u8500-vape is handled outside regulator framework */
- .constraints = {
- .name = "db8500-sia-pipe",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_siapipe_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_siapipe_consumers),
- },
- [DB8500_REGULATOR_SWITCH_SGA] = {
- .supply_regulator = "db8500-vape",
- .constraints = {
- .name = "db8500-sga",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_sga_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_sga_consumers),
-
- },
- [DB8500_REGULATOR_SWITCH_B2R2_MCDE] = {
- .supply_regulator = "db8500-vape",
- .constraints = {
- .name = "db8500-b2r2-mcde",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_b2r2_mcde_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_b2r2_mcde_consumers),
- },
- [DB8500_REGULATOR_SWITCH_ESRAM12] = {
- /*
- * esram12 is set in retention and supplied by Vsafe when Vape is off,
- * no need to hold Vape
- */
- .constraints = {
- .name = "db8500-esram12",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_esram12_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_esram12_consumers),
- },
- [DB8500_REGULATOR_SWITCH_ESRAM12RET] = {
- .constraints = {
- .name = "db8500-esram12-ret",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
- [DB8500_REGULATOR_SWITCH_ESRAM34] = {
- /*
- * esram34 is set in retention and supplied by Vsafe when Vape is off,
- * no need to hold Vape
- */
- .constraints = {
- .name = "db8500-esram34",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .consumer_supplies = db8500_esram34_consumers,
- .num_consumer_supplies = ARRAY_SIZE(db8500_esram34_consumers),
- },
- [DB8500_REGULATOR_SWITCH_ESRAM34RET] = {
- .constraints = {
- .name = "db8500-esram34-ret",
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- },
-};
-
static const struct mfd_cell common_prcmu_devs[] = {
MFD_CELL_NAME("db8500_wdt"),
MFD_CELL_NAME("db8500-cpuidle"),
};
static const struct mfd_cell db8500_prcmu_devs[] = {
- MFD_CELL_OF("db8500-prcmu-regulators", NULL,
- &db8500_regulators, sizeof(db8500_regulators), 0,
+ MFD_CELL_OF("db8500-prcmu-regulators", NULL, NULL, 0, 0,
"stericsson,db8500-prcmu-regulator"),
MFD_CELL_OF("db8500-thermal",
NULL, NULL, 0, 0, "stericsson,db8500-thermal"),
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 35d1b191462c..acc698c17bd2 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -408,18 +408,6 @@ config REGULATOR_DA9211
step down converter 12A or 16A DC-DC Buck controlled through an I2C
interface.
-config REGULATOR_DBX500_PRCMU
- bool
-
-config REGULATOR_DB8500_PRCMU
- bool "ST-Ericsson DB8500 Voltage Domain Regulators"
- depends on MFD_DB8500_PRCMU
- depends on !UX500_PM_DOMAIN
- select REGULATOR_DBX500_PRCMU
- help
- This driver supports the voltage domain regulators controlled by the
- DB8500 PRCMU
-
config REGULATOR_FAN53555
tristate "Fairchild FAN53555 Regulator"
depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 35639f3115fd..96a02063b843 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -48,8 +48,6 @@ obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o
obj-$(CONFIG_REGULATOR_DA9121) += da9121-regulator.o
obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o
obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o
-obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o
-obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o
obj-$(CONFIG_REGULATOR_FAN53880) += fan53880.o
obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o
diff --git a/drivers/regulator/db8500-prcmu.c b/drivers/regulator/db8500-prcmu.c
deleted file mode 100644
index 1ec2e1348891..000000000000
--- a/drivers/regulator/db8500-prcmu.c
+++ /dev/null
@@ -1,501 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
- * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
- *
- * Power domain regulators on DB8500
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/spinlock.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/dbx500-prcmu.h>
-#include <linux/regulator/driver.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/db8500-prcmu.h>
-#include <linux/regulator/of_regulator.h>
-#include <linux/of.h>
-#include <linux/module.h>
-#include "dbx500-prcmu.h"
-
-static int db8500_regulator_enable(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev), "regulator-%s-enable\n",
- info->desc.name);
-
- if (!info->is_enabled) {
- info->is_enabled = true;
- if (!info->exclude_from_power_state)
- power_state_active_enable();
- }
-
- return 0;
-}
-
-static int db8500_regulator_disable(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
- int ret = 0;
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev), "regulator-%s-disable\n",
- info->desc.name);
-
- if (info->is_enabled) {
- info->is_enabled = false;
- if (!info->exclude_from_power_state)
- ret = power_state_active_disable();
- }
-
- return ret;
-}
-
-static int db8500_regulator_is_enabled(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev), "regulator-%s-is_enabled (is_enabled):"
- " %i\n", info->desc.name, info->is_enabled);
-
- return info->is_enabled;
-}
-
-/* db8500 regulator operations */
-static const struct regulator_ops db8500_regulator_ops = {
- .enable = db8500_regulator_enable,
- .disable = db8500_regulator_disable,
- .is_enabled = db8500_regulator_is_enabled,
-};
-
-/*
- * EPOD control
- */
-static bool epod_on[NUM_EPOD_ID];
-static bool epod_ramret[NUM_EPOD_ID];
-
-static int enable_epod(u16 epod_id, bool ramret)
-{
- int ret;
-
- if (ramret) {
- if (!epod_on[epod_id]) {
- ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
- if (ret < 0)
- return ret;
- }
- epod_ramret[epod_id] = true;
- } else {
- ret = prcmu_set_epod(epod_id, EPOD_STATE_ON);
- if (ret < 0)
- return ret;
- epod_on[epod_id] = true;
- }
-
- return 0;
-}
-
-static int disable_epod(u16 epod_id, bool ramret)
-{
- int ret;
-
- if (ramret) {
- if (!epod_on[epod_id]) {
- ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
- if (ret < 0)
- return ret;
- }
- epod_ramret[epod_id] = false;
- } else {
- if (epod_ramret[epod_id]) {
- ret = prcmu_set_epod(epod_id, EPOD_STATE_RAMRET);
- if (ret < 0)
- return ret;
- } else {
- ret = prcmu_set_epod(epod_id, EPOD_STATE_OFF);
- if (ret < 0)
- return ret;
- }
- epod_on[epod_id] = false;
- }
-
- return 0;
-}
-
-/*
- * Regulator switch
- */
-static int db8500_regulator_switch_enable(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
- int ret;
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-enable\n",
- info->desc.name);
-
- ret = enable_epod(info->epod_id, info->is_ramret);
- if (ret < 0) {
- dev_err(rdev_get_dev(rdev),
- "regulator-switch-%s-enable: prcmu call failed\n",
- info->desc.name);
- goto out;
- }
-
- info->is_enabled = true;
-out:
- return ret;
-}
-
-static int db8500_regulator_switch_disable(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
- int ret;
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev), "regulator-switch-%s-disable\n",
- info->desc.name);
-
- ret = disable_epod(info->epod_id, info->is_ramret);
- if (ret < 0) {
- dev_err(rdev_get_dev(rdev),
- "regulator_switch-%s-disable: prcmu call failed\n",
- info->desc.name);
- goto out;
- }
-
- info->is_enabled = false;
-out:
- return ret;
-}
-
-static int db8500_regulator_switch_is_enabled(struct regulator_dev *rdev)
-{
- struct dbx500_regulator_info *info = rdev_get_drvdata(rdev);
-
- if (info == NULL)
- return -EINVAL;
-
- dev_vdbg(rdev_get_dev(rdev),
- "regulator-switch-%s-is_enabled (is_enabled): %i\n",
- info->desc.name, info->is_enabled);
-
- return info->is_enabled;
-}
-
-static const struct regulator_ops db8500_regulator_switch_ops = {
- .enable = db8500_regulator_switch_enable,
- .disable = db8500_regulator_switch_disable,
- .is_enabled = db8500_regulator_switch_is_enabled,
-};
-
-/*
- * Regulator information
- */
-static struct dbx500_regulator_info
-dbx500_regulator_info[DB8500_NUM_REGULATORS] = {
- [DB8500_REGULATOR_VAPE] = {
- .desc = {
- .name = "db8500-vape",
- .of_match = of_match_ptr("db8500_vape"),
- .id = DB8500_REGULATOR_VAPE,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VARM] = {
- .desc = {
- .name = "db8500-varm",
- .of_match = of_match_ptr("db8500_varm"),
- .id = DB8500_REGULATOR_VARM,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VMODEM] = {
- .desc = {
- .name = "db8500-vmodem",
- .of_match = of_match_ptr("db8500_vmodem"),
- .id = DB8500_REGULATOR_VMODEM,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VPLL] = {
- .desc = {
- .name = "db8500-vpll",
- .of_match = of_match_ptr("db8500_vpll"),
- .id = DB8500_REGULATOR_VPLL,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VSMPS1] = {
- .desc = {
- .name = "db8500-vsmps1",
- .of_match = of_match_ptr("db8500_vsmps1"),
- .id = DB8500_REGULATOR_VSMPS1,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VSMPS2] = {
- .desc = {
- .name = "db8500-vsmps2",
- .of_match = of_match_ptr("db8500_vsmps2"),
- .id = DB8500_REGULATOR_VSMPS2,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- .fixed_uV = 1800000,
- .n_voltages = 1,
- },
- .exclude_from_power_state = true,
- },
- [DB8500_REGULATOR_VSMPS3] = {
- .desc = {
- .name = "db8500-vsmps3",
- .of_match = of_match_ptr("db8500_vsmps3"),
- .id = DB8500_REGULATOR_VSMPS3,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_VRF1] = {
- .desc = {
- .name = "db8500-vrf1",
- .of_match = of_match_ptr("db8500_vrf1"),
- .id = DB8500_REGULATOR_VRF1,
- .ops = &db8500_regulator_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- },
- [DB8500_REGULATOR_SWITCH_SVAMMDSP] = {
- .desc = {
- .name = "db8500-sva-mmdsp",
- .of_match = of_match_ptr("db8500_sva_mmdsp"),
- .id = DB8500_REGULATOR_SWITCH_SVAMMDSP,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SVAMMDSP,
- },
- [DB8500_REGULATOR_SWITCH_SVAMMDSPRET] = {
- .desc = {
- .name = "db8500-sva-mmdsp-ret",
- .of_match = of_match_ptr("db8500_sva_mmdsp_ret"),
- .id = DB8500_REGULATOR_SWITCH_SVAMMDSPRET,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SVAMMDSP,
- .is_ramret = true,
- },
- [DB8500_REGULATOR_SWITCH_SVAPIPE] = {
- .desc = {
- .name = "db8500-sva-pipe",
- .of_match = of_match_ptr("db8500_sva_pipe"),
- .id = DB8500_REGULATOR_SWITCH_SVAPIPE,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SVAPIPE,
- },
- [DB8500_REGULATOR_SWITCH_SIAMMDSP] = {
- .desc = {
- .name = "db8500-sia-mmdsp",
- .of_match = of_match_ptr("db8500_sia_mmdsp"),
- .id = DB8500_REGULATOR_SWITCH_SIAMMDSP,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SIAMMDSP,
- },
- [DB8500_REGULATOR_SWITCH_SIAMMDSPRET] = {
- .desc = {
- .name = "db8500-sia-mmdsp-ret",
- .of_match = of_match_ptr("db8500_sia_mmdsp_ret"),
- .id = DB8500_REGULATOR_SWITCH_SIAMMDSPRET,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SIAMMDSP,
- .is_ramret = true,
- },
- [DB8500_REGULATOR_SWITCH_SIAPIPE] = {
- .desc = {
- .name = "db8500-sia-pipe",
- .of_match = of_match_ptr("db8500_sia_pipe"),
- .id = DB8500_REGULATOR_SWITCH_SIAPIPE,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SIAPIPE,
- },
- [DB8500_REGULATOR_SWITCH_SGA] = {
- .desc = {
- .name = "db8500-sga",
- .of_match = of_match_ptr("db8500_sga"),
- .id = DB8500_REGULATOR_SWITCH_SGA,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_SGA,
- },
- [DB8500_REGULATOR_SWITCH_B2R2_MCDE] = {
- .desc = {
- .name = "db8500-b2r2-mcde",
- .of_match = of_match_ptr("db8500_b2r2_mcde"),
- .id = DB8500_REGULATOR_SWITCH_B2R2_MCDE,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_B2R2_MCDE,
- },
- [DB8500_REGULATOR_SWITCH_ESRAM12] = {
- .desc = {
- .name = "db8500-esram12",
- .of_match = of_match_ptr("db8500_esram12"),
- .id = DB8500_REGULATOR_SWITCH_ESRAM12,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_ESRAM12,
- .is_enabled = true,
- },
- [DB8500_REGULATOR_SWITCH_ESRAM12RET] = {
- .desc = {
- .name = "db8500-esram12-ret",
- .of_match = of_match_ptr("db8500_esram12_ret"),
- .id = DB8500_REGULATOR_SWITCH_ESRAM12RET,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_ESRAM12,
- .is_ramret = true,
- },
- [DB8500_REGULATOR_SWITCH_ESRAM34] = {
- .desc = {
- .name = "db8500-esram34",
- .of_match = of_match_ptr("db8500_esram34"),
- .id = DB8500_REGULATOR_SWITCH_ESRAM34,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_ESRAM34,
- .is_enabled = true,
- },
- [DB8500_REGULATOR_SWITCH_ESRAM34RET] = {
- .desc = {
- .name = "db8500-esram34-ret",
- .of_match = of_match_ptr("db8500_esram34_ret"),
- .id = DB8500_REGULATOR_SWITCH_ESRAM34RET,
- .ops = &db8500_regulator_switch_ops,
- .type = REGULATOR_VOLTAGE,
- .owner = THIS_MODULE,
- },
- .epod_id = EPOD_ID_ESRAM34,
- .is_ramret = true,
- },
-};
-
-static int db8500_regulator_probe(struct platform_device *pdev)
-{
- struct regulator_init_data *db8500_init_data;
- struct dbx500_regulator_info *info;
- struct regulator_config config = { };
- struct regulator_dev *rdev;
- int err, i;
-
- db8500_init_data = dev_get_platdata(&pdev->dev);
-
- for (i = 0; i < ARRAY_SIZE(dbx500_regulator_info); i++) {
- /* assign per-regulator data */
- info = &dbx500_regulator_info[i];
-
- config.driver_data = info;
- config.dev = &pdev->dev;
- if (db8500_init_data)
- config.init_data = &db8500_init_data[i];
-
- rdev = devm_regulator_register(&pdev->dev, &info->desc,
- &config);
- if (IS_ERR(rdev)) {
- err = PTR_ERR(rdev);
- dev_err(&pdev->dev, "failed to register %s: err %i\n",
- info->desc.name, err);
- return err;
- }
- dev_dbg(&pdev->dev, "regulator-%s-probed\n", info->desc.name);
- }
-
- ux500_regulator_debug_init(pdev, dbx500_regulator_info,
- ARRAY_SIZE(dbx500_regulator_info));
- return 0;
-}
-
-static void db8500_regulator_remove(struct platform_device *pdev)
-{
- ux500_regulator_debug_exit();
-}
-
-static struct platform_driver db8500_regulator_driver = {
- .driver = {
- .name = "db8500-prcmu-regulators",
- .probe_type = PROBE_PREFER_ASYNCHRONOUS,
- },
- .probe = db8500_regulator_probe,
- .remove = db8500_regulator_remove,
-};
-
-static int __init db8500_regulator_init(void)
-{
- return platform_driver_register(&db8500_regulator_driver);
-}
-
-static void __exit db8500_regulator_exit(void)
-{
- platform_driver_unregister(&db8500_regulator_driver);
-}
-
-arch_initcall(db8500_regulator_init);
-module_exit(db8500_regulator_exit);
-
-MODULE_AUTHOR("STMicroelectronics/ST-Ericsson");
-MODULE_DESCRIPTION("DB8500 regulator driver");
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/dbx500-prcmu.c b/drivers/regulator/dbx500-prcmu.c
deleted file mode 100644
index a45c1e1ac7ef..000000000000
--- a/drivers/regulator/dbx500-prcmu.c
+++ /dev/null
@@ -1,155 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
- * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
- *
- * UX500 common part of Power domain regulators
- */
-
-#include <linux/kernel.h>
-#include <linux/err.h>
-#include <linux/regulator/driver.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-
-#include "dbx500-prcmu.h"
-
-/*
- * power state reference count
- */
-static int power_state_active_cnt; /* will initialize to zero */
-static DEFINE_SPINLOCK(power_state_active_lock);
-
-void power_state_active_enable(void)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&power_state_active_lock, flags);
- power_state_active_cnt++;
- spin_unlock_irqrestore(&power_state_active_lock, flags);
-}
-
-int power_state_active_disable(void)
-{
- int ret = 0;
- unsigned long flags;
-
- spin_lock_irqsave(&power_state_active_lock, flags);
- if (power_state_active_cnt <= 0) {
- pr_err("power state: unbalanced enable/disable calls\n");
- ret = -EINVAL;
- goto out;
- }
-
- power_state_active_cnt--;
-out:
- spin_unlock_irqrestore(&power_state_active_lock, flags);
- return ret;
-}
-
-#ifdef CONFIG_REGULATOR_DEBUG
-
-static int power_state_active_get(void)
-{
- unsigned long flags;
- int cnt;
-
- spin_lock_irqsave(&power_state_active_lock, flags);
- cnt = power_state_active_cnt;
- spin_unlock_irqrestore(&power_state_active_lock, flags);
-
- return cnt;
-}
-
-static struct ux500_regulator_debug {
- struct dentry *dir;
- struct dbx500_regulator_info *regulator_array;
- int num_regulators;
- u8 *state_before_suspend;
- u8 *state_after_suspend;
-} rdebug;
-
-static int ux500_regulator_power_state_cnt_show(struct seq_file *s, void *p)
-{
- /* print power state count */
- seq_printf(s, "ux500-regulator power state count: %i\n",
- power_state_active_get());
-
- return 0;
-}
-DEFINE_SHOW_ATTRIBUTE(ux500_regulator_power_state_cnt);
-
-static int ux500_regulator_status_show(struct seq_file *s, void *p)
-{
- int i;
-
- /* print dump header */
- seq_puts(s, "ux500-regulator status:\n");
- seq_printf(s, "%31s : %8s : %8s\n", "current", "before", "after");
-
- for (i = 0; i < rdebug.num_regulators; i++) {
- struct dbx500_regulator_info *info;
- /* Access per-regulator data */
- info = &rdebug.regulator_array[i];
-
- /* print status */
- seq_printf(s, "%20s : %8s : %8s : %8s\n",
- info->desc.name,
- info->is_enabled ? "enabled" : "disabled",
- rdebug.state_before_suspend[i] ? "enabled" : "disabled",
- rdebug.state_after_suspend[i] ? "enabled" : "disabled");
- }
-
- return 0;
-}
-DEFINE_SHOW_ATTRIBUTE(ux500_regulator_status);
-
-int
-ux500_regulator_debug_init(struct platform_device *pdev,
- struct dbx500_regulator_info *regulator_info,
- int num_regulators)
-{
- /* create directory */
- rdebug.dir = debugfs_create_dir("ux500-regulator", NULL);
-
- /* create "status" file */
- debugfs_create_file("status", 0444, rdebug.dir, &pdev->dev,
- &ux500_regulator_status_fops);
-
- /* create "power-state-count" file */
- debugfs_create_file("power-state-count", 0444, rdebug.dir,
- &pdev->dev, &ux500_regulator_power_state_cnt_fops);
-
- rdebug.regulator_array = regulator_info;
- rdebug.num_regulators = num_regulators;
-
- rdebug.state_before_suspend = kzalloc(num_regulators, GFP_KERNEL);
- if (!rdebug.state_before_suspend)
- goto exit_destroy_power_state;
-
- rdebug.state_after_suspend = kzalloc(num_regulators, GFP_KERNEL);
- if (!rdebug.state_after_suspend)
- goto exit_free;
-
- return 0;
-
-exit_free:
- kfree(rdebug.state_before_suspend);
-exit_destroy_power_state:
- debugfs_remove_recursive(rdebug.dir);
- return -ENOMEM;
-}
-
-int ux500_regulator_debug_exit(void)
-{
- debugfs_remove_recursive(rdebug.dir);
- kfree(rdebug.state_after_suspend);
- kfree(rdebug.state_before_suspend);
-
- return 0;
-}
-#endif
diff --git a/drivers/regulator/dbx500-prcmu.h b/drivers/regulator/dbx500-prcmu.h
deleted file mode 100644
index 2fb3aaef9dbb..000000000000
--- a/drivers/regulator/dbx500-prcmu.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Bengt Jonsson <bengt.jonsson@stericsson.com> for ST-Ericsson,
- * Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
- */
-
-#ifndef DBX500_REGULATOR_H
-#define DBX500_REGULATOR_H
-
-#include <linux/platform_device.h>
-
-/**
- * struct dbx500_regulator_info - dbx500 regulator information
- * @desc: regulator description
- * @is_enabled: status of the regulator
- * @epod_id: id for EPOD (power domain)
- * @is_ramret: RAM retention switch for EPOD (power domain)
- *
- */
-struct dbx500_regulator_info {
- struct regulator_desc desc;
- bool is_enabled;
- u16 epod_id;
- bool is_ramret;
- bool exclude_from_power_state;
-};
-
-void power_state_active_enable(void);
-int power_state_active_disable(void);
-
-
-#ifdef CONFIG_REGULATOR_DEBUG
-int ux500_regulator_debug_init(struct platform_device *pdev,
- struct dbx500_regulator_info *regulator_info,
- int num_regulators);
-
-int ux500_regulator_debug_exit(void);
-#else
-
-static inline int ux500_regulator_debug_init(struct platform_device *pdev,
- struct dbx500_regulator_info *regulator_info,
- int num_regulators)
-{
- return 0;
-}
-
-static inline int ux500_regulator_debug_exit(void)
-{
- return 0;
-}
-
-#endif
-#endif
diff --git a/include/linux/regulator/db8500-prcmu.h b/include/linux/regulator/db8500-prcmu.h
deleted file mode 100644
index d58ff273157e..000000000000
--- a/include/linux/regulator/db8500-prcmu.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
- *
- * Interface to power domain regulators on DB8500
- */
-
-#ifndef __REGULATOR_H__
-#define __REGULATOR_H__
-
-/* Number of DB8500 regulators and regulator enumeration */
-enum db8500_regulator_id {
- DB8500_REGULATOR_VAPE,
- DB8500_REGULATOR_VARM,
- DB8500_REGULATOR_VMODEM,
- DB8500_REGULATOR_VPLL,
- DB8500_REGULATOR_VSMPS1,
- DB8500_REGULATOR_VSMPS2,
- DB8500_REGULATOR_VSMPS3,
- DB8500_REGULATOR_VRF1,
- DB8500_REGULATOR_SWITCH_SVAMMDSP,
- DB8500_REGULATOR_SWITCH_SVAMMDSPRET,
- DB8500_REGULATOR_SWITCH_SVAPIPE,
- DB8500_REGULATOR_SWITCH_SIAMMDSP,
- DB8500_REGULATOR_SWITCH_SIAMMDSPRET,
- DB8500_REGULATOR_SWITCH_SIAPIPE,
- DB8500_REGULATOR_SWITCH_SGA,
- DB8500_REGULATOR_SWITCH_B2R2_MCDE,
- DB8500_REGULATOR_SWITCH_ESRAM12,
- DB8500_REGULATOR_SWITCH_ESRAM12RET,
- DB8500_REGULATOR_SWITCH_ESRAM34,
- DB8500_REGULATOR_SWITCH_ESRAM34RET,
- DB8500_NUM_REGULATORS
-};
-
-#endif
--
2.54.0
^ permalink raw reply related
* [PATCH 10/11] regulator: db8500: Add power domain regulators
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Add a DB8500 regulator driver for the VAPE and VSMPS2 compatibility nodes.
Back the regulator enable state with the corresponding power domains.
This is done for off-chip consumers: the corresponding voltage rails are
routed out so they are used for powering different peripherals using
these voltages as supplies.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/st/ste-dbx5x0.dtsi | 2 +
drivers/regulator/Kconfig | 11 ++
drivers/regulator/Makefile | 1 +
drivers/regulator/db8500-regulator.c | 221 +++++++++++++++++++++++++++++++++++
4 files changed, 235 insertions(+)
diff --git a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
index a6fef302c994..fd6a075e4c93 100644
--- a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
@@ -673,6 +673,7 @@ db8500-prcmu-regulators {
// DB8500_REGULATOR_VAPE
db8500_vape_reg: db8500_vape {
regulator-always-on;
+ power-domains = <&pm_domains DOMAIN_VAPE>;
};
// DB8500_REGULATOR_VARM
@@ -693,6 +694,7 @@ db8500_vsmps1_reg: db8500_vsmps1 {
// DB8500_REGULATOR_VSMPS2
db8500_vsmps2_reg: db8500_vsmps2 {
+ power-domains = <&pm_domains DOMAIN_VSMPS2>;
};
// DB8500_REGULATOR_VSMPS3
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index acc698c17bd2..8db63d8d3fa4 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -397,6 +397,17 @@ config REGULATOR_DA9210
converter 12A DC-DC Buck controlled through an I2C
interface.
+config REGULATOR_DB8500
+ bool "ST-Ericsson DB8500 power domain regulators"
+ depends on MFD_DB8500_PRCMU && UX500_PM_DOMAIN && OF
+ default ARCH_U8500
+ help
+ This driver supports the DB8500 VAPE and VSMPS2 regulators.
+ These supplies are represented by generic power domains in hardware,
+ but the same voltage rails are routed out of the chip and used to
+ supply external peripherals.
+ Enable this driver to bridge those regulator consumers to genpd.
+
config REGULATOR_DA9211
tristate "Dialog Semiconductor DA9211/DA9212/DA9213/DA9223/DA9214/DA9224/DA9215/DA9225 regulator"
depends on I2C
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 96a02063b843..f4109549525a 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o
obj-$(CONFIG_REGULATOR_DA9121) += da9121-regulator.o
obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o
obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o
+obj-$(CONFIG_REGULATOR_DB8500) += db8500-regulator.o
obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o
obj-$(CONFIG_REGULATOR_FAN53880) += fan53880.o
obj-$(CONFIG_REGULATOR_GPIO) += gpio-regulator.o
diff --git a/drivers/regulator/db8500-regulator.c b/drivers/regulator/db8500-regulator.c
new file mode 100644
index 000000000000..c5a9a1baaf8e
--- /dev/null
+++ b/drivers/regulator/db8500-regulator.c
@@ -0,0 +1,221 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2026 Linus Walleij <linusw@kernel.org>
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/slab.h>
+
+struct db8500_regulator_info {
+ struct regulator_desc desc;
+ struct regulator_init_data init_data;
+ struct device pd_dev;
+ bool enabled;
+};
+
+struct db8500_regulator_match {
+ const char *name;
+ const char *supply_name;
+ const char *constraint_name;
+ int fixed_uV;
+ bool always_on;
+};
+
+static const struct db8500_regulator_match db8500_regulator_matches[] = {
+ {
+ .name = "db8500_vape",
+ .supply_name = "db8500-vape",
+ .constraint_name = "db8500-vape",
+ .always_on = true,
+ }, {
+ .name = "db8500_vsmps2",
+ .supply_name = "db8500-vsmps2",
+ .constraint_name = "db8500-vsmps2",
+ .fixed_uV = 1800000,
+ },
+};
+
+static int db8500_regulator_enable(struct regulator_dev *rdev)
+{
+ struct db8500_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(&info->pd_dev);
+ if (ret)
+ return ret;
+
+ info->enabled = true;
+ return 0;
+}
+
+static int db8500_regulator_disable(struct regulator_dev *rdev)
+{
+ struct db8500_regulator_info *info = rdev_get_drvdata(rdev);
+ int ret;
+
+ ret = pm_runtime_put_sync_suspend(&info->pd_dev);
+ if (ret)
+ return ret;
+
+ info->enabled = false;
+ return 0;
+}
+
+static int db8500_regulator_is_enabled(struct regulator_dev *rdev)
+{
+ struct db8500_regulator_info *info = rdev_get_drvdata(rdev);
+
+ return info->enabled;
+}
+
+static int db8500_regulator_get_voltage(struct regulator_dev *rdev)
+{
+ struct db8500_regulator_info *info = rdev_get_drvdata(rdev);
+
+ if (!info->desc.fixed_uV)
+ return -EINVAL;
+
+ return info->desc.fixed_uV;
+}
+
+static const struct regulator_ops db8500_regulator_ops = {
+ .enable = db8500_regulator_enable,
+ .disable = db8500_regulator_disable,
+ .is_enabled = db8500_regulator_is_enabled,
+ .get_voltage = db8500_regulator_get_voltage,
+};
+
+static void db8500_regulator_release(struct device *dev)
+{
+}
+
+static void db8500_regulator_cleanup(void *data)
+{
+ struct db8500_regulator_info *info = data;
+
+ pm_runtime_disable(&info->pd_dev);
+ dev_pm_domain_detach(&info->pd_dev, true);
+ put_device(&info->pd_dev);
+}
+
+static const struct db8500_regulator_match *
+db8500_regulator_match(struct device_node *np)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(db8500_regulator_matches); i++) {
+ if (of_node_name_eq(np, db8500_regulator_matches[i].name))
+ return &db8500_regulator_matches[i];
+ }
+
+ return NULL;
+}
+
+static int db8500_regulator_register(struct platform_device *pdev,
+ struct device_node *np)
+{
+ const struct db8500_regulator_match *match;
+ struct regulator_config config = { };
+ struct db8500_regulator_info *info;
+ struct of_phandle_args pd_args;
+ struct regulator_dev *rdev;
+ const char *cells = "#power-domain-cells";
+ int ret;
+
+ match = db8500_regulator_match(np);
+ if (!match)
+ return 0;
+
+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
+ device_initialize(&info->pd_dev);
+ info->pd_dev.parent = &pdev->dev;
+ info->pd_dev.of_node = np;
+ info->pd_dev.release = db8500_regulator_release;
+ ret = dev_set_name(&info->pd_dev, "%s-pd", match->name);
+ if (ret)
+ goto put_device;
+
+ ret = of_parse_phandle_with_args(np, "power-domains", cells, 0, &pd_args);
+ if (ret)
+ goto put_device;
+
+ ret = of_genpd_add_device(&pd_args, &info->pd_dev);
+ of_node_put(pd_args.np);
+ if (ret)
+ goto put_device;
+
+ pm_runtime_enable(&info->pd_dev);
+ ret = devm_add_action_or_reset(&pdev->dev, db8500_regulator_cleanup, info);
+ if (ret)
+ return ret;
+
+ info->init_data.constraints.name = match->constraint_name;
+ info->init_data.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
+ info->init_data.constraints.always_on = match->always_on;
+
+ info->desc.name = match->supply_name;
+ info->desc.of_match = match->name;
+ info->desc.ops = &db8500_regulator_ops;
+ info->desc.type = REGULATOR_VOLTAGE;
+ info->desc.owner = THIS_MODULE;
+ info->desc.fixed_uV = match->fixed_uV;
+ config.dev = &pdev->dev;
+ config.init_data = &info->init_data;
+ config.driver_data = info;
+ config.of_node = np;
+ rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
+ if (IS_ERR(rdev))
+ return PTR_ERR(rdev);
+
+ return 0;
+
+put_device:
+ put_device(&info->pd_dev);
+ return ret;
+}
+
+static int db8500_regulator_probe(struct platform_device *pdev)
+{
+ struct device_node *np;
+ int ret;
+
+ for_each_available_child_of_node(pdev->dev.of_node, np) {
+ ret = db8500_regulator_register(pdev, np);
+ if (ret) {
+ of_node_put(np);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static const struct of_device_id db8500_regulator_match_table[] = {
+ { .compatible = "stericsson,db8500-prcmu-regulator" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, db8500_regulator_match_table);
+
+static struct platform_driver db8500_regulator_driver = {
+ .driver = {
+ .name = "db8500-prcmu-regulators",
+ .of_match_table = db8500_regulator_match_table,
+ },
+ .probe = db8500_regulator_probe,
+};
+module_platform_driver(db8500_regulator_driver);
+
+MODULE_AUTHOR("Linus Walleij <linusw@kernel.org>");
+MODULE_DESCRIPTION("DB8500 power-domain regulator driver");
+MODULE_LICENSE("GPL");
--
2.54.0
^ permalink raw reply related
* [PATCH 11/11] ARM: dts: ux500: Remove DB8500 EPOD regulators
From: Linus Walleij @ 2026-06-18 5:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Ulf Hansson,
Mark Brown, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann,
David Airlie, Simona Vetter, Vinod Koul, Frank Li, Lee Jones
Cc: linux-arm-kernel, devicetree, linux-pm, dri-devel, dmaengine,
Linus Walleij
In-Reply-To: <20260618-ux500-power-domains-v7-1-v1-0-eb5e50b1a588@kernel.org>
Delete the obsolete DB8500 EPOD regulator nodes.
Keep the VAPE and VSMPS2 compatibility regulators.
Assisted-by: Codex:gpt-5-5
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
arch/arm/boot/dts/st/ste-dbx5x0.dtsi | 92 ------------------------------------
1 file changed, 92 deletions(-)
diff --git a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
index fd6a075e4c93..18727953a863 100644
--- a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi
@@ -663,97 +663,17 @@ thermal: thermal@801573c0 {
#thermal-sensor-cells = <0>;
};
- /*
- * TODO: Delete these bogus regulators and replace with power
- * domains.
- */
db8500-prcmu-regulators {
compatible = "stericsson,db8500-prcmu-regulator";
- // DB8500_REGULATOR_VAPE
db8500_vape_reg: db8500_vape {
regulator-always-on;
power-domains = <&pm_domains DOMAIN_VAPE>;
};
- // DB8500_REGULATOR_VARM
- db8500_varm_reg: db8500_varm {
- };
-
- // DB8500_REGULATOR_VMODEM
- db8500_vmodem_reg: db8500_vmodem {
- };
-
- // DB8500_REGULATOR_VPLL
- db8500_vpll_reg: db8500_vpll {
- };
-
- // DB8500_REGULATOR_VSMPS1
- db8500_vsmps1_reg: db8500_vsmps1 {
- };
-
- // DB8500_REGULATOR_VSMPS2
db8500_vsmps2_reg: db8500_vsmps2 {
power-domains = <&pm_domains DOMAIN_VSMPS2>;
};
-
- // DB8500_REGULATOR_VSMPS3
- db8500_vsmps3_reg: db8500_vsmps3 {
- };
-
- // DB8500_REGULATOR_VRF1
- db8500_vrf1_reg: db8500_vrf1 {
- };
-
- // DB8500_REGULATOR_SWITCH_SVAMMDSP
- db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
- };
-
- // DB8500_REGULATOR_SWITCH_SVAMMDSPRET
- db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
- };
-
- // DB8500_REGULATOR_SWITCH_SVAPIPE
- db8500_sva_pipe_reg: db8500_sva_pipe {
- };
-
- // DB8500_REGULATOR_SWITCH_SIAMMDSP
- db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
- };
-
- // DB8500_REGULATOR_SWITCH_SIAMMDSPRET
- db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
- };
-
- // DB8500_REGULATOR_SWITCH_SIAPIPE
- db8500_sia_pipe_reg: db8500_sia_pipe {
- };
-
- // DB8500_REGULATOR_SWITCH_SGA
- db8500_sga_reg: db8500_sga {
- vin-supply = <&db8500_vape_reg>;
- };
-
- // DB8500_REGULATOR_SWITCH_B2R2_MCDE
- db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
- vin-supply = <&db8500_vape_reg>;
- };
-
- // DB8500_REGULATOR_SWITCH_ESRAM12
- db8500_esram12_reg: db8500_esram12 {
- };
-
- // DB8500_REGULATOR_SWITCH_ESRAM12RET
- db8500_esram12_ret_reg: db8500_esram12_ret {
- };
-
- // DB8500_REGULATOR_SWITCH_ESRAM34
- db8500_esram34_reg: db8500_esram34 {
- };
-
- // DB8500_REGULATOR_SWITCH_ESRAM34RET
- db8500_esram34_ret_reg: db8500_esram34_ret {
- };
};
};
@@ -1111,8 +1031,6 @@ msp0: msp@80123000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80123000 0x1000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- /* TODO: delete and replace with power-domain handling */
- v-ape-supply = <&db8500_vape_reg>;
power-domains = <&pm_domains DOMAIN_VAPE>;
dmas = <&dma 31 0 0x12>, /* Logical - DevToMem - HighPrio */
@@ -1130,8 +1048,6 @@ msp1: msp@80124000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80124000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- /* TODO: delete and replace with power-domain handling */
- v-ape-supply = <&db8500_vape_reg>;
power-domains = <&pm_domains DOMAIN_VAPE>;
/* This DMA channel only exist on DB8500 v1 */
@@ -1150,8 +1066,6 @@ msp2: msp@80117000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80117000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- /* TODO: delete and replace with power-domain handling */
- v-ape-supply = <&db8500_vape_reg>;
power-domains = <&pm_domains DOMAIN_VAPE>;
dmas = <&dma 14 0 0x12>, /* Logical - DevToMem - HighPrio */
@@ -1170,8 +1084,6 @@ msp3: msp@80125000 {
compatible = "stericsson,ux500-msp-i2s";
reg = <0x80125000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
- /* TODO: delete and replace with power-domain handling */
- v-ape-supply = <&db8500_vape_reg>;
power-domains = <&pm_domains DOMAIN_VAPE>;
/* This DMA channel only exist on DB8500 v2 */
@@ -1215,8 +1127,6 @@ gpu@a0300000 {
clocks = <&prcmu_clk PRCMU_ACLK>, <&prcmu_clk PRCMU_SGACLK>;
clock-names = "bus", "core";
power-domains = <&pm_domains DOMAIN_SGA>;
- /* TODO: delete and replace with power-domain handling */
- mali-supply = <&db8500_sga_reg>;
};
mcde@a0350000 {
@@ -1224,8 +1134,6 @@ mcde@a0350000 {
reg = <0xa0350000 0x1000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pm_domains DOMAIN_B2R2_MCDE>;
- /* TODO: delete and replace with power-domain handling */
- epod-supply = <&db8500_b2r2_mcde_reg>;
clocks = <&prcmu_clk PRCMU_MCDECLK>, /* Main MCDE clock */
<&prcmu_clk PRCMU_LCDCLK>, /* LCD clock */
<&prcmu_clk PRCMU_PLLDSI>; /* HDMI clock */
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v7 2/4] PCI: Use standard wait times for PCIe link monitoring
From: Aksh Garg @ 2026-06-18 5:19 UTC (permalink / raw)
To: Thierry Reding, Bjorn Helgaas, Lorenzo Pieralisi,
Krzysztof Wilczyński, Manivannan Sadhasivam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Thierry Reding,
Jonathan Hunter, Karthikeyan Mitran, Hou Zhiqiang,
Thomas Petazzoni, Pali Rohár, Michal Simek, Kevin Xie
Cc: linux-pci, devicetree, linux-tegra, linux-kernel,
linux-arm-kernel, Thierry Reding
In-Reply-To: <20260617-tegra264-pcie-v7-2-eae7ae964629@nvidia.com>
On 17/06/26 21:31, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Instead of defining the wait values for each driver, use common values
> defined in the core pci.h header file. Note that while most drivers use
> the usleep_range(), it looks like these were mostly cargo culted and
> msleep() is a better choice given the fixed delay that the specification
> calls for. Convert all drivers to msleep() and use the existing
> definition.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
Reviewed-by: Aksh Garg <a-garg7@ti.com>
> Changes in v7:
> - rebase on top of next-20260615 (resolve pci-aardvark.c conflict)
>
> Changes in v6:
> - convert all drivers to use msleep() (Lukas Wunner)
>
> Changes in v2:
> - fix build for Cadence
> ---
^ permalink raw reply
* Question: pinctrl-backed GPIO set_config and gpio_chip::can_sleep
From: Runyu Xiao @ 2026-06-18 5:36 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski
Cc: Ludovic Desroches, Nicolas Ferre, Alexandre Belloni,
Claudiu Beznea, Antonio Borneo, Maxime Coquelin, Alexandre Torgue,
Chen-Yu Tsai, Jernej Skrabec, Samuel Holland, linux-arm-kernel,
linux-gpio, linux-stm32, linux-sunxi, linux-kernel, jianhao.xu,
runyu.xiao
Hi,
While auditing pinctrl-backed GPIO chips, our static analysis tool
flagged several controllers that expose gpiochip_generic_config() while
still advertising a non-sleeping gpio_chip. We then manually reviewed
the findings against the current tree.
The path we are concerned about is:
gpiod_set_config()
-> gpio_do_set_config()
-> gpiochip_generic_config()
-> pinctrl_gpio_set_config()
-> pinctrl_get_device_gpio_range()
-> mutex_lock(&pctldev->mutex)
If gpiod_cansleep() returns false, a GPIO forwarder or another consumer
can choose an atomic carrier and call gpiod_set_config() while holding a
spinlock. A minimal Lockdep reproducer preserving this carrier reports:
BUG: sleeping function called from invalid context
#0: ... (&global_shared_desc.spinlock) ...
pinctrl_get_device_gpio_range
gpiochip_generic_config
[ BUG: Invalid wait context ]
This looks similar to the Meson fix that marked the GPIO controller as
sleeping when GPIO configuration is routed through the pinctrl-backed
generic config path.
The local draft I am considering marks only these controllers as
sleeping:
pinctrl: at91-pio4: mark the GPIO controller as sleeping
pinctrl: stm32: mark the GPIO controller as sleeping
pinctrl: sunxi: mark the GPIO controller as sleeping
The reason is that all three expose gpiochip_generic_config() and can
therefore reach the pinctrl mutex from the GPIO set_config path, while
their current gpio_chip registration does not set can_sleep.
Two other candidates from the same audit, bcm2835 and keembay, are not
part of this draft. They use gpio_irq_chip::parent_handler, and gpiolib
rejects chained interrupts on a GPIO chip that may sleep. Setting
can_sleep there would therefore break registration instead of fixing the
contract; those cases need a separate irqchip design review.
Does setting gpio_chip::can_sleep for the at91-pio4, stm32 and sunxi
pinctrl-backed GPIO chips sound like the right fix for this set_config
contract mismatch? Or would you prefer this to be handled elsewhere in
gpiolib/pinctrl so that set_config sleepability can be represented more
narrowly than the whole gpio_chip?
Thanks,
Runyu
^ permalink raw reply
* Re: [PATCH 3/9] firmware: imx: ele: Add API functions for OCOTP fuse access
From: Frieder Schrempf @ 2026-06-18 5:52 UTC (permalink / raw)
To: Frank Li
Cc: Pankaj Gupta, Peng Fan (OSS), Frieder Schrempf,
Srinivas Kandagatla, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Frank Li, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Shawn Guo, devicetree, imx, linux-arm-kernel,
linux-kernel
In-Reply-To: <ajL7-OqjYuQHyZOI@SMW015318>
On 17.06.26 21:56, Frank Li wrote:
> On Wed, Jun 17, 2026 at 08:54:35AM +0200, Frieder Schrempf wrote:
>> On 16.06.26 22:05, Frank Li wrote:
>>> On Tue, Jun 16, 2026 at 07:59:54PM +0200, Frieder Schrempf wrote:
>>>> On 16.06.26 17:36, Frank Li wrote:
>>>>> On Tue, Jun 16, 2026 at 01:52:18PM +0200, Frieder Schrempf wrote:
>>>>>> From: Frieder Schrempf <frieder.schrempf@kontron.de>
>>>>>>
>>>>>> The ELE S400 API provides read and write access to the OCOTP fuse
>>>>>> registers. This adds the necessary API functions imx_se_read_fuse()
>>>>>> and imx_se_write_fuse() to be used by other drivers such as the
>>>>>> OCOTP S400 NVMEM driver.
>>>>>>
>>>>>> This is ported from the downstream vendor kernel.
>>>>>>
>>>>>> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
>>>>>> ---
>>>>>> drivers/firmware/imx/ele_base_msg.c | 122 ++++++++++++++++++++++++++++++++++++
>>>>>> drivers/firmware/imx/ele_base_msg.h | 6 ++
>>>>>> include/linux/firmware/imx/se_api.h | 3 +
>>>>>> 3 files changed, 131 insertions(+)
>>>>>>
>>>>> ...
>>>>>> +++ b/include/linux/firmware/imx/se_api.h
>>>>>> @@ -11,4 +11,7 @@
>>>>>> #define SOC_ID_OF_IMX8ULP 0x084d
>>>>>> #define SOC_ID_OF_IMX93 0x9300
>>>>>>
>>>>>> +int imx_se_read_fuse(void *se_if_data, uint16_t fuse_id, u32 *value);
>>>>>> +int imx_se_write_fuse(void *se_if_data, uint16_t fuse_id, u32 value);
>>>>>> +
>>>>>
>>>>> This API should implement in fuse drivers. Other consume should use standard
>>>>> fuse API to get value. If put here, it may bypass fuse driver.
>>>>
>>>> The reason this is here, is the downstream implementation in linux-imx
>>>> and the current code organization.
>>>
>>> Downstream may not good enough, sometime, it is quick solution.
>>
>> Ok, but the code structure and API design has been upstreamed like this
>> and the refactoring could have been done before, if downstream is known
>> to not be well organized.
>>
>>>
>>>> I thought there is some good reason
>>>> to have shared functions and it looks like Pankaj structured it like
>>>> this so all API functions live in ele_base_msg.c and the internal
>>>> structs and defines in ele_base_msg.h and se_ctrl.h are not exposed to
>>>> other drivers.
>>>>
>>>> If I would move this into imx-ocotp-ele.c, then I would also need to
>>>> change how the code is organized and make the internal se_api functions
>>>> exposed to other drivers. I don't know if that is really a good idea.
>>>>
>>>> I get your point but it looks like this contradicts the intention of
>>>> having a clean API in the firmware driver.
>>>
>>> You can refer imx-ocotp-scu.c, structure should be similar, only difference
>>> is that lower transfer APIs.
>> Ok, this would mean that I expose the generic SE functions and structs
>> required for fuse handling. In practice, I would remove
>> imx_se_read_fuse() and imx_se_write_fuse() from se_api.h and instead add
>> the following:
>>
>> struct se_msg_hdr { ... };
>> struct se_api_msg { ... };
>> struct se_if_priv;
>> se_fill_cmd_msg_hdr( ... );
>> se_msg_send_rcv( ... );
>> se_val_rsp_hdr_n_status( ... );
>>
>> Then I would export the functions in ele_common.c and put the fuse
>> read/write functions in the NVMEM driver.
>>
>> Is that what you want me to do?
>
> Yes, Idealy, it should be children device under ele, ELE like a bus, which
> previous lower level data transfer, ocotp should be base on top then it.
> like spi/i2c, which provide low level data transfer.
Ok, please also see the discussion with Krzysztof on the bindings patch.
The problem is that this driver uses both, MMIO and firmware interface.
Therefore putting a child node in the ELE device node is probably not
correct, either!?
In general I think it's a good idea as the fuses actually live inside
the ELE block so this would properly describe the hardware, but again
this would create a hard dependency on the closed source ELE firmware
which I don't like that much.
^ permalink raw reply
* [PATCH net 0/2] airoha: fixes for sched HTB offload support
From: Lorenzo Bianconi @ 2026-06-18 6:00 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: Wayen Yan, linux-arm-kernel, linux-mediatek, netdev,
Lorenzo Bianconi
---
Lorenzo Bianconi (2):
net: airoha: Fix off-by-one in airoha_tc_remove_htb_queue()
net: airoha: fix netif_set_real_num_tx_queues for sparse QoS channels
drivers/net/ethernet/airoha/airoha_eth.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
---
base-commit: 7d8297e26b4e20b5d1c3c3fe51fe81a1c7fbc823
change-id: 20260618-airoha-qos-fixes-b6460b085680
Best regards,
--
Lorenzo Bianconi <lorenzo@kernel.org>
^ permalink raw reply
* [PATCH net 1/2] net: airoha: Fix off-by-one in airoha_tc_remove_htb_queue()
From: Lorenzo Bianconi @ 2026-06-18 6:00 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: Wayen Yan, linux-arm-kernel, linux-mediatek, netdev,
Lorenzo Bianconi
In-Reply-To: <20260618-airoha-qos-fixes-v1-0-37192652157f@kernel.org>
airoha_tc_htb_alloc_leaf_queue() computes the HTB QoS channel index
as opt->classid % AIROHA_NUM_QOS_CHANNELS and stores it in qos_sq_bmap.
However, airoha_tc_remove_htb_queue() clears the HTB configuration
using queue + 1 as the channel index, causing an off-by-one error.
Use queue directly as the QoS channel index to match the allocation
logic.
Fixes: ef1ca9271313b ("net: airoha: Add sched HTB offload support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
drivers/net/ethernet/airoha/airoha_eth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index 64dde6464f3f..aa98d1823ab6 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -3006,7 +3006,7 @@ static void airoha_tc_remove_htb_queue(struct net_device *netdev, int queue)
struct airoha_qdma *qdma = dev->qdma;
netif_set_real_num_tx_queues(netdev, netdev->real_num_tx_queues - 1);
- airoha_qdma_set_tx_rate_limit(netdev, queue + 1, 0, 0);
+ airoha_qdma_set_tx_rate_limit(netdev, queue, 0, 0);
clear_bit(queue, qdma->qos_channel_map);
clear_bit(queue, dev->qos_sq_bmap);
--
2.54.0
^ permalink raw reply related
* [PATCH net 2/2] net: airoha: fix netif_set_real_num_tx_queues for sparse QoS channels
From: Lorenzo Bianconi @ 2026-06-18 6:00 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: Wayen Yan, linux-arm-kernel, linux-mediatek, netdev,
Lorenzo Bianconi
In-Reply-To: <20260618-airoha-qos-fixes-v1-0-37192652157f@kernel.org>
airoha_tc_htb_alloc_leaf_queue() assigns queue IDs based on the channel
index (opt->qid = AIROHA_NUM_TX_RING + channel), but updates
real_num_tx_queues with a simple increment (num_tx_queues + 1). When QoS
channels are allocated sparsely (e.g., channels 0 and 3 without 1 and
2), the returned qid can exceed real_num_tx_queues, causing out-of-bounds
accesses in the networking stack.
For example, allocating channel 0 then channel 3 results in
real_num_tx_queues = 34 but qid = 35, which is out of range [0, 34).
Fix this by computing real_num_tx_queues based on the highest active
channel index rather than using a simple counter, in both the allocation
and deletion paths.
Fixes: ef1ca9271313b ("net: airoha: Add sched HTB offload support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
drivers/net/ethernet/airoha/airoha_eth.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index aa98d1823ab6..e2652cff67c0 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -2789,7 +2789,7 @@ static int airoha_tc_htb_alloc_leaf_queue(struct net_device *netdev,
struct tc_htb_qopt_offload *opt)
{
u32 channel = TC_H_MIN(opt->classid) % AIROHA_NUM_QOS_CHANNELS;
- int err, num_tx_queues = netdev->real_num_tx_queues;
+ int err, num_tx_queues = AIROHA_NUM_TX_RING + channel + 1;
struct airoha_gdm_dev *dev = netdev_priv(netdev);
struct airoha_qdma *qdma = dev->qdma;
@@ -2806,7 +2806,10 @@ static int airoha_tc_htb_alloc_leaf_queue(struct net_device *netdev,
if (err)
goto error;
- err = netif_set_real_num_tx_queues(netdev, num_tx_queues + 1);
+ if (num_tx_queues <= netdev->real_num_tx_queues)
+ goto set_qos_sq_bmap;
+
+ err = netif_set_real_num_tx_queues(netdev, num_tx_queues);
if (err) {
airoha_qdma_set_tx_rate_limit(netdev, channel, 0,
opt->quantum);
@@ -2815,6 +2818,7 @@ static int airoha_tc_htb_alloc_leaf_queue(struct net_device *netdev,
goto error;
}
+set_qos_sq_bmap:
set_bit(channel, dev->qos_sq_bmap);
opt->qid = AIROHA_NUM_TX_RING + channel;
@@ -3003,13 +3007,18 @@ static int airoha_dev_setup_tc_block(struct net_device *dev,
static void airoha_tc_remove_htb_queue(struct net_device *netdev, int queue)
{
struct airoha_gdm_dev *dev = netdev_priv(netdev);
+ int num_tx_queues = AIROHA_NUM_TX_RING;
struct airoha_qdma *qdma = dev->qdma;
- netif_set_real_num_tx_queues(netdev, netdev->real_num_tx_queues - 1);
airoha_qdma_set_tx_rate_limit(netdev, queue, 0, 0);
clear_bit(queue, qdma->qos_channel_map);
clear_bit(queue, dev->qos_sq_bmap);
+
+ if (!bitmap_empty(dev->qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS))
+ num_tx_queues += find_last_bit(dev->qos_sq_bmap,
+ AIROHA_NUM_QOS_CHANNELS) + 1;
+ netif_set_real_num_tx_queues(netdev, num_tx_queues);
}
static int airoha_tc_htb_delete_leaf_queue(struct net_device *netdev,
--
2.54.0
^ permalink raw reply related
* Re: [PATCH v2] arm64: tlbflush: Don't broadcast if mm was only active on local cpu
From: Linu Cherian @ 2026-06-18 6:01 UTC (permalink / raw)
To: Will Deacon
Cc: Ryan Roberts, Catalin Marinas, Kevin Brodsky, Anshuman Khandual,
Yang Shi, Mark Rutland, Huang Ying, linux-arm-kernel,
linux-kernel, shameerali.kolothum.thodi
In-Reply-To: <ajAPnahwTe1OHQDp@willie-the-truck>
Hi,
On Mon, Jun 15, 2026 at 03:43:41PM +0100, Will Deacon wrote:
> On Mon, Jun 15, 2026 at 12:21:19PM +0100, Ryan Roberts wrote:
> > On 14/06/2026 12:04, Will Deacon wrote:
> > > On Sat, May 23, 2026 at 07:17:10PM +0530, Linu Cherian wrote:
> > >> From: Ryan Roberts <ryan.roberts@arm.com>
> > >>
> > >> Testing with 7.1-rc4 :
> > >> +-----------------------+---------------------------------------------------+-------------+
> > >> | Benchmark | Result Class | Improvement|
> > >> +=======================+===================================================+=============+
> > >> | perf/syscall | fork (ops/sec) | (I) 3.25% |
> > >> +-----------------------+---------------------------------------------------+-------------+
> > >> | pts/memtier-benchmark | Protocol: Redis Clients: 100 Ratio: 1:5 (Ops/sec) | (I) 2.70% |
> > >> | | Protocol: Redis Clients: 100 Ratio: 5:1 (Ops/sec) | (I) 2.13% |
> > >> +-----------------------+---------------------------------------------------+-------------+
> > >
> > > I think we need a much more comprehensive set of benchmarks before we can
> > > begin to consider a change like this.
> >
> > I believe that Linu ran a wider set of benchmarks and didn't find any
> > regressions. These are just the ones that show improvement (Linu, please correct
> > me and/or provide details).
>
> I think it's important to show the ones that suffer as well... and also
> look at different configurations (e.g. preemptible settings) and different
> environments (e.g. native vs in a VM).
>
> > Additionally Huang Ying did some testing against the RFC and reported 4.5%
> > improvement with Redis:
> >
> > https://lore.kernel.org/linux-arm-kernel/87segumv6w.fsf@DESKTOP-5N7EMDA
>
> To be clear: I'm not disputing that some benchmarks appear to show a small
> boost from this series. I'm just worried that's not the whole story.
>
> > >> arch/arm64/include/asm/mmu.h | 12 +++
> > >> arch/arm64/include/asm/mmu_context.h | 2 +
> > >> arch/arm64/include/asm/tlbflush.h | 127 +++++++++++++++++++++------
> > >> arch/arm64/mm/context.c | 30 ++++++-
> > >> 4 files changed, 141 insertions(+), 30 deletions(-)
> > >
> > > Doesn't this break BTM/SVM with the SMMU? I think that's a non-starter
> > > even if you can provide some more compelling numbers.
> >
> > AIUI, we don't support BTM upstream - the SMMU uses private ASIDs and implements
> > MMU notifiers to forward the TLBIs via its command queue interface.
> >
> > I was also under the impression that supporting BTM upsteam was not desired;
> > Please correct me if that's not accurate or if you're aware of plans to add
> > support. I've been (coincidentlly) looking at some other stuff that could
> > benefit from BTM but had concluded it wouldn't be an acceptable approach upstream.
> >
> > If we did ever want to add SMMU BTM support though, I think it would be simple
> > enough to add an interface to allow the SMMU to disable the optimization (i.e.
> > force active_cpu to ACTIVE_CPU_MULTIPLE)?
>
> We used to have some initial BTM support in the SMMUv3 driver but the
> main problem was finding an upstream driver/soc that can use it properly
> and so it was ultimately removed in d38c28dbefee ("iommu/arm-smmu-v3: Put
> the SVA mmu notifier in the smmu_domain") because it was getting in the
> way of wider driver rework and we couldn't test it.
>
> However, there *is* work to re-enable it on top of that rework (and other
> changes):
>
> https://lore.kernel.org/linux-iommu/20250319173202.78988-6-shameerali.kolothum.thodi@huawei.com/
>
> although I don't know if Shameer intends to repost that...
>
> > >> +static inline bool flush_tlb_user_pre(struct mm_struct *mm, tlbf_t flags)
> > >> +{
> > >> + unsigned int self, active;
> > >> + bool local;
> > >> +
> > >> + migrate_disable();
> > >> +
> > >> + if (flags & TLBF_NOBROADCAST) {
> > >> + dsb(nshst);
> > >> + return true;
> > >> + }
> > >
> > > Why does the NOBROADCAST case need migration disabled? It didn't before...
> >
> > The existing semantic for TLBF_BOBROADCAST is that it emits a local TLBI on
> > whatever CPU we happen to be executing on. It's used for lazily fixing up
> > spurious faults (i.e. hitting RO TLB entries when the PTE has been relaxed to
> > RW). So it's still functionally correct if the thread migrates CPU between
> > taking the fault and issuing the local TLBI - in the worst case it just leads to
> > another spurious fault.
> >
> > For this new case, we need to ensure we don't get migrated between reading
> > active_cpu and issuing the local TLBI, otherwise we would only issue a local
> > TLBI when a broadcast was required.
>
> Sounds like those two users probably need separating out, then?
>
> > >> + self = smp_processor_id();
> > >> +
> > >> + /*
> > >> + * The load of mm->context.active_cpu must not be reordered before the
> > >> + * store to the pgtable that necessitated this flush. This ensures that
> > >> + * if the value read is our cpu id, then no other cpu can have seen the
> > >> + * old pgtable value and therefore does not need this old value to be
> > >> + * flushed from its tlb. But we don't want to upgrade the dsb(ishst),
> > >> + * needed to make the pgtable updates visible to the walker, to a
> > >> + * dsb(ish) by default. So speculatively load without a barrier and if
> > >> + * it indicates our cpu id, then upgrade the barrier and re-load.
> > >> + */
> > >> + active = READ_ONCE(mm->context.active_cpu);
> > >> + if (active == self) {
> > >> + dsb(ish);
> > >> + active = READ_ONCE(mm->context.active_cpu);
> > >> + } else {
> > >> + dsb(ishst);
> > >> + }
> > >
> > > Why can't you just do:
> > >
> > > dsb(ishst);
> > > active = READ_ONCE(mm->context.active_cpu);
> > >
> > > ?
> >
> > Prior to this optimization, we always issued a dsb(ishst) here. Catalin
> > suggested the same simplification against the RFC. I believe Linu tried it but
> > saw regressions; Hopefully Linu can provide the details.
>
> I don't follow...
>
> The old code always did dsb(ishst). The proposed code here does either
> dsb(ish) or dsb(ishst). How can that possibly be faster?
>
> > >> + local = active == self;
> > >> + if (!local)
> > >> + migrate_enable();
> > >> +
> > >> + return local;
> > >> +}
> > >> +
> > >> +static inline void flush_tlb_user_post(bool local)
> > >> +{
> > >> + if (local)
> > >> + migrate_enable();
> > >> +}
> > >
> > > I was under the impression that disabling/enabling migration was an
> > > expensive thing to do, so I'd really want to see some more numbers to
> > > justify this (including from inside a VM) and allow us to consider the
> > > trade-offs properly. It's also not at all clear to me that it's safe
> > > from such a low-level TLB invalidation helper.
> >
> > I had assumed it wasn't very expensive, but perhaps I'm wrong. I know
> > preempt_enable() can be expensive because it has to test to see if it needs to
> > reschedule. But I assumed for disabling/enabling migration, it would just be a
> > counter and the scheduler would check that it's zero before considing moving the
> > task to another run queue. (But I have practically zero understanding of the
> > scheduler so I'll assume I'm wrong...).
>
> I'm not an expert here either, but reading the code shows that it has
> a preempt guard along with additional book-keeping.
>
> > Instead of disabling migration, perhaps we could re-check active_cpu after
> > issuing the local tlbi - if it's now reporting "multiple" we must have been
> > migrated and we need to upgrade to a braodcast TLBI?
>
> That's an interesting idea, although I suppose it means the
> post-invalidation DSB needs to be ISH for the local case to check the
> active_cpu safely?
I might be wrong about this, so please correct me if i am missing
something here.
So we have two possibilities here,
Case 1: Task not migrated until active_cpu is loaded
In this case, the existing dsb(nsh) would suffice to give necessary
ordering between tlbi and active_cpu_load.
Case 2: Task migrated(scheduled to run on another cpu) before active_cpu is loaded
In this case, active_cpu gets upgraded to ACTIVE_CPU_MULTIPLE as part of context switch in
check_and_switch_context and active_cpu gets loaded correctly.
Also we would end up repeating the tlbi op in broadcast mode for this case.
But then, we will have a problem with the TLBF_NOSYNC | TLBF_NOBRODCAST case, as we need
to introduce a dsb(nsh) unconditionally to ensure ordering between the tlbi and
active_cpu load.
Thanks,
Linu Cherian.
^ permalink raw reply
* [PATCH net] net: airoha: fix BQL underflow and UAF in shared QDMA TX ring
From: Lorenzo Bianconi @ 2026-06-18 6:13 UTC (permalink / raw)
To: Andrew Lunn, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: Wayen Yan, linux-arm-kernel, linux-mediatek, netdev,
Lorenzo Bianconi
When multiple netdevs share a QDMA TX ring and one device is stopped,
netdev_tx_reset_subqueue() zeroes that device's BQL counters while its
pending skbs remain in the shared HW TX ring. When NAPI later completes
those skbs via netdev_tx_completed_queue(), the already-zeroed
dql->num_queued counter underflows.
Moreover, in the airoha_remove() path, netdevs are unregistered
sequentially while skbs from previously unregistered netdevs may still
reference freed net_device memory via skb->dev, causing a use-after-free
during BQL accounting.
Fix both issues:
- Remove netdev_tx_reset_subqueue() from airoha_dev_stop() so pending
skbs are completed naturally by NAPI with proper BQL accounting.
- Add netdev_tx_completed_queue() in airoha_qdma_cleanup_tx_queue()
to properly account for skbs freed during queue teardown.
- Introduce airoha_qdma_tx_disable() to stop TX on all registered
netdevs for a given QDMA instance under RTNL lock.
- Move DMA engine start/stop into probe/remove and
airoha_qdma_cleanup(), ensuring TX queues are cleaned up while all
netdevs are still registered and skb->dev is valid.
Fixes: 6df0488dc9dd ("net: airoha: fix BQL accounting in airoha_qdma_cleanup_tx_queue()")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
---
drivers/net/ethernet/airoha/airoha_eth.c | 95 ++++++++++++++++++++++++--------
1 file changed, 72 insertions(+), 23 deletions(-)
diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c
index 64dde6464f3f..4d6a061cd779 100644
--- a/drivers/net/ethernet/airoha/airoha_eth.c
+++ b/drivers/net/ethernet/airoha/airoha_eth.c
@@ -1004,6 +1004,7 @@ static int airoha_qdma_tx_napi_poll(struct napi_struct *napi, int budget)
e = &q->entry[index];
skb = e->skb;
+ e->skb = NULL;
dma_unmap_single(eth->dev, e->dma_addr, e->dma_len,
DMA_TO_DEVICE);
@@ -1147,6 +1148,42 @@ static int airoha_qdma_init_tx(struct airoha_qdma *qdma)
return 0;
}
+static void airoha_qdma_tx_disable(struct airoha_qdma *qdma)
+{
+ struct airoha_eth *eth = qdma->eth;
+ int i;
+
+ /* Protect netdev->reg_state and netif_tx_disable() calls. */
+ rtnl_lock();
+
+ for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
+ struct airoha_gdm_port *port = eth->ports[i];
+ int j;
+
+ if (!port)
+ continue;
+
+ for (j = 0; j < ARRAY_SIZE(port->devs); j++) {
+ struct airoha_gdm_dev *dev = port->devs[j];
+ struct net_device *netdev;
+
+ if (!dev)
+ continue;
+
+ if (dev->qdma != qdma)
+ continue;
+
+ netdev = netdev_from_priv(dev);
+ if (netdev->reg_state != NETREG_REGISTERED)
+ continue;
+
+ netif_tx_disable(netdev);
+ }
+ }
+
+ rtnl_unlock();
+}
+
static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)
{
struct airoha_qdma *qdma = q->qdma;
@@ -1158,13 +1195,20 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)
for (i = 0; i < q->ndesc; i++) {
struct airoha_queue_entry *e = &q->entry[i];
struct airoha_qdma_desc *desc = &q->desc[i];
+ struct sk_buff *skb = e->skb;
if (!e->dma_addr)
continue;
dma_unmap_single(eth->dev, e->dma_addr, e->dma_len,
DMA_TO_DEVICE);
- dev_kfree_skb_any(e->skb);
+ if (skb) {
+ struct netdev_queue *txq;
+
+ txq = skb_get_tx_queue(skb->dev, skb);
+ netdev_tx_completed_queue(txq, 1, skb->len);
+ dev_kfree_skb_any(skb);
+ }
e->dma_addr = 0;
e->skb = NULL;
list_add_tail(&e->list, &q->tx_list);
@@ -1527,6 +1571,23 @@ static void airoha_qdma_cleanup(struct airoha_qdma *qdma)
{
int i;
+ if (test_bit(DEV_STATE_INITIALIZED, &qdma->eth->state)) {
+ u32 status;
+
+ airoha_qdma_tx_disable(qdma);
+
+ airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,
+ GLOBAL_CFG_TX_DMA_EN_MASK |
+ GLOBAL_CFG_RX_DMA_EN_MASK);
+ if (read_poll_timeout(airoha_qdma_rr, status,
+ !(status & (GLOBAL_CFG_TX_DMA_BUSY_MASK |
+ GLOBAL_CFG_RX_DMA_BUSY_MASK)),
+ USEC_PER_MSEC, 50 * USEC_PER_MSEC, true,
+ qdma, REG_QDMA_GLOBAL_CFG))
+ dev_warn(qdma->eth->dev,
+ "QDMA DMA engine busy timeout\n");
+ }
+
for (i = 0; i < ARRAY_SIZE(qdma->q_rx); i++) {
if (!qdma->q_rx[i].ndesc)
continue;
@@ -1837,9 +1898,6 @@ static int airoha_dev_open(struct net_device *netdev)
}
port->users++;
- airoha_qdma_set(qdma, REG_QDMA_GLOBAL_CFG,
- GLOBAL_CFG_TX_DMA_EN_MASK |
- GLOBAL_CFG_RX_DMA_EN_MASK);
qdma->users++;
if (!airoha_is_lan_gdm_dev(dev) &&
@@ -1880,12 +1938,9 @@ static int airoha_dev_stop(struct net_device *netdev)
struct airoha_gdm_dev *dev = netdev_priv(netdev);
struct airoha_gdm_port *port = dev->port;
struct airoha_qdma *qdma = dev->qdma;
- int i;
netif_tx_disable(netdev);
airoha_set_vip_for_gdm_port(dev, false);
- for (i = 0; i < netdev->num_tx_queues; i++)
- netdev_tx_reset_subqueue(netdev, i);
if (--port->users)
airoha_set_port_mtu(dev->eth, port);
@@ -1893,19 +1948,7 @@ static int airoha_dev_stop(struct net_device *netdev)
airoha_set_gdm_port_fwd_cfg(qdma->eth,
REG_GDM_FWD_CFG(port->id),
FE_PSE_PORT_DROP);
-
- if (!--qdma->users) {
- airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,
- GLOBAL_CFG_TX_DMA_EN_MASK |
- GLOBAL_CFG_RX_DMA_EN_MASK);
-
- for (i = 0; i < ARRAY_SIZE(qdma->q_tx); i++) {
- if (!qdma->q_tx[i].ndesc)
- continue;
-
- airoha_qdma_cleanup_tx_queue(&qdma->q_tx[i]);
- }
- }
+ qdma->users--;
return 0;
}
@@ -3413,8 +3456,12 @@ static int airoha_probe(struct platform_device *pdev)
if (err)
goto error_netdev_free;
- for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) {
airoha_qdma_start_napi(ð->qdma[i]);
+ airoha_qdma_set(ð->qdma[i], REG_QDMA_GLOBAL_CFG,
+ GLOBAL_CFG_TX_DMA_EN_MASK |
+ GLOBAL_CFG_RX_DMA_EN_MASK);
+ }
for_each_child_of_node(pdev->dev.of_node, np) {
if (!of_device_is_compatible(np, "airoha,eth-mac"))
@@ -3440,6 +3487,8 @@ static int airoha_probe(struct platform_device *pdev)
for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
airoha_qdma_stop_napi(ð->qdma[i]);
+ airoha_hw_cleanup(eth);
+
for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
struct airoha_gdm_port *port = eth->ports[i];
int j;
@@ -3461,7 +3510,6 @@ static int airoha_probe(struct platform_device *pdev)
}
airoha_metadata_dst_free(port);
}
- airoha_hw_cleanup(eth);
error_netdev_free:
free_netdev(eth->napi_dev);
platform_set_drvdata(pdev, NULL);
@@ -3477,6 +3525,8 @@ static void airoha_remove(struct platform_device *pdev)
for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
airoha_qdma_stop_napi(ð->qdma[i]);
+ airoha_hw_cleanup(eth);
+
for (i = 0; i < ARRAY_SIZE(eth->ports); i++) {
struct airoha_gdm_port *port = eth->ports[i];
int j;
@@ -3497,7 +3547,6 @@ static void airoha_remove(struct platform_device *pdev)
}
airoha_metadata_dst_free(port);
}
- airoha_hw_cleanup(eth);
free_netdev(eth->napi_dev);
platform_set_drvdata(pdev, NULL);
---
base-commit: 7d8297e26b4e20b5d1c3c3fe51fe81a1c7fbc823
change-id: 20260618-airoha-bql-fixes-f57b2d108573
Best regards,
--
Lorenzo Bianconi <lorenzo@kernel.org>
^ permalink raw reply related
* [PATCH net] net: stmmac: dwmac-spacemit: Fix wrong ctrl register definition
From: Inochi Amaoto @ 2026-06-18 6:41 UTC (permalink / raw)
To: Inochi Amaoto, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Maxime Coquelin, Alexandre Torgue,
Yixun Lan, Russell King (Oracle)
Cc: netdev, linux-stm32, linux-arm-kernel, linux-riscv, spacemit,
linux-kernel, Yixun Lan, Longbin Li
There register layout of the phy ctrl register has something wrong,
fix it to match the right layout
Fixes: 30f0ba420ed3 ("net: stmmac: Add glue layer for Spacemit K3 SoC")
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-spacemit.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
index 223754cc5c79..6feffaa3ef3a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
@@ -18,10 +18,12 @@
#include "stmmac_platform.h"
/* ctrl register bits */
-#define CTRL_PHY_INTF_RGMII BIT(3)
-#define CTRL_PHY_INTF_MII BIT(4)
-#define CTRL_WAKE_IRQ_EN BIT(9)
-#define CTRL_PHY_IRQ_EN BIT(12)
+#define CTRL_PHY_INTF_MODE GENMASK(4, 3)
+#define CTRL_PHY_INTF_RMII FIELD_PREP(CTRL_PHY_INTF_MODE, 0)
+#define CTRL_PHY_INTF_RGMII FIELD_PREP(CTRL_PHY_INTF_MODE, 1)
+#define CTRL_PHY_INTF_MII FIELD_PREP(CTRL_PHY_INTF_MODE, 3)
+#define CTRL_PHY_IRQ_EN BIT(9)
+#define CTRL_WAKE_IRQ_EN BIT(12)
/* dline register bits */
#define RGMII_RX_DLINE_EN BIT(0)
@@ -118,7 +120,7 @@ static void spacemit_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
{
- unsigned int mask = CTRL_PHY_INTF_MII | CTRL_PHY_INTF_RGMII;
+ unsigned int mask = CTRL_PHY_INTF_MODE;
struct spacmit_dwmac *dwmac = bsp_priv;
unsigned int val = 0;
@@ -128,6 +130,7 @@ static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
break;
case PHY_INTF_SEL_RMII:
+ val = CTRL_PHY_INTF_RMII;
break;
case PHY_INTF_SEL_RGMII:
--
2.54.0
^ permalink raw reply related
* [PATCH] dt-bindings: spi: st,stm32-qspi: Add power-domains property
From: Patrice Chotard @ 2026-06-18 6:46 UTC (permalink / raw)
To: Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Maxime Coquelin, Alexandre Torgue, Christophe Kerello
Cc: linux-spi, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Patrice Chotard
STM32 QSPI may be in a power domain. Allow a single 'power-domains'
entry for STM32 QSPI.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
---
Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
index 3f1a27efff80..ee57739b73b8 100644
--- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
@@ -50,6 +50,9 @@ properties:
minItems: 1
maxItems: 2
+ power-domains:
+ maxItems: 1
+
required:
- compatible
- reg
---
base-commit: 8cd9520d35a6c38db6567e97dd93b1f11f185dc6
change-id: 20260618-add_power_domain_for_qpsi-898d2ebf20fa
Best regards,
--
Patrice Chotard <patrice.chotard@foss.st.com>
^ permalink raw reply related
* Re: [PATCH] memory: stm32_omm: initialize ret in stm32_omm_set_amcr
From: Patrice CHOTARD @ 2026-06-18 6:51 UTC (permalink / raw)
To: Ruoyu Wang, Krzysztof Kozlowski, Maxime Coquelin,
Alexandre Torgue, linux-kernel, linux-stm32, linux-arm-kernel
In-Reply-To: <20260617182202.961843-1-ruoyuw560@gmail.com>
On 6/17/26 20:22, Ruoyu Wang wrote:
> stm32_omm_set_amcr() returns ret after checking whether the AMCR value
> matches the device tree description. On the normal matching path ret is
> not otherwise assigned, so initialize it to 0 before the checks.
>
> Signed-off-by: Ruoyu Wang <ruoyuw560@gmail.com>
> ---
> drivers/memory/stm32_omm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/memory/stm32_omm.c b/drivers/memory/stm32_omm.c
> index 5d06623f3f689..2a1af229d2444 100644
> --- a/drivers/memory/stm32_omm.c
> +++ b/drivers/memory/stm32_omm.c
> @@ -47,7 +47,7 @@ static int stm32_omm_set_amcr(struct device *dev, bool set)
> struct device_node *node;
> struct resource res, res1;
> unsigned int syscon_args[2];
> - int ret, idx;
> + int ret = 0, idx;
> unsigned int i, amcr, read_amcr;
>
> for (i = 0; i < omm->nb_child; i++) {
Hi Ruoyu
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Thanks
Patrice
^ permalink raw reply
* Re: [PATCH net] net: stmmac: dwmac-spacemit: Fix wrong ctrl register definition
From: Maxime Chevallier @ 2026-06-18 7:03 UTC (permalink / raw)
To: Inochi Amaoto, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Maxime Coquelin, Alexandre Torgue,
Yixun Lan, Russell King (Oracle)
Cc: netdev, linux-stm32, linux-arm-kernel, linux-riscv, spacemit,
linux-kernel, Yixun Lan, Longbin Li
In-Reply-To: <20260618064143.1102179-1-inochiama@gmail.com>
Hi Inochi,
On 6/18/26 08:41, Inochi Amaoto wrote:
> There register layout of the phy ctrl register has something wrong,
> fix it to match the right layout
>
> Fixes: 30f0ba420ed3 ("net: stmmac: Add glue layer for Spacemit K3 SoC")
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-spacemit.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> index 223754cc5c79..6feffaa3ef3a 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
> @@ -18,10 +18,12 @@
> #include "stmmac_platform.h"
>
> /* ctrl register bits */
> -#define CTRL_PHY_INTF_RGMII BIT(3)
> -#define CTRL_PHY_INTF_MII BIT(4)
> -#define CTRL_WAKE_IRQ_EN BIT(9)
> -#define CTRL_PHY_IRQ_EN BIT(12)
> +#define CTRL_PHY_INTF_MODE GENMASK(4, 3)
> +#define CTRL_PHY_INTF_RMII FIELD_PREP(CTRL_PHY_INTF_MODE, 0)
> +#define CTRL_PHY_INTF_RGMII FIELD_PREP(CTRL_PHY_INTF_MODE, 1)
> +#define CTRL_PHY_INTF_MII FIELD_PREP(CTRL_PHY_INTF_MODE, 3)
> +#define CTRL_PHY_IRQ_EN BIT(9)
> +#define CTRL_WAKE_IRQ_EN BIT(12)
Looks like you're fixing 2 things there :
-> Wake on Lan probably didn't work before, as the wake irq was apparently wrong
-> The MII mode selection apparently also changes, but maybe you don't have a
MII board around to test this ?
Is it possible you address these issues independently (i.e. split this in 2 patches) ?
That way, if we ever revert one, we won't re-break the other thing that was broken.
Maxime
^ permalink raw reply
* [PATCH V2 0/3] dmaengine: zynqmp_dma: Add per-channel reset support
From: Golla Nagendra @ 2026-06-18 7:10 UTC (permalink / raw)
To: vkoul, Frank.Li, michal.simek, robh, krzk+dt, conor+dt,
nagendra.golla, jay.buddhabhatti, harini.katakam, m.tretter,
radhey.shyam.pandey, abin.joseph, kees, sakari.ailus
Cc: git, dmaengine, devicetree, linux-arm-kernel, linux-kernel
This series adds per-channel reset support to the ZynqMP DMA driver using
the generic reset framework, along with the corresponding dt-bindings
update. It also adds a runtime PM guard in the IRQ handler to handle
spurious interrupts safely.
Patch 1 adds the optional 'resets' property to the ZynqMP DMA dt-binding.
Patch 2 adds reset control handling in the channel probe path to assert
and deassert the channel reset during initialization.
Patch 3 adds a pm_runtime_get_if_active() check in the IRQ handler to
avoid accessing hardware registers when the device is runtime-suspended,
which could occur on spurious interrupts.
Changes in V2:
- Added patch 3 to guard IRQ handler against spurious interrupts
Golla Nagendra (2):
dmaengine: zynqmp_dma: Add per-channel reset support
dmaengine: zynqmp_dma: Guard IRQ handler against spurious interrupts
Jay Buddhabhatti (1):
dt-bindings: dma: xilinx: Add optional resets property for ZDMA
.../bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml | 3 +++
drivers/dma/xilinx/zynqmp_dma.c | 12 ++++++++++++
2 files changed, 15 insertions(+)
--
2.34.1
^ permalink raw reply
* [PATCH V2 1/3] dt-bindings: dma: xilinx: Add optional resets property for ZDMA
From: Golla Nagendra @ 2026-06-18 7:10 UTC (permalink / raw)
To: vkoul, Frank.Li, michal.simek, robh, krzk+dt, conor+dt,
nagendra.golla, jay.buddhabhatti, harini.katakam, m.tretter,
radhey.shyam.pandey, abin.joseph, kees, sakari.ailus
Cc: git, dmaengine, devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20260618071056.2024286-1-nagendra.golla@amd.com>
From: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Newer SoCs such as Versal Gen2 and Versal‑Net expose a reset line
for ZDMA. Older SoCs do not have this provision. Add an optional
resets property to describe this reset.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Co-developed-by: Golla Nagendra <nagendra.golla@amd.com>
Signed-off-by: Golla Nagendra <nagendra.golla@amd.com>
---
.../devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
index 2da86037ad79..dff16763e11b 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
+++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml
@@ -56,6 +56,9 @@ properties:
iommus:
maxItems: 1
+ resets:
+ maxItems: 1
+
power-domains:
maxItems: 1
--
2.34.1
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