* [PATCH v15 04/12] media: mediatek: jpeg: Fix buffer completion on multi-core streaming stop
From: Kyrie Wu @ 2026-07-02 7:26 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Nicolas Dufresne, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Kyrie Wu,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
In-Reply-To: <20260702072614.10373-1-kyrie.wu@mediatek.com>
Enhances the Mediatek JPEG driver's stability and reliability by ensuring
that all queued buffers are processed before stopping the streaming in
multi-core environments. It introduces a call to
`vb2_wait_for_all_buffers()` in the `mtk_jpeg_enc_stop_streaming()` and
`mtk_jpeg_dec_stop_streaming()` functions when the `multi_core` variant
is enabled. This change ensures that no buffers are left unprocessed,
preventing potential data loss or corruption during multi-core flow.
Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware")
Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface")
Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware")
Fixes: 5fb1c2361e56 ("mtk-jpegenc: add jpeg encode worker interface")
Signed-off-by: Kyrie Wu <kyrie.wu@mediatek.com>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 6d6a999a22fc..76a5b49b7f43 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -850,8 +850,12 @@ static struct vb2_v4l2_buffer *mtk_jpeg_buf_remove(struct mtk_jpeg_ctx *ctx,
static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q)
{
struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
+ struct mtk_jpeg_dev *jpeg = ctx->jpeg;
struct vb2_v4l2_buffer *vb;
+ if (jpeg->variant->multi_core)
+ vb2_wait_for_all_buffers(q);
+
while ((vb = mtk_jpeg_buf_remove(ctx, q->type)))
v4l2_m2m_buf_done(vb, VB2_BUF_STATE_ERROR);
}
@@ -859,6 +863,7 @@ static void mtk_jpeg_enc_stop_streaming(struct vb2_queue *q)
static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)
{
struct mtk_jpeg_ctx *ctx = vb2_get_drv_priv(q);
+ struct mtk_jpeg_dev *jpeg = ctx->jpeg;
struct vb2_v4l2_buffer *vb;
/*
@@ -866,6 +871,9 @@ static void mtk_jpeg_dec_stop_streaming(struct vb2_queue *q)
* Before STREAMOFF, we still have to return the old resolution and
* subsampling. Update capture queue when the stream is off.
*/
+ if (jpeg->variant->multi_core)
+ vb2_wait_for_all_buffers(q);
+
if (ctx->state == MTK_JPEG_SOURCE_CHANGE &&
V4L2_TYPE_IS_CAPTURE(q->type)) {
struct mtk_jpeg_src_buf *src_buf;
--
2.45.2
^ permalink raw reply related
* [PATCH v15 06/12] media: mediatek: jpeg: fix decoding buffer number setting timing issue
From: Kyrie Wu @ 2026-07-02 7:26 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Nicolas Dufresne, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Kyrie Wu,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
In-Reply-To: <20260702072614.10373-1-kyrie.wu@mediatek.com>
The src buffer doesn't need set information and dst buf parameters
only need to set when the power set succussed and protect the
setting by spinlock ensuring that any later operations acting
on this buffer reflect accurate state and frame data.
Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface")
Signed-off-by: Kyrie Wu <kyrie.wu@mediatek.com>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 9 +++------
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 +
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 +
3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 89048aba8dca..4dc574e03bd5 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1734,7 +1734,6 @@ static void mtk_jpegdec_worker(struct work_struct *work)
v4l2_m2m_buf_copy_metadata(src_buf, dst_buf);
jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf);
- jpeg_dst_buf = mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf);
if (mtk_jpeg_check_resolution_change(ctx,
&jpeg_src_buf->dec_param)) {
@@ -1743,11 +1742,6 @@ static void mtk_jpegdec_worker(struct work_struct *work)
goto getbuf_fail;
}
- jpeg_src_buf->curr_ctx = ctx;
- jpeg_src_buf->frame_num = ctx->total_frame_num;
- jpeg_dst_buf->curr_ctx = ctx;
- jpeg_dst_buf->frame_num = ctx->total_frame_num;
-
mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf);
ret = pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev);
if (ret < 0) {
@@ -1772,6 +1766,9 @@ static void mtk_jpegdec_worker(struct work_struct *work)
msecs_to_jiffies(MTK_JPEG_HW_TIMEOUT_MSEC));
spin_lock_irqsave(&comp_jpeg[hw_id]->hw_lock, flags);
+ jpeg_dst_buf = mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf);
+ jpeg_dst_buf->curr_ctx = ctx;
+ jpeg_dst_buf->frame_num = ctx->total_frame_num;
ctx->total_frame_num++;
mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base);
mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base,
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index 9a8dbca6af00..e4d2c5d4ec73 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -513,6 +513,7 @@ static void mtk_jpegdec_put_buf(struct mtk_jpegdec_comp_dev *jpeg)
v4l2_m2m_buf_done(&tmp_dst_done_buf->b,
VB2_BUF_STATE_DONE);
ctx->last_done_frame_num++;
+ break;
}
}
}
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 5d1c217fea0f..2adea3aca50b 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -242,6 +242,7 @@ static void mtk_jpegenc_put_buf(struct mtk_jpegenc_comp_dev *jpeg)
v4l2_m2m_buf_done(&tmp_dst_done_buf->b,
VB2_BUF_STATE_DONE);
ctx->last_done_frame_num++;
+ break;
}
}
}
--
2.45.2
^ permalink raw reply related
* [PATCH v15 11/12] media: mediatek: jpeg: add jpeg compatible
From: Kyrie Wu @ 2026-07-02 7:26 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Nicolas Dufresne, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Kyrie Wu,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
In-Reply-To: <20260702072614.10373-1-kyrie.wu@mediatek.com>
Add jpeg dec and enc compatible for mt8196
Signed-off-by: Kyrie Wu <kyrie.wu@mediatek.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
---
.../platform/mediatek/jpeg/mtk_jpeg_core.c | 36 +++++++++++++++++++
.../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 3 ++
.../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 3 ++
3 files changed, 42 insertions(+)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 0b9a3b66895a..da7e723fd1f3 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1918,6 +1918,20 @@ static struct mtk_jpeg_variant mtk8195_jpegenc_drvdata = {
.jpeg_worker = mtk_jpegenc_worker,
};
+static struct mtk_jpeg_variant mtk8196_jpegenc_drvdata = {
+ .formats = mtk_jpeg_enc_formats,
+ .num_formats = MTK_JPEG_ENC_NUM_FORMATS,
+ .qops = &mtk_jpeg_enc_qops,
+ .m2m_ops = &mtk_jpeg_multicore_enc_m2m_ops,
+ .dev_name = "mtk-jpeg-enc",
+ .ioctl_ops = &mtk_jpeg_enc_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_YUYV,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .multi_core = true,
+ .jpeg_worker = mtk_jpegenc_worker,
+ .support_34bit = true,
+};
+
static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
.formats = mtk_jpeg_dec_formats,
.num_formats = MTK_JPEG_DEC_NUM_FORMATS,
@@ -1931,6 +1945,20 @@ static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = {
.jpeg_worker = mtk_jpegdec_worker,
};
+static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = {
+ .formats = mtk_jpeg_dec_formats,
+ .num_formats = MTK_JPEG_DEC_NUM_FORMATS,
+ .qops = &mtk_jpeg_dec_qops,
+ .m2m_ops = &mtk_jpeg_multicore_dec_m2m_ops,
+ .dev_name = "mtk-jpeg-dec",
+ .ioctl_ops = &mtk_jpeg_dec_ioctl_ops,
+ .out_q_default_fourcc = V4L2_PIX_FMT_JPEG,
+ .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M,
+ .multi_core = true,
+ .jpeg_worker = mtk_jpegdec_worker,
+ .support_34bit = true,
+};
+
static const struct of_device_id mtk_jpeg_match[] = {
{
.compatible = "mediatek,mt8173-jpgdec",
@@ -1952,6 +1980,14 @@ static const struct of_device_id mtk_jpeg_match[] = {
.compatible = "mediatek,mt8195-jpgdec",
.data = &mtk8195_jpegdec_drvdata,
},
+ {
+ .compatible = "mediatek,mt8196-jpgenc",
+ .data = &mtk8196_jpegenc_drvdata,
+ },
+ {
+ .compatible = "mediatek,mt8196-jpgdec",
+ .data = &mtk8196_jpegdec_drvdata,
+ },
{},
};
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
index e4d2c5d4ec73..5a485e905787 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
@@ -45,6 +45,9 @@ static const struct of_device_id mtk_jpegdec_hw_ids[] = {
{
.compatible = "mediatek,mt8195-jpgdec-hw",
},
+ {
+ .compatible = "mediatek,mt8196-jpgdec-hw",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mtk_jpegdec_hw_ids);
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
index 2adea3aca50b..1cfdfac98829 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
@@ -52,6 +52,9 @@ static const struct of_device_id mtk_jpegenc_drv_ids[] = {
{
.compatible = "mediatek,mt8195-jpgenc-hw",
},
+ {
+ .compatible = "mediatek,mt8196-jpgenc-hw",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mtk_jpegenc_drv_ids);
--
2.45.2
^ permalink raw reply related
* [PATCH v15 07/12] media: mediatek: jpeg: fix resolution change event handling in decoder
From: Kyrie Wu @ 2026-07-02 7:26 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Nicolas Dufresne, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Kyrie Wu,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
In-Reply-To: <20260702072614.10373-1-kyrie.wu@mediatek.com>
This patch refines the handling of resolution change events within
JPEG decoder worker. The `mtk_jpeg_set_queue_data` function is now
called to set up queue data before signaling a source change through
`mtk_jpeg_queue_src_chg_event`. By reorganizing these calls, the
patch ensures that necessary queue information is updated prior to
transitioning the context state to `MTK_JPEG_SOURCE_CHANGE`.
A condition is added to exit early if the context is already in the
`MTK_JPEG_SOURCE_CHANGE` state, preventing redundant operations and
improving processing efficiency.
Fixes: dedc21500334 ("media: mtk-jpegdec: add jpeg decode worker interface")
Signed-off-by: Kyrie Wu <kyrie.wu@mediatek.com>
---
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
index 4dc574e03bd5..02efaed198b8 100644
--- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
+++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
@@ -1737,11 +1737,15 @@ static void mtk_jpegdec_worker(struct work_struct *work)
if (mtk_jpeg_check_resolution_change(ctx,
&jpeg_src_buf->dec_param)) {
- mtk_jpeg_queue_src_chg_event(ctx);
+ mtk_jpeg_set_queue_data(ctx, &jpeg_src_buf->dec_param);
ctx->state = MTK_JPEG_SOURCE_CHANGE;
+ mtk_jpeg_queue_src_chg_event(ctx);
goto getbuf_fail;
}
+ if (ctx->state == MTK_JPEG_SOURCE_CHANGE)
+ goto getbuf_fail;
+
mtk_jpegdec_set_hw_param(ctx, hw_id, src_buf, dst_buf);
ret = pm_runtime_resume_and_get(comp_jpeg[hw_id]->dev);
if (ret < 0) {
--
2.45.2
^ permalink raw reply related
* [PATCH v15 10/12] media: dt-bindings: mediatek,jpeg: Add mediatek, mt8196-jpgenc compatible
From: Kyrie Wu @ 2026-07-02 7:26 UTC (permalink / raw)
To: Hans Verkuil, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Nicolas Dufresne, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Kyrie Wu,
linux-media, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Cc: Krzysztof Kozlowski
In-Reply-To: <20260702072614.10373-1-kyrie.wu@mediatek.com>
Compared to the previous generation IC, the MT8196 uses SMMU
instead of IOMMU and supports features such as dynamic voltage
and frequency scaling. Therefore, add "mediatek,mt8196-jpgenc"
compatible to the binding document.
Signed-off-by: Kyrie Wu <kyrie.wu@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/media/mediatek,mt8195-jpegenc.yaml | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
index 596186497b68..e2d772ea0fb0 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml
@@ -14,7 +14,9 @@ description:
properties:
compatible:
- const: mediatek,mt8195-jpgenc
+ enum:
+ - mediatek,mt8195-jpgenc
+ - mediatek,mt8196-jpgenc
power-domains:
maxItems: 1
@@ -44,7 +46,9 @@ patternProperties:
properties:
compatible:
- const: mediatek,mt8195-jpgenc-hw
+ enum:
+ - mediatek,mt8195-jpgenc-hw
+ - mediatek,mt8196-jpgenc-hw
reg:
maxItems: 1
--
2.45.2
^ permalink raw reply related
* Re: [PATCH 01/42] drm/mediatek: Rename OVL format naming
From: CK Hu (胡俊光) @ 2026-07-02 7:30 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, chunkuang.hu@kernel.org
Cc: robh@kernel.org, tzimmermann@suse.de, simona@ffwll.ch,
mripard@kernel.org, kernel@collabora.com,
linux-mediatek@lists.infradead.org,
maarten.lankhorst@linux.intel.com,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
conor+dt@kernel.org, devicetree@vger.kernel.org,
krzk+dt@kernel.org, Paul-pl Chen (陳柏霖),
p.zabel@pengutronix.de, airlied@gmail.com,
Justin Yeh (葉英茂), matthias.bgg@gmail.com,
linux-arm-kernel@lists.infradead.org,
Jason-JH Lin (林睿祥)
In-Reply-To: <20260701122057.19648-2-angelogioacchino.delregno@collabora.com>
On Wed, 2026-07-01 at 14:20 +0200, AngeloGioacchino Del Regno wrote:
> From: Paul-pl Chen <paul-pl.chen@mediatek.com>
>
> Rename format arrays from mt8173_formats[] to mt8173_ovl_formats[]
> to explicitly indicate that these format definitions are specific
> to OVL (Overlay) components.
>
> This naming improvement is necessary because MT8196 introduces new
> display components (EXDMA, BLENDER, OUTPROC) that support different
> format capabilities than OVL. Without clear naming, it becomes
> ambiguous which formats apply to which component type.
>
> Examples of format differences between components:
> - EXDMA supports 10-bit RGB formats that some OVL variants don't
> - BLENDER has different YUV handling requirements
> - Component-specific format conversion capabilities vary
>
> The explicit naming:
> - Prevents confusion when debugging format-related issues
> - Makes it immediately clear which component a format array belongs to
> - Improves code searchability (grep for "ovl_formats")
> - Follows consistent naming convention for component-specific definitions
> - Prepares for adding exdma_formats[], blender_formats[] arrays
>
> This is a preparatory patch for MT8196 component support, which
> requires clear distinction between OVL formats and EXDMA/BLENDER
> formats to avoid applying incorrect format configurations.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 36 ++++++++++++-------------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index c4b5a262fa8a..87c2b5e6d6b0 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -101,7 +101,7 @@ static inline bool is_10bit_rgb(u32 fmt)
> return false;
> }
>
> -static const u32 mt8173_formats[] = {
> +static const u32 mt8173_ovl_formats[] = {
> DRM_FORMAT_XRGB8888,
> DRM_FORMAT_ARGB8888,
> DRM_FORMAT_BGRX8888,
> @@ -115,7 +115,7 @@ static const u32 mt8173_formats[] = {
> DRM_FORMAT_YUYV,
> };
>
> -static const u32 mt8195_formats[] = {
> +static const u32 mt8195_ovl_formats[] = {
> DRM_FORMAT_XRGB8888,
> DRM_FORMAT_ARGB8888,
> DRM_FORMAT_XRGB2101010,
> @@ -673,8 +673,8 @@ static const struct mtk_disp_ovl_data mt2701_ovl_driver_data = {
> .gmc_bits = 8,
> .layer_nr = 4,
> .fmt_rgb565_is_0 = false,
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8167_ovl_driver_data = {
> @@ -683,8 +683,8 @@ static const struct mtk_disp_ovl_data mt8167_ovl_driver_data = {
> .layer_nr = 4,
> .fmt_rgb565_is_0 = true,
> .smi_id_en = true,
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
> @@ -692,8 +692,8 @@ static const struct mtk_disp_ovl_data mt8173_ovl_driver_data = {
> .gmc_bits = 8,
> .layer_nr = 4,
> .fmt_rgb565_is_0 = true,
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> @@ -701,8 +701,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_driver_data = {
> .gmc_bits = 10,
> .layer_nr = 4,
> .fmt_rgb565_is_0 = true,
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> @@ -710,8 +710,8 @@ static const struct mtk_disp_ovl_data mt8183_ovl_2l_driver_data = {
> .gmc_bits = 10,
> .layer_nr = 2,
> .fmt_rgb565_is_0 = true,
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
> @@ -723,8 +723,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_driver_data = {
> .blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> BIT(DRM_MODE_BLEND_COVERAGE) |
> BIT(DRM_MODE_BLEND_PIXEL_NONE),
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
> @@ -736,8 +736,8 @@ static const struct mtk_disp_ovl_data mt8192_ovl_2l_driver_data = {
> .blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> BIT(DRM_MODE_BLEND_COVERAGE) |
> BIT(DRM_MODE_BLEND_PIXEL_NONE),
> - .formats = mt8173_formats,
> - .num_formats = ARRAY_SIZE(mt8173_formats),
> + .formats = mt8173_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8173_ovl_formats),
> };
>
> static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
> @@ -750,8 +750,8 @@ static const struct mtk_disp_ovl_data mt8195_ovl_driver_data = {
> .blend_modes = BIT(DRM_MODE_BLEND_PREMULTI) |
> BIT(DRM_MODE_BLEND_COVERAGE) |
> BIT(DRM_MODE_BLEND_PIXEL_NONE),
> - .formats = mt8195_formats,
> - .num_formats = ARRAY_SIZE(mt8195_formats),
> + .formats = mt8195_ovl_formats,
> + .num_formats = ARRAY_SIZE(mt8195_ovl_formats),
> .supports_clrfmt_ext = true,
> };
>
^ permalink raw reply
* Re: [PATCH v2 1/5] arm64: dts: lx2160a: transition to device-specific SerDes compatible strings
From: Ioana Ciornei @ 2026-07-02 7:35 UTC (permalink / raw)
To: Frank Li
Cc: Frank.Li, robh, krzk+dt, conor+dt, devicetree, vladimir.oltean,
linux-arm-kernel, linux-kernel, imx
In-Reply-To: <akUjt5OPiO5cJ1D9@SMW015318>
On Wed, Jul 01, 2026 at 09:27:03AM -0500, Frank Li wrote:
> On Wed, Jul 01, 2026 at 04:11:33PM +0300, Ioana Ciornei wrote:
> > From: Vladimir Oltean <vladimir.oltean@nxp.com>
> >
> > Align to the modern fsl,lynx-28g.yaml binding, where the SoC and SerDes
> > instance is present in the compatible string, to allow reliable per-lane
> > capability detection and per-lane customization of electrical properties.
> >
> > The modern bindings are backward-incompatible with old kernels, due
> > to the consumer phandles being either in one form or in another, as
> > explained here:
> > https://lore.kernel.org/lkml/20250930140735.mvo3jii7wgmzh2bs@skbuf/
> >
> > One of the major differences between the LX2160A and LX2162A is the
> > SerDes. So far, LX2162A has used fsl-lx2160a-rev2.dtsi, but we need to
> > split that up even further, and derive a fsl-lx2162a.dtsi which
> > overrides the SerDes properties.
> >
> > Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> > Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> > ---
> > Changes in v2:
> > - Enable serdes_1 on all board DTs that has consumers for it.
> > - Use the proper name for serdes_3 in fsl-lx2162a.dtsi.
> > - Remove paragraph from commit message which mentioned some consumer
> > changes that are no longer needed nor part of the commit.
> > ---
> > .../freescale/fsl-lx2160a-clearfog-itx.dtsi | 4 +
> > .../dts/freescale/fsl-lx2160a-half-twins.dts | 4 +
> > .../boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 +
> > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 150 +++++++++++++++++-
> > .../dts/freescale/fsl-lx2162a-clearfog.dts | 6 +-
> > .../boot/dts/freescale/fsl-lx2162a-qds.dts | 2 +-
> > .../arm64/boot/dts/freescale/fsl-lx2162a.dtsi | 24 +++
> > 7 files changed, 190 insertions(+), 4 deletions(-)
> > create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi
> >
> ...
> >
> > +&serdes_1 {
> > + status = "okay";
> > +};
> > +
>
> Can you try keep alphabet order? may old file is not ordersed, but try
> best, at least should before &uart0
Sure, will move it.
>
> > &uart1 {
> > status = "okay";
> > };
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > index 1d73abffa6b7..a687eb3e3190 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>
> Please split chips dtsi and boards dts to two patch.
Ok, I will split the serdes_1 explicit enable into a prep patch.
>
> > @@ -621,17 +621,163 @@ soc: soc {
> > ranges;
> > dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
> >
> > + /* Note on the interpretation of SerDes lane numbering from
> > + * LX2160ARM lane mappings for RCW[SRDS_PRTCL_S1]:
> > + * The letters (A-H) correspond to logical lane numbers in the
> > + * SerDes register map (lane A's registers start with LNAGCR0),
> > + * while the numbers (0-7) correspond to physical lanes as
> > + * routed to pins. SerDes block #1 is flipped in the LX2160A
> > + * floorplan (logical lane A goes to physical lane 7's pins),
> > + * while SerDes blocks #2 and #3 are not. The lanes below are
> > + * listed right to left when looking at that table.
> > + * Both the numbers and the letters are according to the logical
> > + * numbering scheme, and do not account for the flipping.
> > + */
> ...
> > + compatible = "fsl,lx2160a-serdes3";
> > + reg = <0x0 0x1ec0000 0x0 0x1e30>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "disabled";
>
> status should be last property
Ok, will move it.
>
> > + #phy-cells = <1>;
> > +
> > + serdes_3_lane_a: phy@0 {
> > + reg = <0>;
> > + #phy-cells = <0>;
> > + };
> > +
> ...
> > +
> > +#include "fsl-lx2160a-rev2.dtsi"
> > +
> > +&serdes_1 {
> > + compatible = "fsl,lx2162a-serdes1", "fsl,lynx-28g";
> > +
> > + /delete-node/ phy@0;
> > + /delete-node/ phy@1;
> > + /delete-node/ phy@2;
> > + /delete-node/ phy@3;
>
> Now, do not perfer delete-node. if ver2 is not include phy@0, ...
>
> create ver2 files, let ver2 include it. Now most people like A + B, not
> A - B.
>
I am not sure I follow what you say about the ver2 files - are you
referring to -rev2 or LX2162A?
The LX2162A is a version of the LX2160A SoC, also known as "LX2-Lite".
And the main difference is that the LX2162A does not have the 3rd SerDes
block and only 4 SerDes lanes on the first block.
The delete-node is reflecting exactly how the SoCs came about, the
LX2162A is a smaller version of the LX2160A (which came first) and not
the other way around.
I feel like it's unnecessary churn but let me know if you feel strongly
about this.
Thanks,
Ioana
^ permalink raw reply
* Re: [PATCH v4 net-next 1/2] dt-bindings: phy: cadence-torrent: Update property values to support 3 clocks
From: Gokul Praveen @ 2026-07-02 7:35 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: conor+dt, devicetree, krzk+dt, linux-arm-kernel, linux-kernel,
linux-phy, neil.armstrong, nm, robh, sjakhade, kristo, vigneshr,
vkoul, yamonkar, Gokul Praveen
In-Reply-To: <20260702-vigilant-tody-of-inquire-ffbede@quoll>
Hi Krzystof,
On 02/07/26 11:53, Krzysztof Kozlowski wrote:
> On Wed, Jul 01, 2026 at 07:54:56PM +0530, Gokul Praveen wrote:
>> Update maxItems value of "clocks" property to 3 as description of
>> this parameter already indicates 3 clocks(refclk,pll1_refclk(optional)
>> and phy_en_refclk(optional)).
> But what if description is wrong? You need to provide rationale why you
> are doing it and you cannot use existing code alone as that rationale,
> because as you pointed out - existing code is not fully correct.
The description is correct because not all device may have 2 input
reference clocks , hence keeping the requirement of the 2nd reference
clock(pll1_refclk) optional.
Just as a note: phy_en_refclk is an output clock.
In those cases the multilink serdes configurations requiring 2 different
input reference clocks will not work due to the limitation of having
only 1 clock.
However, when it comes to devices where 2 different input reference
clocks are supported and a multilink serdes configuration is
needed(where the links require separate reference clocks for each
protocol so as to cater to the different clocking speed requirements of
these links).
Hence, in this case ,2 different input clocks are needed so as to cater
to 2 different clock speeds.
For eg: In the USXGMII+SGMII multilink serdes configuration which I had
tested, it failed because
USXGMII requires an input clock speed of 156.25 Mhz and SGMII protocol
requires an input clock speed of 100 Mhz.
But, since there was only one input clock(refclk) mentioned in the
clocks and clock-name parameter , this multilink serdes configuration
failed.
Hence, to make it work, the pll1_refclk had to be added which provided a
clock speed of 156.25 Mhz for USXGMI and the refclk provided
a clock speed of 100 Mhz for SGMII.
>> Update the maxItems and items value of "clock-names" property with multiple
>> combination of clock-names possible since pll1_refclk and phy_en_refclk are
>> optional clocks.
> Why? You need to describe why you are doing this, not what you are
> doing.
Sure , Krzysztof, I will be careful about that and prioritize that in
the commit message.
>> Signed-off-by: Gokul Praveen <g-praveen@ti.com>
>> ---
>> .../bindings/phy/phy-cadence-torrent.yaml | 16 ++++++++++++----
>> 1 file changed, 12 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>> index 9af39b33646a..96c664d50629 100644
>> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>> @@ -34,7 +34,7 @@ properties:
>>
>> clocks:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
>> description:
>> PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
>> pll1_refclk is optional and used for multi-protocol configurations requiring
>> @@ -45,9 +45,17 @@ properties:
>>
>> clock-names:
>> minItems: 1
>> - items:
>> - - const: refclk
>> - - enum: [ pll1_refclk, phy_en_refclk ]
>> + maxItems: 3
> Drop
Sure, i will do that Krzysztof.
>> + oneOf:
>> + - items:
>> + - const: refclk
>> + - items:
>> + - const: refclk
>> + - enum: [ pll1_refclk, phy_en_refclk ]
> Drop these, pointless. You were supposed to grow existing syntax.
>
>> + - items:
>> + - const: refclk
>> + - const: pll1_refclk
> So here is the enum.
>
>> + - const: phy_en_refclk
> And this stays.
>
> You make changes which do not make the binding better and are not
> explained in commit msg. Focus on WHY you are doing things and also
> explain WHY you did such complicated syntax (if you insist on rewriting
> correct code into something odd we do not expect).
So, the reason I added the oneOf property is to support the following
combinations because pll1_refclk and phy_en_refclk are optional clocks.
With the earlier enum , only either of pll1_refclk or phy_en_refclk
can be used and both cannot be used at the same time.
Combination 1: refclk
Combination 2 : refclk, pll1_refclk
Combination 3: reclk, phy_en_refclk
Combination 4: refclk, pll1_refclk, phy_en_refclk
Please feel free to suggest any alternative solution to support these
combinations .
>
> Best regards,
> Krzysztof
>
>
^ permalink raw reply
* Re: [PATCH 01/16] media: sun6i-csi: bridge: Use V4L2 subdev active state
From: arash golgol @ 2026-07-02 7:38 UTC (permalink / raw)
To: Paul Kocialkowski
Cc: linux-media, linux-arm-kernel, linux-sunxi, linux-kernel,
linux-staging, Mauro Carvalho Chehab, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Greg Kroah-Hartman,
Laurent Pinchart, Nicolas Dufresne
In-Reply-To: <20260518102451.417971-2-paulk@sys-base.io>
Hi Paul,
On Mon, May 18, 2026 at 1:55 PM Paul Kocialkowski <paulk@sys-base.io> wrote:
>
> From: Arash Golgol <arash.golgol@gmail.com>
>
> Use the V4L2 subdev active state API to store the active format.
> This simplifies the driver not only by dropping the bridge mbus_format
> field, but it also allows dropping the bridge lock, replaced with
> the state lock.
>
> Previously, capture accessed bridge private state directly. After
> moving to framework-managed state, resolve the format through the
> subdev pad API.
>
> The sun6i-csi-bridge hardware does not perform any format conversion.
> Enforce identical formats on the sink and source pads in the set_fmt()
> and init_state() callbacks.
>
> Signed-off-by: Arash Golgol <arash.golgol@gmail.com>
> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
> Tested-by: Paul Kocialkowski <paulk@sys-base.io>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
I noticed this series didn't make it into the v7.2 merge window.
Is there anything still pending on my side before it can be picked up,
or is it just a matter of timing for the next cycle?
Happy to help however I can.
> ---
> .../sunxi/sun6i-csi/sun6i_csi_bridge.c | 155 ++++++++----------
> .../sunxi/sun6i-csi/sun6i_csi_bridge.h | 9 -
> .../sunxi/sun6i-csi/sun6i_csi_capture.c | 27 ++-
> 3 files changed, 86 insertions(+), 105 deletions(-)
>
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.c
> index d006d9dd0170..43a85bcc2ba2 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.c
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.c
> @@ -13,26 +13,6 @@
> #include "sun6i_csi_bridge.h"
> #include "sun6i_csi_reg.h"
>
> -/* Helpers */
> -
> -void sun6i_csi_bridge_dimensions(struct sun6i_csi_device *csi_dev,
> - unsigned int *width, unsigned int *height)
> -{
> - if (width)
> - *width = csi_dev->bridge.mbus_format.width;
> - if (height)
> - *height = csi_dev->bridge.mbus_format.height;
> -}
> -
> -void sun6i_csi_bridge_format(struct sun6i_csi_device *csi_dev,
> - u32 *mbus_code, u32 *field)
> -{
> - if (mbus_code)
> - *mbus_code = csi_dev->bridge.mbus_format.code;
> - if (field)
> - *field = csi_dev->bridge.mbus_format.field;
> -}
> -
> /* Format */
>
> static const struct sun6i_csi_bridge_format sun6i_csi_bridge_formats[] = {
> @@ -226,7 +206,8 @@ static void sun6i_csi_bridge_disable(struct sun6i_csi_device *csi_dev)
> }
>
> static void
> -sun6i_csi_bridge_configure_parallel(struct sun6i_csi_device *csi_dev)
> +sun6i_csi_bridge_configure_parallel(struct sun6i_csi_device *csi_dev,
> + const struct v4l2_mbus_framefmt *mbus_format)
> {
> struct device *dev = csi_dev->dev;
> struct regmap *regmap = csi_dev->regmap;
> @@ -234,11 +215,9 @@ sun6i_csi_bridge_configure_parallel(struct sun6i_csi_device *csi_dev)
> &csi_dev->bridge.source_parallel.endpoint;
> unsigned char bus_width = endpoint->bus.parallel.bus_width;
> unsigned int flags = endpoint->bus.parallel.flags;
> - u32 field;
> + u32 field = mbus_format->field;
> u32 value = SUN6I_CSI_IF_CFG_IF_CSI;
>
> - sun6i_csi_bridge_format(csi_dev, NULL, &field);
> -
> if (field == V4L2_FIELD_INTERLACED ||
> field == V4L2_FIELD_INTERLACED_TB ||
> field == V4L2_FIELD_INTERLACED_BT)
> @@ -317,13 +296,12 @@ sun6i_csi_bridge_configure_parallel(struct sun6i_csi_device *csi_dev)
> }
>
> static void
> -sun6i_csi_bridge_configure_mipi_csi2(struct sun6i_csi_device *csi_dev)
> +sun6i_csi_bridge_configure_mipi_csi2(struct sun6i_csi_device *csi_dev,
> + const struct v4l2_mbus_framefmt *mbus_format)
> {
> struct regmap *regmap = csi_dev->regmap;
> u32 value = SUN6I_CSI_IF_CFG_IF_MIPI;
> - u32 field;
> -
> - sun6i_csi_bridge_format(csi_dev, NULL, &field);
> + u32 field = mbus_format->field;
>
> if (field == V4L2_FIELD_INTERLACED ||
> field == V4L2_FIELD_INTERLACED_TB ||
> @@ -335,19 +313,20 @@ sun6i_csi_bridge_configure_mipi_csi2(struct sun6i_csi_device *csi_dev)
> regmap_write(regmap, SUN6I_CSI_IF_CFG_REG, value);
> }
>
> -static void sun6i_csi_bridge_configure_format(struct sun6i_csi_device *csi_dev)
> +static void
> +sun6i_csi_bridge_configure_format(struct sun6i_csi_device *csi_dev,
> + const struct v4l2_mbus_framefmt *mbus_format)
> {
> struct regmap *regmap = csi_dev->regmap;
> bool capture_streaming = csi_dev->capture.state.streaming;
> const struct sun6i_csi_bridge_format *bridge_format;
> const struct sun6i_csi_capture_format *capture_format;
> - u32 mbus_code, field, pixelformat;
> + u32 pixelformat;
> + u32 field = mbus_format->field;
> u8 input_format, input_yuv_seq, output_format;
> u32 value = 0;
>
> - sun6i_csi_bridge_format(csi_dev, &mbus_code, &field);
> -
> - bridge_format = sun6i_csi_bridge_format_find(mbus_code);
> + bridge_format = sun6i_csi_bridge_format_find(mbus_format->code);
> if (WARN_ON(!bridge_format))
> return;
>
> @@ -391,16 +370,17 @@ static void sun6i_csi_bridge_configure_format(struct sun6i_csi_device *csi_dev)
> }
>
> static void sun6i_csi_bridge_configure(struct sun6i_csi_device *csi_dev,
> - struct sun6i_csi_bridge_source *source)
> + struct sun6i_csi_bridge_source *source,
> + const struct v4l2_mbus_framefmt *mbus_format)
> {
> struct sun6i_csi_bridge *bridge = &csi_dev->bridge;
>
> if (source == &bridge->source_parallel)
> - sun6i_csi_bridge_configure_parallel(csi_dev);
> + sun6i_csi_bridge_configure_parallel(csi_dev, mbus_format);
> else
> - sun6i_csi_bridge_configure_mipi_csi2(csi_dev);
> + sun6i_csi_bridge_configure_mipi_csi2(csi_dev, mbus_format);
>
> - sun6i_csi_bridge_configure_format(csi_dev);
> + sun6i_csi_bridge_configure_format(csi_dev, mbus_format);
> }
>
> /* V4L2 Subdev */
> @@ -415,6 +395,8 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
> struct sun6i_csi_bridge_source *source;
> struct v4l2_subdev *source_subdev;
> struct media_pad *remote_pad;
> + struct v4l2_subdev_state *state;
> + const struct v4l2_mbus_framefmt *mbus_format;
> int ret;
>
> /* Source */
> @@ -433,6 +415,10 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
> else
> source = &bridge->source_mipi_csi2;
>
> + /* Active State */
> +
> + state = v4l2_subdev_lock_and_get_active_state(subdev);
> +
> if (!on) {
> v4l2_subdev_call(source_subdev, video, s_stream, 0);
> ret = 0;
> @@ -443,7 +429,7 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
>
> ret = pm_runtime_resume_and_get(dev);
> if (ret < 0)
> - return ret;
> + goto unlock;
>
> /* Clear */
>
> @@ -451,7 +437,9 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
>
> /* Configure */
>
> - sun6i_csi_bridge_configure(csi_dev, source);
> + mbus_format = v4l2_subdev_state_get_format(state,
> + SUN6I_CSI_BRIDGE_PAD_SINK);
> + sun6i_csi_bridge_configure(csi_dev, source, mbus_format);
>
> if (capture_streaming)
> sun6i_csi_capture_configure(csi_dev);
> @@ -472,7 +460,8 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
> if (ret && ret != -ENOIOCTLCMD)
> goto disable;
>
> - return 0;
> + ret = 0;
> + goto unlock;
>
> disable:
> if (capture_streaming)
> @@ -482,6 +471,8 @@ static int sun6i_csi_bridge_s_stream(struct v4l2_subdev *subdev, int on)
>
> pm_runtime_put(dev);
>
> +unlock:
> + v4l2_subdev_unlock_state(state);
> return ret;
> }
>
> @@ -504,21 +495,23 @@ sun6i_csi_bridge_mbus_format_prepare(struct v4l2_mbus_framefmt *mbus_format)
> static int sun6i_csi_bridge_init_state(struct v4l2_subdev *subdev,
> struct v4l2_subdev_state *state)
> {
> - struct sun6i_csi_device *csi_dev = v4l2_get_subdevdata(subdev);
> - unsigned int pad = SUN6I_CSI_BRIDGE_PAD_SINK;
> - struct v4l2_mbus_framefmt *mbus_format =
> - v4l2_subdev_state_get_format(state, pad);
> - struct mutex *lock = &csi_dev->bridge.lock;
> + unsigned int pad;
>
> - mutex_lock(lock);
> + /*
> + * This subdev does not perform format conversion,
> + * initialize both pads identically.
> + */
> + for (pad = 0; pad < subdev->entity.num_pads; pad++) {
> + struct v4l2_mbus_framefmt *mbus_format;
>
> - mbus_format->code = sun6i_csi_bridge_formats[0].mbus_code;
> - mbus_format->width = 1280;
> - mbus_format->height = 720;
> + mbus_format = v4l2_subdev_state_get_format(state, pad);
>
> - sun6i_csi_bridge_mbus_format_prepare(mbus_format);
> + mbus_format->code = sun6i_csi_bridge_formats[0].mbus_code;
> + mbus_format->width = 1280;
> + mbus_format->height = 720;
>
> - mutex_unlock(lock);
> + sun6i_csi_bridge_mbus_format_prepare(mbus_format);
> + }
>
> return 0;
> }
> @@ -536,53 +529,32 @@ sun6i_csi_bridge_enum_mbus_code(struct v4l2_subdev *subdev,
> return 0;
> }
>
> -static int sun6i_csi_bridge_get_fmt(struct v4l2_subdev *subdev,
> - struct v4l2_subdev_state *state,
> - struct v4l2_subdev_format *format)
> -{
> - struct sun6i_csi_device *csi_dev = v4l2_get_subdevdata(subdev);
> - struct v4l2_mbus_framefmt *mbus_format = &format->format;
> - struct mutex *lock = &csi_dev->bridge.lock;
> -
> - mutex_lock(lock);
> -
> - if (format->which == V4L2_SUBDEV_FORMAT_TRY)
> - *mbus_format = *v4l2_subdev_state_get_format(state,
> - format->pad);
> - else
> - *mbus_format = csi_dev->bridge.mbus_format;
> -
> - mutex_unlock(lock);
> -
> - return 0;
> -}
> -
> static int sun6i_csi_bridge_set_fmt(struct v4l2_subdev *subdev,
> struct v4l2_subdev_state *state,
> struct v4l2_subdev_format *format)
> {
> - struct sun6i_csi_device *csi_dev = v4l2_get_subdevdata(subdev);
> - struct v4l2_mbus_framefmt *mbus_format = &format->format;
> - struct mutex *lock = &csi_dev->bridge.lock;
> + struct v4l2_mbus_framefmt *fmt;
>
> - mutex_lock(lock);
> + /* The format on the source pad always matches the sink pad. */
> + if (format->pad != SUN6I_CSI_BRIDGE_PAD_SINK)
> + return v4l2_subdev_get_fmt(subdev, state, format);
>
> - sun6i_csi_bridge_mbus_format_prepare(mbus_format);
> + sun6i_csi_bridge_mbus_format_prepare(&format->format);
>
> - if (format->which == V4L2_SUBDEV_FORMAT_TRY)
> - *v4l2_subdev_state_get_format(state, format->pad) =
> - *mbus_format;
> - else
> - csi_dev->bridge.mbus_format = *mbus_format;
> + /* Set the format on the sink pad. */
> + fmt = v4l2_subdev_state_get_format(state, format->pad);
> + *fmt = format->format;
>
> - mutex_unlock(lock);
> + /* Propagate the format to the source pad. */
> + fmt = v4l2_subdev_state_get_format(state, SUN6I_CSI_BRIDGE_PAD_SOURCE);
> + *fmt = format->format;
>
> return 0;
> }
>
> static const struct v4l2_subdev_pad_ops sun6i_csi_bridge_pad_ops = {
> .enum_mbus_code = sun6i_csi_bridge_enum_mbus_code,
> - .get_fmt = sun6i_csi_bridge_get_fmt,
> + .get_fmt = v4l2_subdev_get_fmt,
> .set_fmt = sun6i_csi_bridge_set_fmt,
> };
>
> @@ -780,8 +752,6 @@ int sun6i_csi_bridge_setup(struct sun6i_csi_device *csi_dev)
> };
> int ret;
>
> - mutex_init(&bridge->lock);
> -
> /* V4L2 Subdev */
>
> v4l2_subdev_init(subdev, &sun6i_csi_bridge_subdev_ops);
> @@ -809,6 +779,12 @@ int sun6i_csi_bridge_setup(struct sun6i_csi_device *csi_dev)
> if (ret < 0)
> return ret;
>
> + /* V4L2 Subdev finalize */
> +
> + ret = v4l2_subdev_init_finalize(subdev);
> + if (ret < 0)
> + goto error_media_entity;
> +
> /* V4L2 Subdev */
>
> if (csi_dev->isp_available)
> @@ -818,7 +794,7 @@ int sun6i_csi_bridge_setup(struct sun6i_csi_device *csi_dev)
>
> if (ret) {
> dev_err(dev, "failed to register v4l2 subdev: %d\n", ret);
> - goto error_media_entity;
> + goto error_subdev_finalize;
> }
>
> /* V4L2 Async */
> @@ -852,6 +828,9 @@ int sun6i_csi_bridge_setup(struct sun6i_csi_device *csi_dev)
> else
> v4l2_device_unregister_subdev(subdev);
>
> +error_subdev_finalize:
> + v4l2_subdev_cleanup(subdev);
> +
> error_media_entity:
> media_entity_cleanup(&subdev->entity);
>
> @@ -868,5 +847,7 @@ void sun6i_csi_bridge_cleanup(struct sun6i_csi_device *csi_dev)
>
> v4l2_device_unregister_subdev(subdev);
>
> + v4l2_subdev_cleanup(subdev);
> +
> media_entity_cleanup(&subdev->entity);
> }
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.h b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.h
> index 44653b38f722..a5b0a6f064dd 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.h
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_bridge.h
> @@ -42,20 +42,11 @@ struct sun6i_csi_bridge {
> struct v4l2_subdev subdev;
> struct v4l2_async_notifier notifier;
> struct media_pad pads[2];
> - struct v4l2_mbus_framefmt mbus_format;
> - struct mutex lock; /* Mbus format lock. */
>
> struct sun6i_csi_bridge_source source_parallel;
> struct sun6i_csi_bridge_source source_mipi_csi2;
> };
>
> -/* Helpers */
> -
> -void sun6i_csi_bridge_dimensions(struct sun6i_csi_device *csi_dev,
> - unsigned int *width, unsigned int *height);
> -void sun6i_csi_bridge_format(struct sun6i_csi_device *csi_dev,
> - u32 *mbus_code, u32 *field);
> -
> /* Format */
>
> const struct sun6i_csi_bridge_format *
> diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.c
> index 65879f4802c0..d90abba21309 100644
> --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.c
> +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi_capture.c
> @@ -888,14 +888,19 @@ static int sun6i_csi_capture_link_validate(struct media_link *link)
> media_entity_to_video_device(link->sink->entity);
> struct sun6i_csi_device *csi_dev = video_get_drvdata(video_dev);
> struct v4l2_device *v4l2_dev = csi_dev->v4l2_dev;
> + struct v4l2_subdev *src_subdev =
> + media_entity_to_v4l2_subdev(link->source->entity);
> const struct sun6i_csi_capture_format *capture_format;
> const struct sun6i_csi_bridge_format *bridge_format;
> unsigned int capture_width, capture_height;
> - unsigned int bridge_width, bridge_height;
> const struct v4l2_format_info *format_info;
> + struct v4l2_subdev_format src_fmt = {
> + .which = V4L2_SUBDEV_FORMAT_ACTIVE,
> + .pad = link->source->index
> + };
> u32 pixelformat, capture_field;
> - u32 mbus_code, bridge_field;
> bool match;
> + int ret;
>
> sun6i_csi_capture_dimensions(csi_dev, &capture_width, &capture_height);
>
> @@ -904,19 +909,22 @@ static int sun6i_csi_capture_link_validate(struct media_link *link)
> if (WARN_ON(!capture_format))
> return -EINVAL;
>
> - sun6i_csi_bridge_dimensions(csi_dev, &bridge_width, &bridge_height);
> + /* Resolve csi bridge format. */
> + ret = v4l2_subdev_call(src_subdev, pad, get_fmt, NULL, &src_fmt);
> + if (ret)
> + return ret;
>
> - sun6i_csi_bridge_format(csi_dev, &mbus_code, &bridge_field);
> - bridge_format = sun6i_csi_bridge_format_find(mbus_code);
> + bridge_format = sun6i_csi_bridge_format_find(src_fmt.format.code);
> if (WARN_ON(!bridge_format))
> return -EINVAL;
>
> /* No cropping/scaling is supported. */
> - if (capture_width != bridge_width || capture_height != bridge_height) {
> + if (capture_width != src_fmt.format.width ||
> + capture_height != src_fmt.format.height) {
> v4l2_err(v4l2_dev,
> "invalid input/output dimensions: %ux%u/%ux%u\n",
> - bridge_width, bridge_height, capture_width,
> - capture_height);
> + src_fmt.format.width, src_fmt.format.height,
> + capture_width, capture_height);
> return -EINVAL;
> }
>
> @@ -947,7 +955,8 @@ static int sun6i_csi_capture_link_validate(struct media_link *link)
> /* With raw input mode, we need a 1:1 match between input and output. */
> if (bridge_format->input_format == SUN6I_CSI_INPUT_FMT_RAW ||
> capture_format->input_format_raw) {
> - match = sun6i_csi_capture_format_match(pixelformat, mbus_code);
> + match = sun6i_csi_capture_format_match(pixelformat,
> + src_fmt.format.code);
> if (!match)
> goto invalid;
> }
> --
> 2.54.0
>
--
Regards,
Arash Golgol
^ permalink raw reply
* Re: [PATCH v4 net-next 1/2] dt-bindings: phy: cadence-torrent: Update property values to support 3 clocks
From: Krzysztof Kozlowski @ 2026-07-02 7:38 UTC (permalink / raw)
To: Gokul Praveen
Cc: conor+dt, devicetree, krzk+dt, linux-arm-kernel, linux-kernel,
linux-phy, neil.armstrong, nm, robh, sjakhade, kristo, vigneshr,
vkoul, yamonkar
In-Reply-To: <f40839d9-445e-4e48-ada9-97feb8e40584@ti.com>
On 02/07/2026 09:35, Gokul Praveen wrote:
> Hi Krzystof,
>
> On 02/07/26 11:53, Krzysztof Kozlowski wrote:
>> On Wed, Jul 01, 2026 at 07:54:56PM +0530, Gokul Praveen wrote:
>>> Update maxItems value of "clocks" property to 3 as description of
>>> this parameter already indicates 3 clocks(refclk,pll1_refclk(optional)
>>> and phy_en_refclk(optional)).
>> But what if description is wrong? You need to provide rationale why you
>> are doing it and you cannot use existing code alone as that rationale,
>> because as you pointed out - existing code is not fully correct.
>
> The description is correct because not all device may have 2 input
I do not see how you proved it in the commit msg.
> reference clocks , hence keeping the requirement of the 2nd reference
> clock(pll1_refclk) optional.
>
> Just as a note: phy_en_refclk is an output clock.
output clocks do not go to input clocks property.
>
> In those cases the multilink serdes configurations requiring 2 different
> input reference clocks will not work due to the limitation of having
> only 1 clock.
>
> However, when it comes to devices where 2 different input reference
> clocks are supported and a multilink serdes configuration is
> needed(where the links require separate reference clocks for each
> protocol so as to cater to the different clocking speed requirements of
> these links).
>
> Hence, in this case ,2 different input clocks are needed so as to cater
> to 2 different clock speeds.
>
> For eg: In the USXGMII+SGMII multilink serdes configuration which I had
> tested, it failed because
>
> USXGMII requires an input clock speed of 156.25 Mhz and SGMII protocol
> requires an input clock speed of 100 Mhz.
>
> But, since there was only one input clock(refclk) mentioned in the
> clocks and clock-name parameter , this multilink serdes configuration
> failed.
>
> Hence, to make it work, the pll1_refclk had to be added which provided a
> clock speed of 156.25 Mhz for USXGMI and the refclk provided
>
> a clock speed of 100 Mhz for SGMII.
>
>>> Update the maxItems and items value of "clock-names" property with multiple
>>> combination of clock-names possible since pll1_refclk and phy_en_refclk are
>>> optional clocks.
>> Why? You need to describe why you are doing this, not what you are
>> doing.
> Sure , Krzysztof, I will be careful about that and prioritize that in
> the commit message.
>>> Signed-off-by: Gokul Praveen <g-praveen@ti.com>
>>> ---
>>> .../bindings/phy/phy-cadence-torrent.yaml | 16 ++++++++++++----
>>> 1 file changed, 12 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>>> index 9af39b33646a..96c664d50629 100644
>>> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
>>> @@ -34,7 +34,7 @@ properties:
>>>
>>> clocks:
>>> minItems: 1
>>> - maxItems: 2
>>> + maxItems: 3
>>> description:
>>> PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
>>> pll1_refclk is optional and used for multi-protocol configurations requiring
>>> @@ -45,9 +45,17 @@ properties:
>>>
>>> clock-names:
>>> minItems: 1
>>> - items:
>>> - - const: refclk
>>> - - enum: [ pll1_refclk, phy_en_refclk ]
>>> + maxItems: 3
>> Drop
> Sure, i will do that Krzysztof.
>>> + oneOf:
>>> + - items:
>>> + - const: refclk
>>> + - items:
>>> + - const: refclk
>>> + - enum: [ pll1_refclk, phy_en_refclk ]
>> Drop these, pointless. You were supposed to grow existing syntax.
>>
>>> + - items:
>>> + - const: refclk
>>> + - const: pll1_refclk
>> So here is the enum.
>>
>>> + - const: phy_en_refclk
>> And this stays.
>>
>> You make changes which do not make the binding better and are not
>> explained in commit msg. Focus on WHY you are doing things and also
>> explain WHY you did such complicated syntax (if you insist on rewriting
>> correct code into something odd we do not expect).
>
> So, the reason I added the oneOf property is to support the following
> combinations because pll1_refclk and phy_en_refclk are optional clocks.
> With the earlier enum , only either of pll1_refclk or phy_en_refclk
>
> can be used and both cannot be used at the same time.
>
> Combination 1: refclk
>
> Combination 2 : refclk, pll1_refclk
>
> Combination 3: reclk, phy_en_refclk
>
> Combination 4: refclk, pll1_refclk, phy_en_refclk
>
>
> Please feel free to suggest any alternative solution to support these
> combinations .
I already did. Read the feedback carefully.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v2 17/19] ARM: mark Cortex-M3/M4/M7 based boards as deprecated
From: Nicolas Ferre @ 2026-07-02 7:39 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel, soc
Cc: linux-kernel, Arnd Bergmann, Aaro Koskinen, Alexander Sverdlin,
Alexandre Belloni, Alexandre Torgue, Andrew Lunn, Ard Biesheuvel,
Claudiu Beznea, Daniel Mack, Ethan Nelson-Moore, Frank Li,
Gregory Clement, Haojian Zhuang, Jeremy J. Peper,
Kristoffer Ericson, Krzysztof Kozlowski, Linus Walleij,
Mark Brown, Marc Zyngier, Mike Rapoport, Patrice Chotard,
Ralph Siemsen, Robert Jarzmik, Russell King, Sascha Hauer,
Sebastian Hesselbarth, Stefan Agner, Stefan Wiehler,
Tony Lindgren, Vladimir Zapolskiy, Will Deacon
In-Reply-To: <20260701212353.2196041-18-arnd@kernel.org>
On 01/07/2026 at 23:23, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> The Cortex-M3/M4/M7 cores were designed as a replacement for the earlier
> ARM7TDMI and ARM9TDMI microarchitectures used in older microcontrollers.
>
> At the moment, Linux can run these cores either when they are integrated
> into a larger SoC, or as standalone microcontrollers. While there was
> a lot of development work going into Cortex-M support from 2011 to 2016,
> this largely stopped when it became clear that Zephyr and other RTOS
> had taken over that market. To date, the only Cortex-M based based
> microcontroller boards supported upstream are reference implementations.
>
> Schedule these for removal after the next LTS kernel, so if any users
> remain that want to update their kernels, they can stay on that
> version for a few years before having to maintain the platform support
> out of tree.
>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> arch/arm/Kconfig | 8 ++++++--
> arch/arm/mach-at91/Kconfig | 4 +++-
> arch/arm/mach-imx/Kconfig | 4 +++-
> arch/arm/mach-stm32/Kconfig | 14 ++++++++------
> 4 files changed, 20 insertions(+), 10 deletions(-)
[..]
> diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
> index c5ef27e3cd8f..cb0e3ff8e0ca 100644
> --- a/arch/arm/mach-at91/Kconfig
> +++ b/arch/arm/mach-at91/Kconfig
> @@ -15,13 +15,15 @@ menuconfig ARCH_AT91
>
> if ARCH_AT91
> config SOC_SAMV7
> - bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
> + bool "SAM Cortex-M7 family (DEPRECATED)" if ARM_SINGLE_ARMV7M
> select COMMON_CLK_AT91
> select PINCTRL_AT91
> help
> Select this if you are using an SoC from Microchip's SAME7, SAMS7 or SAMV7
> families.
>
> + This platform is scheduled for removal in early 2027
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> +
> config SOC_SAMA5D2
> bool "SAMA5D2 family"
> depends on ARCH_MULTI_V7
[..]
Thanks, regards,
Nicolas
^ permalink raw reply
* Re: [PATCH v2 0/6] KVM: arm64: ptdump: Shadow ptdump fixes
From: Wei-Lin Chang @ 2026-07-02 7:41 UTC (permalink / raw)
To: Itaru Kitayama
Cc: linux-arm-kernel, kvmarm, linux-kernel, Marc Zyngier,
Oliver Upton, Fuad Tabba, Joey Gouly, Steffen Eiden,
Suzuki K Poulose, Zenghui Yu, Catalin Marinas, Will Deacon,
Sebastian Ene
In-Reply-To: <akYLdEuPXEGIZx3E@sm-arm-grace07>
On Thu, Jul 02, 2026 at 03:55:48PM +0900, Itaru Kitayama wrote:
> Hi Wei-Lin,
> On Tue, Jun 30, 2026 at 01:09:59PM +0100, Wei-Lin Chang wrote:
> > Hi,
> >
> > This is v2 of fixing shadow ptdump debugfs files. Unfortunately I couldn't make
> > per mmu ptdump files work after all, mainly because there isn't a clean way to
> > locate the specific nested mmu for each ptdump file as the nested mmus could be
> > freed when the file gets opened. Therefore in this series a single file
> > "shadow_page_tables" is created that dumps all valid mmus' page table
> > information.
> >
> > An advantage of this is that this new ptdump file have a lifetime identical to
> > other ptdump files i.e. stage2_page_tables, ipa_range, etc., hence avoiding the
> > dentry UAF found last time [1].
> >
> > With this all ptdump files are only removed when the last kvm reference gets
> > dropped and kvm_destroy_vm_debugfs() is called, in their open(), show()
> > functions the nested mmu array and mmu->pgt are checked with mmu_lock held to
> > prevent UAF.
> >
> > Patch 1-2: Undo previous shadow ptdump implementation.
> > Patch 3: Fix a mmu->pgt UAF that happens when ptdump files are read after
> > mmu->pgt is freed.
> > Patch 4-5: Preparation for the shadow page table dump file.
> > Patch 6: Implementation of the shadow page table dump file.
> >
> > The fixes are tested with CONFIG_PROVE_LOCKING,
> > CONFIG_DEBUG_ATOMIC_SLEEP, and CONFIG_KASAN.
> >
> > Thanks!
>
> Running your shadow stage 2 kselftest with bpftrace shows me that __kvm_pgtable_stage2_init()
> for shadow stage 2 translation tables are built with ia_bits = 52 and
> start_level = 0, but the debugfs entry for the active shadow stage 2 tables prints
> out that's 3 levels. Is this fully expected?
Where is this level information you are seeing from? If it is
"stage2_level", that only reports the number of levels for the canonical
stage-2 (non nested). For nested mmus only the page tables are dumped in
nested/shadow_page_tables.
Thanks,
Wei-Lin Chang
>
> Thanks,
> Itaru.
>
> >
> > * Changes from v1 ([2]):
> >
> > - Move from per mmu ptdump files to one file that will dump all shadow page
> > tables.
> >
> > [1]: https://lore.kernel.org/kvmarm/ajty6I7ZqodP4ous@sm-arm-grace07/
> > [2]: https://lore.kernel.org/kvmarm/20260623142443.648972-1-weilin.chang@arm.com/
> >
> > Wei-Lin Chang (6):
> > KVM: arm64: ptdump: Remove shadow ptdump files
> > KVM: arm64: ptdump: Undo making the ptdump code mmu aware
> > KVM: arm64: ptdump: Fix UAF when mmu->pgt is freed
> > KVM: arm64: ptdump: Factor out initialization of
> > kvm_ptdump_guest_state
> > KVM: arm64: ptdump: Extract kvm_ptdump_guest_open() from canonical
> > ptdump path
> > KVM: arm64: ptdump: Introduce the shadow ptdump file
> >
> > arch/arm64/include/asm/kvm_host.h | 5 +-
> > arch/arm64/include/asm/kvm_mmu.h | 4 -
> > arch/arm64/kvm/nested.c | 18 +--
> > arch/arm64/kvm/ptdump.c | 185 ++++++++++++++++++++----------
> > 4 files changed, 135 insertions(+), 77 deletions(-)
> >
> > --
> > 2.43.0
> >
^ permalink raw reply
* Re: [PATCH v2 01/19] ARM: use CONFIG_AEABI by default everywhere
From: Nicolas Ferre @ 2026-07-02 7:42 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel, soc
Cc: linux-kernel, Arnd Bergmann, Aaro Koskinen, Alexander Sverdlin,
Alexandre Belloni, Alexandre Torgue, Andrew Lunn, Ard Biesheuvel,
Claudiu Beznea, Daniel Mack, Ethan Nelson-Moore, Frank Li,
Gregory Clement, Haojian Zhuang, Jeremy J. Peper,
Kristoffer Ericson, Krzysztof Kozlowski, Linus Walleij,
Mark Brown, Marc Zyngier, Mike Rapoport, Patrice Chotard,
Ralph Siemsen, Robert Jarzmik, Russell King, Sascha Hauer,
Sebastian Hesselbarth, Stefan Agner, Stefan Wiehler,
Tony Lindgren, Vladimir Zapolskiy, Will Deacon, Linus Walleij
In-Reply-To: <20260701212353.2196041-2-arnd@kernel.org>
On 01/07/2026 at 23:23, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@arndb.de>
>
> On ARMv4 and ARMv5, the default is still to build for OABI, with
> CONFIG_AEABI disabled, even though distros and toolchains no longer
> support OABI as a target.
>
> Change the default to EABI for all architecture levels and change
> the defconfig entries as follows:
>
> - All machines that used to explicitly enable EABI can drop that line now
> - Machines that are likely to actually use old distros and had NWFPE
> enabled in combination with OABI (rpc, footrbridge, netwinder,
> assabet, neponset) explicitly turn it on now.
> - Machines that already had both EABI and NWFPE disabled in defconfig
> (at91_dt, collie, ep93xx, gemini, h3600, imx_v4_v5, integrator, jornada,
For at91_dt, EABI was explicitly enabled (see below)...
> moxart, multi_v4t, omap1) were likely not usable with either OABI or
> EABI and now use EABI instead implicitly, making it more likely that
> they could work.
>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> arch/arm/Kconfig | 15 ++++++---------
> arch/arm/configs/am200epdkit_defconfig | 1 -
> arch/arm/configs/aspeed_g4_defconfig | 1 -
> arch/arm/configs/assabet_defconfig | 1 +
> arch/arm/configs/at91_dt_defconfig | 1 -
[..]
> diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
> index e331242dece7..320eb27a6a2e 100644
> --- a/arch/arm/configs/at91_dt_defconfig
> +++ b/arch/arm/configs/at91_dt_defconfig
> @@ -18,7 +18,6 @@ CONFIG_SOC_AT91SAM9=y
> CONFIG_SOC_SAM9X60=y
> CONFIG_SOC_SAM9X7=y
> # CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
> -CONFIG_AEABI=y
> CONFIG_UACCESS_WITH_MEMCPY=y
> # CONFIG_ATAGS is not set
> CONFIG_ARM_APPENDED_DTB=y
As AEABI is by default to y:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[..]
Thanks, best regards,
Nicolas
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: can: rockchip: add rk3588v2 CAN-FD compatible
From: Krzysztof Kozlowski @ 2026-07-02 7:43 UTC (permalink / raw)
To: 1579567540
Cc: Marc Kleine-Budde, linux-can, Vincent Mailhol, kernel,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel
In-Reply-To: <tencent_83A61C9A79199D04CC118A8026C435BFB907@qq.com>
On Wed, Jul 01, 2026 at 03:01:26PM +0800, 1579567540@qq.com wrote:
> From: luch00 <1579567540@qq.com>
>
> The RK3588 CAN-FD controller uses the same DT properties as the
> existing Rockchip CAN-FD blocks, so extend the current schema with a
DT properties have nothing to do here. Are you saying it is fully
compatible? Then express it properly with fallback.
> SoC-specific rockchip,rk3588v2-canfd compatible instead of creating a
> new binding file.
>
> Keep RK3588v2 as its own compatible rather than an rk3568v2 fallback.
Do not explain what you did. Explain WHY.
> Driver support uses separate match data and the RX FIFO count field
Driver is irrelevant here.
> layout differs from rk3568v2, so a dedicated compatible is the safer
> description.
>
> Signed-off-by: luch00 <1579567540@qq.com>
We do not take anonymous contributions.
> ---
> .../devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml b/Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml
> index a077c0330..aa31ec78e 100644
> --- a/Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml
> +++ b/Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml
> @@ -17,6 +17,7 @@ properties:
> compatible:
> oneOf:
> - const: rockchip,rk3568v2-canfd
> + - const: rockchip,rk3588v2-canfd
So that's just enum with previous entry
And why is this different from rk3588?
> - items:
> - const: rockchip,rk3568v3-canfd
> - const: rockchip,rk3568v2-canfd
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH v2 3/4] firmware: raspberrypi: Add reboot mode support
From: Gregor Herburger @ 2026-07-02 7:50 UTC (permalink / raw)
To: Stefan Wahren
Cc: Florian Fainelli, Broadcom internal kernel review list, Ray Jui,
Scott Branden, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Eric Anholt, linux-rpi-kernel, linux-arm-kernel, linux-kernel,
devicetree
In-Reply-To: <628b2768-80e6-4a7b-846f-d1124059f899@gmx.net>
Hi Stefan,
On Tue, Jun 30, 2026 at 11:57:49PM +0200, Stefan Wahren wrote:
> Hi Gregor,
>
> Am 30.06.26 um 22:59 schrieb Gregor Herburger:
> > +static int rpi_firmware_reboot_mode_write(struct reboot_mode_driver *reboot,
> > + unsigned int magic)
> > +{
> > + struct rpi_firmware *fw = container_of(reboot, struct rpi_firmware,
> > + reboot_mode);
> > + int ret = 0;
> > +
> > + if (magic)
> > + ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_REBOOT_FLAGS,
> > + &magic, sizeof(magic));
> I think it's more elegant to check for !magic and return 0 directly. So we
> can drop "ret".
> > +
> > + return ret;
> > +}
> > +
> > static int rpi_firmware_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > struct rpi_firmware *fw;
> > + int ret;
> > /*
> > * Memory will be freed by rpi_firmware_delete() once all users have
> > @@ -306,6 +323,12 @@ static int rpi_firmware_probe(struct platform_device *pdev)
> > rpi_register_hwmon_driver(dev, fw);
> > rpi_register_clk_driver(dev);
> > + fw->reboot_mode.dev = dev;
> > + fw->reboot_mode.write = rpi_firmware_reboot_mode_write;
> > + ret = devm_reboot_mode_register(dev, &fw->reboot_mode);
> > + if (ret)
> > + dev_err(dev, "Failed to register reboot mode: %d\n", ret);
> I suggest to move all of this code into a function called
> rpi_register_reboot_mode() ?
>
Ok, will do. Will wait a bit for more feedback and add this to the next version.
--
Gregor Herburger
Linutronix GmbH | Bahnhofstrasse 3 | D-88690 Uhldingen-Mühlhofen
Phone: +49 7556 25 999 35; Fax.: +49 7556 25 999 99
Hinweise zum Datenschutz finden Sie hier (Informations on data privacy
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Katharina Kopp, Alexander Gieringer
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: arm: altera: Add Agilex5 SoCDK TSN Config2 board board
From: Krzysztof Kozlowski @ 2026-07-02 7:16 UTC (permalink / raw)
To: muhammad.nazim.amirul.nazle.asmade
Cc: dinguyen, maxime.chevallier, rmk+kernel, krzk+dt, conor+dt, robh,
davem, edumazet, kuba, pabeni, andrew+netdev, devicetree,
linux-arm-kernel, netdev, linux-kernel
In-Reply-To: <20260630133108.27244-2-muhammad.nazim.amirul.nazle.asmade@altera.com>
On Tue, Jun 30, 2026 at 06:31:06AM -0700, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
>
> Add compatible string for the Intel SoCFPGA Agilex5 SoCDK TSN Config2
> board variant, which uses a dual-port TSN configuration where gmac1
> operates with different MAC-side (GMII) and PHY-side (RGMII) interface
> modes.
>
> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
> ---
> Documentation/devicetree/bindings/arm/altera.yaml | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/6] dt-bindings: soc: mediatek: mutex: Improve title and description
From: Krzysztof Kozlowski @ 2026-07-02 7:52 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: chunkuang.hu, p.zabel, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, robh, krzk+dt, conor+dt, mcoquelin.stm32,
alexandre.torgue, matthias.bgg, andi.shyti, djakov, broonie,
jitao.shi, ck.hu, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-stm32, linux-arm-kernel, justin.yeh,
jason-jh.lin, kernel
In-Reply-To: <20260701122043.19612-2-angelogioacchino.delregno@collabora.com>
On Wed, Jul 01, 2026 at 02:20:38PM +0200, AngeloGioacchino Del Regno wrote:
> Improve both the title and the description of this hardware to
> disambiguate its functionality from a hardware mutex and/or from
> a hwspinlock.
>
> Though in datasheets this is called "DISP_MUTEX", the meaning is
> is "Mute-X" (where "X" means "any hardware trigger signal") really
> as this is what this piece of hardware does: muting or unmuting of
> signals in each sub-IP of the display or other multimedia related
> controllers.
>
> Based on that, also clarify the description text, as to make sure
> that the information is actually accurate.
>
> While at it, also avoid forcing literal blocks in the description
> as there is nothing in there needing that (no ascii graph or other
> stuff that needs a literal block anyway), and add myself in the
> list of maintainers.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> .../bindings/soc/mediatek/mediatek,mutex.yaml | 17 ++++++++++-------
> 1 file changed, 10 insertions(+), 7 deletions(-)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/5] gpio: nomadik: convert nmk_gpio_populate_chip() to goto cleanup
From: Linus Walleij @ 2026-07-02 7:58 UTC (permalink / raw)
To: Théo Lebrun
Cc: Bartosz Golaszewski, Philipp Zabel, Vladimir Kondratiev,
Gregory CLEMENT, Benoît Monin, Tawfik Bayouk,
Thomas Petazzoni, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <20260701-gpio-nomadik-silent-v1-1-644d10316cef@bootlin.com>
On Wed, Jul 1, 2026 at 6:57 PM Théo Lebrun <theo.lebrun@bootlin.com> wrote:
> Remove duplicate teardown code that is found in all error if
> statements. Replace by goto-based cleanup labels.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 2/5] gpio: nomadik: add missing dev_err() call on chip populate failure
From: Linus Walleij @ 2026-07-02 7:58 UTC (permalink / raw)
To: Théo Lebrun
Cc: Bartosz Golaszewski, Philipp Zabel, Vladimir Kondratiev,
Gregory CLEMENT, Benoît Monin, Tawfik Bayouk,
Thomas Petazzoni, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <20260701-gpio-nomadik-silent-v1-2-644d10316cef@bootlin.com>
On Wed, Jul 1, 2026 at 6:57 PM Théo Lebrun <theo.lebrun@bootlin.com> wrote:
> All error paths of nmk_gpio_populate_chip() lead to logging errors but
> this one (ignoring the alloc or ioremap failures that must not log).
>
> Add the single missing dev_err() call.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 3/5] gpio: nomadik: drop duplicate probe error line
From: Linus Walleij @ 2026-07-02 7:59 UTC (permalink / raw)
To: Théo Lebrun
Cc: Bartosz Golaszewski, Philipp Zabel, Vladimir Kondratiev,
Gregory CLEMENT, Benoît Monin, Tawfik Bayouk,
Thomas Petazzoni, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <20260701-gpio-nomadik-silent-v1-3-644d10316cef@bootlin.com>
On Wed, Jul 1, 2026 at 6:57 PM Théo Lebrun <theo.lebrun@bootlin.com> wrote:
> Now that all error codepaths in nmk_gpio_populate_chip() log an error,
> drop dev_err() call that is made on nmk_gpio_populate_chip() failure.
>
> Current boot log:
>
> [ 0.544230] nomadik-gpio 1400000.gpio: failed getting reset control: -EPROBE_DEFER
> [ 0.544274] nomadik-gpio 1400000.gpio: could not populate nmk chip struct
>
> The second line is always redundant (or is logged when we shouldn't log,
> like ioremap or alloc failures).
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 4/5] gpio: nomadik: use dev_err_probe()
From: Linus Walleij @ 2026-07-02 7:59 UTC (permalink / raw)
To: Théo Lebrun
Cc: Bartosz Golaszewski, Philipp Zabel, Vladimir Kondratiev,
Gregory CLEMENT, Benoît Monin, Tawfik Bayouk,
Thomas Petazzoni, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <20260701-gpio-nomadik-silent-v1-4-644d10316cef@bootlin.com>
On Wed, Jul 1, 2026 at 6:57 PM Théo Lebrun <theo.lebrun@bootlin.com> wrote:
> gpio-nomadik depends on a few resources. In one case the reset is taking
> time to show up leading to a boot log containing:
>
> [ 0.544230] nomadik-gpio 1400000.gpio: failed getting reset control: -EPROBE_DEFER
>
> Fix by replacing all dev_err() calls that might be made at probe with
> dev_err_probe().
>
> On nomadik platforms, the nmk_gpio_populate_chip() log calls might
> attach their reasons to the gpio or pinctrl device depending on boot
> order.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH 3/6] dt-bindings: display: mediatek: Allow trigger-sources on relevant HW
From: Krzysztof Kozlowski @ 2026-07-02 7:59 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: chunkuang.hu, p.zabel, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, robh, krzk+dt, conor+dt, mcoquelin.stm32,
alexandre.torgue, matthias.bgg, andi.shyti, djakov, broonie,
jitao.shi, ck.hu, dri-devel, linux-mediatek, devicetree,
linux-kernel, linux-stm32, linux-arm-kernel, justin.yeh,
jason-jh.lin, kernel
In-Reply-To: <20260701122043.19612-4-angelogioacchino.delregno@collabora.com>
On Wed, Jul 01, 2026 at 02:20:40PM +0200, AngeloGioacchino Del Regno wrote:
> Most of the MediaTek Display Controller hardware sub-IPs need a
> specific (and reserved to them) MuteX trigger.
>
> Since now MuteX is a trigger source, allow specifying trigger
> sources in all of the display IPs that support one.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 5/5] gpio: nomadik: drop "chip registered" log on probe success
From: Linus Walleij @ 2026-07-02 8:00 UTC (permalink / raw)
To: Théo Lebrun
Cc: Bartosz Golaszewski, Philipp Zabel, Vladimir Kondratiev,
Gregory CLEMENT, Benoît Monin, Tawfik Bayouk,
Thomas Petazzoni, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <20260701-gpio-nomadik-silent-v1-5-644d10316cef@bootlin.com>
On Wed, Jul 1, 2026 at 6:57 PM Théo Lebrun <theo.lebrun@bootlin.com> wrote:
> Successful driver probing should be silent. Drop unconditional
> dev_info() call that is done at nmk_gpio_probe() exit.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
I actually don't generally agree, but you are using this driver more than
me now so let's go with your minimalist dmesg style for this driver.
Reviewed-by: Linus Walleij <linusw@kernel.org>
Yours,
Linus Walleij
^ permalink raw reply
* [PATCH v3 0/8] clk: sun6i-rtc: Add support for Allwinner A733 SoC
From: Jerome Brunet @ 2026-07-02 8:09 UTC (permalink / raw)
To: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Michael Turquette, Stephen Boyd, Maxime Ripard
Cc: linux-rtc, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, linux-clk, Sashiko, Jerome Brunet
Add support for the Allwinner A733 RTC and its internal Clock Control
Unit (CCU). Reuse the rtc-sun6i rtc driver while introducing a new
SoC-specific RTC CCU driver to handle the hardware's evolved clock
structure.
The A733 implementation supports hardware detection of three external
crystal frequencies (19.2MHz, 24MHz and 26MHz), which is represented in
the driver via read-only divider operations. Implement logic to derive a
normalized 32kHz reference from these DCXO sources using fixed
pre-dividers. Additionally, provide several new DCXO gate clocks for
peripherals, including SerDes, HDMI, and UFS.
This was tested on a Raxda Cubie A7A.
Changes in v3:
- Disallow clock-output-names DT property for h616/r329 chips
- Fix ccu probe helper to properly unregister clocks on error
- Implement .determine_rate for ccu divider RO ops
- Drop unused DCXO_CTRL_REG_EN define
- Link to v2: https://patch.msgid.link/20260629-a733-rtc-v2-0-7b72112784f8@baylibre.com
Changes in v2:
* Changed DT bindings as suggested. Those have changed significantly
since v1 so I did not pick up Rob's review trailer
* Support added in the existing RTC CCU driver rather than a separate driver
* Added DT parsing clean up of the existing driver
* Xtal detection exposed by RO divider rather than a MUX.
* Dropped conversion to aux device for now. This is not strictly related
the a733 support and will submitted again later on.
* Link to v1: https://lore.kernel.org/r/20260121-a733-rtc-v1-0-d359437f23a7@pigmoral.tech
---
Jerome Brunet (7):
dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
dt-bindings: rtc: sun6i: add sun60i-a733 support
clk: sunxi-ng: fix ccu probe clock unregister on error
clk: sunxi-ng: sun6i-rtc: clean up DT usage
clk: sunxi-ng: div: add read-only operation support
clk: sunxi-ng: sun6i-rtc: split main oscillator div and gate.
clk: sunxi-ng: sun6i-rtc: add a733 support
Junhui Liu (1):
clk: sunxi-ng: sun6i-rtc: Add feature bit for IOSC calibration
.../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 13 +++
drivers/clk/sunxi-ng/ccu-sun6i-rtc.c | 123 +++++++++++++++------
drivers/clk/sunxi-ng/ccu-sun6i-rtc.h | 3 +-
drivers/clk/sunxi-ng/ccu_common.c | 12 +-
drivers/clk/sunxi-ng/ccu_common.h | 1 +
drivers/clk/sunxi-ng/ccu_div.c | 42 +++++++
drivers/clk/sunxi-ng/ccu_div.h | 1 +
drivers/clk/sunxi-ng/ccu_mux.c | 3 +-
drivers/clk/sunxi-ng/ccu_mux.h | 4 +
include/dt-bindings/clock/sun6i-rtc.h | 4 +
10 files changed, 163 insertions(+), 43 deletions(-)
---
base-commit: dc59e4fea9d83f03bad6bddf3fa2e52491777482
change-id: 20251226-a733-rtc-c5167df14e6e
Best regards,
--
Jerome
^ permalink raw reply
* [PATCH v3 1/8] dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
From: Jerome Brunet @ 2026-07-02 8:10 UTC (permalink / raw)
To: Junhui Liu, Alexandre Belloni, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Chen-Yu Tsai, Jernej Skrabec, Samuel Holland,
Michael Turquette, Stephen Boyd, Maxime Ripard
Cc: linux-rtc, devicetree, linux-arm-kernel, linux-sunxi,
linux-kernel, linux-clk, Sashiko, Jerome Brunet
In-Reply-To: <20260702-a733-rtc-v3-0-eb2580374de6@baylibre.com>
On h616 and r329 chips, clock output names are never defined through DT and
are not meant to be. Just disallow the property for those chips.
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: http://lore.kernel.org/r/20260629125305.0DF981F000E9@smtp.kernel.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
index 9df5cdb6f63f..959a012c626f 100644
--- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
@@ -175,6 +175,18 @@ allOf:
interrupts:
minItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - allwinner,sun50i-h616-rtc
+ - allwinner,sun50i-r329-rtc
+
+ then:
+ properties:
+ clock-output-names: false
+
required:
- "#clock-cells"
- compatible
--
2.47.3
^ permalink raw reply related
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