* [PATCH v5 1/6] arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 2/6] arm64: dts: qcom: ipq5332: " Md Sadre Alam
` (4 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5424 SoC.
The IPQ5424 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No change
Change in [v4]
* No change
Change in [v3]
* Reformatted clocks, clock-names, dmas, and dma-names properties
to one entry per line
Change in [v2]
* No change
Change in [v1]
* Added qpic_bam node to describe BAM DMA controller
* Added spi nand support for IPQ5424
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 33 +++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index eb393f3fd728..f20cda429094 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -572,6 +572,39 @@ sdhc: mmc@7804000 {
status = "disabled";
};
+ qpic_bam: dma-controller@7984000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x0 0x07984000 0x0 0x1c000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_QPIC_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
+ qpic_nand: spi@79b0000 {
+ compatible = "qcom,ipq5424-snand", "qcom,ipq9574-snand";
+ reg = <0x0 0x079b0000 0x0 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&gcc GCC_QPIC_CLK>,
+ <&gcc GCC_QPIC_AHB_CLK>,
+ <&gcc GCC_QPIC_IO_MACRO_CLK>;
+ clock-names = "core",
+ "aon",
+ "iom";
+
+ dmas = <&qpic_bam 0>,
+ <&qpic_bam 1>,
+ <&qpic_bam 2>;
+ dma-names = "tx",
+ "rx",
+ "cmd";
+
+ status = "disabled";
+ };
+
intc: interrupt-controller@f200000 {
compatible = "arm,gic-v3";
reg = <0 0xf200000 0 0x10000>, /* GICD */
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 2/6] arm64: dts: qcom: ipq5332: Add QPIC SPI NAND controller support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 1/6] arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 3/6] arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support Md Sadre Alam
` (3 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5332 SoC.
The IPQ5332 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No change
Change in [v4]
* No change
Change in [v3]
* Reformatted clocks, clock-names, dmas, and dma-names properties
to one entry per line
Change in [v2]
* No change
Change in [v1]
* Added qpic_bam node to describe BAM DMA controller
* Added spi nand support for IPQ5332
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 33 +++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 45fc512a3bab..e227730d99a6 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -423,6 +423,39 @@ blsp1_spi2: spi@78b7000 {
status = "disabled";
};
+ qpic_bam: dma-controller@7984000 {
+ compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+ reg = <0x07984000 0x1c000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_QPIC_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ status = "disabled";
+ };
+
+ qpic_nand: spi@79b0000 {
+ compatible = "qcom,ipq5332-snand", "qcom,ipq9574-snand";
+ reg = <0x079b0000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&gcc GCC_QPIC_CLK>,
+ <&gcc GCC_QPIC_AHB_CLK>,
+ <&gcc GCC_QPIC_IO_MACRO_CLK>;
+ clock-names = "core",
+ "aon",
+ "iom";
+
+ dmas = <&qpic_bam 0>,
+ <&qpic_bam 1>,
+ <&qpic_bam 2>;
+ dma-names = "tx",
+ "rx",
+ "cmd";
+
+ status = "disabled";
+ };
+
usb: usb@8af8800 {
compatible = "qcom,ipq5332-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 3/6] arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 1/6] arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 2/6] arm64: dts: qcom: ipq5332: " Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 4/6] arm64: dts: qcom: pq5332-rdp-common: " Md Sadre Alam
` (2 subsequent siblings)
5 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466
reference design platform.
The RDP466 board features a SPI NAND flash device connected to the QPIC
controller for primary storage. This patch enables the QPIC BAM DMA
controller and SPI NAND interface of QPIC, and configures the necessary
pin control settings for proper operation.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No Change
Change in [v4]
* No Change
Change in [v3]
* No Change
Change in [v2]
* Added Reviewed-by tag
* Added \n before status in qpic_nand node
Change in [v1]
* Enable bam and spi nand for ipq5424
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 44 +++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index 738618551203..7c32fb8f9f73 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -224,6 +224,29 @@ data-pins {
};
};
+ qpic_snand_default_state: qpic-snand-default-state {
+ clock-pins {
+ pins = "gpio5";
+ function = "qspi_clk";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ cs-pins {
+ pins = "gpio4";
+ function = "qspi_cs";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ function = "qspi_data";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ };
+
uart0_pins: uart0-default-state {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "uart0";
@@ -246,6 +269,27 @@ pcie3_default_state: pcie3-default-state {
};
};
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ pinctrl-0 = <&qpic_snand_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-engine = <&qpic_nand>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ };
+};
+
&uart0 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 4/6] arm64: dts: qcom: pq5332-rdp-common: Enable QPIC SPI NAND support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
` (2 preceding siblings ...)
2026-02-23 10:05 ` [PATCH v5 3/6] arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support Md Sadre Alam
2026-02-23 10:05 ` [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: " Md Sadre Alam
5 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Enable QPIC SPI NAND flash controller support on the IPQ5332 reference
design platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No change
Change in [v4]
* No change
Change in [v3]
* Added Reviewed-by tag
Change in [v2]
* No change
Change in [v1]
.../boot/dts/qcom/ipq5332-rdp-common.dtsi | 44 +++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi
index b37ae7749083..8967861be5fd 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi
@@ -78,4 +78,48 @@ gpio_leds_default: gpio-leds-default-state {
drive-strength = <8>;
bias-pull-down;
};
+
+ qpic_snand_default_state: qpic-snand-default-state {
+ clock-pins {
+ pins = "gpio13";
+ function = "qspi_clk";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cs-pins {
+ pins = "gpio12";
+ function = "qspi_cs";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ data-pins {
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ function = "qspi_data";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&qpic_nand {
+ pinctrl-0 = <&qpic_snand_default_state>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ flash@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ nand-ecc-engine = <&qpic_nand>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ };
};
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
` (3 preceding siblings ...)
2026-02-23 10:05 ` [PATCH v5 4/6] arm64: dts: qcom: pq5332-rdp-common: " Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 14:59 ` Krzysztof Kozlowski
2026-02-23 10:05 ` [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: " Md Sadre Alam
5 siblings, 1 reply; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Remove eMMC support from the IPQ5424 RDP466 board configuration to
resolve GPIO pin conflicts with SPI NAND interface.
The IPQ5424 RDP466 board is designed with NOR + NAND as the default boot
mode configuration. The eMMC controller and SPI NAND controller share
the same GPIO pins, creating a hardware conflict:
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No change
Change in [v4]
* No change
Change in [v3]
* Added Reviewed-by tag
Change in [v2]
* updated board name commit message header
Change in [v1]
* Removed eMMC node
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 30 ---------------------
1 file changed, 30 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index 7c32fb8f9f73..de71b72ae6dc 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -124,13 +124,6 @@ &qusb_phy_1 {
status = "okay";
};
-&sdhc {
- pinctrl-0 = <&sdc_default_state>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
&sleep_clk {
clock-frequency = <32000>;
};
@@ -201,29 +194,6 @@ mosi-pins {
};
};
- sdc_default_state: sdc-default-state {
- clk-pins {
- pins = "gpio5";
- function = "sdc_clk";
- drive-strength = <8>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio4";
- function = "sdc_cmd";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "sdc_data";
- drive-strength = <8>;
- bias-pull-up;
- };
- };
-
qpic_snand_default_state: qpic-snand-default-state {
clock-pins {
pins = "gpio5";
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support
2026-02-23 10:05 ` [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support Md Sadre Alam
@ 2026-02-23 14:59 ` Krzysztof Kozlowski
2026-02-27 6:11 ` Md Sadre Alam
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-02-23 14:59 UTC (permalink / raw)
To: Md Sadre Alam, andersson, konradybcio, robh, krzk+dt, conor+dt,
linux-arm-msm, devicetree, linux-kernel
On 23/02/2026 11:05, Md Sadre Alam wrote:
> Remove eMMC support from the IPQ5424 RDP466 board configuration to
> resolve GPIO pin conflicts with SPI NAND interface.
>
> The IPQ5424 RDP466 board is designed with NOR + NAND as the default boot
> mode configuration. The eMMC controller and SPI NAND controller share
> the same GPIO pins, creating a hardware conflict:
This *MUST* be squashed. If it conflicts then your previous patch was
not correct.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support
2026-02-23 14:59 ` Krzysztof Kozlowski
@ 2026-02-27 6:11 ` Md Sadre Alam
0 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-27 6:11 UTC (permalink / raw)
To: Krzysztof Kozlowski, andersson, konradybcio, robh, krzk+dt,
conor+dt, linux-arm-msm, devicetree, linux-kernel
Hi,
On 2/23/2026 8:29 PM, Krzysztof Kozlowski wrote:
> On 23/02/2026 11:05, Md Sadre Alam wrote:
>> Remove eMMC support from the IPQ5424 RDP466 board configuration to
>> resolve GPIO pin conflicts with SPI NAND interface.
>>
>> The IPQ5424 RDP466 board is designed with NOR + NAND as the default boot
>> mode configuration. The eMMC controller and SPI NAND controller share
>> the same GPIO pins, creating a hardware conflict:
>
> This *MUST* be squashed. If it conflicts then your previous patch was
> not correct.
I will squash the patches and update this in the next revision
Thanks,
Alam.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: Remove eMMC support
2026-02-23 10:05 [PATCH v5 0/6] Add QPIC SPI NAND support for IPQ5424 and IPQ5332 platforms Md Sadre Alam
` (4 preceding siblings ...)
2026-02-23 10:05 ` [PATCH v5 5/6] arm64: dts: qcom: ipq5424-rdp466: Remove eMMC support Md Sadre Alam
@ 2026-02-23 10:05 ` Md Sadre Alam
2026-02-23 15:00 ` Krzysztof Kozlowski
5 siblings, 1 reply; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-23 10:05 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_mdalam
Remove eMMC support from the IPQ5332 RDP442 board configuration to
align with the board's default NOR+NAND boot mode design.
The IPQ5332 RDP442 board is designed with NOR+NAND as the default boot
mode configuration. The eMMC and SPI NAND interface share
same GPIO
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
---
Change in [v5]
* No change
Change in [v4]
* No change
Change in [v3]
* Added Reviewed-by tag
Change in [v2]
* updated board name commit message header
Change in [v1]
* Removed eMMC node
arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts | 34 ---------------------
1 file changed, 34 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts
index ed8a54eb95c0..6e2abde9ed89 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts
@@ -35,17 +35,6 @@ flash@0 {
};
};
-&sdhc {
- bus-width = <4>;
- max-frequency = <192000000>;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- non-removable;
- pinctrl-0 = <&sdc_default_state>;
- pinctrl-names = "default";
- status = "okay";
-};
-
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
@@ -54,29 +43,6 @@ i2c_1_pins: i2c-1-state {
bias-pull-up;
};
- sdc_default_state: sdc-default-state {
- clk-pins {
- pins = "gpio13";
- function = "sdc_clk";
- drive-strength = <8>;
- bias-disable;
- };
-
- cmd-pins {
- pins = "gpio12";
- function = "sdc_cmd";
- drive-strength = <8>;
- bias-pull-up;
- };
-
- data-pins {
- pins = "gpio8", "gpio9", "gpio10", "gpio11";
- function = "sdc_data";
- drive-strength = <8>;
- bias-pull-up;
- };
- };
-
spi_0_data_clk_pins: spi-0-data-clk-state {
pins = "gpio14", "gpio15", "gpio16";
function = "blsp0_spi";
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: Remove eMMC support
2026-02-23 10:05 ` [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: " Md Sadre Alam
@ 2026-02-23 15:00 ` Krzysztof Kozlowski
2026-02-27 6:14 ` Md Sadre Alam
0 siblings, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-02-23 15:00 UTC (permalink / raw)
To: Md Sadre Alam, andersson, konradybcio, robh, krzk+dt, conor+dt,
linux-arm-msm, devicetree, linux-kernel
On 23/02/2026 11:05, Md Sadre Alam wrote:
> Remove eMMC support from the IPQ5332 RDP442 board configuration to
> align with the board's default NOR+NAND boot mode design.
>
> The IPQ5332 RDP442 board is designed with NOR+NAND as the default boot
> mode configuration. The eMMC and SPI NAND interface share
> same GPIO
This is not a separate patch and it makes no sense to do it separately.
You do it because you added NAND, so this is part of the NAND patch.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v5 6/6] arm64: dts: qcom: ipq5332-rdp442: Remove eMMC support
2026-02-23 15:00 ` Krzysztof Kozlowski
@ 2026-02-27 6:14 ` Md Sadre Alam
0 siblings, 0 replies; 11+ messages in thread
From: Md Sadre Alam @ 2026-02-27 6:14 UTC (permalink / raw)
To: Krzysztof Kozlowski, andersson, konradybcio, robh, krzk+dt,
conor+dt, linux-arm-msm, devicetree, linux-kernel
Hi,
On 2/23/2026 8:30 PM, Krzysztof Kozlowski wrote:
> On 23/02/2026 11:05, Md Sadre Alam wrote:
>> Remove eMMC support from the IPQ5332 RDP442 board configuration to
>> align with the board's default NOR+NAND boot mode design.
>>
>> The IPQ5332 RDP442 board is designed with NOR+NAND as the default boot
>> mode configuration. The eMMC and SPI NAND interface share
>> same GPIO
>
> This is not a separate patch and it makes no sense to do it separately.
> You do it because you added NAND, so this is part of the NAND patch.
I will merge this into the NAND patch and update it in the next revision.
Thanks,
Alam.
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