From: patchwork-bot+linux-arm-msm@kernel.org
To: Loic Poulain <loic.poulain@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v2] bus: mhi: Ensure correct ring update ordering with memory barrier
Date: Mon, 01 Mar 2021 19:59:45 +0000 [thread overview]
Message-ID: <161462878547.6187.11431888554181670154.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <1606403201-5656-1-git-send-email-loic.poulain@linaro.org>
Hello:
This patch was applied to qcom/linux.git (refs/heads/for-next):
On Thu, 26 Nov 2020 16:06:41 +0100 you wrote:
> The ring element data, though being part of coherent memory, still need
> to be performed before updating the ring context to point to this new
> element. That can be guaranteed with a memory barrier (dma_wmb).
>
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> ---
> v2: fix comment style
>
> [...]
Here is the summary with links:
- [v2] bus: mhi: Ensure correct ring update ordering with memory barrier
https://git.kernel.org/qcom/c/f49b6aeb5c45
You are awesome, thank you!
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prev parent reply other threads:[~2021-03-01 20:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-26 15:06 [PATCH v2] bus: mhi: Ensure correct ring update ordering with memory barrier Loic Poulain
2020-11-27 17:32 ` Jeffrey Hugo
2020-11-28 6:03 ` Manivannan Sadhasivam
2020-11-30 8:18 ` Loic Poulain
2020-11-30 15:18 ` Jeffrey Hugo
2020-11-30 15:13 ` Jeffrey Hugo
2021-01-06 13:09 ` Manivannan Sadhasivam
2021-01-06 13:11 ` Manivannan Sadhasivam
2021-03-01 19:59 ` patchwork-bot+linux-arm-msm [this message]
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