* [PATCH] clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
@ 2023-07-25 8:51 Konrad Dybcio
2023-07-28 4:08 ` Bjorn Andersson
0 siblings, 1 reply; 2+ messages in thread
From: Konrad Dybcio @ 2023-07-25 8:51 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Michael Turquette, Stephen Boyd
Cc: Marijn Suijten, linux-arm-msm, linux-clk, linux-kernel,
Konrad Dybcio
The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.
Fixes: 4a66e76fdb6d ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/clk/qcom/dispcc-sc8280xp.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-sc8280xp.c b/drivers/clk/qcom/dispcc-sc8280xp.c
index 167470beb369..30f636b9f0ec 100644
--- a/drivers/clk/qcom/dispcc-sc8280xp.c
+++ b/drivers/clk/qcom/dispcc-sc8280xp.c
@@ -3057,7 +3057,7 @@ static struct gdsc disp0_mdss_gdsc = {
.name = "disp0_mdss_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = HW_CTRL,
+ .flags = HW_CTRL | RETAIN_FF_ENABLE,
};
static struct gdsc disp1_mdss_gdsc = {
@@ -3069,7 +3069,7 @@ static struct gdsc disp1_mdss_gdsc = {
.name = "disp1_mdss_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = HW_CTRL,
+ .flags = HW_CTRL | RETAIN_FF_ENABLE,
};
static struct gdsc disp0_mdss_int2_gdsc = {
@@ -3081,7 +3081,7 @@ static struct gdsc disp0_mdss_int2_gdsc = {
.name = "disp0_mdss_int2_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = HW_CTRL,
+ .flags = HW_CTRL | RETAIN_FF_ENABLE,
};
static struct gdsc disp1_mdss_int2_gdsc = {
@@ -3093,7 +3093,7 @@ static struct gdsc disp1_mdss_int2_gdsc = {
.name = "disp1_mdss_int2_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
- .flags = HW_CTRL,
+ .flags = HW_CTRL | RETAIN_FF_ENABLE,
};
static struct gdsc *disp0_cc_sc8280xp_gdscs[] = {
---
base-commit: 1e25dd7772483f477f79986d956028e9f47f990a
change-id: 20230725-topic-8280_dispcc_gdsc-b1a7f3e51f3c
Best regards,
--
Konrad Dybcio <konrad.dybcio@linaro.org>
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
2023-07-25 8:51 [PATCH] clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs Konrad Dybcio
@ 2023-07-28 4:08 ` Bjorn Andersson
0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Andersson @ 2023-07-28 4:08 UTC (permalink / raw)
To: Andy Gross, Michael Turquette, Stephen Boyd, Konrad Dybcio
Cc: Marijn Suijten, linux-arm-msm, linux-clk, linux-kernel
On Tue, 25 Jul 2023 10:51:56 +0200, Konrad Dybcio wrote:
> The DISP_CC GDSCs have not been instructed to use the ret registers.
> Fix that.
>
>
Applied, thanks!
[1/1] clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
commit: 20e1d75bc043c5ec1fd8f5169fde17db89eb11c3
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 2+ messages in thread
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