Linux ARM-MSM sub-architecture
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From: Bjorn Andersson <andersson@kernel.org>
To: krzysztof.kozlowski@linaro.org, konrad.dybcio@linaro.org,
	wangkaiyuan <wangkaiyuan@inspur.com>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] soc: qcom: icc-bwmon: Convert to use maple tree register cache
Date: Sun, 17 Mar 2024 11:27:20 -0500	[thread overview]
Message-ID: <171069283518.134123.993755796831857709.b4-ty@kernel.org> (raw)
In-Reply-To: <20240309072825.45385-1-wangkaiyuan@inspur.com>


On Sat, 09 Mar 2024 15:28:25 +0800, wangkaiyuan wrote:
> The maple tree register cache is based on a much more modern data structure
> than the rbtree cache and makes optimisation choices which are probably
> more appropriate for modern systems than those made by the rbtree cache.
> 
> 

Applied, thanks!

[1/1] soc: qcom: icc-bwmon: Convert to use maple tree register cache
      commit: a8adf216136a16f8b31ece4455f60d59db3d6d62

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

      parent reply	other threads:[~2024-03-17 16:27 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-09  7:28 [PATCH] soc: qcom: icc-bwmon: Convert to use maple tree register cache wangkaiyuan
2024-03-09  9:54 ` Krzysztof Kozlowski
2024-03-17 16:27 ` Bjorn Andersson [this message]

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