Linux ARM-MSM sub-architecture
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From: Bjorn Andersson <andersson@kernel.org>
To: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Vinod Koul <vkoul@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Subject: Re: [PATCH] clk: qcom: gcc-sm8450: set OPS_PARENT_ENABLE on gcc_sdcc2_apps_clk_src
Date: Sat, 27 Apr 2024 14:34:21 -0500	[thread overview]
Message-ID: <171424646112.1448451.8203210233277643102.b4-ty@kernel.org> (raw)
In-Reply-To: <20240427-topic-8450sdc2-v1-1-631cbb59e0e5@linaro.org>


On Sat, 27 Apr 2024 14:01:07 +0200, Konrad Dybcio wrote:
> Similar to how it works on other SoCs, the top frequency of the SDHCI2
> core clock is generated by a separate PLL (peculiar design choice) that
> is not guaranteed to be enabled (why does the clock framework not handle
> this by default?).
> 
> Add the CLK_OPS_PARENT_ENABLE flag to make sure we're not muxing the
> RCG input to a dormant source.
> 
> [...]

Applied, thanks!

[1/1] clk: qcom: gcc-sm8450: set OPS_PARENT_ENABLE on gcc_sdcc2_apps_clk_src
      commit: 2ee7aabf9e25628c7bd17ed650cac84419d12eb1

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

  reply	other threads:[~2024-04-27 19:34 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-27 12:01 [PATCH] clk: qcom: gcc-sm8450: set OPS_PARENT_ENABLE on gcc_sdcc2_apps_clk_src Konrad Dybcio
2024-04-27 19:34 ` Bjorn Andersson [this message]
2024-04-30  0:21 ` Stephen Boyd
2024-04-30 10:46   ` Konrad Dybcio
2024-04-30 21:26     ` Stephen Boyd
2024-05-07 13:51       ` Konrad Dybcio
2024-05-07 20:28         ` Stephen Boyd
2024-05-07 21:17           ` Konrad Dybcio
2024-05-07 21:52             ` Stephen Boyd
2024-06-06 11:56               ` Konrad Dybcio
2024-06-08  0:10                 ` Konrad Dybcio

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