* [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
@ 2025-10-23 4:38 Manikanta Mylavarapu
2025-10-23 8:39 ` Konrad Dybcio
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Manikanta Mylavarapu @ 2025-10-23 4:38 UTC (permalink / raw)
To: andersson, konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm,
devicetree, linux-kernel
Cc: quic_srichara, quic_varada, kathiravan.thirumoorthy
Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
passive trip points with CPU cooling devices. This enables proper
thermal mitigation by allowing the thermal framework to throttle CPUs
based on temperature thresholds. Also, label the trip points to allow
referencing them in the cooling maps.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
---
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 61 +++++++++++++++++++++++----
1 file changed, 53 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index ef2b52f3597d..e4a51eeefeac 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/qcom,ipq5424-gcc.h>
#include <dt-bindings/interconnect/qcom,ipq5424.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
#address-cells = <2>;
@@ -57,6 +58,7 @@ cpu0: cpu@0 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+ #cooling-cells = <2>;
l2_0: l2-cache {
compatible = "cache";
@@ -82,6 +84,7 @@ cpu1: cpu@100 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+ #cooling-cells = <2>;
l2_100: l2-cache {
compatible = "cache";
@@ -101,6 +104,7 @@ cpu2: cpu@200 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+ #cooling-cells = <2>;
l2_200: l2-cache {
compatible = "cache";
@@ -120,6 +124,7 @@ cpu3: cpu@300 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
+ #cooling-cells = <2>;
l2_300: l2-cache {
compatible = "cache";
@@ -1235,18 +1240,28 @@ cpu0-thermal {
thermal-sensors = <&tsens 14>;
trips {
- cpu-critical {
+ cpu0_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
- cpu-passive {
+ cpu0_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu1-thermal {
@@ -1254,18 +1269,28 @@ cpu1-thermal {
thermal-sensors = <&tsens 12>;
trips {
- cpu-critical {
+ cpu1_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
- cpu-passive {
+ cpu1_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu2-thermal {
@@ -1273,18 +1298,28 @@ cpu2-thermal {
thermal-sensors = <&tsens 11>;
trips {
- cpu-critical {
+ cpu2_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
- cpu-passive {
+ cpu2_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
cpu3-thermal {
@@ -1292,18 +1327,28 @@ cpu3-thermal {
thermal-sensors = <&tsens 13>;
trips {
- cpu-critical {
+ cpu3_crit: cpu-critical {
temperature = <120000>;
hysteresis = <9000>;
type = "critical";
};
- cpu-passive {
+ cpu3_alert: cpu-passive {
temperature = <110000>;
hysteresis = <9000>;
type = "passive";
};
};
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
wcss-tile2-thermal {
base-commit: fe45352cd106ae41b5ad3f0066c2e54dbb2dfd70
--
2.34.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
2025-10-23 4:38 [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones Manikanta Mylavarapu
@ 2025-10-23 8:39 ` Konrad Dybcio
2025-10-23 12:21 ` Manikanta Mylavarapu
2025-10-27 18:47 ` Bjorn Andersson
2025-10-27 22:37 ` Bjorn Andersson
2 siblings, 1 reply; 6+ messages in thread
From: Konrad Dybcio @ 2025-10-23 8:39 UTC (permalink / raw)
To: Manikanta Mylavarapu, andersson, konradybcio, robh, krzk+dt,
conor+dt, linux-arm-msm, devicetree, linux-kernel
Cc: quic_srichara, quic_varada, kathiravan.thirumoorthy
On 10/23/25 6:38 AM, Manikanta Mylavarapu wrote:
> Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
> passive trip points with CPU cooling devices. This enables proper
> thermal mitigation by allowing the thermal framework to throttle CPUs
> based on temperature thresholds. Also, label the trip points to allow
> referencing them in the cooling maps.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---
[...]
> cpu1-thermal {
> @@ -1254,18 +1269,28 @@ cpu1-thermal {
> thermal-sensors = <&tsens 12>;
>
> trips {
> - cpu-critical {
> + cpu1_crit: cpu-critical {
> temperature = <120000>;
> hysteresis = <9000>;
> type = "critical";
> };
>
> - cpu-passive {
> + cpu1_alert: cpu-passive {
> temperature = <110000>;
> hysteresis = <9000>;
> type = "passive";
> };
This means "software will start throttling the cpufreq at 110C"
Is this what you want?
Also, is there nothing like LMH on this platform that throttles the
device way earlier, without OS intervention?
Konrad
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
2025-10-23 8:39 ` Konrad Dybcio
@ 2025-10-23 12:21 ` Manikanta Mylavarapu
2025-10-23 14:26 ` Konrad Dybcio
0 siblings, 1 reply; 6+ messages in thread
From: Manikanta Mylavarapu @ 2025-10-23 12:21 UTC (permalink / raw)
To: Konrad Dybcio, andersson, konradybcio, robh, krzk+dt, conor+dt,
linux-arm-msm, devicetree, linux-kernel
Cc: quic_srichara, quic_varada, kathiravan.thirumoorthy
On 10/23/2025 2:09 PM, Konrad Dybcio wrote:
> On 10/23/25 6:38 AM, Manikanta Mylavarapu wrote:
>> Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
>> passive trip points with CPU cooling devices. This enables proper
>> thermal mitigation by allowing the thermal framework to throttle CPUs
>> based on temperature thresholds. Also, label the trip points to allow
>> referencing them in the cooling maps.
>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>> ---
>
> [...]
>
>> cpu1-thermal {
>> @@ -1254,18 +1269,28 @@ cpu1-thermal {
>> thermal-sensors = <&tsens 12>;
>>
>> trips {
>> - cpu-critical {
>> + cpu1_crit: cpu-critical {
>> temperature = <120000>;
>> hysteresis = <9000>;
>> type = "critical";
>> };
>>
>> - cpu-passive {
>> + cpu1_alert: cpu-passive {
>> temperature = <110000>;
>> hysteresis = <9000>;
>> type = "passive";
>> };
>
> This means "software will start throttling the cpufreq at 110C"
>
> Is this what you want?
>
Hi Konrad,
Thank you for reviewing the patch.
Yes, the intent is to initiate software-based cpufreq throttling at 110°C.
> Also, is there nothing like LMH on this platform that throttles the
> device way earlier, without OS intervention?
>
IPQ5424 platform does not support LMH.
Thanks & Regards,
Manikanta.
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
2025-10-23 12:21 ` Manikanta Mylavarapu
@ 2025-10-23 14:26 ` Konrad Dybcio
0 siblings, 0 replies; 6+ messages in thread
From: Konrad Dybcio @ 2025-10-23 14:26 UTC (permalink / raw)
To: Manikanta Mylavarapu, andersson, konradybcio, robh, krzk+dt,
conor+dt, linux-arm-msm, devicetree, linux-kernel
Cc: quic_srichara, quic_varada, kathiravan.thirumoorthy
On 10/23/25 2:21 PM, Manikanta Mylavarapu wrote:
>
>
> On 10/23/2025 2:09 PM, Konrad Dybcio wrote:
>> On 10/23/25 6:38 AM, Manikanta Mylavarapu wrote:
>>> Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
>>> passive trip points with CPU cooling devices. This enables proper
>>> thermal mitigation by allowing the thermal framework to throttle CPUs
>>> based on temperature thresholds. Also, label the trip points to allow
>>> referencing them in the cooling maps.
>>>
>>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>>> ---
>>
>> [...]
>>
>>> cpu1-thermal {
>>> @@ -1254,18 +1269,28 @@ cpu1-thermal {
>>> thermal-sensors = <&tsens 12>;
>>>
>>> trips {
>>> - cpu-critical {
>>> + cpu1_crit: cpu-critical {
>>> temperature = <120000>;
>>> hysteresis = <9000>;
>>> type = "critical";
>>> };
>>>
>>> - cpu-passive {
>>> + cpu1_alert: cpu-passive {
>>> temperature = <110000>;
>>> hysteresis = <9000>;
>>> type = "passive";
>>> };
>>
>> This means "software will start throttling the cpufreq at 110C"
>>
>> Is this what you want?
>>
>
> Hi Konrad,
>
> Thank you for reviewing the patch.
>
> Yes, the intent is to initiate software-based cpufreq throttling at 110°C.
>
>> Also, is there nothing like LMH on this platform that throttles the
>> device way earlier, without OS intervention?
>>
>
> IPQ5424 platform does not support LMH.
Thanks for confirming
Usually it seems like the trips are ordered by temperature but I don't
think there's a strong preference
The hysteresis value is a little high, but I'm assuming that came out of
some internal tuning
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
2025-10-23 4:38 [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones Manikanta Mylavarapu
2025-10-23 8:39 ` Konrad Dybcio
@ 2025-10-27 18:47 ` Bjorn Andersson
2025-10-27 22:37 ` Bjorn Andersson
2 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2025-10-27 18:47 UTC (permalink / raw)
To: Manikanta Mylavarapu
Cc: konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-kernel, quic_srichara, quic_varada, kathiravan.thirumoorthy
On Thu, Oct 23, 2025 at 10:08:38AM +0530, Manikanta Mylavarapu wrote:
> Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
> passive trip points with CPU cooling devices. This enables proper
> thermal mitigation by allowing the thermal framework to throttle CPUs
> based on temperature thresholds. Also, label the trip points to allow
> referencing them in the cooling maps.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Please use oss.qualcomm.com going forward.
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/ipq5424.dtsi | 61 +++++++++++++++++++++++----
> 1 file changed, 53 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> index ef2b52f3597d..e4a51eeefeac 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> @@ -13,6 +13,7 @@
> #include <dt-bindings/reset/qcom,ipq5424-gcc.h>
> #include <dt-bindings/interconnect/qcom,ipq5424.h>
> #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> #address-cells = <2>;
> @@ -57,6 +58,7 @@ cpu0: cpu@0 {
> clock-names = "cpu";
> operating-points-v2 = <&cpu_opp_table>;
> interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
> + #cooling-cells = <2>;
>
> l2_0: l2-cache {
> compatible = "cache";
> @@ -82,6 +84,7 @@ cpu1: cpu@100 {
> clock-names = "cpu";
> operating-points-v2 = <&cpu_opp_table>;
> interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
> + #cooling-cells = <2>;
>
> l2_100: l2-cache {
> compatible = "cache";
> @@ -101,6 +104,7 @@ cpu2: cpu@200 {
> clock-names = "cpu";
> operating-points-v2 = <&cpu_opp_table>;
> interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
> + #cooling-cells = <2>;
>
> l2_200: l2-cache {
> compatible = "cache";
> @@ -120,6 +124,7 @@ cpu3: cpu@300 {
> clock-names = "cpu";
> operating-points-v2 = <&cpu_opp_table>;
> interconnects = <&apss_clk MASTER_CPU &apss_clk SLAVE_L3>;
> + #cooling-cells = <2>;
>
> l2_300: l2-cache {
> compatible = "cache";
> @@ -1235,18 +1240,28 @@ cpu0-thermal {
> thermal-sensors = <&tsens 14>;
>
> trips {
> - cpu-critical {
> + cpu0_crit: cpu-critical {
> temperature = <120000>;
> hysteresis = <9000>;
> type = "critical";
> };
>
> - cpu-passive {
> + cpu0_alert: cpu-passive {
> temperature = <110000>;
> hysteresis = <9000>;
> type = "passive";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu0_alert>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> cpu1-thermal {
> @@ -1254,18 +1269,28 @@ cpu1-thermal {
> thermal-sensors = <&tsens 12>;
>
> trips {
> - cpu-critical {
> + cpu1_crit: cpu-critical {
> temperature = <120000>;
> hysteresis = <9000>;
> type = "critical";
> };
>
> - cpu-passive {
> + cpu1_alert: cpu-passive {
> temperature = <110000>;
> hysteresis = <9000>;
> type = "passive";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu1_alert>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> cpu2-thermal {
> @@ -1273,18 +1298,28 @@ cpu2-thermal {
> thermal-sensors = <&tsens 11>;
>
> trips {
> - cpu-critical {
> + cpu2_crit: cpu-critical {
> temperature = <120000>;
> hysteresis = <9000>;
> type = "critical";
> };
>
> - cpu-passive {
> + cpu2_alert: cpu-passive {
> temperature = <110000>;
> hysteresis = <9000>;
> type = "passive";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu2_alert>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> cpu3-thermal {
> @@ -1292,18 +1327,28 @@ cpu3-thermal {
> thermal-sensors = <&tsens 13>;
>
> trips {
> - cpu-critical {
> + cpu3_crit: cpu-critical {
> temperature = <120000>;
> hysteresis = <9000>;
> type = "critical";
> };
>
> - cpu-passive {
> + cpu3_alert: cpu-passive {
> temperature = <110000>;
> hysteresis = <9000>;
> type = "passive";
> };
> };
> +
> + cooling-maps {
> + map0 {
> + trip = <&cpu3_alert>;
> + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> };
>
> wcss-tile2-thermal {
>
> base-commit: fe45352cd106ae41b5ad3f0066c2e54dbb2dfd70
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
2025-10-23 4:38 [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones Manikanta Mylavarapu
2025-10-23 8:39 ` Konrad Dybcio
2025-10-27 18:47 ` Bjorn Andersson
@ 2025-10-27 22:37 ` Bjorn Andersson
2 siblings, 0 replies; 6+ messages in thread
From: Bjorn Andersson @ 2025-10-27 22:37 UTC (permalink / raw)
To: konradybcio, robh, krzk+dt, conor+dt, linux-arm-msm, devicetree,
linux-kernel, Manikanta Mylavarapu
Cc: quic_srichara, quic_varada, kathiravan.thirumoorthy
On Thu, 23 Oct 2025 10:08:38 +0530, Manikanta Mylavarapu wrote:
> Add cooling-maps to the cpu1, cpu2, and cpu3 thermal zones to associate
> passive trip points with CPU cooling devices. This enables proper
> thermal mitigation by allowing the thermal framework to throttle CPUs
> based on temperature thresholds. Also, label the trip points to allow
> referencing them in the cooling maps.
>
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones
commit: d5e86096feb689c9f5d9aa07c913747ba430a600
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
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2025-10-23 4:38 [PATCH v1] arm64: dts: qcom: ipq5424: add cooling maps for CPU thermal zones Manikanta Mylavarapu
2025-10-23 8:39 ` Konrad Dybcio
2025-10-23 12:21 ` Manikanta Mylavarapu
2025-10-23 14:26 ` Konrad Dybcio
2025-10-27 18:47 ` Bjorn Andersson
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