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From: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	cros-qcom-dts-watchers@chromium.org,
	linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 3/6] arm64: dts: qcom: talos: Add QSPI support
Date: Mon, 30 Mar 2026 16:53:45 +0530	[thread overview]
Message-ID: <20062190-609a-4977-99be-c27df90ff321@oss.qualcomm.com> (raw)
In-Reply-To: <9d7c5d36-c981-43ed-a08b-3b75c25fad1e@oss.qualcomm.com>



On 3/25/2026 3:02 PM, Konrad Dybcio wrote:
> On 3/24/26 9:51 PM, Dmitry Baryshkov wrote:
>> On Tue, Mar 24, 2026 at 06:43:20PM +0530, Viken Dadhaniya wrote:
>>> The Talos (QCS615) platform includes a QSPI controller used for accessing
>>> external flash storage. Add the QSPI OPP table, TLMM pinmux entries, and
>>> the QSPI controller node to enable support for this hardware.
>>>
>>> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
>>> ---
>>>  arch/arm64/boot/dts/qcom/talos.dtsi | 80 +++++++++++++++++++++++++++++++++++++
>>>  1 file changed, 80 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
>>> index 75716b4a58d6..fd727924b8ca 100644
>>> --- a/arch/arm64/boot/dts/qcom/talos.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/talos.dtsi
>>> @@ -530,6 +530,25 @@ cdsp_smp2p_in: slave-kernel {
>>>  
>>>  	};
>>>  
>>> +	qspi_opp_table: opp-table-qspi {
>>
>> Why is it not defined inside the QSPI device itself?
> 
> The QSPI device has #address-cells = <1>, so we'd get:
> 
> Warning (spi_bus_reg): /soc@0/spi@88dc000/opp-table-qspi: missing or empty reg property
> 
> Konrad

Yes, I am seeing the same warning when the OPP table is placed inline
under the QSPI node.

Given that opp-table nodes are not addressable bus devices and therefore
do not define a reg property, what would be your preferred way to model
this while keeping the DT warning‑free?

Would placing the OPP table as a sibling of the QSPI node (for example
under the same &soc scope) and referencing it via operating-points-v2 be
acceptable in this case, even though there is only a single QSPI instance?

Thanks for your guidance.

Best regards,
Viken

  reply	other threads:[~2026-03-30 11:23 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-24 13:13 [PATCH 0/6] Add QSPI support for QCS615 and improve interconnect handling Viken Dadhaniya
2026-03-24 13:13 ` [PATCH v1 1/6] spi: dt-bindings: qcom-qspi: Add QCS615 compatible Viken Dadhaniya
2026-03-25 11:12   ` Krzysztof Kozlowski
2026-03-26  9:07     ` Konrad Dybcio
2026-03-26  9:10       ` Krzysztof Kozlowski
2026-03-24 13:13 ` [PATCH v1 2/6] spi: spi-qcom-qspi: Add interconnect support for memory path Viken Dadhaniya
2026-03-24 16:24   ` Mark Brown
2026-03-30  4:43     ` Viken Dadhaniya
2026-03-24 13:13 ` [PATCH v1 3/6] arm64: dts: qcom: talos: Add QSPI support Viken Dadhaniya
2026-03-24 20:51   ` Dmitry Baryshkov
2026-03-25  9:32     ` Konrad Dybcio
2026-03-30 11:23       ` Viken Dadhaniya [this message]
2026-03-30 13:19         ` Konrad Dybcio
2026-03-24 20:52   ` Dmitry Baryshkov
2026-03-25 11:13   ` Krzysztof Kozlowski
2026-03-30  4:40     ` Viken Dadhaniya
2026-03-24 13:13 ` [PATCH v1 4/6] arm64: dts: qcom: qcs615-ride: enable QSPI and NOR flash Viken Dadhaniya
2026-03-24 20:53   ` Dmitry Baryshkov
2026-03-24 13:13 ` [PATCH v1 5/6] arm64: dts: qcom: kodiak: Add QSPI memory interconnect path Viken Dadhaniya
2026-03-24 20:54   ` Dmitry Baryshkov
2026-03-30  4:44     ` Viken Dadhaniya
2026-03-24 13:13 ` [PATCH v1 6/6] arm64: dts: qcom: sc7180: " Viken Dadhaniya
2026-03-24 20:54   ` Dmitry Baryshkov
2026-03-30  4:44     ` Viken Dadhaniya

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