* [PATCH v2 0/2] per-process page tables for qcom 8250
@ 2022-06-20 18:36 Emma Anholt
2022-06-20 18:36 ` [PATCH v2 1/2] iommu: arm-smmu-impl: Add 8250 display compatible to the client list Emma Anholt
2022-06-20 18:36 ` [PATCH v2 2/2] arm64: dts: qcom: sm8250: Enable per-process page tables Emma Anholt
0 siblings, 2 replies; 3+ messages in thread
From: Emma Anholt @ 2022-06-20 18:36 UTC (permalink / raw)
To: dri-devel, linux-arm-msm, freedreno, Rob Clark, Jordan Crouse,
Andy Gross, Bjorn Andersson, Rob Herring, Will Deacon,
Robin Murphy, Joerg Roedel
Cc: linux-kernel, iommu, linux-arm-kernel, Emma Anholt
This enable per-process page tables on the Qualcomm RB5 boards I'm
setting up for Mesa CI. Has survived a full deqp-vk run.
v2: moved qcom,adreno-smmu compatible earlier
Emma Anholt (2):
iommu: arm-smmu-impl: Add 8250 display compatible to the client list.
arm64: dts: qcom: sm8250: Enable per-process page tables.
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
--
2.36.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v2 1/2] iommu: arm-smmu-impl: Add 8250 display compatible to the client list.
2022-06-20 18:36 [PATCH v2 0/2] per-process page tables for qcom 8250 Emma Anholt
@ 2022-06-20 18:36 ` Emma Anholt
2022-06-20 18:36 ` [PATCH v2 2/2] arm64: dts: qcom: sm8250: Enable per-process page tables Emma Anholt
1 sibling, 0 replies; 3+ messages in thread
From: Emma Anholt @ 2022-06-20 18:36 UTC (permalink / raw)
To: dri-devel, linux-arm-msm, freedreno, Rob Clark, Jordan Crouse,
Andy Gross, Bjorn Andersson, Rob Herring, Will Deacon,
Robin Murphy, Joerg Roedel
Cc: linux-kernel, iommu, linux-arm-kernel, Emma Anholt, Konrad Dybcio,
Dmitry Baryshkov
Required for turning on per-process page tables for the GPU.
Signed-off-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index d8e1ef83c01b..bb9220937068 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -233,6 +233,7 @@ static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
{ .compatible = "qcom,sc7280-mdss" },
{ .compatible = "qcom,sc7280-mss-pil" },
{ .compatible = "qcom,sc8180x-mdss" },
+ { .compatible = "qcom,sm8250-mdss" },
{ .compatible = "qcom,sdm845-mdss" },
{ .compatible = "qcom,sdm845-mss-pil" },
{ }
--
2.36.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: sm8250: Enable per-process page tables.
2022-06-20 18:36 [PATCH v2 0/2] per-process page tables for qcom 8250 Emma Anholt
2022-06-20 18:36 ` [PATCH v2 1/2] iommu: arm-smmu-impl: Add 8250 display compatible to the client list Emma Anholt
@ 2022-06-20 18:36 ` Emma Anholt
1 sibling, 0 replies; 3+ messages in thread
From: Emma Anholt @ 2022-06-20 18:36 UTC (permalink / raw)
To: dri-devel, linux-arm-msm, freedreno, Rob Clark, Jordan Crouse,
Andy Gross, Bjorn Andersson, Rob Herring, Will Deacon,
Robin Murphy, Joerg Roedel
Cc: linux-kernel, iommu, linux-arm-kernel, Emma Anholt,
Dmitry Baryshkov
This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.
Signed-off-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v2: moved qcom,adreno-smmu earlier
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a92230bec1dd..aae7b841b81a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2513,7 +2513,7 @@ gpucc: clock-controller@3d90000 {
};
adreno_smmu: iommu@3da0000 {
- compatible = "qcom,sm8250-smmu-500", "arm,mmu-500";
+ compatible = "qcom,sm8250-smmu-500", "qcom,adreno-smmu", "arm,mmu-500";
reg = <0 0x03da0000 0 0x10000>;
#iommu-cells = <2>;
#global-interrupts = <2>;
--
2.36.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-06-20 18:36 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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