* [PATCH v2 00/12] Introduce the SC8180x devices
@ 2023-03-25 12:24 Vinod Koul
2023-03-25 12:24 ` [PATCH v2 01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM Vinod Koul
` (14 more replies)
0 siblings, 15 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson, Lorenzo Pieralisi, Bjorn Helgaas,
Greg Kroah-Hartman, Georgi Djakov, Mark Brown
Cc: linux-arm-msm, Vinod Koul, Alim Akhtar, Avri Altman,
Bart Van Assche, Thomas Gleixner, Marc Zyngier, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, devicetree, linux-kernel,
Krzysztof Wilczyński, linux-pci, Kishon Vijay Abraham I,
linux-phy, Wesley Cheng, linux-usb, linux-pm, linux-scsi,
Liam Girdwood
This introduces Qualcomm SC8180x SoC which features in Lenovo Flex 5G
laptop. This also adds support for Primus platform as well as Lenovo Flex 5G
laptop.
I would be great if submaintainers can ack the binding patch so that
everything can go thru qcom tree
Changes in v2:
- Fix the ufs pcie and phy bindings
- Lots of error fixes for dtbs_check
- Add few more missing compatiables
Bjorn Andersson (3):
arm64: dts: qcom: Introduce the SC8180x platform
arm64: dts: qcom: sc8180x: Introduce Primus
arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
Vinod Koul (9):
dt-bindings: firmware: document Qualcomm SC8180X SCM
dt-bindings: PCI: qcom: Document sc8180x properties
dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs
dt-bindings: usb: qcom,dwc3: Add SC8180x binding
dt-bindings: interconnect: split SC8180x to own schema
scsi: ufs: dt-bindings: Add SC8180x binding
dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs
regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180
dt-bindings: qcom,pdc: Add SC8180x compatible
.../bindings/firmware/qcom,scm.yaml | 1 +
.../bindings/interconnect/qcom,rpmh.yaml | 11 -
.../interconnect/qcom,sc8180x-rpmh.yaml | 76 +
.../interrupt-controller/qcom,pdc.yaml | 1 +
.../devicetree/bindings/pci/qcom,pcie.yaml | 49 +-
.../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 2 +-
.../phy/qcom,msm8996-qmp-ufs-phy.yaml | 18 +-
.../regulator/qcom,rpmh-regulator.yaml | 4 +
.../devicetree/bindings/ufs/qcom,ufs.yaml | 2 +
.../devicetree/bindings/usb/qcom,dwc3.yaml | 2 +
arch/arm64/boot/dts/qcom/Makefile | 2 +
.../boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 590 +++
arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi | 326 ++
arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 706 +++
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3950 +++++++++++++++++
15 files changed, 5709 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-primus.dts
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x.dtsi
--
2.39.2
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH v2 01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-25 12:24 ` [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties Vinod Koul
` (13 subsequent siblings)
14 siblings, 0 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel,
Krzysztof Kozlowski
Document the compatible for Qualcomm sc8180x SCM.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index a66e99812b1f..d5b7d6d38445 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -42,6 +42,7 @@ properties:
- qcom,scm-sa8775p
- qcom,scm-sc7180
- qcom,scm-sc7280
+ - qcom,scm-sc8180x
- qcom,scm-sc8280xp
- qcom,scm-sdm670
- qcom,scm-sdm845
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
2023-03-25 12:24 ` [PATCH v2 01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 7:52 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs Vinod Koul
` (12 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Lorenzo Pieralisi, Bjorn Helgaas, Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Rob Herring,
Krzysztof Wilczyński, Krzysztof Kozlowski, linux-pci,
devicetree, linux-kernel
sc8180x PCIe clocks and resets are different from the common pcie
binding, this warrants the oneOf clause for the clocks and resets
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../devicetree/bindings/pci/qcom,pcie.yaml | 49 ++++++++++++++++++-
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index fb32c43dd12d..d4f837924e7c 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -459,6 +459,33 @@ allOf:
items:
- const: pci # PCIe core reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-sc8180x
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 8
+ clock-names:
+ items:
+ - const: pipe # PIPE clock
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: ref # REFERENCE clock
+ - const: tbu # PCIe TBU clock
+ resets:
+ maxItems: 1
+ reset-names:
+ items:
+ - const: pci # PCIe core reset
+
- if:
properties:
compatible:
@@ -507,7 +534,6 @@ allOf:
compatible:
contains:
enum:
- - qcom,pcie-sc8180x
- qcom,pcie-sm8150
- qcom,pcie-sm8250
then:
@@ -675,6 +701,7 @@ allOf:
contains:
enum:
- qcom,pcie-sa8540p
+ - qcom,pcie-sc8180x
- qcom,pcie-sc8280xp
then:
required:
@@ -717,7 +744,6 @@ allOf:
enum:
- qcom,pcie-msm8996
- qcom,pcie-sc7280
- - qcom,pcie-sc8180x
- qcom,pcie-sdm845
- qcom,pcie-sm8150
- qcom,pcie-sm8250
@@ -746,6 +772,25 @@ allOf:
- const: msi6
- const: msi7
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-sc8180x
+ then:
+ oneOf:
+ - properties:
+ interrupts:
+ maxItems: 1
+ interrupt-names:
+ items:
+ - const: msi
+ iommus:
+ maxItems: 1
+ iommu-map:
+ maxItems: 2
+
- if:
properties:
compatible:
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
2023-03-25 12:24 ` [PATCH v2 01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM Vinod Koul
2023-03-25 12:24 ` [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 7:54 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding Vinod Koul
` (11 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Kishon Vijay Abraham I,
Rob Herring, Krzysztof Kozlowski, linux-phy, devicetree,
linux-kernel
sc8180x pcie phy requires to describe six reg areas for the phy to work,
so move the description to the correct place documenting tx, rx lane 1,
2 and pcs and pcs misc.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
index 62045dcfb20c..3d42ee3901a1 100644
--- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml
@@ -203,6 +203,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,sc8180x-qmp-pcie-phy
- qcom,sm8250-qmp-gen3x2-pcie-phy
- qcom,sm8250-qmp-modem-pcie-phy
- qcom,sm8450-qmp-gen4x2-pcie-phy
@@ -224,7 +225,6 @@ allOf:
compatible:
contains:
enum:
- - qcom,sc8180x-qmp-pcie-phy
- qcom,sdm845-qmp-pcie-phy
- qcom,sdx55-qmp-pcie-phy
- qcom,sm8250-qmp-gen3x1-pcie-phy
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (2 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 7:55 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema Vinod Koul
` (10 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Greg Kroah-Hartman, Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Wesley Cheng, linux-usb, devicetree,
linux-kernel
Document the USB dwc3 controller for SC8180x SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 4875c5b7d5b5..54e24c3abd29 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -24,6 +24,7 @@ properties:
- qcom,qcs404-dwc3
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
+ - qcom,sc8180x-dwc3
- qcom,sc8280xp-dwc3
- qcom,sdm660-dwc3
- qcom,sdm670-dwc3
@@ -324,6 +325,7 @@ allOf:
compatible:
contains:
enum:
+ - qcom,sc8180x-dwc3
- qcom,sm8350-dwc3
then:
properties:
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (3 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-26 14:10 ` Rob Herring
2023-03-25 12:24 ` [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding Vinod Koul
` (9 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Georgi Djakov, Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, linux-pm, devicetree, linux-kernel
SC8180x comes with interconnects having and missing IO address space, and
variable number of clocks, so split it from common file for easier
maintenance and to fix warnings like:
sc8180x-lenovo-flex-5g.dtb: interconnect-0: 'reg' is a required property
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../bindings/interconnect/qcom,rpmh.yaml | 11 ---
.../interconnect/qcom,sc8180x-rpmh.yaml | 76 +++++++++++++++++++
2 files changed, 76 insertions(+), 11 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
index 4d93ad415e0b..5cbc3be49e99 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
@@ -39,17 +39,6 @@ properties:
- qcom,sc7180-npu-noc
- qcom,sc7180-qup-virt
- qcom,sc7180-system-noc
- - qcom,sc8180x-aggre1-noc
- - qcom,sc8180x-aggre2-noc
- - qcom,sc8180x-camnoc-virt
- - qcom,sc8180x-compute-noc
- - qcom,sc8180x-config-noc
- - qcom,sc8180x-dc-noc
- - qcom,sc8180x-gem-noc
- - qcom,sc8180x-mc-virt
- - qcom,sc8180x-mmss-noc
- - qcom,sc8180x-qup-virt
- - qcom,sc8180x-system-noc
- qcom,sdm670-aggre1-noc
- qcom,sdm670-aggre2-noc
- qcom,sdm670-config-noc
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
new file mode 100644
index 000000000000..613af6caa71d
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,sc8180x-rpmh.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm RPMh Network-On-Chip Interconnect on SC8180X
+
+maintainers:
+ - Bjorn Andersson <andersson@kernel.org>
+ - Konrad Dybcio <konrad.dybcio@linaro.org>
+
+description: |
+ RPMh interconnect providers support system bandwidth requirements through
+ RPMh hardware accelerators known as Bus Clock Manager (BCM).
+
+ See also:: include/dt-bindings/interconnect/qcom,sc8180x.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,sc8180x-aggre1-noc
+ - qcom,sc8180x-aggre1-noc
+ - qcom,sc8180x-aggre2-noc
+ - qcom,sc8180x-camnoc-virt
+ - qcom,sc8180x-compute-noc
+ - qcom,sc8180x-config-noc
+ - qcom,sc8180x-dc-noc
+ - qcom,sc8180x-gem-noc
+ - qcom,sc8180x-mc-virt
+ - qcom,sc8180x-mmss-noc
+ - qcom,sc8180x-qup-virt
+ - qcom,sc8180x-system-noc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+allOf:
+ - $ref: qcom,rpmh-common.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc8180x-camnoc-virt
+ - qcom,sc8180x-mc-virt
+ - qcom,sc8180x-qup-virt
+ then:
+ properties:
+ reg: false
+ else:
+ required:
+ - reg
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ camnoc_virt: interconnect-0{
+ compatible = "qcom,sc8180x-camnoc-virt";
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
+
+ aggre1_noc: interconnect@16e0000 {
+ compatible = "qcom,sc8180x-aggre1-noc";
+ reg = <0 0x016e0000 0 0xd080>;
+ #interconnect-cells = <2>;
+ qcom,bcm-voters = <&apps_bcm_voter>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (4 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 7:59 ` Krzysztof Kozlowski
2023-03-27 10:19 ` Manivannan Sadhasivam
2023-03-25 12:24 ` [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs Vinod Koul
` (8 subsequent siblings)
14 siblings, 2 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Alim Akhtar,
Avri Altman, Bart Van Assche, Rob Herring, Krzysztof Kozlowski,
linux-scsi, devicetree, linux-kernel
Document the UFS HC for SC8180x SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index c5a06c048389..a3db34f35f4f 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -26,6 +26,7 @@ properties:
- qcom,msm8994-ufshc
- qcom,msm8996-ufshc
- qcom,msm8998-ufshc
+ - qcom,sc8180x-ufshc
- qcom,sc8280xp-ufshc
- qcom,sdm845-ufshc
- qcom,sm6350-ufshc
@@ -105,6 +106,7 @@ allOf:
contains:
enum:
- qcom,msm8998-ufshc
+ - qcom,sc8280x-ufshc
- qcom,sc8280xp-ufshc
- qcom,sm8250-ufshc
- qcom,sm8350-ufshc
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (5 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 7:59 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180 Vinod Koul
` (7 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Kishon Vijay Abraham I,
Rob Herring, Krzysztof Kozlowski, linux-phy, devicetree,
linux-kernel
sc8180x ufs phy requires to describe five reg areas for the phy to work,
so move the description to the correct place documenting tx, rx lane
1, 2 and pcs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml | 18 +-----------------
1 file changed, 1 insertion(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
index 80a5348dbfde..881ba543fd46 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
@@ -160,6 +160,7 @@ allOf:
contains:
enum:
- qcom,msm8998-qmp-ufs-phy
+ - qcom,sc8180x-qmp-ufs-phy
- qcom,sdm845-qmp-ufs-phy
- qcom,sm6350-qmp-ufs-phy
- qcom,sm8150-qmp-ufs-phy
@@ -178,23 +179,6 @@ allOf:
- description: TX lane 2
- description: RX lane 2
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,sc8180x-qmp-ufs-phy
- then:
- patternProperties:
- "^phy@[0-9a-f]+$":
- properties:
- reg:
- items:
- - description: TX
- - description: RX
- - description: PCS
- - description: PCS_MISC
-
- if:
properties:
compatible:
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (6 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-27 8:01 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 09/12] dt-bindings: qcom,pdc: Add SC8180x compatible Vinod Koul
` (6 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Mark Brown, Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Liam Girdwood,
Rob Herring, Krzysztof Kozlowski, linux-kernel, devicetree
Commit 71ca776a8885 ("regulator: qcom-rpmh: Add pmc8180 and pmc8180c")
introduced these compatible's but the yaml conversion commit
7255f98d08c7 ("regulator: Convert RPMh regulator bindings to YAML")
seems to have dropped it
So bring it back!
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
index 297a75069f60..44f49b153076 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
@@ -75,6 +75,8 @@ properties:
- qcom,pm8550ve-rpmh-regulators
- qcom,pm8550vs-rpmh-regulators
- qcom,pm8998-rpmh-regulators
+ - qcom,pmc8180-rpmh-regulators
+ - qcom,pmc8180c-rpmh-regulators
- qcom,pmg1110-rpmh-regulators
- qcom,pmi8998-rpmh-regulators
- qcom,pmm8155au-rpmh-regulators
@@ -232,6 +234,7 @@ allOf:
compatible:
enum:
- qcom,pm8150-rpmh-regulators
+ - qcom,pmc8180-rpmh-regulators
- qcom,pmm8155au-rpmh-regulators
then:
properties:
@@ -249,6 +252,7 @@ allOf:
compatible:
enum:
- qcom,pm8150l-rpmh-regulators
+ - qcom,pmc8180c-rpmh-regulators
then:
properties:
vdd-bob-supply:
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 09/12] dt-bindings: qcom,pdc: Add SC8180x compatible
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (7 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180 Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-25 12:24 ` [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus Vinod Koul
` (5 subsequent siblings)
14 siblings, 0 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Vinod Koul, Konrad Dybcio, Thomas Gleixner,
Marc Zyngier, Rob Herring, Krzysztof Kozlowski, linux-kernel,
devicetree
Document the compatible for pdc in SC8180X SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
.../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 94791e261c42..65fa4463cdb6 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -28,6 +28,7 @@ properties:
- enum:
- qcom,sc7180-pdc
- qcom,sc7280-pdc
+ - qcom,sc8180x-pdc
- qcom,sc8280xp-pdc
- qcom,sdm845-pdc
- qcom,sdx55-pdc
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (8 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 09/12] dt-bindings: qcom,pdc: Add SC8180x compatible Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-25 12:36 ` Konrad Dybcio
2023-03-27 8:12 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G Vinod Koul
` (4 subsequent siblings)
14 siblings, 2 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Introduce support for the SC8180X reference device, aka Primus, with
debug UART, regulators, UFS and USB support.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi | 326 +++++++++
arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 706 ++++++++++++++++++++
3 files changed, 1033 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-primus.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 31aa54f0428c..fdce44a7a902 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
new file mode 100644
index 000000000000..49c146b6f37f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022, Linaro Limited
+ */
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+
+/ {
+ thermal-zones {
+ pmc8180-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&pmc8180_temp>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+
+ pmc8180c-thermal {
+ polling-delay-passive = <100>;
+ polling-delay = <0>;
+
+ thermal-sensors = <&pmc8180c_temp>;
+
+ trips {
+ trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+
+ trip1 {
+ temperature = <115000>;
+ hysteresis = <0>;
+ type = "hot";
+ };
+
+ trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
+&spmi_bus {
+ pmc8180_0: pmic@0 {
+ compatible = "qcom,pm8150", "qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pon: power-on@800 {
+ compatible = "qcom,pm8916-pon";
+ reg = <0x0800>;
+ pwrkey {
+ compatible = "qcom,pm8941-pwrkey";
+ interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ linux,code = <KEY_POWER>;
+
+ status = "disabled";
+ };
+ };
+
+ pmc8180_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ io-channels = <&pmc8180_adc ADC5_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pmc8180_adc: adc@3100 {
+ compatible = "qcom,spmi-adc5";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ label = "ref_gnd";
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ label = "vref_1p25";
+ };
+
+ die-temp@6 {
+ reg = <ADC5_DIE_TEMP>;
+ qcom,pre-scaling = <1 1>;
+ label = "die_temp";
+ };
+ };
+
+ pmc8180_adc_tm: adc-tm@3500 {
+ compatible = "qcom,spmi-adc-tm5";
+ reg = <0x3500>;
+ interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+ #thermal-sensor-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+ };
+
+ pmc8180_gpios: gpio@c000 {
+ compatible = "qcom,pmc8180-gpio";
+ reg = <0xc000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ pmic@1 {
+ compatible = "qcom,pmc8180", "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pmic@2 {
+ compatible = "qcom,smb2351", "qcom,spmi-pmic";
+ reg = <0x2 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@3100 {
+ compatible = "qcom,spmi-adc-rev2";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ label = "ref_gnd";
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ label = "vref_1p25";
+ };
+
+ vcoin@85 {
+ reg = <0x85>;
+ qcom,pre-scaling = <1 1>;
+ label = "vcoin2";
+ };
+ };
+ };
+
+ pmic@6 {
+ compatible = "qcom,pm8150c", "qcom,spmi-pmic";
+ reg = <0x6 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pmic@8 {
+ compatible = "qcom,pm8150", "qcom,spmi-pmic";
+ reg = <0x8 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pmic@a {
+ compatible = "qcom,smb2351", "qcom,spmi-pmic";
+ reg = <0xa SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@3100 {
+ compatible = "qcom,spmi-adc-rev2";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0xa 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ label = "ref_gnd";
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ label = "vref_1p25";
+ };
+
+ vcoin@85 {
+ reg = <0x85>;
+ qcom,pre-scaling = <1 1>;
+ label = "vcoin";
+ };
+ };
+ };
+
+ pmic@4 {
+ compatible = "qcom,pm8150c", "qcom,spmi-pmic";
+ reg = <0x4 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-on@800 {
+ compatible = "qcom,pm8916-pon";
+ reg = <0x0800>;
+
+ status = "disabled";
+ };
+
+ pmc8180c_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400>;
+ interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
+ io-channels = <&pmc8180c_adc ADC5_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pmc8180c_adc: adc@3100 {
+ compatible = "qcom,spmi-adc5";
+ reg = <0x3100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+ interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ label = "ref_gnd";
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ label = "vref_1p25";
+ };
+
+ die-temp@6 {
+ reg = <ADC5_DIE_TEMP>;
+ qcom,pre-scaling = <1 1>;
+ label = "die_temp";
+ };
+ };
+
+ pmc8180c_adc_tm: adc-tm@3500 {
+ compatible = "qcom,spmi-adc-tm5";
+ reg = <0x3500>;
+ interrupts = <0x4 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
+ #thermal-sensor-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pmc8180c_gpios: gpio@c000 {
+ compatible = "qcom,pmc8180c-gpio";
+ reg = <0xc000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ pmic@5 {
+ compatible = "qcom,pmc8180c", "qcom,spmi-pmic";
+ reg = <0x5 SPMI_USID>;
+
+ pmc8180c_lpg: lpg {
+ compatible = "qcom,pmc8180c-lpg";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #pwm-cells = <2>;
+
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
new file mode 100644
index 000000000000..9f365fccae78
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
@@ -0,0 +1,706 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020-2023, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/gpio-keys.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sc8180x.dtsi"
+#include "sc8180x-pmics.dtsi"
+
+/ {
+ model = "Qualcomm SC8180x Primus";
+ compatible = "qcom,sc8180x-primus", "qcom,sc8180x";
+
+ aliases {
+ serial0 = &uart12;
+ serial1 = &uart13;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pmc8180c_lpg 4 1000000>;
+ enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&bl_pwm_default>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&hall_int_active_state>;
+
+ lid-switch {
+ gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ wakeup-source;
+ wakeup-event-action = <EV_ACT_DEASSERTED>;
+ };
+ };
+
+ reserved-memory {
+ rmtfs_mem: rmtfs-region@85500000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x85500000 0x0 0x200000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
+ wlan_mem: wlan-region@8bc00000 {
+ reg = <0x0 0x8bc00000 0x0 0x180000>;
+ no-map;
+ };
+
+ adsp_mem: adsp-region@96e00000 {
+ reg = <0x0 0x96e00000 0x0 0x1c00000>;
+ no-map;
+ };
+
+ mpss_mem: mpss-region@8d800000 {
+ reg = <0x0 0x8d800000 0x0 0x9600000>;
+ no-map;
+ };
+
+ gpu_mem: gpu-region@98a00000 {
+ reg = <0x0 0x98a00000 0x0 0x2000>;
+ no-map;
+ };
+
+ reserved-region@9a500000 {
+ reg = <0x0 0x9a500000 0x0 0x600000>;
+ no-map;
+ };
+ };
+
+ vreg_nvme_0p9: nvme-0p9-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_nvme_0p9";
+
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+
+ regulator-always-on;
+ };
+
+ vreg_nvme_3p3: nvme-3p3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_nvme_3p3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&pmc8180c_gpios 11 0>;
+ enable-active-high;
+
+ regulator-always-on;
+ };
+
+ vdd_kb_tp_3v3: vdd-kb-tp-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_kb_tp_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ regulator-always-on;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&kb_tp_3v3_en_active_state>;
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ };
+
+ vreg_s4a_1p8: pm8150-s4 {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_s4a_1p8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vph_pwr>;
+ };
+};
+
+&apps_rsc {
+ pmc8180-a-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "a";
+
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>;
+
+ vreg_s5a_2p0: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2100000>;
+ };
+
+ vreg_l7a_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9a_1p3: ldo9 {
+ regulator-min-microvolt = <1296000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12a_1p8: ldo12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180c-rpmh-regulators {
+ compatible = "qcom,pmc8180c-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-l2-l3-supply = <&vreg_s6c_1p35>;
+ vdd-bob-supply = <&vph_pwr>;
+
+ vreg_s6c_1p35: smps6 {
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1372000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s8c_1p8: smps8 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ regulator-always-on;
+ };
+
+ vreg_l3c_1p2: ldo3 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l4c_3p3: ldo4 {
+ regulator-min-microvolt = <3008000>;
+ regulator-max-microvolt = <3008000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10c_3p3: ldo10 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l11c_3p3: ldo11 {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob: bob {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180-e-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-l2-l10-supply = <&vreg_bob>;
+ vdd-l3-l4-l5-l18-supply = <&vreg_s4e_0p98>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5e_2p05>;
+ vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+ vreg_s4e_0p98: smps4 {
+ regulator-min-microvolt = <992000>;
+ regulator-max-microvolt = <992000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5e_2p05: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2040000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1e_0p75: ldo1 {
+ regulator-min-microvolt = <752000>;
+ regulator-max-microvolt = <752000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5e_0p88: ldo5 {
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7e_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10e_2p9: ldo10 {
+ regulator-min-microvolt = <2904000>;
+ regulator-max-microvolt = <2904000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12e: ldo12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l16e_3p0: ldo16 {
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&dispcc {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_i2c_active_state>;
+
+ status = "okay";
+
+ touchscreen@10 {
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ hid-descr-addr = <0x1>;
+
+ vdd-supply = <&vreg_l4c_3p3>;
+ vddl-supply = <&vreg_l12e>;
+
+ post-power-on-delay-ms = <20>;
+
+ interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&ts_active_state>;
+ };
+};
+
+&i2c7 {
+ clock-frequency = <100000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&aux_i2c_active_state>;
+
+ status = "okay";
+
+ touchpad@15 {
+ compatible = "hid-over-i2c";
+ reg = <0x15>;
+ hid-descr-addr = <0x1>;
+
+ interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&tp_int_active_state>;
+
+ vdd-supply = <&vdd_kb_tp_3v3>;
+ };
+
+ keyboard@3a {
+ compatible = "hid-over-i2c";
+ reg = <0x3a>;
+ hid-descr-addr = <0x1>;
+ interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&kb_int_active_state>;
+
+ vdd-supply = <&vdd_kb_tp_3v3>;
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_edp {
+ data-lanes = <0 1 2 3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd_active>;
+
+ status = "okay";
+
+ aux-bus {
+ panel {
+ compatible = "edp-panel";
+
+ backlight = <&backlight>;
+
+ ports {
+ port {
+ auo_b133han05_in: endpoint {
+ remote-endpoint = <&mdss_edp_out>;
+ };
+ };
+ };
+ };
+ };
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss_edp_out: endpoint {
+ remote-endpoint = <&auo_b133han05_in>;
+ };
+ };
+ };
+};
+
+&pcie1 {
+ perst-gpio = <&tlmm 175 GPIO_ACTIVE_LOW>;
+ wake-gpio = <&tlmm 177 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_default_state>;
+
+ status = "okay";
+};
+
+&pcie1_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&pmc8180c_lpg {
+ status = "okay";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&qupv3_id_2 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ memory-region = <&adsp_mem>;
+ firmware-name = "qcom/sc8180x/qcadsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ memory-region = <&mpss_mem>;
+ firmware-name = "qcom/sc8180x/qcmpss8180.mbn";
+
+ status = "okay";
+};
+
+&uart12 {
+ compatible = "qcom,geni-debug-uart";
+ status = "okay";
+};
+
+&uart13 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart13_state>;
+
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3998-bt";
+
+ vddio-supply = <&vreg_s4a_1p8>;
+ vddxo-supply = <&vreg_l7a_1p8>;
+ vddrf-supply = <&vreg_l9a_1p3>;
+ vddch0-supply = <&vreg_l11c_3p3>;
+ max-speed = <3200000>;
+ };
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l10e_2p9>;
+ vcc-max-microamp = <155000>;
+
+ vccq2-supply = <&vreg_l7e_1p8>;
+ vccq2-max-microamp = <425000>;
+
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&usb_prim_hsphy {
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p0>;
+
+ status = "okay";
+};
+
+&usb_prim_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+
+ status = "okay";
+};
+
+&usb_prim {
+ status = "okay";
+};
+
+&usb_prim_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_sec_hsphy {
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p0>;
+
+ status = "okay";
+};
+
+&usb_sec_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+
+ status = "okay";
+};
+
+&usb_sec {
+ status = "okay";
+};
+
+&usb_sec_dwc3 {
+ dr_mode = "host";
+};
+
+&wifi {
+ memory-region = <&wlan_mem>;
+
+ vdd-0.8-cx-mx-supply = <&vreg_l1e_0p75>;
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
+ vdd-1.3-rfa-supply = <&vreg_l9a_1p3>;
+ vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
+ vdd-3.3-ch1-supply = <&vreg_l10c_3p3>;
+
+ status = "okay";
+};
+
+&xo_board_clk {
+ clock-frequency = <38400000>;
+};
+
+/* PINCTRL */
+
+&pmc8180c_gpios {
+ bl_pwm_default: bl-pwm-default-state {
+ en-pins {
+ pins = "gpio8";
+ function = "normal";
+ };
+
+ pwm-pins {
+ pins = "gpio10";
+ function = "func1";
+ };
+ };
+};
+
+&tlmm {
+ gpio-reserved-ranges = <0 4>, <47 4>, <126 4>;
+
+ aux_i2c_active_state: aux-i2c-active-state {
+ pins = "gpio98", "gpio99";
+ function = "qup7";
+
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ edp_hpd_active: epd-hpd-active-state {
+ pins = "gpio10";
+ function = "edp_hot";
+ };
+
+ hall_int_active_state: hall-int-active-state {
+ pins = "gpio121";
+ function = "gpio";
+
+ input-enable;
+ bias-disable;
+ };
+
+ kb_int_active_state: kb-int-active-state {
+ int-n-pins {
+ pins = "gpio37";
+ function = "gpio";
+
+ bias-pull-up;
+ intput-enable;
+ };
+
+ kp-disable-pins {
+ pins = "gpio135";
+ function = "gpio";
+
+ output-high;
+ };
+ };
+
+ kb_tp_3v3_en_active_state: kb-tp-3v3-en-active-state {
+ pins = "gpio4";
+ functino = "gpio";
+
+ bias-disable;
+ };
+
+ pcie2_default_state: pcie2-default-state {
+ clkreq-pins {
+ pins = "gpio176";
+ function = "pci_e2";
+ bias-pull-up;
+ };
+
+ reset-n-pins {
+ pins = "gpio175";
+ function = "gpio";
+
+ drive-strength = <2>;
+ output-low;
+ bias-pull-down;
+ };
+
+ wake-n-pins {
+ pins = "gpio177";
+ function = "gpio";
+
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ tp_int_active_state: tp-int-active-state {
+ tp-int-pins {
+ pins = "gpio24";
+ function = "gpio";
+
+ bias-disable;
+ input-enable;
+ };
+
+ tp-close-n-pins {
+ pins = "gpio116";
+ function = "gpio";
+
+ bias-disable;
+ input-enable;
+ };
+ };
+
+ ts_active_state: ts-active-state {
+ int-n-pins {
+ pins = "gpio122";
+ function = "gpio";
+
+ input-enable;
+ bias-disable;
+ };
+
+ reset-n-pins {
+ pins = "gpio54";
+ function = "gpio";
+
+ output-high;
+ };
+ };
+
+ ts_i2c_active_state: ts-i2c-active-state {
+ pins = "gpio114", "gpio115";
+ function = "qup1";
+
+ /* External pull up */
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ uart13_state: uart13-state {
+ cts-pins {
+ pins = "gpio43";
+ function = "qup13";
+ bias-pull-down;
+ };
+
+ rts-tx-pins {
+ pins = "gpio44", "gpio45";
+ function = "qup13";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx-pins {
+ pins = "gpio46";
+ function = "qup13";
+ bias-pull-up;
+ };
+ };
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (9 preceding siblings ...)
2023-03-25 12:24 ` [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus Vinod Koul
@ 2023-03-25 12:24 ` Vinod Koul
2023-03-25 12:40 ` Konrad Dybcio
[not found] ` <20230325122444.249507-11-vkoul@kernel.org>
` (3 subsequent siblings)
14 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-25 12:24 UTC (permalink / raw)
To: Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel, Vinod Koul
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Introduce support for the Lenovo Flex 5G laptop, built on the Qualcomm
SC8180X platform. Supported peripherals includes keyboard, touchpad,
UFS storage, external USB and WiFi.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 590 ++++++++++++++++++
2 files changed, 591 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index fdce44a7a902..f096561f711e 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
new file mode 100644
index 000000000000..76dad608fb85
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
@@ -0,0 +1,590 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2020-2023, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/gpio-keys.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sc8180x.dtsi"
+#include "sc8180x-pmics.dtsi"
+
+/ {
+ model = "Lenovo Flex 5G";
+ compatible = "lenovo,flex-5g", "qcom,sc8180x";
+
+ aliases {
+ serial0 = &uart13;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pmc8180c_lpg 4 1000000>;
+ enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&bl_pwm_default>;
+ };
+
+ chosen {
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&hall_int_active_state>;
+
+ lid {
+ gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ wakeup-source;
+ wakeup-event-action = <EV_ACT_DEASSERTED>;
+ };
+ };
+
+ reserved-memory {
+ rmtfs_mem: rmtfs-region@85500000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x85500000 0x0 0x200000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
+ wlan_mem: wlan-region@8bc00000 {
+ reg = <0x0 0x8bc00000 0x0 0x180000>;
+ no-map;
+ };
+
+ mpss_mem: mpss-region@8d800000 {
+ reg = <0x0 0x8d800000 0x0 0x3000000>;
+ no-map;
+ };
+
+ adsp_mem: adsp-region@90800000 {
+ reg = <0x0 0x90800000 0x0 0x1c00000>;
+ no-map;
+ };
+
+ gpu_mem: gpu-region@98715000 {
+ reg = <0x0 0x98715000 0x0 0x2000>;
+ no-map;
+ };
+
+ cdsp_mem: cdsp-region@98900000 {
+ reg = <0x0 0x98900000 0x0 0x1400000>;
+ no-map;
+ };
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+ };
+
+ vreg_s4a_1p8: pm8150-s4-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_s4a_1p8";
+
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+
+ vin-supply = <&vph_pwr>;
+ };
+};
+
+&apps_rsc {
+ pmc8180-a-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "a";
+
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>;
+
+ vreg_s5a_2p0: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2100000>;
+ };
+
+ vreg_l7a_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l9a_1p3: ldo9 {
+ regulator-min-microvolt = <1296000>;
+ regulator-max-microvolt = <1304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l12a_1p8: ldo12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180c-rpmh-regulators {
+ compatible = "qcom,pmc8180c-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-l2-l3-supply = <&vreg_s6c_1p35>;
+ vdd-bob-supply = <&vph_pwr>;
+
+ vreg_s6c_1p35: smps6 {
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1372000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l3c_1p2: ldo3 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10c_3p3: ldo10 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3312000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l11c_3p3: ldo11 {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_bob: bob {
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3350000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pmc8180-e-rpmh-regulators {
+ compatible = "qcom,pmc8180-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-l2-l10-supply = <&vreg_bob>;
+ vdd-l3-l4-l5-l18-supply = <&vreg_s4e_0p98>;
+ vdd-l7-l12-l14-l15-supply = <&vreg_s5e_2p05>;
+ vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+ vreg_s4e_0p98: smps4 {
+ regulator-min-microvolt = <992000>;
+ regulator-max-microvolt = <992000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_s5e_2p05: smps5 {
+ regulator-min-microvolt = <2040000>;
+ regulator-max-microvolt = <2040000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l1e_0p75: ldo1 {
+ regulator-min-microvolt = <752000>;
+ regulator-max-microvolt = <752000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l5e_0p88: ldo5 {
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l7e_1p8: ldo7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l10e_2p9: ldo10 {
+ regulator-min-microvolt = <2904000>;
+ regulator-max-microvolt = <2904000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ vreg_l16e_3p0: ldo16 {
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+};
+
+&dispcc {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+
+ zap-shader {
+ memory-region = <&gpu_mem>;
+ firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
+ };
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_active>, <&i2c1_hid_active>;
+
+ status = "okay";
+
+ hid@10 {
+ compatible = "hid-over-i2c";
+ reg = <0x10>;
+ hid-descr-addr = <0x1>;
+
+ interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&i2c7 {
+ clock-frequency = <100000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c7_active>, <&i2c7_hid_active>;
+
+ status = "okay";
+
+ hid@5 {
+ compatible = "hid-over-i2c";
+ reg = <0x5>;
+ hid-descr-addr = <0x20>;
+
+ interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ hid@2c {
+ compatible = "hid-over-i2c";
+ reg = <0x2c>;
+ hid-descr-addr = <0x20>;
+
+ interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_edp {
+ data-lanes = <0 1 2 3>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_hpd_active>;
+
+ status = "okay";
+
+ aux-bus {
+ panel {
+ compatible = "edp-panel";
+ no-hpd;
+
+ backlight = <&backlight>;
+
+ ports {
+ port {
+ auo_b140han06_in: endpoint {
+ remote-endpoint = <&mdss_edp_out>;
+ };
+ };
+ };
+ };
+ };
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss_edp_out: endpoint {
+ remote-endpoint = <&auo_b140han06_in>;
+ };
+ };
+ };
+};
+
+&pcie3 {
+ perst-gpio = <&tlmm 178 GPIO_ACTIVE_LOW>;
+ wake-gpio = <&tlmm 180 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_default_state>;
+
+ status = "okay";
+};
+
+&pcie3_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&pmc8180c_lpg {
+ status = "okay";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&qupv3_id_2 {
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ memory-region = <&adsp_mem>;
+ firmware-name = "qcom/sc8180x/LENOVO/82AK/qcadsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ memory-region = <&cdsp_mem>;
+ firmware-name = "qcom/sc8180x/LENOVO/82AK/qccdsp8180.mbn";
+
+ status = "okay";
+};
+
+&remoteproc_mpss {
+ memory-region = <&mpss_mem>;
+ firmware-name = "qcom/sc8180x/LENOVO/82AK/qcmpss8180_nm.mbn";
+
+ status = "okay";
+};
+
+&uart13 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart13_state>;
+
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn3998-bt";
+
+ vddio-supply = <&vreg_s4a_1p8>;
+ vddxo-supply = <&vreg_l7a_1p8>;
+ vddrf-supply = <&vreg_l9a_1p3>;
+ vddch0-supply = <&vreg_l11c_3p3>;
+ max-speed = <3200000>;
+ };
+};
+
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
+
+ vcc-supply = <&vreg_l10e_2p9>;
+ vcc-max-microamp = <155000>;
+
+ vccq2-supply = <&vreg_l7e_1p8>;
+ vccq2-max-microamp = <425000>;
+
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l5e_0p88>;
+ vdda-pll-supply = <&vreg_l3c_1p2>;
+
+ status = "okay";
+};
+
+&usb_prim_hsphy {
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p0>;
+
+ status = "okay";
+};
+
+&usb_prim_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+
+ status = "okay";
+};
+
+&usb_prim {
+ status = "okay";
+};
+
+&usb_prim_dwc3 {
+ dr_mode = "host";
+};
+
+&usb_sec_hsphy {
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+ vdda18-supply = <&vreg_l12a_1p8>;
+ vdda33-supply = <&vreg_l16e_3p0>;
+
+ status = "okay";
+};
+
+&usb_sec_qmpphy {
+ vdda-phy-supply = <&vreg_l3c_1p2>;
+ vdda-pll-supply = <&vreg_l5e_0p88>;
+
+ status = "okay";
+};
+
+&usb_sec {
+ status = "okay";
+};
+
+&usb_sec_dwc3 {
+ dr_mode = "host";
+};
+
+&wifi {
+ memory-region = <&wlan_mem>;
+
+ vdd-0.8-cx-mx-supply = <&vreg_l1e_0p75>;
+ vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
+ vdd-1.3-rfa-supply = <&vreg_l9a_1p3>;
+ vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
+ vdd-3.3-ch1-supply = <&vreg_l10c_3p3>;
+
+ status = "okay";
+};
+
+&xo_board_clk {
+ clock-frequency = <38400000>;
+};
+
+/* PINCTRL */
+
+&pmc8180c_gpios {
+ bl_pwm_default: bl-pwm-default-state {
+ en-pins {
+ pins = "gpio8";
+ function = "normal";
+ };
+
+ pwm-pins {
+ pins = "gpio10";
+ function = "func1";
+ };
+ };
+};
+
+&tlmm {
+ gpio-reserved-ranges = <0 4>, <47 4>, <126 4>;
+
+ edp_hpd_active: epd-hpd-active-state {
+ pins = "gpio10";
+ function = "edp_hot";
+ };
+
+ hall_int_active_state: hall-int-active-state {
+ pins = "gpio121";
+ function = "gpio";
+
+ input-enable;
+ bias-disable;
+ };
+
+ i2c1_active: i2c1-active-state {
+ pins = "gpio114", "gpio115";
+ function = "qup1";
+
+ bias-pull-up = <1>;
+ drive-strength = <2>;
+ };
+
+ i2c1_hid_active: i2c1-hid-active-state {
+ pins = "gpio122";
+ function = "gpio";
+
+ input-enable;
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ i2c7_active: i2c7-active-state {
+ pins = "gpio98", "gpio99";
+ function = "qup7";
+
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ i2c7_hid_active: i2c7-hid-active-state {
+ pins = "gpio37", "gpio24";
+ function = "gpio";
+
+ input-enable;
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ pcie3_default_state: pcie3-default-state {
+ clkreq-pins {
+ pins = "gpio179";
+ function = "pci_e3";
+ bias-pull-up;
+ };
+
+ reset-n-pins {
+ pins = "gpio178";
+ function = "gpio";
+
+ drive-strength = <2>;
+ output-low;
+ bias-pull-down;
+ };
+
+ wake-n-pins {
+ pins = "gpio180";
+ function = "gpio";
+
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ uart13_state: uart13-state {
+ cts-pins {
+ pins = "gpio43";
+ function = "qup13";
+ bias-pull-down;
+ };
+
+ rts-tx-pins {
+ pins = "gpio44", "gpio45";
+ function = "qup13";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ rx-pins {
+ pins = "gpio46";
+ function = "qup13";
+ bias-pull-up;
+ };
+ };
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform
[not found] ` <20230325122444.249507-11-vkoul@kernel.org>
@ 2023-03-25 12:34 ` Konrad Dybcio
2023-03-27 5:38 ` Vinod Koul
0 siblings, 1 reply; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-25 12:34 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
On 25.03.2023 13:24, Vinod Koul wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Introduce a base dtsi for the Qualcomm SC8180x platform, with CPUs,
> global clock controller, SMMU, rpmh clocks, rpmh power-domains, CPUfreq,
> QUP blocks, UFS, USB, ADSP, CDSP and MPSS and WiFi.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3950 +++++++++++++++++++++++++
> 1 file changed, 3950 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> new file mode 100644
> index 000000000000..4d4ee6bc91e5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> @@ -0,0 +1,3950 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020-2023, Linaro Limited
> + */
> +
> +#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
> +#include <dt-bindings/clock/qcom,gcc-sc8180x.h>
> +#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
> +#include <dt-bindings/clock/qcom,rpmh.h>
> +#include <dt-bindings/interconnect/qcom,osm-l3.h>
> +#include <dt-bindings/interconnect/qcom,sc8180x.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/power/qcom-rpmpd.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> +#include <dt-bindings/thermal/thermal.h>
> +
> +/ {
> + interrupt-parent = <&intc>;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + clocks {
> + xo_board_clk: xo-board {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32764>;
> + clock-output-names = "sleep_clk";
> + };
> + };
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + CPU0: cpu@0 {
> + device_type = "cpu";
> + compatible = "qcom,kryo485";
> + reg = <0x0 0x0>;
Please add clocks = <&cpufreq_hw n>;
> + enable-method = "psci";
> + capacity-dmips-mhz = <602>;
> + next-level-cache = <&L2_0>;
> + qcom,freq-domain = <&cpufreq_hw 0>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
> + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD0>;
> + power-domain-names = "psci";
> + #cooling-cells = <2>;
Add a newline before subnodes, please.
> + L2_0: l2-cache {
> + compatible = "cache";
> + next-level-cache = <&L3_0>;
> + L3_0: l3-cache {
> + compatible = "cache";
> + };
> + };
> + };
> +
[...]
> +
> + cpu0_opp_table: opp-table-cpu0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-300000000 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-peak-kBps = <800000 9600000>;
Maybe adding bwmon from the get-go would be better than statically
scaling DDR freq?
[...]
> + camnoc_virt: interconnect-0{
Missing space before {
> + compatible = "qcom,sc8180x-camnoc-virt";
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + mc_virt: interconnect-mc-virt {
Please be consistent with your naming.
> + compatible = "qcom,sc8180x-mc-virt";
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + qup_virt: interconnect-qup-virt {
> + compatible = "qcom,sc8180x-qup-virt";
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
[...]
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + hyp_mem: hyp-region@85700000 {
the -region seems a bit unnecessary in all of these nodes
> + reg = <0x0 0x85700000 0x0 0x600000>;
> + no-map;
> + };
> +
[...]
> +
> + soc: soc@0 {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0 0 0 0 0x10 0>;
> + dma-ranges = <0 0 0 0 0x10 0>;
> + compatible = "simple-bus";
compat
addr-cells
size-cella
ranges
dma-ranges
please
> +
> + gcc: clock-controller@100000 {
> + compatible = "qcom,gcc-sc8180x";
> + reg = <0x0 0x00100000 0x0 0x1f0000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + clock-names = "bi_tcxo",
> + "bi_tcxo_ao",
> + "sleep_clk";
> + clocks = <&rpmhcc RPMH_CXO_CLK>,
> + <&rpmhcc RPMH_CXO_CLK_A>,
> + <&sleep_clk>;
property before property-names
> + };
> +
> + qupv3_id_0: geniqup@8c0000 {
> + compatible = "qcom,geni-se-qup";
> + reg = <0 0x008c0000 0 0x6000>;
> + clock-names = "m-ahb", "s-ahb";
> + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
> + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + iommus = <&apps_smmu 0x4c3 0>;
> + status = "disabled";
> +
> + i2c0: i2c@880000 {
> + compatible = "qcom,geni-i2c";
> + reg = <0 0x00880000 0 0x4000>;
> + clock-names = "se";
> + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
property before property-names
Please split QUPs into a separate patch, this one is way
too big.
[...]
> + config_noc: interconnect@1500000 {
Interconnect could also realistically go to a separate patch.
> + compatible = "qcom,sc8180x-config-noc";
> + reg = <0 0x01500000 0 0x7400>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + system_noc: interconnect@1620000 {
> + compatible = "qcom,sc8180x-system-noc";
> + reg = <0 0x01620000 0 0x19400>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + aggre1_noc: interconnect@16e0000 {
> + compatible = "qcom,sc8180x-aggre1-noc";
> + reg = <0 0x016e0000 0 0xd080>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + aggre2_noc: interconnect@1700000 {
> + compatible = "qcom,sc8180x-aggre2-noc";
> + reg = <0 0x01700000 0 0x20000>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + compute_noc: interconnect@1720000 {
> + compatible = "qcom,sc8180x-compute-noc";
> + reg = <0 0x01720000 0 0x7000>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
> + mmss_noc: interconnect@1740000 {
> + compatible = "qcom,sc8180x-mmss-noc";
> + reg = <0 0x01740000 0 0x1c100>;
> + #interconnect-cells = <2>;
> + qcom,bcm-voters = <&apps_bcm_voter>;
> + };
> +
[...]
> + pcie0: pci@1c00000 {
And PCIe
> + compatible = "qcom,pcie-sc8180x";
> + reg = <0 0x01c00000 0 0x3000>,
> + <0 0x60000000 0 0xf1d>,
> + <0 0x60000f20 0 0xa8>,
> + <0 0x60001000 0 0x1000>,
> + <0 0x60100000 0 0x100000>;
> + reg-names = "parf", "dbi", "elbi", "atu", "config";
One per line, please
[...]
> +
> + ufs_mem_hc: ufshc@1d84000 {
> + compatible = "qcom,sc8180x-ufshc", "qcom,ufshc",
> + "jedec,ufs-2.0";
> + reg = <0 0x01d84000 0 0x2500>;
> + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&ufs_mem_phy_lanes>;
> + phy-names = "ufsphy";
> + lanes-per-direction = <2>;
> + #reset-cells = <1>;
> + resets = <&gcc GCC_UFS_PHY_BCR>;
> + reset-names = "rst";
> +
> + iommus = <&apps_smmu 0x300 0>;
> +
> + clock-names =
No need for this weird newline split.
Also, property before property-names.
[...]
> +
> + gpu: gpu@2c00000 {
GPUSS and MDSS related nodes should also go to their separate,
respective patches.
[...]
> +
> + remoteproc_mpss: remoteproc@4080000 {
And remote procs as well
> + compatible = "qcom,sc8180x-mpss-pas";
> + reg = <0x0 0x04080000 0x0 0x4040>;
> +
[...]
> + thermal-zones {
And thermal-zones as well.
I'll go more in-depth after you split it up, this is pretty hard
to review as-is.
Konrad
> + cpu0-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 1>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu1-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 2>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu2-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 3>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu3-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 4>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu4-top-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 7>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu5-top-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 8>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu6-top-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 9>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu7-top-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 10>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu4-bottom-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 11>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu5-bottom-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 12>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu6-bottom-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 13>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu7-bottom-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 14>;
> +
> + trips {
> + cpu-crit {
> + temperature = <110000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + aoss0-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 0>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + cluster0-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 5>;
> +
> + trips {
> + cluster-crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cluster1-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 6>;
> +
> + trips {
> + cluster-crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + gpu-thermal-top {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens0 15>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + aoss1-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 0>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + wlan-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 1>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + video-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 2>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + mem-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 3>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + q6-hvx-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 4>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + camera-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 5>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + compute-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 6>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + mdm-dsp-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 7>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + npu-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 8>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> +
> + gpu-thermal-bottom {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens1 11>;
> +
> + trips {
> + trip-point0 {
> + temperature = <90000>;
> + hysteresis = <2000>;
> + type = "hot";
> + };
> + };
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus
2023-03-25 12:24 ` [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus Vinod Koul
@ 2023-03-25 12:36 ` Konrad Dybcio
2023-03-27 5:39 ` Vinod Koul
2023-03-27 8:12 ` Krzysztof Kozlowski
1 sibling, 1 reply; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-25 12:36 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
On 25.03.2023 13:24, Vinod Koul wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Introduce support for the SC8180X reference device, aka Primus, with
> debug UART, regulators, UFS and USB support.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
Please introduce PMICs in a separate commit. On top of that,
the previous patch (in a very slim and basic version) should
have been combined with (a very slim and basic version) this
patch so that we don't introduce code that never compiles.
And the patches are missing your (as the sender) S-o-bs.
Please run them through dtbs_check and checkpatch.pl --strict,
I think it should have pointed some of that out.
Konrad
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi | 326 +++++++++
> arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 706 ++++++++++++++++++++
> 3 files changed, 1033 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-primus.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 31aa54f0428c..fdce44a7a902 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi b/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
> new file mode 100644
> index 000000000000..49c146b6f37f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
> @@ -0,0 +1,326 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2021-2022, Linaro Limited
> + */
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/spmi/spmi.h>
> +#include <dt-bindings/iio/qcom,spmi-vadc.h>
> +
> +/ {
> + thermal-zones {
> + pmc8180-thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&pmc8180_temp>;
> +
> + trips {
> + trip0 {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "passive";
> + };
> +
> + trip1 {
> + temperature = <115000>;
> + hysteresis = <0>;
> + type = "hot";
> + };
> +
> + trip2 {
> + temperature = <145000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + };
> +
> + pmc8180c-thermal {
> + polling-delay-passive = <100>;
> + polling-delay = <0>;
> +
> + thermal-sensors = <&pmc8180c_temp>;
> +
> + trips {
> + trip0 {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "passive";
> + };
> +
> + trip1 {
> + temperature = <115000>;
> + hysteresis = <0>;
> + type = "hot";
> + };
> +
> + trip2 {
> + temperature = <145000>;
> + hysteresis = <0>;
> + type = "critical";
> + };
> + };
> + };
> + };
> +};
> +
> +&spmi_bus {
> + pmc8180_0: pmic@0 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x0 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + pon: power-on@800 {
> + compatible = "qcom,pm8916-pon";
> + reg = <0x0800>;
> + pwrkey {
> + compatible = "qcom,pm8941-pwrkey";
> + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
> + debounce = <15625>;
> + bias-pull-up;
> + linux,code = <KEY_POWER>;
> +
> + status = "disabled";
> + };
> + };
> +
> + pmc8180_temp: temp-alarm@2400 {
> + compatible = "qcom,spmi-temp-alarm";
> + reg = <0x2400>;
> + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
> + io-channels = <&pmc8180_adc ADC5_DIE_TEMP>;
> + io-channel-names = "thermal";
> + #thermal-sensor-cells = <0>;
> + };
> +
> + pmc8180_adc: adc@3100 {
> + compatible = "qcom,spmi-adc5";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + die-temp@6 {
> + reg = <ADC5_DIE_TEMP>;
> + qcom,pre-scaling = <1 1>;
> + label = "die_temp";
> + };
> + };
> +
> + pmc8180_adc_tm: adc-tm@3500 {
> + compatible = "qcom,spmi-adc-tm5";
> + reg = <0x3500>;
> + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
> + #thermal-sensor-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + rtc@6000 {
> + compatible = "qcom,pm8941-rtc";
> + reg = <0x6000>;
> + reg-names = "rtc", "alarm";
> + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
> + };
> +
> + pmc8180_gpios: gpio@c000 {
> + compatible = "qcom,pmc8180-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pmic@1 {
> + compatible = "qcom,pmc8180", "qcom,spmi-pmic";
> + reg = <0x1 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + pmic@2 {
> + compatible = "qcom,smb2351", "qcom,spmi-pmic";
> + reg = <0x2 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@3100 {
> + compatible = "qcom,spmi-adc-rev2";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + vcoin@85 {
> + reg = <0x85>;
> + qcom,pre-scaling = <1 1>;
> + label = "vcoin2";
> + };
> + };
> + };
> +
> + pmic@6 {
> + compatible = "qcom,pm8150c", "qcom,spmi-pmic";
> + reg = <0x6 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + pmic@8 {
> + compatible = "qcom,pm8150", "qcom,spmi-pmic";
> + reg = <0x8 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + pmic@a {
> + compatible = "qcom,smb2351", "qcom,spmi-pmic";
> + reg = <0xa SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@3100 {
> + compatible = "qcom,spmi-adc-rev2";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0xa 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + vcoin@85 {
> + reg = <0x85>;
> + qcom,pre-scaling = <1 1>;
> + label = "vcoin";
> + };
> + };
> + };
> +
> + pmic@4 {
> + compatible = "qcom,pm8150c", "qcom,spmi-pmic";
> + reg = <0x4 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + power-on@800 {
> + compatible = "qcom,pm8916-pon";
> + reg = <0x0800>;
> +
> + status = "disabled";
> + };
> +
> + pmc8180c_temp: temp-alarm@2400 {
> + compatible = "qcom,spmi-temp-alarm";
> + reg = <0x2400>;
> + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
> + io-channels = <&pmc8180c_adc ADC5_DIE_TEMP>;
> + io-channel-names = "thermal";
> + #thermal-sensor-cells = <0>;
> + };
> +
> + pmc8180c_adc: adc@3100 {
> + compatible = "qcom,spmi-adc5";
> + reg = <0x3100>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #io-channel-cells = <1>;
> + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
> +
> + ref-gnd@0 {
> + reg = <ADC5_REF_GND>;
> + qcom,pre-scaling = <1 1>;
> + label = "ref_gnd";
> + };
> +
> + vref-1p25@1 {
> + reg = <ADC5_1P25VREF>;
> + qcom,pre-scaling = <1 1>;
> + label = "vref_1p25";
> + };
> +
> + die-temp@6 {
> + reg = <ADC5_DIE_TEMP>;
> + qcom,pre-scaling = <1 1>;
> + label = "die_temp";
> + };
> + };
> +
> + pmc8180c_adc_tm: adc-tm@3500 {
> + compatible = "qcom,spmi-adc-tm5";
> + reg = <0x3500>;
> + interrupts = <0x4 0x35 0x0 IRQ_TYPE_EDGE_RISING>;
> + #thermal-sensor-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + pmc8180c_gpios: gpio@c000 {
> + compatible = "qcom,pmc8180c-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> + pmic@5 {
> + compatible = "qcom,pmc8180c", "qcom,spmi-pmic";
> + reg = <0x5 SPMI_USID>;
> +
> + pmc8180c_lpg: lpg {
> + compatible = "qcom,pmc8180c-lpg";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #pwm-cells = <2>;
> +
> + status = "disabled";
> + };
> + };
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
> new file mode 100644
> index 000000000000..9f365fccae78
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
> @@ -0,0 +1,706 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020-2023, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "sc8180x.dtsi"
> +#include "sc8180x-pmics.dtsi"
> +
> +/ {
> + model = "Qualcomm SC8180x Primus";
> + compatible = "qcom,sc8180x-primus", "qcom,sc8180x";
> +
> + aliases {
> + serial0 = &uart12;
> + serial1 = &uart13;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pmc8180c_lpg 4 1000000>;
> + enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&bl_pwm_default>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&hall_int_active_state>;
> +
> + lid-switch {
> + gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + wakeup-source;
> + wakeup-event-action = <EV_ACT_DEASSERTED>;
> + };
> + };
> +
> + reserved-memory {
> + rmtfs_mem: rmtfs-region@85500000 {
> + compatible = "qcom,rmtfs-mem";
> + reg = <0x0 0x85500000 0x0 0x200000>;
> + no-map;
> +
> + qcom,client-id = <1>;
> + qcom,vmid = <15>;
> + };
> +
> + wlan_mem: wlan-region@8bc00000 {
> + reg = <0x0 0x8bc00000 0x0 0x180000>;
> + no-map;
> + };
> +
> + adsp_mem: adsp-region@96e00000 {
> + reg = <0x0 0x96e00000 0x0 0x1c00000>;
> + no-map;
> + };
> +
> + mpss_mem: mpss-region@8d800000 {
> + reg = <0x0 0x8d800000 0x0 0x9600000>;
> + no-map;
> + };
> +
> + gpu_mem: gpu-region@98a00000 {
> + reg = <0x0 0x98a00000 0x0 0x2000>;
> + no-map;
> + };
> +
> + reserved-region@9a500000 {
> + reg = <0x0 0x9a500000 0x0 0x600000>;
> + no-map;
> + };
> + };
> +
> + vreg_nvme_0p9: nvme-0p9-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_nvme_0p9";
> +
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> +
> + regulator-always-on;
> + };
> +
> + vreg_nvme_3p3: nvme-3p3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_nvme_3p3";
> +
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmc8180c_gpios 11 0>;
> + enable-active-high;
> +
> + regulator-always-on;
> + };
> +
> + vdd_kb_tp_3v3: vdd-kb-tp-3v3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_kb_tp_3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + regulator-always-on;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&kb_tp_3v3_en_active_state>;
> + };
> +
> + vph_pwr: vph-pwr-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> + };
> +
> + vreg_s4a_1p8: pm8150-s4 {
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_s4a_1p8";
> +
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> +
> + vin-supply = <&vph_pwr>;
> + };
> +};
> +
> +&apps_rsc {
> + pmc8180-a-rpmh-regulators {
> + compatible = "qcom,pmc8180-rpmh-regulators";
> + qcom,pmic-id = "a";
> +
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>;
> +
> + vreg_s5a_2p0: smps5 {
> + regulator-min-microvolt = <2040000>;
> + regulator-max-microvolt = <2100000>;
> + };
> +
> + vreg_l7a_1p8: ldo7 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l9a_1p3: ldo9 {
> + regulator-min-microvolt = <1296000>;
> + regulator-max-microvolt = <1304000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l12a_1p8: ldo12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +
> + pmc8180c-rpmh-regulators {
> + compatible = "qcom,pmc8180c-rpmh-regulators";
> + qcom,pmic-id = "c";
> +
> + vdd-s6-supply = <&vph_pwr>;
> + vdd-s8-supply = <&vph_pwr>;
> + vdd-l2-l3-supply = <&vreg_s6c_1p35>;
> + vdd-bob-supply = <&vph_pwr>;
> +
> + vreg_s6c_1p35: smps6 {
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1372000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_s8c_1p8: smps8 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + regulator-always-on;
> + };
> +
> + vreg_l3c_1p2: ldo3 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l4c_3p3: ldo4 {
> + regulator-min-microvolt = <3008000>;
> + regulator-max-microvolt = <3008000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l10c_3p3: ldo10 {
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3312000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l11c_3p3: ldo11 {
> + regulator-min-microvolt = <3296000>;
> + regulator-max-microvolt = <3304000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_bob: bob {
> + regulator-min-microvolt = <3296000>;
> + regulator-max-microvolt = <3350000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +
> + pmc8180-e-rpmh-regulators {
> + compatible = "qcom,pmc8180-rpmh-regulators";
> + qcom,pmic-id = "e";
> +
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-l2-l10-supply = <&vreg_bob>;
> + vdd-l3-l4-l5-l18-supply = <&vreg_s4e_0p98>;
> + vdd-l7-l12-l14-l15-supply = <&vreg_s5e_2p05>;
> + vdd-l13-l16-l17-supply = <&vreg_bob>;
> +
> + vreg_s4e_0p98: smps4 {
> + regulator-min-microvolt = <992000>;
> + regulator-max-microvolt = <992000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_s5e_2p05: smps5 {
> + regulator-min-microvolt = <2040000>;
> + regulator-max-microvolt = <2040000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l1e_0p75: ldo1 {
> + regulator-min-microvolt = <752000>;
> + regulator-max-microvolt = <752000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l5e_0p88: ldo5 {
> + regulator-min-microvolt = <880000>;
> + regulator-max-microvolt = <880000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l7e_1p8: ldo7 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l10e_2p9: ldo10 {
> + regulator-min-microvolt = <2904000>;
> + regulator-max-microvolt = <2904000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l12e: ldo12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l16e_3p0: ldo16 {
> + regulator-min-microvolt = <3072000>;
> + regulator-max-microvolt = <3072000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +};
> +
> +&dispcc {
> + status = "okay";
> +};
> +
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;
> + firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts_i2c_active_state>;
> +
> + status = "okay";
> +
> + touchscreen@10 {
> + compatible = "hid-over-i2c";
> + reg = <0x10>;
> + hid-descr-addr = <0x1>;
> +
> + vdd-supply = <&vreg_l4c_3p3>;
> + vddl-supply = <&vreg_l12e>;
> +
> + post-power-on-delay-ms = <20>;
> +
> + interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts_active_state>;
> + };
> +};
> +
> +&i2c7 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&aux_i2c_active_state>;
> +
> + status = "okay";
> +
> + touchpad@15 {
> + compatible = "hid-over-i2c";
> + reg = <0x15>;
> + hid-descr-addr = <0x1>;
> +
> + interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&tp_int_active_state>;
> +
> + vdd-supply = <&vdd_kb_tp_3v3>;
> + };
> +
> + keyboard@3a {
> + compatible = "hid-over-i2c";
> + reg = <0x3a>;
> + hid-descr-addr = <0x1>;
> + interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&kb_int_active_state>;
> +
> + vdd-supply = <&vdd_kb_tp_3v3>;
> + };
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_edp {
> + data-lanes = <0 1 2 3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&edp_hpd_active>;
> +
> + status = "okay";
> +
> + aux-bus {
> + panel {
> + compatible = "edp-panel";
> +
> + backlight = <&backlight>;
> +
> + ports {
> + port {
> + auo_b133han05_in: endpoint {
> + remote-endpoint = <&mdss_edp_out>;
> + };
> + };
> + };
> + };
> + };
> +
> + ports {
> + port@1 {
> + reg = <1>;
> + mdss_edp_out: endpoint {
> + remote-endpoint = <&auo_b133han05_in>;
> + };
> + };
> + };
> +};
> +
> +&pcie1 {
> + perst-gpio = <&tlmm 175 GPIO_ACTIVE_LOW>;
> + wake-gpio = <&tlmm 177 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_default_state>;
> +
> + status = "okay";
> +};
> +
> +&pcie1_phy {
> + vdda-phy-supply = <&vreg_l5e_0p88>;
> + vdda-pll-supply = <&vreg_l3c_1p2>;
> +
> + status = "okay";
> +};
> +
> +&pmc8180c_lpg {
> + status = "okay";
> +};
> +
> +&qupv3_id_0 {
> + status = "okay";
> +};
> +
> +&qupv3_id_1 {
> + status = "okay";
> +};
> +
> +&qupv3_id_2 {
> + status = "okay";
> +};
> +
> +&remoteproc_adsp {
> + memory-region = <&adsp_mem>;
> + firmware-name = "qcom/sc8180x/qcadsp8180.mbn";
> +
> + status = "okay";
> +};
> +
> +&remoteproc_mpss {
> + memory-region = <&mpss_mem>;
> + firmware-name = "qcom/sc8180x/qcmpss8180.mbn";
> +
> + status = "okay";
> +};
> +
> +&uart12 {
> + compatible = "qcom,geni-debug-uart";
> + status = "okay";
> +};
> +
> +&uart13 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart13_state>;
> +
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn3998-bt";
> +
> + vddio-supply = <&vreg_s4a_1p8>;
> + vddxo-supply = <&vreg_l7a_1p8>;
> + vddrf-supply = <&vreg_l9a_1p3>;
> + vddch0-supply = <&vreg_l11c_3p3>;
> + max-speed = <3200000>;
> + };
> +};
> +
> +&ufs_mem_hc {
> + reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
> +
> + vcc-supply = <&vreg_l10e_2p9>;
> + vcc-max-microamp = <155000>;
> +
> + vccq2-supply = <&vreg_l7e_1p8>;
> + vccq2-max-microamp = <425000>;
> +
> + status = "okay";
> +};
> +
> +&ufs_mem_phy {
> + vdda-phy-supply = <&vreg_l5e_0p88>;
> + vdda-pll-supply = <&vreg_l3c_1p2>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim_hsphy {
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> + vdda18-supply = <&vreg_l12a_1p8>;
> + vdda33-supply = <&vreg_l16e_3p0>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim {
> + status = "okay";
> +};
> +
> +&usb_prim_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&usb_sec_hsphy {
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> + vdda18-supply = <&vreg_l12a_1p8>;
> + vdda33-supply = <&vreg_l16e_3p0>;
> +
> + status = "okay";
> +};
> +
> +&usb_sec_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&usb_sec {
> + status = "okay";
> +};
> +
> +&usb_sec_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&wifi {
> + memory-region = <&wlan_mem>;
> +
> + vdd-0.8-cx-mx-supply = <&vreg_l1e_0p75>;
> + vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
> + vdd-1.3-rfa-supply = <&vreg_l9a_1p3>;
> + vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
> + vdd-3.3-ch1-supply = <&vreg_l10c_3p3>;
> +
> + status = "okay";
> +};
> +
> +&xo_board_clk {
> + clock-frequency = <38400000>;
> +};
> +
> +/* PINCTRL */
> +
> +&pmc8180c_gpios {
> + bl_pwm_default: bl-pwm-default-state {
> + en-pins {
> + pins = "gpio8";
> + function = "normal";
> + };
> +
> + pwm-pins {
> + pins = "gpio10";
> + function = "func1";
> + };
> + };
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <0 4>, <47 4>, <126 4>;
> +
> + aux_i2c_active_state: aux-i2c-active-state {
> + pins = "gpio98", "gpio99";
> + function = "qup7";
> +
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> + edp_hpd_active: epd-hpd-active-state {
> + pins = "gpio10";
> + function = "edp_hot";
> + };
> +
> + hall_int_active_state: hall-int-active-state {
> + pins = "gpio121";
> + function = "gpio";
> +
> + input-enable;
> + bias-disable;
> + };
> +
> + kb_int_active_state: kb-int-active-state {
> + int-n-pins {
> + pins = "gpio37";
> + function = "gpio";
> +
> + bias-pull-up;
> + intput-enable;
> + };
> +
> + kp-disable-pins {
> + pins = "gpio135";
> + function = "gpio";
> +
> + output-high;
> + };
> + };
> +
> + kb_tp_3v3_en_active_state: kb-tp-3v3-en-active-state {
> + pins = "gpio4";
> + functino = "gpio";
> +
> + bias-disable;
> + };
> +
> + pcie2_default_state: pcie2-default-state {
> + clkreq-pins {
> + pins = "gpio176";
> + function = "pci_e2";
> + bias-pull-up;
> + };
> +
> + reset-n-pins {
> + pins = "gpio175";
> + function = "gpio";
> +
> + drive-strength = <2>;
> + output-low;
> + bias-pull-down;
> + };
> +
> + wake-n-pins {
> + pins = "gpio177";
> + function = "gpio";
> +
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +
> + tp_int_active_state: tp-int-active-state {
> + tp-int-pins {
> + pins = "gpio24";
> + function = "gpio";
> +
> + bias-disable;
> + input-enable;
> + };
> +
> + tp-close-n-pins {
> + pins = "gpio116";
> + function = "gpio";
> +
> + bias-disable;
> + input-enable;
> + };
> + };
> +
> + ts_active_state: ts-active-state {
> + int-n-pins {
> + pins = "gpio122";
> + function = "gpio";
> +
> + input-enable;
> + bias-disable;
> + };
> +
> + reset-n-pins {
> + pins = "gpio54";
> + function = "gpio";
> +
> + output-high;
> + };
> + };
> +
> + ts_i2c_active_state: ts-i2c-active-state {
> + pins = "gpio114", "gpio115";
> + function = "qup1";
> +
> + /* External pull up */
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + uart13_state: uart13-state {
> + cts-pins {
> + pins = "gpio43";
> + function = "qup13";
> + bias-pull-down;
> + };
> +
> + rts-tx-pins {
> + pins = "gpio44", "gpio45";
> + function = "qup13";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + rx-pins {
> + pins = "gpio46";
> + function = "qup13";
> + bias-pull-up;
> + };
> + };
> +};
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
2023-03-25 12:24 ` [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G Vinod Koul
@ 2023-03-25 12:40 ` Konrad Dybcio
2023-03-27 5:43 ` Vinod Koul
0 siblings, 1 reply; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-25 12:40 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
On 25.03.2023 13:24, Vinod Koul wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Introduce support for the Lenovo Flex 5G laptop, built on the Qualcomm
> SC8180X platform. Supported peripherals includes keyboard, touchpad,
> UFS storage, external USB and WiFi.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 590 ++++++++++++++++++
> 2 files changed, 591 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index fdce44a7a902..f096561f711e 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
> new file mode 100644
> index 000000000000..76dad608fb85
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
> @@ -0,0 +1,590 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020-2023, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "sc8180x.dtsi"
> +#include "sc8180x-pmics.dtsi"
> +
> +/ {
> + model = "Lenovo Flex 5G";
> + compatible = "lenovo,flex-5g", "qcom,sc8180x";
> +
> + aliases {
> + serial0 = &uart13;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pmc8180c_lpg 4 1000000>;
> + enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&bl_pwm_default>;
> + };
> +
> + chosen {
> + };
Unused, remove.
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&hall_int_active_state>;
property
property-names
> +
> + lid {
> + gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + wakeup-source;
> + wakeup-event-action = <EV_ACT_DEASSERTED>;
> + };
> + };
> +
> + reserved-memory {
> + rmtfs_mem: rmtfs-region@85500000 {
> + compatible = "qcom,rmtfs-mem";
> + reg = <0x0 0x85500000 0x0 0x200000>;
You're using 0 and 0x0 in a mixed fashion. Please stick with one,
preferably 0x0 everywhere.
> + no-map;
> +
> + qcom,client-id = <1>;
> + qcom,vmid = <15>;
> + };
> +
[...]
> +
> +&dispcc {
> + status = "okay";
Any reason for disabling dispcc by default?
> +};
> +
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;
> + firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_active>, <&i2c1_hid_active>;
property
property-names
> +
> + status = "okay";
> +
> + hid@10 {
> + compatible = "hid-over-i2c";
> + reg = <0x10>;
> + hid-descr-addr = <0x1>;
> +
> + interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> +&i2c7 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c7_active>, <&i2c7_hid_active>;
> +
> + status = "okay";
> +
> + hid@5 {
> + compatible = "hid-over-i2c";
> + reg = <0x5>;
> + hid-descr-addr = <0x20>;
> +
> + interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
> + };
> +
> + hid@2c {
> + compatible = "hid-over-i2c";
> + reg = <0x2c>;
> + hid-descr-addr = <0x20>;
> +
> + interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
> + };
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_edp {
> + data-lanes = <0 1 2 3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&edp_hpd_active>;
> +
> + status = "okay";
> +
> + aux-bus {
> + panel {
> + compatible = "edp-panel";
> + no-hpd;
> +
> + backlight = <&backlight>;
> +
> + ports {
> + port {
> + auo_b140han06_in: endpoint {
> + remote-endpoint = <&mdss_edp_out>;
> + };
> + };
> + };
> + };
> + };
> +
> + ports {
> + port@1 {
> + reg = <1>;
> + mdss_edp_out: endpoint {
> + remote-endpoint = <&auo_b140han06_in>;
> + };
> + };
> + };
> +};
> +
> +&pcie3 {
> + perst-gpio = <&tlmm 178 GPIO_ACTIVE_LOW>;
> + wake-gpio = <&tlmm 180 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie3_default_state>;
> +
> + status = "okay";
> +};
> +
> +&pcie3_phy {
> + vdda-phy-supply = <&vreg_l5e_0p88>;
> + vdda-pll-supply = <&vreg_l3c_1p2>;
> +
> + status = "okay";
> +};
> +
> +&pmc8180c_lpg {
> + status = "okay";
> +};
> +
> +&qupv3_id_0 {
> + status = "okay";
> +};
> +
> +&qupv3_id_1 {
> + status = "okay";
> +};
> +
> +&qupv3_id_2 {
> + status = "okay";
> +};
> +
> +&remoteproc_adsp {
> + memory-region = <&adsp_mem>;
> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcadsp8180.mbn";
> +
> + status = "okay";
> +};
> +
> +&remoteproc_cdsp {
> + memory-region = <&cdsp_mem>;
> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qccdsp8180.mbn";
> +
> + status = "okay";
> +};
> +
> +&remoteproc_mpss {
> + memory-region = <&mpss_mem>;
> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcmpss8180_nm.mbn";
> +
> + status = "okay";
> +};
> +
> +&uart13 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart13_state>;
> +
> + status = "okay";
> +
> + bluetooth {
> + compatible = "qcom,wcn3998-bt";
> +
> + vddio-supply = <&vreg_s4a_1p8>;
> + vddxo-supply = <&vreg_l7a_1p8>;
> + vddrf-supply = <&vreg_l9a_1p3>;
> + vddch0-supply = <&vreg_l11c_3p3>;
> + max-speed = <3200000>;
> + };
> +};
> +
> +&ufs_mem_hc {
> + reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
> +
> + vcc-supply = <&vreg_l10e_2p9>;
> + vcc-max-microamp = <155000>;
> +
> + vccq2-supply = <&vreg_l7e_1p8>;
> + vccq2-max-microamp = <425000>;
Missing regulator-allow-set-load for regulators that have current
ops assigned to them.
> +
> + status = "okay";
> +};
> +
> +&ufs_mem_phy {
> + vdda-phy-supply = <&vreg_l5e_0p88>;
> + vdda-pll-supply = <&vreg_l3c_1p2>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim_hsphy {
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> + vdda18-supply = <&vreg_l12a_1p8>;
> + vdda33-supply = <&vreg_l16e_3p0>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&usb_prim {
We mostly use usb_1 / usb_2 for this
> + status = "okay";
> +};
> +
> +&usb_prim_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&usb_sec_hsphy {
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> + vdda18-supply = <&vreg_l12a_1p8>;
> + vdda33-supply = <&vreg_l16e_3p0>;
> +
> + status = "okay";
> +};
> +
> +&usb_sec_qmpphy {
> + vdda-phy-supply = <&vreg_l3c_1p2>;
> + vdda-pll-supply = <&vreg_l5e_0p88>;
> +
> + status = "okay";
> +};
> +
> +&usb_sec {
> + status = "okay";
> +};
> +
> +&usb_sec_dwc3 {
> + dr_mode = "host";
No roleswitching?
> +};
> +
> +&wifi {
> + memory-region = <&wlan_mem>;
It comes from the common dt file, so this may as well stay there.
Konrad
> +
> + vdd-0.8-cx-mx-supply = <&vreg_l1e_0p75>;
> + vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
> + vdd-1.3-rfa-supply = <&vreg_l9a_1p3>;
> + vdd-3.3-ch0-supply = <&vreg_l11c_3p3>;
> + vdd-3.3-ch1-supply = <&vreg_l10c_3p3>;
> +
> + status = "okay";
> +};
> +
> +&xo_board_clk {
> + clock-frequency = <38400000>;
> +};
> +
> +/* PINCTRL */
> +
> +&pmc8180c_gpios {
> + bl_pwm_default: bl-pwm-default-state {
> + en-pins {
> + pins = "gpio8";
> + function = "normal";
> + };
> +
> + pwm-pins {
> + pins = "gpio10";
> + function = "func1";
> + };
> + };
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <0 4>, <47 4>, <126 4>;
> +
> + edp_hpd_active: epd-hpd-active-state {
> + pins = "gpio10";
> + function = "edp_hot";
> + };
> +
> + hall_int_active_state: hall-int-active-state {
> + pins = "gpio121";
> + function = "gpio";
> +
> + input-enable;
> + bias-disable;
> + };
> +
> + i2c1_active: i2c1-active-state {
> + pins = "gpio114", "gpio115";
> + function = "qup1";
> +
> + bias-pull-up = <1>;
> + drive-strength = <2>;
> + };
> +
> + i2c1_hid_active: i2c1-hid-active-state {
> + pins = "gpio122";
> + function = "gpio";
> +
> + input-enable;
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + i2c7_active: i2c7-active-state {
> + pins = "gpio98", "gpio99";
> + function = "qup7";
> +
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + i2c7_hid_active: i2c7-hid-active-state {
> + pins = "gpio37", "gpio24";
> + function = "gpio";
> +
> + input-enable;
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pcie3_default_state: pcie3-default-state {
> + clkreq-pins {
> + pins = "gpio179";
> + function = "pci_e3";
> + bias-pull-up;
> + };
> +
> + reset-n-pins {
> + pins = "gpio178";
> + function = "gpio";
> +
> + drive-strength = <2>;
> + output-low;
> + bias-pull-down;
> + };
> +
> + wake-n-pins {
> + pins = "gpio180";
> + function = "gpio";
> +
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +
> + uart13_state: uart13-state {
> + cts-pins {
> + pins = "gpio43";
> + function = "qup13";
> + bias-pull-down;
> + };
> +
> + rts-tx-pins {
> + pins = "gpio44", "gpio45";
> + function = "qup13";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + rx-pins {
> + pins = "gpio46";
> + function = "qup13";
> + bias-pull-up;
> + };
> + };
> +};
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema
2023-03-25 12:24 ` [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema Vinod Koul
@ 2023-03-26 14:10 ` Rob Herring
2023-03-28 8:29 ` Vinod Koul
0 siblings, 1 reply; 39+ messages in thread
From: Rob Herring @ 2023-03-26 14:10 UTC (permalink / raw)
To: Vinod Koul
Cc: devicetree, Konrad Dybcio, Georgi Djakov, linux-pm, Rob Herring,
Bjorn Andersson, linux-arm-msm, Krzysztof Kozlowski, linux-kernel
On Sat, 25 Mar 2023 17:54:37 +0530, Vinod Koul wrote:
> SC8180x comes with interconnects having and missing IO address space, and
> variable number of clocks, so split it from common file for easier
> maintenance and to fix warnings like:
>
> sc8180x-lenovo-flex-5g.dtb: interconnect-0: 'reg' is a required property
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
> .../bindings/interconnect/qcom,rpmh.yaml | 11 ---
> .../interconnect/qcom,sc8180x-rpmh.yaml | 76 +++++++++++++++++++
> 2 files changed, 76 insertions(+), 11 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml: properties:compatible:enum: ['qcom,sc8180x-aggre1-noc', 'qcom,sc8180x-aggre1-noc', 'qcom,sc8180x-aggre2-noc', 'qcom,sc8180x-camnoc-virt', 'qcom,sc8180x-compute-noc', 'qcom,sc8180x-config-noc', 'qcom,sc8180x-dc-noc', 'qcom,sc8180x-gem-noc', 'qcom,sc8180x-mc-virt', 'qcom,sc8180x-mmss-noc', 'qcom,sc8180x-qup-virt', 'qcom,sc8180x-system-noc'] has non-unique elements
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.example.dtb: interconnect@16e0000: reg: [[0, 23986176], [0, 53376]] is too long
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.example.dtb: interconnect@16e0000: Unevaluated properties are not allowed ('reg' was unexpected)
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230325122444.249507-6-vkoul@kernel.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform
2023-03-25 12:34 ` [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform Konrad Dybcio
@ 2023-03-27 5:38 ` Vinod Koul
2023-03-27 8:49 ` Konrad Dybcio
0 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-27 5:38 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 25-03-23, 13:34, Konrad Dybcio wrote:
>
>
> On 25.03.2023 13:24, Vinod Koul wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >
> > Introduce a base dtsi for the Qualcomm SC8180x platform, with CPUs,
> > global clock controller, SMMU, rpmh clocks, rpmh power-domains, CPUfreq,
> > QUP blocks, UFS, USB, ADSP, CDSP and MPSS and WiFi.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> > arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3950 +++++++++++++++++++++++++
> > 1 file changed, 3950 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/qcom/sc8180x.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> > new file mode 100644
> > index 000000000000..4d4ee6bc91e5
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
> > @@ -0,0 +1,3950 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> > + * Copyright (c) 2020-2023, Linaro Limited
> > + */
> > +
> > +#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
> > +#include <dt-bindings/clock/qcom,gcc-sc8180x.h>
> > +#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
> > +#include <dt-bindings/clock/qcom,rpmh.h>
> > +#include <dt-bindings/interconnect/qcom,osm-l3.h>
> > +#include <dt-bindings/interconnect/qcom,sc8180x.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +#include <dt-bindings/power/qcom-rpmpd.h>
> > +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
> > +#include <dt-bindings/thermal/thermal.h>
> > +
> > +/ {
> > + interrupt-parent = <&intc>;
> > +
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + clocks {
> > + xo_board_clk: xo-board {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <38400000>;
> > + };
> > +
> > + sleep_clk: sleep-clk {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <32764>;
> > + clock-output-names = "sleep_clk";
> > + };
> > + };
> > +
> > + cpus {
> > + #address-cells = <2>;
> > + #size-cells = <0>;
> > +
> > + CPU0: cpu@0 {
> > + device_type = "cpu";
> > + compatible = "qcom,kryo485";
> > + reg = <0x0 0x0>;
> Please add clocks = <&cpufreq_hw n>;
>
> > + enable-method = "psci";
> > + capacity-dmips-mhz = <602>;
> > + next-level-cache = <&L2_0>;
> > + qcom,freq-domain = <&cpufreq_hw 0>;
You mean this or something else?
> > + operating-points-v2 = <&cpu0_opp_table>;
> > + interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
> > + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> > + power-domains = <&CPU_PD0>;
> > + power-domain-names = "psci";
> > + #cooling-cells = <2>;
> Add a newline before subnodes, please.
Sure
>
> > + L2_0: l2-cache {
> > + compatible = "cache";
> > + next-level-cache = <&L3_0>;
> > + L3_0: l3-cache {
> > + compatible = "cache";
> > + };
> > + };
> > + };
> > +
> [...]
>
> > +
> > + cpu0_opp_table: opp-table-cpu0 {
> > + compatible = "operating-points-v2";
> > + opp-shared;
> > +
> > + opp-300000000 {
> > + opp-hz = /bits/ 64 <300000000>;
> > + opp-peak-kBps = <800000 9600000>;
> Maybe adding bwmon from the get-go would be better than statically
> scaling DDR freq?
Maybe :-) but we would like to land the dts now rather than wait more :)
>
> [...]
>
> > + camnoc_virt: interconnect-0{
> Missing space before {
Will fix
> > + compatible = "qcom,sc8180x-camnoc-virt";
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + mc_virt: interconnect-mc-virt {
> Please be consistent with your naming.
Are you referring to adding -0 for this?
>
> > + compatible = "qcom,sc8180x-mc-virt";
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + qup_virt: interconnect-qup-virt {
> > + compatible = "qcom,sc8180x-qup-virt";
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> [...]
>
> > + reserved-memory {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + hyp_mem: hyp-region@85700000 {
> the -region seems a bit unnecessary in all of these nodes
This is reserved for hyp, I think we should add it here so that we dont
touch this piece..?
>
> > + reg = <0x0 0x85700000 0x0 0x600000>;
> > + no-map;
> > + };
> > +
> [...]
>
> > +
> > + soc: soc@0 {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges = <0 0 0 0 0x10 0>;
> > + dma-ranges = <0 0 0 0 0x10 0>;
> > + compatible = "simple-bus";
> compat
> addr-cells
> size-cella
> ranges
> dma-ranges
>
> please
Sure
>
> > +
> > + gcc: clock-controller@100000 {
> > + compatible = "qcom,gcc-sc8180x";
> > + reg = <0x0 0x00100000 0x0 0x1f0000>;
> > + #clock-cells = <1>;
> > + #reset-cells = <1>;
> > + #power-domain-cells = <1>;
> > + clock-names = "bi_tcxo",
> > + "bi_tcxo_ao",
> > + "sleep_clk";
> > + clocks = <&rpmhcc RPMH_CXO_CLK>,
> > + <&rpmhcc RPMH_CXO_CLK_A>,
> > + <&sleep_clk>;
> property before property-names
ok
>
>
> > + };
> > +
> > + qupv3_id_0: geniqup@8c0000 {
> > + compatible = "qcom,geni-se-qup";
> > + reg = <0 0x008c0000 0 0x6000>;
> > + clock-names = "m-ahb", "s-ahb";
> > + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
> > + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > + iommus = <&apps_smmu 0x4c3 0>;
> > + status = "disabled";
> > +
> > + i2c0: i2c@880000 {
> > + compatible = "qcom,geni-i2c";
> > + reg = <0 0x00880000 0 0x4000>;
> > + clock-names = "se";
> > + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
> property before property-names
>
> Please split QUPs into a separate patch, this one is way
> too big.
Will do
>
> [...]
>
> > + config_noc: interconnect@1500000 {
> Interconnect could also realistically go to a separate patch.
Yeah already list is complaining, let me see how to split it up...
>
> > + compatible = "qcom,sc8180x-config-noc";
> > + reg = <0 0x01500000 0 0x7400>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + system_noc: interconnect@1620000 {
> > + compatible = "qcom,sc8180x-system-noc";
> > + reg = <0 0x01620000 0 0x19400>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + aggre1_noc: interconnect@16e0000 {
> > + compatible = "qcom,sc8180x-aggre1-noc";
> > + reg = <0 0x016e0000 0 0xd080>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + aggre2_noc: interconnect@1700000 {
> > + compatible = "qcom,sc8180x-aggre2-noc";
> > + reg = <0 0x01700000 0 0x20000>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + compute_noc: interconnect@1720000 {
> > + compatible = "qcom,sc8180x-compute-noc";
> > + reg = <0 0x01720000 0 0x7000>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> > + mmss_noc: interconnect@1740000 {
> > + compatible = "qcom,sc8180x-mmss-noc";
> > + reg = <0 0x01740000 0 0x1c100>;
> > + #interconnect-cells = <2>;
> > + qcom,bcm-voters = <&apps_bcm_voter>;
> > + };
> > +
> [...]
>
> > + pcie0: pci@1c00000 {
> And PCIe
>
> > + compatible = "qcom,pcie-sc8180x";
> > + reg = <0 0x01c00000 0 0x3000>,
> > + <0 0x60000000 0 0xf1d>,
> > + <0 0x60000f20 0 0xa8>,
> > + <0 0x60001000 0 0x1000>,
> > + <0 0x60100000 0 0x100000>;
> > + reg-names = "parf", "dbi", "elbi", "atu", "config";
> One per line, please
ok
>
>
> [...]
>
> > +
> > + ufs_mem_hc: ufshc@1d84000 {
> > + compatible = "qcom,sc8180x-ufshc", "qcom,ufshc",
> > + "jedec,ufs-2.0";
> > + reg = <0 0x01d84000 0 0x2500>;
> > + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> > + phys = <&ufs_mem_phy_lanes>;
> > + phy-names = "ufsphy";
> > + lanes-per-direction = <2>;
> > + #reset-cells = <1>;
> > + resets = <&gcc GCC_UFS_PHY_BCR>;
> > + reset-names = "rst";
> > +
> > + iommus = <&apps_smmu 0x300 0>;
> > +
> > + clock-names =
> No need for this weird newline split.
>
> Also, property before property-names.
>
> [...]
>
>
> > +
> > + gpu: gpu@2c00000 {
> GPUSS and MDSS related nodes should also go to their separate,
> respective patches.
ok
>
> [...]
> > +
> > + remoteproc_mpss: remoteproc@4080000 {
> And remote procs as well
>
> > + compatible = "qcom,sc8180x-mpss-pas";
> > + reg = <0x0 0x04080000 0x0 0x4040>;
> > +
> [...]
>
> > + thermal-zones {
> And thermal-zones as well.
>
>
> I'll go more in-depth after you split it up, this is pretty hard
> to review as-is.
>
> Konrad
> > + cpu0-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 1>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu1-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 2>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu2-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 3>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu3-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 4>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu4-top-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 7>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu5-top-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 8>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu6-top-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 9>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu7-top-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 10>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu4-bottom-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 11>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu5-bottom-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 12>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu6-bottom-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 13>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu7-bottom-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 14>;
> > +
> > + trips {
> > + cpu-crit {
> > + temperature = <110000>;
> > + hysteresis = <1000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + aoss0-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 0>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + cluster0-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 5>;
> > +
> > + trips {
> > + cluster-crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cluster1-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 6>;
> > +
> > + trips {
> > + cluster-crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + gpu-thermal-top {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens0 15>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + aoss1-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 0>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + wlan-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 1>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + video-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 2>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + mem-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 3>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + q6-hvx-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 4>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + camera-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 5>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + compute-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 6>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + mdm-dsp-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 7>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + npu-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 8>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > +
> > + gpu-thermal-bottom {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens1 11>;
> > +
> > + trips {
> > + trip-point0 {
> > + temperature = <90000>;
> > + hysteresis = <2000>;
> > + type = "hot";
> > + };
> > + };
> > + };
> > + };
> > +
> > + timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus
2023-03-25 12:36 ` Konrad Dybcio
@ 2023-03-27 5:39 ` Vinod Koul
0 siblings, 0 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-27 5:39 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 25-03-23, 13:36, Konrad Dybcio wrote:
>
>
> On 25.03.2023 13:24, Vinod Koul wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >
> > Introduce support for the SC8180X reference device, aka Primus, with
> > debug UART, regulators, UFS and USB support.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > ---
> Please introduce PMICs in a separate commit. On top of that,
> the previous patch (in a very slim and basic version) should
> have been combined with (a very slim and basic version) this
> patch so that we don't introduce code that never compiles.
>
> And the patches are missing your (as the sender) S-o-bs.
Yeah not sure how that got missed, thanks for checking
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
2023-03-25 12:40 ` Konrad Dybcio
@ 2023-03-27 5:43 ` Vinod Koul
2023-03-27 8:51 ` Konrad Dybcio
0 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-27 5:43 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 25-03-23, 13:40, Konrad Dybcio wrote:
>
>
> On 25.03.2023 13:24, Vinod Koul wrote:
> > From: Bjorn Andersson <bjorn.andersson@linaro.org>
> >
> > Introduce support for the Lenovo Flex 5G laptop, built on the Qualcomm
> > SC8180X platform. Supported peripherals includes keyboard, touchpad,
> > UFS storage, external USB and WiFi.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> > arch/arm64/boot/dts/qcom/Makefile | 1 +
> > .../boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 590 ++++++++++++++++++
> > 2 files changed, 591 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
> >
> > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> > index fdce44a7a902..f096561f711e 100644
> > --- a/arch/arm64/boot/dts/qcom/Makefile
> > +++ b/arch/arm64/boot/dts/qcom/Makefile
> > @@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
> > +dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
> > dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
> > diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
> > new file mode 100644
> > index 000000000000..76dad608fb85
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
> > @@ -0,0 +1,590 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> > + * Copyright (c) 2020-2023, Linaro Limited
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/input/gpio-keys.h>
> > +#include <dt-bindings/input/input.h>
> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> > +#include "sc8180x.dtsi"
> > +#include "sc8180x-pmics.dtsi"
> > +
> > +/ {
> > + model = "Lenovo Flex 5G";
> > + compatible = "lenovo,flex-5g", "qcom,sc8180x";
> > +
> > + aliases {
> > + serial0 = &uart13;
> > + };
> > +
> > + backlight: backlight {
> > + compatible = "pwm-backlight";
> > + pwms = <&pmc8180c_lpg 4 1000000>;
> > + enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&bl_pwm_default>;
> > + };
> > +
> > + chosen {
> > + };
> Unused, remove.
ok
>
> > +
> > + gpio-keys {
> > + compatible = "gpio-keys";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&hall_int_active_state>;
> property
> property-names
ack here and everwhere else
>
> > +
> > + lid {
> > + gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
> > + linux,input-type = <EV_SW>;
> > + linux,code = <SW_LID>;
> > + wakeup-source;
> > + wakeup-event-action = <EV_ACT_DEASSERTED>;
> > + };
> > + };
> > +
> > + reserved-memory {
> > + rmtfs_mem: rmtfs-region@85500000 {
> > + compatible = "qcom,rmtfs-mem";
> > + reg = <0x0 0x85500000 0x0 0x200000>;
> You're using 0 and 0x0 in a mixed fashion. Please stick with one,
> preferably 0x0 everywhere.
yep
>
> > + no-map;
> > +
> > + qcom,client-id = <1>;
> > + qcom,vmid = <15>;
> > + };
> > +
> [...]
>
> > +
> > +&dispcc {
> > + status = "okay";
> Any reason for disabling dispcc by default?
I think that is a good question. I would prefer disabling and enabling
in places it is required, we might have a headless system or a dev board
where we dont have display..?
>
> > +};
> > +
> > +&gpu {
> > + status = "okay";
> > +
> > + zap-shader {
> > + memory-region = <&gpu_mem>;
> > + firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
> > + };
> > +};
> > +
> > +&i2c1 {
> > + clock-frequency = <100000>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c1_active>, <&i2c1_hid_active>;
> property
> property-names
>
> > +
> > + status = "okay";
> > +
> > + hid@10 {
> > + compatible = "hid-over-i2c";
> > + reg = <0x10>;
> > + hid-descr-addr = <0x1>;
> > +
> > + interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
> > +
> > +&i2c7 {
> > + clock-frequency = <100000>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c7_active>, <&i2c7_hid_active>;
> > +
> > + status = "okay";
> > +
> > + hid@5 {
> > + compatible = "hid-over-i2c";
> > + reg = <0x5>;
> > + hid-descr-addr = <0x20>;
> > +
> > + interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +
> > + hid@2c {
> > + compatible = "hid-over-i2c";
> > + reg = <0x2c>;
> > + hid-descr-addr = <0x20>;
> > +
> > + interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
> > + };
> > +};
> > +
> > +&mdss {
> > + status = "okay";
> > +};
> > +
> > +&mdss_edp {
> > + data-lanes = <0 1 2 3>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&edp_hpd_active>;
> > +
> > + status = "okay";
> > +
> > + aux-bus {
> > + panel {
> > + compatible = "edp-panel";
> > + no-hpd;
> > +
> > + backlight = <&backlight>;
> > +
> > + ports {
> > + port {
> > + auo_b140han06_in: endpoint {
> > + remote-endpoint = <&mdss_edp_out>;
> > + };
> > + };
> > + };
> > + };
> > + };
> > +
> > + ports {
> > + port@1 {
> > + reg = <1>;
> > + mdss_edp_out: endpoint {
> > + remote-endpoint = <&auo_b140han06_in>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&pcie3 {
> > + perst-gpio = <&tlmm 178 GPIO_ACTIVE_LOW>;
> > + wake-gpio = <&tlmm 180 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pcie3_default_state>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&pcie3_phy {
> > + vdda-phy-supply = <&vreg_l5e_0p88>;
> > + vdda-pll-supply = <&vreg_l3c_1p2>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&pmc8180c_lpg {
> > + status = "okay";
> > +};
> > +
> > +&qupv3_id_0 {
> > + status = "okay";
> > +};
> > +
> > +&qupv3_id_1 {
> > + status = "okay";
> > +};
> > +
> > +&qupv3_id_2 {
> > + status = "okay";
> > +};
> > +
> > +&remoteproc_adsp {
> > + memory-region = <&adsp_mem>;
> > + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcadsp8180.mbn";
> > +
> > + status = "okay";
> > +};
> > +
> > +&remoteproc_cdsp {
> > + memory-region = <&cdsp_mem>;
> > + firmware-name = "qcom/sc8180x/LENOVO/82AK/qccdsp8180.mbn";
> > +
> > + status = "okay";
> > +};
> > +
> > +&remoteproc_mpss {
> > + memory-region = <&mpss_mem>;
> > + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcmpss8180_nm.mbn";
> > +
> > + status = "okay";
> > +};
> > +
> > +&uart13 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart13_state>;
> > +
> > + status = "okay";
> > +
> > + bluetooth {
> > + compatible = "qcom,wcn3998-bt";
> > +
> > + vddio-supply = <&vreg_s4a_1p8>;
> > + vddxo-supply = <&vreg_l7a_1p8>;
> > + vddrf-supply = <&vreg_l9a_1p3>;
> > + vddch0-supply = <&vreg_l11c_3p3>;
> > + max-speed = <3200000>;
> > + };
> > +};
> > +
> > +&ufs_mem_hc {
> > + reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
> > +
> > + vcc-supply = <&vreg_l10e_2p9>;
> > + vcc-max-microamp = <155000>;
> > +
> > + vccq2-supply = <&vreg_l7e_1p8>;
> > + vccq2-max-microamp = <425000>;
> Missing regulator-allow-set-load for regulators that have current
> ops assigned to them.
>
> > +
> > + status = "okay";
> > +};
> > +
> > +&ufs_mem_phy {
> > + vdda-phy-supply = <&vreg_l5e_0p88>;
> > + vdda-pll-supply = <&vreg_l3c_1p2>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_prim_hsphy {
> > + vdda-pll-supply = <&vreg_l5e_0p88>;
> > + vdda18-supply = <&vreg_l12a_1p8>;
> > + vdda33-supply = <&vreg_l16e_3p0>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_prim_qmpphy {
> > + vdda-phy-supply = <&vreg_l3c_1p2>;
> > + vdda-pll-supply = <&vreg_l5e_0p88>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_prim {
> We mostly use usb_1 / usb_2 for this
Isnt this better from readablity pov? esp since this is board dts
>
> > + status = "okay";
> > +};
> > +
> > +&usb_prim_dwc3 {
> > + dr_mode = "host";
> > +};
> > +
> > +&usb_sec_hsphy {
> > + vdda-pll-supply = <&vreg_l5e_0p88>;
> > + vdda18-supply = <&vreg_l12a_1p8>;
> > + vdda33-supply = <&vreg_l16e_3p0>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_sec_qmpphy {
> > + vdda-phy-supply = <&vreg_l3c_1p2>;
> > + vdda-pll-supply = <&vreg_l5e_0p88>;
> > +
> > + status = "okay";
> > +};
> > +
> > +&usb_sec {
> > + status = "okay";
> > +};
> > +
> > +&usb_sec_dwc3 {
> > + dr_mode = "host";
> No roleswitching?
Laptop :-) Always in host mode
>
> > +};
> > +
> > +&wifi {
> > + memory-region = <&wlan_mem>;
> It comes from the common dt file, so this may as well stay there.
I can do that
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 00/12] Introduce the SC8180x devices
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (11 preceding siblings ...)
[not found] ` <20230325122444.249507-11-vkoul@kernel.org>
@ 2023-03-27 7:46 ` Krzysztof Kozlowski
2023-03-27 14:12 ` Bjorn Andersson
2023-04-03 15:07 ` (subset) " Mark Brown
2023-04-05 4:09 ` Bjorn Andersson
14 siblings, 1 reply; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:46 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson, Lorenzo Pieralisi, Bjorn Helgaas,
Greg Kroah-Hartman, Georgi Djakov, Mark Brown
Cc: linux-arm-msm, Alim Akhtar, Avri Altman, Bart Van Assche,
Thomas Gleixner, Marc Zyngier, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel,
Krzysztof Wilczyński, linux-pci, Kishon Vijay Abraham I,
linux-phy, Wesley Cheng, linux-usb, linux-pm, linux-scsi,
Liam Girdwood
On 25/03/2023 13:24, Vinod Koul wrote:
> This introduces Qualcomm SC8180x SoC which features in Lenovo Flex 5G
> laptop. This also adds support for Primus platform as well as Lenovo Flex 5G
> laptop.
>
> I would be great if submaintainers can ack the binding patch so that
> everything can go thru qcom tree
I think Bjorn recently was rejecting taking bindings patches, so what
changed?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties
2023-03-25 12:24 ` [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties Vinod Koul
@ 2023-03-27 7:52 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:52 UTC (permalink / raw)
To: Vinod Koul, Lorenzo Pieralisi, Bjorn Helgaas, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Rob Herring,
Krzysztof Wilczyński, Krzysztof Kozlowski, linux-pci,
devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
> sc8180x PCIe clocks and resets are different from the common pcie
There is no "common" part for sc8180x in this binding. sc8180x is
customized.
> binding, this warrants the oneOf clause for the clocks and resets
Your subject and commit suggests you are now adding new customization
for SC8180x, but it is already there! Clocks, interrupts, regs etc.
Therefore the commit msg does not fit the contents of the patch. Instead
say that you fix something or change, because of foo and bar.
Otherwise it looks like some old patch rebased onto new kernel so it
does not match at all.
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 49 ++++++++++++++++++-
> 1 file changed, 47 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index fb32c43dd12d..d4f837924e7c 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -459,6 +459,33 @@ allOf:
> items:
> - const: pci # PCIe core reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sc8180x
> + then:
> + properties:
> + clocks:
> + minItems: 8
> + maxItems: 8
> + clock-names:
> + items:
> + - const: pipe # PIPE clock
> + - const: aux # Auxiliary clock
> + - const: cfg # Configuration clock
> + - const: bus_master # Master AXI clock
> + - const: bus_slave # Slave AXI clock
> + - const: slave_q2a # Slave Q2A clock
> + - const: ref # REFERENCE clock
> + - const: tbu # PCIe TBU clock
> + resets:
> + maxItems: 1
> + reset-names:
> + items:
> + - const: pci # PCIe core reset
> +
> - if:
> properties:
> compatible:
> @@ -507,7 +534,6 @@ allOf:
> compatible:
> contains:
> enum:
> - - qcom,pcie-sc8180x
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> then:
> @@ -675,6 +701,7 @@ allOf:
> contains:
> enum:
> - qcom,pcie-sa8540p
> + - qcom,pcie-sc8180x
> - qcom,pcie-sc8280xp
> then:
> required:
> @@ -717,7 +744,6 @@ allOf:
> enum:
> - qcom,pcie-msm8996
> - qcom,pcie-sc7280
> - - qcom,pcie-sc8180x
> - qcom,pcie-sdm845
> - qcom,pcie-sm8150
> - qcom,pcie-sm8250
> @@ -746,6 +772,25 @@ allOf:
> - const: msi6
> - const: msi7
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-sc8180x
> + then:
> + oneOf:
It's not oneOf.
> + - properties:
> + interrupts:
> + maxItems: 1
> + interrupt-names:
> + items:
> + - const: msi
Why do you even need this here? It's already there.
> + iommus:
> + maxItems: 1
> + iommu-map:
> + maxItems: 2
And this looks wrong. Drop.
https://lore.kernel.org/all/20230308082424.140224-3-manivannan.sadhasivam@linaro.org/
> +
> - if:
> properties:
> compatible:
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs
2023-03-25 12:24 ` [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs Vinod Koul
@ 2023-03-27 7:54 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:54 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, linux-phy, devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
> sc8180x pcie phy requires to describe six reg areas for the phy to work,
> so move the description to the correct place documenting tx, rx lane 1,
> 2 and pcs and pcs misc.
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding
2023-03-25 12:24 ` [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding Vinod Koul
@ 2023-03-27 7:55 ` Krzysztof Kozlowski
2023-03-28 8:43 ` Vinod Koul
0 siblings, 1 reply; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:55 UTC (permalink / raw)
To: Vinod Koul, Greg Kroah-Hartman, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Wesley Cheng, linux-usb, devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
> Document the USB dwc3 controller for SC8180x SoC
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
> Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> index 4875c5b7d5b5..54e24c3abd29 100644
> --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> @@ -24,6 +24,7 @@ properties:
> - qcom,qcs404-dwc3
> - qcom,sc7180-dwc3
> - qcom,sc7280-dwc3
> + - qcom,sc8180x-dwc3
> - qcom,sc8280xp-dwc3
> - qcom,sdm660-dwc3
> - qcom,sdm670-dwc3
> @@ -324,6 +325,7 @@ allOf:
> compatible:
> contains:
> enum:
> + - qcom,sc8180x-dwc3
> - qcom,sm8350-dwc3
You need to update/add also block for interrupts.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding
2023-03-25 12:24 ` [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding Vinod Koul
@ 2023-03-27 7:59 ` Krzysztof Kozlowski
2023-03-27 10:19 ` Manivannan Sadhasivam
1 sibling, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:59 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Alim Akhtar, Avri Altman,
Bart Van Assche, Rob Herring, Krzysztof Kozlowski, linux-scsi,
devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
Subject: drop second/last, redundant "binding". The "dt-bindings" prefix
is already stating that these are bindings.
Same in all other patches.
> Document the UFS HC for SC8180x SoC
Finish sentences with full stop. Same in all other patches.
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs
2023-03-25 12:24 ` [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs Vinod Koul
@ 2023-03-27 7:59 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 7:59 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Kishon Vijay Abraham I, Rob Herring,
Krzysztof Kozlowski, linux-phy, devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
> sc8180x ufs phy requires to describe five reg areas for the phy to work,
> so move the description to the correct place documenting tx, rx lane
> 1, 2 and pcs.
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180
2023-03-25 12:24 ` [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180 Vinod Koul
@ 2023-03-27 8:01 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 8:01 UTC (permalink / raw)
To: Vinod Koul, Mark Brown, Bjorn Andersson
Cc: linux-arm-msm, Konrad Dybcio, Liam Girdwood, Rob Herring,
Krzysztof Kozlowski, linux-kernel, devicetree
On 25/03/2023 13:24, Vinod Koul wrote:
> Commit 71ca776a8885 ("regulator: qcom-rpmh: Add pmc8180 and pmc8180c")
> introduced these compatible's but the yaml conversion commit
> 7255f98d08c7 ("regulator: Convert RPMh regulator bindings to YAML")
> seems to have dropped it
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus
2023-03-25 12:24 ` [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus Vinod Koul
2023-03-25 12:36 ` Konrad Dybcio
@ 2023-03-27 8:12 ` Krzysztof Kozlowski
2023-03-27 8:14 ` Krzysztof Kozlowski
1 sibling, 1 reply; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 8:12 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 25/03/2023 13:24, Vinod Koul wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Introduce support for the SC8180X reference device, aka Primus, with
> debug UART, regulators, UFS and USB support.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi | 326 +++++++++
> arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 706 ++++++++++++++++++++
> 3 files changed, 1033 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-pmics.dtsi
> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-primus.dts
>
(...)
> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
> new file mode 100644
> index 000000000000..9f365fccae78
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts
> @@ -0,0 +1,706 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2020-2023, Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include "sc8180x.dtsi"
> +#include "sc8180x-pmics.dtsi"
> +
> +/ {
> + model = "Qualcomm SC8180x Primus";
> + compatible = "qcom,sc8180x-primus", "qcom,sc8180x";
Please run scripts/checkpatch.pl and fix reported warnings.
> +
> + aliases {
> + serial0 = &uart12;
> + serial1 = &uart13;
> + };
> +
> + backlight: backlight {
> + compatible = "pwm-backlight";
> + pwms = <&pmc8180c_lpg 4 1000000>;
> + enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&bl_pwm_default>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&hall_int_active_state>;
> +
> + lid-switch {
> + gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
> + linux,input-type = <EV_SW>;
> + linux,code = <SW_LID>;
> + wakeup-source;
> + wakeup-event-action = <EV_ACT_DEASSERTED>;
> + };
> + };
> +
> + reserved-memory {
> + rmtfs_mem: rmtfs-region@85500000 {
> + compatible = "qcom,rmtfs-mem";
> + reg = <0x0 0x85500000 0x0 0x200000>;
> + no-map;
> +
> + qcom,client-id = <1>;
> + qcom,vmid = <15>;
> + };
> +
> + wlan_mem: wlan-region@8bc00000 {
> + reg = <0x0 0x8bc00000 0x0 0x180000>;
> + no-map;
> + };
> +
> + adsp_mem: adsp-region@96e00000 {
> + reg = <0x0 0x96e00000 0x0 0x1c00000>;
> + no-map;
> + };
> +
> + mpss_mem: mpss-region@8d800000 {
> + reg = <0x0 0x8d800000 0x0 0x9600000>;
> + no-map;
> + };
> +
> + gpu_mem: gpu-region@98a00000 {
> + reg = <0x0 0x98a00000 0x0 0x2000>;
> + no-map;
> + };
> +
> + reserved-region@9a500000 {
> + reg = <0x0 0x9a500000 0x0 0x600000>;
> + no-map;
> + };
> + };
> +
> + vreg_nvme_0p9: nvme-0p9-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_nvme_0p9";
> +
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> +
> + regulator-always-on;
> + };
> +
> + vreg_nvme_3p3: nvme-3p3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_nvme_3p3";
> +
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmc8180c_gpios 11 0>;
> + enable-active-high;
> +
> + regulator-always-on;
> + };
> +
> + vdd_kb_tp_3v3: vdd-kb-tp-3v3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_kb_tp_3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + regulator-always-on;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&kb_tp_3v3_en_active_state>;
> + };
> +
> + vph_pwr: vph-pwr-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> + };
> +
> + vreg_s4a_1p8: pm8150-s4 {
-regulator suffix
> + compatible = "regulator-fixed";
> + regulator-name = "vreg_s4a_1p8";
> +
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> +
> + vin-supply = <&vph_pwr>;
> + };
> +};
> +
> +&apps_rsc {
> + pmc8180-a-rpmh-regulators {
Does not look like you tested the DTS against bindings. Please run `make
dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
for instructions).
> + compatible = "qcom,pmc8180-rpmh-regulators";
> + qcom,pmic-id = "a";
> +
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p0>;
> +
> + vreg_s5a_2p0: smps5 {
> + regulator-min-microvolt = <2040000>;
> + regulator-max-microvolt = <2100000>;
> + };
> +
> + vreg_l7a_1p8: ldo7 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l9a_1p3: ldo9 {
> + regulator-min-microvolt = <1296000>;
> + regulator-max-microvolt = <1304000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l12a_1p8: ldo12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +
> + pmc8180c-rpmh-regulators {
> + compatible = "qcom,pmc8180c-rpmh-regulators";
> + qcom,pmic-id = "c";
> +
> + vdd-s6-supply = <&vph_pwr>;
> + vdd-s8-supply = <&vph_pwr>;
> + vdd-l2-l3-supply = <&vreg_s6c_1p35>;
> + vdd-bob-supply = <&vph_pwr>;
> +
> + vreg_s6c_1p35: smps6 {
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1372000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_s8c_1p8: smps8 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + regulator-always-on;
> + };
> +
> + vreg_l3c_1p2: ldo3 {
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l4c_3p3: ldo4 {
> + regulator-min-microvolt = <3008000>;
> + regulator-max-microvolt = <3008000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l10c_3p3: ldo10 {
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3312000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l11c_3p3: ldo11 {
> + regulator-min-microvolt = <3296000>;
> + regulator-max-microvolt = <3304000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_bob: bob {
> + regulator-min-microvolt = <3296000>;
> + regulator-max-microvolt = <3350000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +
> + pmc8180-e-rpmh-regulators {
> + compatible = "qcom,pmc8180-rpmh-regulators";
> + qcom,pmic-id = "e";
> +
> + vdd-s4-supply = <&vph_pwr>;
> + vdd-s5-supply = <&vph_pwr>;
> + vdd-l2-l10-supply = <&vreg_bob>;
> + vdd-l3-l4-l5-l18-supply = <&vreg_s4e_0p98>;
> + vdd-l7-l12-l14-l15-supply = <&vreg_s5e_2p05>;
> + vdd-l13-l16-l17-supply = <&vreg_bob>;
> +
> + vreg_s4e_0p98: smps4 {
> + regulator-min-microvolt = <992000>;
> + regulator-max-microvolt = <992000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_s5e_2p05: smps5 {
> + regulator-min-microvolt = <2040000>;
> + regulator-max-microvolt = <2040000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l1e_0p75: ldo1 {
> + regulator-min-microvolt = <752000>;
> + regulator-max-microvolt = <752000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l5e_0p88: ldo5 {
> + regulator-min-microvolt = <880000>;
> + regulator-max-microvolt = <880000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l7e_1p8: ldo7 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l10e_2p9: ldo10 {
> + regulator-min-microvolt = <2904000>;
> + regulator-max-microvolt = <2904000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l12e: ldo12 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + vreg_l16e_3p0: ldo16 {
> + regulator-min-microvolt = <3072000>;
> + regulator-max-microvolt = <3072000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> + };
> +};
> +
> +&dispcc {
> + status = "okay";
> +};
> +
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + memory-region = <&gpu_mem>;
> + firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts_i2c_active_state>;
> +
> + status = "okay";
> +
> + touchscreen@10 {
> + compatible = "hid-over-i2c";
> + reg = <0x10>;
> + hid-descr-addr = <0x1>;
> +
> + vdd-supply = <&vreg_l4c_3p3>;
> + vddl-supply = <&vreg_l12e>;
> +
> + post-power-on-delay-ms = <20>;
> +
> + interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&ts_active_state>;
> + };
> +};
> +
> +&i2c7 {
> + clock-frequency = <100000>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&aux_i2c_active_state>;
> +
> + status = "okay";
> +
> + touchpad@15 {
> + compatible = "hid-over-i2c";
> + reg = <0x15>;
> + hid-descr-addr = <0x1>;
> +
> + interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&tp_int_active_state>;
> +
> + vdd-supply = <&vdd_kb_tp_3v3>;
> + };
> +
> + keyboard@3a {
> + compatible = "hid-over-i2c";
> + reg = <0x3a>;
> + hid-descr-addr = <0x1>;
> + interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&kb_int_active_state>;
> +
> + vdd-supply = <&vdd_kb_tp_3v3>;
> + };
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_edp {
> + data-lanes = <0 1 2 3>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&edp_hpd_active>;
> +
> + status = "okay";
> +
> + aux-bus {
> + panel {
> + compatible = "edp-panel";
> +
> + backlight = <&backlight>;
> +
> + ports {
Are you sure this passes dtbs checks?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus
2023-03-27 8:12 ` Krzysztof Kozlowski
@ 2023-03-27 8:14 ` Krzysztof Kozlowski
0 siblings, 0 replies; 39+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 8:14 UTC (permalink / raw)
To: Vinod Koul, Bjorn Andersson
Cc: linux-arm-msm, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 27/03/2023 10:12, Krzysztof Kozlowski wrote:
>> +
>> +/ {
>> + model = "Qualcomm SC8180x Primus";
>> + compatible = "qcom,sc8180x-primus", "qcom,sc8180x";
>
> Please run scripts/checkpatch.pl and fix reported warnings.
It seems it is already documented. Confusing to document board
compatibles in separate patchset one year before boards gets accepted...
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform
2023-03-27 5:38 ` Vinod Koul
@ 2023-03-27 8:49 ` Konrad Dybcio
2023-03-28 13:13 ` Vinod Koul
0 siblings, 1 reply; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-27 8:49 UTC (permalink / raw)
To: Vinod Koul
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 27.03.2023 07:38, Vinod Koul wrote:
> On 25-03-23, 13:34, Konrad Dybcio wrote:
>>
>>
>> On 25.03.2023 13:24, Vinod Koul wrote:
>>> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>
>>> Introduce a base dtsi for the Qualcomm SC8180x platform, with CPUs,
>>> global clock controller, SMMU, rpmh clocks, rpmh power-domains, CPUfreq,
>>> QUP blocks, UFS, USB, ADSP, CDSP and MPSS and WiFi.
>>>
>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>> Signed-off-by: Vinod Koul <vkoul@kernel.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/sc8180x.dtsi | 3950 +++++++++++++++++++++++++
>>> 1 file changed, 3950 insertions(+)
>>> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>> new file mode 100644
>>> index 000000000000..4d4ee6bc91e5
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
>>> @@ -0,0 +1,3950 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
>>> + * Copyright (c) 2020-2023, Linaro Limited
>>> + */
>>> +
>>> +#include <dt-bindings/clock/qcom,dispcc-sm8250.h>
>>> +#include <dt-bindings/clock/qcom,gcc-sc8180x.h>
>>> +#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
>>> +#include <dt-bindings/clock/qcom,rpmh.h>
>>> +#include <dt-bindings/interconnect/qcom,osm-l3.h>
>>> +#include <dt-bindings/interconnect/qcom,sc8180x.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include <dt-bindings/power/qcom-rpmpd.h>
>>> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
>>> +#include <dt-bindings/thermal/thermal.h>
>>> +
>>> +/ {
>>> + interrupt-parent = <&intc>;
>>> +
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> +
>>> + clocks {
>>> + xo_board_clk: xo-board {
>>> + compatible = "fixed-clock";
>>> + #clock-cells = <0>;
>>> + clock-frequency = <38400000>;
>>> + };
>>> +
>>> + sleep_clk: sleep-clk {
>>> + compatible = "fixed-clock";
>>> + #clock-cells = <0>;
>>> + clock-frequency = <32764>;
>>> + clock-output-names = "sleep_clk";
>>> + };
>>> + };
>>> +
>>> + cpus {
>>> + #address-cells = <2>;
>>> + #size-cells = <0>;
>>> +
>>> + CPU0: cpu@0 {
>>> + device_type = "cpu";
>>> + compatible = "qcom,kryo485";
>>> + reg = <0x0 0x0>;
>> Please add clocks = <&cpufreq_hw n>;
>>
>>> + enable-method = "psci";
>>> + capacity-dmips-mhz = <602>;
>>> + next-level-cache = <&L2_0>;
>>> + qcom,freq-domain = <&cpufreq_hw 0>;
>
> You mean this or something else?
Check
https://lore.kernel.org/lkml/20221102065448.GA10650@thinkpad/T/
>
>>> + operating-points-v2 = <&cpu0_opp_table>;
>>> + interconnects = <&gem_noc MASTER_AMPSS_M0 3 &mc_virt SLAVE_EBI_CH0 3>,
>>> + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
>>> + power-domains = <&CPU_PD0>;
>>> + power-domain-names = "psci";
>>> + #cooling-cells = <2>;
>> Add a newline before subnodes, please.
>
> Sure
>
>>
>>> + L2_0: l2-cache {
>>> + compatible = "cache";
>>> + next-level-cache = <&L3_0>;
>>> + L3_0: l3-cache {
>>> + compatible = "cache";
>>> + };
>>> + };
>>> + };
>>> +
>> [...]
>>
>>> +
>>> + cpu0_opp_table: opp-table-cpu0 {
>>> + compatible = "operating-points-v2";
>>> + opp-shared;
>>> +
>>> + opp-300000000 {
>>> + opp-hz = /bits/ 64 <300000000>;
>>> + opp-peak-kBps = <800000 9600000>;
>> Maybe adding bwmon from the get-go would be better than statically
>> scaling DDR freq?
>
> Maybe :-) but we would like to land the dts now rather than wait more :)
>
>>
>> [...]
>>
>>> + camnoc_virt: interconnect-0{
>> Missing space before {
>
> Will fix
>
>>> + compatible = "qcom,sc8180x-camnoc-virt";
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + mc_virt: interconnect-mc-virt {
>> Please be consistent with your naming.
>
> Are you referring to adding -0 for this?
I'm not sure which is preferred (-n vs -name), there's a mixed bag
upstream.. Krzysztof?
>
>>
>>> + compatible = "qcom,sc8180x-mc-virt";
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + qup_virt: interconnect-qup-virt {
>>> + compatible = "qcom,sc8180x-qup-virt";
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>> [...]
>>
>>> + reserved-memory {
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges;
>>> +
>>> + hyp_mem: hyp-region@85700000 {
>> the -region seems a bit unnecessary in all of these nodes
>
> This is reserved for hyp, I think we should add it here so that we dont
> touch this piece..?
I meant the '-region' bit in the node names
(label: name@unit-address)
Konrad
>
>>
>>> + reg = <0x0 0x85700000 0x0 0x600000>;
>>> + no-map;
>>> + };
>>> +
>> [...]
>>
>>> +
>>> + soc: soc@0 {
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges = <0 0 0 0 0x10 0>;
>>> + dma-ranges = <0 0 0 0 0x10 0>;
>>> + compatible = "simple-bus";
>> compat
>> addr-cells
>> size-cella
>> ranges
>> dma-ranges
>>
>> please
>
> Sure
>
>>
>>> +
>>> + gcc: clock-controller@100000 {
>>> + compatible = "qcom,gcc-sc8180x";
>>> + reg = <0x0 0x00100000 0x0 0x1f0000>;
>>> + #clock-cells = <1>;
>>> + #reset-cells = <1>;
>>> + #power-domain-cells = <1>;
>>> + clock-names = "bi_tcxo",
>>> + "bi_tcxo_ao",
>>> + "sleep_clk";
>>> + clocks = <&rpmhcc RPMH_CXO_CLK>,
>>> + <&rpmhcc RPMH_CXO_CLK_A>,
>>> + <&sleep_clk>;
>> property before property-names
>
> ok
>
>>
>>
>>> + };
>>> +
>>> + qupv3_id_0: geniqup@8c0000 {
>>> + compatible = "qcom,geni-se-qup";
>>> + reg = <0 0x008c0000 0 0x6000>;
>>> + clock-names = "m-ahb", "s-ahb";
>>> + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
>>> + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges;
>>> + iommus = <&apps_smmu 0x4c3 0>;
>>> + status = "disabled";
>>> +
>>> + i2c0: i2c@880000 {
>>> + compatible = "qcom,geni-i2c";
>>> + reg = <0 0x00880000 0 0x4000>;
>>> + clock-names = "se";
>>> + clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
>> property before property-names
>>
>> Please split QUPs into a separate patch, this one is way
>> too big.
>
> Will do
>
>>
>> [...]
>>
>>> + config_noc: interconnect@1500000 {
>> Interconnect could also realistically go to a separate patch.
>
> Yeah already list is complaining, let me see how to split it up...
>
>>
>>> + compatible = "qcom,sc8180x-config-noc";
>>> + reg = <0 0x01500000 0 0x7400>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + system_noc: interconnect@1620000 {
>>> + compatible = "qcom,sc8180x-system-noc";
>>> + reg = <0 0x01620000 0 0x19400>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + aggre1_noc: interconnect@16e0000 {
>>> + compatible = "qcom,sc8180x-aggre1-noc";
>>> + reg = <0 0x016e0000 0 0xd080>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + aggre2_noc: interconnect@1700000 {
>>> + compatible = "qcom,sc8180x-aggre2-noc";
>>> + reg = <0 0x01700000 0 0x20000>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + compute_noc: interconnect@1720000 {
>>> + compatible = "qcom,sc8180x-compute-noc";
>>> + reg = <0 0x01720000 0 0x7000>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>>> + mmss_noc: interconnect@1740000 {
>>> + compatible = "qcom,sc8180x-mmss-noc";
>>> + reg = <0 0x01740000 0 0x1c100>;
>>> + #interconnect-cells = <2>;
>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>> + };
>>> +
>> [...]
>>
>>> + pcie0: pci@1c00000 {
>> And PCIe
>>
>>> + compatible = "qcom,pcie-sc8180x";
>>> + reg = <0 0x01c00000 0 0x3000>,
>>> + <0 0x60000000 0 0xf1d>,
>>> + <0 0x60000f20 0 0xa8>,
>>> + <0 0x60001000 0 0x1000>,
>>> + <0 0x60100000 0 0x100000>;
>>> + reg-names = "parf", "dbi", "elbi", "atu", "config";
>> One per line, please
>
> ok
>
>>
>>
>> [...]
>>
>>> +
>>> + ufs_mem_hc: ufshc@1d84000 {
>>> + compatible = "qcom,sc8180x-ufshc", "qcom,ufshc",
>>> + "jedec,ufs-2.0";
>>> + reg = <0 0x01d84000 0 0x2500>;
>>> + interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
>>> + phys = <&ufs_mem_phy_lanes>;
>>> + phy-names = "ufsphy";
>>> + lanes-per-direction = <2>;
>>> + #reset-cells = <1>;
>>> + resets = <&gcc GCC_UFS_PHY_BCR>;
>>> + reset-names = "rst";
>>> +
>>> + iommus = <&apps_smmu 0x300 0>;
>>> +
>>> + clock-names =
>> No need for this weird newline split.
>>
>> Also, property before property-names.
>>
>> [...]
>>
>>
>>> +
>>> + gpu: gpu@2c00000 {
>> GPUSS and MDSS related nodes should also go to their separate,
>> respective patches.
>
> ok
>
>>
>> [...]
>>> +
>>> + remoteproc_mpss: remoteproc@4080000 {
>> And remote procs as well
>>
>>> + compatible = "qcom,sc8180x-mpss-pas";
>>> + reg = <0x0 0x04080000 0x0 0x4040>;
>>> +
>> [...]
>>
>>> + thermal-zones {
>> And thermal-zones as well.
>>
>>
>> I'll go more in-depth after you split it up, this is pretty hard
>> to review as-is.
>>
>> Konrad
>>> + cpu0-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 1>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu1-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 2>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu2-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 3>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu3-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 4>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu4-top-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 7>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu5-top-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 8>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu6-top-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 9>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu7-top-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 10>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu4-bottom-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 11>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu5-bottom-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 12>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu6-bottom-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 13>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cpu7-bottom-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 14>;
>>> +
>>> + trips {
>>> + cpu-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <1000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + aoss0-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 0>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cluster0-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 5>;
>>> +
>>> + trips {
>>> + cluster-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <2000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + cluster1-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 6>;
>>> +
>>> + trips {
>>> + cluster-crit {
>>> + temperature = <110000>;
>>> + hysteresis = <2000>;
>>> + type = "critical";
>>> + };
>>> + };
>>> + };
>>> +
>>> + gpu-thermal-top {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens0 15>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + aoss1-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 0>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + wlan-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 1>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + video-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 2>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + mem-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 3>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + q6-hvx-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 4>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + camera-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 5>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + compute-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 6>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + mdm-dsp-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 7>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + npu-thermal {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 8>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> +
>>> + gpu-thermal-bottom {
>>> + polling-delay-passive = <250>;
>>> + polling-delay = <1000>;
>>> +
>>> + thermal-sensors = <&tsens1 11>;
>>> +
>>> + trips {
>>> + trip-point0 {
>>> + temperature = <90000>;
>>> + hysteresis = <2000>;
>>> + type = "hot";
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + timer {
>>> + compatible = "arm,armv8-timer";
>>> + interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
>>> + <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
>>> + <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
>>> + <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
>>> + };
>>> +};
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
2023-03-27 5:43 ` Vinod Koul
@ 2023-03-27 8:51 ` Konrad Dybcio
2023-03-27 14:20 ` Bjorn Andersson
0 siblings, 1 reply; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-27 8:51 UTC (permalink / raw)
To: Vinod Koul
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 27.03.2023 07:43, Vinod Koul wrote:
> On 25-03-23, 13:40, Konrad Dybcio wrote:
>>
>>
>> On 25.03.2023 13:24, Vinod Koul wrote:
>>> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>>>
>>> Introduce support for the Lenovo Flex 5G laptop, built on the Qualcomm
>>> SC8180X platform. Supported peripherals includes keyboard, touchpad,
>>> UFS storage, external USB and WiFi.
>>>
>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>>> Signed-off-by: Vinod Koul <vkoul@kernel.org>
>>> ---
>>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>>> .../boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 590 ++++++++++++++++++
>>> 2 files changed, 591 insertions(+)
>>> create mode 100644 arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>> index fdce44a7a902..f096561f711e 100644
>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>> @@ -141,6 +141,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-zombie-nvme-lte.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd-r3.dtb
>>> +dtb-$(CONFIG_ARCH_QCOM) += sc8180x-lenovo-flex-5g.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc8180x-primus.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-crd.dtb
>>> dtb-$(CONFIG_ARCH_QCOM) += sc8280xp-lenovo-thinkpad-x13s.dtb
>>> diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
>>> new file mode 100644
>>> index 000000000000..76dad608fb85
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts
>>> @@ -0,0 +1,590 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
>>> + * Copyright (c) 2020-2023, Linaro Limited
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +#include <dt-bindings/input/gpio-keys.h>
>>> +#include <dt-bindings/input/input.h>
>>> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>>> +#include "sc8180x.dtsi"
>>> +#include "sc8180x-pmics.dtsi"
>>> +
>>> +/ {
>>> + model = "Lenovo Flex 5G";
>>> + compatible = "lenovo,flex-5g", "qcom,sc8180x";
>>> +
>>> + aliases {
>>> + serial0 = &uart13;
>>> + };
>>> +
>>> + backlight: backlight {
>>> + compatible = "pwm-backlight";
>>> + pwms = <&pmc8180c_lpg 4 1000000>;
>>> + enable-gpios = <&pmc8180c_gpios 8 GPIO_ACTIVE_HIGH>;
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&bl_pwm_default>;
>>> + };
>>> +
>>> + chosen {
>>> + };
>> Unused, remove.
>
> ok
>
>>
>>> +
>>> + gpio-keys {
>>> + compatible = "gpio-keys";
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&hall_int_active_state>;
>> property
>> property-names
>
> ack here and everwhere else
>
>>
>>> +
>>> + lid {
>>> + gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
>>> + linux,input-type = <EV_SW>;
>>> + linux,code = <SW_LID>;
>>> + wakeup-source;
>>> + wakeup-event-action = <EV_ACT_DEASSERTED>;
>>> + };
>>> + };
>>> +
>>> + reserved-memory {
>>> + rmtfs_mem: rmtfs-region@85500000 {
>>> + compatible = "qcom,rmtfs-mem";
>>> + reg = <0x0 0x85500000 0x0 0x200000>;
>> You're using 0 and 0x0 in a mixed fashion. Please stick with one,
>> preferably 0x0 everywhere.
>
> yep
>
>>
>>> + no-map;
>>> +
>>> + qcom,client-id = <1>;
>>> + qcom,vmid = <15>;
>>> + };
>>> +
>> [...]
>>
>>> +
>>> +&dispcc {
>>> + status = "okay";
>> Any reason for disabling dispcc by default?
>
> I think that is a good question. I would prefer disabling and enabling
> in places it is required, we might have a headless system or a dev board
> where we dont have display..?
It's a double-edged sword: on one side we could disable clocks that were
mistakenly enabled, but on the other hand we do keep some some clocks
always-on within that driver..
Perhaps leave it on by default and shut it off per-board if need be.
>
>>
>>> +};
>>> +
>>> +&gpu {
>>> + status = "okay";
>>> +
>>> + zap-shader {
>>> + memory-region = <&gpu_mem>;
>>> + firmware-name = "qcom/sc8180x/qcdxkmsuc8180.mbn";
>>> + };
>>> +};
>>> +
>>> +&i2c1 {
>>> + clock-frequency = <100000>;
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&i2c1_active>, <&i2c1_hid_active>;
>> property
>> property-names
>>
>>> +
>>> + status = "okay";
>>> +
>>> + hid@10 {
>>> + compatible = "hid-over-i2c";
>>> + reg = <0x10>;
>>> + hid-descr-addr = <0x1>;
>>> +
>>> + interrupts-extended = <&tlmm 122 IRQ_TYPE_LEVEL_LOW>;
>>> + };
>>> +};
>>> +
>>> +&i2c7 {
>>> + clock-frequency = <100000>;
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&i2c7_active>, <&i2c7_hid_active>;
>>> +
>>> + status = "okay";
>>> +
>>> + hid@5 {
>>> + compatible = "hid-over-i2c";
>>> + reg = <0x5>;
>>> + hid-descr-addr = <0x20>;
>>> +
>>> + interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_LOW>;
>>> + };
>>> +
>>> + hid@2c {
>>> + compatible = "hid-over-i2c";
>>> + reg = <0x2c>;
>>> + hid-descr-addr = <0x20>;
>>> +
>>> + interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
>>> + };
>>> +};
>>> +
>>> +&mdss {
>>> + status = "okay";
>>> +};
>>> +
>>> +&mdss_edp {
>>> + data-lanes = <0 1 2 3>;
>>> +
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&edp_hpd_active>;
>>> +
>>> + status = "okay";
>>> +
>>> + aux-bus {
>>> + panel {
>>> + compatible = "edp-panel";
>>> + no-hpd;
>>> +
>>> + backlight = <&backlight>;
>>> +
>>> + ports {
>>> + port {
>>> + auo_b140han06_in: endpoint {
>>> + remote-endpoint = <&mdss_edp_out>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + ports {
>>> + port@1 {
>>> + reg = <1>;
>>> + mdss_edp_out: endpoint {
>>> + remote-endpoint = <&auo_b140han06_in>;
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&pcie3 {
>>> + perst-gpio = <&tlmm 178 GPIO_ACTIVE_LOW>;
>>> + wake-gpio = <&tlmm 180 GPIO_ACTIVE_HIGH>;
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&pcie3_default_state>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&pcie3_phy {
>>> + vdda-phy-supply = <&vreg_l5e_0p88>;
>>> + vdda-pll-supply = <&vreg_l3c_1p2>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&pmc8180c_lpg {
>>> + status = "okay";
>>> +};
>>> +
>>> +&qupv3_id_0 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&qupv3_id_1 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&qupv3_id_2 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&remoteproc_adsp {
>>> + memory-region = <&adsp_mem>;
>>> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcadsp8180.mbn";
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&remoteproc_cdsp {
>>> + memory-region = <&cdsp_mem>;
>>> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qccdsp8180.mbn";
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&remoteproc_mpss {
>>> + memory-region = <&mpss_mem>;
>>> + firmware-name = "qcom/sc8180x/LENOVO/82AK/qcmpss8180_nm.mbn";
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&uart13 {
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&uart13_state>;
>>> +
>>> + status = "okay";
>>> +
>>> + bluetooth {
>>> + compatible = "qcom,wcn3998-bt";
>>> +
>>> + vddio-supply = <&vreg_s4a_1p8>;
>>> + vddxo-supply = <&vreg_l7a_1p8>;
>>> + vddrf-supply = <&vreg_l9a_1p3>;
>>> + vddch0-supply = <&vreg_l11c_3p3>;
>>> + max-speed = <3200000>;
>>> + };
>>> +};
>>> +
>>> +&ufs_mem_hc {
>>> + reset-gpios = <&tlmm 190 GPIO_ACTIVE_LOW>;
>>> +
>>> + vcc-supply = <&vreg_l10e_2p9>;
>>> + vcc-max-microamp = <155000>;
>>> +
>>> + vccq2-supply = <&vreg_l7e_1p8>;
>>> + vccq2-max-microamp = <425000>;
>> Missing regulator-allow-set-load for regulators that have current
>> ops assigned to them.
>>
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&ufs_mem_phy {
>>> + vdda-phy-supply = <&vreg_l5e_0p88>;
>>> + vdda-pll-supply = <&vreg_l3c_1p2>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_prim_hsphy {
>>> + vdda-pll-supply = <&vreg_l5e_0p88>;
>>> + vdda18-supply = <&vreg_l12a_1p8>;
>>> + vdda33-supply = <&vreg_l16e_3p0>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_prim_qmpphy {
>>> + vdda-phy-supply = <&vreg_l3c_1p2>;
>>> + vdda-pll-supply = <&vreg_l5e_0p88>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_prim {
>> We mostly use usb_1 / usb_2 for this
>
> Isnt this better from readablity pov? esp since this is board dts
Generally both sound pretty reasonable but I'm just saying that
all other trees name this differently..
Konrad
>
>>
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_prim_dwc3 {
>>> + dr_mode = "host";
>>> +};
>>> +
>>> +&usb_sec_hsphy {
>>> + vdda-pll-supply = <&vreg_l5e_0p88>;
>>> + vdda18-supply = <&vreg_l12a_1p8>;
>>> + vdda33-supply = <&vreg_l16e_3p0>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_sec_qmpphy {
>>> + vdda-phy-supply = <&vreg_l3c_1p2>;
>>> + vdda-pll-supply = <&vreg_l5e_0p88>;
>>> +
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_sec {
>>> + status = "okay";
>>> +};
>>> +
>>> +&usb_sec_dwc3 {
>>> + dr_mode = "host";
>> No roleswitching?
>
> Laptop :-) Always in host mode
>
>>
>>> +};
>>> +
>>> +&wifi {
>>> + memory-region = <&wlan_mem>;
>> It comes from the common dt file, so this may as well stay there.
>
> I can do that
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding
2023-03-25 12:24 ` [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding Vinod Koul
2023-03-27 7:59 ` Krzysztof Kozlowski
@ 2023-03-27 10:19 ` Manivannan Sadhasivam
1 sibling, 0 replies; 39+ messages in thread
From: Manivannan Sadhasivam @ 2023-03-27 10:19 UTC (permalink / raw)
To: Vinod Koul
Cc: Bjorn Andersson, linux-arm-msm, Konrad Dybcio, Alim Akhtar,
Avri Altman, Bart Van Assche, Rob Herring, Krzysztof Kozlowski,
linux-scsi, devicetree, linux-kernel
On Sat, Mar 25, 2023 at 05:54:38PM +0530, Vinod Koul wrote:
> Document the UFS HC for SC8180x SoC
>
> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Thanks,
Mani
> ---
> Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index c5a06c048389..a3db34f35f4f 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -26,6 +26,7 @@ properties:
> - qcom,msm8994-ufshc
> - qcom,msm8996-ufshc
> - qcom,msm8998-ufshc
> + - qcom,sc8180x-ufshc
> - qcom,sc8280xp-ufshc
> - qcom,sdm845-ufshc
> - qcom,sm6350-ufshc
> @@ -105,6 +106,7 @@ allOf:
> contains:
> enum:
> - qcom,msm8998-ufshc
> + - qcom,sc8280x-ufshc
> - qcom,sc8280xp-ufshc
> - qcom,sm8250-ufshc
> - qcom,sm8350-ufshc
> --
> 2.39.2
>
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 00/12] Introduce the SC8180x devices
2023-03-27 7:46 ` [PATCH v2 00/12] Introduce the SC8180x devices Krzysztof Kozlowski
@ 2023-03-27 14:12 ` Bjorn Andersson
0 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2023-03-27 14:12 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Vinod Koul, Lorenzo Pieralisi, Bjorn Helgaas, Greg Kroah-Hartman,
Georgi Djakov, Mark Brown, linux-arm-msm, Alim Akhtar,
Avri Altman, Bart Van Assche, Thomas Gleixner, Marc Zyngier,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, devicetree,
linux-kernel, Krzysztof Wilczyński, linux-pci,
Kishon Vijay Abraham I, linux-phy, Wesley Cheng, linux-usb,
linux-pm, linux-scsi, Liam Girdwood
On Mon, Mar 27, 2023 at 09:46:31AM +0200, Krzysztof Kozlowski wrote:
> On 25/03/2023 13:24, Vinod Koul wrote:
> > This introduces Qualcomm SC8180x SoC which features in Lenovo Flex 5G
> > laptop. This also adds support for Primus platform as well as Lenovo Flex 5G
> > laptop.
> >
> > I would be great if submaintainers can ack the binding patch so that
> > everything can go thru qcom tree
>
> I think Bjorn recently was rejecting taking bindings patches, so what
> changed?
>
Nothing changed. In the interest of reducing the risk for merge
conflicts I still think it's best if bindings goes via respective
maintainer trees; so patch 1 is for me...
Regards,
Bjorn
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
2023-03-27 8:51 ` Konrad Dybcio
@ 2023-03-27 14:20 ` Bjorn Andersson
0 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2023-03-27 14:20 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Vinod Koul, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On Mon, Mar 27, 2023 at 10:51:38AM +0200, Konrad Dybcio wrote:
> On 27.03.2023 07:43, Vinod Koul wrote:
> > On 25-03-23, 13:40, Konrad Dybcio wrote:
> >> On 25.03.2023 13:24, Vinod Koul wrote:
> >>> From: Bjorn Andersson <bjorn.andersson@linaro.org>
[..]
> >>> +&dispcc {
> >>> + status = "okay";
> >> Any reason for disabling dispcc by default?
> >
> > I think that is a good question. I would prefer disabling and enabling
> > in places it is required, we might have a headless system or a dev board
> > where we dont have display..?
> It's a double-edged sword: on one side we could disable clocks that were
> mistakenly enabled, but on the other hand we do keep some some clocks
> always-on within that driver..
>
> Perhaps leave it on by default and shut it off per-board if need be.
>
There is a little bit of overhead in keeping the clock controllers
enabled at all times, but I expect it to benefit us in that it would
ensure that any clocks that the bootloader might have left on will be
disabled.
So, I think we should go with enable by default and leave enabled.
Regards,
Bjorn
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema
2023-03-26 14:10 ` Rob Herring
@ 2023-03-28 8:29 ` Vinod Koul
0 siblings, 0 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-28 8:29 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Konrad Dybcio, Georgi Djakov, linux-pm, Rob Herring,
Bjorn Andersson, linux-arm-msm, Krzysztof Kozlowski, linux-kernel
On 26-03-23, 09:10, Rob Herring wrote:
>
> On Sat, 25 Mar 2023 17:54:37 +0530, Vinod Koul wrote:
> > SC8180x comes with interconnects having and missing IO address space, and
> > variable number of clocks, so split it from common file for easier
> > maintenance and to fix warnings like:
> >
> > sc8180x-lenovo-flex-5g.dtb: interconnect-0: 'reg' is a required property
> >
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> > .../bindings/interconnect/qcom,rpmh.yaml | 11 ---
> > .../interconnect/qcom,sc8180x-rpmh.yaml | 76 +++++++++++++++++++
> > 2 files changed, 76 insertions(+), 11 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sc8180x-rpmh.yaml
> >
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
Thanks I have fixed this error, will post v3 soon
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding
2023-03-27 7:55 ` Krzysztof Kozlowski
@ 2023-03-28 8:43 ` Vinod Koul
0 siblings, 0 replies; 39+ messages in thread
From: Vinod Koul @ 2023-03-28 8:43 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Greg Kroah-Hartman, Bjorn Andersson, linux-arm-msm, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Wesley Cheng, linux-usb,
devicetree, linux-kernel
On 27-03-23, 09:55, Krzysztof Kozlowski wrote:
> On 25/03/2023 13:24, Vinod Koul wrote:
> > Document the USB dwc3 controller for SC8180x SoC
> >
> > Signed-off-by: Vinod Koul <vkoul@kernel.org>
> > ---
> > Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > index 4875c5b7d5b5..54e24c3abd29 100644
> > --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
> > @@ -24,6 +24,7 @@ properties:
> > - qcom,qcs404-dwc3
> > - qcom,sc7180-dwc3
> > - qcom,sc7280-dwc3
> > + - qcom,sc8180x-dwc3
> > - qcom,sc8280xp-dwc3
> > - qcom,sdm660-dwc3
> > - qcom,sdm670-dwc3
> > @@ -324,6 +325,7 @@ allOf:
> > compatible:
> > contains:
> > enum:
> > + - qcom,sc8180x-dwc3
> > - qcom,sm8350-dwc3
>
> You need to update/add also block for interrupts.
Thanks for spotting that, updated now
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform
2023-03-27 8:49 ` Konrad Dybcio
@ 2023-03-28 13:13 ` Vinod Koul
2023-03-28 13:15 ` Konrad Dybcio
0 siblings, 1 reply; 39+ messages in thread
From: Vinod Koul @ 2023-03-28 13:13 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 27-03-23, 10:49, Konrad Dybcio wrote:
> On 27.03.2023 07:38, Vinod Koul wrote:
> > On 25-03-23, 13:34, Konrad Dybcio wrote:
> >>> + cpus {
> >>> + #address-cells = <2>;
> >>> + #size-cells = <0>;
> >>> +
> >>> + CPU0: cpu@0 {
> >>> + device_type = "cpu";
> >>> + compatible = "qcom,kryo485";
> >>> + reg = <0x0 0x0>;
> >> Please add clocks = <&cpufreq_hw n>;
> >>
> >>> + enable-method = "psci";
> >>> + capacity-dmips-mhz = <602>;
> >>> + next-level-cache = <&L2_0>;
> >>> + qcom,freq-domain = <&cpufreq_hw 0>;
> >
> > You mean this or something else?
> Check
>
> https://lore.kernel.org/lkml/20221102065448.GA10650@thinkpad/T/
Good point, thanks
> >>> + compatible = "qcom,sc8180x-camnoc-virt";
> >>> + #interconnect-cells = <2>;
> >>> + qcom,bcm-voters = <&apps_bcm_voter>;
> >>> + };
> >>> +
> >>> + mc_virt: interconnect-mc-virt {
> >> Please be consistent with your naming.
> >
> > Are you referring to adding -0 for this?
> I'm not sure which is preferred (-n vs -name), there's a mixed bag
> upstream.. Krzysztof?
Either ways this should be consistent, so camnoc_virt:
interconnect-camnoc_virt makes sense rather than arbitrary -0
> >>> + compatible = "qcom,sc8180x-mc-virt";
> >>> + #interconnect-cells = <2>;
> >>> + qcom,bcm-voters = <&apps_bcm_voter>;
> >>> + };
> >>> +
> >>> + qup_virt: interconnect-qup-virt {
> >>> + compatible = "qcom,sc8180x-qup-virt";
> >>> + #interconnect-cells = <2>;
> >>> + qcom,bcm-voters = <&apps_bcm_voter>;
> >>> + };
> >>> +
> >> [...]
> >>
> >>> + reserved-memory {
> >>> + #address-cells = <2>;
> >>> + #size-cells = <2>;
> >>> + ranges;
> >>> +
> >>> + hyp_mem: hyp-region@85700000 {
> >> the -region seems a bit unnecessary in all of these nodes
> >
> > This is reserved for hyp, I think we should add it here so that we dont
> > touch this piece..?
> I meant the '-region' bit in the node names
>
> (label: name@unit-address)
ack, thanks for clearing my misunderstanding
--
~Vinod
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform
2023-03-28 13:13 ` Vinod Koul
@ 2023-03-28 13:15 ` Konrad Dybcio
0 siblings, 0 replies; 39+ messages in thread
From: Konrad Dybcio @ 2023-03-28 13:15 UTC (permalink / raw)
To: Vinod Koul
Cc: Bjorn Andersson, linux-arm-msm, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel
On 28.03.2023 15:13, Vinod Koul wrote:
> On 27-03-23, 10:49, Konrad Dybcio wrote:
>> On 27.03.2023 07:38, Vinod Koul wrote:
>>> On 25-03-23, 13:34, Konrad Dybcio wrote:
>
>>>>> + cpus {
>>>>> + #address-cells = <2>;
>>>>> + #size-cells = <0>;
>>>>> +
>>>>> + CPU0: cpu@0 {
>>>>> + device_type = "cpu";
>>>>> + compatible = "qcom,kryo485";
>>>>> + reg = <0x0 0x0>;
>>>> Please add clocks = <&cpufreq_hw n>;
>>>>
>>>>> + enable-method = "psci";
>>>>> + capacity-dmips-mhz = <602>;
>>>>> + next-level-cache = <&L2_0>;
>>>>> + qcom,freq-domain = <&cpufreq_hw 0>;
>>>
>>> You mean this or something else?
>> Check
>>
>> https://lore.kernel.org/lkml/20221102065448.GA10650@thinkpad/T/
>
> Good point, thanks
>
>>>>> + compatible = "qcom,sc8180x-camnoc-virt";
>>>>> + #interconnect-cells = <2>;
>>>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>>>> + };
>>>>> +
>>>>> + mc_virt: interconnect-mc-virt {
>>>> Please be consistent with your naming.
>>>
>>> Are you referring to adding -0 for this?
>> I'm not sure which is preferred (-n vs -name), there's a mixed bag
>> upstream.. Krzysztof?
>
> Either ways this should be consistent, so camnoc_virt:
> interconnect-camnoc_virt makes sense rather than arbitrary -0
Yeah, just remember that underscores are forbidden in node names,
use hyphen instead!
Konrad
>
>>>>> + compatible = "qcom,sc8180x-mc-virt";
>>>>> + #interconnect-cells = <2>;
>>>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>>>> + };
>>>>> +
>>>>> + qup_virt: interconnect-qup-virt {
>>>>> + compatible = "qcom,sc8180x-qup-virt";
>>>>> + #interconnect-cells = <2>;
>>>>> + qcom,bcm-voters = <&apps_bcm_voter>;
>>>>> + };
>>>>> +
>>>> [...]
>>>>
>>>>> + reserved-memory {
>>>>> + #address-cells = <2>;
>>>>> + #size-cells = <2>;
>>>>> + ranges;
>>>>> +
>>>>> + hyp_mem: hyp-region@85700000 {
>>>> the -region seems a bit unnecessary in all of these nodes
>>>
>>> This is reserved for hyp, I think we should add it here so that we dont
>>> touch this piece..?
>> I meant the '-region' bit in the node names
>>
>> (label: name@unit-address)
>
> ack, thanks for clearing my misunderstanding
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: (subset) [PATCH v2 00/12] Introduce the SC8180x devices
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (12 preceding siblings ...)
2023-03-27 7:46 ` [PATCH v2 00/12] Introduce the SC8180x devices Krzysztof Kozlowski
@ 2023-04-03 15:07 ` Mark Brown
2023-04-05 4:09 ` Bjorn Andersson
14 siblings, 0 replies; 39+ messages in thread
From: Mark Brown @ 2023-04-03 15:07 UTC (permalink / raw)
To: Bjorn Andersson, Lorenzo Pieralisi, Bjorn Helgaas,
Greg Kroah-Hartman, Georgi Djakov, Vinod Koul
Cc: linux-arm-msm, Alim Akhtar, Avri Altman, Bart Van Assche,
Thomas Gleixner, Marc Zyngier, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, devicetree, linux-kernel,
Krzysztof Wilczyński, linux-pci, Kishon Vijay Abraham I,
linux-phy, Wesley Cheng, linux-usb, linux-pm, linux-scsi,
Liam Girdwood
On Sat, 25 Mar 2023 17:54:32 +0530, Vinod Koul wrote:
> This introduces Qualcomm SC8180x SoC which features in Lenovo Flex 5G
> laptop. This also adds support for Primus platform as well as Lenovo Flex 5G
> laptop.
>
> I would be great if submaintainers can ack the binding patch so that
> everything can go thru qcom tree
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next
Thanks!
[08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180
commit: fc4fef625decc80cf3a72e884a4e37288bfa0f9b
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: (subset) [PATCH v2 00/12] Introduce the SC8180x devices
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
` (13 preceding siblings ...)
2023-04-03 15:07 ` (subset) " Mark Brown
@ 2023-04-05 4:09 ` Bjorn Andersson
14 siblings, 0 replies; 39+ messages in thread
From: Bjorn Andersson @ 2023-04-05 4:09 UTC (permalink / raw)
To: Lorenzo Pieralisi, Vinod Koul, Greg Kroah-Hartman, Georgi Djakov,
Mark Brown, Bjorn Helgaas
Cc: linux-arm-msm, Krzysztof Kozlowski, Marc Zyngier, Liam Girdwood,
linux-kernel, linux-pci, Konrad Dybcio, linux-pm, Rob Herring,
Kishon Vijay Abraham I, Avri Altman, devicetree, linux-usb,
Krzysztof Wilczyński, linux-phy, Thomas Gleixner, linux-scsi,
Bart Van Assche, Alim Akhtar, Wesley Cheng
On Sat, 25 Mar 2023 17:54:32 +0530, Vinod Koul wrote:
> This introduces Qualcomm SC8180x SoC which features in Lenovo Flex 5G
> laptop. This also adds support for Primus platform as well as Lenovo Flex 5G
> laptop.
>
> I would be great if submaintainers can ack the binding patch so that
> everything can go thru qcom tree
>
> [...]
Applied, thanks!
[01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM
commit: c78ad8597ed961e822bf86ce7f1916dbfba255ef
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2023-04-05 4:08 UTC | newest]
Thread overview: 39+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-03-25 12:24 [PATCH v2 00/12] Introduce the SC8180x devices Vinod Koul
2023-03-25 12:24 ` [PATCH v2 01/12] dt-bindings: firmware: document Qualcomm SC8180X SCM Vinod Koul
2023-03-25 12:24 ` [PATCH v2 02/12] dt-bindings: PCI: qcom: Document sc8180x properties Vinod Koul
2023-03-27 7:52 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 03/12] dt-bindings: phy: qcom,qmp-pcie: fix the sc8180x regs Vinod Koul
2023-03-27 7:54 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 04/12] dt-bindings: usb: qcom,dwc3: Add SC8180x binding Vinod Koul
2023-03-27 7:55 ` Krzysztof Kozlowski
2023-03-28 8:43 ` Vinod Koul
2023-03-25 12:24 ` [PATCH v2 05/12] dt-bindings: interconnect: split SC8180x to own schema Vinod Koul
2023-03-26 14:10 ` Rob Herring
2023-03-28 8:29 ` Vinod Koul
2023-03-25 12:24 ` [PATCH v2 06/12] scsi: ufs: dt-bindings: Add SC8180x binding Vinod Koul
2023-03-27 7:59 ` Krzysztof Kozlowski
2023-03-27 10:19 ` Manivannan Sadhasivam
2023-03-25 12:24 ` [PATCH v2 07/12] dt-bindings: phy: qcom,qmp-ufs: fix the sc8180x regs Vinod Koul
2023-03-27 7:59 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 08/12] regulator: dt-bindings: qcom,rpmh: Add compatible for PMC8180 Vinod Koul
2023-03-27 8:01 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 09/12] dt-bindings: qcom,pdc: Add SC8180x compatible Vinod Koul
2023-03-25 12:24 ` [PATCH v2 11/12] arm64: dts: qcom: sc8180x: Introduce Primus Vinod Koul
2023-03-25 12:36 ` Konrad Dybcio
2023-03-27 5:39 ` Vinod Koul
2023-03-27 8:12 ` Krzysztof Kozlowski
2023-03-27 8:14 ` Krzysztof Kozlowski
2023-03-25 12:24 ` [PATCH v2 12/12] arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G Vinod Koul
2023-03-25 12:40 ` Konrad Dybcio
2023-03-27 5:43 ` Vinod Koul
2023-03-27 8:51 ` Konrad Dybcio
2023-03-27 14:20 ` Bjorn Andersson
[not found] ` <20230325122444.249507-11-vkoul@kernel.org>
2023-03-25 12:34 ` [PATCH v2 10/12] arm64: dts: qcom: Introduce the SC8180x platform Konrad Dybcio
2023-03-27 5:38 ` Vinod Koul
2023-03-27 8:49 ` Konrad Dybcio
2023-03-28 13:13 ` Vinod Koul
2023-03-28 13:15 ` Konrad Dybcio
2023-03-27 7:46 ` [PATCH v2 00/12] Introduce the SC8180x devices Krzysztof Kozlowski
2023-03-27 14:12 ` Bjorn Andersson
2023-04-03 15:07 ` (subset) " Mark Brown
2023-04-05 4:09 ` Bjorn Andersson
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