From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
Stephen Boyd <swboyd@chromium.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Bjorn Andersson <andersson@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org
Subject: [PATCH 0/6] drm/msm/dpu: rework interrupt handling
Date: Mon, 22 May 2023 03:42:21 +0300 [thread overview]
Message-ID: <20230522004227.134501-1-dmitry.baryshkov@linaro.org> (raw)
Declaring the mask of supported interrupts proved to be error-prone. It
is very easy to add a bit with no corresponding backing block or to miss
the INTF TE bit. Replace this static configuration with the irq mask
calculated from the HW catalog data.
Dmitry Baryshkov (6):
drm/msm/dpu: don't set DPU_INTF_TE globally
drm/msm/dpu: inline __intr_offset
drm/msm/dpu: split interrupt address arrays
drm/msm/dpu: autodetect supported interrupts
drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog
drm/msm/dpu: drop compatibility INTR defines
.../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 8 --
.../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 9 --
.../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 11 --
.../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 13 ---
.../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 10 --
.../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 6 -
.../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 5 -
.../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 5 -
.../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 13 +--
.../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 9 +-
.../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 18 +--
.../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 13 +--
.../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 13 +--
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 3 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 5 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 110 ++++++++++++------
.../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 21 ++--
17 files changed, 97 insertions(+), 175 deletions(-)
--
2.39.2
next reply other threads:[~2023-05-22 0:42 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-22 0:42 Dmitry Baryshkov [this message]
2023-05-22 0:42 ` [PATCH 1/6] drm/msm/dpu: don't set DPU_INTF_TE globally Dmitry Baryshkov
2023-05-22 14:29 ` Neil Armstrong
2023-05-22 0:42 ` [PATCH 2/6] drm/msm/dpu: inline __intr_offset Dmitry Baryshkov
2023-05-22 14:30 ` Neil Armstrong
2023-05-22 0:42 ` [PATCH 3/6] drm/msm/dpu: split interrupt address arrays Dmitry Baryshkov
2023-05-22 14:36 ` Neil Armstrong
2023-05-22 14:58 ` Dmitry Baryshkov
2023-05-22 0:42 ` [PATCH 4/6] drm/msm/dpu: autodetect supported interrupts Dmitry Baryshkov
2023-05-22 0:42 ` [PATCH 5/6] drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog Dmitry Baryshkov
2023-05-22 14:37 ` Neil Armstrong
2023-05-22 0:42 ` [PATCH 6/6] drm/msm/dpu: drop compatibility INTR defines Dmitry Baryshkov
2023-05-22 14:37 ` Neil Armstrong
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