Linux ARM-MSM sub-architecture
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From: Neil Armstrong <neil.armstrong@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	Stephen Boyd <swboyd@chromium.org>,
	David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Bjorn Andersson <andersson@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Subject: Re: [PATCH 2/6] drm/msm/dpu: inline __intr_offset
Date: Mon, 22 May 2023 16:30:17 +0200	[thread overview]
Message-ID: <ba804b7e-1ad4-1898-337e-487dd6c92b0d@linaro.org> (raw)
In-Reply-To: <20230522004227.134501-3-dmitry.baryshkov@linaro.org>

On 22/05/2023 02:42, Dmitry Baryshkov wrote:
> Inline __intr_offset(), there is no point in having a separate oneline
> function for setting base block address.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 8 +-------
>   1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> index 5e2d68ebb113..0776b0f6df4f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> @@ -435,12 +435,6 @@ u32 dpu_core_irq_read(struct dpu_kms *dpu_kms, int irq_idx)
>   	return intr_status;
>   }
>   
> -static void __intr_offset(const struct dpu_mdss_cfg *m,
> -		void __iomem *addr, struct dpu_hw_blk_reg_map *hw)
> -{
> -	hw->blk_addr = addr + m->mdp[0].base;
> -}
> -
>   struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
>   		const struct dpu_mdss_cfg *m)
>   {
> @@ -454,7 +448,7 @@ struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
>   	if (!intr)
>   		return ERR_PTR(-ENOMEM);
>   
> -	__intr_offset(m, addr, &intr->hw);
> +	intr->hw.blk_addr = addr + m->mdp[0].base;
>   
>   	intr->total_irqs = nirq;
>   

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>

  reply	other threads:[~2023-05-22 14:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-22  0:42 [PATCH 0/6] drm/msm/dpu: rework interrupt handling Dmitry Baryshkov
2023-05-22  0:42 ` [PATCH 1/6] drm/msm/dpu: don't set DPU_INTF_TE globally Dmitry Baryshkov
2023-05-22 14:29   ` Neil Armstrong
2023-05-22  0:42 ` [PATCH 2/6] drm/msm/dpu: inline __intr_offset Dmitry Baryshkov
2023-05-22 14:30   ` Neil Armstrong [this message]
2023-05-22  0:42 ` [PATCH 3/6] drm/msm/dpu: split interrupt address arrays Dmitry Baryshkov
2023-05-22 14:36   ` Neil Armstrong
2023-05-22 14:58     ` Dmitry Baryshkov
2023-05-22  0:42 ` [PATCH 4/6] drm/msm/dpu: autodetect supported interrupts Dmitry Baryshkov
2023-05-22  0:42 ` [PATCH 5/6] drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog Dmitry Baryshkov
2023-05-22 14:37   ` Neil Armstrong
2023-05-22  0:42 ` [PATCH 6/6] drm/msm/dpu: drop compatibility INTR defines Dmitry Baryshkov
2023-05-22 14:37   ` Neil Armstrong

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