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* [PATCH] PCI: qcom-ep: Fix the write to PARF_MHI_CLOCK_RESET_CTRL register
@ 2023-06-27 14:10 Manivannan Sadhasivam
  2023-06-27 15:16 ` Krzysztof Wilczyński
  0 siblings, 1 reply; 2+ messages in thread
From: Manivannan Sadhasivam @ 2023-06-27 14:10 UTC (permalink / raw)
  To: lpieralisi, kw
  Cc: robh, bhelgaas, linux-pci, linux-arm-msm, linux-kernel,
	Manivannan Sadhasivam, Krzysztof Wilczyński

Instead of writing the updated "val" that clears PARF_MSTR_AXI_CLK_EN,
"val" is read again. Fix it!

Fixes: c457ac029e44 ("PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS")
Reported-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
index 0fe7f06f2102..267e1247d548 100644
--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
@@ -415,7 +415,7 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci)
 	/* Gate Master AXI clock to MHI bus during L1SS */
 	val = readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
 	val &= ~PARF_MSTR_AXI_CLK_EN;
-	val = readl_relaxed(pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
+	writel_relaxed(val, pcie_ep->parf + PARF_MHI_CLOCK_RESET_CTRL);
 
 	dw_pcie_ep_init_notify(&pcie_ep->pci.ep);
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] PCI: qcom-ep: Fix the write to PARF_MHI_CLOCK_RESET_CTRL register
  2023-06-27 14:10 [PATCH] PCI: qcom-ep: Fix the write to PARF_MHI_CLOCK_RESET_CTRL register Manivannan Sadhasivam
@ 2023-06-27 15:16 ` Krzysztof Wilczyński
  0 siblings, 0 replies; 2+ messages in thread
From: Krzysztof Wilczyński @ 2023-06-27 15:16 UTC (permalink / raw)
  To: Manivannan Sadhasivam
  Cc: lpieralisi, robh, bhelgaas, linux-pci, linux-arm-msm,
	linux-kernel

Hello,

> Instead of writing the updated "val" that clears PARF_MSTR_AXI_CLK_EN,
> "val" is read again. Fix it!

Applied to controller/qcom, thank you!

[1/1] PCI: qcom-ep: Fix the write to PARF_MHI_CLOCK_RESET_CTRL register
      https://git.kernel.org/pci/pci/c/58cfae52a877

	Krzysztof

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-06-27 15:16 UTC | newest]

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2023-06-27 14:10 [PATCH] PCI: qcom-ep: Fix the write to PARF_MHI_CLOCK_RESET_CTRL register Manivannan Sadhasivam
2023-06-27 15:16 ` Krzysztof Wilczyński

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