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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Arnaud Vrac <avrac@freebox.fr>, Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 06/11] drm/msm/dpu: support cursor sspp hw blocks
Date: Thu, 20 Apr 2023 01:57:44 +0300	[thread overview]
Message-ID: <25166f59-0a9f-9e81-fd71-18be51f078f2@linaro.org> (raw)
In-Reply-To: <20230419-dpu-tweaks-v1-6-d1bac46db075@freebox.fr>

On 19/04/2023 17:41, Arnaud Vrac wrote:
> Cursor SSPP must be assigned to the last mixer stage, so we assign an
> immutable zpos property with a value higher than primary/overlay planes,
> to ensure it will always be on top.

The commit does more than is described in the commit message. Let's do 
it step by step. Please split into several patches. Also see below.

> 
> Signed-off-by: Arnaud Vrac <avrac@freebox.fr>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c   | 19 ++++++++++++++-----
>   drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 26 +++++++++++++++++++++++---
>   2 files changed, 37 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 0e7a68714e9e1..6cce0f6cfcb01 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -738,13 +738,22 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms)
>   	for (i = 0; i < catalog->sspp_count; i++) {
>   		enum drm_plane_type type;
>   
> -		if ((catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR))
> -			&& cursor_planes_idx < max_crtc_count)
> -			type = DRM_PLANE_TYPE_CURSOR;
> -		else if (primary_planes_idx < max_crtc_count)
> +		if (catalog->sspp[i].features & BIT(DPU_SSPP_CURSOR)) {
> +			if (cursor_planes_idx < max_crtc_count) {
> +				type = DRM_PLANE_TYPE_CURSOR;
> +			} else if (catalog->sspp[i].type == SSPP_TYPE_CURSOR) {
> +				/* Cursor SSPP can only be used in the last
> +				 * mixer stage, so it doesn't make sense to
> +				 * assign two of those to the same CRTC */
> +				continue;
> +			} else {
> +				type = DRM_PLANE_TYPE_OVERLAY;
> +			}
> +		} else if (primary_planes_idx < max_crtc_count) {
>   			type = DRM_PLANE_TYPE_PRIMARY;
> -		else
> +		} else {
>   			type = DRM_PLANE_TYPE_OVERLAY;
> +		}

Ack. I'm not sure how compositors will cope if we have two planes with 
immutable zpos set to the same value. Also I'd prefer to have this as a 
separate commit.

>   
>   		DPU_DEBUG("Create plane type %d with features %lx (cur %lx)\n",
>   			  type, catalog->sspp[i].features,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index 128ecdc145260..5a7bb8543866c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -881,7 +881,14 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
>   	r_pipe->multirect_mode = DPU_SSPP_MULTIRECT_NONE;
>   	r_pipe->sspp = NULL;
>   
> -	pstate->stage = DPU_STAGE_BASE + pstate->base.normalized_zpos;
> +	if (pipe_hw_caps->type == SSPP_TYPE_CURSOR) {
> +		/* enforce cursor sspp to use the last mixer stage */

I'd add here 'we know that it is the last plane in the stack because of 
zpos property ranges'

> +		pstate->stage = DPU_STAGE_BASE +
> +			pdpu->catalog->caps->max_mixer_blendstages;
> +	} else {
> +		pstate->stage = DPU_STAGE_BASE + pstate->base.normalized_zpos;
> +	}
> +
>   	if (pstate->stage > DPU_STAGE_BASE + pdpu->catalog->caps->max_mixer_blendstages) {
>   		DPU_ERROR("> %d plane mixer stages assigned\n",
>   			  pdpu->catalog->caps->max_mixer_blendstages);
> @@ -1463,6 +1470,7 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
>   	struct msm_drm_private *priv = dev->dev_private;
>   	struct dpu_kms *kms = to_dpu_kms(priv->kms);
>   	struct dpu_hw_sspp *pipe_hw;
> +	const uint64_t *format_modifiers;
>   	uint32_t num_formats;
>   	uint32_t supported_rotations;
>   	int ret = -EINVAL;
> @@ -1489,15 +1497,27 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
>   	format_list = pipe_hw->cap->sblk->format_list;
>   	num_formats = pipe_hw->cap->sblk->num_formats;
>   
> +	if (pipe_hw->cap->type == SSPP_TYPE_CURSOR)
> +		format_modifiers = NULL;
> +	else
> +		format_modifiers = supported_format_modifiers;
> +
>   	ret = drm_universal_plane_init(dev, plane, 0xff, &dpu_plane_funcs,
>   				format_list, num_formats,
> -				supported_format_modifiers, type, NULL);
> +				format_modifiers, type, NULL);


Separate commit please

>   	if (ret)
>   		goto clean_plane;
>   
>   	pdpu->catalog = kms->catalog;
>   
> -	ret = drm_plane_create_zpos_property(plane, 0, 0, DPU_ZPOS_MAX);
> +	if (pipe_hw->cap->type == SSPP_TYPE_CURSOR) {
> +		/* cursor SSPP can only be used in the last mixer stage,
> +		 * enforce it by maxing out the cursor plane zpos */
> +		ret = drm_plane_create_zpos_immutable_property(plane, DPU_ZPOS_MAX);
> +	} else {
> +		ret = drm_plane_create_zpos_property(plane, 0, 0, DPU_ZPOS_MAX - 1);
> +	}
> +
>   	if (ret)
>   		DPU_ERROR("failed to install zpos property, rc = %d\n", ret);
>   
> 

-- 
With best wishes
Dmitry


  reply	other threads:[~2023-04-19 22:58 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-19 14:41 [PATCH 00/11] drm/msm/dpu: tweaks for better hardware resources allocation Arnaud Vrac
2023-04-19 14:41 ` [PATCH 01/11] drm/msm/dpu: tweak msm8998 hw catalog values Arnaud Vrac
2023-04-19 22:15   ` Dmitry Baryshkov
2023-04-25 21:33   ` Abhinav Kumar
2023-04-19 14:41 ` [PATCH 02/11] drm/msm/dpu: use the actual lm maximum width instead of a hardcoded value Arnaud Vrac
2023-04-19 22:23   ` Dmitry Baryshkov
2023-04-20 17:47     ` [Freedreno] " Jeykumar Sankaran
2023-05-20 20:49       ` Dmitry Baryshkov
2023-05-22  9:30         ` Arnaud Vrac
2023-04-19 14:41 ` [PATCH 03/11] drm/msm/dpu: use hsync/vsync polarity set by the encoder Arnaud Vrac
2023-04-19 22:29   ` Dmitry Baryshkov
2023-04-20 18:01   ` [Freedreno] " Jeykumar Sankaran
2023-04-20 18:36     ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 04/11] drm/msm/dpu: allow using lm mixer base stage Arnaud Vrac
2023-04-19 22:43   ` Dmitry Baryshkov
2023-04-20  7:26     ` Arnaud Vrac
2023-04-20  9:53       ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 05/11] drm/msm/dpu: allow using all lm mixer stages Arnaud Vrac
2023-04-19 22:44   ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 06/11] drm/msm/dpu: support cursor sspp hw blocks Arnaud Vrac
2023-04-19 22:57   ` Dmitry Baryshkov [this message]
2023-04-19 14:41 ` [PATCH 07/11] drm/msm/dpu: add sspp cursor blocks to msm8998 hw catalog Arnaud Vrac
2023-04-19 23:10   ` Dmitry Baryshkov
2023-04-20  7:06     ` Arnaud Vrac
2023-04-20  8:47       ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 08/11] drm/msm/dpu: fix cursor block register bit offset in " Arnaud Vrac
2023-04-19 23:11   ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 09/11] drm/msm/dpu: set max cursor width to 512x512 Arnaud Vrac
2023-04-19 22:59   ` Dmitry Baryshkov
2023-04-19 14:41 ` [PATCH 10/11] drm/msm/dpu: tweak lm pairings in msm8998 hw catalog Arnaud Vrac
2023-04-19 23:15   ` Dmitry Baryshkov
2023-04-25  1:05   ` Abhinav Kumar
2023-04-19 14:41 ` [PATCH 11/11] drm/msm/dpu: do not use mixer that supports dspp when not required Arnaud Vrac
2023-04-19 23:18   ` Dmitry Baryshkov
2023-04-20  7:08     ` Arnaud Vrac
2023-04-28 20:11 ` (subset) [PATCH 00/11] drm/msm/dpu: tweaks for better hardware resources allocation Abhinav Kumar

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