[PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Jens Glathe via B4 Relay]

From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>

The usb0 port didn't switch to dp altmode, investigation into DSDT
UCS0 device resulted into GPIO 100.

Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
---
This patch amends the enable gpio for the usb0-sbu-mux to the one
found in the DSDT file for this box. It shows a list of GPIOs in 
a certain order, and it has 2 buffers with conflicting values. 
The one deviating is in the second buffer, at the place where one 
would expect the GPIO for the select pin of USB0 (by pattern 
application from USB1). The GPIO previously used is also there, but 
at the end of the UCS0 buffer structure). Changing it resulted in 
a working dp altmode functionality on usb0.

This debug effort is a result of work / testing of the 4-lanes patch
[1] on all available devices. Independent of it, it enables dp 
altmode on usb0, and with it, also 4 lanes, making it even more useful.

[1]: https://lore.kernel.org/all/20250527-topic-4ln_dp_respin-v3-0-f9a0763ec289@oss.qualcomm.com/
---
 arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
index 812251324002b50f3b48845b6c244f692d42b9b2..b8cbef0ebce76acf9d1e841e613646119dc400ff 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
@@ -243,7 +243,7 @@ linux,cma {
 	usb0-sbu-mux {
 		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
 
-		enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+		enable-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
 		select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
 
 		pinctrl-0 = <&usb0_sbu_default>;
@@ -1267,7 +1267,7 @@ tx-pins {
 
 	usb0_sbu_default: usb0-sbu-state {
 		oe-n-pins {
-			pins = "gpio101";
+			pins = "gpio100";
 			function = "gpio";
 			bias-disable;
 			drive-strength = <16>;

---
base-commit: 475c850a7fdd0915b856173186d5922899d65686
change-id: 20250609-blackrock-usb0-mux-2d70ccb09b14

Best regards,
-- 
Jens Glathe <jens.glathe@oldschoolsolutions.biz>

Re: [PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Jérôme de Bretagne]

On 6/9/25 22:53, Jens Glathe wrote:
> The usb0 port didn't switch to dp altmode, investigation into DSDT
> UCS0 device resulted into GPIO 100.
> 
> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>

Tested:by: Jérome de Bretagne <jerome.debretagne@gmail.com>

The same issue was impacting the other sc8280xp-based model from
Microsoft, which is sharing an almost identical board:

The top USB-C port (usb0) didn't switch to DP alt mode, as reusing the
same GPIO 101 as on the SC8280XP CRD or Lenovo ThinkPad X13s was not
working on the Surface Pro 9 5G (arcata) either.

Switching to GPIO 100 fixed the issue on arcata as well, to finally.
enable external screen when using the left-side top USB-C port. I
will send the fix for the Surface Pro 9 5G as part of a series
fixing various issues and limitations in its initial device tree.

Thank you,
Jérôme

Re: [PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Jérôme de Bretagne]

On 5/17/26 12:03, Jérôme de Bretagne wrote:
> On 6/9/25 22:53, Jens Glathe wrote:
>> The usb0 port didn't switch to dp altmode, investigation into DSDT
>> UCS0 device resulted into GPIO 100.
>>
>> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
> 
> Tested:by: Jérome de Bretagne <jerome.debretagne@gmail.com>

Sorry for the typo, I meant:

Tested-by: Jérome de Bretagne <jerome.debretagne@gmail.com>

> 
> The same issue was impacting the other sc8280xp-based model from
> Microsoft, which is sharing an almost identical board:
> 
> The top USB-C port (usb0) didn't switch to DP alt mode, as reusing the
> same GPIO 101 as on the SC8280XP CRD or Lenovo ThinkPad X13s was not
> working on the Surface Pro 9 5G (arcata) either.
> 
> Switching to GPIO 100 fixed the issue on arcata as well, to finally.
> enable external screen when using the left-side top USB-C port. I
> will send the fix for the Surface Pro 9 5G as part of a series
> fixing various issues and limitations in its initial device tree.
> 
> Thank you,
> Jérôme
> 

Re: [PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Dmitry Baryshkov]

On Mon, Jun 09, 2025 at 10:53:56PM +0200, Jens Glathe via B4 Relay wrote:
> From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
> 
> The usb0 port didn't switch to dp altmode, investigation into DSDT
> UCS0 device resulted into GPIO 100.
> 
> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
> ---
> This patch amends the enable gpio for the usb0-sbu-mux to the one
> found in the DSDT file for this box. It shows a list of GPIOs in 
> a certain order, and it has 2 buffers with conflicting values. 
> The one deviating is in the second buffer, at the place where one 
> would expect the GPIO for the select pin of USB0 (by pattern 
> application from USB1). The GPIO previously used is also there, but 
> at the end of the UCS0 buffer structure). Changing it resulted in 
> a working dp altmode functionality on usb0.
> 
> This debug effort is a result of work / testing of the 4-lanes patch
> [1] on all available devices. Independent of it, it enables dp 
> altmode on usb0, and with it, also 4 lanes, making it even more useful.
> 
> [1]: https://lore.kernel.org/all/20250527-topic-4ln_dp_respin-v3-0-f9a0763ec289@oss.qualcomm.com/
> ---
>  arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

P.S. Might it be that you need to set both GPIOs? Might the other GPIO
be related to USB4 tunnelling?

-- 
With best wishes
Dmitry

Re: [PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Konrad Dybcio]

On 5/17/26 1:59 PM, Dmitry Baryshkov wrote:
> On Mon, Jun 09, 2025 at 10:53:56PM +0200, Jens Glathe via B4 Relay wrote:
>> From: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
>>
>> The usb0 port didn't switch to dp altmode, investigation into DSDT
>> UCS0 device resulted into GPIO 100.
>>
>> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
>> ---
>> This patch amends the enable gpio for the usb0-sbu-mux to the one
>> found in the DSDT file for this box. It shows a list of GPIOs in 
>> a certain order, and it has 2 buffers with conflicting values. 
>> The one deviating is in the second buffer, at the place where one 
>> would expect the GPIO for the select pin of USB0 (by pattern 
>> application from USB1). The GPIO previously used is also there, but 
>> at the end of the UCS0 buffer structure). Changing it resulted in 
>> a working dp altmode functionality on usb0.
>>
>> This debug effort is a result of work / testing of the 4-lanes patch
>> [1] on all available devices. Independent of it, it enables dp 
>> altmode on usb0, and with it, also 4 lanes, making it even more useful.
>>
>> [1]: https://lore.kernel.org/all/20250527-topic-4ln_dp_respin-v3-0-f9a0763ec289@oss.qualcomm.com/
>> ---
>>  arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> 
> P.S. Might it be that you need to set both GPIOs? Might the other GPIO
> be related to USB4 tunnelling?

On the CRD8280 schematic, GPIO_100 is N/C and there's a comment that
at some point SBU_SW_OE_N was moved from 100 to 101

Konrad

Re: [PATCH] dt: arm64: qcom: sc8280xp-blackrock: amend usb0-sbu-mux enable gpio

[Jens Glathe]

On 5/18/26 09:50, Konrad Dybcio wrote:
> On 5/17/26 1:59 PM, Dmitry Baryshkov wrote:
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>
>> P.S. Might it be that you need to set both GPIOs? Might the other GPIO
>> be related to USB4 tunnelling?
> On the CRD8280 schematic, GPIO_100 is N/C and there's a comment that
> at some point SBU_SW_OE_N was moved from 100 to 101
>
> Konrad

So the SP9-5G mainboard (arcata, blackrock) derived from before this 
change. No info on USB4, either. Would be fun to get that up, though

with best regards

Jens