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From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	<andersson@kernel.org>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
	<conor+dt@kernel.org>, <konradybcio@kernel.org>,
	<catalin.marinas@arm.com>, <will@kernel.org>,
	<p.zabel@pengutronix.de>, <richardcochran@gmail.com>,
	<geert+renesas@glider.be>, <dmitry.baryshkov@linaro.org>,
	<arnd@arndb.de>, <nfraprado@collabora.com>,
	<biju.das.jz@bp.renesas.com>, <quic_tdas@quicinc.com>,
	<ebiggers@google.com>, <ardb@kernel.org>, <ross.burton@arm.com>,
	<quic_anusha@quicinc.com>, <linux-arm-msm@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>
Cc: <quic_srichara@quicinc.com>, <quic_varada@quicinc.com>
Subject: Re: [PATCH v9 5/6] arm64: dts: qcom: ipq9574: Add nsscc node
Date: Tue, 18 Feb 2025 16:57:12 +0530	[thread overview]
Message-ID: <25e5840d-a9c3-45fa-ae06-e18c387f1efc@quicinc.com> (raw)
In-Reply-To: <ee166cf3-4486-4172-a510-bafa1624ab79@oss.qualcomm.com>



On 2/10/2025 11:47 PM, Konrad Dybcio wrote:
> On 7.02.2025 8:39 AM, Manikanta Mylavarapu wrote:
>> From: Devi Priya <quic_devipriy@quicinc.com>
>>
>> Add a node for the nss clock controller found on ipq9574 based devices.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>> ---
>> Changes in V9:
>> 	- Rebased on linux-next tip.
>>
>>  arch/arm64/boot/dts/qcom/ipq9574.dtsi | 19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 942290028972..29008b156a7e 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -1193,6 +1193,25 @@ pcie0: pci@28000000 {
>>  			status = "disabled";
>>  		};
>>  
>> +		nsscc: clock-controller@39b00000 {
>> +			compatible = "qcom,ipq9574-nsscc";
>> +			reg = <0x39b00000 0x80000>;
>> +			clocks = <&xo_board_clk>,
>> +				 <&cmn_pll NSS_1200MHZ_CLK>,
>> +				 <&cmn_pll PPE_353MHZ_CLK>,
>> +				 <&gcc GPLL0_OUT_AUX>,
>> +				 <0>,
>> +				 <0>,
>> +				 <0>,
>> +				 <0>,
>> +				 <0>,
>> +				 <0>,
>> +				 <&gcc GCC_NSSCC_CLK>;
> 
> This last clock doesn't seem to be used in the driver - is that by design?

Hi Konrad,

Initially, was under the impression that the GCC_NSSCC_CLK will be enabled by the Ethernet driver.
However, that is incorrect and this clock is needed for accessing the NSSCC block itself. Hence restoring this.

I will enable this clock by using the PM APIs (pm_clk_add()) in next version.

Thanks & Regards,
Manikanta.

  reply	other threads:[~2025-02-18 11:28 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-07  7:39 [PATCH v9 0/6] Add NSS clock controller support for IPQ9574 Manikanta Mylavarapu
2025-02-07  7:39 ` [PATCH v9 1/6] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Manikanta Mylavarapu
2025-02-07  7:39 ` [PATCH v9 2/6] clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock Manikanta Mylavarapu
2025-02-07  7:39 ` [PATCH v9 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions Manikanta Mylavarapu
2025-02-07  7:39 ` [PATCH v9 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574 Manikanta Mylavarapu
2025-02-10 18:15   ` Konrad Dybcio
2025-02-07  7:39 ` [PATCH v9 5/6] arm64: dts: qcom: ipq9574: Add nsscc node Manikanta Mylavarapu
2025-02-10 18:17   ` Konrad Dybcio
2025-02-18 11:27     ` Manikanta Mylavarapu [this message]
2025-02-07  7:39 ` [PATCH v9 6/6] arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 Manikanta Mylavarapu
2025-02-26 11:17   ` Krzysztof Kozlowski

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